authorbors <bors@rust-lang.org> 2025-12-21 07:24:05 UTC
committerbors <bors@rust-lang.org> 2025-12-21 07:24:05 UTC
logd0e6d778cf1563beb494ca3f1b7858e00776722f
treeefaed03ea58af4abffc6d56979fdf9423cc130de
parentcb79c42008b970269f6a06b257e5f04b93f24d03
parentd5b6bd87ec0a2622ef3dc8edbf21e072aa5aa2df

Auto merge of #150215 - GuillaumeGomez:subtree-update_cg_gcc_2025-12-21, r=antoyo

sync GCC backend 2025-12-21 r? ghost

5 files changed, 118 insertions(+), 31 deletions(-)

compiler/rustc_codegen_gcc/build_system/src/build.rs+9-3
......@@ -111,14 +111,20 @@ pub fn build_sysroot(env: &HashMap<String, String>, config: &ConfigInfo) -> Resu
111111
112112 // Symlink libgccjit.so to sysroot.
113113 let lib_path = start_dir.join("sysroot").join("lib");
114 let rustlib_target_path = lib_path
115 .join("rustlib")
116 .join(&config.host_triple)
117 .join("codegen-backends")
118 .join("lib")
119 .join(&config.target_triple);
114120 let libgccjit_path =
115121 PathBuf::from(config.gcc_path.as_ref().expect("libgccjit should be set by this point"))
116122 .join("libgccjit.so");
117 let libgccjit_in_sysroot_path = lib_path.join("libgccjit.so");
123 let libgccjit_in_sysroot_path = rustlib_target_path.join("libgccjit.so");
118124 // First remove the file to be able to create the symlink even when the file already exists.
119125 let _ = fs::remove_file(&libgccjit_in_sysroot_path);
120 create_dir(&lib_path)?;
121 symlink(libgccjit_path, libgccjit_in_sysroot_path)
126 create_dir(&rustlib_target_path)?;
127 symlink(libgccjit_path, &libgccjit_in_sysroot_path)
122128 .map_err(|error| format!("Cannot create symlink for libgccjit.so: {}", error))?;
123129
124130 let library_dir = start_dir.join("sysroot_src").join("library");
compiler/rustc_codegen_gcc/rust-toolchain+1-1
......@@ -1,3 +1,3 @@
11[toolchain]
2channel = "nightly-2025-11-24"
2channel = "nightly-2025-12-20"
33components = ["rust-src", "rustc-dev", "llvm-tools-preview"]
compiler/rustc_codegen_gcc/src/intrinsic/archs.rs+99-24
......@@ -70,10 +70,6 @@ fn map_arch_intrinsic(full_name: &str) -> &'static str {
7070 "sve.sm4e" => "__builtin_sve_svsm4e_u32",
7171 "sve.sm4ekey" => "__builtin_sve_svsm4ekey_u32",
7272 "sve.wrffr" => "__builtin_sve_svwrffr",
73 "tcancel" => "__builtin_arm_tcancel",
74 "tcommit" => "__builtin_arm_tcommit",
75 "tstart" => "__builtin_arm_tstart",
76 "ttest" => "__builtin_arm_ttest",
7773 _ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
7874 }
7975 }
......@@ -1632,6 +1628,14 @@ fn map_arch_intrinsic(full_name: &str) -> &'static str {
16321628 "V6.vabs.f8.128B" => "__builtin_HEXAGON_V6_vabs_f8_128B",
16331629 "V6.vabs.hf" => "__builtin_HEXAGON_V6_vabs_hf",
16341630 "V6.vabs.hf.128B" => "__builtin_HEXAGON_V6_vabs_hf_128B",
1631 "V6.vabs.qf16.hf" => "__builtin_HEXAGON_V6_vabs_qf16_hf",
1632 "V6.vabs.qf16.hf.128B" => "__builtin_HEXAGON_V6_vabs_qf16_hf_128B",
1633 "V6.vabs.qf16.qf16" => "__builtin_HEXAGON_V6_vabs_qf16_qf16",
1634 "V6.vabs.qf16.qf16.128B" => "__builtin_HEXAGON_V6_vabs_qf16_qf16_128B",
1635 "V6.vabs.qf32.qf32" => "__builtin_HEXAGON_V6_vabs_qf32_qf32",
1636 "V6.vabs.qf32.qf32.128B" => "__builtin_HEXAGON_V6_vabs_qf32_qf32_128B",
1637 "V6.vabs.qf32.sf" => "__builtin_HEXAGON_V6_vabs_qf32_sf",
1638 "V6.vabs.qf32.sf.128B" => "__builtin_HEXAGON_V6_vabs_qf32_sf_128B",
16351639 "V6.vabs.sf" => "__builtin_HEXAGON_V6_vabs_sf",
16361640 "V6.vabs.sf.128B" => "__builtin_HEXAGON_V6_vabs_sf_128B",
16371641 "V6.vabsb" => "__builtin_HEXAGON_V6_vabsb",
......@@ -1744,6 +1748,8 @@ fn map_arch_intrinsic(full_name: &str) -> &'static str {
17441748 "V6.vaddwsat.128B" => "__builtin_HEXAGON_V6_vaddwsat_128B",
17451749 "V6.vaddwsat.dv" => "__builtin_HEXAGON_V6_vaddwsat_dv",
17461750 "V6.vaddwsat.dv.128B" => "__builtin_HEXAGON_V6_vaddwsat_dv_128B",
1751 "V6.valign4" => "__builtin_HEXAGON_V6_valign4",
1752 "V6.valign4.128B" => "__builtin_HEXAGON_V6_valign4_128B",
17471753 "V6.valignb" => "__builtin_HEXAGON_V6_valignb",
17481754 "V6.valignb.128B" => "__builtin_HEXAGON_V6_valignb_128B",
17491755 "V6.valignbi" => "__builtin_HEXAGON_V6_valignbi",
......@@ -1862,14 +1868,30 @@ fn map_arch_intrinsic(full_name: &str) -> &'static str {
18621868 "V6.vcl0w.128B" => "__builtin_HEXAGON_V6_vcl0w_128B",
18631869 "V6.vcombine" => "__builtin_HEXAGON_V6_vcombine",
18641870 "V6.vcombine.128B" => "__builtin_HEXAGON_V6_vcombine_128B",
1871 "V6.vconv.bf.qf32" => "__builtin_HEXAGON_V6_vconv_bf_qf32",
1872 "V6.vconv.bf.qf32.128B" => "__builtin_HEXAGON_V6_vconv_bf_qf32_128B",
1873 "V6.vconv.f8.qf16" => "__builtin_HEXAGON_V6_vconv_f8_qf16",
1874 "V6.vconv.f8.qf16.128B" => "__builtin_HEXAGON_V6_vconv_f8_qf16_128B",
18651875 "V6.vconv.h.hf" => "__builtin_HEXAGON_V6_vconv_h_hf",
18661876 "V6.vconv.h.hf.128B" => "__builtin_HEXAGON_V6_vconv_h_hf_128B",
1877 "V6.vconv.h.hf.rnd" => "__builtin_HEXAGON_V6_vconv_h_hf_rnd",
1878 "V6.vconv.h.hf.rnd.128B" => "__builtin_HEXAGON_V6_vconv_h_hf_rnd_128B",
18671879 "V6.vconv.hf.h" => "__builtin_HEXAGON_V6_vconv_hf_h",
18681880 "V6.vconv.hf.h.128B" => "__builtin_HEXAGON_V6_vconv_hf_h_128B",
18691881 "V6.vconv.hf.qf16" => "__builtin_HEXAGON_V6_vconv_hf_qf16",
18701882 "V6.vconv.hf.qf16.128B" => "__builtin_HEXAGON_V6_vconv_hf_qf16_128B",
18711883 "V6.vconv.hf.qf32" => "__builtin_HEXAGON_V6_vconv_hf_qf32",
18721884 "V6.vconv.hf.qf32.128B" => "__builtin_HEXAGON_V6_vconv_hf_qf32_128B",
1885 "V6.vconv.qf16.f8" => "__builtin_HEXAGON_V6_vconv_qf16_f8",
1886 "V6.vconv.qf16.f8.128B" => "__builtin_HEXAGON_V6_vconv_qf16_f8_128B",
1887 "V6.vconv.qf16.hf" => "__builtin_HEXAGON_V6_vconv_qf16_hf",
1888 "V6.vconv.qf16.hf.128B" => "__builtin_HEXAGON_V6_vconv_qf16_hf_128B",
1889 "V6.vconv.qf16.qf16" => "__builtin_HEXAGON_V6_vconv_qf16_qf16",
1890 "V6.vconv.qf16.qf16.128B" => "__builtin_HEXAGON_V6_vconv_qf16_qf16_128B",
1891 "V6.vconv.qf32.qf32" => "__builtin_HEXAGON_V6_vconv_qf32_qf32",
1892 "V6.vconv.qf32.qf32.128B" => "__builtin_HEXAGON_V6_vconv_qf32_qf32_128B",
1893 "V6.vconv.qf32.sf" => "__builtin_HEXAGON_V6_vconv_qf32_sf",
1894 "V6.vconv.qf32.sf.128B" => "__builtin_HEXAGON_V6_vconv_qf32_sf_128B",
18731895 "V6.vconv.sf.qf32" => "__builtin_HEXAGON_V6_vconv_sf_qf32",
18741896 "V6.vconv.sf.qf32.128B" => "__builtin_HEXAGON_V6_vconv_sf_qf32_128B",
18751897 "V6.vconv.sf.w" => "__builtin_HEXAGON_V6_vconv_sf_w",
......@@ -1984,6 +2006,22 @@ fn map_arch_intrinsic(full_name: &str) -> &'static str {
19842006 "V6.veqh.or.128B" => "__builtin_HEXAGON_V6_veqh_or_128B",
19852007 "V6.veqh.xor" => "__builtin_HEXAGON_V6_veqh_xor",
19862008 "V6.veqh.xor.128B" => "__builtin_HEXAGON_V6_veqh_xor_128B",
2009 "V6.veqhf" => "__builtin_HEXAGON_V6_veqhf",
2010 "V6.veqhf.128B" => "__builtin_HEXAGON_V6_veqhf_128B",
2011 "V6.veqhf.and" => "__builtin_HEXAGON_V6_veqhf_and",
2012 "V6.veqhf.and.128B" => "__builtin_HEXAGON_V6_veqhf_and_128B",
2013 "V6.veqhf.or" => "__builtin_HEXAGON_V6_veqhf_or",
2014 "V6.veqhf.or.128B" => "__builtin_HEXAGON_V6_veqhf_or_128B",
2015 "V6.veqhf.xor" => "__builtin_HEXAGON_V6_veqhf_xor",
2016 "V6.veqhf.xor.128B" => "__builtin_HEXAGON_V6_veqhf_xor_128B",
2017 "V6.veqsf" => "__builtin_HEXAGON_V6_veqsf",
2018 "V6.veqsf.128B" => "__builtin_HEXAGON_V6_veqsf_128B",
2019 "V6.veqsf.and" => "__builtin_HEXAGON_V6_veqsf_and",
2020 "V6.veqsf.and.128B" => "__builtin_HEXAGON_V6_veqsf_and_128B",
2021 "V6.veqsf.or" => "__builtin_HEXAGON_V6_veqsf_or",
2022 "V6.veqsf.or.128B" => "__builtin_HEXAGON_V6_veqsf_or_128B",
2023 "V6.veqsf.xor" => "__builtin_HEXAGON_V6_veqsf_xor",
2024 "V6.veqsf.xor.128B" => "__builtin_HEXAGON_V6_veqsf_xor_128B",
19872025 "V6.veqw" => "__builtin_HEXAGON_V6_veqw",
19882026 "V6.veqw.128B" => "__builtin_HEXAGON_V6_veqw_128B",
19892027 "V6.veqw.and" => "__builtin_HEXAGON_V6_veqw_and",
......@@ -2096,6 +2134,14 @@ fn map_arch_intrinsic(full_name: &str) -> &'static str {
20962134 "V6.vgtw.or.128B" => "__builtin_HEXAGON_V6_vgtw_or_128B",
20972135 "V6.vgtw.xor" => "__builtin_HEXAGON_V6_vgtw_xor",
20982136 "V6.vgtw.xor.128B" => "__builtin_HEXAGON_V6_vgtw_xor_128B",
2137 "V6.vilog2.hf" => "__builtin_HEXAGON_V6_vilog2_hf",
2138 "V6.vilog2.hf.128B" => "__builtin_HEXAGON_V6_vilog2_hf_128B",
2139 "V6.vilog2.qf16" => "__builtin_HEXAGON_V6_vilog2_qf16",
2140 "V6.vilog2.qf16.128B" => "__builtin_HEXAGON_V6_vilog2_qf16_128B",
2141 "V6.vilog2.qf32" => "__builtin_HEXAGON_V6_vilog2_qf32",
2142 "V6.vilog2.qf32.128B" => "__builtin_HEXAGON_V6_vilog2_qf32_128B",
2143 "V6.vilog2.sf" => "__builtin_HEXAGON_V6_vilog2_sf",
2144 "V6.vilog2.sf.128B" => "__builtin_HEXAGON_V6_vilog2_sf_128B",
20992145 "V6.vinsertwr" => "__builtin_HEXAGON_V6_vinsertwr",
21002146 "V6.vinsertwr.128B" => "__builtin_HEXAGON_V6_vinsertwr_128B",
21012147 "V6.vlalignb" => "__builtin_HEXAGON_V6_vlalignb",
......@@ -2350,6 +2396,14 @@ fn map_arch_intrinsic(full_name: &str) -> &'static str {
23502396 "V6.vnavgub.128B" => "__builtin_HEXAGON_V6_vnavgub_128B",
23512397 "V6.vnavgw" => "__builtin_HEXAGON_V6_vnavgw",
23522398 "V6.vnavgw.128B" => "__builtin_HEXAGON_V6_vnavgw_128B",
2399 "V6.vneg.qf16.hf" => "__builtin_HEXAGON_V6_vneg_qf16_hf",
2400 "V6.vneg.qf16.hf.128B" => "__builtin_HEXAGON_V6_vneg_qf16_hf_128B",
2401 "V6.vneg.qf16.qf16" => "__builtin_HEXAGON_V6_vneg_qf16_qf16",
2402 "V6.vneg.qf16.qf16.128B" => "__builtin_HEXAGON_V6_vneg_qf16_qf16_128B",
2403 "V6.vneg.qf32.qf32" => "__builtin_HEXAGON_V6_vneg_qf32_qf32",
2404 "V6.vneg.qf32.qf32.128B" => "__builtin_HEXAGON_V6_vneg_qf32_qf32_128B",
2405 "V6.vneg.qf32.sf" => "__builtin_HEXAGON_V6_vneg_qf32_sf",
2406 "V6.vneg.qf32.sf.128B" => "__builtin_HEXAGON_V6_vneg_qf32_sf_128B",
23532407 "V6.vnormamth" => "__builtin_HEXAGON_V6_vnormamth",
23542408 "V6.vnormamth.128B" => "__builtin_HEXAGON_V6_vnormamth_128B",
23552409 "V6.vnormamtw" => "__builtin_HEXAGON_V6_vnormamtw",
......@@ -2684,6 +2738,24 @@ fn map_arch_intrinsic(full_name: &str) -> &'static str {
26842738 "iocsrwr.d" => "__builtin_loongarch_iocsrwr_d",
26852739 "iocsrwr.h" => "__builtin_loongarch_iocsrwr_h",
26862740 "iocsrwr.w" => "__builtin_loongarch_iocsrwr_w",
2741 "lasx.cast.128" => "__builtin_lasx_cast_128",
2742 "lasx.cast.128.d" => "__builtin_lasx_cast_128_d",
2743 "lasx.cast.128.s" => "__builtin_lasx_cast_128_s",
2744 "lasx.concat.128" => "__builtin_lasx_concat_128",
2745 "lasx.concat.128.d" => "__builtin_lasx_concat_128_d",
2746 "lasx.concat.128.s" => "__builtin_lasx_concat_128_s",
2747 "lasx.extract.128.hi" => "__builtin_lasx_extract_128_hi",
2748 "lasx.extract.128.hi.d" => "__builtin_lasx_extract_128_hi_d",
2749 "lasx.extract.128.hi.s" => "__builtin_lasx_extract_128_hi_s",
2750 "lasx.extract.128.lo" => "__builtin_lasx_extract_128_lo",
2751 "lasx.extract.128.lo.d" => "__builtin_lasx_extract_128_lo_d",
2752 "lasx.extract.128.lo.s" => "__builtin_lasx_extract_128_lo_s",
2753 "lasx.insert.128.hi" => "__builtin_lasx_insert_128_hi",
2754 "lasx.insert.128.hi.d" => "__builtin_lasx_insert_128_hi_d",
2755 "lasx.insert.128.hi.s" => "__builtin_lasx_insert_128_hi_s",
2756 "lasx.insert.128.lo" => "__builtin_lasx_insert_128_lo",
2757 "lasx.insert.128.lo.d" => "__builtin_lasx_insert_128_lo_d",
2758 "lasx.insert.128.lo.s" => "__builtin_lasx_insert_128_lo_s",
26872759 "lasx.vext2xv.d.b" => "__builtin_lasx_vext2xv_d_b",
26882760 "lasx.vext2xv.d.h" => "__builtin_lasx_vext2xv_d_h",
26892761 "lasx.vext2xv.d.w" => "__builtin_lasx_vext2xv_d_w",
......@@ -4950,8 +5022,20 @@ fn map_arch_intrinsic(full_name: &str) -> &'static str {
49505022 "f16x2.to.e5m2x2.rn.relu" => "__nvvm_f16x2_to_e5m2x2_rn_relu",
49515023 "f2bf16.rn" => "__nvvm_f2bf16_rn",
49525024 "f2bf16.rn.relu" => "__nvvm_f2bf16_rn_relu",
5025 "f2bf16.rn.relu.satfinite" => "__nvvm_f2bf16_rn_relu_satfinite",
5026 "f2bf16.rn.satfinite" => "__nvvm_f2bf16_rn_satfinite",
49535027 "f2bf16.rz" => "__nvvm_f2bf16_rz",
49545028 "f2bf16.rz.relu" => "__nvvm_f2bf16_rz_relu",
5029 "f2bf16.rz.relu.satfinite" => "__nvvm_f2bf16_rz_relu_satfinite",
5030 "f2bf16.rz.satfinite" => "__nvvm_f2bf16_rz_satfinite",
5031 "f2f16.rn" => "__nvvm_f2f16_rn",
5032 "f2f16.rn.relu" => "__nvvm_f2f16_rn_relu",
5033 "f2f16.rn.relu.satfinite" => "__nvvm_f2f16_rn_relu_satfinite",
5034 "f2f16.rn.satfinite" => "__nvvm_f2f16_rn_satfinite",
5035 "f2f16.rz" => "__nvvm_f2f16_rz",
5036 "f2f16.rz.relu" => "__nvvm_f2f16_rz_relu",
5037 "f2f16.rz.relu.satfinite" => "__nvvm_f2f16_rz_relu_satfinite",
5038 "f2f16.rz.satfinite" => "__nvvm_f2f16_rz_satfinite",
49555039 "f2h.rn" => "__nvvm_f2h_rn",
49565040 "f2h.rn.ftz" => "__nvvm_f2h_rn_ftz",
49575041 "f2i.rm" => "__nvvm_f2i_rm",
......@@ -5035,20 +5119,28 @@ fn map_arch_intrinsic(full_name: &str) -> &'static str {
50355119 "ff.to.ue8m0x2.rz.satfinite" => "__nvvm_ff_to_ue8m0x2_rz_satfinite",
50365120 "ff2bf16x2.rn" => "__nvvm_ff2bf16x2_rn",
50375121 "ff2bf16x2.rn.relu" => "__nvvm_ff2bf16x2_rn_relu",
5122 "ff2bf16x2.rn.relu.satfinite" => "__nvvm_ff2bf16x2_rn_relu_satfinite",
5123 "ff2bf16x2.rn.satfinite" => "__nvvm_ff2bf16x2_rn_satfinite",
50385124 "ff2bf16x2.rs" => "__nvvm_ff2bf16x2_rs",
50395125 "ff2bf16x2.rs.relu" => "__nvvm_ff2bf16x2_rs_relu",
50405126 "ff2bf16x2.rs.relu.satfinite" => "__nvvm_ff2bf16x2_rs_relu_satfinite",
50415127 "ff2bf16x2.rs.satfinite" => "__nvvm_ff2bf16x2_rs_satfinite",
50425128 "ff2bf16x2.rz" => "__nvvm_ff2bf16x2_rz",
50435129 "ff2bf16x2.rz.relu" => "__nvvm_ff2bf16x2_rz_relu",
5130 "ff2bf16x2.rz.relu.satfinite" => "__nvvm_ff2bf16x2_rz_relu_satfinite",
5131 "ff2bf16x2.rz.satfinite" => "__nvvm_ff2bf16x2_rz_satfinite",
50445132 "ff2f16x2.rn" => "__nvvm_ff2f16x2_rn",
50455133 "ff2f16x2.rn.relu" => "__nvvm_ff2f16x2_rn_relu",
5134 "ff2f16x2.rn.relu.satfinite" => "__nvvm_ff2f16x2_rn_relu_satfinite",
5135 "ff2f16x2.rn.satfinite" => "__nvvm_ff2f16x2_rn_satfinite",
50465136 "ff2f16x2.rs" => "__nvvm_ff2f16x2_rs",
50475137 "ff2f16x2.rs.relu" => "__nvvm_ff2f16x2_rs_relu",
50485138 "ff2f16x2.rs.relu.satfinite" => "__nvvm_ff2f16x2_rs_relu_satfinite",
50495139 "ff2f16x2.rs.satfinite" => "__nvvm_ff2f16x2_rs_satfinite",
50505140 "ff2f16x2.rz" => "__nvvm_ff2f16x2_rz",
50515141 "ff2f16x2.rz.relu" => "__nvvm_ff2f16x2_rz_relu",
5142 "ff2f16x2.rz.relu.satfinite" => "__nvvm_ff2f16x2_rz_relu_satfinite",
5143 "ff2f16x2.rz.satfinite" => "__nvvm_ff2f16x2_rz_satfinite",
50525144 "floor.d" => "__nvvm_floor_d",
50535145 "floor.f" => "__nvvm_floor_f",
50545146 "floor.ftz.f" => "__nvvm_floor_ftz_f",
......@@ -5942,6 +6034,8 @@ fn map_arch_intrinsic(full_name: &str) -> &'static str {
59426034 "altivec.vupklsb" => "__builtin_altivec_vupklsb",
59436035 "altivec.vupklsh" => "__builtin_altivec_vupklsh",
59446036 "altivec.vupklsw" => "__builtin_altivec_vupklsw",
6037 "amo.ldat" => "__builtin_amo_ldat",
6038 "amo.lwat" => "__builtin_amo_lwat",
59456039 "bcdadd" => "__builtin_ppc_bcdadd",
59466040 "bcdadd.p" => "__builtin_ppc_bcdadd_p",
59476041 "bcdcopysign" => "__builtin_ppc_bcdcopysign",
......@@ -6202,6 +6296,7 @@ fn map_arch_intrinsic(full_name: &str) -> &'static str {
62026296 "vsx.xvminsp" => "__builtin_vsx_xvminsp",
62036297 "vsx.xvredp" => "__builtin_vsx_xvredp",
62046298 "vsx.xvresp" => "__builtin_vsx_xvresp",
6299 "vsx.xvrlw" => "__builtin_vsx_xvrlw",
62056300 "vsx.xvrsqrtedp" => "__builtin_vsx_xvrsqrtedp",
62066301 "vsx.xvrsqrtesp" => "__builtin_vsx_xvrsqrtesp",
62076302 "vsx.xvtdivdp" => "__builtin_vsx_xvtdivdp",
......@@ -10158,24 +10253,16 @@ fn map_arch_intrinsic(full_name: &str) -> &'static str {
1015810253 "stui" => "__builtin_ia32_stui",
1015910254 "subborrow.u32" => "__builtin_ia32_subborrow_u32",
1016010255 "subborrow.u64" => "__builtin_ia32_subborrow_u64",
10161 "t2rpntlvwz0" => "__builtin_ia32_t2rpntlvwz0",
1016210256 "t2rpntlvwz0rs" => "__builtin_ia32_t2rpntlvwz0rs",
1016310257 "t2rpntlvwz0rst1" => "__builtin_ia32_t2rpntlvwz0rst1",
10164 "t2rpntlvwz0t1" => "__builtin_ia32_t2rpntlvwz0t1",
10165 "t2rpntlvwz1" => "__builtin_ia32_t2rpntlvwz1",
1016610258 "t2rpntlvwz1rs" => "__builtin_ia32_t2rpntlvwz1rs",
1016710259 "t2rpntlvwz1rst1" => "__builtin_ia32_t2rpntlvwz1rst1",
10168 "t2rpntlvwz1t1" => "__builtin_ia32_t2rpntlvwz1t1",
1016910260 "tbm.bextri.u32" => "__builtin_ia32_bextri_u32",
1017010261 "tbm.bextri.u64" => "__builtin_ia32_bextri_u64",
1017110262 "tcmmimfp16ps" => "__builtin_ia32_tcmmimfp16ps",
1017210263 "tcmmimfp16ps.internal" => "__builtin_ia32_tcmmimfp16ps_internal",
1017310264 "tcmmrlfp16ps" => "__builtin_ia32_tcmmrlfp16ps",
1017410265 "tcmmrlfp16ps.internal" => "__builtin_ia32_tcmmrlfp16ps_internal",
10175 "tconjtcmmimfp16ps" => "__builtin_ia32_tconjtcmmimfp16ps",
10176 "tconjtcmmimfp16ps.internal" => "__builtin_ia32_tconjtcmmimfp16ps_internal",
10177 "tconjtfp16" => "__builtin_ia32_tconjtfp16",
10178 "tconjtfp16.internal" => "__builtin_ia32_tconjtfp16_internal",
1017910266 "tcvtrowd2ps" => "__builtin_ia32_tcvtrowd2ps",
1018010267 "tcvtrowd2ps.internal" => "__builtin_ia32_tcvtrowd2ps_internal",
1018110268 "tcvtrowps2bf16h" => "__builtin_ia32_tcvtrowps2bf16h",
......@@ -10225,18 +10312,6 @@ fn map_arch_intrinsic(full_name: &str) -> &'static str {
1022510312 "tmmultf32ps" => "__builtin_ia32_tmmultf32ps",
1022610313 "tmmultf32ps.internal" => "__builtin_ia32_tmmultf32ps_internal",
1022710314 "tpause" => "__builtin_ia32_tpause",
10228 "ttcmmimfp16ps" => "__builtin_ia32_ttcmmimfp16ps",
10229 "ttcmmimfp16ps.internal" => "__builtin_ia32_ttcmmimfp16ps_internal",
10230 "ttcmmrlfp16ps" => "__builtin_ia32_ttcmmrlfp16ps",
10231 "ttcmmrlfp16ps.internal" => "__builtin_ia32_ttcmmrlfp16ps_internal",
10232 "ttdpbf16ps" => "__builtin_ia32_ttdpbf16ps",
10233 "ttdpbf16ps.internal" => "__builtin_ia32_ttdpbf16ps_internal",
10234 "ttdpfp16ps" => "__builtin_ia32_ttdpfp16ps",
10235 "ttdpfp16ps.internal" => "__builtin_ia32_ttdpfp16ps_internal",
10236 "ttmmultf32ps" => "__builtin_ia32_ttmmultf32ps",
10237 "ttmmultf32ps.internal" => "__builtin_ia32_ttmmultf32ps_internal",
10238 "ttransposed" => "__builtin_ia32_ttransposed",
10239 "ttransposed.internal" => "__builtin_ia32_ttransposed_internal",
1024010315 "umonitor" => "__builtin_ia32_umonitor",
1024110316 "umwait" => "__builtin_ia32_umwait",
1024210317 "urdmsr" => "__builtin_ia32_urdmsr",
compiler/rustc_codegen_gcc/tests/failing-ui-tests.txt+9
......@@ -88,3 +88,12 @@ tests/ui/test-attrs/test-panic-while-printing.rs
8888tests/ui/thir-print/offset_of.rs
8989tests/ui/iterators/rangefrom-overflow-debug.rs
9090tests/ui/iterators/rangefrom-overflow-overflow-checks.rs
91tests/ui/iterators/iter-filter-count-debug-check.rs
92tests/ui/eii/codegen_single_crate.rs
93tests/ui/eii/codegen_cross_crate.rs
94tests/ui/eii/default/local_crate.rs
95tests/ui/eii/multiple_impls.rs
96tests/ui/eii/default/call_default.rs
97tests/ui/eii/same-symbol.rs
98tests/ui/eii/privacy1.rs
99tests/ui/eii/default/call_impl.rs
compiler/rustc_codegen_gcc/triagebot.toml-3
......@@ -2,6 +2,3 @@
22
33# Prevents un-canonicalized issue links (to avoid wrong issues being linked in r-l/rust)
44[issue-links]
5
6# Prevents mentions in commits to avoid users being spammed
7[no-mentions]