authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-07-21 23:39:18+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-07-23 21:14:19+02:00
log0473457b6818a2c5055465a82baca34fee726136
tree61735874c137adbf3a77625f7db1bcceb0b5f02b
parentc631110f5c664a26520e59d7cec7585156cb5e7f
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

std.os.linux.tls: Set some constants correctly for powerpcle.

1 files changed, 3 insertions(+), 3 deletions(-)

lib/std/os/linux/tls.zig+3-3
...@@ -81,7 +81,7 @@ const tls_tcb_size = switch (native_arch) {...@@ -81,7 +81,7 @@ const tls_tcb_size = switch (native_arch) {
8181
82// Controls if the TP points to the end of the TCB instead of its beginning82// Controls if the TP points to the end of the TCB instead of its beginning
83const tls_tp_points_past_tcb = switch (native_arch) {83const tls_tp_points_past_tcb = switch (native_arch) {
84 .riscv32, .riscv64, .mips, .mipsel, .mips64, .mips64el, .powerpc, .powerpc64, .powerpc64le => true,84 .riscv32, .riscv64, .mips, .mipsel, .mips64, .mips64el, .powerpc, .powerpcle, .powerpc64, .powerpc64le => true,
85 else => false,85 else => false,
86};86};
8787
...@@ -89,12 +89,12 @@ const tls_tp_points_past_tcb = switch (native_arch) {...@@ -89,12 +89,12 @@ const tls_tp_points_past_tcb = switch (native_arch) {
89// make the generated code more efficient89// make the generated code more efficient
9090
91const tls_tp_offset = switch (native_arch) {91const tls_tp_offset = switch (native_arch) {
92 .mips, .mipsel, .mips64, .mips64el, .powerpc, .powerpc64, .powerpc64le => 0x7000,92 .mips, .mipsel, .mips64, .mips64el, .powerpc, .powerpcle, .powerpc64, .powerpc64le => 0x7000,
93 else => 0,93 else => 0,
94};94};
9595
96const tls_dtv_offset = switch (native_arch) {96const tls_dtv_offset = switch (native_arch) {
97 .mips, .mipsel, .mips64, .mips64el, .powerpc, .powerpc64, .powerpc64le => 0x8000,97 .mips, .mipsel, .mips64, .mips64el, .powerpc, .powerpcle, .powerpc64, .powerpc64le => 0x8000,
98 .riscv32, .riscv64 => 0x800,98 .riscv32, .riscv64 => 0x800,
99 else => 0,99 else => 0,
100};100};