| author | |
| committer | |
| log | 0879cbeed262415645fe388e1991c7df866f7064 |
| tree | d4cf3f46f70bca8fc0f781f72af07490fbb6fe3f |
| parent | ae16c1d0835b517cb858cb9615888cdab1e351c5 |
6 files changed, 5 insertions(+), 9 deletions(-)
lib/std/os/plan9.zig+1-1| ... | ... | @@ -1,7 +1,7 @@ |
| 1 | 1 | const std = @import("../std.zig"); |
| 2 | 2 | const builtin = @import("builtin"); |
| 3 | 3 | |
| 4 | pub const syscall_bits = switch (builtin.stage2_arch) { | |
| 4 | pub const syscall_bits = switch (builtin.cpu.arch) { | |
| 5 | 5 | .x86_64 => @import("plan9/x86_64.zig"), |
| 6 | 6 | else => @compileError("more plan9 syscall implementations (needs more inline asm in stage2"), |
| 7 | 7 | }; |
lib/std/start.zig+2-2| ... | ... | @@ -131,7 +131,7 @@ fn wWinMainCRTStartup2() callconv(.C) noreturn { |
| 131 | 131 | |
| 132 | 132 | fn exit2(code: usize) noreturn { |
| 133 | 133 | switch (native_os) { |
| 134 | .linux => switch (builtin.stage2_arch) { | |
| 134 | .linux => switch (builtin.cpu.arch) { | |
| 135 | 135 | .x86_64 => { |
| 136 | 136 | asm volatile ("syscall" |
| 137 | 137 | : |
| ... | ... | @@ -175,7 +175,7 @@ fn exit2(code: usize) noreturn { |
| 175 | 175 | else => @compileError("TODO"), |
| 176 | 176 | }, |
| 177 | 177 | // exits(0) |
| 178 | .plan9 => switch (builtin.stage2_arch) { | |
| 178 | .plan9 => switch (builtin.cpu.arch) { | |
| 179 | 179 | .x86_64 => { |
| 180 | 180 | asm volatile ( |
| 181 | 181 | \\push $0 |
src/Compilation.zig-3| ... | ... | @@ -4763,8 +4763,6 @@ pub fn generateBuiltinZigSource(comp: *Compilation, allocator: Allocator) Alloca |
| 4763 | 4763 | \\/// feature detection (i.e. with `@hasDecl` or `@hasField`) over version checks. |
| 4764 | 4764 | \\pub const zig_version = std.SemanticVersion.parse("{s}") catch unreachable; |
| 4765 | 4765 | \\pub const zig_backend = std.builtin.CompilerBackend.{}; |
| 4766 | \\/// Temporary until self-hosted supports the `cpu.arch` value. | |
| 4767 | \\pub const stage2_arch: std.Target.Cpu.Arch = .{}; | |
| 4768 | 4766 | \\ |
| 4769 | 4767 | \\pub const output_mode = std.builtin.OutputMode.{}; |
| 4770 | 4768 | \\pub const link_mode = std.builtin.LinkMode.{}; |
| ... | ... | @@ -4779,7 +4777,6 @@ pub fn generateBuiltinZigSource(comp: *Compilation, allocator: Allocator) Alloca |
| 4779 | 4777 | , .{ |
| 4780 | 4778 | build_options.version, |
| 4781 | 4779 | std.zig.fmtId(@tagName(zig_backend)), |
| 4782 | std.zig.fmtId(@tagName(target.cpu.arch)), | |
| 4783 | 4780 | std.zig.fmtId(@tagName(comp.bin_file.options.output_mode)), |
| 4784 | 4781 | std.zig.fmtId(@tagName(comp.bin_file.options.link_mode)), |
| 4785 | 4782 | comp.bin_file.options.is_test, |
src/stage1/codegen.cpp-1| ... | ... | @@ -10076,7 +10076,6 @@ Buf *codegen_generate_builtin_source(CodeGen *g) { |
| 10076 | 10076 | buf_appendf(contents, "pub const single_threaded = %s;\n", bool_to_str(g->is_single_threaded)); |
| 10077 | 10077 | buf_appendf(contents, "pub const abi = std.Target.Abi.%s;\n", cur_abi); |
| 10078 | 10078 | buf_appendf(contents, "pub const cpu = std.Target.Cpu.baseline(.%s);\n", cur_arch); |
| 10079 | buf_appendf(contents, "pub const stage2_arch: std.Target.Cpu.Arch = .%s;\n", cur_arch); | |
| 10080 | 10079 | buf_appendf(contents, "pub const os = std.Target.Os.Tag.defaultVersionRange(.%s, .%s);\n", cur_os, cur_arch); |
| 10081 | 10080 | buf_appendf(contents, |
| 10082 | 10081 | "pub const target = std.Target{\n" |
test/behavior.zig+1-1| ... | ... | @@ -159,7 +159,7 @@ test { |
| 159 | 159 | _ = @import("behavior/while.zig"); |
| 160 | 160 | _ = @import("behavior/widening.zig"); |
| 161 | 161 | |
| 162 | if (builtin.stage2_arch == .wasm32) { | |
| 162 | if (builtin.cpu.arch == .wasm32) { | |
| 163 | 163 | _ = @import("behavior/wasm.zig"); |
| 164 | 164 | } |
| 165 | 165 |
test/behavior/struct.zig+1-1| ... | ... | @@ -963,7 +963,7 @@ test "tuple assigned to variable" { |
| 963 | 963 | |
| 964 | 964 | test "comptime struct field" { |
| 965 | 965 | if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO |
| 966 | if (builtin.stage2_arch == .arm) return error.SkipZigTest; // TODO | |
| 966 | if (builtin.cpu.arch == .arm) return error.SkipZigTest; // TODO | |
| 967 | 967 | |
| 968 | 968 | const T = struct { |
| 969 | 969 | a: i32, |