| ... | @@ -2557,7 +2557,6 @@ static IrInstSrc *ir_build_reset_result(Stage1AstGen *ag, Scope *scope, AstNode | ... | @@ -2557,7 +2557,6 @@ static IrInstSrc *ir_build_reset_result(Stage1AstGen *ag, Scope *scope, AstNode |
| 2557 | { | 2557 | { |
| 2558 | IrInstSrcResetResult *instruction = ir_build_instruction<IrInstSrcResetResult>(ag, scope, source_node); | 2558 | IrInstSrcResetResult *instruction = ir_build_instruction<IrInstSrcResetResult>(ag, scope, source_node); |
| 2559 | instruction->result_loc = result_loc; | 2559 | instruction->result_loc = result_loc; |
| 2560 | instruction->base.is_gen = true; | | |
| 2561 | | 2560 | |
| 2562 | return &instruction->base; | 2561 | return &instruction->base; |
| 2563 | } | 2562 | } |
| ... | @@ -2737,7 +2736,6 @@ static IrInstSrc *ir_build_alloca_src(Stage1AstGen *ag, Scope *scope, AstNode *s | ... | @@ -2737,7 +2736,6 @@ static IrInstSrc *ir_build_alloca_src(Stage1AstGen *ag, Scope *scope, AstNode *s |
| 2737 | IrInstSrc *align, const char *name_hint, IrInstSrc *is_comptime) | 2736 | IrInstSrc *align, const char *name_hint, IrInstSrc *is_comptime) |
| 2738 | { | 2737 | { |
| 2739 | IrInstSrcAlloca *instruction = ir_build_instruction<IrInstSrcAlloca>(ag, scope, source_node); | 2738 | IrInstSrcAlloca *instruction = ir_build_instruction<IrInstSrcAlloca>(ag, scope, source_node); |
| 2740 | instruction->base.is_gen = true; | | |
| 2741 | instruction->align = align; | 2739 | instruction->align = align; |
| 2742 | instruction->name_hint = name_hint; | 2740 | instruction->name_hint = name_hint; |
| 2743 | instruction->is_comptime = is_comptime; | 2741 | instruction->is_comptime = is_comptime; |
| ... | @@ -2752,7 +2750,6 @@ static IrInstSrc *ir_build_end_expr(Stage1AstGen *ag, Scope *scope, AstNode *sou | ... | @@ -2752,7 +2750,6 @@ static IrInstSrc *ir_build_end_expr(Stage1AstGen *ag, Scope *scope, AstNode *sou |
| 2752 | IrInstSrc *value, ResultLoc *result_loc) | 2750 | IrInstSrc *value, ResultLoc *result_loc) |
| 2753 | { | 2751 | { |
| 2754 | IrInstSrcEndExpr *instruction = ir_build_instruction<IrInstSrcEndExpr>(ag, scope, source_node); | 2752 | IrInstSrcEndExpr *instruction = ir_build_instruction<IrInstSrcEndExpr>(ag, scope, source_node); |
| 2755 | instruction->base.is_gen = true; | | |
| 2756 | instruction->value = value; | 2753 | instruction->value = value; |
| 2757 | instruction->result_loc = result_loc; | 2754 | instruction->result_loc = result_loc; |
| 2758 | | 2755 | |
| ... | @@ -2885,11 +2882,6 @@ static void ir_count_defers(Stage1AstGen *ag, Scope *inner_scope, Scope *outer_s | ... | @@ -2885,11 +2882,6 @@ static void ir_count_defers(Stage1AstGen *ag, Scope *inner_scope, Scope *outer_s |
| 2885 | } | 2882 | } |
| 2886 | } | 2883 | } |
| 2887 | | 2884 | |
| 2888 | static IrInstSrc *ir_mark_gen(IrInstSrc *instruction) { | | |
| 2889 | instruction->is_gen = true; | | |
| 2890 | return instruction; | | |
| 2891 | } | | |
| 2892 | | | |
| 2893 | static bool astgen_defers_for_block(Stage1AstGen *ag, Scope *inner_scope, Scope *outer_scope, bool *is_noreturn, IrInstSrc *err_value) { | 2885 | static bool astgen_defers_for_block(Stage1AstGen *ag, Scope *inner_scope, Scope *outer_scope, bool *is_noreturn, IrInstSrc *err_value) { |
| 2894 | Scope *scope = inner_scope; | 2886 | Scope *scope = inner_scope; |
| 2895 | if (is_noreturn != nullptr) *is_noreturn = false; | 2887 | if (is_noreturn != nullptr) *is_noreturn = false; |
| ... | @@ -2948,8 +2940,8 @@ static bool astgen_defers_for_block(Stage1AstGen *ag, Scope *inner_scope, Scope | ... | @@ -2948,8 +2940,8 @@ static bool astgen_defers_for_block(Stage1AstGen *ag, Scope *inner_scope, Scope |
| 2948 | if (defer_expr_value->is_noreturn) { | 2940 | if (defer_expr_value->is_noreturn) { |
| 2949 | if (is_noreturn != nullptr) *is_noreturn = true; | 2941 | if (is_noreturn != nullptr) *is_noreturn = true; |
| 2950 | } else { | 2942 | } else { |
| 2951 | ir_mark_gen(ir_build_check_statement_is_void(ag, defer_expr_scope, defer_expr_node, | 2943 | ir_build_check_statement_is_void(ag, defer_expr_scope, defer_expr_node, |
| 2952 | defer_expr_value)); | 2944 | defer_expr_value); |
| 2953 | } | 2945 | } |
| 2954 | scope = scope->parent; | 2946 | scope = scope->parent; |
| 2955 | continue; | 2947 | continue; |
| ... | @@ -3047,7 +3039,7 @@ static IrInstSrc *astgen_return(Stage1AstGen *ag, Scope *scope, AstNode *node, L | ... | @@ -3047,7 +3039,7 @@ static IrInstSrc *astgen_return(Stage1AstGen *ag, Scope *scope, AstNode *node, L |
| 3047 | ir_build_end_expr(ag, scope, node, return_value, &result_loc_ret->base); | 3039 | ir_build_end_expr(ag, scope, node, return_value, &result_loc_ret->base); |
| 3048 | } | 3040 | } |
| 3049 | | 3041 | |
| 3050 | ir_mark_gen(ir_build_add_implicit_return_type(ag, scope, node, return_value, result_loc_ret)); | 3042 | ir_build_add_implicit_return_type(ag, scope, node, return_value, result_loc_ret); |
| 3051 | | 3043 | |
| 3052 | size_t defer_counts[2]; | 3044 | size_t defer_counts[2]; |
| 3053 | ir_count_defers(ag, scope, outer_scope, defer_counts); | 3045 | ir_count_defers(ag, scope, outer_scope, defer_counts); |
| ... | @@ -3074,7 +3066,7 @@ static IrInstSrc *astgen_return(Stage1AstGen *ag, Scope *scope, AstNode *node, L | ... | @@ -3074,7 +3066,7 @@ static IrInstSrc *astgen_return(Stage1AstGen *ag, Scope *scope, AstNode *node, L |
| 3074 | is_comptime = ir_build_test_comptime(ag, scope, node, is_err); | 3066 | is_comptime = ir_build_test_comptime(ag, scope, node, is_err); |
| 3075 | } | 3067 | } |
| 3076 | | 3068 | |
| 3077 | ir_mark_gen(ir_build_cond_br(ag, scope, node, is_err, err_block, ok_block, is_comptime)); | 3069 | ir_build_cond_br(ag, scope, node, is_err, err_block, ok_block, is_comptime); |
| 3078 | Stage1ZirBasicBlock *ret_stmt_block = ir_create_basic_block(ag, scope, "RetStmt"); | 3070 | Stage1ZirBasicBlock *ret_stmt_block = ir_create_basic_block(ag, scope, "RetStmt"); |
| 3079 | | 3071 | |
| 3080 | ir_set_cursor_at_end_and_append_block(ag, err_block); | 3072 | ir_set_cursor_at_end_and_append_block(ag, err_block); |
| ... | @@ -3112,12 +3104,12 @@ static IrInstSrc *astgen_return(Stage1AstGen *ag, Scope *scope, AstNode *node, L | ... | @@ -3112,12 +3104,12 @@ static IrInstSrc *astgen_return(Stage1AstGen *ag, Scope *scope, AstNode *node, L |
| 3112 | } else { | 3104 | } else { |
| 3113 | is_comptime = ir_build_test_comptime(ag, scope, node, is_err_val); | 3105 | is_comptime = ir_build_test_comptime(ag, scope, node, is_err_val); |
| 3114 | } | 3106 | } |
| 3115 | ir_mark_gen(ir_build_cond_br(ag, scope, node, is_err_val, return_block, continue_block, is_comptime)); | 3107 | ir_build_cond_br(ag, scope, node, is_err_val, return_block, continue_block, is_comptime); |
| 3116 | | 3108 | |
| 3117 | ir_set_cursor_at_end_and_append_block(ag, return_block); | 3109 | ir_set_cursor_at_end_and_append_block(ag, return_block); |
| 3118 | IrInstSrc *err_val_ptr = ir_build_unwrap_err_code_src(ag, scope, node, err_union_ptr); | 3110 | IrInstSrc *err_val_ptr = ir_build_unwrap_err_code_src(ag, scope, node, err_union_ptr); |
| 3119 | IrInstSrc *err_val = ir_build_load_ptr(ag, scope, node, err_val_ptr); | 3111 | IrInstSrc *err_val = ir_build_load_ptr(ag, scope, node, err_val_ptr); |
| 3120 | ir_mark_gen(ir_build_add_implicit_return_type(ag, scope, node, err_val, nullptr)); | 3112 | ir_build_add_implicit_return_type(ag, scope, node, err_val, nullptr); |
| 3121 | IrInstSrcSpillBegin *spill_begin = ir_build_spill_begin_src(ag, scope, node, err_val, | 3113 | IrInstSrcSpillBegin *spill_begin = ir_build_spill_begin_src(ag, scope, node, err_val, |
| 3122 | SpillIdRetErrCode); | 3114 | SpillIdRetErrCode); |
| 3123 | ResultLocReturn *result_loc_ret = heap::c_allocator.create<ResultLocReturn>(); | 3115 | ResultLocReturn *result_loc_ret = heap::c_allocator.create<ResultLocReturn>(); |
| ... | @@ -3338,7 +3330,7 @@ static IrInstSrc *astgen_block(Stage1AstGen *ag, Scope *parent_scope, AstNode *b | ... | @@ -3338,7 +3330,7 @@ static IrInstSrc *astgen_block(Stage1AstGen *ag, Scope *parent_scope, AstNode *b |
| 3338 | child_scope = decl_var_instruction->var->child_scope; | 3330 | child_scope = decl_var_instruction->var->child_scope; |
| 3339 | } else if (!is_continuation_unreachable) { | 3331 | } else if (!is_continuation_unreachable) { |
| 3340 | // this statement's value must be void | 3332 | // this statement's value must be void |
| 3341 | ir_mark_gen(ir_build_check_statement_is_void(ag, child_scope, statement_node, statement_value)); | 3333 | ir_build_check_statement_is_void(ag, child_scope, statement_node, statement_value); |
| 3342 | } | 3334 | } |
| 3343 | } | 3335 | } |
| 3344 | | 3336 | |
| ... | @@ -3364,7 +3356,7 @@ static IrInstSrc *astgen_block(Stage1AstGen *ag, Scope *parent_scope, AstNode *b | ... | @@ -3364,7 +3356,7 @@ static IrInstSrc *astgen_block(Stage1AstGen *ag, Scope *parent_scope, AstNode *b |
| 3364 | return ir_expr_wrap(ag, parent_scope, phi, result_loc); | 3356 | return ir_expr_wrap(ag, parent_scope, phi, result_loc); |
| 3365 | } else { | 3357 | } else { |
| 3366 | incoming_blocks.append(ag->current_basic_block); | 3358 | incoming_blocks.append(ag->current_basic_block); |
| 3367 | IrInstSrc *else_expr_result = ir_mark_gen(ir_build_const_void(ag, parent_scope, block_node)); | 3359 | IrInstSrc *else_expr_result = ir_build_const_void(ag, parent_scope, block_node); |
| 3368 | | 3360 | |
| 3369 | if (scope_block->peer_parent != nullptr) { | 3361 | if (scope_block->peer_parent != nullptr) { |
| 3370 | ResultLocPeer *peer_result = create_peer_result(scope_block->peer_parent); | 3362 | ResultLocPeer *peer_result = create_peer_result(scope_block->peer_parent); |
| ... | @@ -3387,13 +3379,13 @@ static IrInstSrc *astgen_block(Stage1AstGen *ag, Scope *parent_scope, AstNode *b | ... | @@ -3387,13 +3379,13 @@ static IrInstSrc *astgen_block(Stage1AstGen *ag, Scope *parent_scope, AstNode *b |
| 3387 | | 3379 | |
| 3388 | IrInstSrc *result; | 3380 | IrInstSrc *result; |
| 3389 | if (block_node->data.block.name != nullptr) { | 3381 | if (block_node->data.block.name != nullptr) { |
| 3390 | ir_mark_gen(ir_build_br(ag, parent_scope, block_node, scope_block->end_block, scope_block->is_comptime)); | 3382 | ir_build_br(ag, parent_scope, block_node, scope_block->end_block, scope_block->is_comptime); |
| 3391 | ir_set_cursor_at_end_and_append_block(ag, scope_block->end_block); | 3383 | ir_set_cursor_at_end_and_append_block(ag, scope_block->end_block); |
| 3392 | IrInstSrc *phi = ir_build_phi(ag, parent_scope, block_node, incoming_blocks.length, | 3384 | IrInstSrc *phi = ir_build_phi(ag, parent_scope, block_node, incoming_blocks.length, |
| 3393 | incoming_blocks.items, incoming_values.items, scope_block->peer_parent); | 3385 | incoming_blocks.items, incoming_values.items, scope_block->peer_parent); |
| 3394 | result = ir_expr_wrap(ag, parent_scope, phi, result_loc); | 3386 | result = ir_expr_wrap(ag, parent_scope, phi, result_loc); |
| 3395 | } else { | 3387 | } else { |
| 3396 | IrInstSrc *void_inst = ir_mark_gen(ir_build_const_void(ag, child_scope, block_node)); | 3388 | IrInstSrc *void_inst = ir_build_const_void(ag, child_scope, block_node); |
| 3397 | result = ir_lval_wrap(ag, parent_scope, void_inst, lval, result_loc); | 3389 | result = ir_lval_wrap(ag, parent_scope, void_inst, lval, result_loc); |
| 3398 | } | 3390 | } |
| 3399 | if (!is_return_from_fn) | 3391 | if (!is_return_from_fn) |
| ... | @@ -3402,14 +3394,14 @@ static IrInstSrc *astgen_block(Stage1AstGen *ag, Scope *parent_scope, AstNode *b | ... | @@ -3402,14 +3394,14 @@ static IrInstSrc *astgen_block(Stage1AstGen *ag, Scope *parent_scope, AstNode *b |
| 3402 | // no need for save_err_ret_addr because this cannot return error | 3394 | // no need for save_err_ret_addr because this cannot return error |
| 3403 | // only generate unconditional defers | 3395 | // only generate unconditional defers |
| 3404 | | 3396 | |
| 3405 | ir_mark_gen(ir_build_add_implicit_return_type(ag, child_scope, block_node, result, nullptr)); | 3397 | ir_build_add_implicit_return_type(ag, child_scope, block_node, result, nullptr); |
| 3406 | ResultLocReturn *result_loc_ret = heap::c_allocator.create<ResultLocReturn>(); | 3398 | ResultLocReturn *result_loc_ret = heap::c_allocator.create<ResultLocReturn>(); |
| 3407 | result_loc_ret->base.id = ResultLocIdReturn; | 3399 | result_loc_ret->base.id = ResultLocIdReturn; |
| 3408 | ir_build_reset_result(ag, parent_scope, block_node, &result_loc_ret->base); | 3400 | ir_build_reset_result(ag, parent_scope, block_node, &result_loc_ret->base); |
| 3409 | ir_mark_gen(ir_build_end_expr(ag, parent_scope, block_node, result, &result_loc_ret->base)); | 3401 | ir_build_end_expr(ag, parent_scope, block_node, result, &result_loc_ret->base); |
| 3410 | if (!astgen_defers_for_block(ag, child_scope, outer_block_scope, nullptr, nullptr)) | 3402 | if (!astgen_defers_for_block(ag, child_scope, outer_block_scope, nullptr, nullptr)) |
| 3411 | return ag->codegen->invalid_inst_src; | 3403 | return ag->codegen->invalid_inst_src; |
| 3412 | return ir_mark_gen(ir_build_return_src(ag, child_scope, result->base.source_node, result)); | 3404 | return ir_build_return_src(ag, child_scope, result->base.source_node, result); |
| 3413 | } | 3405 | } |
| 3414 | | 3406 | |
| 3415 | static IrInstSrc *astgen_bin_op_id(Stage1AstGen *ag, Scope *scope, AstNode *node, IrBinOp op_id) { | 3407 | static IrInstSrc *astgen_bin_op_id(Stage1AstGen *ag, Scope *scope, AstNode *node, IrBinOp op_id) { |
| ... | @@ -3628,7 +3620,7 @@ static IrInstSrc *astgen_orelse(Stage1AstGen *ag, Scope *parent_scope, AstNode * | ... | @@ -3628,7 +3620,7 @@ static IrInstSrc *astgen_orelse(Stage1AstGen *ag, Scope *parent_scope, AstNode * |
| 3628 | return ag->codegen->invalid_inst_src; | 3620 | return ag->codegen->invalid_inst_src; |
| 3629 | Stage1ZirBasicBlock *after_null_block = ag->current_basic_block; | 3621 | Stage1ZirBasicBlock *after_null_block = ag->current_basic_block; |
| 3630 | if (!instr_is_unreachable(null_result)) | 3622 | if (!instr_is_unreachable(null_result)) |
| 3631 | ir_mark_gen(ir_build_br(ag, parent_scope, node, end_block, is_comptime)); | 3623 | ir_build_br(ag, parent_scope, node, end_block, is_comptime); |
| 3632 | | 3624 | |
| 3633 | ir_set_cursor_at_end_and_append_block(ag, ok_block); | 3625 | ir_set_cursor_at_end_and_append_block(ag, ok_block); |
| 3634 | IrInstSrc *unwrapped_ptr = ir_build_optional_unwrap_ptr(ag, parent_scope, node, maybe_ptr, false); | 3626 | IrInstSrc *unwrapped_ptr = ir_build_optional_unwrap_ptr(ag, parent_scope, node, maybe_ptr, false); |
| ... | @@ -5395,7 +5387,7 @@ static IrInstSrc *astgen_if_bool_expr(Stage1AstGen *ag, Scope *scope, AstNode *n | ... | @@ -5395,7 +5387,7 @@ static IrInstSrc *astgen_if_bool_expr(Stage1AstGen *ag, Scope *scope, AstNode *n |
| 5395 | return ag->codegen->invalid_inst_src; | 5387 | return ag->codegen->invalid_inst_src; |
| 5396 | Stage1ZirBasicBlock *after_then_block = ag->current_basic_block; | 5388 | Stage1ZirBasicBlock *after_then_block = ag->current_basic_block; |
| 5397 | if (!instr_is_unreachable(then_expr_result)) | 5389 | if (!instr_is_unreachable(then_expr_result)) |
| 5398 | ir_mark_gen(ir_build_br(ag, scope, node, endif_block, is_comptime)); | 5390 | ir_build_br(ag, scope, node, endif_block, is_comptime); |
| 5399 | | 5391 | |
| 5400 | ir_set_cursor_at_end_and_append_block(ag, else_block); | 5392 | ir_set_cursor_at_end_and_append_block(ag, else_block); |
| 5401 | IrInstSrc *else_expr_result; | 5393 | IrInstSrc *else_expr_result; |
| ... | @@ -5409,7 +5401,7 @@ static IrInstSrc *astgen_if_bool_expr(Stage1AstGen *ag, Scope *scope, AstNode *n | ... | @@ -5409,7 +5401,7 @@ static IrInstSrc *astgen_if_bool_expr(Stage1AstGen *ag, Scope *scope, AstNode *n |
| 5409 | } | 5401 | } |
| 5410 | Stage1ZirBasicBlock *after_else_block = ag->current_basic_block; | 5402 | Stage1ZirBasicBlock *after_else_block = ag->current_basic_block; |
| 5411 | if (!instr_is_unreachable(else_expr_result)) | 5403 | if (!instr_is_unreachable(else_expr_result)) |
| 5412 | ir_mark_gen(ir_build_br(ag, scope, node, endif_block, is_comptime)); | 5404 | ir_build_br(ag, scope, node, endif_block, is_comptime); |
| 5413 | | 5405 | |
| 5414 | ir_set_cursor_at_end_and_append_block(ag, endif_block); | 5406 | ir_set_cursor_at_end_and_append_block(ag, endif_block); |
| 5415 | IrInstSrc **incoming_values = heap::c_allocator.allocate<IrInstSrc *>(2); | 5407 | IrInstSrc **incoming_values = heap::c_allocator.allocate<IrInstSrc *>(2); |
| ... | @@ -5954,12 +5946,11 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod | ... | @@ -5954,12 +5946,11 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod |
| 5954 | IrInstSrc *is_err = ir_build_test_err_src(ag, scope, node->data.while_expr.condition, err_val_ptr, | 5946 | IrInstSrc *is_err = ir_build_test_err_src(ag, scope, node->data.while_expr.condition, err_val_ptr, |
| 5955 | true, false); | 5947 | true, false); |
| 5956 | Stage1ZirBasicBlock *after_cond_block = ag->current_basic_block; | 5948 | Stage1ZirBasicBlock *after_cond_block = ag->current_basic_block; |
| 5957 | IrInstSrc *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(ag, scope, node)); | 5949 | IrInstSrc *void_else_result = else_node ? nullptr : ir_build_const_void(ag, scope, node); |
| 5958 | IrInstSrc *cond_br_inst; | 5950 | IrInstSrc *cond_br_inst; |
| 5959 | if (!instr_is_unreachable(is_err)) { | 5951 | if (!instr_is_unreachable(is_err)) { |
| 5960 | cond_br_inst = ir_build_cond_br(ag, scope, node->data.while_expr.condition, is_err, | 5952 | cond_br_inst = ir_build_cond_br(ag, scope, node->data.while_expr.condition, is_err, |
| 5961 | else_block, body_block, is_comptime); | 5953 | else_block, body_block, is_comptime); |
| 5962 | cond_br_inst->is_gen = true; | | |
| 5963 | } else { | 5954 | } else { |
| 5964 | // for the purposes of the source instruction to ir_build_result_peers | 5955 | // for the purposes of the source instruction to ir_build_result_peers |
| 5965 | cond_br_inst = ag->current_basic_block->instruction_list.last(); | 5956 | cond_br_inst = ag->current_basic_block->instruction_list.last(); |
| ... | @@ -6005,8 +5996,8 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod | ... | @@ -6005,8 +5996,8 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod |
| 6005 | } | 5996 | } |
| 6006 | | 5997 | |
| 6007 | if (!instr_is_unreachable(body_result)) { | 5998 | if (!instr_is_unreachable(body_result)) { |
| 6008 | ir_mark_gen(ir_build_check_statement_is_void(ag, payload_scope, node->data.while_expr.body, body_result)); | 5999 | ir_build_check_statement_is_void(ag, payload_scope, node->data.while_expr.body, body_result); |
| 6009 | ir_mark_gen(ir_build_br(ag, payload_scope, node, continue_block, is_comptime)); | 6000 | ir_build_br(ag, payload_scope, node, continue_block, is_comptime); |
| 6010 | } | 6001 | } |
| 6011 | | 6002 | |
| 6012 | if (continue_expr_node) { | 6003 | if (continue_expr_node) { |
| ... | @@ -6015,8 +6006,8 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod | ... | @@ -6015,8 +6006,8 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod |
| 6015 | if (expr_result == ag->codegen->invalid_inst_src) | 6006 | if (expr_result == ag->codegen->invalid_inst_src) |
| 6016 | return expr_result; | 6007 | return expr_result; |
| 6017 | if (!instr_is_unreachable(expr_result)) { | 6008 | if (!instr_is_unreachable(expr_result)) { |
| 6018 | ir_mark_gen(ir_build_check_statement_is_void(ag, payload_scope, continue_expr_node, expr_result)); | 6009 | ir_build_check_statement_is_void(ag, payload_scope, continue_expr_node, expr_result); |
| 6019 | ir_mark_gen(ir_build_br(ag, payload_scope, node, cond_block, is_comptime)); | 6010 | ir_build_br(ag, payload_scope, node, cond_block, is_comptime); |
| 6020 | } | 6011 | } |
| 6021 | } | 6012 | } |
| 6022 | | 6013 | |
| ... | @@ -6041,7 +6032,7 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod | ... | @@ -6041,7 +6032,7 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod |
| 6041 | if (else_result == ag->codegen->invalid_inst_src) | 6032 | if (else_result == ag->codegen->invalid_inst_src) |
| 6042 | return else_result; | 6033 | return else_result; |
| 6043 | if (!instr_is_unreachable(else_result)) | 6034 | if (!instr_is_unreachable(else_result)) |
| 6044 | ir_mark_gen(ir_build_br(ag, scope, node, end_block, is_comptime)); | 6035 | ir_build_br(ag, scope, node, end_block, is_comptime); |
| 6045 | Stage1ZirBasicBlock *after_else_block = ag->current_basic_block; | 6036 | Stage1ZirBasicBlock *after_else_block = ag->current_basic_block; |
| 6046 | ir_set_cursor_at_end_and_append_block(ag, end_block); | 6037 | ir_set_cursor_at_end_and_append_block(ag, end_block); |
| 6047 | if (else_result) { | 6038 | if (else_result) { |
| ... | @@ -6075,12 +6066,11 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod | ... | @@ -6075,12 +6066,11 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod |
| 6075 | IrInstSrc *maybe_val = ir_build_load_ptr(ag, scope, node->data.while_expr.condition, maybe_val_ptr); | 6066 | IrInstSrc *maybe_val = ir_build_load_ptr(ag, scope, node->data.while_expr.condition, maybe_val_ptr); |
| 6076 | IrInstSrc *is_non_null = ir_build_test_non_null_src(ag, scope, node->data.while_expr.condition, maybe_val); | 6067 | IrInstSrc *is_non_null = ir_build_test_non_null_src(ag, scope, node->data.while_expr.condition, maybe_val); |
| 6077 | Stage1ZirBasicBlock *after_cond_block = ag->current_basic_block; | 6068 | Stage1ZirBasicBlock *after_cond_block = ag->current_basic_block; |
| 6078 | IrInstSrc *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(ag, scope, node)); | 6069 | IrInstSrc *void_else_result = else_node ? nullptr : ir_build_const_void(ag, scope, node); |
| 6079 | IrInstSrc *cond_br_inst; | 6070 | IrInstSrc *cond_br_inst; |
| 6080 | if (!instr_is_unreachable(is_non_null)) { | 6071 | if (!instr_is_unreachable(is_non_null)) { |
| 6081 | cond_br_inst = ir_build_cond_br(ag, scope, node->data.while_expr.condition, is_non_null, | 6072 | cond_br_inst = ir_build_cond_br(ag, scope, node->data.while_expr.condition, is_non_null, |
| 6082 | body_block, else_block, is_comptime); | 6073 | body_block, else_block, is_comptime); |
| 6083 | cond_br_inst->is_gen = true; | | |
| 6084 | } else { | 6074 | } else { |
| 6085 | // for the purposes of the source instruction to ir_build_result_peers | 6075 | // for the purposes of the source instruction to ir_build_result_peers |
| 6086 | cond_br_inst = ag->current_basic_block->instruction_list.last(); | 6076 | cond_br_inst = ag->current_basic_block->instruction_list.last(); |
| ... | @@ -6123,8 +6113,8 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod | ... | @@ -6123,8 +6113,8 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod |
| 6123 | } | 6113 | } |
| 6124 | | 6114 | |
| 6125 | if (!instr_is_unreachable(body_result)) { | 6115 | if (!instr_is_unreachable(body_result)) { |
| 6126 | ir_mark_gen(ir_build_check_statement_is_void(ag, child_scope, node->data.while_expr.body, body_result)); | 6116 | ir_build_check_statement_is_void(ag, child_scope, node->data.while_expr.body, body_result); |
| 6127 | ir_mark_gen(ir_build_br(ag, child_scope, node, continue_block, is_comptime)); | 6117 | ir_build_br(ag, child_scope, node, continue_block, is_comptime); |
| 6128 | } | 6118 | } |
| 6129 | | 6119 | |
| 6130 | if (continue_expr_node) { | 6120 | if (continue_expr_node) { |
| ... | @@ -6133,8 +6123,8 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod | ... | @@ -6133,8 +6123,8 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod |
| 6133 | if (expr_result == ag->codegen->invalid_inst_src) | 6123 | if (expr_result == ag->codegen->invalid_inst_src) |
| 6134 | return expr_result; | 6124 | return expr_result; |
| 6135 | if (!instr_is_unreachable(expr_result)) { | 6125 | if (!instr_is_unreachable(expr_result)) { |
| 6136 | ir_mark_gen(ir_build_check_statement_is_void(ag, child_scope, continue_expr_node, expr_result)); | 6126 | ir_build_check_statement_is_void(ag, child_scope, continue_expr_node, expr_result); |
| 6137 | ir_mark_gen(ir_build_br(ag, child_scope, node, cond_block, is_comptime)); | 6127 | ir_build_br(ag, child_scope, node, cond_block, is_comptime); |
| 6138 | } | 6128 | } |
| 6139 | } | 6129 | } |
| 6140 | | 6130 | |
| ... | @@ -6151,7 +6141,7 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod | ... | @@ -6151,7 +6141,7 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod |
| 6151 | if (else_result == ag->codegen->invalid_inst_src) | 6141 | if (else_result == ag->codegen->invalid_inst_src) |
| 6152 | return else_result; | 6142 | return else_result; |
| 6153 | if (!instr_is_unreachable(else_result)) | 6143 | if (!instr_is_unreachable(else_result)) |
| 6154 | ir_mark_gen(ir_build_br(ag, scope, node, end_block, is_comptime)); | 6144 | ir_build_br(ag, scope, node, end_block, is_comptime); |
| 6155 | } | 6145 | } |
| 6156 | Stage1ZirBasicBlock *after_else_block = ag->current_basic_block; | 6146 | Stage1ZirBasicBlock *after_else_block = ag->current_basic_block; |
| 6157 | ir_set_cursor_at_end_and_append_block(ag, end_block); | 6147 | ir_set_cursor_at_end_and_append_block(ag, end_block); |
| ... | @@ -6175,12 +6165,11 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod | ... | @@ -6175,12 +6165,11 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod |
| 6175 | if (cond_val == ag->codegen->invalid_inst_src) | 6165 | if (cond_val == ag->codegen->invalid_inst_src) |
| 6176 | return cond_val; | 6166 | return cond_val; |
| 6177 | Stage1ZirBasicBlock *after_cond_block = ag->current_basic_block; | 6167 | Stage1ZirBasicBlock *after_cond_block = ag->current_basic_block; |
| 6178 | IrInstSrc *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(ag, scope, node)); | 6168 | IrInstSrc *void_else_result = else_node ? nullptr : ir_build_const_void(ag, scope, node); |
| 6179 | IrInstSrc *cond_br_inst; | 6169 | IrInstSrc *cond_br_inst; |
| 6180 | if (!instr_is_unreachable(cond_val)) { | 6170 | if (!instr_is_unreachable(cond_val)) { |
| 6181 | cond_br_inst = ir_build_cond_br(ag, scope, node->data.while_expr.condition, cond_val, | 6171 | cond_br_inst = ir_build_cond_br(ag, scope, node->data.while_expr.condition, cond_val, |
| 6182 | body_block, else_block, is_comptime); | 6172 | body_block, else_block, is_comptime); |
| 6183 | cond_br_inst->is_gen = true; | | |
| 6184 | } else { | 6173 | } else { |
| 6185 | // for the purposes of the source instruction to ir_build_result_peers | 6174 | // for the purposes of the source instruction to ir_build_result_peers |
| 6186 | cond_br_inst = ag->current_basic_block->instruction_list.last(); | 6175 | cond_br_inst = ag->current_basic_block->instruction_list.last(); |
| ... | @@ -6219,8 +6208,8 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod | ... | @@ -6219,8 +6208,8 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod |
| 6219 | } | 6208 | } |
| 6220 | | 6209 | |
| 6221 | if (!instr_is_unreachable(body_result)) { | 6210 | if (!instr_is_unreachable(body_result)) { |
| 6222 | ir_mark_gen(ir_build_check_statement_is_void(ag, scope, node->data.while_expr.body, body_result)); | 6211 | ir_build_check_statement_is_void(ag, scope, node->data.while_expr.body, body_result); |
| 6223 | ir_mark_gen(ir_build_br(ag, scope, node, continue_block, is_comptime)); | 6212 | ir_build_br(ag, scope, node, continue_block, is_comptime); |
| 6224 | } | 6213 | } |
| 6225 | | 6214 | |
| 6226 | if (continue_expr_node) { | 6215 | if (continue_expr_node) { |
| ... | @@ -6229,8 +6218,8 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod | ... | @@ -6229,8 +6218,8 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod |
| 6229 | if (expr_result == ag->codegen->invalid_inst_src) | 6218 | if (expr_result == ag->codegen->invalid_inst_src) |
| 6230 | return expr_result; | 6219 | return expr_result; |
| 6231 | if (!instr_is_unreachable(expr_result)) { | 6220 | if (!instr_is_unreachable(expr_result)) { |
| 6232 | ir_mark_gen(ir_build_check_statement_is_void(ag, scope, continue_expr_node, expr_result)); | 6221 | ir_build_check_statement_is_void(ag, scope, continue_expr_node, expr_result); |
| 6233 | ir_mark_gen(ir_build_br(ag, scope, node, cond_block, is_comptime)); | 6222 | ir_build_br(ag, scope, node, cond_block, is_comptime); |
| 6234 | } | 6223 | } |
| 6235 | } | 6224 | } |
| 6236 | | 6225 | |
| ... | @@ -6248,7 +6237,7 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod | ... | @@ -6248,7 +6237,7 @@ static IrInstSrc *astgen_while_expr(Stage1AstGen *ag, Scope *scope, AstNode *nod |
| 6248 | if (else_result == ag->codegen->invalid_inst_src) | 6237 | if (else_result == ag->codegen->invalid_inst_src) |
| 6249 | return else_result; | 6238 | return else_result; |
| 6250 | if (!instr_is_unreachable(else_result)) | 6239 | if (!instr_is_unreachable(else_result)) |
| 6251 | ir_mark_gen(ir_build_br(ag, scope, node, end_block, is_comptime)); | 6240 | ir_build_br(ag, scope, node, end_block, is_comptime); |
| 6252 | } | 6241 | } |
| 6253 | Stage1ZirBasicBlock *after_else_block = ag->current_basic_block; | 6242 | Stage1ZirBasicBlock *after_else_block = ag->current_basic_block; |
| 6254 | ir_set_cursor_at_end_and_append_block(ag, end_block); | 6243 | ir_set_cursor_at_end_and_append_block(ag, end_block); |
| ... | @@ -6332,9 +6321,9 @@ static IrInstSrc *astgen_for_expr(Stage1AstGen *ag, Scope *parent_scope, AstNode | ... | @@ -6332,9 +6321,9 @@ static IrInstSrc *astgen_for_expr(Stage1AstGen *ag, Scope *parent_scope, AstNode |
| 6332 | IrInstSrc *index_val = ir_build_load_ptr(ag, &spill_scope->base, node, index_ptr); | 6321 | IrInstSrc *index_val = ir_build_load_ptr(ag, &spill_scope->base, node, index_ptr); |
| 6333 | IrInstSrc *cond = ir_build_bin_op(ag, parent_scope, node, IrBinOpCmpLessThan, index_val, len_val, false); | 6322 | IrInstSrc *cond = ir_build_bin_op(ag, parent_scope, node, IrBinOpCmpLessThan, index_val, len_val, false); |
| 6334 | Stage1ZirBasicBlock *after_cond_block = ag->current_basic_block; | 6323 | Stage1ZirBasicBlock *after_cond_block = ag->current_basic_block; |
| 6335 | IrInstSrc *void_else_value = else_node ? nullptr : ir_mark_gen(ir_build_const_void(ag, parent_scope, node)); | 6324 | IrInstSrc *void_else_value = else_node ? nullptr : ir_build_const_void(ag, parent_scope, node); |
| 6336 | IrInstSrc *cond_br_inst = ir_mark_gen(ir_build_cond_br(ag, parent_scope, node, cond, | 6325 | IrInstSrc *cond_br_inst = ir_build_cond_br(ag, parent_scope, node, cond, |
| 6337 | body_block, else_block, is_comptime)); | 6326 | body_block, else_block, is_comptime); |
| 6338 | | 6327 | |
| 6339 | ResultLocPeerParent *peer_parent = ir_build_result_peers(ag, cond_br_inst, end_block, result_loc, is_comptime); | 6328 | ResultLocPeerParent *peer_parent = ir_build_result_peers(ag, cond_br_inst, end_block, result_loc, is_comptime); |
| 6340 | | 6329 | |
| ... | @@ -6377,8 +6366,8 @@ static IrInstSrc *astgen_for_expr(Stage1AstGen *ag, Scope *parent_scope, AstNode | ... | @@ -6377,8 +6366,8 @@ static IrInstSrc *astgen_for_expr(Stage1AstGen *ag, Scope *parent_scope, AstNode |
| 6377 | } | 6366 | } |
| 6378 | | 6367 | |
| 6379 | if (!instr_is_unreachable(body_result)) { | 6368 | if (!instr_is_unreachable(body_result)) { |
| 6380 | ir_mark_gen(ir_build_check_statement_is_void(ag, child_scope, node->data.for_expr.body, body_result)); | 6369 | ir_build_check_statement_is_void(ag, child_scope, node->data.for_expr.body, body_result); |
| 6381 | ir_mark_gen(ir_build_br(ag, child_scope, node, continue_block, is_comptime)); | 6370 | ir_build_br(ag, child_scope, node, continue_block, is_comptime); |
| 6382 | } | 6371 | } |
| 6383 | | 6372 | |
| 6384 | ir_set_cursor_at_end_and_append_block(ag, continue_block); | 6373 | ir_set_cursor_at_end_and_append_block(ag, continue_block); |
| ... | @@ -6399,7 +6388,7 @@ static IrInstSrc *astgen_for_expr(Stage1AstGen *ag, Scope *parent_scope, AstNode | ... | @@ -6399,7 +6388,7 @@ static IrInstSrc *astgen_for_expr(Stage1AstGen *ag, Scope *parent_scope, AstNode |
| 6399 | if (else_result == ag->codegen->invalid_inst_src) | 6388 | if (else_result == ag->codegen->invalid_inst_src) |
| 6400 | return else_result; | 6389 | return else_result; |
| 6401 | if (!instr_is_unreachable(else_result)) | 6390 | if (!instr_is_unreachable(else_result)) |
| 6402 | ir_mark_gen(ir_build_br(ag, parent_scope, node, end_block, is_comptime)); | 6391 | ir_build_br(ag, parent_scope, node, end_block, is_comptime); |
| 6403 | } | 6392 | } |
| 6404 | Stage1ZirBasicBlock *after_else_block = ag->current_basic_block; | 6393 | Stage1ZirBasicBlock *after_else_block = ag->current_basic_block; |
| 6405 | ir_set_cursor_at_end_and_append_block(ag, end_block); | 6394 | ir_set_cursor_at_end_and_append_block(ag, end_block); |
| ... | @@ -6719,7 +6708,7 @@ static IrInstSrc *astgen_if_optional_expr(Stage1AstGen *ag, Scope *scope, AstNod | ... | @@ -6719,7 +6708,7 @@ static IrInstSrc *astgen_if_optional_expr(Stage1AstGen *ag, Scope *scope, AstNod |
| 6719 | return then_expr_result; | 6708 | return then_expr_result; |
| 6720 | Stage1ZirBasicBlock *after_then_block = ag->current_basic_block; | 6709 | Stage1ZirBasicBlock *after_then_block = ag->current_basic_block; |
| 6721 | if (!instr_is_unreachable(then_expr_result)) | 6710 | if (!instr_is_unreachable(then_expr_result)) |
| 6722 | ir_mark_gen(ir_build_br(ag, scope, node, endif_block, is_comptime)); | 6711 | ir_build_br(ag, scope, node, endif_block, is_comptime); |
| 6723 | | 6712 | |
| 6724 | ir_set_cursor_at_end_and_append_block(ag, else_block); | 6713 | ir_set_cursor_at_end_and_append_block(ag, else_block); |
| 6725 | IrInstSrc *else_expr_result; | 6714 | IrInstSrc *else_expr_result; |
| ... | @@ -6733,7 +6722,7 @@ static IrInstSrc *astgen_if_optional_expr(Stage1AstGen *ag, Scope *scope, AstNod | ... | @@ -6733,7 +6722,7 @@ static IrInstSrc *astgen_if_optional_expr(Stage1AstGen *ag, Scope *scope, AstNod |
| 6733 | } | 6722 | } |
| 6734 | Stage1ZirBasicBlock *after_else_block = ag->current_basic_block; | 6723 | Stage1ZirBasicBlock *after_else_block = ag->current_basic_block; |
| 6735 | if (!instr_is_unreachable(else_expr_result)) | 6724 | if (!instr_is_unreachable(else_expr_result)) |
| 6736 | ir_mark_gen(ir_build_br(ag, scope, node, endif_block, is_comptime)); | 6725 | ir_build_br(ag, scope, node, endif_block, is_comptime); |
| 6737 | | 6726 | |
| 6738 | ir_set_cursor_at_end_and_append_block(ag, endif_block); | 6727 | ir_set_cursor_at_end_and_append_block(ag, endif_block); |
| 6739 | IrInstSrc **incoming_values = heap::c_allocator.allocate<IrInstSrc *>(2); | 6728 | IrInstSrc **incoming_values = heap::c_allocator.allocate<IrInstSrc *>(2); |
| ... | @@ -6802,7 +6791,7 @@ static IrInstSrc *astgen_if_err_expr(Stage1AstGen *ag, Scope *scope, AstNode *no | ... | @@ -6802,7 +6791,7 @@ static IrInstSrc *astgen_if_err_expr(Stage1AstGen *ag, Scope *scope, AstNode *no |
| 6802 | return then_expr_result; | 6791 | return then_expr_result; |
| 6803 | Stage1ZirBasicBlock *after_then_block = ag->current_basic_block; | 6792 | Stage1ZirBasicBlock *after_then_block = ag->current_basic_block; |
| 6804 | if (!instr_is_unreachable(then_expr_result)) | 6793 | if (!instr_is_unreachable(then_expr_result)) |
| 6805 | ir_mark_gen(ir_build_br(ag, scope, node, endif_block, is_comptime)); | 6794 | ir_build_br(ag, scope, node, endif_block, is_comptime); |
| 6806 | | 6795 | |
| 6807 | ir_set_cursor_at_end_and_append_block(ag, else_block); | 6796 | ir_set_cursor_at_end_and_append_block(ag, else_block); |
| 6808 | | 6797 | |
| ... | @@ -6831,7 +6820,7 @@ static IrInstSrc *astgen_if_err_expr(Stage1AstGen *ag, Scope *scope, AstNode *no | ... | @@ -6831,7 +6820,7 @@ static IrInstSrc *astgen_if_err_expr(Stage1AstGen *ag, Scope *scope, AstNode *no |
| 6831 | } | 6820 | } |
| 6832 | Stage1ZirBasicBlock *after_else_block = ag->current_basic_block; | 6821 | Stage1ZirBasicBlock *after_else_block = ag->current_basic_block; |
| 6833 | if (!instr_is_unreachable(else_expr_result)) | 6822 | if (!instr_is_unreachable(else_expr_result)) |
| 6834 | ir_mark_gen(ir_build_br(ag, scope, node, endif_block, is_comptime)); | 6823 | ir_build_br(ag, scope, node, endif_block, is_comptime); |
| 6835 | | 6824 | |
| 6836 | ir_set_cursor_at_end_and_append_block(ag, endif_block); | 6825 | ir_set_cursor_at_end_and_append_block(ag, endif_block); |
| 6837 | IrInstSrc **incoming_values = heap::c_allocator.allocate<IrInstSrc *>(2); | 6826 | IrInstSrc **incoming_values = heap::c_allocator.allocate<IrInstSrc *>(2); |
| ... | @@ -6893,7 +6882,7 @@ static bool astgen_switch_prong_expr(Stage1AstGen *ag, Scope *scope, AstNode *sw | ... | @@ -6893,7 +6882,7 @@ static bool astgen_switch_prong_expr(Stage1AstGen *ag, Scope *scope, AstNode *sw |
| 6893 | if (expr_result == ag->codegen->invalid_inst_src) | 6882 | if (expr_result == ag->codegen->invalid_inst_src) |
| 6894 | return false; | 6883 | return false; |
| 6895 | if (!instr_is_unreachable(expr_result)) | 6884 | if (!instr_is_unreachable(expr_result)) |
| 6896 | ir_mark_gen(ir_build_br(ag, scope, switch_node, end_block, is_comptime)); | 6885 | ir_build_br(ag, scope, switch_node, end_block, is_comptime); |
| 6897 | incoming_blocks->append(ag->current_basic_block); | 6886 | incoming_blocks->append(ag->current_basic_block); |
| 6898 | incoming_values->append(expr_result); | 6887 | incoming_values->append(expr_result); |
| 6899 | return true; | 6888 | return true; |
| ... | @@ -7008,8 +6997,8 @@ static IrInstSrc *astgen_switch_expr(Stage1AstGen *ag, Scope *scope, AstNode *no | ... | @@ -7008,8 +6997,8 @@ static IrInstSrc *astgen_switch_expr(Stage1AstGen *ag, Scope *scope, AstNode *no |
| 7008 | | 6997 | |
| 7009 | assert(ok_bit); | 6998 | assert(ok_bit); |
| 7010 | assert(last_item_node); | 6999 | assert(last_item_node); |
| 7011 | IrInstSrc *br_inst = ir_mark_gen(ir_build_cond_br(ag, scope, last_item_node, ok_bit, | 7000 | IrInstSrc *br_inst = ir_build_cond_br(ag, scope, last_item_node, ok_bit, |
| 7012 | range_block_yes, range_block_no, is_comptime)); | 7001 | range_block_yes, range_block_no, is_comptime); |
| 7013 | if (peer_parent->base.source_instruction == nullptr) { | 7002 | if (peer_parent->base.source_instruction == nullptr) { |
| 7014 | peer_parent->base.source_instruction = br_inst; | 7003 | peer_parent->base.source_instruction = br_inst; |
| 7015 | } | 7004 | } |
| ... | @@ -7349,14 +7338,14 @@ static IrInstSrc *astgen_continue(Stage1AstGen *ag, Scope *continue_scope, AstNo | ... | @@ -7349,14 +7338,14 @@ static IrInstSrc *astgen_continue(Stage1AstGen *ag, Scope *continue_scope, AstNo |
| 7349 | | 7338 | |
| 7350 | for (size_t i = 0; i < runtime_scopes.length; i += 1) { | 7339 | for (size_t i = 0; i < runtime_scopes.length; i += 1) { |
| 7351 | ScopeRuntime *scope_runtime = runtime_scopes.at(i); | 7340 | ScopeRuntime *scope_runtime = runtime_scopes.at(i); |
| 7352 | ir_mark_gen(ir_build_check_runtime_scope(ag, continue_scope, node, scope_runtime->is_comptime, is_comptime)); | 7341 | ir_build_check_runtime_scope(ag, continue_scope, node, scope_runtime->is_comptime, is_comptime); |
| 7353 | } | 7342 | } |
| 7354 | runtime_scopes.deinit(); | 7343 | runtime_scopes.deinit(); |
| 7355 | | 7344 | |
| 7356 | Stage1ZirBasicBlock *dest_block = loop_scope->continue_block; | 7345 | Stage1ZirBasicBlock *dest_block = loop_scope->continue_block; |
| 7357 | if (!astgen_defers_for_block(ag, continue_scope, dest_block->scope, nullptr, nullptr)) | 7346 | if (!astgen_defers_for_block(ag, continue_scope, dest_block->scope, nullptr, nullptr)) |
| 7358 | return ag->codegen->invalid_inst_src; | 7347 | return ag->codegen->invalid_inst_src; |
| 7359 | return ir_mark_gen(ir_build_br(ag, continue_scope, node, dest_block, is_comptime)); | 7348 | return ir_build_br(ag, continue_scope, node, dest_block, is_comptime); |
| 7360 | } | 7349 | } |
| 7361 | | 7350 | |
| 7362 | static IrInstSrc *astgen_error_type(Stage1AstGen *ag, Scope *scope, AstNode *node) { | 7351 | static IrInstSrc *astgen_error_type(Stage1AstGen *ag, Scope *scope, AstNode *node) { |
| ... | @@ -7482,7 +7471,7 @@ static IrInstSrc *astgen_catch(Stage1AstGen *ag, Scope *parent_scope, AstNode *n | ... | @@ -7482,7 +7471,7 @@ static IrInstSrc *astgen_catch(Stage1AstGen *ag, Scope *parent_scope, AstNode *n |
| 7482 | return ag->codegen->invalid_inst_src; | 7471 | return ag->codegen->invalid_inst_src; |
| 7483 | Stage1ZirBasicBlock *after_err_block = ag->current_basic_block; | 7472 | Stage1ZirBasicBlock *after_err_block = ag->current_basic_block; |
| 7484 | if (!instr_is_unreachable(err_result)) | 7473 | if (!instr_is_unreachable(err_result)) |
| 7485 | ir_mark_gen(ir_build_br(ag, parent_scope, node, end_block, is_comptime)); | 7474 | ir_build_br(ag, parent_scope, node, end_block, is_comptime); |
| 7486 | | 7475 | |
| 7487 | ir_set_cursor_at_end_and_append_block(ag, ok_block); | 7476 | ir_set_cursor_at_end_and_append_block(ag, ok_block); |
| 7488 | IrInstSrc *unwrapped_ptr = ir_build_unwrap_err_payload_src(ag, parent_scope, node, err_union_ptr, false, false); | 7477 | IrInstSrc *unwrapped_ptr = ir_build_unwrap_err_payload_src(ag, parent_scope, node, err_union_ptr, false, false); |
| ... | @@ -7757,9 +7746,9 @@ static IrInstSrc *astgen_suspend(Stage1AstGen *ag, Scope *parent_scope, AstNode | ... | @@ -7757,9 +7746,9 @@ static IrInstSrc *astgen_suspend(Stage1AstGen *ag, Scope *parent_scope, AstNode |
| 7757 | IrInstSrc *susp_res = astgen_node(ag, node->data.suspend.block, child_scope); | 7746 | IrInstSrc *susp_res = astgen_node(ag, node->data.suspend.block, child_scope); |
| 7758 | if (susp_res == ag->codegen->invalid_inst_src) | 7747 | if (susp_res == ag->codegen->invalid_inst_src) |
| 7759 | return ag->codegen->invalid_inst_src; | 7748 | return ag->codegen->invalid_inst_src; |
| 7760 | ir_mark_gen(ir_build_check_statement_is_void(ag, child_scope, node->data.suspend.block, susp_res)); | 7749 | ir_build_check_statement_is_void(ag, child_scope, node->data.suspend.block, susp_res); |
| 7761 | | 7750 | |
| 7762 | return ir_mark_gen(ir_build_suspend_finish_src(ag, parent_scope, node, begin)); | 7751 | return ir_build_suspend_finish_src(ag, parent_scope, node, begin); |
| 7763 | } | 7752 | } |
| 7764 | | 7753 | |
| 7765 | static IrInstSrc *astgen_node_raw(Stage1AstGen *ag, AstNode *node, Scope *scope, | 7754 | static IrInstSrc *astgen_node_raw(Stage1AstGen *ag, AstNode *node, Scope *scope, |
| ... | @@ -8073,13 +8062,13 @@ bool stage1_astgen(CodeGen *codegen, AstNode *node, Scope *scope, Stage1Zir *sta | ... | @@ -8073,13 +8062,13 @@ bool stage1_astgen(CodeGen *codegen, AstNode *node, Scope *scope, Stage1Zir *sta |
| 8073 | } | 8062 | } |
| 8074 | | 8063 | |
| 8075 | if (!instr_is_unreachable(result)) { | 8064 | if (!instr_is_unreachable(result)) { |
| 8076 | ir_mark_gen(ir_build_add_implicit_return_type(ag, scope, result->base.source_node, result, nullptr)); | 8065 | ir_build_add_implicit_return_type(ag, scope, result->base.source_node, result, nullptr); |
| 8077 | // no need for save_err_ret_addr because this cannot return error | 8066 | // no need for save_err_ret_addr because this cannot return error |
| 8078 | ResultLocReturn *result_loc_ret = heap::c_allocator.create<ResultLocReturn>(); | 8067 | ResultLocReturn *result_loc_ret = heap::c_allocator.create<ResultLocReturn>(); |
| 8079 | result_loc_ret->base.id = ResultLocIdReturn; | 8068 | result_loc_ret->base.id = ResultLocIdReturn; |
| 8080 | ir_build_reset_result(ag, scope, node, &result_loc_ret->base); | 8069 | ir_build_reset_result(ag, scope, node, &result_loc_ret->base); |
| 8081 | ir_mark_gen(ir_build_end_expr(ag, scope, node, result, &result_loc_ret->base)); | 8070 | ir_build_end_expr(ag, scope, node, result, &result_loc_ret->base); |
| 8082 | ir_mark_gen(ir_build_return_src(ag, scope, result->base.source_node, result)); | 8071 | ir_build_return_src(ag, scope, result->base.source_node, result); |
| 8083 | } | 8072 | } |
| 8084 | | 8073 | |
| 8085 | return true; | 8074 | return true; |