| ... | ... | @@ -9537,7 +9537,25 @@ pub const FuncGen = struct { |
| 9537 | 9537 | |
| 9538 | 9538 | fn airTrap(self: *FuncGen, inst: Air.Inst.Index) !void { |
| 9539 | 9539 | _ = inst; |
| 9540 | | _ = try self.wip.callIntrinsic(.normal, .none, .trap, &.{}, &.{}, ""); |
| 9540 | const target = self.ng.object.target; |
| 9541 | if ((target.cpu.arch == .mips or target.cpu.arch == .mipsel) and |
| 9542 | target.cpu.has(.mips, .notraps)) |
| 9543 | { |
| 9544 | // Emit a MIPS `break` instruction followed by an infinite loop (to fulfill the noreturn) |
| 9545 | // since this CPU does not support trap instructions. |
| 9546 | const o = self.ng.object; |
| 9547 | _ = try self.wip.callAsm( |
| 9548 | .none, |
| 9549 | try o.builder.fnType(.void, &.{}, .normal), |
| 9550 | .{ .sideeffect = true }, |
| 9551 | try o.builder.string("break\n0:\nj 0b\nnop"), |
| 9552 | try o.builder.string("~{memory}"), |
| 9553 | &.{}, |
| 9554 | "", |
| 9555 | ); |
| 9556 | } else { |
| 9557 | _ = try self.wip.callIntrinsic(.normal, .none, .trap, &.{}, &.{}, ""); |
| 9558 | } |
| 9541 | 9559 | _ = try self.wip.@"unreachable"(); |
| 9542 | 9560 | } |
| 9543 | 9561 | |
Nathan Bourgeois <iridescentrosesfall@gmail.com> 2026-03-21 21:32:22-04:00
src