authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2026-06-04 14:55:15+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2026-06-04 17:04:58+02:00
log17a55fdd3a55db65c4b761da4eb918b72cf9f302
tree3362b0995904fc1d9d05fdc8a0d02d24ceefa2ae
parent55186f1224cfea0cde09e48b12b07a753bfddc6a
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

std.os.linux: add sh arch bits

closes https://codeberg.org/ziglang/zig/issues/30946

2 files changed, 251 insertions(+), 1 deletions(-)

lib/std/os/linux.zig+12-1
...@@ -52,6 +52,7 @@ const arch_bits = switch (native_arch) {...@@ -52,6 +52,7 @@ const arch_bits = switch (native_arch) {
52 .riscv32 => @import("linux/riscv32.zig"),52 .riscv32 => @import("linux/riscv32.zig"),
53 .riscv64 => @import("linux/riscv64.zig"),53 .riscv64 => @import("linux/riscv64.zig"),
54 .s390x => @import("linux/s390x.zig"),54 .s390x => @import("linux/s390x.zig"),
55 .sh, .sheb => @import("linux/sh.zig"),
55 .sparc => @import("linux/sparc.zig"),56 .sparc => @import("linux/sparc.zig"),
56 .sparc64 => @import("linux/sparc64.zig"),57 .sparc64 => @import("linux/sparc64.zig"),
57 .x86 => @import("linux/x86.zig"),58 .x86 => @import("linux/x86.zig"),
...@@ -302,6 +303,8 @@ pub const MAP = switch (native_arch) {...@@ -302,6 +303,8 @@ pub const MAP = switch (native_arch) {
302 .microblazeel,303 .microblazeel,
303 .or1k,304 .or1k,
304 .s390x,305 .s390x,
306 .sh,
307 .sheb,
305 => packed struct(u32) {308 => packed struct(u32) {
306 TYPE: MAP_TYPE,309 TYPE: MAP_TYPE,
307 FIXED: bool = false,310 FIXED: bool = false,
...@@ -534,6 +537,8 @@ pub const O = switch (native_arch) {...@@ -534,6 +537,8 @@ pub const O = switch (native_arch) {
534 .microblazeel,537 .microblazeel,
535 .or1k,538 .or1k,
536 .s390x,539 .s390x,
540 .sh,
541 .sheb,
537 .xtensa,542 .xtensa,
538 .xtensaeb,543 .xtensaeb,
539 => packed struct(u32) {544 => packed struct(u32) {
...@@ -6995,6 +7000,8 @@ pub const MINSIGSTKSZ = switch (native_arch) {...@@ -6995,6 +7000,8 @@ pub const MINSIGSTKSZ = switch (native_arch) {
6995 .riscv32,7000 .riscv32,
6996 .riscv64,7001 .riscv64,
6997 .s390x,7002 .s390x,
7003 .sh,
7004 .sheb,
6998 .thumb,7005 .thumb,
6999 .thumbeb,7006 .thumbeb,
7000 .x86,7007 .x86,
...@@ -7035,6 +7042,8 @@ pub const SIGSTKSZ = switch (native_arch) {...@@ -7035,6 +7042,8 @@ pub const SIGSTKSZ = switch (native_arch) {
7035 .riscv32,7042 .riscv32,
7036 .riscv64,7043 .riscv64,
7037 .s390x,7044 .s390x,
7045 .sh,
7046 .sheb,
7038 .thumb,7047 .thumb,
7039 .thumbeb,7048 .thumbeb,
7040 .x86,7049 .x86,
...@@ -10749,9 +10758,11 @@ pub const AUDIT = struct {...@@ -10749,9 +10758,11 @@ pub const AUDIT = struct {
10749 .powerpc64le => .PPC64LE,10758 .powerpc64le => .PPC64LE,
10750 .riscv32 => .RISCV32,10759 .riscv32 => .RISCV32,
10751 .riscv64 => .RISCV64,10760 .riscv64 => .RISCV64,
10761 .s390x => .S390X,
10762 .sh => .SHEL,
10763 .sheb => .SH,
10752 .sparc => .SPARC,10764 .sparc => .SPARC,
10753 .sparc64 => .SPARC64,10765 .sparc64 => .SPARC64,
10754 .s390x => .S390X,
10755 .x86 => .I386,10766 .x86 => .I386,
10756 .x86_64 => .X86_64,10767 .x86_64 => .X86_64,
10757 .xtensa => .XTENSA,10768 .xtensa => .XTENSA,
lib/std/os/linux/sh.zig created+239
...@@ -0,0 +1,239 @@
1const builtin = @import("builtin");
2const std = @import("../../std.zig");
3const SYS = std.os.linux.SYS;
4
5pub const syscall_arg_t = u32;
6
7pub fn syscall0(
8 number: SYS,
9) u32 {
10 return asm volatile (
11 \\ trapa #31
12 \\ or r0, r0
13 \\ or r0, r0
14 \\ or r0, r0
15 \\ or r0, r0
16 \\ or r0, r0
17 : [ret] "={r0}" (-> u32),
18 : [number] "{r3}" (@intFromEnum(number)),
19 : .{ .memory = true });
20}
21
22pub fn syscall1(
23 number: SYS,
24 arg1: syscall_arg_t,
25) u32 {
26 return asm volatile (
27 \\ trapa #31
28 \\ or r0, r0
29 \\ or r0, r0
30 \\ or r0, r0
31 \\ or r0, r0
32 \\ or r0, r0
33 : [ret] "={r0}" (-> u32),
34 : [number] "{r3}" (@intFromEnum(number)),
35 [arg1] "{r4}" (arg1),
36 : .{ .memory = true });
37}
38
39pub fn syscall2(
40 number: SYS,
41 arg1: syscall_arg_t,
42 arg2: syscall_arg_t,
43) u32 {
44 return asm volatile (
45 \\ trapa #31
46 \\ or r0, r0
47 \\ or r0, r0
48 \\ or r0, r0
49 \\ or r0, r0
50 \\ or r0, r0
51 : [ret] "={r0}" (-> u32),
52 : [number] "{r3}" (@intFromEnum(number)),
53 [arg1] "{r4}" (arg1),
54 [arg2] "{r5}" (arg2),
55 : .{ .memory = true });
56}
57
58pub fn syscall3(
59 number: SYS,
60 arg1: syscall_arg_t,
61 arg2: syscall_arg_t,
62 arg3: syscall_arg_t,
63) u32 {
64 return asm volatile (
65 \\ trapa #31
66 \\ or r0, r0
67 \\ or r0, r0
68 \\ or r0, r0
69 \\ or r0, r0
70 \\ or r0, r0
71 : [ret] "={r0}" (-> u32),
72 : [number] "{r3}" (@intFromEnum(number)),
73 [arg1] "{r4}" (arg1),
74 [arg2] "{r5}" (arg2),
75 [arg3] "{r6}" (arg3),
76 : .{ .memory = true });
77}
78
79pub fn syscall4(
80 number: SYS,
81 arg1: syscall_arg_t,
82 arg2: syscall_arg_t,
83 arg3: syscall_arg_t,
84 arg4: syscall_arg_t,
85) u32 {
86 return asm volatile (
87 \\ trapa #31
88 \\ or r0, r0
89 \\ or r0, r0
90 \\ or r0, r0
91 \\ or r0, r0
92 \\ or r0, r0
93 : [ret] "={r0}" (-> u32),
94 : [number] "{r3}" (@intFromEnum(number)),
95 [arg1] "{r4}" (arg1),
96 [arg2] "{r5}" (arg2),
97 [arg3] "{r6}" (arg3),
98 [arg4] "{r7}" (arg4),
99 : .{ .memory = true });
100}
101
102pub fn syscall5(
103 number: SYS,
104 arg1: syscall_arg_t,
105 arg2: syscall_arg_t,
106 arg3: syscall_arg_t,
107 arg4: syscall_arg_t,
108 arg5: syscall_arg_t,
109) u32 {
110 return asm volatile (
111 \\ trapa #31
112 \\ or r0, r0
113 \\ or r0, r0
114 \\ or r0, r0
115 \\ or r0, r0
116 \\ or r0, r0
117 : [ret] "={r0}" (-> u32),
118 : [number] "{r3}" (@intFromEnum(number)),
119 [arg1] "{r4}" (arg1),
120 [arg2] "{r5}" (arg2),
121 [arg3] "{r6}" (arg3),
122 [arg4] "{r7}" (arg4),
123 [arg5] "{r0}" (arg5),
124 : .{ .memory = true });
125}
126
127pub fn syscall6(
128 number: SYS,
129 arg1: syscall_arg_t,
130 arg2: syscall_arg_t,
131 arg3: syscall_arg_t,
132 arg4: syscall_arg_t,
133 arg5: syscall_arg_t,
134 arg6: syscall_arg_t,
135) u32 {
136 return asm volatile (
137 \\ trapa #31
138 \\ or r0, r0
139 \\ or r0, r0
140 \\ or r0, r0
141 \\ or r0, r0
142 \\ or r0, r0
143 : [ret] "={r0}" (-> u32),
144 : [number] "{r3}" (@intFromEnum(number)),
145 [arg1] "{r4}" (arg1),
146 [arg2] "{r5}" (arg2),
147 [arg3] "{r6}" (arg3),
148 [arg4] "{r7}" (arg4),
149 [arg5] "{r0}" (arg5),
150 [arg6] "{r1}" (arg6),
151 : .{ .memory = true });
152}
153
154pub fn clone() callconv(.naked) u32 {
155 // __clone(func, stack, flags, arg, ptid, tls, ctid)
156 // r4, r5, r6, r7, +0, +4, +8
157 //
158 // syscall(SYS_clone, flags, stack, ptid, ctid, tls)
159 // r3 r4, r5, r6, r7, r0
160 asm volatile (
161 \\ mov #-4, r0
162 \\ and r0, r5
163 \\
164 \\ mov r4, r1
165 \\ mov r7, r2
166 \\
167 \\ mov #120, r3 ! SYS_clone
168 \\ mov r6, r4
169 \\ mov.l @r15, r6
170 \\ mov.l @(r15, 8), r7
171 \\ mov.l @(r15, 4), r0
172 \\ trapa #31
173 \\ or r0, r0
174 \\ or r0, r0
175 \\ or r0, r0
176 \\ or r0, r0
177 \\ or r0, r0
178 \\
179 \\ cmp/eq #0, r0
180 \\ bt 1f
181 \\
182 \\ // parent
183 \\ rts
184 \\ nop
185 \\
186 \\ // child
187 \\1:
188 );
189 if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile (
190 \\ .cfi_undefined pr
191 );
192 asm volatile (
193 \\ mov #0, r0
194 \\ lds r0, pr
195 \\ mov r0, r14
196 \\
197 \\ mov r2, r4
198 \\ jsr @r1
199 \\ nop
200 \\
201 \\ mov #1, r3 ! SYS_exit
202 \\ trapa #31
203 \\ or r0, r0
204 \\ or r0, r0
205 \\ or r0, r0
206 \\ or r0, r0
207 \\ or r0, r0
208 );
209}
210
211pub fn restore() callconv(.naked) noreturn {
212 asm volatile (
213 \\ trapa #31
214 \\ or r0, r0
215 \\ or r0, r0
216 \\ or r0, r0
217 \\ or r0, r0
218 \\ or r0, r0
219 :
220 : [number] "{r3}" (@intFromEnum(SYS.sigreturn)),
221 );
222}
223
224pub fn restore_rt() callconv(.naked) noreturn {
225 asm volatile (
226 \\ trapa #31
227 \\ or r0, r0
228 \\ or r0, r0
229 \\ or r0, r0
230 \\ or r0, r0
231 \\ or r0, r0
232 :
233 : [number] "{r3}" (@intFromEnum(SYS.rt_sigreturn)),
234 );
235}
236
237pub const time_t = i32;
238
239pub const VDSO = void;