authorgravatar for git@vexu.euVeikka Tuominen <git@vexu.eu> 2020-03-11 09:24:53+02:00
committergravatar for git@vexu.euVeikka Tuominen <git@vexu.eu> 2020-03-11 09:24:53+02:00
log21809c33001cc53c8fb3b56b25264e8d9076bed9
treef02e1e919af56b1e3616ee01f02651910b5a3a4c
parentee5b00a8b90ef375d0cd4432d31e3a4ed0b6f632
signaturelock-open Commit is signed but in an unrecognized format.

support non power of two integers in atomic ops

3 files changed, 73 insertions(+), 67 deletions(-)

src/all_types.hpp+8
......@@ -3567,6 +3567,8 @@ struct IrInstGenCmpxchg {
35673567 IrInstGen *cmp_value;
35683568 IrInstGen *new_value;
35693569 IrInstGen *result_loc;
3570 // non null if operand needs widening and truncating
3571 ZigType *actual_type;
35703572 bool is_weak;
35713573};
35723574
......@@ -4199,6 +4201,8 @@ struct IrInstGenAtomicRmw {
41994201
42004202 IrInstGen *ptr;
42014203 IrInstGen *operand;
4204 // non null if operand needs widening and truncating
4205 ZigType *actual_type;
42024206 AtomicRmwOp op;
42034207 AtomicOrder ordering;
42044208};
......@@ -4215,6 +4219,8 @@ struct IrInstGenAtomicLoad {
42154219 IrInstGen base;
42164220
42174221 IrInstGen *ptr;
4222 // non null if operand needs widening and truncating
4223 ZigType *actual_type;
42184224 AtomicOrder ordering;
42194225};
42204226
......@@ -4232,6 +4238,8 @@ struct IrInstGenAtomicStore {
42324238
42334239 IrInstGen *ptr;
42344240 IrInstGen *value;
4241 // non null if operand needs widening and truncating
4242 ZigType *actual_type;
42354243 AtomicOrder ordering;
42364244};
42374245
src/codegen.cpp+22-23
......@@ -5225,12 +5225,12 @@ static LLVMValueRef ir_render_cmpxchg(CodeGen *g, IrExecutableGen *executable, I
52255225 LLVMValueRef new_val = ir_llvm_value(g, instruction->new_value);
52265226
52275227 ZigType *operand_type = instruction->new_value->value->type;
5228 if (operand_type->id == ZigTypeIdBool) {
5229 // treat bool as u8
5228 if (instruction->actual_type != nullptr) {
5229 // operand needs widening and truncating
52305230 ptr_val = LLVMBuildBitCast(g->builder, ptr_val,
5231 LLVMPointerType(g->builtin_types.entry_u8->llvm_type, 0), "");
5232 cmp_val = LLVMConstZExt(cmp_val, g->builtin_types.entry_u8->llvm_type);
5233 new_val = LLVMConstZExt(new_val, g->builtin_types.entry_u8->llvm_type);
5231 LLVMPointerType(get_llvm_type(g, instruction->actual_type), 0), "");
5232 cmp_val = LLVMConstZExt(cmp_val, get_llvm_type(g, instruction->actual_type));
5233 new_val = LLVMConstZExt(new_val, get_llvm_type(g, instruction->actual_type));
52345234 }
52355235
52365236 LLVMAtomicOrdering success_order = to_LLVMAtomicOrdering(instruction->success_order);
......@@ -5245,8 +5245,8 @@ static LLVMValueRef ir_render_cmpxchg(CodeGen *g, IrExecutableGen *executable, I
52455245
52465246 if (!handle_is_ptr(g, optional_type)) {
52475247 LLVMValueRef payload_val = LLVMBuildExtractValue(g->builder, result_val, 0, "");
5248 if (operand_type->id == ZigTypeIdBool) {
5249 payload_val = LLVMBuildTrunc(g->builder, payload_val, g->builtin_types.entry_bool->llvm_type, "");
5248 if (instruction->actual_type != nullptr) {
5249 payload_val = LLVMBuildTrunc(g->builder, payload_val, get_llvm_type(g, operand_type), "");
52505250 }
52515251 LLVMValueRef success_bit = LLVMBuildExtractValue(g->builder, result_val, 1, "");
52525252 return LLVMBuildSelect(g->builder, success_bit, LLVMConstNull(get_llvm_type(g, child_type)), payload_val, "");
......@@ -5262,8 +5262,8 @@ static LLVMValueRef ir_render_cmpxchg(CodeGen *g, IrExecutableGen *executable, I
52625262 ir_assert(type_has_bits(g, child_type), &instruction->base);
52635263
52645264 LLVMValueRef payload_val = LLVMBuildExtractValue(g->builder, result_val, 0, "");
5265 if (operand_type->id == ZigTypeIdBool) {
5266 payload_val = LLVMBuildTrunc(g->builder, payload_val, g->builtin_types.entry_bool->llvm_type, "");
5265 if (instruction->actual_type != nullptr) {
5266 payload_val = LLVMBuildTrunc(g->builder, payload_val, get_llvm_type(g, operand_type), "");
52675267 }
52685268 LLVMValueRef val_ptr = LLVMBuildStructGEP(g->builder, result_loc, maybe_child_index, "");
52695269 gen_assign_raw(g, val_ptr, get_pointer_to_type(g, child_type, false), payload_val);
......@@ -5842,14 +5842,14 @@ static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, IrExecutableGen *executable
58425842 LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);
58435843 LLVMValueRef operand = ir_llvm_value(g, instruction->operand);
58445844
5845 if (operand_type->id == ZigTypeIdBool) {
5846 // treat bool as u8
5845 if (instruction->actual_type != nullptr) {
5846 // operand needs widening and truncating
58475847 LLVMValueRef casted_ptr = LLVMBuildBitCast(g->builder, ptr,
5848 LLVMPointerType(g->builtin_types.entry_u8->llvm_type, 0), "");
5849 LLVMValueRef casted_operand = LLVMBuildPtrToInt(g->builder, operand, g->builtin_types.entry_u8->llvm_type, "");
5848 LLVMPointerType(get_llvm_type(g, instruction->actual_type), 0), "");
5849 LLVMValueRef casted_operand = LLVMBuildPtrToInt(g->builder, operand, get_llvm_type(g, instruction->actual_type), "");
58505850 LLVMValueRef uncasted_result = ZigLLVMBuildAtomicRMW(g->builder, op, casted_ptr, casted_operand, ordering,
58515851 g->is_single_threaded);
5852 return LLVMBuildTrunc(g->builder, uncasted_result, g->builtin_types.entry_bool->llvm_type, "");
5852 return LLVMBuildTrunc(g->builder, uncasted_result, get_llvm_type(g, operand_type), "");
58535853 }
58545854
58555855 if (get_codegen_ptr_type_bail(g, operand_type) == nullptr) {
......@@ -5872,13 +5872,13 @@ static LLVMValueRef ir_render_atomic_load(CodeGen *g, IrExecutableGen *executabl
58725872 LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);
58735873
58745874 ZigType *operand_type = instruction->ptr->value->type->data.pointer.child_type;
5875 if (operand_type->id == ZigTypeIdBool) {
5876 // treat bool as u8
5875 if (instruction->actual_type != nullptr) {
5876 // operand needs widening and truncating
58775877 ptr = LLVMBuildBitCast(g->builder, ptr,
5878 LLVMPointerType(g->builtin_types.entry_u8->llvm_type, 0), "");
5878 LLVMPointerType(get_llvm_type(g, instruction->actual_type), 0), "");
58795879 LLVMValueRef load_inst = gen_load(g, ptr, instruction->ptr->value->type, "");
58805880 LLVMSetOrdering(load_inst, ordering);
5881 return LLVMBuildTrunc(g->builder, load_inst, g->builtin_types.entry_bool->llvm_type, "");
5881 return LLVMBuildTrunc(g->builder, load_inst, get_llvm_type(g, operand_type), "");
58825882 }
58835883 LLVMValueRef load_inst = gen_load(g, ptr, instruction->ptr->value->type, "");
58845884 LLVMSetOrdering(load_inst, ordering);
......@@ -5892,12 +5892,11 @@ static LLVMValueRef ir_render_atomic_store(CodeGen *g, IrExecutableGen *executab
58925892 LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);
58935893 LLVMValueRef value = ir_llvm_value(g, instruction->value);
58945894
5895 ZigType *operand_type = instruction->value->value->type;
5896 if (operand_type->id == ZigTypeIdBool) {
5897 // treat bool as u8
5895 if (instruction->actual_type != nullptr) {
5896 // operand needs widening and truncating
58985897 ptr = LLVMBuildBitCast(g->builder, ptr,
5899 LLVMPointerType(g->builtin_types.entry_u8->llvm_type, 0), "");
5900 value = LLVMConstZExt(value, g->builtin_types.entry_u8->llvm_type);
5898 LLVMPointerType(get_llvm_type(g, instruction->actual_type), 0), "");
5899 value = LLVMConstZExt(value, get_llvm_type(g, instruction->actual_type));
59015900 }
59025901 LLVMValueRef store_inst = gen_store(g, value, ptr, instruction->ptr->value->type);
59035902 LLVMSetOrdering(store_inst, ordering);
src/ir.cpp+43-44
......@@ -227,7 +227,7 @@ static IrInstGen *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_name
227227static void ir_assert(bool ok, IrInst* source_instruction);
228228static void ir_assert_gen(bool ok, IrInstGen *source_instruction);
229229static IrInstGen *ir_get_var_ptr(IrAnalyze *ira, IrInst *source_instr, ZigVar *var);
230static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op);
230static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op, ZigType **actual_type);
231231static IrInstSrc *ir_lval_wrap(IrBuilderSrc *irb, Scope *scope, IrInstSrc *value, LVal lval, ResultLoc *result_loc);
232232static IrInstSrc *ir_expr_wrap(IrBuilderSrc *irb, Scope *scope, IrInstSrc *inst, ResultLoc *result_loc);
233233static ZigType *adjust_ptr_align(CodeGen *g, ZigType *ptr_type, uint32_t new_align);
......@@ -3406,7 +3406,7 @@ static IrInstSrc *ir_build_cmpxchg_src(IrBuilderSrc *irb, Scope *scope, AstNode
34063406
34073407static IrInstGen *ir_build_cmpxchg_gen(IrAnalyze *ira, IrInst *source_instruction, ZigType *result_type,
34083408 IrInstGen *ptr, IrInstGen *cmp_value, IrInstGen *new_value,
3409 AtomicOrder success_order, AtomicOrder failure_order, bool is_weak, IrInstGen *result_loc)
3409 AtomicOrder success_order, AtomicOrder failure_order, bool is_weak, IrInstGen *result_loc, ZigType *actual_type)
34103410{
34113411 IrInstGenCmpxchg *instruction = ir_build_inst_gen<IrInstGenCmpxchg>(&ira->new_irb,
34123412 source_instruction->scope, source_instruction->source_node);
......@@ -3418,6 +3418,7 @@ static IrInstGen *ir_build_cmpxchg_gen(IrAnalyze *ira, IrInst *source_instructio
34183418 instruction->failure_order = failure_order;
34193419 instruction->is_weak = is_weak;
34203420 instruction->result_loc = result_loc;
3421 instruction->actual_type = actual_type;
34213422
34223423 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
34233424 ir_ref_inst_gen(cmp_value, ira->new_irb.current_basic_block);
......@@ -4554,7 +4555,7 @@ static IrInstSrc *ir_build_atomic_rmw_src(IrBuilderSrc *irb, Scope *scope, AstNo
45544555}
45554556
45564557static IrInstGen *ir_build_atomic_rmw_gen(IrAnalyze *ira, IrInst *source_instr,
4557 IrInstGen *ptr, IrInstGen *operand, AtomicRmwOp op, AtomicOrder ordering, ZigType *operand_type)
4558 IrInstGen *ptr, IrInstGen *operand, AtomicRmwOp op, AtomicOrder ordering, ZigType *operand_type, ZigType *actual_type)
45584559{
45594560 IrInstGenAtomicRmw *instruction = ir_build_inst_gen<IrInstGenAtomicRmw>(&ira->new_irb, source_instr->scope, source_instr->source_node);
45604561 instruction->base.value->type = operand_type;
......@@ -4562,6 +4563,7 @@ static IrInstGen *ir_build_atomic_rmw_gen(IrAnalyze *ira, IrInst *source_instr,
45624563 instruction->op = op;
45634564 instruction->operand = operand;
45644565 instruction->ordering = ordering;
4566 instruction->actual_type = actual_type;
45654567
45664568 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
45674569 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
......@@ -4585,13 +4587,14 @@ static IrInstSrc *ir_build_atomic_load_src(IrBuilderSrc *irb, Scope *scope, AstN
45854587}
45864588
45874589static IrInstGen *ir_build_atomic_load_gen(IrAnalyze *ira, IrInst *source_instr,
4588 IrInstGen *ptr, AtomicOrder ordering, ZigType *operand_type)
4590 IrInstGen *ptr, AtomicOrder ordering, ZigType *operand_type, ZigType *actual_type)
45894591{
45904592 IrInstGenAtomicLoad *instruction = ir_build_inst_gen<IrInstGenAtomicLoad>(&ira->new_irb,
45914593 source_instr->scope, source_instr->source_node);
45924594 instruction->base.value->type = operand_type;
45934595 instruction->ptr = ptr;
45944596 instruction->ordering = ordering;
4597 instruction->actual_type = actual_type;
45954598
45964599 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
45974600
......@@ -4616,13 +4619,14 @@ static IrInstSrc *ir_build_atomic_store_src(IrBuilderSrc *irb, Scope *scope, Ast
46164619}
46174620
46184621static IrInstGen *ir_build_atomic_store_gen(IrAnalyze *ira, IrInst *source_instr,
4619 IrInstGen *ptr, IrInstGen *value, AtomicOrder ordering)
4622 IrInstGen *ptr, IrInstGen *value, AtomicOrder ordering, ZigType *actual_type)
46204623{
46214624 IrInstGenAtomicStore *instruction = ir_build_inst_void<IrInstGenAtomicStore>(&ira->new_irb,
46224625 source_instr->scope, source_instr->source_node);
46234626 instruction->ptr = ptr;
46244627 instruction->value = value;
46254628 instruction->ordering = ordering;
4629 instruction->actual_type = actual_type;
46264630
46274631 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
46284632 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
......@@ -25121,7 +25125,8 @@ static IrInstGen *ir_analyze_instruction_embed_file(IrAnalyze *ira, IrInstSrcEmb
2512125125}
2512225126
2512325127static IrInstGen *ir_analyze_instruction_cmpxchg(IrAnalyze *ira, IrInstSrcCmpxchg *instruction) {
25124 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->type_value->child);
25128 ZigType *actual_type;
25129 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->type_value->child, &actual_type);
2512525130 if (type_is_invalid(operand_type))
2512625131 return ira->codegen->invalid_inst_gen;
2512725132
......@@ -25213,7 +25218,7 @@ static IrInstGen *ir_analyze_instruction_cmpxchg(IrAnalyze *ira, IrInstSrcCmpxch
2521325218
2521425219 return ir_build_cmpxchg_gen(ira, &instruction->base.base, result_type,
2521525220 casted_ptr, casted_cmp_value, casted_new_value,
25216 success_order, failure_order, instruction->is_weak, result_loc);
25221 success_order, failure_order, instruction->is_weak, result_loc, actual_type);
2521725222}
2521825223
2521925224static IrInstGen *ir_analyze_instruction_fence(IrAnalyze *ira, IrInstSrcFence *instruction) {
......@@ -28305,17 +28310,15 @@ static IrInstGen *ir_analyze_instruction_tag_type(IrAnalyze *ira, IrInstSrcTagTy
2830528310 }
2830628311}
2830728312
28308static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op) {
28313static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op, ZigType **actual_type) {
2830928314 ZigType *operand_type = ir_resolve_type(ira, op);
2831028315 if (type_is_invalid(operand_type))
2831128316 return ira->codegen->builtin_types.entry_invalid;
2831228317
28313 if (operand_type->id == ZigTypeIdInt) {
28314 if (operand_type->data.integral.bit_count < 8) {
28315 ir_add_error(ira, &op->base,
28316 buf_sprintf("expected integer type 8 bits or larger, found %" PRIu32 "-bit integer type",
28317 operand_type->data.integral.bit_count));
28318 return ira->codegen->builtin_types.entry_invalid;
28318 *actual_type = nullptr;
28319 if (operand_type->id == ZigTypeIdInt || operand_type->id == ZigTypeIdEnum) {
28320 if (operand_type->id == ZigTypeIdEnum) {
28321 operand_type = operand_type->data.enumeration.tag_int_type;
2831928322 }
2832028323 uint32_t max_atomic_bits = target_arch_largest_atomic_bits(ira->codegen->zig_target->arch);
2832128324 if (operand_type->data.integral.bit_count > max_atomic_bits) {
......@@ -28324,30 +28327,22 @@ static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op) {
2832428327 max_atomic_bits, operand_type->data.integral.bit_count));
2832528328 return ira->codegen->builtin_types.entry_invalid;
2832628329 }
28327 if (!is_power_of_2(operand_type->data.integral.bit_count)) {
28328 ir_add_error(ira, &op->base,
28329 buf_sprintf("%" PRIu32 "-bit integer type is not a power of 2", operand_type->data.integral.bit_count));
28330 return ira->codegen->builtin_types.entry_invalid;
28331 }
28332 } else if (operand_type->id == ZigTypeIdEnum) {
28333 ZigType *int_type = operand_type->data.enumeration.tag_int_type;
28334 if (int_type->data.integral.bit_count < 8) {
28335 ir_add_error(ira, &op->base,
28336 buf_sprintf("expected enum tag type 8 bits or larger, found %" PRIu32 "-bit tag type",
28337 int_type->data.integral.bit_count));
28338 return ira->codegen->builtin_types.entry_invalid;
28339 }
28340 uint32_t max_atomic_bits = target_arch_largest_atomic_bits(ira->codegen->zig_target->arch);
28341 if (int_type->data.integral.bit_count > max_atomic_bits) {
28342 ir_add_error(ira, &op->base,
28343 buf_sprintf("expected %" PRIu32 "-bit enum tag type or smaller, found %" PRIu32 "-bit tag type",
28344 max_atomic_bits, int_type->data.integral.bit_count));
28345 return ira->codegen->builtin_types.entry_invalid;
28346 }
28347 if (!is_power_of_2(int_type->data.integral.bit_count)) {
28348 ir_add_error(ira, &op->base,
28349 buf_sprintf("%" PRIu32 "-bit enum tag type is not a power of 2", int_type->data.integral.bit_count));
28350 return ira->codegen->builtin_types.entry_invalid;
28330 auto bit_count = operand_type->data.integral.bit_count;
28331 bool is_signed = operand_type->data.integral.is_signed;
28332 if (bit_count < 2 || !is_power_of_2(bit_count)) {
28333 if (bit_count < 8) {
28334 *actual_type = get_int_type(ira->codegen, is_signed, 8);
28335 } else if (bit_count < 16) {
28336 *actual_type = get_int_type(ira->codegen, is_signed, 16);
28337 } else if (bit_count < 32) {
28338 *actual_type = get_int_type(ira->codegen, is_signed, 32);
28339 } else if (bit_count < 64) {
28340 *actual_type = get_int_type(ira->codegen, is_signed, 64);
28341 } else if (bit_count < 128) {
28342 *actual_type = get_int_type(ira->codegen, is_signed, 128);
28343 } else {
28344 zig_unreachable();
28345 }
2835128346 }
2835228347 } else if (operand_type->id == ZigTypeIdFloat) {
2835328348 uint32_t max_atomic_bits = target_arch_largest_atomic_bits(ira->codegen->zig_target->arch);
......@@ -28359,6 +28354,7 @@ static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op) {
2835928354 }
2836028355 } else if (operand_type->id == ZigTypeIdBool) {
2836128356 // will be treated as u8
28357 *actual_type = ira->codegen->builtin_types.entry_u8;
2836228358 } else {
2836328359 Error err;
2836428360 ZigType *operand_ptr_type;
......@@ -28376,7 +28372,8 @@ static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op) {
2837628372}
2837728373
2837828374static IrInstGen *ir_analyze_instruction_atomic_rmw(IrAnalyze *ira, IrInstSrcAtomicRmw *instruction) {
28379 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child);
28375 ZigType *actual_type;
28376 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child, &actual_type);
2838028377 if (type_is_invalid(operand_type))
2838128378 return ira->codegen->invalid_inst_gen;
2838228379
......@@ -28434,11 +28431,12 @@ static IrInstGen *ir_analyze_instruction_atomic_rmw(IrAnalyze *ira, IrInstSrcAto
2843428431 }
2843528432
2843628433 return ir_build_atomic_rmw_gen(ira, &instruction->base.base, casted_ptr, casted_operand, op,
28437 ordering, operand_type);
28434 ordering, operand_type, actual_type);
2843828435}
2843928436
2844028437static IrInstGen *ir_analyze_instruction_atomic_load(IrAnalyze *ira, IrInstSrcAtomicLoad *instruction) {
28441 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child);
28438 ZigType *actual_type;
28439 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child, &actual_type);
2844228440 if (type_is_invalid(operand_type))
2844328441 return ira->codegen->invalid_inst_gen;
2844428442
......@@ -28468,11 +28466,12 @@ static IrInstGen *ir_analyze_instruction_atomic_load(IrAnalyze *ira, IrInstSrcAt
2846828466 return result;
2846928467 }
2847028468
28471 return ir_build_atomic_load_gen(ira, &instruction->base.base, casted_ptr, ordering, operand_type);
28469 return ir_build_atomic_load_gen(ira, &instruction->base.base, casted_ptr, ordering, operand_type, actual_type);
2847228470}
2847328471
2847428472static IrInstGen *ir_analyze_instruction_atomic_store(IrAnalyze *ira, IrInstSrcAtomicStore *instruction) {
28475 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child);
28473 ZigType *actual_type;
28474 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child, &actual_type);
2847628475 if (type_is_invalid(operand_type))
2847728476 return ira->codegen->invalid_inst_gen;
2847828477
......@@ -28511,7 +28510,7 @@ static IrInstGen *ir_analyze_instruction_atomic_store(IrAnalyze *ira, IrInstSrcA
2851128510 return result;
2851228511 }
2851328512
28514 return ir_build_atomic_store_gen(ira, &instruction->base.base, casted_ptr, casted_value, ordering);
28513 return ir_build_atomic_store_gen(ira, &instruction->base.base, casted_ptr, casted_value, ordering, actual_type);
2851528514}
2851628515
2851728516static IrInstGen *ir_analyze_instruction_save_err_ret_addr(IrAnalyze *ira, IrInstSrcSaveErrRetAddr *instruction) {