authorgravatar for joachim.schmidt557@outlook.comJoachim Schmidt <joachim.schmidt557@outlook.com> 2021-08-20 23:37:41+02:00
committergravatar for joachim.schmidt557@outlook.comJoachim Schmidt <joachim.schmidt557@outlook.com> 2021-08-20 23:37:41+02:00
log224fe49be23c44095d39297a4986782bd19ce8b2
tree1bd5e84741352f61cb7f4320644eabbf162920ee
parentf9e50a5830ab9a9ce0cb3e7eeb5e8da845926867
signaturelock-open Commit is signed but in an unrecognized format.

stage2 ARM: add test cases for bit shifts

1 files changed, 86 insertions(+), 0 deletions(-)

test/stage2/arm.zig+86
......@@ -204,6 +204,48 @@ pub fn addCases(ctx: *TestContext) !void {
204204 ,
205205 "123456",
206206 );
207
208 // Bit Shift Left
209 case.addCompareOutput(
210 \\pub fn main() void {
211 \\ var x: u32 = 1;
212 \\ assert(x << 1 == 2);
213 \\
214 \\ x <<= 1;
215 \\ assert(x << 2 == 8);
216 \\ assert(x << 3 == 16);
217 \\}
218 \\
219 \\pub fn assert(ok: bool) void {
220 \\ if (!ok) unreachable; // assertion failure
221 \\}
222 ,
223 "",
224 );
225
226 // Bit Shift Right
227 case.addCompareOutput(
228 \\pub fn main() void {
229 \\ var a: u32 = 1024;
230 \\ assert(a >> 1 == 512);
231 \\
232 \\ a >>= 1;
233 \\ assert(a >> 2 == 128);
234 \\ assert(a >> 3 == 64);
235 \\ assert(a >> 4 == 32);
236 \\ assert(a >> 5 == 16);
237 \\ assert(a >> 6 == 8);
238 \\ assert(a >> 7 == 4);
239 \\ assert(a >> 8 == 2);
240 \\ assert(a >> 9 == 1);
241 \\}
242 \\
243 \\pub fn assert(ok: bool) void {
244 \\ if (!ok) unreachable; // assertion failure
245 \\}
246 ,
247 "",
248 );
207249 }
208250
209251 {
......@@ -429,4 +471,48 @@ pub fn addCases(ctx: *TestContext) !void {
429471 "",
430472 );
431473 }
474
475 {
476 var case = ctx.exe("print u32s", linux_arm);
477 case.addCompareOutput(
478 \\pub fn main() void {
479 \\ printNumberHex(0x00000000);
480 \\ printNumberHex(0xaaaaaaaa);
481 \\ printNumberHex(0xdeadbeef);
482 \\ printNumberHex(0x31415926);
483 \\}
484 \\
485 \\fn printNumberHex(x: u32) void {
486 \\ var i: u5 = 28;
487 \\ while (true) : (i -= 4) {
488 \\ const digit = (x >> i) & 0xf;
489 \\ asm volatile ("svc #0"
490 \\ :
491 \\ : [number] "{r7}" (4),
492 \\ [arg1] "{r0}" (1),
493 \\ [arg2] "{r1}" (@ptrToInt("0123456789abcdef") + digit),
494 \\ [arg3] "{r2}" (1)
495 \\ : "memory"
496 \\ );
497 \\
498 \\ if (i == 0) break;
499 \\ }
500 \\ asm volatile ("svc #0"
501 \\ :
502 \\ : [number] "{r7}" (4),
503 \\ [arg1] "{r0}" (1),
504 \\ [arg2] "{r1}" (@ptrToInt("\n")),
505 \\ [arg3] "{r2}" (1)
506 \\ : "memory"
507 \\ );
508 \\}
509 ,
510 \\00000000
511 \\aaaaaaaa
512 \\deadbeef
513 \\31415926
514 \\
515 ,
516 );
517 }
432518}