| ... | ... | @@ -13,6 +13,61 @@ |
| 13 | 13 | #define zig_slimcc |
| 14 | 14 | #endif |
| 15 | 15 | |
| 16 | #if defined(__aarch64__) || (defined(zig_msvc) && defined(_M_ARM64)) |
| 17 | #define zig_aarch64 |
| 18 | #elif defined(__thumb__) || (defined(zig_msvc) && defined(_M_ARM)) |
| 19 | #define zig_thumb |
| 20 | #define zig_arm |
| 21 | #elif defined(__arm__) |
| 22 | #define zig_arm |
| 23 | #elif defined(__hexagon__) |
| 24 | #define zig_hexagon |
| 25 | #elif defined(__loongarch32) |
| 26 | #define zig_loongarch32 |
| 27 | #define zig_loongarch |
| 28 | #elif defined(__loongarch64) |
| 29 | #define zig_loongarch64 |
| 30 | #define zig_loongarch |
| 31 | #elif defined(__mips64) |
| 32 | #define zig_mips64 |
| 33 | #define zig_mips |
| 34 | #elif defined(__mips__) |
| 35 | #define zig_mips32 |
| 36 | #define zig_mips |
| 37 | #elif defined(__powerpc64__) |
| 38 | #define zig_powerpc64 |
| 39 | #define zig_powerpc |
| 40 | #elif defined(__powerpc__) |
| 41 | #define zig_powerpc32 |
| 42 | #define zig_powerpc |
| 43 | #elif defined(__riscv) && __riscv_xlen == 32 |
| 44 | #define zig_riscv32 |
| 45 | #define zig_riscv |
| 46 | #elif defined(__riscv) && __riscv_xlen == 64 |
| 47 | #define zig_riscv64 |
| 48 | #define zig_riscv |
| 49 | #elif defined(__s390x__) |
| 50 | #define zig_s390x |
| 51 | #elif defined(__sparc__) && defined(__arch64__) |
| 52 | #define zig_sparc64 |
| 53 | #define zig_sparc |
| 54 | #elif defined(__sparc__) |
| 55 | #define zig_sparc32 |
| 56 | #define zig_sparc |
| 57 | #elif defined(__wasm32__) |
| 58 | #define zig_wasm32 |
| 59 | #define zig_wasm |
| 60 | #elif defined(__wasm64__) |
| 61 | #define zig_wasm64 |
| 62 | #define zig_wasm |
| 63 | #elif defined(__i386__) || (defined(zig_msvc) && defined(_M_IX86)) |
| 64 | #define zig_x86_32 |
| 65 | #define zig_x86 |
| 66 | #elif defined (__x86_64__) || (defined(zig_msvc) && defined(_M_X64)) |
| 67 | #define zig_x86_64 |
| 68 | #define zig_x86 |
| 69 | #endif |
| 70 | |
| 16 | 71 | #ifndef __STDC_WANT_IEC_60559_TYPES_EXT__ |
| 17 | 72 | #define __STDC_WANT_IEC_60559_TYPES_EXT__ |
| 18 | 73 | #endif |
| ... | ... | @@ -24,7 +79,7 @@ |
| 24 | 79 | |
| 25 | 80 | #if defined(zig_msvc) |
| 26 | 81 | #include <intrin.h> |
| 27 | | #elif defined(__i386__) || defined(__x86_64__) |
| 82 | #elif defined(zig_x86) |
| 28 | 83 | #include <cpuid.h> |
| 29 | 84 | #endif |
| 30 | 85 | |
| ... | ... | @@ -74,7 +129,7 @@ typedef char bool; |
| 74 | 129 | #define zig_threadlocal zig_threadlocal_unavailable |
| 75 | 130 | #endif |
| 76 | 131 | |
| 77 | | #if !defined(zig_clang) && defined(zig_gnuc) && (defined(__i386__) || defined(__x86_64__)) |
| 132 | #if !defined(zig_clang) && defined(zig_gnuc) && defined(zig_x86) |
| 78 | 133 | #define zig_f128_has_miscompilations 1 |
| 79 | 134 | #else |
| 80 | 135 | #define zig_f128_has_miscompilations 0 |
| ... | ... | @@ -195,11 +250,11 @@ typedef char bool; |
| 195 | 250 | #endif |
| 196 | 251 | |
| 197 | 252 | #if defined(zig_msvc) |
| 198 | | #if _M_X64 |
| 253 | #if defined(zig_x86_64) |
| 199 | 254 | #define zig_mangle_c(symbol) symbol |
| 200 | | #else /*_M_X64 */ |
| 255 | #else /* zig_x86_64 */ |
| 201 | 256 | #define zig_mangle_c(symbol) "_" symbol |
| 202 | | #endif /*_M_X64 */ |
| 257 | #endif /* zig_x86_64 */ |
| 203 | 258 | #else /* zig_msvc */ |
| 204 | 259 | #if __APPLE__ |
| 205 | 260 | #define zig_mangle_c(symbol) "_" symbol |
| ... | ... | @@ -259,27 +314,27 @@ typedef char bool; |
| 259 | 314 | |
| 260 | 315 | #if zig_has_builtin(trap) |
| 261 | 316 | #define zig_trap() __builtin_trap() |
| 262 | | #elif defined(zig_msvc) && (defined(_M_IX86) || defined(_M_X64)) |
| 317 | #elif defined(zig_msvc) && defined(zig_x86) |
| 263 | 318 | #define zig_trap() __ud2() |
| 264 | 319 | #elif defined(zig_msvc) |
| 265 | 320 | #define zig_trap() __fastfail(7) |
| 266 | | #elif defined(__thumb__) |
| 321 | #elif defined(zig_thumb) |
| 267 | 322 | #define zig_trap() __asm__ volatile("udf #0xfe") |
| 268 | | #elif defined(__arm__) || defined(__aarch64__) |
| 323 | #elif defined(zig_arm) || defined(zig_aarch64) |
| 269 | 324 | #define zig_trap() __asm__ volatile("udf #0xfdee") |
| 270 | | #elif defined(__hexagon__) |
| 325 | #elif defined(zig_hexagon) |
| 271 | 326 | #define zig_trap() __asm__ volatile("r27:26 = memd(#0xbadc0fee)") |
| 272 | | #elif defined(__loongarch__) || defined(__powerpc__) |
| 327 | #elif defined(zig_loongarch) || defined(zig_powerpc) |
| 273 | 328 | #define zig_trap() __asm__ volatile(".word 0x0") |
| 274 | | #elif defined(__mips__) |
| 329 | #elif defined(zig_mips) |
| 275 | 330 | #define zig_trap() __asm__ volatile(".word 0x3d") |
| 276 | | #elif defined(__riscv) |
| 331 | #elif defined(zig_riscv) |
| 277 | 332 | #define zig_trap() __asm__ volatile("unimp") |
| 278 | | #elif defined(__s390__) |
| 333 | #elif defined(zig_s390x) |
| 279 | 334 | #define zig_trap() __asm__ volatile("j 0x2") |
| 280 | | #elif defined(__sparc__) |
| 335 | #elif defined(zig_sparc) |
| 281 | 336 | #define zig_trap() __asm__ volatile("illtrap") |
| 282 | | #elif defined(__i386__) || defined(__x86_64__) |
| 337 | #elif defined(zig_x86) |
| 283 | 338 | #define zig_trap() __asm__ volatile("ud2") |
| 284 | 339 | #else |
| 285 | 340 | #define zig_trap() zig_trap_unavailable |
| ... | ... | @@ -289,25 +344,25 @@ typedef char bool; |
| 289 | 344 | #define zig_breakpoint() __builtin_debugtrap() |
| 290 | 345 | #elif defined(zig_msvc) |
| 291 | 346 | #define zig_breakpoint() __debugbreak() |
| 292 | | #elif defined(__arm__) |
| 347 | #elif defined(zig_arm) |
| 293 | 348 | #define zig_breakpoint() __asm__ volatile("bkpt #0x0") |
| 294 | | #elif defined(__aarch64__) |
| 349 | #elif defined(zig_aarch64) |
| 295 | 350 | #define zig_breakpoint() __asm__ volatile("brk #0xf000") |
| 296 | | #elif defined(__hexagon__) |
| 351 | #elif defined(zig_hexagon) |
| 297 | 352 | #define zig_breakpoint() __asm__ volatile("brkpt") |
| 298 | | #elif defined(__loongarch__) |
| 353 | #elif defined(zig_loongarch) |
| 299 | 354 | #define zig_breakpoint() __asm__ volatile("break 0x0") |
| 300 | | #elif defined(__mips__) |
| 355 | #elif defined(zig_mips) |
| 301 | 356 | #define zig_breakpoint() __asm__ volatile("break") |
| 302 | | #elif defined(__powerpc__) |
| 357 | #elif defined(zig_powerpc) |
| 303 | 358 | #define zig_breakpoint() __asm__ volatile("trap") |
| 304 | | #elif defined(__riscv) |
| 359 | #elif defined(zig_riscv) |
| 305 | 360 | #define zig_breakpoint() __asm__ volatile("ebreak") |
| 306 | | #elif defined(__s390__) |
| 361 | #elif defined(zig_s390x) |
| 307 | 362 | #define zig_breakpoint() __asm__ volatile("j 0x6") |
| 308 | | #elif defined(__sparc__) |
| 363 | #elif defined(zig_sparc) |
| 309 | 364 | #define zig_breakpoint() __asm__ volatile("ta 0x1") |
| 310 | | #elif defined(__i386__) || defined(__x86_64__) |
| 365 | #elif defined(zig_x86) |
| 311 | 366 | #define zig_breakpoint() __asm__ volatile("int $0x3") |
| 312 | 367 | #else |
| 313 | 368 | #define zig_breakpoint() zig_breakpoint_unavailable |
| ... | ... | @@ -3095,7 +3150,7 @@ typedef uint16_t zig_f16; |
| 3095 | 3150 | #undef zig_init_special_f16 |
| 3096 | 3151 | #define zig_init_special_f16(sign, name, arg, repr) repr |
| 3097 | 3152 | #endif |
| 3098 | | #if __APPLE__ && (defined(__i386__) || defined(__x86_64__)) |
| 3153 | #if defined(__APPLE__) && defined(zig_x86) |
| 3099 | 3154 | typedef uint16_t zig_compiler_rt_f16; |
| 3100 | 3155 | #else |
| 3101 | 3156 | typedef zig_f16 zig_compiler_rt_f16; |
| ... | ... | @@ -3228,7 +3283,7 @@ typedef __float128 zig_f128; |
| 3228 | 3283 | #define zig_has_f128 0 |
| 3229 | 3284 | #undef zig_make_special_f128 |
| 3230 | 3285 | #undef zig_init_special_f128 |
| 3231 | | #if __APPLE__ || defined(__aarch64__) |
| 3286 | #if __APPLE__ || defined(zig_aarch64) |
| 3232 | 3287 | typedef __attribute__((__vector_size__(2 * sizeof(uint64_t)))) uint64_t zig_v2u64; |
| 3233 | 3288 | zig_basic_operator(zig_v2u64, xor_v2u64, ^) |
| 3234 | 3289 | #define zig_repr_f128 v2u64 |
| ... | ... | @@ -3650,7 +3705,7 @@ typedef int zig_memory_order; |
| 3650 | 3705 | #define zig_atomic_load(res, obj, order, Type, ReprType) __atomic_load (obj, &(res), order) |
| 3651 | 3706 | #undef zig_atomicrmw_xchg_float |
| 3652 | 3707 | #define zig_atomicrmw_xchg_float zig_atomicrmw_xchg |
| 3653 | | #elif defined(zig_msvc) && (_M_IX86 || _M_X64) |
| 3708 | #elif defined(zig_msvc) && defined(zig_x86) |
| 3654 | 3709 | #define zig_memory_order_relaxed 0 |
| 3655 | 3710 | #define zig_memory_order_acquire 2 |
| 3656 | 3711 | #define zig_memory_order_release 3 |
| ... | ... | @@ -3670,7 +3725,7 @@ typedef int zig_memory_order; |
| 3670 | 3725 | #define zig_atomicrmw_max(res, obj, arg, order, Type, ReprType) res = zig_msvc_atomicrmw_max_ ##Type(obj, arg) |
| 3671 | 3726 | #define zig_atomic_store( obj, arg, order, Type, ReprType) zig_msvc_atomic_store_ ##Type(obj, arg) |
| 3672 | 3727 | #define zig_atomic_load(res, obj, order, Type, ReprType) res = zig_msvc_atomic_load_ ##order##_##Type(obj) |
| 3673 | | /* TODO: zig_msvc && (_M_ARM || _M_ARM64) */ |
| 3728 | /* TODO: zig_msvc && (zig_thumb || zig_aarch64) */ |
| 3674 | 3729 | #else |
| 3675 | 3730 | #define zig_memory_order_relaxed 0 |
| 3676 | 3731 | #define zig_memory_order_acquire 2 |
| ... | ... | @@ -3693,7 +3748,7 @@ typedef int zig_memory_order; |
| 3693 | 3748 | #define zig_atomic_load(res, obj, order, Type, ReprType) zig_atomics_unavailable |
| 3694 | 3749 | #endif |
| 3695 | 3750 | |
| 3696 | | #if defined(zig_msvc) && (_M_IX86 || _M_X64) |
| 3751 | #if defined(zig_msvc) && defined(zig_x86) |
| 3697 | 3752 | |
| 3698 | 3753 | /* TODO: zig_msvc_atomic_load should load 32 bit without interlocked on x86, and load 64 bit without interlocked on x64 */ |
| 3699 | 3754 | |
| ... | ... | @@ -3790,7 +3845,7 @@ zig_msvc_atomics(i16, int16_t, short, 16, 16) |
| 3790 | 3845 | zig_msvc_atomics(u32, uint32_t, long, , 32) |
| 3791 | 3846 | zig_msvc_atomics(i32, int32_t, long, , 32) |
| 3792 | 3847 | |
| 3793 | | #if _M_X64 |
| 3848 | #if defined(zig_x86_64) |
| 3794 | 3849 | zig_msvc_atomics(u64, uint64_t, __int64, 64, 64) |
| 3795 | 3850 | zig_msvc_atomics(i64, int64_t, __int64, 64, 64) |
| 3796 | 3851 | #endif |
| ... | ... | @@ -3835,11 +3890,11 @@ zig_msvc_atomics(i64, int64_t, __int64, 64, 64) |
| 3835 | 3890 | } |
| 3836 | 3891 | |
| 3837 | 3892 | zig_msvc_flt_atomics(f32, long, , 32) |
| 3838 | | #if _M_X64 |
| 3893 | #if defined(zig_x86_64) |
| 3839 | 3894 | zig_msvc_flt_atomics(f64, int64_t, 64, 64) |
| 3840 | 3895 | #endif |
| 3841 | 3896 | |
| 3842 | | #if _M_IX86 |
| 3897 | #if defined(zig_x86_32) |
| 3843 | 3898 | static inline void zig_msvc_atomic_barrier() { |
| 3844 | 3899 | int32_t barrier; |
| 3845 | 3900 | __asm { |
| ... | ... | @@ -3876,7 +3931,7 @@ static inline bool zig_msvc_cmpxchg_p32(void volatile* obj, void* expected, void |
| 3876 | 3931 | if (!success) *(void**)expected = initial; |
| 3877 | 3932 | return success; |
| 3878 | 3933 | } |
| 3879 | | #else /* _M_IX86 */ |
| 3934 | #else /* zig_x86_32 */ |
| 3880 | 3935 | static inline void* zig_msvc_atomicrmw_xchg_p64(void volatile* obj, void* arg) { |
| 3881 | 3936 | return _InterlockedExchangePointer(obj, arg); |
| 3882 | 3937 | } |
| ... | ... | @@ -3937,13 +3992,13 @@ static inline void zig_msvc_atomic_store_i128(zig_i128 volatile* obj, zig_i128 a |
| 3937 | 3992 | while (!zig_cmpxchg_weak(obj, expected, arg, zig_memory_order_seq_cst, zig_memory_order_seq_cst, i128, zig_i128)); |
| 3938 | 3993 | } |
| 3939 | 3994 | |
| 3940 | | #endif /* _M_IX86 */ |
| 3995 | #endif /* zig_x86_32 */ |
| 3941 | 3996 | |
| 3942 | | #endif /* zig_msvc && (_M_IX86 || _M_X64) */ |
| 3997 | #endif /* zig_msvc && zig_x86 */ |
| 3943 | 3998 | |
| 3944 | 3999 | /* ======================== Special Case Intrinsics ========================= */ |
| 3945 | 4000 | |
| 3946 | | #if defined(_M_ARM) || defined(__thumb__) |
| 4001 | #if defined(zig_thumb) |
| 3947 | 4002 | |
| 3948 | 4003 | static inline void* zig_thumb_windows_teb(void) { |
| 3949 | 4004 | void* teb = 0; |
| ... | ... | @@ -3955,7 +4010,7 @@ static inline void* zig_thumb_windows_teb(void) { |
| 3955 | 4010 | return teb; |
| 3956 | 4011 | } |
| 3957 | 4012 | |
| 3958 | | #elif defined(_M_ARM64) || defined(__arch64__) |
| 4013 | #elif defined(zig_aarch64) |
| 3959 | 4014 | |
| 3960 | 4015 | static inline void* zig_aarch64_windows_teb(void) { |
| 3961 | 4016 | void* teb = 0; |
| ... | ... | @@ -3967,7 +4022,7 @@ static inline void* zig_aarch64_windows_teb(void) { |
| 3967 | 4022 | return teb; |
| 3968 | 4023 | } |
| 3969 | 4024 | |
| 3970 | | #elif defined(_M_IX86) || defined(__i386__) |
| 4025 | #elif defined(zig_x86_32) |
| 3971 | 4026 | |
| 3972 | 4027 | static inline void* zig_x86_windows_teb(void) { |
| 3973 | 4028 | void* teb = 0; |
| ... | ... | @@ -3979,7 +4034,7 @@ static inline void* zig_x86_windows_teb(void) { |
| 3979 | 4034 | return teb; |
| 3980 | 4035 | } |
| 3981 | 4036 | |
| 3982 | | #elif defined(_M_X64) || defined(__x86_64__) |
| 4037 | #elif defined(zig_x86_64) |
| 3983 | 4038 | |
| 3984 | 4039 | static inline void* zig_x86_64_windows_teb(void) { |
| 3985 | 4040 | void* teb = 0; |
| ... | ... | @@ -3993,7 +4048,7 @@ static inline void* zig_x86_64_windows_teb(void) { |
| 3993 | 4048 | |
| 3994 | 4049 | #endif |
| 3995 | 4050 | |
| 3996 | | #if (defined(zig_msvc) && (_M_IX86 || _M_X64)) || defined(__i386__) || defined(__x86_64__) |
| 4051 | #if defined(zig_x86) |
| 3997 | 4052 | |
| 3998 | 4053 | static inline void zig_x86_cpuid(uint32_t leaf_id, uint32_t subid, uint32_t* eax, uint32_t* ebx, uint32_t* ecx, uint32_t* edx) { |
| 3999 | 4054 | #if defined(zig_msvc) |
Alex Rønne Petersen <alex@alexrp.com> 2024-12-01 18:37:23+01:00
Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM
lib