From 34c2b5e9d1b15ab9d8988f7919df967f3c405187 Mon Sep 17 00:00:00 2001 From: xtex Date: Sun, 8 Mar 2026 08:53:48 +0800 Subject: [PATCH] std.os.linux: add LoongArch HWCAP bits See also arch/loongarch/include/uapi/asm/hwcap.h in Linux kernel. SC.Q was added in kernel v7.0. Change-Id: Ib4ddd451ab16d52b2578f8b97c9c3365286719cd Signed-off-by: xtex --- lib/std/os/linux/loongarch32.zig | 19 +++++++++++++++++++ lib/std/os/linux/loongarch64.zig | 19 +++++++++++++++++++ 2 files changed, 38 insertions(+) diff --git a/lib/std/os/linux/loongarch32.zig b/lib/std/os/linux/loongarch32.zig index c5d1589aa3df476dbb638ae7dce6bb28a3e3bd39..0be8dc5465eaf01142c974b3a0d51faef2659b49 100644 --- a/lib/std/os/linux/loongarch32.zig +++ b/lib/std/os/linux/loongarch32.zig @@ -161,3 +161,22 @@ pub const VDSO = struct { pub const CGT_SYM = "__vdso_clock_gettime"; pub const CGT_VER = "LINUX_5.10"; }; + +pub const HWCAP = struct { + pub const CPUCFG = 1 << 0; + pub const LAM = 1 << 1; + pub const UAL = 1 << 2; + pub const FPU = 1 << 3; + pub const LSX = 1 << 4; + pub const LASX = 1 << 5; + pub const CRC32 = 1 << 6; + pub const COMPLEX = 1 << 7; + pub const CRYPTO = 1 << 8; + pub const LVZ = 1 << 9; + pub const LBT_X86 = 1 << 10; + pub const LBT_ARM = 1 << 11; + pub const LBT_MIPS = 1 << 12; + pub const PTW = 1 << 13; + pub const LSPW = 1 << 14; + pub const SCQ = 1 << 15; +}; diff --git a/lib/std/os/linux/loongarch64.zig b/lib/std/os/linux/loongarch64.zig index 283a4de13484c7489bca7a48d3714ae5136291f4..08d2c486ee027dc1f92e1a9c79099ae4f446471b 100644 --- a/lib/std/os/linux/loongarch64.zig +++ b/lib/std/os/linux/loongarch64.zig @@ -160,3 +160,22 @@ pub const VDSO = struct { pub const CGT_SYM = "__vdso_clock_gettime"; pub const CGT_VER = "LINUX_5.10"; }; + +pub const HWCAP = struct { + pub const CPUCFG = 1 << 0; + pub const LAM = 1 << 1; + pub const UAL = 1 << 2; + pub const FPU = 1 << 3; + pub const LSX = 1 << 4; + pub const LASX = 1 << 5; + pub const CRC32 = 1 << 6; + pub const COMPLEX = 1 << 7; + pub const CRYPTO = 1 << 8; + pub const LVZ = 1 << 9; + pub const LBT_X86 = 1 << 10; + pub const LBT_ARM = 1 << 11; + pub const LBT_MIPS = 1 << 12; + pub const PTW = 1 << 13; + pub const LSPW = 1 << 14; + pub const SCQ = 1 << 15; +}; -- 2.54.0