diff --git a/lib/std/os/plan9.zig b/lib/std/os/plan9.zig index 99e25709b1bcd0ed8a9d9fbc41399b3cd594e94a..6d052a35731339981ccb88ff917766857eb17c6d 100644 --- a/lib/std/os/plan9.zig +++ b/lib/std/os/plan9.zig @@ -1,7 +1,7 @@ const std = @import("../std.zig"); const builtin = @import("builtin"); -pub const syscall_bits = switch (builtin.stage2_arch) { +pub const syscall_bits = switch (builtin.cpu.arch) { .x86_64 => @import("plan9/x86_64.zig"), else => @compileError("more plan9 syscall implementations (needs more inline asm in stage2"), }; diff --git a/lib/std/start.zig b/lib/std/start.zig index 8ea261be2da3458fba087d3cbe165eee5e06a7ce..e6a7b7991aea95d6c66f38c1e094372c9cc8a8e6 100644 --- a/lib/std/start.zig +++ b/lib/std/start.zig @@ -131,7 +131,7 @@ fn wWinMainCRTStartup2() callconv(.C) noreturn { fn exit2(code: usize) noreturn { switch (native_os) { - .linux => switch (builtin.stage2_arch) { + .linux => switch (builtin.cpu.arch) { .x86_64 => { asm volatile ("syscall" : @@ -175,7 +175,7 @@ fn exit2(code: usize) noreturn { else => @compileError("TODO"), }, // exits(0) - .plan9 => switch (builtin.stage2_arch) { + .plan9 => switch (builtin.cpu.arch) { .x86_64 => { asm volatile ( \\push $0 diff --git a/src/Compilation.zig b/src/Compilation.zig index 17ffe356a37a0a242100804a81d73e6d17982d88..d3816e542cfecf8969f9b37ed9975a214e5851e3 100644 --- a/src/Compilation.zig +++ b/src/Compilation.zig @@ -4763,8 +4763,6 @@ pub fn generateBuiltinZigSource(comp: *Compilation, allocator: Allocator) Alloca \\/// feature detection (i.e. with `@hasDecl` or `@hasField`) over version checks. \\pub const zig_version = std.SemanticVersion.parse("{s}") catch unreachable; \\pub const zig_backend = std.builtin.CompilerBackend.{}; - \\/// Temporary until self-hosted supports the `cpu.arch` value. - \\pub const stage2_arch: std.Target.Cpu.Arch = .{}; \\ \\pub const output_mode = std.builtin.OutputMode.{}; \\pub const link_mode = std.builtin.LinkMode.{}; @@ -4779,7 +4777,6 @@ pub fn generateBuiltinZigSource(comp: *Compilation, allocator: Allocator) Alloca , .{ build_options.version, std.zig.fmtId(@tagName(zig_backend)), - std.zig.fmtId(@tagName(target.cpu.arch)), std.zig.fmtId(@tagName(comp.bin_file.options.output_mode)), std.zig.fmtId(@tagName(comp.bin_file.options.link_mode)), comp.bin_file.options.is_test, diff --git a/src/stage1/codegen.cpp b/src/stage1/codegen.cpp index 8b8844629572d4de7f2f60a6039d50c6410b7d17..7010e736dc041c618023cefe12e0af458a9e3fc8 100644 --- a/src/stage1/codegen.cpp +++ b/src/stage1/codegen.cpp @@ -10076,7 +10076,6 @@ Buf *codegen_generate_builtin_source(CodeGen *g) { buf_appendf(contents, "pub const single_threaded = %s;\n", bool_to_str(g->is_single_threaded)); buf_appendf(contents, "pub const abi = std.Target.Abi.%s;\n", cur_abi); buf_appendf(contents, "pub const cpu = std.Target.Cpu.baseline(.%s);\n", cur_arch); - buf_appendf(contents, "pub const stage2_arch: std.Target.Cpu.Arch = .%s;\n", cur_arch); buf_appendf(contents, "pub const os = std.Target.Os.Tag.defaultVersionRange(.%s, .%s);\n", cur_os, cur_arch); buf_appendf(contents, "pub const target = std.Target{\n" diff --git a/test/behavior.zig b/test/behavior.zig index 813c410f7b85840d48c84c41ee1ac02588e63f0e..fee61f5e0921ad3809aa3927a63fa8df402b3e52 100644 --- a/test/behavior.zig +++ b/test/behavior.zig @@ -159,7 +159,7 @@ test { _ = @import("behavior/while.zig"); _ = @import("behavior/widening.zig"); - if (builtin.stage2_arch == .wasm32) { + if (builtin.cpu.arch == .wasm32) { _ = @import("behavior/wasm.zig"); } diff --git a/test/behavior/struct.zig b/test/behavior/struct.zig index 377cbb56f4a7ca6c2a34367fa42a55262c6827ed..eb29c9038d7a452362cc745e40c8dca7fba03d21 100644 --- a/test/behavior/struct.zig +++ b/test/behavior/struct.zig @@ -963,7 +963,7 @@ test "tuple assigned to variable" { test "comptime struct field" { if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO - if (builtin.stage2_arch == .arm) return error.SkipZigTest; // TODO + if (builtin.cpu.arch == .arm) return error.SkipZigTest; // TODO const T = struct { a: i32, diff --git a/test/cases/compile_errors/reify_type_for_tagged_union_with_extra_union_field.zig b/test/cases/compile_errors/reify_type_for_tagged_union_with_extra_union_field.zig deleted file mode 100644 index ee557cd6c2ee3e3f20ca924ba9ef4006251ab683..0000000000000000000000000000000000000000 --- a/test/cases/compile_errors/reify_type_for_tagged_union_with_extra_union_field.zig +++ /dev/null @@ -1,35 +0,0 @@ -const Tag = @Type(.{ - .Enum = .{ - .layout = .Auto, - .tag_type = u1, - .fields = &.{ - .{ .name = "signed", .value = 0 }, - .{ .name = "unsigned", .value = 1 }, - }, - .decls = &.{}, - .is_exhaustive = true, - }, -}); -const Tagged = @Type(.{ - .Union = .{ - .layout = .Auto, - .tag_type = Tag, - .fields = &.{ - .{ .name = "signed", .field_type = i32, .alignment = @alignOf(i32) }, - .{ .name = "unsigned", .field_type = u32, .alignment = @alignOf(u32) }, - .{ .name = "arst", .field_type = f32, .alignment = @alignOf(f32) }, - }, - .decls = &.{}, - }, -}); -export fn entry() void { - var tagged = Tagged{ .signed = -1 }; - tagged = .{ .unsigned = 1 }; -} - -// error -// backend=stage2 -// target=native -// -// :13:16: error: no field named 'arst' in enum 'tmp.Tag__enum_266' -// :1:13: note: enum declared here diff --git a/test/cases/riscv64-linux/hello_world_with_updates.0.zig b/test/cases/riscv64-linux/hello_world_with_updates.0.zig deleted file mode 100644 index dd119fd1f4366a089f62a796daf96cf437a43f04..0000000000000000000000000000000000000000 --- a/test/cases/riscv64-linux/hello_world_with_updates.0.zig +++ /dev/null @@ -1,21 +0,0 @@ -pub fn main() void { - print(); -} - -fn print() void { - asm volatile ("ecall" - : - : [number] "{a7}" (64), - [arg1] "{a0}" (1), - [arg2] "{a1}" (@ptrToInt("Hello, World!\n")), - [arg3] "{a2}" ("Hello, World!\n".len), - : "rcx", "r11", "memory" - ); - return; -} - -// run -// target=riscv64-linux -// -// Hello, World! -// diff --git a/test/cases/riscv64-linux/hello_world_with_updates.1.zig b/test/cases/riscv64-linux/hello_world_with_updates.1.zig deleted file mode 100644 index 26718738a9ed459aeb650db31628ad2f2b7de0c6..0000000000000000000000000000000000000000 --- a/test/cases/riscv64-linux/hello_world_with_updates.1.zig +++ /dev/null @@ -1,27 +0,0 @@ -pub fn main() void { - print(); - print(); - print(); - print(); -} - -fn print() void { - asm volatile ("ecall" - : - : [number] "{a7}" (64), - [arg1] "{a0}" (1), - [arg2] "{a1}" (@ptrToInt("Hello, World!\n")), - [arg3] "{a2}" ("Hello, World!\n".len), - : "rcx", "r11", "memory" - ); - return; -} - -// run -// target=riscv64-linux -// -// Hello, World! -// Hello, World! -// Hello, World! -// Hello, World! -//