| author |  Andrew Kelley <andrew@ziglang.org> 2023-09-18 21:24:50-07:00 |
| committer | Andrew Kelley <andrew@ziglang.org> 2023-09-19 00:43:21-07:00 |
| log | 3e79315d19c7dfe5f9b90185d8030209ef8dd829 |
| tree | 28be901fb7fa95af1e73bd4c6b8297421b916570 |
| parent | f91ff9a746ff97945dacc8114c073bd279f68f17 |
x86 backend: don't read bogus safety flag
Safety is not a global flag that should be enabled or disabled for all
stores - it's lowered by the frontend directly into AIR instruction
semantics. The flag for this is communicated via the `store` vs
`store_safe` AIR instructions, and whether to write 0xaa bytes or not
should be decided in `airStore` and passed down via function parameters.
This commit is a step backwards since it removes functionality but it
aims our feet towards a better mountain to climb.3 files changed, 6 insertions(+), 16 deletions(-)
src- arch
- x86_64
- test
- behavior
src/arch/x86_64/CodeGen.zig+3-15
| ... | ... | @@ -1934,7 +1934,7 @@ fn genBody(self: *Self, body: []const Air.Inst.Index) InnerError!void { |
| 1934 | 1934 | .ptr_elem_ptr => try self.airPtrElemPtr(inst), |
| 1935 | 1935 | |
| 1936 | 1936 | .inferred_alloc, .inferred_alloc_comptime => unreachable, |
| 1937 | .unreach => if (self.wantSafety()) try self.airTrap() else self.finishAirBookkeeping(), | |
| 1937 | .unreach => self.finishAirBookkeeping(), | |
| 1938 | 1938 | |
| 1939 | 1939 | .optional_payload => try self.airOptionalPayload(inst), |
| 1940 | 1940 | .optional_payload_ptr => try self.airOptionalPayloadPtr(inst), |
| ... | ... | @@ -9813,8 +9813,7 @@ fn genSetReg(self: *Self, dst_reg: Register, ty: Type, src_mcv: MCValue) InnerEr |
| 9813 | 9813 | .register_overflow, |
| 9814 | 9814 | .reserved_frame, |
| 9815 | 9815 | => unreachable, |
| 9816 | .undef => if (self.wantSafety()) | |
| 9817 | try self.genSetReg(dst_reg.to64(), Type.usize, .{ .immediate = 0xaaaaaaaaaaaaaaaa }), | |
| 9816 | .undef => {}, | |
| 9818 | 9817 | .eflags => |cc| try self.asmSetccRegister(dst_reg.to8(), cc), |
| 9819 | 9818 | .immediate => |imm| { |
| 9820 | 9819 | if (imm == 0) { |
| ... | ... | @@ -10098,8 +10097,7 @@ fn genSetMem(self: *Self, base: Memory.Base, disp: i32, ty: Type, src_mcv: MCVal |
| 10098 | 10097 | }; |
| 10099 | 10098 | switch (src_mcv) { |
| 10100 | 10099 | .none, .unreach, .dead, .reserved_frame => unreachable, |
| 10101 | .undef => if (self.wantSafety()) | |
| 10102 | try self.genInlineMemset(dst_ptr_mcv, .{ .immediate = 0xaa }, .{ .immediate = abi_size }), | |
| 10100 | .undef => {}, | |
| 10103 | 10101 | .immediate => |imm| switch (abi_size) { |
| 10104 | 10102 | 1, 2, 4 => { |
| 10105 | 10103 | const immediate = if (ty.isSignedInt(mod)) |
| ... | ... | @@ -12016,16 +12014,6 @@ fn resolveCallingConventionValues( |
| 12016 | 12014 | return result; |
| 12017 | 12015 | } |
| 12018 | 12016 | |
| 12019 | /// TODO support scope overrides. Also note this logic is duplicated with `Module.wantSafety`. | |
| 12020 | fn wantSafety(self: *Self) bool { | |
| 12021 | return switch (self.bin_file.options.optimize_mode) { | |
| 12022 | .Debug => true, | |
| 12023 | .ReleaseSafe => true, | |
| 12024 | .ReleaseFast => false, | |
| 12025 | .ReleaseSmall => false, | |
| 12026 | }; | |
| 12027 | } | |
| 12028 | ||
| 12029 | 12017 | fn fail(self: *Self, comptime format: []const u8, args: anytype) InnerError { |
| 12030 | 12018 | @setCold(true); |
| 12031 | 12019 | assert(self.err_msg == null); |
test/behavior/cast.zig+2-1
| ... | ... | @@ -334,10 +334,11 @@ test "*const ?[*]const T to [*c]const [*c]const T" { |
| 334 | 334 | try expect(b[0][1] == 'k'); |
| 335 | 335 | } |
| 336 | 336 | |
| 337 | test "array coersion to undefined at runtime" { | |
| 337 | test "array coercion to undefined at runtime" { | |
| 338 | 338 | if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; |
| 339 | 339 | if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO |
| 340 | 340 | if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; |
| 341 | if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; | |
| 341 | 342 | |
| 342 | 343 | @setRuntimeSafety(true); |
| 343 | 344 |
test/behavior/int128.zig+1
| ... | ... | @@ -28,6 +28,7 @@ test "undefined 128 bit int" { |
| 28 | 28 | if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO |
| 29 | 29 | if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO |
| 30 | 30 | if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; |
| 31 | if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; | |
| 31 | 32 | |
| 32 | 33 | @setRuntimeSafety(true); |
| 33 | 34 |