authorgravatar for joachim.schmidt557@outlook.comJoachim Schmidt <joachim.schmidt557@outlook.com> 2022-03-07 19:33:58+01:00
committergravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-03-08 10:54:08+01:00
log3ea603c82a3b7b5d45f21e35d8ce9f6029ff6c3a
tree67133695c22d9483f270b1d4a4bb61359a459c72
parentba17552b4eb8def495053013eebbe39fc324c8ae

stage2 ARM: implement ptr_add, ptr_sub for all element sizes

Also reduces slice_elem_val to ptr_add, simplifying the implementation

4 files changed, 34 insertions(+), 69 deletions(-)

src/arch/arm/CodeGen.zig+34-66
......@@ -1434,29 +1434,11 @@ fn airSliceElemVal(self: *Self, inst: Air.Inst.Index) !void {
14341434 break :result dst_mcv;
14351435 },
14361436 else => {
1437 const dst_mcv = try self.allocRegOrMem(inst, true);
1437 const dest = try self.allocRegOrMem(inst, true);
1438 const addr = try self.binOp(.ptr_add, null, base_mcv, index_mcv, slice_ty, Type.usize);
1439 try self.load(dest, addr, slice_ptr_field_type);
14381440
1439 const offset_mcv = try self.binOp(
1440 .mul,
1441 null,
1442 index_mcv,
1443 .{ .immediate = elem_size },
1444 Type.usize,
1445 Type.usize,
1446 );
1447 assert(offset_mcv == .register); // result of multiplication should always be register
1448 self.register_manager.freezeRegs(&.{offset_mcv.register});
1449
1450 const addr_mcv = try self.binOp(.add, null, base_mcv, offset_mcv, Type.usize, Type.usize);
1451
1452 // At this point in time, neither the base register
1453 // nor the offset register contains any valuable data
1454 // anymore.
1455 self.register_manager.unfreezeRegs(&.{ base_mcv.register, offset_mcv.register });
1456
1457 try self.load(dst_mcv, addr_mcv, slice_ptr_field_type);
1458
1459 break :result dst_mcv;
1441 break :result dest;
14601442 },
14611443 }
14621444 };
......@@ -1710,6 +1692,8 @@ fn store(self: *Self, ptr: MCValue, value: MCValue, ptr_ty: Type, value_ty: Type
17101692 defer self.register_manager.unfreezeRegs(&.{addr_reg});
17111693
17121694 switch (value) {
1695 .dead => unreachable,
1696 .undef => unreachable,
17131697 .register => |value_reg| {
17141698 try self.genStrRegister(value_reg, addr_reg, value_ty);
17151699 },
......@@ -2140,7 +2124,7 @@ fn binOp(
21402124 rhs: MCValue,
21412125 lhs_ty: Type,
21422126 rhs_ty: Type,
2143) !MCValue {
2127) InnerError!MCValue {
21442128 switch (tag) {
21452129 .add,
21462130 .sub,
......@@ -2281,16 +2265,21 @@ fn binOp(
22812265 switch (lhs_ty.zigTypeTag()) {
22822266 .Pointer => {
22832267 const ptr_ty = lhs_ty;
2284 const pointee_ty = switch (ptr_ty.ptrSize()) {
2268 const elem_ty = switch (ptr_ty.ptrSize()) {
22852269 .One => ptr_ty.childType().childType(), // ptr to array, so get array element type
22862270 else => ptr_ty.childType(),
22872271 };
2272 const elem_size = @intCast(u32, elem_ty.abiSize(self.target.*));
22882273
2289 if (pointee_ty.abiSize(self.target.*) > 1) {
2290 return self.fail("TODO ptr_add, ptr_sub with more element sizes", .{});
2274 if (elem_size == 1) {
2275 return try self.binOpRegister(tag, maybe_inst, lhs, rhs, lhs_ty, rhs_ty);
2276 } else {
2277 // convert the offset into a byte offset by
2278 // multiplying it with elem_size
2279 const offset = try self.binOp(.mul, null, rhs, .{ .immediate = elem_size }, Type.usize, Type.usize);
2280 const addr = try self.binOp(tag, null, lhs, offset, Type.initTag(.manyptr_u8), Type.usize);
2281 return addr;
22912282 }
2292
2293 return try self.binOpRegister(tag, maybe_inst, lhs, rhs, lhs_ty, rhs_ty);
22942283 },
22952284 else => unreachable,
22962285 }
......@@ -3494,6 +3483,12 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro
34943483 const reg = try self.copyToTmpRegister(ty, mcv);
34953484 return self.genSetStack(ty, stack_offset, MCValue{ .register = reg });
34963485 } else {
3486 var ptr_ty_payload: Type.Payload.ElemType = .{
3487 .base = .{ .tag = .single_mut_pointer },
3488 .data = ty,
3489 };
3490 const ptr_ty = Type.initPayload(&ptr_ty_payload.base);
3491
34973492 // TODO call extern memcpy
34983493 const regs = try self.register_manager.allocRegs(5, .{ null, null, null, null, null });
34993494 const src_reg = regs[0];
......@@ -3505,20 +3500,9 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro
35053500 switch (mcv) {
35063501 .stack_offset => |off| {
35073502 // sub src_reg, fp, #off
3508 const adj_src_offset = off + @intCast(u32, abi_size);
3509 const src_offset_op: Instruction.Operand = if (Instruction.Operand.fromU32(adj_src_offset)) |x| x else {
3510 return self.fail("TODO load: set reg to stack offset with all possible offsets", .{});
3511 };
3512 _ = try self.addInst(.{
3513 .tag = .sub,
3514 .data = .{ .rr_op = .{
3515 .rd = src_reg,
3516 .rn = .fp,
3517 .op = src_offset_op,
3518 } },
3519 });
3503 try self.genSetReg(ptr_ty, src_reg, .{ .ptr_stack_offset = off });
35203504 },
3521 .memory => |addr| try self.genSetReg(Type.usize, src_reg, .{ .immediate = @intCast(u32, addr) }),
3505 .memory => |addr| try self.genSetReg(ptr_ty, src_reg, .{ .immediate = @intCast(u32, addr) }),
35223506 .embedded_in_code,
35233507 .stack_argument_offset,
35243508 => return self.fail("TODO genSetStack with src={}", .{mcv}),
......@@ -3526,18 +3510,7 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro
35263510 }
35273511
35283512 // sub dst_reg, fp, #stack_offset
3529 const adj_dst_offset = stack_offset + abi_size;
3530 const dst_offset_op: Instruction.Operand = if (Instruction.Operand.fromU32(adj_dst_offset)) |x| x else {
3531 return self.fail("TODO load: set reg to stack offset with all possible offsets", .{});
3532 };
3533 _ = try self.addInst(.{
3534 .tag = .sub,
3535 .data = .{ .rr_op = .{
3536 .rd = dst_reg,
3537 .rn = .fp,
3538 .op = dst_offset_op,
3539 } },
3540 });
3513 try self.genSetReg(ptr_ty, dst_reg, .{ .ptr_stack_offset = stack_offset });
35413514
35423515 // mov len, #abi_size
35433516 try self.genSetReg(Type.usize, len_reg, .{ .immediate = abi_size });
......@@ -3882,6 +3855,12 @@ fn genSetStackArgument(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) I
38823855 const reg = try self.copyToTmpRegister(ty, mcv);
38833856 return self.genSetStackArgument(ty, stack_offset, MCValue{ .register = reg });
38843857 } else {
3858 var ptr_ty_payload: Type.Payload.ElemType = .{
3859 .base = .{ .tag = .single_mut_pointer },
3860 .data = ty,
3861 };
3862 const ptr_ty = Type.initPayload(&ptr_ty_payload.base);
3863
38853864 // TODO call extern memcpy
38863865 const regs = try self.register_manager.allocRegs(5, .{ null, null, null, null, null });
38873866 const src_reg = regs[0];
......@@ -3893,20 +3872,9 @@ fn genSetStackArgument(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) I
38933872 switch (mcv) {
38943873 .stack_offset => |off| {
38953874 // sub src_reg, fp, #off
3896 const adj_src_offset = off + abi_size;
3897 const src_offset_op: Instruction.Operand = if (Instruction.Operand.fromU32(adj_src_offset)) |x| x else {
3898 return self.fail("TODO load: set reg to stack offset with all possible offsets", .{});
3899 };
3900 _ = try self.addInst(.{
3901 .tag = .sub,
3902 .data = .{ .rr_op = .{
3903 .rd = src_reg,
3904 .rn = .fp,
3905 .op = src_offset_op,
3906 } },
3907 });
3875 try self.genSetReg(ptr_ty, src_reg, .{ .ptr_stack_offset = off });
39083876 },
3909 .memory => |addr| try self.genSetReg(Type.usize, src_reg, .{ .immediate = @intCast(u32, addr) }),
3877 .memory => |addr| try self.genSetReg(ptr_ty, src_reg, .{ .immediate = @intCast(u32, addr) }),
39103878 .stack_argument_offset,
39113879 .embedded_in_code,
39123880 => return self.fail("TODO genSetStackArgument src={}", .{mcv}),
test/behavior/align.zig-1
......@@ -105,7 +105,6 @@ fn fnWithAlignedStack() i32 {
105105test "implicitly decreasing slice alignment" {
106106 if (builtin.zig_backend == .stage2_c) return error.SkipZigTest;
107107 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
108 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
109108
110109 const a: u32 align(4) = 3;
111110 const b: u32 align(8) = 4;
test/behavior/array.zig-1
......@@ -8,7 +8,6 @@ const expectEqual = testing.expectEqual;
88test "array to slice" {
99 if (builtin.zig_backend == .stage2_c) return error.SkipZigTest;
1010 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
11 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
1211
1312 const a: u32 align(4) = 3;
1413 const b: u32 align(8) = 4;
test/behavior/cast.zig-1
......@@ -984,7 +984,6 @@ test "peer type resolve array pointers, one of them const" {
984984test "peer type resolve array pointer and unknown pointer" {
985985 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
986986 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
987 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
988987 if (builtin.zig_backend == .stage2_c) return error.SkipZigTest; // TODO
989988
990989 const const_array: [4]u8 = undefined;