| author |  LemonBoy <thatlemon@gmail.com> 2021-05-03 12:30:18+02:00 |
| committer | LemonBoy <thatlemon@gmail.com> 2021-05-03 12:32:13+02:00 |
| log | 3eed61340784af95a92e2035712eeaeab7cf0ad3 |
| tree | 763495c6a14e883ef9b0077561f3763b1680ebc1 |
| parent | e2d2295382164776d32997d5806b9829525d7875 |
std: Add two more ARM CPUs to the known CPU list
Modeled after GCC's description.3 files changed, 46 insertions(+), 0 deletions(-)
lib- std
- target
- zig
- system
lib/std/target/aarch64.zig+18
| ... | @@ -1621,6 +1621,16 @@ pub const cpu = struct { | ... | @@ -1621,6 +1621,16 @@ pub const cpu = struct { |
| 1621 | .apple_a7, | 1621 | .apple_a7, |
| 1622 | }), | 1622 | }), |
| 1623 | }; | 1623 | }; |
| 1624 | pub const emag = CpuModel{ | ||
| 1625 | .name = "emag", | ||
| 1626 | .llvm_name = null, | ||
| 1627 | .features = featureSet(&[_]Feature{ | ||
| 1628 | .crc, | ||
| 1629 | .crypto, | ||
| 1630 | .perfmon, | ||
| 1631 | .v8a, | ||
| 1632 | }), | ||
| 1633 | }; | ||
| 1624 | pub const exynos_m1 = CpuModel{ | 1634 | pub const exynos_m1 = CpuModel{ |
| 1625 | .name = "exynos_m1", | 1635 | .name = "exynos_m1", |
| 1626 | .llvm_name = null, | 1636 | .llvm_name = null, |
| ... | @@ -1867,4 +1877,12 @@ pub const cpu = struct { | ... | @@ -1867,4 +1877,12 @@ pub const cpu = struct { |
| 1867 | .v8_2a, | 1877 | .v8_2a, |
| 1868 | }), | 1878 | }), |
| 1869 | }; | 1879 | }; |
| 1880 | pub const xgene1 = CpuModel{ | ||
| 1881 | .name = "xgene1", | ||
| 1882 | .llvm_name = null, | ||
| 1883 | .features = featureSet(&[_]Feature{ | ||
| 1884 | .perfmon, | ||
| 1885 | .v8a, | ||
| 1886 | }), | ||
| 1887 | }; | ||
| 1870 | }; | 1888 | }; |
lib/std/zig/system/linux.zig+6
| ... | @@ -239,6 +239,11 @@ const ArmCpuinfoImpl = struct { | ... | @@ -239,6 +239,11 @@ const ArmCpuinfoImpl = struct { |
| 239 | const Nvidia = [_]E{ | 239 | const Nvidia = [_]E{ |
| 240 | E{ .part = 0x004, .m64 = &A64.carmel }, | 240 | E{ .part = 0x004, .m64 = &A64.carmel }, |
| 241 | }; | 241 | }; |
| 242 | // implementer = 0x50 | ||
| 243 | const Ampere = [_]E{ | ||
| 244 | E{ .part = 0x000, .variant = 3, .m64 = &A64.emag }, | ||
| 245 | E{ .part = 0x000, .m64 = &A64.xgene1 }, | ||
| 246 | }; | ||
| 242 | // implementer = 0x51 | 247 | // implementer = 0x51 |
| 243 | const Qualcomm = [_]E{ | 248 | const Qualcomm = [_]E{ |
| 244 | E{ .part = 0x06f, .m32 = &A32.krait }, | 249 | E{ .part = 0x06f, .m32 = &A32.krait }, |
| ... | @@ -262,6 +267,7 @@ const ArmCpuinfoImpl = struct { | ... | @@ -262,6 +267,7 @@ const ArmCpuinfoImpl = struct { |
| 262 | 0x43 => &Cavium, | 267 | 0x43 => &Cavium, |
| 263 | 0x46 => &Fujitsu, | 268 | 0x46 => &Fujitsu, |
| 264 | 0x48 => &HiSilicon, | 269 | 0x48 => &HiSilicon, |
| 270 | 0x50 => &Ampere, | ||
| 265 | 0x51 => &Qualcomm, | 271 | 0x51 => &Qualcomm, |
| 266 | else => return null, | 272 | else => return null, |
| 267 | }; | 273 | }; |
tools/update_cpu_features.zig+22
| ... | @@ -239,6 +239,28 @@ const llvm_targets = [_]LlvmTarget{ | ... | @@ -239,6 +239,28 @@ const llvm_targets = [_]LlvmTarget{ |
| 239 | "zcz_fp", | 239 | "zcz_fp", |
| 240 | }, | 240 | }, |
| 241 | }, | 241 | }, |
| 242 | .{ | ||
| 243 | .llvm_name = null, | ||
| 244 | .zig_name = "xgene1", | ||
| 245 | .features = &.{ | ||
| 246 | "fp_armv8", | ||
| 247 | "neon", | ||
| 248 | "perfmon", | ||
| 249 | "v8a", | ||
| 250 | }, | ||
| 251 | }, | ||
| 252 | .{ | ||
| 253 | .llvm_name = null, | ||
| 254 | .zig_name = "emag", | ||
| 255 | .features = &.{ | ||
| 256 | "crc", | ||
| 257 | "crypto", | ||
| 258 | "fp_armv8", | ||
| 259 | "neon", | ||
| 260 | "perfmon", | ||
| 261 | "v8a", | ||
| 262 | }, | ||
| 263 | }, | ||
| 242 | }, | 264 | }, |
| 243 | }, | 265 | }, |
| 244 | .{ | 266 | .{ |