From 48821ea886e29c5568cd2036cd46ca435550aaa3 Mon Sep 17 00:00:00 2001
From: Ali Cheraghi <alichraghi@proton.me>
Date: Wed, 8 Jul 2026 17:06:51 +0330
Subject: [PATCH] spirv: always emit int64 cap for spirv64

---
 lib/std/Target.zig            |  3 ++-
 src/codegen/spirv/CodeGen.zig | 11 +++++++----
 src/link/SpirV.zig            |  9 ++++++---
 3 files changed, 15 insertions(+), 8 deletions(-)

diff --git a/lib/std/Target.zig b/lib/std/Target.zig
index 387f96d04b75c647832e946bfe1d2cacc5c78e15..fdd462e5d684af3c9f5d6e3eeb9ac6d139db3480 100644
--- a/lib/std/Target.zig
+++ b/lib/std/Target.zig
@@ -2334,7 +2334,8 @@ pub fn supportsAddressSpace(
         .constant => (is_gpu and (context == null or context == .constant)) or
             (is_spirv and (context == null or context == .constant or context == .pointer)),
         .param => is_nvptx,
-        .input, .output, .uniform, .push_constant, .storage_buffer, .physical_storage_buffer => is_spirv,
+        .input, .output, .uniform, .push_constant, .storage_buffer => is_spirv,
+        .physical_storage_buffer => arch == .spirv64,
         .externref, .funcref => target.cpu.has(.wasm, .reference_types),
     };
 }
diff --git a/src/codegen/spirv/CodeGen.zig b/src/codegen/spirv/CodeGen.zig
index ea67f6d0c86dd6b9464f0ba47f8b4233d32d8e73..b90be9c093e0e63d3ad32aaec53c4b695bf0d527 100644
--- a/src/codegen/spirv/CodeGen.zig
+++ b/src/codegen/spirv/CodeGen.zig
@@ -53,9 +53,12 @@ tracked_allocas: std.AutoHashMapUnmanaged(Id, ?Id) = .empty,
 loop_switches: std.AutoHashMapUnmanaged(Air.Inst.Index, LoopSwitch) = .empty,
 id_scratch: std.ArrayList(Id) = .empty,
 
+fn hasInt64(target: *const std.Target) bool {
+    return target.cpu.arch == .spirv64 or target.cpu.has(.spirv, .int64);
+}
+
 fn bigIntBits(cg: *const CodeGen) u16 {
-    const target = cg.zcu.getTarget();
-    return if (target.cpu.has(.spirv, .int64)) 64 else 32;
+    return if (hasInt64(cg.zcu.getTarget())) 64 else 32;
 }
 
 fn limbType(cg: *const CodeGen) Type {
@@ -487,7 +490,7 @@ pub fn backingIntBits(cg: *const CodeGen, bits: u16) struct { u16, bool } {
         .{ .bits = 8, .enabled = target.cpu.has(.spirv, .int8) },
         .{ .bits = 16, .enabled = target.cpu.has(.spirv, .int16) },
         .{ .bits = 32, .enabled = true },
-        .{ .bits = 64, .enabled = target.cpu.has(.spirv, .int64) or target.cpu.arch == .spirv64 },
+        .{ .bits = 64, .enabled = hasInt64(target) },
     };
 
     for (ints) |int| {
@@ -5273,7 +5276,7 @@ fn airMulOverflow(cg: *CodeGen, inst: Air.Inst.Index) !?Id {
     //   of the result too.
 
     const target = cg.zcu.getTarget();
-    const largest_int_bits: u16 = if (target.cpu.has(.spirv, .int64) or target.cpu.arch == .spirv64) 64 else 32;
+    const largest_int_bits: u16 = if (hasInt64(target)) 64 else 32;
     // If non-null, the number of bits that the multiplication should be performed in. If
     // null, we have to use wide multiplication.
     const maybe_op_ty_bits: ?u16 = switch (info.bits) {
diff --git a/src/link/SpirV.zig b/src/link/SpirV.zig
index be2e2e47ec30e6fb699cf175d17994d392f34da5..aeb6217f5dcc5c83681bb9aea5cbaa8dc4821801 100644
--- a/src/link/SpirV.zig
+++ b/src/link/SpirV.zig
@@ -621,9 +621,12 @@ fn emitPreamble(
         },
         else => unreachable,
     }
-    if (target.os.tag == .vulkan and target.cpu.arch == .spirv64) {
-        caps.insert(.physical_storage_buffer_addresses);
-        try exts.put(gpa, "SPV_KHR_physical_storage_buffer", {});
+    if (target.cpu.arch == .spirv64) {
+        caps.insert(.int64);
+        if (target.os.tag == .vulkan) {
+            caps.insert(.physical_storage_buffer_addresses);
+            try exts.put(gpa, "SPV_KHR_physical_storage_buffer", {});
+        }
     }
     if (has_linkage) caps.insert(.linkage);
 
-- 
2.54.0