authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2025-02-05 12:58:32+01:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2025-04-04 06:08:09+02:00
log4de368a1b64c3d5a311b409f31eaa3b8b4157951
treec1a23a36bbc1816d45a7d22658cc44c6d162e65f
parent8ea2e1ded522ae972fc201ca52cbc6e752c1d405
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

std.Target: Update CPU models/features for LLVM 20.

Closes #21818.

17 files changed, 2034 insertions(+), 400 deletions(-)

lib/std/Target/aarch64.zig+279-64
...@@ -16,7 +16,7 @@ pub const Feature = enum {...@@ -16,7 +16,7 @@ pub const Feature = enum {
16 arith_bcc_fusion,16 arith_bcc_fusion,
17 arith_cbz_fusion,17 arith_cbz_fusion,
18 ascend_store_address,18 ascend_store_address,
19 b16b16,19 avoid_ldapur,
20 balance_fp_ops,20 balance_fp_ops,
21 bf16,21 bf16,
22 brbe,22 brbe,
...@@ -36,6 +36,7 @@ pub const Feature = enum {...@@ -36,6 +36,7 @@ pub const Feature = enum {
36 chk,36 chk,
37 clrbhb,37 clrbhb,
38 cmp_bcc_fusion,38 cmp_bcc_fusion,
39 cmpbr,
39 complxnum,40 complxnum,
40 contextidr_el2,41 contextidr_el2,
41 cpa,42 cpa,
...@@ -56,6 +57,8 @@ pub const Feature = enum {...@@ -56,6 +57,8 @@ pub const Feature = enum {
56 exynos_cheap_as_move,57 exynos_cheap_as_move,
57 f32mm,58 f32mm,
58 f64mm,59 f64mm,
60 f8f16mm,
61 f8f32mm,
59 faminmax,62 faminmax,
60 fgt,63 fgt,
61 fix_cortex_a53_835769,64 fix_cortex_a53_835769,
...@@ -69,7 +72,9 @@ pub const Feature = enum {...@@ -69,7 +72,9 @@ pub const Feature = enum {
69 fp8fma,72 fp8fma,
70 fp_armv8,73 fp_armv8,
71 fpac,74 fpac,
75 fprcvt,
72 fptoint,76 fptoint,
77 fujitsu_monaka,
73 fullfp16,78 fullfp16,
74 fuse_address,79 fuse_address,
75 fuse_addsub_2reg_const1,80 fuse_addsub_2reg_const1,
...@@ -94,6 +99,8 @@ pub const Feature = enum {...@@ -94,6 +99,8 @@ pub const Feature = enum {
94 lse,99 lse,
95 lse128,100 lse128,
96 lse2,101 lse2,
102 lsfe,
103 lsui,
97 lut,104 lut,
98 mec,105 mec,
99 mops,106 mops,
...@@ -106,12 +113,15 @@ pub const Feature = enum {...@@ -106,12 +113,15 @@ pub const Feature = enum {
106 no_sve_fp_ld1r,113 no_sve_fp_ld1r,
107 no_zcz_fp,114 no_zcz_fp,
108 nv,115 nv,
116 occmo,
109 outline_atomics,117 outline_atomics,
110 pan,118 pan,
111 pan_rwv,119 pan_rwv,
112 pauth,120 pauth,
113 pauth_lr,121 pauth_lr,
122 pcdphint,
114 perfmon,123 perfmon,
124 pops,
115 predictable_select_expensive,125 predictable_select_expensive,
116 predres,126 predres,
117 prfm_slc_target,127 prfm_slc_target,
...@@ -159,6 +169,7 @@ pub const Feature = enum {...@@ -159,6 +169,7 @@ pub const Feature = enum {
159 sme,169 sme,
160 sme2,170 sme2,
161 sme2p1,171 sme2p1,
172 sme2p2,
162 sme_b16b16,173 sme_b16b16,
163 sme_f16f16,174 sme_f16f16,
164 sme_f64f64,175 sme_f64f64,
...@@ -167,11 +178,15 @@ pub const Feature = enum {...@@ -167,11 +178,15 @@ pub const Feature = enum {
167 sme_fa64,178 sme_fa64,
168 sme_i16i64,179 sme_i16i64,
169 sme_lutv2,180 sme_lutv2,
181 sme_mop4,
182 sme_tmop,
170 spe,183 spe,
171 spe_eef,184 spe_eef,
172 specres2,185 specres2,
173 specrestrict,186 specrestrict,
174 ssbs,187 ssbs,
188 ssve_aes,
189 ssve_bitperm,
175 ssve_fp8dot2,190 ssve_fp8dot2,
176 ssve_fp8dot4,191 ssve_fp8dot4,
177 ssve_fp8fma,192 ssve_fp8fma,
...@@ -185,7 +200,13 @@ pub const Feature = enum {...@@ -185,7 +200,13 @@ pub const Feature = enum {
185 sve2_sha3,200 sve2_sha3,
186 sve2_sm4,201 sve2_sm4,
187 sve2p1,202 sve2p1,
203 sve2p2,
204 sve_aes,
205 sve_aes2,
188 sve_b16b16,206 sve_b16b16,
207 sve_bfscale,
208 sve_bitperm,
209 sve_f16f32mm,
189 tagged_globals,210 tagged_globals,
190 the,211 the,
191 tlb_rmi,212 tlb_rmi,
...@@ -202,7 +223,6 @@ pub const Feature = enum {...@@ -202,7 +223,6 @@ pub const Feature = enum {
202 use_fixed_over_scalable_if_equal_cost,223 use_fixed_over_scalable_if_equal_cost,
203 use_postra_scheduler,224 use_postra_scheduler,
204 use_reciprocal_square_root,225 use_reciprocal_square_root,
205 use_scalar_inc_vl,
206 v8_1a,226 v8_1a,
207 v8_2a,227 v8_2a,
208 v8_3a,228 v8_3a,
...@@ -219,6 +239,7 @@ pub const Feature = enum {...@@ -219,6 +239,7 @@ pub const Feature = enum {
219 v9_3a,239 v9_3a,
220 v9_4a,240 v9_4a,
221 v9_5a,241 v9_5a,
242 v9_6a,
222 v9a,243 v9a,
223 vh,244 vh,
224 wfxt,245 wfxt,
...@@ -264,7 +285,9 @@ pub const all_features = blk: {...@@ -264,7 +285,9 @@ pub const all_features = blk: {
264 result[@intFromEnum(Feature.altnzcv)] = .{285 result[@intFromEnum(Feature.altnzcv)] = .{
265 .llvm_name = "altnzcv",286 .llvm_name = "altnzcv",
266 .description = "Enable alternative NZCV format for floating point comparisons",287 .description = "Enable alternative NZCV format for floating point comparisons",
267 .dependencies = featureSet(&[_]Feature{}),288 .dependencies = featureSet(&[_]Feature{
289 .flagm,
290 }),
268 };291 };
269 result[@intFromEnum(Feature.alu_lsl_fast)] = .{292 result[@intFromEnum(Feature.alu_lsl_fast)] = .{
270 .llvm_name = "alu-lsl-fast",293 .llvm_name = "alu-lsl-fast",
...@@ -298,12 +321,10 @@ pub const all_features = blk: {...@@ -298,12 +321,10 @@ pub const all_features = blk: {
298 .description = "Schedule vector stores by ascending address",321 .description = "Schedule vector stores by ascending address",
299 .dependencies = featureSet(&[_]Feature{}),322 .dependencies = featureSet(&[_]Feature{}),
300 };323 };
301 result[@intFromEnum(Feature.b16b16)] = .{324 result[@intFromEnum(Feature.avoid_ldapur)] = .{
302 .llvm_name = "b16b16",325 .llvm_name = "avoid-ldapur",
303 .description = "Enable SVE2.1 or SME2.1 non-widening BFloat16 to BFloat16 instructions",326 .description = "Prefer add+ldapr to offset ldapur",
304 .dependencies = featureSet(&[_]Feature{327 .dependencies = featureSet(&[_]Feature{}),
305 .bf16,
306 }),
307 };328 };
308 result[@intFromEnum(Feature.balance_fp_ops)] = .{329 result[@intFromEnum(Feature.balance_fp_ops)] = .{
309 .llvm_name = "balance-fp-ops",330 .llvm_name = "balance-fp-ops",
...@@ -313,7 +334,9 @@ pub const all_features = blk: {...@@ -313,7 +334,9 @@ pub const all_features = blk: {
313 result[@intFromEnum(Feature.bf16)] = .{334 result[@intFromEnum(Feature.bf16)] = .{
314 .llvm_name = "bf16",335 .llvm_name = "bf16",
315 .description = "Enable BFloat16 Extension",336 .description = "Enable BFloat16 Extension",
316 .dependencies = featureSet(&[_]Feature{}),337 .dependencies = featureSet(&[_]Feature{
338 .neon,
339 }),
317 };340 };
318 result[@intFromEnum(Feature.brbe)] = .{341 result[@intFromEnum(Feature.brbe)] = .{
319 .llvm_name = "brbe",342 .llvm_name = "brbe",
...@@ -373,7 +396,9 @@ pub const all_features = blk: {...@@ -373,7 +396,9 @@ pub const all_features = blk: {
373 result[@intFromEnum(Feature.ccdp)] = .{396 result[@intFromEnum(Feature.ccdp)] = .{
374 .llvm_name = "ccdp",397 .llvm_name = "ccdp",
375 .description = "Enable Armv8.5-A Cache Clean to Point of Deep Persistence",398 .description = "Enable Armv8.5-A Cache Clean to Point of Deep Persistence",
376 .dependencies = featureSet(&[_]Feature{}),399 .dependencies = featureSet(&[_]Feature{
400 .ccpp,
401 }),
377 };402 };
378 result[@intFromEnum(Feature.ccidx)] = .{403 result[@intFromEnum(Feature.ccidx)] = .{
379 .llvm_name = "ccidx",404 .llvm_name = "ccidx",
...@@ -400,6 +425,11 @@ pub const all_features = blk: {...@@ -400,6 +425,11 @@ pub const all_features = blk: {
400 .description = "CPU fuses cmp+bcc operations",425 .description = "CPU fuses cmp+bcc operations",
401 .dependencies = featureSet(&[_]Feature{}),426 .dependencies = featureSet(&[_]Feature{}),
402 };427 };
428 result[@intFromEnum(Feature.cmpbr)] = .{
429 .llvm_name = "cmpbr",
430 .description = "Enable Armv9.6-A base compare and branch instructions",
431 .dependencies = featureSet(&[_]Feature{}),
432 };
403 result[@intFromEnum(Feature.complxnum)] = .{433 result[@intFromEnum(Feature.complxnum)] = .{
404 .llvm_name = "complxnum",434 .llvm_name = "complxnum",
405 .description = "Enable Armv8.3-A Floating-point complex number support",435 .description = "Enable Armv8.3-A Floating-point complex number support",
...@@ -515,10 +545,26 @@ pub const all_features = blk: {...@@ -515,10 +545,26 @@ pub const all_features = blk: {
515 .sve,545 .sve,
516 }),546 }),
517 };547 };
548 result[@intFromEnum(Feature.f8f16mm)] = .{
549 .llvm_name = "f8f16mm",
550 .description = "Enable Armv9.6-A FP8 to Half-Precision Matrix Multiplication",
551 .dependencies = featureSet(&[_]Feature{
552 .fp8,
553 }),
554 };
555 result[@intFromEnum(Feature.f8f32mm)] = .{
556 .llvm_name = "f8f32mm",
557 .description = "Enable Armv9.6-A FP8 to Single-Precision Matrix Multiplication",
558 .dependencies = featureSet(&[_]Feature{
559 .fp8,
560 }),
561 };
518 result[@intFromEnum(Feature.faminmax)] = .{562 result[@intFromEnum(Feature.faminmax)] = .{
519 .llvm_name = "faminmax",563 .llvm_name = "faminmax",
520 .description = "Enable FAMIN and FAMAX instructions",564 .description = "Enable FAMIN and FAMAX instructions",
521 .dependencies = featureSet(&[_]Feature{}),565 .dependencies = featureSet(&[_]Feature{
566 .neon,
567 }),
522 };568 };
523 result[@intFromEnum(Feature.fgt)] = .{569 result[@intFromEnum(Feature.fgt)] = .{
524 .llvm_name = "fgt",570 .llvm_name = "fgt",
...@@ -550,29 +596,28 @@ pub const all_features = blk: {...@@ -550,29 +596,28 @@ pub const all_features = blk: {
550 .description = "Enable FP16 FML instructions",596 .description = "Enable FP16 FML instructions",
551 .dependencies = featureSet(&[_]Feature{597 .dependencies = featureSet(&[_]Feature{
552 .fullfp16,598 .fullfp16,
599 .neon,
553 }),600 }),
554 };601 };
555 result[@intFromEnum(Feature.fp8)] = .{602 result[@intFromEnum(Feature.fp8)] = .{
556 .llvm_name = "fp8",603 .llvm_name = "fp8",
557 .description = "Enable FP8 instructions",604 .description = "Enable FP8 instructions",
558 .dependencies = featureSet(&[_]Feature{605 .dependencies = featureSet(&[_]Feature{
559 .bf16,606 .neon,
560 .faminmax,
561 .lut,
562 }),607 }),
563 };608 };
564 result[@intFromEnum(Feature.fp8dot2)] = .{609 result[@intFromEnum(Feature.fp8dot2)] = .{
565 .llvm_name = "fp8dot2",610 .llvm_name = "fp8dot2",
566 .description = "Enable FP8 2-way dot instructions",611 .description = "Enable FP8 2-way dot instructions",
567 .dependencies = featureSet(&[_]Feature{612 .dependencies = featureSet(&[_]Feature{
568 .fp8dot4,613 .fp8,
569 }),614 }),
570 };615 };
571 result[@intFromEnum(Feature.fp8dot4)] = .{616 result[@intFromEnum(Feature.fp8dot4)] = .{
572 .llvm_name = "fp8dot4",617 .llvm_name = "fp8dot4",
573 .description = "Enable FP8 4-way dot instructions",618 .description = "Enable FP8 4-way dot instructions",
574 .dependencies = featureSet(&[_]Feature{619 .dependencies = featureSet(&[_]Feature{
575 .fp8fma,620 .fp8,
576 }),621 }),
577 };622 };
578 result[@intFromEnum(Feature.fp8fma)] = .{623 result[@intFromEnum(Feature.fp8fma)] = .{
...@@ -589,13 +634,32 @@ pub const all_features = blk: {...@@ -589,13 +634,32 @@ pub const all_features = blk: {
589 };634 };
590 result[@intFromEnum(Feature.fpac)] = .{635 result[@intFromEnum(Feature.fpac)] = .{
591 .llvm_name = "fpac",636 .llvm_name = "fpac",
592 .description = "Enable v8.3-A Pointer Authentication Faulting enhancement",637 .description = "Enable Armv8.3-A Pointer Authentication Faulting enhancement",
593 .dependencies = featureSet(&[_]Feature{}),638 .dependencies = featureSet(&[_]Feature{}),
594 };639 };
640 result[@intFromEnum(Feature.fprcvt)] = .{
641 .llvm_name = "fprcvt",
642 .description = "Enable Armv9.6-A base convert instructions for SIMD&FP scalar register operands of different input and output sizes",
643 .dependencies = featureSet(&[_]Feature{
644 .fp_armv8,
645 }),
646 };
595 result[@intFromEnum(Feature.fptoint)] = .{647 result[@intFromEnum(Feature.fptoint)] = .{
596 .llvm_name = "fptoint",648 .llvm_name = "fptoint",
597 .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int",649 .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int",
598 .dependencies = featureSet(&[_]Feature{}),650 .dependencies = featureSet(&[_]Feature{
651 .fp_armv8,
652 }),
653 };
654 result[@intFromEnum(Feature.fujitsu_monaka)] = .{
655 .llvm_name = "fujitsu-monaka",
656 .description = "Fujitsu FUJITSU-MONAKA processors",
657 .dependencies = featureSet(&[_]Feature{
658 .arith_bcc_fusion,
659 .enable_select_opt,
660 .predictable_select_expensive,
661 .use_postra_scheduler,
662 }),
599 };663 };
600 result[@intFromEnum(Feature.fullfp16)] = .{664 result[@intFromEnum(Feature.fullfp16)] = .{
601 .llvm_name = "fullfp16",665 .llvm_name = "fullfp16",
...@@ -679,7 +743,9 @@ pub const all_features = blk: {...@@ -679,7 +743,9 @@ pub const all_features = blk: {
679 result[@intFromEnum(Feature.i8mm)] = .{743 result[@intFromEnum(Feature.i8mm)] = .{
680 .llvm_name = "i8mm",744 .llvm_name = "i8mm",
681 .description = "Enable Matrix Multiply Int8 Extension",745 .description = "Enable Matrix Multiply Int8 Extension",
682 .dependencies = featureSet(&[_]Feature{}),746 .dependencies = featureSet(&[_]Feature{
747 .neon,
748 }),
683 };749 };
684 result[@intFromEnum(Feature.ite)] = .{750 result[@intFromEnum(Feature.ite)] = .{
685 .llvm_name = "ite",751 .llvm_name = "ite",
...@@ -727,10 +793,24 @@ pub const all_features = blk: {...@@ -727,10 +793,24 @@ pub const all_features = blk: {
727 .description = "Enable Armv8.4-A Large System Extension 2 (LSE2) atomicity rules",793 .description = "Enable Armv8.4-A Large System Extension 2 (LSE2) atomicity rules",
728 .dependencies = featureSet(&[_]Feature{}),794 .dependencies = featureSet(&[_]Feature{}),
729 };795 };
796 result[@intFromEnum(Feature.lsfe)] = .{
797 .llvm_name = "lsfe",
798 .description = "Enable Armv9.6-A base Atomic floating-point in-memory instructions",
799 .dependencies = featureSet(&[_]Feature{
800 .fp_armv8,
801 }),
802 };
803 result[@intFromEnum(Feature.lsui)] = .{
804 .llvm_name = "lsui",
805 .description = "Enable Armv9.6-A unprivileged load/store instructions",
806 .dependencies = featureSet(&[_]Feature{}),
807 };
730 result[@intFromEnum(Feature.lut)] = .{808 result[@intFromEnum(Feature.lut)] = .{
731 .llvm_name = "lut",809 .llvm_name = "lut",
732 .description = "Enable Lookup Table instructions",810 .description = "Enable Lookup Table instructions",
733 .dependencies = featureSet(&[_]Feature{}),811 .dependencies = featureSet(&[_]Feature{
812 .neon,
813 }),
734 };814 };
735 result[@intFromEnum(Feature.mec)] = .{815 result[@intFromEnum(Feature.mec)] = .{
736 .llvm_name = "mec",816 .llvm_name = "mec",
...@@ -791,6 +871,11 @@ pub const all_features = blk: {...@@ -791,6 +871,11 @@ pub const all_features = blk: {
791 .description = "Enable Armv8.4-A Nested Virtualization Enchancement",871 .description = "Enable Armv8.4-A Nested Virtualization Enchancement",
792 .dependencies = featureSet(&[_]Feature{}),872 .dependencies = featureSet(&[_]Feature{}),
793 };873 };
874 result[@intFromEnum(Feature.occmo)] = .{
875 .llvm_name = "occmo",
876 .description = "Enable Armv9.6-A Outer cacheable cache maintenance operations",
877 .dependencies = featureSet(&[_]Feature{}),
878 };
794 result[@intFromEnum(Feature.outline_atomics)] = .{879 result[@intFromEnum(Feature.outline_atomics)] = .{
795 .llvm_name = "outline-atomics",880 .llvm_name = "outline-atomics",
796 .description = "Enable out of line atomics to support LSE instructions",881 .description = "Enable out of line atomics to support LSE instructions",
...@@ -818,11 +903,21 @@ pub const all_features = blk: {...@@ -818,11 +903,21 @@ pub const all_features = blk: {
818 .description = "Enable Armv9.5-A PAC enhancements",903 .description = "Enable Armv9.5-A PAC enhancements",
819 .dependencies = featureSet(&[_]Feature{}),904 .dependencies = featureSet(&[_]Feature{}),
820 };905 };
906 result[@intFromEnum(Feature.pcdphint)] = .{
907 .llvm_name = "pcdphint",
908 .description = "Enable Armv9.6-A Producer Consumer Data Placement hints",
909 .dependencies = featureSet(&[_]Feature{}),
910 };
821 result[@intFromEnum(Feature.perfmon)] = .{911 result[@intFromEnum(Feature.perfmon)] = .{
822 .llvm_name = "perfmon",912 .llvm_name = "perfmon",
823 .description = "Enable Armv8.0-A PMUv3 Performance Monitors extension",913 .description = "Enable Armv8.0-A PMUv3 Performance Monitors extension",
824 .dependencies = featureSet(&[_]Feature{}),914 .dependencies = featureSet(&[_]Feature{}),
825 };915 };
916 result[@intFromEnum(Feature.pops)] = .{
917 .llvm_name = "pops",
918 .description = "Enable Armv9.6-A Point Of Physical Storage (PoPS) DC instructions",
919 .dependencies = featureSet(&[_]Feature{}),
920 };
826 result[@intFromEnum(Feature.predictable_select_expensive)] = .{921 result[@intFromEnum(Feature.predictable_select_expensive)] = .{
827 .llvm_name = "predictable-select-expensive",922 .llvm_name = "predictable-select-expensive",
828 .description = "Prefer likely predicted branches over selects",923 .description = "Prefer likely predicted branches over selects",
...@@ -1062,7 +1157,7 @@ pub const all_features = blk: {...@@ -1062,7 +1157,7 @@ pub const all_features = blk: {
1062 .description = "Enable Scalable Matrix Extension (SME)",1157 .description = "Enable Scalable Matrix Extension (SME)",
1063 .dependencies = featureSet(&[_]Feature{1158 .dependencies = featureSet(&[_]Feature{
1064 .bf16,1159 .bf16,
1065 .use_scalar_inc_vl,1160 .fullfp16,
1066 }),1161 }),
1067 };1162 };
1068 result[@intFromEnum(Feature.sme2)] = .{1163 result[@intFromEnum(Feature.sme2)] = .{
...@@ -1079,12 +1174,19 @@ pub const all_features = blk: {...@@ -1079,12 +1174,19 @@ pub const all_features = blk: {
1079 .sme2,1174 .sme2,
1080 }),1175 }),
1081 };1176 };
1177 result[@intFromEnum(Feature.sme2p2)] = .{
1178 .llvm_name = "sme2p2",
1179 .description = "Enable Armv9.6-A Scalable Matrix Extension 2.2 instructions",
1180 .dependencies = featureSet(&[_]Feature{
1181 .sme2p1,
1182 }),
1183 };
1082 result[@intFromEnum(Feature.sme_b16b16)] = .{1184 result[@intFromEnum(Feature.sme_b16b16)] = .{
1083 .llvm_name = "sme-b16b16",1185 .llvm_name = "sme-b16b16",
1084 .description = "Enable SME2.1 ZA-targeting non-widening BFloat16 instructions",1186 .description = "Enable SME2.1 ZA-targeting non-widening BFloat16 instructions",
1085 .dependencies = featureSet(&[_]Feature{1187 .dependencies = featureSet(&[_]Feature{
1086 .b16b16,
1087 .sme2,1188 .sme2,
1189 .sve_b16b16,
1088 }),1190 }),
1089 };1191 };
1090 result[@intFromEnum(Feature.sme_f16f16)] = .{1192 result[@intFromEnum(Feature.sme_f16f16)] = .{
...@@ -1105,7 +1207,8 @@ pub const all_features = blk: {...@@ -1105,7 +1207,8 @@ pub const all_features = blk: {
1105 .llvm_name = "sme-f8f16",1207 .llvm_name = "sme-f8f16",
1106 .description = "Enable Scalable Matrix Extension (SME) F8F16 instructions",1208 .description = "Enable Scalable Matrix Extension (SME) F8F16 instructions",
1107 .dependencies = featureSet(&[_]Feature{1209 .dependencies = featureSet(&[_]Feature{
1108 .sme_f8f32,1210 .fp8,
1211 .sme2,
1109 }),1212 }),
1110 };1213 };
1111 result[@intFromEnum(Feature.sme_f8f32)] = .{1214 result[@intFromEnum(Feature.sme_f8f32)] = .{
...@@ -1134,7 +1237,23 @@ pub const all_features = blk: {...@@ -1134,7 +1237,23 @@ pub const all_features = blk: {
1134 result[@intFromEnum(Feature.sme_lutv2)] = .{1237 result[@intFromEnum(Feature.sme_lutv2)] = .{
1135 .llvm_name = "sme-lutv2",1238 .llvm_name = "sme-lutv2",
1136 .description = "Enable Scalable Matrix Extension (SME) LUTv2 instructions",1239 .description = "Enable Scalable Matrix Extension (SME) LUTv2 instructions",
1137 .dependencies = featureSet(&[_]Feature{}),1240 .dependencies = featureSet(&[_]Feature{
1241 .sme2,
1242 }),
1243 };
1244 result[@intFromEnum(Feature.sme_mop4)] = .{
1245 .llvm_name = "sme-mop4",
1246 .description = "Enable SME Quarter-tile outer product instructions",
1247 .dependencies = featureSet(&[_]Feature{
1248 .sme2,
1249 }),
1250 };
1251 result[@intFromEnum(Feature.sme_tmop)] = .{
1252 .llvm_name = "sme-tmop",
1253 .description = "Enable SME Structured sparsity outer product instructions.",
1254 .dependencies = featureSet(&[_]Feature{
1255 .sme2,
1256 }),
1138 };1257 };
1139 result[@intFromEnum(Feature.spe)] = .{1258 result[@intFromEnum(Feature.spe)] = .{
1140 .llvm_name = "spe",1259 .llvm_name = "spe",
...@@ -1163,18 +1282,36 @@ pub const all_features = blk: {...@@ -1163,18 +1282,36 @@ pub const all_features = blk: {
1163 .description = "Enable Speculative Store Bypass Safe bit",1282 .description = "Enable Speculative Store Bypass Safe bit",
1164 .dependencies = featureSet(&[_]Feature{}),1283 .dependencies = featureSet(&[_]Feature{}),
1165 };1284 };
1285 result[@intFromEnum(Feature.ssve_aes)] = .{
1286 .llvm_name = "ssve-aes",
1287 .description = "Enable Armv9.6-A SVE AES support in streaming SVE mode",
1288 .dependencies = featureSet(&[_]Feature{
1289 .sme2,
1290 .sve_aes,
1291 }),
1292 };
1293 result[@intFromEnum(Feature.ssve_bitperm)] = .{
1294 .llvm_name = "ssve-bitperm",
1295 .description = "Enable Armv9.6-A SVE BitPerm support in streaming SVE mode",
1296 .dependencies = featureSet(&[_]Feature{
1297 .sme2,
1298 .sve_bitperm,
1299 }),
1300 };
1166 result[@intFromEnum(Feature.ssve_fp8dot2)] = .{1301 result[@intFromEnum(Feature.ssve_fp8dot2)] = .{
1167 .llvm_name = "ssve-fp8dot2",1302 .llvm_name = "ssve-fp8dot2",
1168 .description = "Enable SVE2 FP8 2-way dot product instructions",1303 .description = "Enable SVE2 FP8 2-way dot product instructions",
1169 .dependencies = featureSet(&[_]Feature{1304 .dependencies = featureSet(&[_]Feature{
1170 .ssve_fp8dot4,1305 .fp8,
1306 .sme2,
1171 }),1307 }),
1172 };1308 };
1173 result[@intFromEnum(Feature.ssve_fp8dot4)] = .{1309 result[@intFromEnum(Feature.ssve_fp8dot4)] = .{
1174 .llvm_name = "ssve-fp8dot4",1310 .llvm_name = "ssve-fp8dot4",
1175 .description = "Enable SVE2 FP8 4-way dot product instructions",1311 .description = "Enable SVE2 FP8 4-way dot product instructions",
1176 .dependencies = featureSet(&[_]Feature{1312 .dependencies = featureSet(&[_]Feature{
1177 .ssve_fp8fma,1313 .fp8,
1314 .sme2,
1178 }),1315 }),
1179 };1316 };
1180 result[@intFromEnum(Feature.ssve_fp8fma)] = .{1317 result[@intFromEnum(Feature.ssve_fp8fma)] = .{
...@@ -1212,22 +1349,22 @@ pub const all_features = blk: {...@@ -1212,22 +1349,22 @@ pub const all_features = blk: {
1212 .description = "Enable Scalable Vector Extension 2 (SVE2) instructions",1349 .description = "Enable Scalable Vector Extension 2 (SVE2) instructions",
1213 .dependencies = featureSet(&[_]Feature{1350 .dependencies = featureSet(&[_]Feature{
1214 .sve,1351 .sve,
1215 .use_scalar_inc_vl,
1216 }),1352 }),
1217 };1353 };
1218 result[@intFromEnum(Feature.sve2_aes)] = .{1354 result[@intFromEnum(Feature.sve2_aes)] = .{
1219 .llvm_name = "sve2-aes",1355 .llvm_name = "sve2-aes",
1220 .description = "Enable AES SVE2 instructions",1356 .description = "Shorthand for +sve2+sve-aes",
1221 .dependencies = featureSet(&[_]Feature{1357 .dependencies = featureSet(&[_]Feature{
1222 .aes,
1223 .sve2,1358 .sve2,
1359 .sve_aes,
1224 }),1360 }),
1225 };1361 };
1226 result[@intFromEnum(Feature.sve2_bitperm)] = .{1362 result[@intFromEnum(Feature.sve2_bitperm)] = .{
1227 .llvm_name = "sve2-bitperm",1363 .llvm_name = "sve2-bitperm",
1228 .description = "Enable bit permutation SVE2 instructions",1364 .description = "Shorthand for +sve2+sve-bitperm",
1229 .dependencies = featureSet(&[_]Feature{1365 .dependencies = featureSet(&[_]Feature{
1230 .sve2,1366 .sve2,
1367 .sve_bitperm,
1231 }),1368 }),
1232 };1369 };
1233 result[@intFromEnum(Feature.sve2_sha3)] = .{1370 result[@intFromEnum(Feature.sve2_sha3)] = .{
...@@ -1253,11 +1390,45 @@ pub const all_features = blk: {...@@ -1253,11 +1390,45 @@ pub const all_features = blk: {
1253 .sve2,1390 .sve2,
1254 }),1391 }),
1255 };1392 };
1393 result[@intFromEnum(Feature.sve2p2)] = .{
1394 .llvm_name = "sve2p2",
1395 .description = "Enable Armv9.6-A Scalable Vector Extension 2.2 instructions",
1396 .dependencies = featureSet(&[_]Feature{
1397 .sve2p1,
1398 }),
1399 };
1400 result[@intFromEnum(Feature.sve_aes)] = .{
1401 .llvm_name = "sve-aes",
1402 .description = "Enable SVE AES and quadword SVE polynomial multiply instructions",
1403 .dependencies = featureSet(&[_]Feature{
1404 .aes,
1405 }),
1406 };
1407 result[@intFromEnum(Feature.sve_aes2)] = .{
1408 .llvm_name = "sve-aes2",
1409 .description = "Enable Armv9.6-A SVE multi-vector AES and multi-vector quadword polynomial multiply instructions",
1410 .dependencies = featureSet(&[_]Feature{}),
1411 };
1256 result[@intFromEnum(Feature.sve_b16b16)] = .{1412 result[@intFromEnum(Feature.sve_b16b16)] = .{
1257 .llvm_name = "sve-b16b16",1413 .llvm_name = "sve-b16b16",
1258 .description = "Enable SVE2 non-widening and SME2 Z-targeting non-widening BFloat16 instructions",1414 .description = "Enable SVE2 non-widening and SME2 Z-targeting non-widening BFloat16 instructions",
1415 .dependencies = featureSet(&[_]Feature{}),
1416 };
1417 result[@intFromEnum(Feature.sve_bfscale)] = .{
1418 .llvm_name = "sve-bfscale",
1419 .description = "Enable Armv9.6-A SVE BFloat16 scaling instructions",
1420 .dependencies = featureSet(&[_]Feature{}),
1421 };
1422 result[@intFromEnum(Feature.sve_bitperm)] = .{
1423 .llvm_name = "sve-bitperm",
1424 .description = "Enable bit permutation SVE2 instructions",
1425 .dependencies = featureSet(&[_]Feature{}),
1426 };
1427 result[@intFromEnum(Feature.sve_f16f32mm)] = .{
1428 .llvm_name = "sve-f16f32mm",
1429 .description = "Enable Armv9.6-A FP16 to FP32 Matrix Multiply instructions",
1259 .dependencies = featureSet(&[_]Feature{1430 .dependencies = featureSet(&[_]Feature{
1260 .b16b16,1431 .sve,
1261 }),1432 }),
1262 };1433 };
1263 result[@intFromEnum(Feature.tagged_globals)] = .{1434 result[@intFromEnum(Feature.tagged_globals)] = .{
...@@ -1340,11 +1511,6 @@ pub const all_features = blk: {...@@ -1340,11 +1511,6 @@ pub const all_features = blk: {
1340 .description = "Use the reciprocal square root approximation",1511 .description = "Use the reciprocal square root approximation",
1341 .dependencies = featureSet(&[_]Feature{}),1512 .dependencies = featureSet(&[_]Feature{}),
1342 };1513 };
1343 result[@intFromEnum(Feature.use_scalar_inc_vl)] = .{
1344 .llvm_name = "use-scalar-inc-vl",
1345 .description = "Prefer inc/dec over add+cnt",
1346 .dependencies = featureSet(&[_]Feature{}),
1347 };
1348 result[@intFromEnum(Feature.v8_1a)] = .{1514 result[@intFromEnum(Feature.v8_1a)] = .{
1349 .llvm_name = "v8.1a",1515 .llvm_name = "v8.1a",
1350 .description = "Support ARM v8.1a architecture",1516 .description = "Support ARM v8.1a architecture",
...@@ -1431,6 +1597,7 @@ pub const all_features = blk: {...@@ -1431,6 +1597,7 @@ pub const all_features = blk: {
1431 .description = "Support ARM v8.7a architecture",1597 .description = "Support ARM v8.7a architecture",
1432 .dependencies = featureSet(&[_]Feature{1598 .dependencies = featureSet(&[_]Feature{
1433 .hcx,1599 .hcx,
1600 .spe_eef,
1434 .v8_6a,1601 .v8_6a,
1435 .wfxt,1602 .wfxt,
1436 .xs,1603 .xs,
...@@ -1527,6 +1694,7 @@ pub const all_features = blk: {...@@ -1527,6 +1694,7 @@ pub const all_features = blk: {
1527 .llvm_name = "v9.4a",1694 .llvm_name = "v9.4a",
1528 .description = "Support ARM v9.4a architecture",1695 .description = "Support ARM v9.4a architecture",
1529 .dependencies = featureSet(&[_]Feature{1696 .dependencies = featureSet(&[_]Feature{
1697 .sve2p1,
1530 .v8_9a,1698 .v8_9a,
1531 .v9_3a,1699 .v9_3a,
1532 }),1700 }),
...@@ -1541,6 +1709,18 @@ pub const all_features = blk: {...@@ -1541,6 +1709,18 @@ pub const all_features = blk: {
1541 .v9_4a,1709 .v9_4a,
1542 }),1710 }),
1543 };1711 };
1712 result[@intFromEnum(Feature.v9_6a)] = .{
1713 .llvm_name = "v9.6a",
1714 .description = "Support ARM v9.6a architecture",
1715 .dependencies = featureSet(&[_]Feature{
1716 .cmpbr,
1717 .fprcvt,
1718 .lsui,
1719 .occmo,
1720 .sve2p2,
1721 .v9_5a,
1722 }),
1723 };
1544 result[@intFromEnum(Feature.v9a)] = .{1724 result[@intFromEnum(Feature.v9a)] = .{
1545 .llvm_name = "v9a",1725 .llvm_name = "v9a",
1546 .description = "Support ARM v9a architecture",1726 .description = "Support ARM v9a architecture",
...@@ -1820,7 +2000,9 @@ pub const cpu = struct {...@@ -1820,7 +2000,9 @@ pub const cpu = struct {
1820 .arith_cbz_fusion,2000 .arith_cbz_fusion,
1821 .disable_latency_sched_heuristic,2001 .disable_latency_sched_heuristic,
1822 .fp16fml,2002 .fp16fml,
2003 .fpac,
1823 .fuse_address,2004 .fuse_address,
2005 .fuse_adrp_add,
1824 .fuse_aes,2006 .fuse_aes,
1825 .fuse_arith_logic,2007 .fuse_arith_logic,
1826 .fuse_crypto_eor,2008 .fuse_crypto_eor,
...@@ -1844,6 +2026,7 @@ pub const cpu = struct {...@@ -1844,6 +2026,7 @@ pub const cpu = struct {
1844 .arith_cbz_fusion,2026 .arith_cbz_fusion,
1845 .disable_latency_sched_heuristic,2027 .disable_latency_sched_heuristic,
1846 .fp16fml,2028 .fp16fml,
2029 .fpac,
1847 .fuse_address,2030 .fuse_address,
1848 .fuse_adrp_add,2031 .fuse_adrp_add,
1849 .fuse_aes,2032 .fuse_aes,
...@@ -1870,6 +2053,7 @@ pub const cpu = struct {...@@ -1870,6 +2053,7 @@ pub const cpu = struct {
1870 .arith_cbz_fusion,2053 .arith_cbz_fusion,
1871 .disable_latency_sched_heuristic,2054 .disable_latency_sched_heuristic,
1872 .fp16fml,2055 .fp16fml,
2056 .fpac,
1873 .fuse_address,2057 .fuse_address,
1874 .fuse_adrp_add,2058 .fuse_adrp_add,
1875 .fuse_aes,2059 .fuse_aes,
...@@ -1988,7 +2172,9 @@ pub const cpu = struct {...@@ -1988,7 +2172,9 @@ pub const cpu = struct {
1988 .arith_cbz_fusion,2172 .arith_cbz_fusion,
1989 .disable_latency_sched_heuristic,2173 .disable_latency_sched_heuristic,
1990 .fp16fml,2174 .fp16fml,
2175 .fpac,
1991 .fuse_address,2176 .fuse_address,
2177 .fuse_adrp_add,
1992 .fuse_aes,2178 .fuse_aes,
1993 .fuse_arith_logic,2179 .fuse_arith_logic,
1994 .fuse_crypto_eor,2180 .fuse_crypto_eor,
...@@ -2012,6 +2198,7 @@ pub const cpu = struct {...@@ -2012,6 +2198,7 @@ pub const cpu = struct {
2012 .arith_cbz_fusion,2198 .arith_cbz_fusion,
2013 .disable_latency_sched_heuristic,2199 .disable_latency_sched_heuristic,
2014 .fp16fml,2200 .fp16fml,
2201 .fpac,
2015 .fuse_address,2202 .fuse_address,
2016 .fuse_adrp_add,2203 .fuse_adrp_add,
2017 .fuse_aes,2204 .fuse_aes,
...@@ -2038,7 +2225,9 @@ pub const cpu = struct {...@@ -2038,7 +2225,9 @@ pub const cpu = struct {
2038 .arith_cbz_fusion,2225 .arith_cbz_fusion,
2039 .disable_latency_sched_heuristic,2226 .disable_latency_sched_heuristic,
2040 .fp16fml,2227 .fp16fml,
2228 .fpac,
2041 .fuse_address,2229 .fuse_address,
2230 .fuse_adrp_add,
2042 .fuse_aes,2231 .fuse_aes,
2043 .fuse_arith_logic,2232 .fuse_arith_logic,
2044 .fuse_crypto_eor,2233 .fuse_crypto_eor,
...@@ -2119,7 +2308,7 @@ pub const cpu = struct {...@@ -2119,7 +2308,7 @@ pub const cpu = struct {
2119 .mte,2308 .mte,
2120 .perfmon,2309 .perfmon,
2121 .predictable_select_expensive,2310 .predictable_select_expensive,
2122 .sve2_bitperm,2311 .sve_bitperm,
2123 .use_postra_scheduler,2312 .use_postra_scheduler,
2124 .v9a,2313 .v9a,
2125 }),2314 }),
...@@ -2158,7 +2347,7 @@ pub const cpu = struct {...@@ -2158,7 +2347,7 @@ pub const cpu = struct {
2158 .i8mm,2347 .i8mm,
2159 .mte,2348 .mte,
2160 .perfmon,2349 .perfmon,
2161 .sve2_bitperm,2350 .sve_bitperm,
2162 .use_postra_scheduler,2351 .use_postra_scheduler,
2163 .v9a,2352 .v9a,
2164 }),2353 }),
...@@ -2173,7 +2362,7 @@ pub const cpu = struct {...@@ -2173,7 +2362,7 @@ pub const cpu = struct {
2173 .fuse_aes,2362 .fuse_aes,
2174 .mte,2363 .mte,
2175 .perfmon,2364 .perfmon,
2176 .sve2_bitperm,2365 .sve_bitperm,
2177 .use_postra_scheduler,2366 .use_postra_scheduler,
2178 .v9_2a,2367 .v9_2a,
2179 }),2368 }),
...@@ -2188,7 +2377,7 @@ pub const cpu = struct {...@@ -2188,7 +2377,7 @@ pub const cpu = struct {
2188 .fuse_aes,2377 .fuse_aes,
2189 .mte,2378 .mte,
2190 .perfmon,2379 .perfmon,
2191 .sve2_bitperm,2380 .sve_bitperm,
2192 .use_postra_scheduler,2381 .use_postra_scheduler,
2193 .v9_2a,2382 .v9_2a,
2194 }),2383 }),
...@@ -2300,7 +2489,7 @@ pub const cpu = struct {...@@ -2300,7 +2489,7 @@ pub const cpu = struct {
2300 .mte,2489 .mte,
2301 .perfmon,2490 .perfmon,
2302 .predictable_select_expensive,2491 .predictable_select_expensive,
2303 .sve2_bitperm,2492 .sve_bitperm,
2304 .use_postra_scheduler,2493 .use_postra_scheduler,
2305 .v9a,2494 .v9a,
2306 }),2495 }),
...@@ -2322,7 +2511,7 @@ pub const cpu = struct {...@@ -2322,7 +2511,7 @@ pub const cpu = struct {
2322 .perfmon,2511 .perfmon,
2323 .predictable_select_expensive,2512 .predictable_select_expensive,
2324 .spe,2513 .spe,
2325 .sve2_bitperm,2514 .sve_bitperm,
2326 .use_postra_scheduler,2515 .use_postra_scheduler,
2327 .v9a,2516 .v9a,
2328 }),2517 }),
...@@ -2359,8 +2548,7 @@ pub const cpu = struct {...@@ -2359,8 +2548,7 @@ pub const cpu = struct {
2359 .perfmon,2548 .perfmon,
2360 .predictable_select_expensive,2549 .predictable_select_expensive,
2361 .spe,2550 .spe,
2362 .spe_eef,2551 .sve_bitperm,
2363 .sve2_bitperm,
2364 .use_postra_scheduler,2552 .use_postra_scheduler,
2365 .v9_2a,2553 .v9_2a,
2366 }),2554 }),
...@@ -2380,8 +2568,7 @@ pub const cpu = struct {...@@ -2380,8 +2568,7 @@ pub const cpu = struct {
2380 .perfmon,2568 .perfmon,
2381 .predictable_select_expensive,2569 .predictable_select_expensive,
2382 .spe,2570 .spe,
2383 .spe_eef,2571 .sve_bitperm,
2384 .sve2_bitperm,
2385 .use_postra_scheduler,2572 .use_postra_scheduler,
2386 .v9_2a,2573 .v9_2a,
2387 }),2574 }),
...@@ -2401,8 +2588,7 @@ pub const cpu = struct {...@@ -2401,8 +2588,7 @@ pub const cpu = struct {
2401 .perfmon,2588 .perfmon,
2402 .predictable_select_expensive,2589 .predictable_select_expensive,
2403 .spe,2590 .spe,
2404 .spe_eef,2591 .sve_bitperm,
2405 .sve2_bitperm,
2406 .use_postra_scheduler,2592 .use_postra_scheduler,
2407 .v9_2a,2593 .v9_2a,
2408 }),2594 }),
...@@ -2660,7 +2846,8 @@ pub const cpu = struct {...@@ -2660,7 +2846,8 @@ pub const cpu = struct {
2660 .mte,2846 .mte,
2661 .perfmon,2847 .perfmon,
2662 .predictable_select_expensive,2848 .predictable_select_expensive,
2663 .sve2_bitperm,2849 .sve_bitperm,
2850 .use_fixed_over_scalable_if_equal_cost,
2664 .use_postra_scheduler,2851 .use_postra_scheduler,
2665 .v9a,2852 .v9a,
2666 }),2853 }),
...@@ -2670,6 +2857,7 @@ pub const cpu = struct {...@@ -2670,6 +2857,7 @@ pub const cpu = struct {
2670 .llvm_name = "cortex-x3",2857 .llvm_name = "cortex-x3",
2671 .features = featureSet(&[_]Feature{2858 .features = featureSet(&[_]Feature{
2672 .alu_lsl_fast,2859 .alu_lsl_fast,
2860 .avoid_ldapur,
2673 .bf16,2861 .bf16,
2674 .enable_select_opt,2862 .enable_select_opt,
2675 .ete,2863 .ete,
...@@ -2681,7 +2869,8 @@ pub const cpu = struct {...@@ -2681,7 +2869,8 @@ pub const cpu = struct {
2681 .perfmon,2869 .perfmon,
2682 .predictable_select_expensive,2870 .predictable_select_expensive,
2683 .spe,2871 .spe,
2684 .sve2_bitperm,2872 .sve_bitperm,
2873 .use_fixed_over_scalable_if_equal_cost,
2685 .use_postra_scheduler,2874 .use_postra_scheduler,
2686 .v9a,2875 .v9a,
2687 }),2876 }),
...@@ -2691,6 +2880,7 @@ pub const cpu = struct {...@@ -2691,6 +2880,7 @@ pub const cpu = struct {
2691 .llvm_name = "cortex-x4",2880 .llvm_name = "cortex-x4",
2692 .features = featureSet(&[_]Feature{2881 .features = featureSet(&[_]Feature{
2693 .alu_lsl_fast,2882 .alu_lsl_fast,
2883 .avoid_ldapur,
2694 .enable_select_opt,2884 .enable_select_opt,
2695 .ete,2885 .ete,
2696 .fp16fml,2886 .fp16fml,
...@@ -2700,8 +2890,8 @@ pub const cpu = struct {...@@ -2700,8 +2890,8 @@ pub const cpu = struct {
2700 .perfmon,2890 .perfmon,
2701 .predictable_select_expensive,2891 .predictable_select_expensive,
2702 .spe,2892 .spe,
2703 .spe_eef,2893 .sve_bitperm,
2704 .sve2_bitperm,2894 .use_fixed_over_scalable_if_equal_cost,
2705 .use_postra_scheduler,2895 .use_postra_scheduler,
2706 .v9_2a,2896 .v9_2a,
2707 }),2897 }),
...@@ -2711,6 +2901,7 @@ pub const cpu = struct {...@@ -2711,6 +2901,7 @@ pub const cpu = struct {
2711 .llvm_name = "cortex-x925",2901 .llvm_name = "cortex-x925",
2712 .features = featureSet(&[_]Feature{2902 .features = featureSet(&[_]Feature{
2713 .alu_lsl_fast,2903 .alu_lsl_fast,
2904 .avoid_ldapur,
2714 .enable_select_opt,2905 .enable_select_opt,
2715 .ete,2906 .ete,
2716 .fp16fml,2907 .fp16fml,
...@@ -2720,8 +2911,8 @@ pub const cpu = struct {...@@ -2720,8 +2911,8 @@ pub const cpu = struct {
2720 .perfmon,2911 .perfmon,
2721 .predictable_select_expensive,2912 .predictable_select_expensive,
2722 .spe,2913 .spe,
2723 .spe_eef,2914 .sve_bitperm,
2724 .sve2_bitperm,2915 .use_fixed_over_scalable_if_equal_cost,
2725 .use_postra_scheduler,2916 .use_postra_scheduler,
2726 .v9_2a,2917 .v9_2a,
2727 }),2918 }),
...@@ -2881,6 +3072,29 @@ pub const cpu = struct {...@@ -2881,6 +3072,29 @@ pub const cpu = struct {
2881 .zcz,3072 .zcz,
2882 }),3073 }),
2883 };3074 };
3075 pub const fujitsu_monaka: CpuModel = .{
3076 .name = "fujitsu_monaka",
3077 .llvm_name = "fujitsu-monaka",
3078 .features = featureSet(&[_]Feature{
3079 .clrbhb,
3080 .ete,
3081 .faminmax,
3082 .fp16fml,
3083 .fp8dot2,
3084 .fpac,
3085 .fujitsu_monaka,
3086 .ls64,
3087 .lut,
3088 .perfmon,
3089 .rand,
3090 .specres2,
3091 .sve2_sha3,
3092 .sve2_sm4,
3093 .sve_aes,
3094 .sve_bitperm,
3095 .v9_3a,
3096 }),
3097 };
2884 pub const generic: CpuModel = .{3098 pub const generic: CpuModel = .{
2885 .name = "generic",3099 .name = "generic",
2886 .llvm_name = "generic",3100 .llvm_name = "generic",
...@@ -2898,6 +3112,7 @@ pub const cpu = struct {...@@ -2898,6 +3112,7 @@ pub const cpu = struct {
2898 .llvm_name = "grace",3112 .llvm_name = "grace",
2899 .features = featureSet(&[_]Feature{3113 .features = featureSet(&[_]Feature{
2900 .alu_lsl_fast,3114 .alu_lsl_fast,
3115 .avoid_ldapur,
2901 .bf16,3116 .bf16,
2902 .cmp_bcc_fusion,3117 .cmp_bcc_fusion,
2903 .enable_select_opt,3118 .enable_select_opt,
...@@ -2911,7 +3126,7 @@ pub const cpu = struct {...@@ -2911,7 +3126,7 @@ pub const cpu = struct {
2911 .predictable_select_expensive,3126 .predictable_select_expensive,
2912 .rand,3127 .rand,
2913 .spe,3128 .spe,
2914 .sve2_bitperm,3129 .sve_bitperm,
2915 .use_fixed_over_scalable_if_equal_cost,3130 .use_fixed_over_scalable_if_equal_cost,
2916 .use_postra_scheduler,3131 .use_postra_scheduler,
2917 .v9a,3132 .v9a,
...@@ -3012,7 +3227,7 @@ pub const cpu = struct {...@@ -3012,7 +3227,7 @@ pub const cpu = struct {
3012 .mte,3227 .mte,
3013 .perfmon,3228 .perfmon,
3014 .predictable_select_expensive,3229 .predictable_select_expensive,
3015 .sve2_bitperm,3230 .sve_bitperm,
3016 .use_postra_scheduler,3231 .use_postra_scheduler,
3017 .v9a,3232 .v9a,
3018 }),3233 }),
...@@ -3032,8 +3247,7 @@ pub const cpu = struct {...@@ -3032,8 +3247,7 @@ pub const cpu = struct {
3032 .predictable_select_expensive,3247 .predictable_select_expensive,
3033 .rand,3248 .rand,
3034 .spe,3249 .spe,
3035 .spe_eef,3250 .sve_bitperm,
3036 .sve2_bitperm,
3037 .use_postra_scheduler,3251 .use_postra_scheduler,
3038 .v9_2a,3252 .v9_2a,
3039 }),3253 }),
...@@ -3070,6 +3284,7 @@ pub const cpu = struct {...@@ -3070,6 +3284,7 @@ pub const cpu = struct {
3070 .llvm_name = "neoverse-v2",3284 .llvm_name = "neoverse-v2",
3071 .features = featureSet(&[_]Feature{3285 .features = featureSet(&[_]Feature{
3072 .alu_lsl_fast,3286 .alu_lsl_fast,
3287 .avoid_ldapur,
3073 .bf16,3288 .bf16,
3074 .cmp_bcc_fusion,3289 .cmp_bcc_fusion,
3075 .enable_select_opt,3290 .enable_select_opt,
...@@ -3083,7 +3298,7 @@ pub const cpu = struct {...@@ -3083,7 +3298,7 @@ pub const cpu = struct {
3083 .predictable_select_expensive,3298 .predictable_select_expensive,
3084 .rand,3299 .rand,
3085 .spe,3300 .spe,
3086 .sve2_bitperm,3301 .sve_bitperm,
3087 .use_fixed_over_scalable_if_equal_cost,3302 .use_fixed_over_scalable_if_equal_cost,
3088 .use_postra_scheduler,3303 .use_postra_scheduler,
3089 .v9a,3304 .v9a,
...@@ -3094,6 +3309,7 @@ pub const cpu = struct {...@@ -3094,6 +3309,7 @@ pub const cpu = struct {
3094 .llvm_name = "neoverse-v3",3309 .llvm_name = "neoverse-v3",
3095 .features = featureSet(&[_]Feature{3310 .features = featureSet(&[_]Feature{
3096 .alu_lsl_fast,3311 .alu_lsl_fast,
3312 .avoid_ldapur,
3097 .brbe,3313 .brbe,
3098 .enable_select_opt,3314 .enable_select_opt,
3099 .ete,3315 .ete,
...@@ -3106,8 +3322,7 @@ pub const cpu = struct {...@@ -3106,8 +3322,7 @@ pub const cpu = struct {
3106 .predictable_select_expensive,3322 .predictable_select_expensive,
3107 .rand,3323 .rand,
3108 .spe,3324 .spe,
3109 .spe_eef,3325 .sve_bitperm,
3110 .sve2_bitperm,
3111 .use_postra_scheduler,3326 .use_postra_scheduler,
3112 .v9_2a,3327 .v9_2a,
3113 }),3328 }),
...@@ -3117,6 +3332,7 @@ pub const cpu = struct {...@@ -3117,6 +3332,7 @@ pub const cpu = struct {
3117 .llvm_name = "neoverse-v3ae",3332 .llvm_name = "neoverse-v3ae",
3118 .features = featureSet(&[_]Feature{3333 .features = featureSet(&[_]Feature{
3119 .alu_lsl_fast,3334 .alu_lsl_fast,
3335 .avoid_ldapur,
3120 .brbe,3336 .brbe,
3121 .enable_select_opt,3337 .enable_select_opt,
3122 .ete,3338 .ete,
...@@ -3129,8 +3345,7 @@ pub const cpu = struct {...@@ -3129,8 +3345,7 @@ pub const cpu = struct {
3129 .predictable_select_expensive,3345 .predictable_select_expensive,
3130 .rand,3346 .rand,
3131 .spe,3347 .spe,
3132 .spe_eef,3348 .sve_bitperm,
3133 .sve2_bitperm,
3134 .use_postra_scheduler,3349 .use_postra_scheduler,
3135 .v9_2a,3350 .v9_2a,
3136 }),3351 }),
lib/std/Target/amdgcn.zig+327-36
...@@ -8,11 +8,15 @@ pub const Feature = enum {...@@ -8,11 +8,15 @@ pub const Feature = enum {
8 @"16_bit_insts",8 @"16_bit_insts",
9 a16,9 a16,
10 add_no_carry_insts,10 add_no_carry_insts,
11 addressablelocalmemorysize163840,
12 addressablelocalmemorysize32768,
13 addressablelocalmemorysize65536,
11 agent_scope_fine_grained_remote_memory_atomics,14 agent_scope_fine_grained_remote_memory_atomics,
12 allocate1_5xvgprs,15 allocate1_5xvgprs,
13 aperture_regs,16 aperture_regs,
14 architected_flat_scratch,17 architected_flat_scratch,
15 architected_sgprs,18 architected_sgprs,
19 ashr_pk_insts,
16 atomic_buffer_global_pk_add_f16_insts,20 atomic_buffer_global_pk_add_f16_insts,
17 atomic_buffer_global_pk_add_f16_no_rtn_insts,21 atomic_buffer_global_pk_add_f16_no_rtn_insts,
18 atomic_buffer_pk_add_bf16_inst,22 atomic_buffer_pk_add_bf16_inst,
...@@ -28,13 +32,20 @@ pub const Feature = enum {...@@ -28,13 +32,20 @@ pub const Feature = enum {
28 atomic_global_pk_add_bf16_inst,32 atomic_global_pk_add_bf16_inst,
29 auto_waitcnt_before_barrier,33 auto_waitcnt_before_barrier,
30 back_off_barrier,34 back_off_barrier,
35 bf16_cvt_insts,
36 bf8_cvt_scale_insts,
37 bitop3_insts,
31 ci_insts,38 ci_insts,
32 cumode,39 cumode,
40 cvt_fp8_vop1_bug,
41 cvt_pk_f16_f32_inst,
33 default_component_broadcast,42 default_component_broadcast,
34 default_component_zero,43 default_component_zero,
35 dl_insts,44 dl_insts,
36 dot10_insts,45 dot10_insts,
37 dot11_insts,46 dot11_insts,
47 dot12_insts,
48 dot13_insts,
38 dot1_insts,49 dot1_insts,
39 dot2_insts,50 dot2_insts,
40 dot3_insts,51 dot3_insts,
...@@ -51,6 +62,8 @@ pub const Feature = enum {...@@ -51,6 +62,8 @@ pub const Feature = enum {
51 ds128,62 ds128,
52 ds_src2_insts,63 ds_src2_insts,
53 extended_image_insts,64 extended_image_insts,
65 f16bf16_to_fp6bf6_cvt_scale_insts,
66 f32_to_f16bf16_cvt_sr_insts,
54 fast_denormal_f32,67 fast_denormal_f32,
55 fast_fmaf,68 fast_fmaf,
56 flat_address_space,69 flat_address_space,
...@@ -66,8 +79,11 @@ pub const Feature = enum {...@@ -66,8 +79,11 @@ pub const Feature = enum {
66 fmacf64_inst,79 fmacf64_inst,
67 fmaf,80 fmaf,
68 force_store_sc0_sc1,81 force_store_sc0_sc1,
82 fp4_cvt_scale_insts,
69 fp64,83 fp64,
84 fp6bf6_cvt_scale_insts,
70 fp8_conversion_insts,85 fp8_conversion_insts,
86 fp8_cvt_scale_insts,
71 fp8_insts,87 fp8_insts,
72 full_rate_64_ops,88 full_rate_64_ops,
73 g16,89 g16,
...@@ -88,6 +104,7 @@ pub const Feature = enum {...@@ -88,6 +104,7 @@ pub const Feature = enum {
88 gfx9,104 gfx9,
89 gfx90a_insts,105 gfx90a_insts,
90 gfx940_insts,106 gfx940_insts,
107 gfx950_insts,
91 gfx9_insts,108 gfx9_insts,
92 gws,109 gws,
93 half_rate_64_ops,110 half_rate_64_ops,
...@@ -103,8 +120,6 @@ pub const Feature = enum {...@@ -103,8 +120,6 @@ pub const Feature = enum {
103 ldsbankcount16,120 ldsbankcount16,
104 ldsbankcount32,121 ldsbankcount32,
105 load_store_opt,122 load_store_opt,
106 localmemorysize32768,
107 localmemorysize65536,
108 mad_intra_fwd_bug,123 mad_intra_fwd_bug,
109 mad_mac_f32_insts,124 mad_mac_f32_insts,
110 mad_mix_insts,125 mad_mix_insts,
...@@ -117,6 +132,9 @@ pub const Feature = enum {...@@ -117,6 +132,9 @@ pub const Feature = enum {
117 memory_atomic_fadd_f32_denormal_support,132 memory_atomic_fadd_f32_denormal_support,
118 mfma_inline_literal_bug,133 mfma_inline_literal_bug,
119 mimg_r128,134 mimg_r128,
135 minimum3_maximum3_f16,
136 minimum3_maximum3_f32,
137 minimum3_maximum3_pkf16,
120 movrel,138 movrel,
121 msaa_load_dst_sel_bug,139 msaa_load_dst_sel_bug,
122 negative_scratch_offset_bug,140 negative_scratch_offset_bug,
...@@ -130,9 +148,12 @@ pub const Feature = enum {...@@ -130,9 +148,12 @@ pub const Feature = enum {
130 packed_fp32_ops,148 packed_fp32_ops,
131 packed_tid,149 packed_tid,
132 partial_nsa_encoding,150 partial_nsa_encoding,
151 permlane16_swap,
152 permlane32_swap,
133 pk_fmac_f16_inst,153 pk_fmac_f16_inst,
134 precise_memory,154 precise_memory,
135 priv_enabled_trap2_nop_bug,155 priv_enabled_trap2_nop_bug,
156 prng_inst,
136 promote_alloca,157 promote_alloca,
137 prt_strict_null,158 prt_strict_null,
138 pseudo_scalar_trans,159 pseudo_scalar_trans,
...@@ -178,7 +199,6 @@ pub const Feature = enum {...@@ -178,7 +199,6 @@ pub const Feature = enum {
178 vcmpx_exec_war_hazard,199 vcmpx_exec_war_hazard,
179 vcmpx_permlane_hazard,200 vcmpx_permlane_hazard,
180 vgpr_index_mode,201 vgpr_index_mode,
181 vgpr_singleuse_hint,
182 vmem_to_scalar_write_hazard,202 vmem_to_scalar_write_hazard,
183 vmem_write_vgpr_in_order,203 vmem_write_vgpr_in_order,
184 volcanic_islands,204 volcanic_islands,
...@@ -189,6 +209,7 @@ pub const Feature = enum {...@@ -189,6 +209,7 @@ pub const Feature = enum {
189 wavefrontsize16,209 wavefrontsize16,
190 wavefrontsize32,210 wavefrontsize32,
191 wavefrontsize64,211 wavefrontsize64,
212 xf32_insts,
192 xnack,213 xnack,
193 xnack_support,214 xnack_support,
194};215};
...@@ -217,6 +238,21 @@ pub const all_features = blk: {...@@ -217,6 +238,21 @@ pub const all_features = blk: {
217 .description = "Have VALU add/sub instructions without carry out",238 .description = "Have VALU add/sub instructions without carry out",
218 .dependencies = featureSet(&[_]Feature{}),239 .dependencies = featureSet(&[_]Feature{}),
219 };240 };
241 result[@intFromEnum(Feature.addressablelocalmemorysize163840)] = .{
242 .llvm_name = "addressablelocalmemorysize163840",
243 .description = "The size of local memory in bytes",
244 .dependencies = featureSet(&[_]Feature{}),
245 };
246 result[@intFromEnum(Feature.addressablelocalmemorysize32768)] = .{
247 .llvm_name = "addressablelocalmemorysize32768",
248 .description = "The size of local memory in bytes",
249 .dependencies = featureSet(&[_]Feature{}),
250 };
251 result[@intFromEnum(Feature.addressablelocalmemorysize65536)] = .{
252 .llvm_name = "addressablelocalmemorysize65536",
253 .description = "The size of local memory in bytes",
254 .dependencies = featureSet(&[_]Feature{}),
255 };
220 result[@intFromEnum(Feature.agent_scope_fine_grained_remote_memory_atomics)] = .{256 result[@intFromEnum(Feature.agent_scope_fine_grained_remote_memory_atomics)] = .{
221 .llvm_name = "agent-scope-fine-grained-remote-memory-atomics",257 .llvm_name = "agent-scope-fine-grained-remote-memory-atomics",
222 .description = "Agent (device) scoped atomic operations, excluding those directly supported by PCIe (i.e. integer atomic add, exchange, and compare-and-swap), are functional for allocations in host or peer device memory.",258 .description = "Agent (device) scoped atomic operations, excluding those directly supported by PCIe (i.e. integer atomic add, exchange, and compare-and-swap), are functional for allocations in host or peer device memory.",
...@@ -242,6 +278,11 @@ pub const all_features = blk: {...@@ -242,6 +278,11 @@ pub const all_features = blk: {
242 .description = "Enable the architected SGPRs",278 .description = "Enable the architected SGPRs",
243 .dependencies = featureSet(&[_]Feature{}),279 .dependencies = featureSet(&[_]Feature{}),
244 };280 };
281 result[@intFromEnum(Feature.ashr_pk_insts)] = .{
282 .llvm_name = "ashr-pk-insts",
283 .description = "Has Arithmetic Shift Pack instructions",
284 .dependencies = featureSet(&[_]Feature{}),
285 };
245 result[@intFromEnum(Feature.atomic_buffer_global_pk_add_f16_insts)] = .{286 result[@intFromEnum(Feature.atomic_buffer_global_pk_add_f16_insts)] = .{
246 .llvm_name = "atomic-buffer-global-pk-add-f16-insts",287 .llvm_name = "atomic-buffer-global-pk-add-f16-insts",
247 .description = "Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 instructions that can return original value",288 .description = "Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 instructions that can return original value",
...@@ -327,6 +368,21 @@ pub const all_features = blk: {...@@ -327,6 +368,21 @@ pub const all_features = blk: {
327 .description = "Hardware supports backing off s_barrier if an exception occurs",368 .description = "Hardware supports backing off s_barrier if an exception occurs",
328 .dependencies = featureSet(&[_]Feature{}),369 .dependencies = featureSet(&[_]Feature{}),
329 };370 };
371 result[@intFromEnum(Feature.bf16_cvt_insts)] = .{
372 .llvm_name = "bf16-cvt-insts",
373 .description = "Has bf16 conversion instructions",
374 .dependencies = featureSet(&[_]Feature{}),
375 };
376 result[@intFromEnum(Feature.bf8_cvt_scale_insts)] = .{
377 .llvm_name = "bf8-cvt-scale-insts",
378 .description = "Has bf8 conversion scale instructions",
379 .dependencies = featureSet(&[_]Feature{}),
380 };
381 result[@intFromEnum(Feature.bitop3_insts)] = .{
382 .llvm_name = "bitop3-insts",
383 .description = "Has v_bitop3_b32/v_bitop3_b16 instructions",
384 .dependencies = featureSet(&[_]Feature{}),
385 };
330 result[@intFromEnum(Feature.ci_insts)] = .{386 result[@intFromEnum(Feature.ci_insts)] = .{
331 .llvm_name = "ci-insts",387 .llvm_name = "ci-insts",
332 .description = "Additional instructions for CI+",388 .description = "Additional instructions for CI+",
...@@ -337,6 +393,18 @@ pub const all_features = blk: {...@@ -337,6 +393,18 @@ pub const all_features = blk: {
337 .description = "Enable CU wavefront execution mode",393 .description = "Enable CU wavefront execution mode",
338 .dependencies = featureSet(&[_]Feature{}),394 .dependencies = featureSet(&[_]Feature{}),
339 };395 };
396 result[@intFromEnum(Feature.cvt_fp8_vop1_bug)] = .{
397 .llvm_name = "cvt-fp8-vop1-bug",
398 .description = "FP8/BF8 VOP1 form of conversion to F32 is unreliable",
399 .dependencies = featureSet(&[_]Feature{
400 .fp8_conversion_insts,
401 }),
402 };
403 result[@intFromEnum(Feature.cvt_pk_f16_f32_inst)] = .{
404 .llvm_name = "cvt-pk-f16-f32-inst",
405 .description = "Has cvt_pk_f16_f32 instruction",
406 .dependencies = featureSet(&[_]Feature{}),
407 };
340 result[@intFromEnum(Feature.default_component_broadcast)] = .{408 result[@intFromEnum(Feature.default_component_broadcast)] = .{
341 .llvm_name = "default-component-broadcast",409 .llvm_name = "default-component-broadcast",
342 .description = "BUFFER/IMAGE store instructions set unspecified components to x component (GFX12)",410 .description = "BUFFER/IMAGE store instructions set unspecified components to x component (GFX12)",
...@@ -362,6 +430,16 @@ pub const all_features = blk: {...@@ -362,6 +430,16 @@ pub const all_features = blk: {
362 .description = "Has v_dot4_f32_fp8_fp8, v_dot4_f32_fp8_bf8, v_dot4_f32_bf8_fp8, v_dot4_f32_bf8_bf8 instructions",430 .description = "Has v_dot4_f32_fp8_fp8, v_dot4_f32_fp8_bf8, v_dot4_f32_bf8_fp8, v_dot4_f32_bf8_bf8 instructions",
363 .dependencies = featureSet(&[_]Feature{}),431 .dependencies = featureSet(&[_]Feature{}),
364 };432 };
433 result[@intFromEnum(Feature.dot12_insts)] = .{
434 .llvm_name = "dot12-insts",
435 .description = "Has v_dot2_f32_bf16 instructions",
436 .dependencies = featureSet(&[_]Feature{}),
437 };
438 result[@intFromEnum(Feature.dot13_insts)] = .{
439 .llvm_name = "dot13-insts",
440 .description = "Has v_dot2c_f32_bf16 instructions",
441 .dependencies = featureSet(&[_]Feature{}),
442 };
365 result[@intFromEnum(Feature.dot1_insts)] = .{443 result[@intFromEnum(Feature.dot1_insts)] = .{
366 .llvm_name = "dot1-insts",444 .llvm_name = "dot1-insts",
367 .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions",445 .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions",
...@@ -404,7 +482,7 @@ pub const all_features = blk: {...@@ -404,7 +482,7 @@ pub const all_features = blk: {
404 };482 };
405 result[@intFromEnum(Feature.dot9_insts)] = .{483 result[@intFromEnum(Feature.dot9_insts)] = .{
406 .llvm_name = "dot9-insts",484 .llvm_name = "dot9-insts",
407 .description = "Has v_dot2_f16_f16, v_dot2_bf16_bf16, v_dot2_f32_bf16 instructions",485 .description = "Has v_dot2_f16_f16, v_dot2_bf16_bf16 instructions",
408 .dependencies = featureSet(&[_]Feature{}),486 .dependencies = featureSet(&[_]Feature{}),
409 };487 };
410 result[@intFromEnum(Feature.dpp)] = .{488 result[@intFromEnum(Feature.dpp)] = .{
...@@ -442,6 +520,16 @@ pub const all_features = blk: {...@@ -442,6 +520,16 @@ pub const all_features = blk: {
442 .description = "Support mips != 0, lod != 0, gather4, and get_lod",520 .description = "Support mips != 0, lod != 0, gather4, and get_lod",
443 .dependencies = featureSet(&[_]Feature{}),521 .dependencies = featureSet(&[_]Feature{}),
444 };522 };
523 result[@intFromEnum(Feature.f16bf16_to_fp6bf6_cvt_scale_insts)] = .{
524 .llvm_name = "f16bf16-to-fp6bf6-cvt-scale-insts",
525 .description = "Has f16bf16 to fp6bf6 conversion scale instructions",
526 .dependencies = featureSet(&[_]Feature{}),
527 };
528 result[@intFromEnum(Feature.f32_to_f16bf16_cvt_sr_insts)] = .{
529 .llvm_name = "f32-to-f16bf16-cvt-sr-insts",
530 .description = "Has f32 to f16bf16 conversion scale instructions",
531 .dependencies = featureSet(&[_]Feature{}),
532 };
445 result[@intFromEnum(Feature.fast_denormal_f32)] = .{533 result[@intFromEnum(Feature.fast_denormal_f32)] = .{
446 .llvm_name = "fast-denormal-f32",534 .llvm_name = "fast-denormal-f32",
447 .description = "Enabling denormals does not cause f32 instructions to run at f64 rates",535 .description = "Enabling denormals does not cause f32 instructions to run at f64 rates",
...@@ -517,16 +605,31 @@ pub const all_features = blk: {...@@ -517,16 +605,31 @@ pub const all_features = blk: {
517 .description = "Has SC0 and SC1 on stores",605 .description = "Has SC0 and SC1 on stores",
518 .dependencies = featureSet(&[_]Feature{}),606 .dependencies = featureSet(&[_]Feature{}),
519 };607 };
608 result[@intFromEnum(Feature.fp4_cvt_scale_insts)] = .{
609 .llvm_name = "fp4-cvt-scale-insts",
610 .description = "Has fp4 conversion scale instructions",
611 .dependencies = featureSet(&[_]Feature{}),
612 };
520 result[@intFromEnum(Feature.fp64)] = .{613 result[@intFromEnum(Feature.fp64)] = .{
521 .llvm_name = "fp64",614 .llvm_name = "fp64",
522 .description = "Enable double precision operations",615 .description = "Enable double precision operations",
523 .dependencies = featureSet(&[_]Feature{}),616 .dependencies = featureSet(&[_]Feature{}),
524 };617 };
618 result[@intFromEnum(Feature.fp6bf6_cvt_scale_insts)] = .{
619 .llvm_name = "fp6bf6-cvt-scale-insts",
620 .description = "Has fp6 and bf6 conversion scale instructions",
621 .dependencies = featureSet(&[_]Feature{}),
622 };
525 result[@intFromEnum(Feature.fp8_conversion_insts)] = .{623 result[@intFromEnum(Feature.fp8_conversion_insts)] = .{
526 .llvm_name = "fp8-conversion-insts",624 .llvm_name = "fp8-conversion-insts",
527 .description = "Has fp8 and bf8 conversion instructions",625 .description = "Has fp8 and bf8 conversion instructions",
528 .dependencies = featureSet(&[_]Feature{}),626 .dependencies = featureSet(&[_]Feature{}),
529 };627 };
628 result[@intFromEnum(Feature.fp8_cvt_scale_insts)] = .{
629 .llvm_name = "fp8-cvt-scale-insts",
630 .description = "Has fp8 conversion scale instructions",
631 .dependencies = featureSet(&[_]Feature{}),
632 };
530 result[@intFromEnum(Feature.fp8_insts)] = .{633 result[@intFromEnum(Feature.fp8_insts)] = .{
531 .llvm_name = "fp8-insts",634 .llvm_name = "fp8-insts",
532 .description = "Has fp8 and bf8 instructions",635 .description = "Has fp8 and bf8 instructions",
...@@ -564,6 +667,7 @@ pub const all_features = blk: {...@@ -564,6 +667,7 @@ pub const all_features = blk: {
564 .@"16_bit_insts",667 .@"16_bit_insts",
565 .a16,668 .a16,
566 .add_no_carry_insts,669 .add_no_carry_insts,
670 .addressablelocalmemorysize65536,
567 .aperture_regs,671 .aperture_regs,
568 .atomic_fmin_fmax_flat_f32,672 .atomic_fmin_fmax_flat_f32,
569 .atomic_fmin_fmax_flat_f64,673 .atomic_fmin_fmax_flat_f64,
...@@ -591,7 +695,6 @@ pub const all_features = blk: {...@@ -591,7 +695,6 @@ pub const all_features = blk: {
591 .image_insts,695 .image_insts,
592 .int_clamp_insts,696 .int_clamp_insts,
593 .inv_2pi_inline_imm,697 .inv_2pi_inline_imm,
594 .localmemorysize65536,
595 .max_hard_clause_length_63,698 .max_hard_clause_length_63,
596 .mimg_r128,699 .mimg_r128,
597 .movrel,700 .movrel,
...@@ -606,6 +709,7 @@ pub const all_features = blk: {...@@ -606,6 +709,7 @@ pub const all_features = blk: {
606 .sdwa_sdst,709 .sdwa_sdst,
607 .unaligned_buffer_access,710 .unaligned_buffer_access,
608 .unaligned_ds_access,711 .unaligned_ds_access,
712 .unaligned_scratch_access,
609 .vmem_write_vgpr_in_order,713 .vmem_write_vgpr_in_order,
610 .vop3_literal,714 .vop3_literal,
611 .vop3p,715 .vop3p,
...@@ -639,6 +743,7 @@ pub const all_features = blk: {...@@ -639,6 +743,7 @@ pub const all_features = blk: {
639 .@"16_bit_insts",743 .@"16_bit_insts",
640 .a16,744 .a16,
641 .add_no_carry_insts,745 .add_no_carry_insts,
746 .addressablelocalmemorysize65536,
642 .aperture_regs,747 .aperture_regs,
643 .atomic_fmin_fmax_flat_f32,748 .atomic_fmin_fmax_flat_f32,
644 .atomic_fmin_fmax_global_f32,749 .atomic_fmin_fmax_global_f32,
...@@ -667,7 +772,6 @@ pub const all_features = blk: {...@@ -667,7 +772,6 @@ pub const all_features = blk: {
667 .gws,772 .gws,
668 .int_clamp_insts,773 .int_clamp_insts,
669 .inv_2pi_inline_imm,774 .inv_2pi_inline_imm,
670 .localmemorysize65536,
671 .max_hard_clause_length_32,775 .max_hard_clause_length_32,
672 .mimg_r128,776 .mimg_r128,
673 .movrel,777 .movrel,
...@@ -677,6 +781,7 @@ pub const all_features = blk: {...@@ -677,6 +781,7 @@ pub const all_features = blk: {
677 .true16,781 .true16,
678 .unaligned_buffer_access,782 .unaligned_buffer_access,
679 .unaligned_ds_access,783 .unaligned_ds_access,
784 .unaligned_scratch_access,
680 .vmem_write_vgpr_in_order,785 .vmem_write_vgpr_in_order,
681 .vop3_literal,786 .vop3_literal,
682 .vop3p,787 .vop3p,
...@@ -696,6 +801,7 @@ pub const all_features = blk: {...@@ -696,6 +801,7 @@ pub const all_features = blk: {
696 .@"16_bit_insts",801 .@"16_bit_insts",
697 .a16,802 .a16,
698 .add_no_carry_insts,803 .add_no_carry_insts,
804 .addressablelocalmemorysize65536,
699 .agent_scope_fine_grained_remote_memory_atomics,805 .agent_scope_fine_grained_remote_memory_atomics,
700 .aperture_regs,806 .aperture_regs,
701 .atomic_fmin_fmax_flat_f32,807 .atomic_fmin_fmax_flat_f32,
...@@ -723,9 +829,10 @@ pub const all_features = blk: {...@@ -723,9 +829,10 @@ pub const all_features = blk: {
723 .gfx9_insts,829 .gfx9_insts,
724 .int_clamp_insts,830 .int_clamp_insts,
725 .inv_2pi_inline_imm,831 .inv_2pi_inline_imm,
726 .localmemorysize65536,
727 .max_hard_clause_length_32,832 .max_hard_clause_length_32,
728 .mimg_r128,833 .mimg_r128,
834 .minimum3_maximum3_f16,
835 .minimum3_maximum3_f32,
729 .movrel,836 .movrel,
730 .no_data_dep_hazard,837 .no_data_dep_hazard,
731 .no_sdst_cmpx,838 .no_sdst_cmpx,
...@@ -733,6 +840,7 @@ pub const all_features = blk: {...@@ -733,6 +840,7 @@ pub const all_features = blk: {
733 .true16,840 .true16,
734 .unaligned_buffer_access,841 .unaligned_buffer_access,
735 .unaligned_ds_access,842 .unaligned_ds_access,
843 .unaligned_scratch_access,
736 .vop3_literal,844 .vop3_literal,
737 .vop3p,845 .vop3p,
738 .vopd,846 .vopd,
...@@ -779,7 +887,6 @@ pub const all_features = blk: {...@@ -779,7 +887,6 @@ pub const all_features = blk: {
779 .gws,887 .gws,
780 .int_clamp_insts,888 .int_clamp_insts,
781 .inv_2pi_inline_imm,889 .inv_2pi_inline_imm,
782 .localmemorysize65536,
783 .negative_scratch_offset_bug,890 .negative_scratch_offset_bug,
784 .r128_a16,891 .r128_a16,
785 .s_memrealtime,892 .s_memrealtime,
...@@ -793,6 +900,7 @@ pub const all_features = blk: {...@@ -793,6 +900,7 @@ pub const all_features = blk: {
793 .sdwa_sdst,900 .sdwa_sdst,
794 .unaligned_buffer_access,901 .unaligned_buffer_access,
795 .unaligned_ds_access,902 .unaligned_ds_access,
903 .unaligned_scratch_access,
796 .vgpr_index_mode,904 .vgpr_index_mode,
797 .vmem_write_vgpr_in_order,905 .vmem_write_vgpr_in_order,
798 .vop3p,906 .vop3p,
...@@ -810,6 +918,24 @@ pub const all_features = blk: {...@@ -810,6 +918,24 @@ pub const all_features = blk: {
810 .description = "Additional instructions for GFX940+",918 .description = "Additional instructions for GFX940+",
811 .dependencies = featureSet(&[_]Feature{}),919 .dependencies = featureSet(&[_]Feature{}),
812 };920 };
921 result[@intFromEnum(Feature.gfx950_insts)] = .{
922 .llvm_name = "gfx950-insts",
923 .description = "Additional instructions for GFX950+",
924 .dependencies = featureSet(&[_]Feature{
925 .ashr_pk_insts,
926 .bf8_cvt_scale_insts,
927 .cvt_pk_f16_f32_inst,
928 .f16bf16_to_fp6bf6_cvt_scale_insts,
929 .f32_to_f16bf16_cvt_sr_insts,
930 .fp4_cvt_scale_insts,
931 .fp6bf6_cvt_scale_insts,
932 .fp8_cvt_scale_insts,
933 .minimum3_maximum3_f32,
934 .minimum3_maximum3_pkf16,
935 .permlane16_swap,
936 .permlane32_swap,
937 }),
938 };
813 result[@intFromEnum(Feature.gfx9_insts)] = .{939 result[@intFromEnum(Feature.gfx9_insts)] = .{
814 .llvm_name = "gfx9-insts",940 .llvm_name = "gfx9-insts",
815 .description = "Additional instructions for GFX9+",941 .description = "Additional instructions for GFX9+",
...@@ -885,16 +1011,6 @@ pub const all_features = blk: {...@@ -885,16 +1011,6 @@ pub const all_features = blk: {
885 .description = "Enable SI load/store optimizer pass",1011 .description = "Enable SI load/store optimizer pass",
886 .dependencies = featureSet(&[_]Feature{}),1012 .dependencies = featureSet(&[_]Feature{}),
887 };1013 };
888 result[@intFromEnum(Feature.localmemorysize32768)] = .{
889 .llvm_name = "localmemorysize32768",
890 .description = "The size of local memory in bytes",
891 .dependencies = featureSet(&[_]Feature{}),
892 };
893 result[@intFromEnum(Feature.localmemorysize65536)] = .{
894 .llvm_name = "localmemorysize65536",
895 .description = "The size of local memory in bytes",
896 .dependencies = featureSet(&[_]Feature{}),
897 };
898 result[@intFromEnum(Feature.mad_intra_fwd_bug)] = .{1014 result[@intFromEnum(Feature.mad_intra_fwd_bug)] = .{
899 .llvm_name = "mad-intra-fwd-bug",1015 .llvm_name = "mad-intra-fwd-bug",
900 .description = "MAD_U64/I64 intra instruction forwarding bug",1016 .description = "MAD_U64/I64 intra instruction forwarding bug",
...@@ -955,6 +1071,21 @@ pub const all_features = blk: {...@@ -955,6 +1071,21 @@ pub const all_features = blk: {
955 .description = "Support 128-bit texture resources",1071 .description = "Support 128-bit texture resources",
956 .dependencies = featureSet(&[_]Feature{}),1072 .dependencies = featureSet(&[_]Feature{}),
957 };1073 };
1074 result[@intFromEnum(Feature.minimum3_maximum3_f16)] = .{
1075 .llvm_name = "minimum3-maximum3-f16",
1076 .description = "Has v_minimum3_f16 and v_maximum3_f16 instructions",
1077 .dependencies = featureSet(&[_]Feature{}),
1078 };
1079 result[@intFromEnum(Feature.minimum3_maximum3_f32)] = .{
1080 .llvm_name = "minimum3-maximum3-f32",
1081 .description = "Has v_minimum3_f32 and v_maximum3_f32 instructions",
1082 .dependencies = featureSet(&[_]Feature{}),
1083 };
1084 result[@intFromEnum(Feature.minimum3_maximum3_pkf16)] = .{
1085 .llvm_name = "minimum3-maximum3-pkf16",
1086 .description = "Has v_pk_minimum3_f16 and v_pk_maximum3_f16 instructions",
1087 .dependencies = featureSet(&[_]Feature{}),
1088 };
958 result[@intFromEnum(Feature.movrel)] = .{1089 result[@intFromEnum(Feature.movrel)] = .{
959 .llvm_name = "movrel",1090 .llvm_name = "movrel",
960 .description = "Has v_movrel*_b32 instructions",1091 .description = "Has v_movrel*_b32 instructions",
...@@ -1020,6 +1151,16 @@ pub const all_features = blk: {...@@ -1020,6 +1151,16 @@ pub const all_features = blk: {
1020 .description = "Support partial NSA encoding for image instructions",1151 .description = "Support partial NSA encoding for image instructions",
1021 .dependencies = featureSet(&[_]Feature{}),1152 .dependencies = featureSet(&[_]Feature{}),
1022 };1153 };
1154 result[@intFromEnum(Feature.permlane16_swap)] = .{
1155 .llvm_name = "permlane16-swap",
1156 .description = "Has v_permlane16_swap_b32 instructions",
1157 .dependencies = featureSet(&[_]Feature{}),
1158 };
1159 result[@intFromEnum(Feature.permlane32_swap)] = .{
1160 .llvm_name = "permlane32-swap",
1161 .description = "Has v_permlane32_swap_b32 instructions",
1162 .dependencies = featureSet(&[_]Feature{}),
1163 };
1023 result[@intFromEnum(Feature.pk_fmac_f16_inst)] = .{1164 result[@intFromEnum(Feature.pk_fmac_f16_inst)] = .{
1024 .llvm_name = "pk-fmac-f16-inst",1165 .llvm_name = "pk-fmac-f16-inst",
1025 .description = "Has v_pk_fmac_f16 instruction",1166 .description = "Has v_pk_fmac_f16 instruction",
...@@ -1035,6 +1176,11 @@ pub const all_features = blk: {...@@ -1035,6 +1176,11 @@ pub const all_features = blk: {
1035 .description = "Hardware that runs with PRIV=1 interpreting 's_trap 2' as a nop bug",1176 .description = "Hardware that runs with PRIV=1 interpreting 's_trap 2' as a nop bug",
1036 .dependencies = featureSet(&[_]Feature{}),1177 .dependencies = featureSet(&[_]Feature{}),
1037 };1178 };
1179 result[@intFromEnum(Feature.prng_inst)] = .{
1180 .llvm_name = "prng-inst",
1181 .description = "Has v_prng_b32 instruction",
1182 .dependencies = featureSet(&[_]Feature{}),
1183 };
1038 result[@intFromEnum(Feature.promote_alloca)] = .{1184 result[@intFromEnum(Feature.promote_alloca)] = .{
1039 .llvm_name = "promote-alloca",1185 .llvm_name = "promote-alloca",
1040 .description = "Enable promote alloca pass",1186 .description = "Enable promote alloca pass",
...@@ -1144,6 +1290,7 @@ pub const all_features = blk: {...@@ -1144,6 +1290,7 @@ pub const all_features = blk: {
1144 .llvm_name = "sea-islands",1290 .llvm_name = "sea-islands",
1145 .description = "SEA_ISLANDS GPU generation",1291 .description = "SEA_ISLANDS GPU generation",
1146 .dependencies = featureSet(&[_]Feature{1292 .dependencies = featureSet(&[_]Feature{
1293 .addressablelocalmemorysize65536,
1147 .atomic_fmin_fmax_flat_f32,1294 .atomic_fmin_fmax_flat_f32,
1148 .atomic_fmin_fmax_flat_f64,1295 .atomic_fmin_fmax_flat_f64,
1149 .atomic_fmin_fmax_global_f32,1296 .atomic_fmin_fmax_global_f32,
...@@ -1158,7 +1305,6 @@ pub const all_features = blk: {...@@ -1158,7 +1305,6 @@ pub const all_features = blk: {
1158 .gfx7_gfx8_gfx9_insts,1305 .gfx7_gfx8_gfx9_insts,
1159 .gws,1306 .gws,
1160 .image_insts,1307 .image_insts,
1161 .localmemorysize65536,
1162 .mad_mac_f32_insts,1308 .mad_mac_f32_insts,
1163 .mimg_r128,1309 .mimg_r128,
1164 .movrel,1310 .movrel,
...@@ -1198,6 +1344,7 @@ pub const all_features = blk: {...@@ -1198,6 +1344,7 @@ pub const all_features = blk: {
1198 .llvm_name = "southern-islands",1344 .llvm_name = "southern-islands",
1199 .description = "SOUTHERN_ISLANDS GPU generation",1345 .description = "SOUTHERN_ISLANDS GPU generation",
1200 .dependencies = featureSet(&[_]Feature{1346 .dependencies = featureSet(&[_]Feature{
1347 .addressablelocalmemorysize32768,
1201 .atomic_fmin_fmax_global_f32,1348 .atomic_fmin_fmax_global_f32,
1202 .atomic_fmin_fmax_global_f64,1349 .atomic_fmin_fmax_global_f64,
1203 .default_component_zero,1350 .default_component_zero,
...@@ -1208,7 +1355,6 @@ pub const all_features = blk: {...@@ -1208,7 +1355,6 @@ pub const all_features = blk: {
1208 .gws,1355 .gws,
1209 .image_insts,1356 .image_insts,
1210 .ldsbankcount32,1357 .ldsbankcount32,
1211 .localmemorysize32768,
1212 .mad_mac_f32_insts,1358 .mad_mac_f32_insts,
1213 .mimg_r128,1359 .mimg_r128,
1214 .movrel,1360 .movrel,
...@@ -1303,11 +1449,6 @@ pub const all_features = blk: {...@@ -1303,11 +1449,6 @@ pub const all_features = blk: {
1303 .description = "Has VGPR mode register indexing",1449 .description = "Has VGPR mode register indexing",
1304 .dependencies = featureSet(&[_]Feature{}),1450 .dependencies = featureSet(&[_]Feature{}),
1305 };1451 };
1306 result[@intFromEnum(Feature.vgpr_singleuse_hint)] = .{
1307 .llvm_name = "vgpr-singleuse-hint",
1308 .description = "Has single-use VGPR hint instructions",
1309 .dependencies = featureSet(&[_]Feature{}),
1310 };
1311 result[@intFromEnum(Feature.vmem_to_scalar_write_hazard)] = .{1452 result[@intFromEnum(Feature.vmem_to_scalar_write_hazard)] = .{
1312 .llvm_name = "vmem-to-scalar-write-hazard",1453 .llvm_name = "vmem-to-scalar-write-hazard",
1313 .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.",1454 .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.",
...@@ -1323,6 +1464,7 @@ pub const all_features = blk: {...@@ -1323,6 +1464,7 @@ pub const all_features = blk: {
1323 .description = "VOLCANIC_ISLANDS GPU generation",1464 .description = "VOLCANIC_ISLANDS GPU generation",
1324 .dependencies = featureSet(&[_]Feature{1465 .dependencies = featureSet(&[_]Feature{
1325 .@"16_bit_insts",1466 .@"16_bit_insts",
1467 .addressablelocalmemorysize65536,
1326 .ci_insts,1468 .ci_insts,
1327 .default_component_zero,1469 .default_component_zero,
1328 .dpp,1470 .dpp,
...@@ -1339,7 +1481,6 @@ pub const all_features = blk: {...@@ -1339,7 +1481,6 @@ pub const all_features = blk: {
1339 .image_insts,1481 .image_insts,
1340 .int_clamp_insts,1482 .int_clamp_insts,
1341 .inv_2pi_inline_imm,1483 .inv_2pi_inline_imm,
1342 .localmemorysize65536,
1343 .mad_mac_f32_insts,1484 .mad_mac_f32_insts,
1344 .mimg_r128,1485 .mimg_r128,
1345 .movrel,1486 .movrel,
...@@ -1391,6 +1532,11 @@ pub const all_features = blk: {...@@ -1391,6 +1532,11 @@ pub const all_features = blk: {
1391 .description = "The number of threads per wavefront",1532 .description = "The number of threads per wavefront",
1392 .dependencies = featureSet(&[_]Feature{}),1533 .dependencies = featureSet(&[_]Feature{}),
1393 };1534 };
1535 result[@intFromEnum(Feature.xf32_insts)] = .{
1536 .llvm_name = "xf32-insts",
1537 .description = "Has instructions that support xf32 format, such as v_mfma_f32_16x16x8_xf32 and v_mfma_f32_32x32x4_xf32",
1538 .dependencies = featureSet(&[_]Feature{}),
1539 };
1394 result[@intFromEnum(Feature.xnack)] = .{1540 result[@intFromEnum(Feature.xnack)] = .{
1395 .llvm_name = "xnack",1541 .llvm_name = "xnack",
1396 .description = "Enable XNACK support",1542 .description = "Enable XNACK support",
...@@ -1445,7 +1591,6 @@ pub const cpu = struct {...@@ -1445,7 +1591,6 @@ pub const cpu = struct {
1445 .features = featureSet(&[_]Feature{1591 .features = featureSet(&[_]Feature{
1446 .gds,1592 .gds,
1447 .gws,1593 .gws,
1448 .wavefrontsize64,
1449 }),1594 }),
1450 };1595 };
1451 pub const generic_hsa: CpuModel = .{1596 pub const generic_hsa: CpuModel = .{
...@@ -1455,7 +1600,6 @@ pub const cpu = struct {...@@ -1455,7 +1600,6 @@ pub const cpu = struct {
1455 .flat_address_space,1600 .flat_address_space,
1456 .gds,1601 .gds,
1457 .gws,1602 .gws,
1458 .wavefrontsize64,
1459 }),1603 }),
1460 };1604 };
1461 pub const gfx1010: CpuModel = .{1605 pub const gfx1010: CpuModel = .{
...@@ -1801,6 +1945,7 @@ pub const cpu = struct {...@@ -1801,6 +1945,7 @@ pub const cpu = struct {
1801 .atomic_fadd_rtn_insts,1945 .atomic_fadd_rtn_insts,
1802 .dl_insts,1946 .dl_insts,
1803 .dot10_insts,1947 .dot10_insts,
1948 .dot12_insts,
1804 .dot5_insts,1949 .dot5_insts,
1805 .dot7_insts,1950 .dot7_insts,
1806 .dot8_insts,1951 .dot8_insts,
...@@ -1832,6 +1977,7 @@ pub const cpu = struct {...@@ -1832,6 +1977,7 @@ pub const cpu = struct {
1832 .atomic_fadd_rtn_insts,1977 .atomic_fadd_rtn_insts,
1833 .dl_insts,1978 .dl_insts,
1834 .dot10_insts,1979 .dot10_insts,
1980 .dot12_insts,
1835 .dot5_insts,1981 .dot5_insts,
1836 .dot7_insts,1982 .dot7_insts,
1837 .dot8_insts,1983 .dot8_insts,
...@@ -1861,6 +2007,7 @@ pub const cpu = struct {...@@ -1861,6 +2007,7 @@ pub const cpu = struct {
1861 .atomic_fadd_rtn_insts,2007 .atomic_fadd_rtn_insts,
1862 .dl_insts,2008 .dl_insts,
1863 .dot10_insts,2009 .dot10_insts,
2010 .dot12_insts,
1864 .dot5_insts,2011 .dot5_insts,
1865 .dot7_insts,2012 .dot7_insts,
1866 .dot8_insts,2013 .dot8_insts,
...@@ -1891,6 +2038,7 @@ pub const cpu = struct {...@@ -1891,6 +2038,7 @@ pub const cpu = struct {
1891 .atomic_fadd_rtn_insts,2038 .atomic_fadd_rtn_insts,
1892 .dl_insts,2039 .dl_insts,
1893 .dot10_insts,2040 .dot10_insts,
2041 .dot12_insts,
1894 .dot5_insts,2042 .dot5_insts,
1895 .dot7_insts,2043 .dot7_insts,
1896 .dot8_insts,2044 .dot8_insts,
...@@ -1920,6 +2068,7 @@ pub const cpu = struct {...@@ -1920,6 +2068,7 @@ pub const cpu = struct {
1920 .atomic_fadd_rtn_insts,2068 .atomic_fadd_rtn_insts,
1921 .dl_insts,2069 .dl_insts,
1922 .dot10_insts,2070 .dot10_insts,
2071 .dot12_insts,
1923 .dot5_insts,2072 .dot5_insts,
1924 .dot7_insts,2073 .dot7_insts,
1925 .dot8_insts,2074 .dot8_insts,
...@@ -1937,7 +2086,6 @@ pub const cpu = struct {...@@ -1937,7 +2086,6 @@ pub const cpu = struct {
1937 .salu_float,2086 .salu_float,
1938 .shader_cycles_register,2087 .shader_cycles_register,
1939 .vcmpx_permlane_hazard,2088 .vcmpx_permlane_hazard,
1940 .vgpr_singleuse_hint,
1941 }),2089 }),
1942 };2090 };
1943 pub const gfx1151: CpuModel = .{2091 pub const gfx1151: CpuModel = .{
...@@ -1950,6 +2098,7 @@ pub const cpu = struct {...@@ -1950,6 +2098,7 @@ pub const cpu = struct {
1950 .atomic_fadd_rtn_insts,2098 .atomic_fadd_rtn_insts,
1951 .dl_insts,2099 .dl_insts,
1952 .dot10_insts,2100 .dot10_insts,
2101 .dot12_insts,
1953 .dot5_insts,2102 .dot5_insts,
1954 .dot7_insts,2103 .dot7_insts,
1955 .dot8_insts,2104 .dot8_insts,
...@@ -1967,7 +2116,6 @@ pub const cpu = struct {...@@ -1967,7 +2116,6 @@ pub const cpu = struct {
1967 .salu_float,2116 .salu_float,
1968 .shader_cycles_register,2117 .shader_cycles_register,
1969 .vcmpx_permlane_hazard,2118 .vcmpx_permlane_hazard,
1970 .vgpr_singleuse_hint,
1971 }),2119 }),
1972 };2120 };
1973 pub const gfx1152: CpuModel = .{2121 pub const gfx1152: CpuModel = .{
...@@ -1979,6 +2127,36 @@ pub const cpu = struct {...@@ -1979,6 +2127,36 @@ pub const cpu = struct {
1979 .atomic_fadd_rtn_insts,2127 .atomic_fadd_rtn_insts,
1980 .dl_insts,2128 .dl_insts,
1981 .dot10_insts,2129 .dot10_insts,
2130 .dot12_insts,
2131 .dot5_insts,
2132 .dot7_insts,
2133 .dot8_insts,
2134 .dot9_insts,
2135 .dpp_src1_sgpr,
2136 .flat_atomic_fadd_f32_inst,
2137 .gfx11,
2138 .image_insts,
2139 .ldsbankcount32,
2140 .memory_atomic_fadd_f32_denormal_support,
2141 .nsa_encoding,
2142 .packed_tid,
2143 .partial_nsa_encoding,
2144 .required_export_priority,
2145 .salu_float,
2146 .shader_cycles_register,
2147 .vcmpx_permlane_hazard,
2148 }),
2149 };
2150 pub const gfx1153: CpuModel = .{
2151 .name = "gfx1153",
2152 .llvm_name = "gfx1153",
2153 .features = featureSet(&[_]Feature{
2154 .architected_flat_scratch,
2155 .atomic_fadd_no_rtn_insts,
2156 .atomic_fadd_rtn_insts,
2157 .dl_insts,
2158 .dot10_insts,
2159 .dot12_insts,
1982 .dot5_insts,2160 .dot5_insts,
1983 .dot7_insts,2161 .dot7_insts,
1984 .dot8_insts,2162 .dot8_insts,
...@@ -1996,7 +2174,6 @@ pub const cpu = struct {...@@ -1996,7 +2174,6 @@ pub const cpu = struct {
1996 .salu_float,2174 .salu_float,
1997 .shader_cycles_register,2175 .shader_cycles_register,
1998 .vcmpx_permlane_hazard,2176 .vcmpx_permlane_hazard,
1999 .vgpr_singleuse_hint,
2000 }),2177 }),
2001 };2178 };
2002 pub const gfx11_generic: CpuModel = .{2179 pub const gfx11_generic: CpuModel = .{
...@@ -2008,6 +2185,7 @@ pub const cpu = struct {...@@ -2008,6 +2185,7 @@ pub const cpu = struct {
2008 .atomic_fadd_rtn_insts,2185 .atomic_fadd_rtn_insts,
2009 .dl_insts,2186 .dl_insts,
2010 .dot10_insts,2187 .dot10_insts,
2188 .dot12_insts,
2011 .dot5_insts,2189 .dot5_insts,
2012 .dot7_insts,2190 .dot7_insts,
2013 .dot8_insts,2191 .dot8_insts,
...@@ -2048,6 +2226,7 @@ pub const cpu = struct {...@@ -2048,6 +2226,7 @@ pub const cpu = struct {
2048 .dl_insts,2226 .dl_insts,
2049 .dot10_insts,2227 .dot10_insts,
2050 .dot11_insts,2228 .dot11_insts,
2229 .dot12_insts,
2051 .dot7_insts,2230 .dot7_insts,
2052 .dot8_insts,2231 .dot8_insts,
2053 .dot9_insts,2232 .dot9_insts,
...@@ -2068,7 +2247,6 @@ pub const cpu = struct {...@@ -2068,7 +2247,6 @@ pub const cpu = struct {
2068 .scalar_dwordx3_loads,2247 .scalar_dwordx3_loads,
2069 .shader_cycles_hi_lo_registers,2248 .shader_cycles_hi_lo_registers,
2070 .vcmpx_permlane_hazard,2249 .vcmpx_permlane_hazard,
2071 .vgpr_singleuse_hint,
2072 }),2250 }),
2073 };2251 };
2074 pub const gfx1201: CpuModel = .{2252 pub const gfx1201: CpuModel = .{
...@@ -2088,6 +2266,7 @@ pub const cpu = struct {...@@ -2088,6 +2266,7 @@ pub const cpu = struct {
2088 .dl_insts,2266 .dl_insts,
2089 .dot10_insts,2267 .dot10_insts,
2090 .dot11_insts,2268 .dot11_insts,
2269 .dot12_insts,
2091 .dot7_insts,2270 .dot7_insts,
2092 .dot8_insts,2271 .dot8_insts,
2093 .dot9_insts,2272 .dot9_insts,
...@@ -2108,7 +2287,6 @@ pub const cpu = struct {...@@ -2108,7 +2287,6 @@ pub const cpu = struct {
2108 .scalar_dwordx3_loads,2287 .scalar_dwordx3_loads,
2109 .shader_cycles_hi_lo_registers,2288 .shader_cycles_hi_lo_registers,
2110 .vcmpx_permlane_hazard,2289 .vcmpx_permlane_hazard,
2111 .vgpr_singleuse_hint,
2112 }),2290 }),
2113 };2291 };
2114 pub const gfx12_generic: CpuModel = .{2292 pub const gfx12_generic: CpuModel = .{
...@@ -2128,6 +2306,7 @@ pub const cpu = struct {...@@ -2128,6 +2306,7 @@ pub const cpu = struct {
2128 .dl_insts,2306 .dl_insts,
2129 .dot10_insts,2307 .dot10_insts,
2130 .dot11_insts,2308 .dot11_insts,
2309 .dot12_insts,
2131 .dot7_insts,2310 .dot7_insts,
2132 .dot8_insts,2311 .dot8_insts,
2133 .dot9_insts,2312 .dot9_insts,
...@@ -2149,7 +2328,6 @@ pub const cpu = struct {...@@ -2149,7 +2328,6 @@ pub const cpu = struct {
2149 .scalar_dwordx3_loads,2328 .scalar_dwordx3_loads,
2150 .shader_cycles_hi_lo_registers,2329 .shader_cycles_hi_lo_registers,
2151 .vcmpx_permlane_hazard,2330 .vcmpx_permlane_hazard,
2152 .vgpr_singleuse_hint,
2153 }),2331 }),
2154 };2332 };
2155 pub const gfx600: CpuModel = .{2333 pub const gfx600: CpuModel = .{
...@@ -2282,6 +2460,7 @@ pub const cpu = struct {...@@ -2282,6 +2460,7 @@ pub const cpu = struct {
2282 .name = "gfx900",2460 .name = "gfx900",
2283 .llvm_name = "gfx900",2461 .llvm_name = "gfx900",
2284 .features = featureSet(&[_]Feature{2462 .features = featureSet(&[_]Feature{
2463 .addressablelocalmemorysize65536,
2285 .ds_src2_insts,2464 .ds_src2_insts,
2286 .extended_image_insts,2465 .extended_image_insts,
2287 .gds,2466 .gds,
...@@ -2297,6 +2476,7 @@ pub const cpu = struct {...@@ -2297,6 +2476,7 @@ pub const cpu = struct {
2297 .name = "gfx902",2476 .name = "gfx902",
2298 .llvm_name = "gfx902",2477 .llvm_name = "gfx902",
2299 .features = featureSet(&[_]Feature{2478 .features = featureSet(&[_]Feature{
2479 .addressablelocalmemorysize65536,
2300 .ds_src2_insts,2480 .ds_src2_insts,
2301 .extended_image_insts,2481 .extended_image_insts,
2302 .gds,2482 .gds,
...@@ -2312,6 +2492,7 @@ pub const cpu = struct {...@@ -2312,6 +2492,7 @@ pub const cpu = struct {
2312 .name = "gfx904",2492 .name = "gfx904",
2313 .llvm_name = "gfx904",2493 .llvm_name = "gfx904",
2314 .features = featureSet(&[_]Feature{2494 .features = featureSet(&[_]Feature{
2495 .addressablelocalmemorysize65536,
2315 .ds_src2_insts,2496 .ds_src2_insts,
2316 .extended_image_insts,2497 .extended_image_insts,
2317 .fma_mix_insts,2498 .fma_mix_insts,
...@@ -2327,6 +2508,7 @@ pub const cpu = struct {...@@ -2327,6 +2508,7 @@ pub const cpu = struct {
2327 .name = "gfx906",2508 .name = "gfx906",
2328 .llvm_name = "gfx906",2509 .llvm_name = "gfx906",
2329 .features = featureSet(&[_]Feature{2510 .features = featureSet(&[_]Feature{
2511 .addressablelocalmemorysize65536,
2330 .dl_insts,2512 .dl_insts,
2331 .dot10_insts,2513 .dot10_insts,
2332 .dot1_insts,2514 .dot1_insts,
...@@ -2349,6 +2531,7 @@ pub const cpu = struct {...@@ -2349,6 +2531,7 @@ pub const cpu = struct {
2349 .name = "gfx908",2531 .name = "gfx908",
2350 .llvm_name = "gfx908",2532 .llvm_name = "gfx908",
2351 .features = featureSet(&[_]Feature{2533 .features = featureSet(&[_]Feature{
2534 .addressablelocalmemorysize65536,
2352 .atomic_buffer_global_pk_add_f16_no_rtn_insts,2535 .atomic_buffer_global_pk_add_f16_no_rtn_insts,
2353 .atomic_fadd_no_rtn_insts,2536 .atomic_fadd_no_rtn_insts,
2354 .dl_insts,2537 .dl_insts,
...@@ -2380,6 +2563,7 @@ pub const cpu = struct {...@@ -2380,6 +2563,7 @@ pub const cpu = struct {
2380 .name = "gfx909",2563 .name = "gfx909",
2381 .llvm_name = "gfx909",2564 .llvm_name = "gfx909",
2382 .features = featureSet(&[_]Feature{2565 .features = featureSet(&[_]Feature{
2566 .addressablelocalmemorysize65536,
2383 .ds_src2_insts,2567 .ds_src2_insts,
2384 .extended_image_insts,2568 .extended_image_insts,
2385 .gds,2569 .gds,
...@@ -2395,6 +2579,7 @@ pub const cpu = struct {...@@ -2395,6 +2579,7 @@ pub const cpu = struct {
2395 .name = "gfx90a",2579 .name = "gfx90a",
2396 .llvm_name = "gfx90a",2580 .llvm_name = "gfx90a",
2397 .features = featureSet(&[_]Feature{2581 .features = featureSet(&[_]Feature{
2582 .addressablelocalmemorysize65536,
2398 .atomic_buffer_global_pk_add_f16_insts,2583 .atomic_buffer_global_pk_add_f16_insts,
2399 .atomic_fadd_no_rtn_insts,2584 .atomic_fadd_no_rtn_insts,
2400 .atomic_fadd_rtn_insts,2585 .atomic_fadd_rtn_insts,
...@@ -2432,6 +2617,7 @@ pub const cpu = struct {...@@ -2432,6 +2617,7 @@ pub const cpu = struct {
2432 .name = "gfx90c",2617 .name = "gfx90c",
2433 .llvm_name = "gfx90c",2618 .llvm_name = "gfx90c",
2434 .features = featureSet(&[_]Feature{2619 .features = featureSet(&[_]Feature{
2620 .addressablelocalmemorysize65536,
2435 .ds_src2_insts,2621 .ds_src2_insts,
2436 .extended_image_insts,2622 .extended_image_insts,
2437 .gds,2623 .gds,
...@@ -2447,6 +2633,7 @@ pub const cpu = struct {...@@ -2447,6 +2633,7 @@ pub const cpu = struct {
2447 .name = "gfx940",2633 .name = "gfx940",
2448 .llvm_name = "gfx940",2634 .llvm_name = "gfx940",
2449 .features = featureSet(&[_]Feature{2635 .features = featureSet(&[_]Feature{
2636 .addressablelocalmemorysize65536,
2450 .agent_scope_fine_grained_remote_memory_atomics,2637 .agent_scope_fine_grained_remote_memory_atomics,
2451 .architected_flat_scratch,2638 .architected_flat_scratch,
2452 .atomic_buffer_global_pk_add_f16_insts,2639 .atomic_buffer_global_pk_add_f16_insts,
...@@ -2458,6 +2645,7 @@ pub const cpu = struct {...@@ -2458,6 +2645,7 @@ pub const cpu = struct {
2458 .atomic_fmin_fmax_global_f64,2645 .atomic_fmin_fmax_global_f64,
2459 .atomic_global_pk_add_bf16_inst,2646 .atomic_global_pk_add_bf16_inst,
2460 .back_off_barrier,2647 .back_off_barrier,
2648 .cvt_fp8_vop1_bug,
2461 .dl_insts,2649 .dl_insts,
2462 .dot10_insts,2650 .dot10_insts,
2463 .dot1_insts,2651 .dot1_insts,
...@@ -2473,7 +2661,6 @@ pub const cpu = struct {...@@ -2473,7 +2661,6 @@ pub const cpu = struct {
2473 .fma_mix_insts,2661 .fma_mix_insts,
2474 .fmacf64_inst,2662 .fmacf64_inst,
2475 .force_store_sc0_sc1,2663 .force_store_sc0_sc1,
2476 .fp8_conversion_insts,
2477 .fp8_insts,2664 .fp8_insts,
2478 .full_rate_64_ops,2665 .full_rate_64_ops,
2479 .gfx9,2666 .gfx9,
...@@ -2487,12 +2674,14 @@ pub const cpu = struct {...@@ -2487,12 +2674,14 @@ pub const cpu = struct {
2487 .packed_tid,2674 .packed_tid,
2488 .pk_fmac_f16_inst,2675 .pk_fmac_f16_inst,
2489 .sramecc_support,2676 .sramecc_support,
2677 .xf32_insts,
2490 }),2678 }),
2491 };2679 };
2492 pub const gfx941: CpuModel = .{2680 pub const gfx941: CpuModel = .{
2493 .name = "gfx941",2681 .name = "gfx941",
2494 .llvm_name = "gfx941",2682 .llvm_name = "gfx941",
2495 .features = featureSet(&[_]Feature{2683 .features = featureSet(&[_]Feature{
2684 .addressablelocalmemorysize65536,
2496 .agent_scope_fine_grained_remote_memory_atomics,2685 .agent_scope_fine_grained_remote_memory_atomics,
2497 .architected_flat_scratch,2686 .architected_flat_scratch,
2498 .atomic_buffer_global_pk_add_f16_insts,2687 .atomic_buffer_global_pk_add_f16_insts,
...@@ -2504,6 +2693,7 @@ pub const cpu = struct {...@@ -2504,6 +2693,7 @@ pub const cpu = struct {
2504 .atomic_fmin_fmax_global_f64,2693 .atomic_fmin_fmax_global_f64,
2505 .atomic_global_pk_add_bf16_inst,2694 .atomic_global_pk_add_bf16_inst,
2506 .back_off_barrier,2695 .back_off_barrier,
2696 .cvt_fp8_vop1_bug,
2507 .dl_insts,2697 .dl_insts,
2508 .dot10_insts,2698 .dot10_insts,
2509 .dot1_insts,2699 .dot1_insts,
...@@ -2519,7 +2709,6 @@ pub const cpu = struct {...@@ -2519,7 +2709,6 @@ pub const cpu = struct {
2519 .fma_mix_insts,2709 .fma_mix_insts,
2520 .fmacf64_inst,2710 .fmacf64_inst,
2521 .force_store_sc0_sc1,2711 .force_store_sc0_sc1,
2522 .fp8_conversion_insts,
2523 .fp8_insts,2712 .fp8_insts,
2524 .full_rate_64_ops,2713 .full_rate_64_ops,
2525 .gfx9,2714 .gfx9,
...@@ -2533,12 +2722,14 @@ pub const cpu = struct {...@@ -2533,12 +2722,14 @@ pub const cpu = struct {
2533 .packed_tid,2722 .packed_tid,
2534 .pk_fmac_f16_inst,2723 .pk_fmac_f16_inst,
2535 .sramecc_support,2724 .sramecc_support,
2725 .xf32_insts,
2536 }),2726 }),
2537 };2727 };
2538 pub const gfx942: CpuModel = .{2728 pub const gfx942: CpuModel = .{
2539 .name = "gfx942",2729 .name = "gfx942",
2540 .llvm_name = "gfx942",2730 .llvm_name = "gfx942",
2541 .features = featureSet(&[_]Feature{2731 .features = featureSet(&[_]Feature{
2732 .addressablelocalmemorysize65536,
2542 .agent_scope_fine_grained_remote_memory_atomics,2733 .agent_scope_fine_grained_remote_memory_atomics,
2543 .architected_flat_scratch,2734 .architected_flat_scratch,
2544 .atomic_buffer_global_pk_add_f16_insts,2735 .atomic_buffer_global_pk_add_f16_insts,
...@@ -2550,6 +2741,7 @@ pub const cpu = struct {...@@ -2550,6 +2741,7 @@ pub const cpu = struct {
2550 .atomic_fmin_fmax_global_f64,2741 .atomic_fmin_fmax_global_f64,
2551 .atomic_global_pk_add_bf16_inst,2742 .atomic_global_pk_add_bf16_inst,
2552 .back_off_barrier,2743 .back_off_barrier,
2744 .cvt_fp8_vop1_bug,
2553 .dl_insts,2745 .dl_insts,
2554 .dot10_insts,2746 .dot10_insts,
2555 .dot1_insts,2747 .dot1_insts,
...@@ -2564,12 +2756,64 @@ pub const cpu = struct {...@@ -2564,12 +2756,64 @@ pub const cpu = struct {
2564 .flat_buffer_global_fadd_f64_inst,2756 .flat_buffer_global_fadd_f64_inst,
2565 .fma_mix_insts,2757 .fma_mix_insts,
2566 .fmacf64_inst,2758 .fmacf64_inst,
2759 .fp8_insts,
2760 .full_rate_64_ops,
2761 .gfx9,
2762 .gfx90a_insts,
2763 .gfx940_insts,
2764 .kernarg_preload,
2765 .ldsbankcount32,
2766 .mai_insts,
2767 .memory_atomic_fadd_f32_denormal_support,
2768 .packed_fp32_ops,
2769 .packed_tid,
2770 .pk_fmac_f16_inst,
2771 .sramecc_support,
2772 .xf32_insts,
2773 }),
2774 };
2775 pub const gfx950: CpuModel = .{
2776 .name = "gfx950",
2777 .llvm_name = "gfx950",
2778 .features = featureSet(&[_]Feature{
2779 .addressablelocalmemorysize163840,
2780 .agent_scope_fine_grained_remote_memory_atomics,
2781 .architected_flat_scratch,
2782 .atomic_buffer_global_pk_add_f16_insts,
2783 .atomic_buffer_pk_add_bf16_inst,
2784 .atomic_ds_pk_add_16_insts,
2785 .atomic_fadd_no_rtn_insts,
2786 .atomic_fadd_rtn_insts,
2787 .atomic_flat_pk_add_16_insts,
2788 .atomic_fmin_fmax_flat_f64,
2789 .atomic_fmin_fmax_global_f64,
2790 .atomic_global_pk_add_bf16_inst,
2791 .back_off_barrier,
2792 .bf16_cvt_insts,
2793 .bitop3_insts,
2794 .dl_insts,
2795 .dot10_insts,
2796 .dot12_insts,
2797 .dot13_insts,
2798 .dot1_insts,
2799 .dot2_insts,
2800 .dot3_insts,
2801 .dot4_insts,
2802 .dot5_insts,
2803 .dot6_insts,
2804 .dot7_insts,
2805 .dpp_64bit,
2806 .flat_atomic_fadd_f32_inst,
2807 .flat_buffer_global_fadd_f64_inst,
2808 .fma_mix_insts,
2809 .fmacf64_inst,
2567 .fp8_conversion_insts,2810 .fp8_conversion_insts,
2568 .fp8_insts,2811 .fp8_insts,
2569 .full_rate_64_ops,2812 .full_rate_64_ops,
2570 .gfx9,2813 .gfx9,
2571 .gfx90a_insts,2814 .gfx90a_insts,
2572 .gfx940_insts,2815 .gfx940_insts,
2816 .gfx950_insts,
2573 .kernarg_preload,2817 .kernarg_preload,
2574 .ldsbankcount32,2818 .ldsbankcount32,
2575 .mai_insts,2819 .mai_insts,
...@@ -2577,6 +2821,52 @@ pub const cpu = struct {...@@ -2577,6 +2821,52 @@ pub const cpu = struct {
2577 .packed_fp32_ops,2821 .packed_fp32_ops,
2578 .packed_tid,2822 .packed_tid,
2579 .pk_fmac_f16_inst,2823 .pk_fmac_f16_inst,
2824 .prng_inst,
2825 .sramecc_support,
2826 }),
2827 };
2828 pub const gfx9_4_generic: CpuModel = .{
2829 .name = "gfx9_4_generic",
2830 .llvm_name = "gfx9-4-generic",
2831 .features = featureSet(&[_]Feature{
2832 .addressablelocalmemorysize65536,
2833 .agent_scope_fine_grained_remote_memory_atomics,
2834 .architected_flat_scratch,
2835 .atomic_buffer_global_pk_add_f16_insts,
2836 .atomic_ds_pk_add_16_insts,
2837 .atomic_fadd_no_rtn_insts,
2838 .atomic_fadd_rtn_insts,
2839 .atomic_flat_pk_add_16_insts,
2840 .atomic_fmin_fmax_flat_f64,
2841 .atomic_fmin_fmax_global_f64,
2842 .atomic_global_pk_add_bf16_inst,
2843 .back_off_barrier,
2844 .dl_insts,
2845 .dot10_insts,
2846 .dot1_insts,
2847 .dot2_insts,
2848 .dot3_insts,
2849 .dot4_insts,
2850 .dot5_insts,
2851 .dot6_insts,
2852 .dot7_insts,
2853 .dpp_64bit,
2854 .flat_atomic_fadd_f32_inst,
2855 .flat_buffer_global_fadd_f64_inst,
2856 .fma_mix_insts,
2857 .fmacf64_inst,
2858 .full_rate_64_ops,
2859 .gfx9,
2860 .gfx90a_insts,
2861 .gfx940_insts,
2862 .kernarg_preload,
2863 .ldsbankcount32,
2864 .mai_insts,
2865 .memory_atomic_fadd_f32_denormal_support,
2866 .packed_fp32_ops,
2867 .packed_tid,
2868 .pk_fmac_f16_inst,
2869 .requires_cov6,
2580 .sramecc_support,2870 .sramecc_support,
2581 }),2871 }),
2582 };2872 };
...@@ -2584,6 +2874,7 @@ pub const cpu = struct {...@@ -2584,6 +2874,7 @@ pub const cpu = struct {
2584 .name = "gfx9_generic",2874 .name = "gfx9_generic",
2585 .llvm_name = "gfx9-generic",2875 .llvm_name = "gfx9-generic",
2586 .features = featureSet(&[_]Feature{2876 .features = featureSet(&[_]Feature{
2877 .addressablelocalmemorysize65536,
2587 .ds_src2_insts,2878 .ds_src2_insts,
2588 .extended_image_insts,2879 .extended_image_insts,
2589 .gds,2880 .gds,
lib/std/Target/arm.zig+86-1
...@@ -13,9 +13,11 @@ pub const Feature = enum {...@@ -13,9 +13,11 @@ pub const Feature = enum {
13 aes,13 aes,
14 atomics_32,14 atomics_32,
15 avoid_movs_shop,15 avoid_movs_shop,
16 avoid_muls,
16 avoid_partial_cpsr,17 avoid_partial_cpsr,
17 bf16,18 bf16,
18 big_endian_instructions,19 big_endian_instructions,
20 branch_align_64,
19 cde,21 cde,
20 cdecp0,22 cdecp0,
21 cdecp1,23 cdecp1,
...@@ -27,6 +29,7 @@ pub const Feature = enum {...@@ -27,6 +29,7 @@ pub const Feature = enum {
27 cdecp7,29 cdecp7,
28 cheap_predicable_cpsr,30 cheap_predicable_cpsr,
29 clrbhb,31 clrbhb,
32 cortex_a510,
30 crc,33 crc,
31 crypto,34 crypto,
32 d32,35 d32,
...@@ -84,6 +87,7 @@ pub const Feature = enum {...@@ -84,6 +87,7 @@ pub const Feature = enum {
84 has_v9_3a,87 has_v9_3a,
85 has_v9_4a,88 has_v9_4a,
86 has_v9_5a,89 has_v9_5a,
90 has_v9_6a,
87 has_v9a,91 has_v9a,
88 hwdiv,92 hwdiv,
89 hwdiv_arm,93 hwdiv_arm,
...@@ -93,6 +97,8 @@ pub const Feature = enum {...@@ -93,6 +97,8 @@ pub const Feature = enum {
93 lob,97 lob,
94 long_calls,98 long_calls,
95 loop_align,99 loop_align,
100 m55,
101 m85,
96 mclass,102 mclass,
97 mp,103 mp,
98 muxed_units,104 muxed_units,
...@@ -180,6 +186,7 @@ pub const Feature = enum {...@@ -180,6 +186,7 @@ pub const Feature = enum {
180 v9_3a,186 v9_3a,
181 v9_4a,187 v9_4a,
182 v9_5a,188 v9_5a,
189 v9_6a,
183 v9a,190 v9a,
184 vfp2,191 vfp2,
185 vfp2sp,192 vfp2sp,
...@@ -252,6 +259,11 @@ pub const all_features = blk: {...@@ -252,6 +259,11 @@ pub const all_features = blk: {
252 .description = "Avoid movs instructions with shifter operand",259 .description = "Avoid movs instructions with shifter operand",
253 .dependencies = featureSet(&[_]Feature{}),260 .dependencies = featureSet(&[_]Feature{}),
254 };261 };
262 result[@intFromEnum(Feature.avoid_muls)] = .{
263 .llvm_name = "avoid-muls",
264 .description = "Avoid MULS instructions for M class cores",
265 .dependencies = featureSet(&[_]Feature{}),
266 };
255 result[@intFromEnum(Feature.avoid_partial_cpsr)] = .{267 result[@intFromEnum(Feature.avoid_partial_cpsr)] = .{
256 .llvm_name = "avoid-partial-cpsr",268 .llvm_name = "avoid-partial-cpsr",
257 .description = "Avoid CPSR partial update for OOO execution",269 .description = "Avoid CPSR partial update for OOO execution",
...@@ -269,6 +281,11 @@ pub const all_features = blk: {...@@ -269,6 +281,11 @@ pub const all_features = blk: {
269 .description = "Expect instructions to be stored big-endian.",281 .description = "Expect instructions to be stored big-endian.",
270 .dependencies = featureSet(&[_]Feature{}),282 .dependencies = featureSet(&[_]Feature{}),
271 };283 };
284 result[@intFromEnum(Feature.branch_align_64)] = .{
285 .llvm_name = "branch-align-64",
286 .description = "Prefer 64-bit alignment for branch targets",
287 .dependencies = featureSet(&[_]Feature{}),
288 };
272 result[@intFromEnum(Feature.cde)] = .{289 result[@intFromEnum(Feature.cde)] = .{
273 .llvm_name = "cde",290 .llvm_name = "cde",
274 .description = "Support CDE instructions",291 .description = "Support CDE instructions",
...@@ -342,6 +359,11 @@ pub const all_features = blk: {...@@ -342,6 +359,11 @@ pub const all_features = blk: {
342 .description = "Enable Clear BHB instruction",359 .description = "Enable Clear BHB instruction",
343 .dependencies = featureSet(&[_]Feature{}),360 .dependencies = featureSet(&[_]Feature{}),
344 };361 };
362 result[@intFromEnum(Feature.cortex_a510)] = .{
363 .llvm_name = "cortex-a510",
364 .description = "Cortex-A510 ARM processors",
365 .dependencies = featureSet(&[_]Feature{}),
366 };
345 result[@intFromEnum(Feature.crc)] = .{367 result[@intFromEnum(Feature.crc)] = .{
346 .llvm_name = "crc",368 .llvm_name = "crc",
347 .description = "Enable support for CRC instructions",369 .description = "Enable support for CRC instructions",
...@@ -719,6 +741,13 @@ pub const all_features = blk: {...@@ -719,6 +741,13 @@ pub const all_features = blk: {
719 .has_v9_4a,741 .has_v9_4a,
720 }),742 }),
721 };743 };
744 result[@intFromEnum(Feature.has_v9_6a)] = .{
745 .llvm_name = "v9.6a",
746 .description = "Support ARM v9.6a instructions",
747 .dependencies = featureSet(&[_]Feature{
748 .has_v9_5a,
749 }),
750 };
722 result[@intFromEnum(Feature.has_v9a)] = .{751 result[@intFromEnum(Feature.has_v9a)] = .{
723 .llvm_name = "v9a",752 .llvm_name = "v9a",
724 .description = "Support ARM v9a instructions",753 .description = "Support ARM v9a instructions",
...@@ -769,7 +798,17 @@ pub const all_features = blk: {...@@ -769,7 +798,17 @@ pub const all_features = blk: {
769 };798 };
770 result[@intFromEnum(Feature.loop_align)] = .{799 result[@intFromEnum(Feature.loop_align)] = .{
771 .llvm_name = "loop-align",800 .llvm_name = "loop-align",
772 .description = "Prefer 32-bit alignment for loops",801 .description = "Prefer 32-bit alignment for branch targets",
802 .dependencies = featureSet(&[_]Feature{}),
803 };
804 result[@intFromEnum(Feature.m55)] = .{
805 .llvm_name = "m55",
806 .description = "Cortex-M55 ARM processors",
807 .dependencies = featureSet(&[_]Feature{}),
808 };
809 result[@intFromEnum(Feature.m85)] = .{
810 .llvm_name = "m85",
811 .description = "Cortex-M85 ARM processors",
773 .dependencies = featureSet(&[_]Feature{}),812 .dependencies = featureSet(&[_]Feature{}),
774 };813 };
775 result[@intFromEnum(Feature.mclass)] = .{814 result[@intFromEnum(Feature.mclass)] = .{
...@@ -1524,6 +1563,22 @@ pub const all_features = blk: {...@@ -1524,6 +1563,22 @@ pub const all_features = blk: {
1524 .virtualization,1563 .virtualization,
1525 }),1564 }),
1526 };1565 };
1566 result[@intFromEnum(Feature.v9_6a)] = .{
1567 .llvm_name = "armv9.6-a",
1568 .description = "ARMv96a architecture",
1569 .dependencies = featureSet(&[_]Feature{
1570 .aclass,
1571 .crc,
1572 .db,
1573 .dsp,
1574 .fp_armv8,
1575 .has_v9_6a,
1576 .mp,
1577 .ras,
1578 .trustzone,
1579 .virtualization,
1580 }),
1581 };
1527 result[@intFromEnum(Feature.v9a)] = .{1582 result[@intFromEnum(Feature.v9a)] = .{
1528 .llvm_name = "armv9-a",1583 .llvm_name = "armv9-a",
1529 .description = "ARMv9a architecture",1584 .description = "ARMv9a architecture",
...@@ -1950,6 +2005,16 @@ pub const cpu = struct {...@@ -1950,6 +2005,16 @@ pub const cpu = struct {
1950 .vmlx_forwarding,2005 .vmlx_forwarding,
1951 }),2006 }),
1952 };2007 };
2008 pub const cortex_a510: CpuModel = .{
2009 .name = "cortex_a510",
2010 .llvm_name = "cortex-a510",
2011 .features = featureSet(&[_]Feature{
2012 .bf16,
2013 .fp16fml,
2014 .i8mm,
2015 .v9a,
2016 }),
2017 };
1953 pub const cortex_a53: CpuModel = .{2018 pub const cortex_a53: CpuModel = .{
1954 .name = "cortex_a53",2019 .name = "cortex_a53",
1955 .llvm_name = "cortex-a53",2020 .llvm_name = "cortex-a53",
...@@ -2162,6 +2227,7 @@ pub const cpu = struct {...@@ -2162,6 +2227,7 @@ pub const cpu = struct {
2162 .name = "cortex_m33",2227 .name = "cortex_m33",
2163 .llvm_name = "cortex-m33",2228 .llvm_name = "cortex-m33",
2164 .features = featureSet(&[_]Feature{2229 .features = featureSet(&[_]Feature{
2230 .avoid_muls,
2165 .fix_cmse_cve_2021_35465,2231 .fix_cmse_cve_2021_35465,
2166 .loop_align,2232 .loop_align,
2167 .no_branch_predictor,2233 .no_branch_predictor,
...@@ -2218,6 +2284,7 @@ pub const cpu = struct {...@@ -2218,6 +2284,7 @@ pub const cpu = struct {
2218 .dsp,2284 .dsp,
2219 .fix_cmse_cve_2021_35465,2285 .fix_cmse_cve_2021_35465,
2220 .loop_align,2286 .loop_align,
2287 .m55,
2221 .no_branch_predictor,2288 .no_branch_predictor,
2222 .slowfpvmlx,2289 .slowfpvmlx,
2223 .use_misched,2290 .use_misched,
...@@ -2228,6 +2295,7 @@ pub const cpu = struct {...@@ -2228,6 +2295,7 @@ pub const cpu = struct {
2228 .name = "cortex_m7",2295 .name = "cortex_m7",
2229 .llvm_name = "cortex-m7",2296 .llvm_name = "cortex-m7",
2230 .features = featureSet(&[_]Feature{2297 .features = featureSet(&[_]Feature{
2298 .branch_align_64,
2231 .use_mipipeliner,2299 .use_mipipeliner,
2232 .use_misched,2300 .use_misched,
2233 .v7em,2301 .v7em,
...@@ -2237,7 +2305,9 @@ pub const cpu = struct {...@@ -2237,7 +2305,9 @@ pub const cpu = struct {
2237 .name = "cortex_m85",2305 .name = "cortex_m85",
2238 .llvm_name = "cortex-m85",2306 .llvm_name = "cortex-m85",
2239 .features = featureSet(&[_]Feature{2307 .features = featureSet(&[_]Feature{
2308 .branch_align_64,
2240 .dsp,2309 .dsp,
2310 .m85,
2241 .use_misched,2311 .use_misched,
2242 .v8_1m_main,2312 .v8_1m_main,
2243 }),2313 }),
...@@ -2572,6 +2642,21 @@ pub const cpu = struct {...@@ -2572,6 +2642,21 @@ pub const cpu = struct {
2572 .v7m,2642 .v7m,
2573 }),2643 }),
2574 };2644 };
2645 pub const star_mc1: CpuModel = .{
2646 .name = "star_mc1",
2647 .llvm_name = "star-mc1",
2648 .features = featureSet(&[_]Feature{
2649 .dsp,
2650 .fix_cmse_cve_2021_35465,
2651 .fp_armv8d16sp,
2652 .loop_align,
2653 .no_branch_predictor,
2654 .slowfpvfmx,
2655 .slowfpvmlx,
2656 .use_misched,
2657 .v8m_main,
2658 }),
2659 };
2575 pub const strongarm: CpuModel = .{2660 pub const strongarm: CpuModel = .{
2576 .name = "strongarm",2661 .name = "strongarm",
2577 .llvm_name = "strongarm",2662 .llvm_name = "strongarm",
lib/std/Target/avr.zig+25
...@@ -38,6 +38,7 @@ pub const Feature = enum {...@@ -38,6 +38,7 @@ pub const Feature = enum {
38 spmx,38 spmx,
39 sram,39 sram,
40 tinyencoding,40 tinyencoding,
41 wrappingrjmp,
41 xmega,42 xmega,
42 xmega3,43 xmega3,
43 xmegau,44 xmegau,
...@@ -289,6 +290,11 @@ pub const all_features = blk: {...@@ -289,6 +290,11 @@ pub const all_features = blk: {
289 .description = "The device has Tiny core specific instruction encodings",290 .description = "The device has Tiny core specific instruction encodings",
290 .dependencies = featureSet(&[_]Feature{}),291 .dependencies = featureSet(&[_]Feature{}),
291 };292 };
293 result[@intFromEnum(Feature.wrappingrjmp)] = .{
294 .llvm_name = "wrappingrjmp",
295 .description = "The device potentially requires emitting rjmp that wraps across the flash boundary",
296 .dependencies = featureSet(&[_]Feature{}),
297 };
292 result[@intFromEnum(Feature.xmega)] = .{298 result[@intFromEnum(Feature.xmega)] = .{
293 .llvm_name = "xmega",299 .llvm_name = "xmega",
294 .description = "The device is a part of the xmega family",300 .description = "The device is a part of the xmega family",
...@@ -381,6 +387,7 @@ pub const cpu = struct {...@@ -381,6 +387,7 @@ pub const cpu = struct {
381 .llvm_name = "at90c8534",387 .llvm_name = "at90c8534",
382 .features = featureSet(&[_]Feature{388 .features = featureSet(&[_]Feature{
383 .avr2,389 .avr2,
390 .wrappingrjmp,
384 }),391 }),
385 };392 };
386 pub const at90can128: CpuModel = .{393 pub const at90can128: CpuModel = .{
...@@ -536,6 +543,7 @@ pub const cpu = struct {...@@ -536,6 +543,7 @@ pub const cpu = struct {
536 .llvm_name = "at90s8515",543 .llvm_name = "at90s8515",
537 .features = featureSet(&[_]Feature{544 .features = featureSet(&[_]Feature{
538 .avr2,545 .avr2,
546 .wrappingrjmp,
539 }),547 }),
540 };548 };
541 pub const at90s8535: CpuModel = .{549 pub const at90s8535: CpuModel = .{
...@@ -543,6 +551,7 @@ pub const cpu = struct {...@@ -543,6 +551,7 @@ pub const cpu = struct {
543 .llvm_name = "at90s8535",551 .llvm_name = "at90s8535",
544 .features = featureSet(&[_]Feature{552 .features = featureSet(&[_]Feature{
545 .avr2,553 .avr2,
554 .wrappingrjmp,
546 }),555 }),
547 };556 };
548 pub const at90scr100: CpuModel = .{557 pub const at90scr100: CpuModel = .{
...@@ -609,6 +618,7 @@ pub const cpu = struct {...@@ -609,6 +618,7 @@ pub const cpu = struct {
609 .llvm_name = "ata5272",618 .llvm_name = "ata5272",
610 .features = featureSet(&[_]Feature{619 .features = featureSet(&[_]Feature{
611 .avr25,620 .avr25,
621 .wrappingrjmp,
612 }),622 }),
613 };623 };
614 pub const ata5505: CpuModel = .{624 pub const ata5505: CpuModel = .{
...@@ -672,6 +682,7 @@ pub const cpu = struct {...@@ -672,6 +682,7 @@ pub const cpu = struct {
672 .llvm_name = "ata6285",682 .llvm_name = "ata6285",
673 .features = featureSet(&[_]Feature{683 .features = featureSet(&[_]Feature{
674 .avr4,684 .avr4,
685 .wrappingrjmp,
675 }),686 }),
676 };687 };
677 pub const ata6286: CpuModel = .{688 pub const ata6286: CpuModel = .{
...@@ -714,6 +725,7 @@ pub const cpu = struct {...@@ -714,6 +725,7 @@ pub const cpu = struct {
714 .llvm_name = "ata6616c",725 .llvm_name = "ata6616c",
715 .features = featureSet(&[_]Feature{726 .features = featureSet(&[_]Feature{
716 .avr25,727 .avr25,
728 .wrappingrjmp,
717 }),729 }),
718 };730 };
719 pub const ata6617c: CpuModel = .{731 pub const ata6617c: CpuModel = .{
...@@ -1545,6 +1557,7 @@ pub const cpu = struct {...@@ -1545,6 +1557,7 @@ pub const cpu = struct {
1545 .movw,1557 .movw,
1546 .mul,1558 .mul,
1547 .spm,1559 .spm,
1560 .wrappingrjmp,
1548 }),1561 }),
1549 };1562 };
1550 pub const atmega808: CpuModel = .{1563 pub const atmega808: CpuModel = .{
...@@ -1570,6 +1583,7 @@ pub const cpu = struct {...@@ -1570,6 +1583,7 @@ pub const cpu = struct {
1570 .movw,1583 .movw,
1571 .mul,1584 .mul,
1572 .spm,1585 .spm,
1586 .wrappingrjmp,
1573 }),1587 }),
1574 };1588 };
1575 pub const atmega8535: CpuModel = .{1589 pub const atmega8535: CpuModel = .{
...@@ -1581,6 +1595,7 @@ pub const cpu = struct {...@@ -1581,6 +1595,7 @@ pub const cpu = struct {
1581 .movw,1595 .movw,
1582 .mul,1596 .mul,
1583 .spm,1597 .spm,
1598 .wrappingrjmp,
1584 }),1599 }),
1585 };1600 };
1586 pub const atmega88: CpuModel = .{1601 pub const atmega88: CpuModel = .{
...@@ -1627,6 +1642,7 @@ pub const cpu = struct {...@@ -1627,6 +1642,7 @@ pub const cpu = struct {
1627 .movw,1642 .movw,
1628 .mul,1643 .mul,
1629 .spm,1644 .spm,
1645 .wrappingrjmp,
1630 }),1646 }),
1631 };1647 };
1632 pub const atmega8hva: CpuModel = .{1648 pub const atmega8hva: CpuModel = .{
...@@ -2091,6 +2107,7 @@ pub const cpu = struct {...@@ -2091,6 +2107,7 @@ pub const cpu = struct {
2091 .llvm_name = "attiny828",2107 .llvm_name = "attiny828",
2092 .features = featureSet(&[_]Feature{2108 .features = featureSet(&[_]Feature{
2093 .avr25,2109 .avr25,
2110 .wrappingrjmp,
2094 }),2111 }),
2095 };2112 };
2096 pub const attiny84: CpuModel = .{2113 pub const attiny84: CpuModel = .{
...@@ -2098,6 +2115,7 @@ pub const cpu = struct {...@@ -2098,6 +2115,7 @@ pub const cpu = struct {
2098 .llvm_name = "attiny84",2115 .llvm_name = "attiny84",
2099 .features = featureSet(&[_]Feature{2116 .features = featureSet(&[_]Feature{
2100 .avr25,2117 .avr25,
2118 .wrappingrjmp,
2101 }),2119 }),
2102 };2120 };
2103 pub const attiny841: CpuModel = .{2121 pub const attiny841: CpuModel = .{
...@@ -2105,6 +2123,7 @@ pub const cpu = struct {...@@ -2105,6 +2123,7 @@ pub const cpu = struct {
2105 .llvm_name = "attiny841",2123 .llvm_name = "attiny841",
2106 .features = featureSet(&[_]Feature{2124 .features = featureSet(&[_]Feature{
2107 .avr25,2125 .avr25,
2126 .wrappingrjmp,
2108 }),2127 }),
2109 };2128 };
2110 pub const attiny84a: CpuModel = .{2129 pub const attiny84a: CpuModel = .{
...@@ -2112,6 +2131,7 @@ pub const cpu = struct {...@@ -2112,6 +2131,7 @@ pub const cpu = struct {
2112 .llvm_name = "attiny84a",2131 .llvm_name = "attiny84a",
2113 .features = featureSet(&[_]Feature{2132 .features = featureSet(&[_]Feature{
2114 .avr25,2133 .avr25,
2134 .wrappingrjmp,
2115 }),2135 }),
2116 };2136 };
2117 pub const attiny85: CpuModel = .{2137 pub const attiny85: CpuModel = .{
...@@ -2119,6 +2139,7 @@ pub const cpu = struct {...@@ -2119,6 +2139,7 @@ pub const cpu = struct {
2119 .llvm_name = "attiny85",2139 .llvm_name = "attiny85",
2120 .features = featureSet(&[_]Feature{2140 .features = featureSet(&[_]Feature{
2121 .avr25,2141 .avr25,
2142 .wrappingrjmp,
2122 }),2143 }),
2123 };2144 };
2124 pub const attiny861: CpuModel = .{2145 pub const attiny861: CpuModel = .{
...@@ -2126,6 +2147,7 @@ pub const cpu = struct {...@@ -2126,6 +2147,7 @@ pub const cpu = struct {
2126 .llvm_name = "attiny861",2147 .llvm_name = "attiny861",
2127 .features = featureSet(&[_]Feature{2148 .features = featureSet(&[_]Feature{
2128 .avr25,2149 .avr25,
2150 .wrappingrjmp,
2129 }),2151 }),
2130 };2152 };
2131 pub const attiny861a: CpuModel = .{2153 pub const attiny861a: CpuModel = .{
...@@ -2133,6 +2155,7 @@ pub const cpu = struct {...@@ -2133,6 +2155,7 @@ pub const cpu = struct {
2133 .llvm_name = "attiny861a",2155 .llvm_name = "attiny861a",
2134 .features = featureSet(&[_]Feature{2156 .features = featureSet(&[_]Feature{
2135 .avr25,2157 .avr25,
2158 .wrappingrjmp,
2136 }),2159 }),
2137 };2160 };
2138 pub const attiny87: CpuModel = .{2161 pub const attiny87: CpuModel = .{
...@@ -2140,6 +2163,7 @@ pub const cpu = struct {...@@ -2140,6 +2163,7 @@ pub const cpu = struct {
2140 .llvm_name = "attiny87",2163 .llvm_name = "attiny87",
2141 .features = featureSet(&[_]Feature{2164 .features = featureSet(&[_]Feature{
2142 .avr25,2165 .avr25,
2166 .wrappingrjmp,
2143 }),2167 }),
2144 };2168 };
2145 pub const attiny88: CpuModel = .{2169 pub const attiny88: CpuModel = .{
...@@ -2147,6 +2171,7 @@ pub const cpu = struct {...@@ -2147,6 +2171,7 @@ pub const cpu = struct {
2147 .llvm_name = "attiny88",2171 .llvm_name = "attiny88",
2148 .features = featureSet(&[_]Feature{2172 .features = featureSet(&[_]Feature{
2149 .avr25,2173 .avr25,
2174 .wrappingrjmp,
2150 }),2175 }),
2151 };2176 };
2152 pub const attiny9: CpuModel = .{2177 pub const attiny9: CpuModel = .{
lib/std/Target/csky.zig+7-7
...@@ -214,7 +214,7 @@ pub const all_features = blk: {...@@ -214,7 +214,7 @@ pub const all_features = blk: {
214 };214 };
215 result[@intFromEnum(Feature.dsp_silan)] = .{215 result[@intFromEnum(Feature.dsp_silan)] = .{
216 .llvm_name = "dsp_silan",216 .llvm_name = "dsp_silan",
217 .description = "Enable DSP Silan instrutions",217 .description = "Enable DSP Silan instructions",
218 .dependencies = featureSet(&[_]Feature{}),218 .dependencies = featureSet(&[_]Feature{}),
219 };219 };
220 result[@intFromEnum(Feature.dspe60)] = .{220 result[@intFromEnum(Feature.dspe60)] = .{
...@@ -224,7 +224,7 @@ pub const all_features = blk: {...@@ -224,7 +224,7 @@ pub const all_features = blk: {
224 };224 };
225 result[@intFromEnum(Feature.dspv2)] = .{225 result[@intFromEnum(Feature.dspv2)] = .{
226 .llvm_name = "dspv2",226 .llvm_name = "dspv2",
227 .description = "Enable DSP V2.0 instrutions",227 .description = "Enable DSP V2.0 instructions",
228 .dependencies = featureSet(&[_]Feature{}),228 .dependencies = featureSet(&[_]Feature{}),
229 };229 };
230 result[@intFromEnum(Feature.e1)] = .{230 result[@intFromEnum(Feature.e1)] = .{
...@@ -243,7 +243,7 @@ pub const all_features = blk: {...@@ -243,7 +243,7 @@ pub const all_features = blk: {
243 };243 };
244 result[@intFromEnum(Feature.edsp)] = .{244 result[@intFromEnum(Feature.edsp)] = .{
245 .llvm_name = "edsp",245 .llvm_name = "edsp",
246 .description = "Enable DSP instrutions",246 .description = "Enable DSP instructions",
247 .dependencies = featureSet(&[_]Feature{}),247 .dependencies = featureSet(&[_]Feature{}),
248 };248 };
249 result[@intFromEnum(Feature.elrw)] = .{249 result[@intFromEnum(Feature.elrw)] = .{
...@@ -333,12 +333,12 @@ pub const all_features = blk: {...@@ -333,12 +333,12 @@ pub const all_features = blk: {
333 };333 };
334 result[@intFromEnum(Feature.hwdiv)] = .{334 result[@intFromEnum(Feature.hwdiv)] = .{
335 .llvm_name = "hwdiv",335 .llvm_name = "hwdiv",
336 .description = "Enable divide instrutions",336 .description = "Enable divide instructions",
337 .dependencies = featureSet(&[_]Feature{}),337 .dependencies = featureSet(&[_]Feature{}),
338 };338 };
339 result[@intFromEnum(Feature.istack)] = .{339 result[@intFromEnum(Feature.istack)] = .{
340 .llvm_name = "istack",340 .llvm_name = "istack",
341 .description = "Enable interrput attribute",341 .description = "Enable interrupt attribute",
342 .dependencies = featureSet(&[_]Feature{}),342 .dependencies = featureSet(&[_]Feature{}),
343 };343 };
344 result[@intFromEnum(Feature.java)] = .{344 result[@intFromEnum(Feature.java)] = .{
...@@ -362,7 +362,7 @@ pub const all_features = blk: {...@@ -362,7 +362,7 @@ pub const all_features = blk: {
362 };362 };
363 result[@intFromEnum(Feature.multiple_stld)] = .{363 result[@intFromEnum(Feature.multiple_stld)] = .{
364 .llvm_name = "multiple_stld",364 .llvm_name = "multiple_stld",
365 .description = "Enable multiple load/store instrutions",365 .description = "Enable multiple load/store instructions",
366 .dependencies = featureSet(&[_]Feature{}),366 .dependencies = featureSet(&[_]Feature{}),
367 };367 };
368 result[@intFromEnum(Feature.nvic)] = .{368 result[@intFromEnum(Feature.nvic)] = .{
...@@ -372,7 +372,7 @@ pub const all_features = blk: {...@@ -372,7 +372,7 @@ pub const all_features = blk: {
372 };372 };
373 result[@intFromEnum(Feature.pushpop)] = .{373 result[@intFromEnum(Feature.pushpop)] = .{
374 .llvm_name = "pushpop",374 .llvm_name = "pushpop",
375 .description = "Enable push/pop instrutions",375 .description = "Enable push/pop instructions",
376 .dependencies = featureSet(&[_]Feature{}),376 .dependencies = featureSet(&[_]Feature{}),
377 };377 };
378 result[@intFromEnum(Feature.smart)] = .{378 result[@intFromEnum(Feature.smart)] = .{
lib/std/Target/hexagon.zig+79
...@@ -23,6 +23,8 @@ pub const Feature = enum {...@@ -23,6 +23,8 @@ pub const Feature = enum {
23 hvxv69,23 hvxv69,
24 hvxv71,24 hvxv71,
25 hvxv73,25 hvxv73,
26 hvxv75,
27 hvxv79,
26 long_calls,28 long_calls,
27 mem_noshuf,29 mem_noshuf,
28 memops,30 memops,
...@@ -46,6 +48,8 @@ pub const Feature = enum {...@@ -46,6 +48,8 @@ pub const Feature = enum {
46 v69,48 v69,
47 v71,49 v71,
48 v73,50 v73,
51 v75,
52 v79,
49 zreg,53 zreg,
50};54};
5155
...@@ -171,6 +175,20 @@ pub const all_features = blk: {...@@ -171,6 +175,20 @@ pub const all_features = blk: {
171 .hvxv71,175 .hvxv71,
172 }),176 }),
173 };177 };
178 result[@intFromEnum(Feature.hvxv75)] = .{
179 .llvm_name = "hvxv75",
180 .description = "Hexagon HVX instructions",
181 .dependencies = featureSet(&[_]Feature{
182 .hvxv73,
183 }),
184 };
185 result[@intFromEnum(Feature.hvxv79)] = .{
186 .llvm_name = "hvxv79",
187 .description = "Hexagon HVX instructions",
188 .dependencies = featureSet(&[_]Feature{
189 .hvxv75,
190 }),
191 };
174 result[@intFromEnum(Feature.long_calls)] = .{192 result[@intFromEnum(Feature.long_calls)] = .{
175 .llvm_name = "long-calls",193 .llvm_name = "long-calls",
176 .description = "Use constant-extended calls",194 .description = "Use constant-extended calls",
...@@ -290,6 +308,16 @@ pub const all_features = blk: {...@@ -290,6 +308,16 @@ pub const all_features = blk: {
290 .description = "Enable Hexagon V73 architecture",308 .description = "Enable Hexagon V73 architecture",
291 .dependencies = featureSet(&[_]Feature{}),309 .dependencies = featureSet(&[_]Feature{}),
292 };310 };
311 result[@intFromEnum(Feature.v75)] = .{
312 .llvm_name = "v75",
313 .description = "Enable Hexagon V75 architecture",
314 .dependencies = featureSet(&[_]Feature{}),
315 };
316 result[@intFromEnum(Feature.v79)] = .{
317 .llvm_name = "v79",
318 .description = "Enable Hexagon V79 architecture",
319 .dependencies = featureSet(&[_]Feature{}),
320 };
293 result[@intFromEnum(Feature.zreg)] = .{321 result[@intFromEnum(Feature.zreg)] = .{
294 .llvm_name = "zreg",322 .llvm_name = "zreg",
295 .description = "Hexagon ZReg extension instructions",323 .description = "Hexagon ZReg extension instructions",
...@@ -583,4 +611,55 @@ pub const cpu = struct {...@@ -583,4 +611,55 @@ pub const cpu = struct {
583 .v73,611 .v73,
584 }),612 }),
585 };613 };
614 pub const hexagonv75: CpuModel = .{
615 .name = "hexagonv75",
616 .llvm_name = "hexagonv75",
617 .features = featureSet(&[_]Feature{
618 .compound,
619 .duplex,
620 .mem_noshuf,
621 .memops,
622 .nvj,
623 .nvs,
624 .small_data,
625 .v5,
626 .v55,
627 .v60,
628 .v62,
629 .v65,
630 .v66,
631 .v67,
632 .v68,
633 .v69,
634 .v71,
635 .v73,
636 .v75,
637 }),
638 };
639 pub const hexagonv79: CpuModel = .{
640 .name = "hexagonv79",
641 .llvm_name = "hexagonv79",
642 .features = featureSet(&[_]Feature{
643 .compound,
644 .duplex,
645 .mem_noshuf,
646 .memops,
647 .nvj,
648 .nvs,
649 .small_data,
650 .v5,
651 .v55,
652 .v60,
653 .v62,
654 .v65,
655 .v66,
656 .v67,
657 .v68,
658 .v69,
659 .v71,
660 .v73,
661 .v75,
662 .v79,
663 }),
664 };
586};665};
lib/std/Target/loongarch.zig+36
...@@ -8,17 +8,22 @@ pub const Feature = enum {...@@ -8,17 +8,22 @@ pub const Feature = enum {
8 @"32bit",8 @"32bit",
9 @"64bit",9 @"64bit",
10 d,10 d,
11 div32,
11 f,12 f,
12 frecipe,13 frecipe,
13 la_global_with_abs,14 la_global_with_abs,
14 la_global_with_pcrel,15 la_global_with_pcrel,
15 la_local_with_abs,16 la_local_with_abs,
17 lam_bh,
18 lamcas,
16 lasx,19 lasx,
17 lbt,20 lbt,
21 ld_seq_sa,
18 lsx,22 lsx,
19 lvz,23 lvz,
20 prefer_w_inst,24 prefer_w_inst,
21 relax,25 relax,
26 scq,
22 ual,27 ual,
23};28};
2429
...@@ -48,6 +53,11 @@ pub const all_features = blk: {...@@ -48,6 +53,11 @@ pub const all_features = blk: {
48 .f,53 .f,
49 }),54 }),
50 };55 };
56 result[@intFromEnum(Feature.div32)] = .{
57 .llvm_name = "div32",
58 .description = "Assume div.w[u] and mod.w[u] can handle inputs that are not sign-extended",
59 .dependencies = featureSet(&[_]Feature{}),
60 };
51 result[@intFromEnum(Feature.f)] = .{61 result[@intFromEnum(Feature.f)] = .{
52 .llvm_name = "f",62 .llvm_name = "f",
53 .description = "'F' (Single-Precision Floating-Point)",63 .description = "'F' (Single-Precision Floating-Point)",
...@@ -73,6 +83,16 @@ pub const all_features = blk: {...@@ -73,6 +83,16 @@ pub const all_features = blk: {
73 .description = "Expand la.local as la.abs",83 .description = "Expand la.local as la.abs",
74 .dependencies = featureSet(&[_]Feature{}),84 .dependencies = featureSet(&[_]Feature{}),
75 };85 };
86 result[@intFromEnum(Feature.lam_bh)] = .{
87 .llvm_name = "lam-bh",
88 .description = "Support amswap[_db].{b/h} and amadd[_db].{b/h} instructions.",
89 .dependencies = featureSet(&[_]Feature{}),
90 };
91 result[@intFromEnum(Feature.lamcas)] = .{
92 .llvm_name = "lamcas",
93 .description = "Support amcas[_db].{b/h/w/d}.",
94 .dependencies = featureSet(&[_]Feature{}),
95 };
76 result[@intFromEnum(Feature.lasx)] = .{96 result[@intFromEnum(Feature.lasx)] = .{
77 .llvm_name = "lasx",97 .llvm_name = "lasx",
78 .description = "'LASX' (Loongson Advanced SIMD Extension)",98 .description = "'LASX' (Loongson Advanced SIMD Extension)",
...@@ -85,6 +105,11 @@ pub const all_features = blk: {...@@ -85,6 +105,11 @@ pub const all_features = blk: {
85 .description = "'LBT' (Loongson Binary Translation Extension)",105 .description = "'LBT' (Loongson Binary Translation Extension)",
86 .dependencies = featureSet(&[_]Feature{}),106 .dependencies = featureSet(&[_]Feature{}),
87 };107 };
108 result[@intFromEnum(Feature.ld_seq_sa)] = .{
109 .llvm_name = "ld-seq-sa",
110 .description = "Don't use load-load barrier (dbar 0x700).",
111 .dependencies = featureSet(&[_]Feature{}),
112 };
88 result[@intFromEnum(Feature.lsx)] = .{113 result[@intFromEnum(Feature.lsx)] = .{
89 .llvm_name = "lsx",114 .llvm_name = "lsx",
90 .description = "'LSX' (Loongson SIMD Extension)",115 .description = "'LSX' (Loongson SIMD Extension)",
...@@ -107,6 +132,11 @@ pub const all_features = blk: {...@@ -107,6 +132,11 @@ pub const all_features = blk: {
107 .description = "Enable Linker relaxation",132 .description = "Enable Linker relaxation",
108 .dependencies = featureSet(&[_]Feature{}),133 .dependencies = featureSet(&[_]Feature{}),
109 };134 };
135 result[@intFromEnum(Feature.scq)] = .{
136 .llvm_name = "scq",
137 .description = "Support sc.q instruction",
138 .dependencies = featureSet(&[_]Feature{}),
139 };
110 result[@intFromEnum(Feature.ual)] = .{140 result[@intFromEnum(Feature.ual)] = .{
111 .llvm_name = "ual",141 .llvm_name = "ual",
112 .description = "Allow memory accesses to be unaligned",142 .description = "Allow memory accesses to be unaligned",
...@@ -138,6 +168,7 @@ pub const cpu = struct {...@@ -138,6 +168,7 @@ pub const cpu = struct {
138 .llvm_name = "generic-la64",168 .llvm_name = "generic-la64",
139 .features = featureSet(&[_]Feature{169 .features = featureSet(&[_]Feature{
140 .@"64bit",170 .@"64bit",
171 .lsx,
141 .ual,172 .ual,
142 }),173 }),
143 };174 };
...@@ -157,10 +188,15 @@ pub const cpu = struct {...@@ -157,10 +188,15 @@ pub const cpu = struct {
157 .llvm_name = "la664",188 .llvm_name = "la664",
158 .features = featureSet(&[_]Feature{189 .features = featureSet(&[_]Feature{
159 .@"64bit",190 .@"64bit",
191 .div32,
160 .frecipe,192 .frecipe,
193 .lam_bh,
194 .lamcas,
161 .lasx,195 .lasx,
162 .lbt,196 .lbt,
197 .ld_seq_sa,
163 .lvz,198 .lvz,
199 .scq,
164 .ual,200 .ual,
165 }),201 }),
166 };202 };
lib/std/Target/nvptx.zig+96
...@@ -32,6 +32,14 @@ pub const Feature = enum {...@@ -32,6 +32,14 @@ pub const Feature = enum {
32 ptx83,32 ptx83,
33 ptx84,33 ptx84,
34 ptx85,34 ptx85,
35 ptx86,
36 ptx87,
37 sm_100,
38 sm_100a,
39 sm_101,
40 sm_101a,
41 sm_120,
42 sm_120a,
35 sm_20,43 sm_20,
36 sm_21,44 sm_21,
37 sm_30,45 sm_30,
...@@ -199,6 +207,46 @@ pub const all_features = blk: {...@@ -199,6 +207,46 @@ pub const all_features = blk: {
199 .description = "Use PTX version 85",207 .description = "Use PTX version 85",
200 .dependencies = featureSet(&[_]Feature{}),208 .dependencies = featureSet(&[_]Feature{}),
201 };209 };
210 result[@intFromEnum(Feature.ptx86)] = .{
211 .llvm_name = "ptx86",
212 .description = "Use PTX version 86",
213 .dependencies = featureSet(&[_]Feature{}),
214 };
215 result[@intFromEnum(Feature.ptx87)] = .{
216 .llvm_name = "ptx87",
217 .description = "Use PTX version 87",
218 .dependencies = featureSet(&[_]Feature{}),
219 };
220 result[@intFromEnum(Feature.sm_100)] = .{
221 .llvm_name = "sm_100",
222 .description = "Target SM 100",
223 .dependencies = featureSet(&[_]Feature{}),
224 };
225 result[@intFromEnum(Feature.sm_100a)] = .{
226 .llvm_name = "sm_100a",
227 .description = "Target SM 100a",
228 .dependencies = featureSet(&[_]Feature{}),
229 };
230 result[@intFromEnum(Feature.sm_101)] = .{
231 .llvm_name = "sm_101",
232 .description = "Target SM 101",
233 .dependencies = featureSet(&[_]Feature{}),
234 };
235 result[@intFromEnum(Feature.sm_101a)] = .{
236 .llvm_name = "sm_101a",
237 .description = "Target SM 101a",
238 .dependencies = featureSet(&[_]Feature{}),
239 };
240 result[@intFromEnum(Feature.sm_120)] = .{
241 .llvm_name = "sm_120",
242 .description = "Target SM 120",
243 .dependencies = featureSet(&[_]Feature{}),
244 };
245 result[@intFromEnum(Feature.sm_120a)] = .{
246 .llvm_name = "sm_120a",
247 .description = "Target SM 120a",
248 .dependencies = featureSet(&[_]Feature{}),
249 };
202 result[@intFromEnum(Feature.sm_20)] = .{250 result[@intFromEnum(Feature.sm_20)] = .{
203 .llvm_name = "sm_20",251 .llvm_name = "sm_20",
204 .description = "Target SM 20",252 .description = "Target SM 20",
...@@ -313,6 +361,54 @@ pub const all_features = blk: {...@@ -313,6 +361,54 @@ pub const all_features = blk: {
313};361};
314362
315pub const cpu = struct {363pub const cpu = struct {
364 pub const sm_100: CpuModel = .{
365 .name = "sm_100",
366 .llvm_name = "sm_100",
367 .features = featureSet(&[_]Feature{
368 .ptx86,
369 .sm_100,
370 }),
371 };
372 pub const sm_100a: CpuModel = .{
373 .name = "sm_100a",
374 .llvm_name = "sm_100a",
375 .features = featureSet(&[_]Feature{
376 .ptx86,
377 .sm_100a,
378 }),
379 };
380 pub const sm_101: CpuModel = .{
381 .name = "sm_101",
382 .llvm_name = "sm_101",
383 .features = featureSet(&[_]Feature{
384 .ptx86,
385 .sm_101,
386 }),
387 };
388 pub const sm_101a: CpuModel = .{
389 .name = "sm_101a",
390 .llvm_name = "sm_101a",
391 .features = featureSet(&[_]Feature{
392 .ptx86,
393 .sm_101a,
394 }),
395 };
396 pub const sm_120: CpuModel = .{
397 .name = "sm_120",
398 .llvm_name = "sm_120",
399 .features = featureSet(&[_]Feature{
400 .ptx87,
401 .sm_120,
402 }),
403 };
404 pub const sm_120a: CpuModel = .{
405 .name = "sm_120a",
406 .llvm_name = "sm_120a",
407 .features = featureSet(&[_]Feature{
408 .ptx87,
409 .sm_120a,
410 }),
411 };
316 pub const sm_20: CpuModel = .{412 pub const sm_20: CpuModel = .{
317 .name = "sm_20",413 .name = "sm_20",
318 .llvm_name = "sm_20",414 .llvm_name = "sm_20",
lib/std/Target/riscv.zig+741-264
...@@ -13,36 +13,50 @@ pub const Feature = enum {...@@ -13,36 +13,50 @@ pub const Feature = enum {
13 c,13 c,
14 conditional_cmv_fusion,14 conditional_cmv_fusion,
15 d,15 d,
16 disable_latency_sched_heuristic,
16 dlen_factor_2,17 dlen_factor_2,
17 e,18 e,
18 experimental,19 experimental,
19 experimental_rva23s64,
20 experimental_rva23u64,
21 experimental_rvb23s64,
22 experimental_rvb23u64,
23 experimental_rvm23u32,20 experimental_rvm23u32,
24 experimental_smmpm,21 experimental_sdext,
25 experimental_smnpm,22 experimental_sdtrig,
26 experimental_ssnpm,23 experimental_smctr,
27 experimental_sspm,24 experimental_ssctr,
28 experimental_ssqosid,25 experimental_svukte,
29 experimental_supm,26 experimental_xqcia,
30 experimental_zacas,27 experimental_xqciac,
28 experimental_xqcicli,
29 experimental_xqcicm,
30 experimental_xqcics,
31 experimental_xqcicsr,
32 experimental_xqciint,
33 experimental_xqcilo,
34 experimental_xqcilsm,
35 experimental_xqcisls,
31 experimental_zalasr,36 experimental_zalasr,
32 experimental_zicfilp,37 experimental_zicfilp,
33 experimental_zicfiss,38 experimental_zicfiss,
39 experimental_zvbc32e,
40 experimental_zvkgs,
34 f,41 f,
35 forced_atomics,42 forced_atomics,
36 forced_sw_shadow_stack,
37 h,43 h,
38 i,44 i,
39 ld_add_fusion,45 ld_add_fusion,
40 lui_addi_fusion,46 lui_addi_fusion,
41 m,47 m,
48 mips_p8700,
42 no_default_unroll,49 no_default_unroll,
43 no_rvc_hints,50 no_rvc_hints,
44 no_sink_splat_operands,51 no_sink_splat_operands,
45 no_trailing_seq_cst_fence,52 no_trailing_seq_cst_fence,
53 optimized_nf2_segment_load_store,
54 optimized_nf3_segment_load_store,
55 optimized_nf4_segment_load_store,
56 optimized_nf5_segment_load_store,
57 optimized_nf6_segment_load_store,
58 optimized_nf7_segment_load_store,
59 optimized_nf8_segment_load_store,
46 optimized_zero_stride_load,60 optimized_zero_stride_load,
47 predictable_select_expensive,61 predictable_select_expensive,
48 prefer_w_inst,62 prefer_w_inst,
...@@ -82,9 +96,14 @@ pub const Feature = enum {...@@ -82,9 +96,14 @@ pub const Feature = enum {
82 rva20u64,96 rva20u64,
83 rva22s64,97 rva22s64,
84 rva22u64,98 rva22u64,
99 rva23s64,
100 rva23u64,
101 rvb23s64,
102 rvb23u64,
85 rvi20u32,103 rvi20u32,
86 rvi20u64,104 rvi20u64,
87 save_restore,105 save_restore,
106 sha,
88 shcounterenw,107 shcounterenw,
89 shgatpa,108 shgatpa,
90 shifted_zextw_fusion,109 shifted_zextw_fusion,
...@@ -96,7 +115,11 @@ pub const Feature = enum {...@@ -96,7 +115,11 @@ pub const Feature = enum {
96 smaia,115 smaia,
97 smcdeleg,116 smcdeleg,
98 smcsrind,117 smcsrind,
118 smdbltrp,
99 smepmp,119 smepmp,
120 smmpm,
121 smnpm,
122 smrnmi,
100 smstateen,123 smstateen,
101 ssaia,124 ssaia,
102 ssccfg,125 ssccfg,
...@@ -104,24 +127,31 @@ pub const Feature = enum {...@@ -104,24 +127,31 @@ pub const Feature = enum {
104 sscofpmf,127 sscofpmf,
105 sscounterenw,128 sscounterenw,
106 sscsrind,129 sscsrind,
130 ssdbltrp,
131 ssnpm,
132 sspm,
133 ssqosid,
107 ssstateen,134 ssstateen,
108 ssstrict,135 ssstrict,
109 sstc,136 sstc,
110 sstvala,137 sstvala,
111 sstvecd,138 sstvecd,
112 ssu64xl,139 ssu64xl,
140 supm,
113 svade,141 svade,
114 svadu,142 svadu,
115 svbare,143 svbare,
116 svinval,144 svinval,
117 svnapot,145 svnapot,
118 svpbmt,146 svpbmt,
147 svvptc,
119 tagged_globals,148 tagged_globals,
120 unaligned_scalar_mem,149 unaligned_scalar_mem,
121 unaligned_vector_mem,150 unaligned_vector_mem,
122 use_postra_scheduler,151 use_postra_scheduler,
123 v,152 v,
124 ventana_veyron,153 ventana_veyron,
154 vxrm_pipeline_flush,
125 xcvalu,155 xcvalu,
126 xcvbi,156 xcvbi,
127 xcvbitmanip,157 xcvbitmanip,
...@@ -129,6 +159,8 @@ pub const Feature = enum {...@@ -129,6 +159,8 @@ pub const Feature = enum {
129 xcvmac,159 xcvmac,
130 xcvmem,160 xcvmem,
131 xcvsimd,161 xcvsimd,
162 xmipscmove,
163 xmipslsp,
132 xsfcease,164 xsfcease,
133 xsfvcp,165 xsfvcp,
134 xsfvfnrclipxfqf,166 xsfvfnrclipxfqf,
...@@ -154,6 +186,7 @@ pub const Feature = enum {...@@ -154,6 +186,7 @@ pub const Feature = enum {
154 za64rs,186 za64rs,
155 zaamo,187 zaamo,
156 zabha,188 zabha,
189 zacas,
157 zalrsc,190 zalrsc,
158 zama16b,191 zama16b,
159 zawrs,192 zawrs,
...@@ -272,7 +305,10 @@ pub const all_features = blk: {...@@ -272,7 +305,10 @@ pub const all_features = blk: {
272 result[@intFromEnum(Feature.a)] = .{305 result[@intFromEnum(Feature.a)] = .{
273 .llvm_name = "a",306 .llvm_name = "a",
274 .description = "'A' (Atomic Instructions)",307 .description = "'A' (Atomic Instructions)",
275 .dependencies = featureSet(&[_]Feature{}),308 .dependencies = featureSet(&[_]Feature{
309 .zaamo,
310 .zalrsc,
311 }),
276 };312 };
277 result[@intFromEnum(Feature.auipc_addi_fusion)] = .{313 result[@intFromEnum(Feature.auipc_addi_fusion)] = .{
278 .llvm_name = "auipc-addi-fusion",314 .llvm_name = "auipc-addi-fusion",
...@@ -305,6 +341,11 @@ pub const all_features = blk: {...@@ -305,6 +341,11 @@ pub const all_features = blk: {
305 .f,341 .f,
306 }),342 }),
307 };343 };
344 result[@intFromEnum(Feature.disable_latency_sched_heuristic)] = .{
345 .llvm_name = "disable-latency-sched-heuristic",
346 .description = "Disable latency scheduling heuristic",
347 .dependencies = featureSet(&[_]Feature{}),
348 };
308 result[@intFromEnum(Feature.dlen_factor_2)] = .{349 result[@intFromEnum(Feature.dlen_factor_2)] = .{
309 .llvm_name = "dlen-factor-2",350 .llvm_name = "dlen-factor-2",
310 .description = "Vector unit DLEN(data path width) is half of VLEN",351 .description = "Vector unit DLEN(data path width) is half of VLEN",
...@@ -312,7 +353,7 @@ pub const all_features = blk: {...@@ -312,7 +353,7 @@ pub const all_features = blk: {
312 };353 };
313 result[@intFromEnum(Feature.e)] = .{354 result[@intFromEnum(Feature.e)] = .{
314 .llvm_name = "e",355 .llvm_name = "e",
315 .description = "Implements RV{32,64}E (provides 16 rather than 32 GPRs)",356 .description = "'E' (Embedded Instruction Set with 16 GPRs)",
316 .dependencies = featureSet(&[_]Feature{}),357 .dependencies = featureSet(&[_]Feature{}),
317 };358 };
318 result[@intFromEnum(Feature.experimental)] = .{359 result[@intFromEnum(Feature.experimental)] = .{
...@@ -320,241 +361,108 @@ pub const all_features = blk: {...@@ -320,241 +361,108 @@ pub const all_features = blk: {
320 .description = "Experimental intrinsics",361 .description = "Experimental intrinsics",
321 .dependencies = featureSet(&[_]Feature{}),362 .dependencies = featureSet(&[_]Feature{}),
322 };363 };
323 result[@intFromEnum(Feature.experimental_rva23s64)] = .{364 result[@intFromEnum(Feature.experimental_rvm23u32)] = .{
324 .llvm_name = "experimental-rva23s64",365 .llvm_name = "experimental-rvm23u32",
325 .description = "RISC-V experimental-rva23s64 profile",366 .description = "RISC-V experimental-rvm23u32 profile",
326 .dependencies = featureSet(&[_]Feature{367 .dependencies = featureSet(&[_]Feature{
327 .@"64bit",368 .@"32bit",
328 .a,369 .b,
329 .c,
330 .experimental_ssnpm,
331 .h,
332 .i,370 .i,
333 .m,371 .m,
334 .shcounterenw,372 .zce,
335 .shgatpa,
336 .shtvala,
337 .shvsatpa,
338 .shvstvala,
339 .shvstvecd,
340 .ssccptr,
341 .sscofpmf,
342 .sscounterenw,
343 .ssstateen,
344 .sstc,
345 .sstvala,
346 .sstvecd,
347 .ssu64xl,
348 .svade,
349 .svbare,
350 .svinval,
351 .svnapot,
352 .svpbmt,
353 .v,
354 .za64rs,
355 .zawrs,
356 .zba,
357 .zbb,
358 .zbs,
359 .zcb,
360 .zcmop,373 .zcmop,
361 .zfa,
362 .zfhmin,
363 .zic64b,
364 .zicbom,
365 .zicbop,374 .zicbop,
366 .zicboz,
367 .ziccamoa,
368 .ziccif,
369 .zicclsm,
370 .ziccrse,
371 .zicntr,
372 .zicond,375 .zicond,
373 .zifencei,
374 .zihintntl,376 .zihintntl,
375 .zihintpause,377 .zihintpause,
376 .zihpm,
377 .zimop,378 .zimop,
378 .zkt,
379 .zvbb,
380 .zvfhmin,
381 .zvkt,
382 }),379 }),
383 };380 };
384 result[@intFromEnum(Feature.experimental_rva23u64)] = .{381 result[@intFromEnum(Feature.experimental_sdext)] = .{
385 .llvm_name = "experimental-rva23u64",382 .llvm_name = "experimental-sdext",
386 .description = "RISC-V experimental-rva23u64 profile",383 .description = "'Sdext' (External debugger)",
387 .dependencies = featureSet(&[_]Feature{384 .dependencies = featureSet(&[_]Feature{}),
388 .@"64bit",
389 .a,
390 .c,
391 .i,
392 .m,
393 .v,
394 .za64rs,
395 .zawrs,
396 .zba,
397 .zbb,
398 .zbs,
399 .zcb,
400 .zcmop,
401 .zfa,
402 .zfhmin,
403 .zic64b,
404 .zicbom,
405 .zicbop,
406 .zicboz,
407 .ziccamoa,
408 .ziccif,
409 .zicclsm,
410 .ziccrse,
411 .zicntr,
412 .zicond,
413 .zihintntl,
414 .zihintpause,
415 .zihpm,
416 .zimop,
417 .zkt,
418 .zvbb,
419 .zvfhmin,
420 .zvkt,
421 }),
422 };385 };
423 result[@intFromEnum(Feature.experimental_rvb23s64)] = .{386 result[@intFromEnum(Feature.experimental_sdtrig)] = .{
424 .llvm_name = "experimental-rvb23s64",387 .llvm_name = "experimental-sdtrig",
425 .description = "RISC-V experimental-rvb23s64 profile",388 .description = "'Sdtrig' (Debugger triggers)",
426 .dependencies = featureSet(&[_]Feature{389 .dependencies = featureSet(&[_]Feature{}),
427 .@"64bit",
428 .a,
429 .c,
430 .d,
431 .i,
432 .m,
433 .ssccptr,
434 .sscofpmf,
435 .sscounterenw,
436 .sstc,
437 .sstvala,
438 .sstvecd,
439 .ssu64xl,
440 .svade,
441 .svbare,
442 .svinval,
443 .svnapot,
444 .svpbmt,
445 .za64rs,
446 .zawrs,
447 .zba,
448 .zbb,
449 .zbs,
450 .zcb,
451 .zcmop,
452 .zfa,
453 .zic64b,
454 .zicbom,
455 .zicbop,
456 .zicboz,
457 .ziccamoa,
458 .ziccif,
459 .zicclsm,
460 .ziccrse,
461 .zicntr,
462 .zicond,
463 .zifencei,
464 .zihintntl,
465 .zihintpause,
466 .zihpm,
467 .zimop,
468 .zkt,
469 }),
470 };390 };
471 result[@intFromEnum(Feature.experimental_rvb23u64)] = .{391 result[@intFromEnum(Feature.experimental_smctr)] = .{
472 .llvm_name = "experimental-rvb23u64",392 .llvm_name = "experimental-smctr",
473 .description = "RISC-V experimental-rvb23u64 profile",393 .description = "'Smctr' (Control Transfer Records Machine Level)",
474 .dependencies = featureSet(&[_]Feature{394 .dependencies = featureSet(&[_]Feature{
475 .@"64bit",395 .sscsrind,
476 .a,
477 .c,
478 .d,
479 .i,
480 .m,
481 .za64rs,
482 .zawrs,
483 .zba,
484 .zbb,
485 .zbs,
486 .zcb,
487 .zcmop,
488 .zfa,
489 .zic64b,
490 .zicbom,
491 .zicbop,
492 .zicboz,
493 .ziccamoa,
494 .ziccif,
495 .zicclsm,
496 .ziccrse,
497 .zicntr,
498 .zicond,
499 .zihintntl,
500 .zihintpause,
501 .zihpm,
502 .zimop,
503 .zkt,
504 }),396 }),
505 };397 };
506 result[@intFromEnum(Feature.experimental_rvm23u32)] = .{398 result[@intFromEnum(Feature.experimental_ssctr)] = .{
507 .llvm_name = "experimental-rvm23u32",399 .llvm_name = "experimental-ssctr",
508 .description = "RISC-V experimental-rvm23u32 profile",400 .description = "'Ssctr' (Control Transfer Records Supervisor Level)",
509 .dependencies = featureSet(&[_]Feature{401 .dependencies = featureSet(&[_]Feature{
510 .@"32bit",402 .sscsrind,
511 .i,
512 .m,
513 .zba,
514 .zbb,
515 .zbs,
516 .zce,
517 .zcmop,
518 .zicbop,
519 .zicond,
520 .zihintntl,
521 .zihintpause,
522 .zimop,
523 }),403 }),
524 };404 };
525 result[@intFromEnum(Feature.experimental_smmpm)] = .{405 result[@intFromEnum(Feature.experimental_svukte)] = .{
526 .llvm_name = "experimental-smmpm",406 .llvm_name = "experimental-svukte",
527 .description = "'Smmpm' (Machine-level Pointer Masking for M-mode)",407 .description = "'Svukte' (Address-Independent Latency of User-Mode Faults to Supervisor Addresses)",
528 .dependencies = featureSet(&[_]Feature{}),408 .dependencies = featureSet(&[_]Feature{}),
529 };409 };
530 result[@intFromEnum(Feature.experimental_smnpm)] = .{410 result[@intFromEnum(Feature.experimental_xqcia)] = .{
531 .llvm_name = "experimental-smnpm",411 .llvm_name = "experimental-xqcia",
532 .description = "'Smnpm' (Machine-level Pointer Masking for next lower privilege mode)",412 .description = "'Xqcia' (Qualcomm uC Arithmetic Extension)",
533 .dependencies = featureSet(&[_]Feature{}),413 .dependencies = featureSet(&[_]Feature{}),
534 };414 };
535 result[@intFromEnum(Feature.experimental_ssnpm)] = .{415 result[@intFromEnum(Feature.experimental_xqciac)] = .{
536 .llvm_name = "experimental-ssnpm",416 .llvm_name = "experimental-xqciac",
537 .description = "'Ssnpm' (Supervisor-level Pointer Masking for next lower privilege mode)",417 .description = "'Xqciac' (Qualcomm uC Load-Store Address Calculation Extension)",
418 .dependencies = featureSet(&[_]Feature{
419 .zca,
420 }),
421 };
422 result[@intFromEnum(Feature.experimental_xqcicli)] = .{
423 .llvm_name = "experimental-xqcicli",
424 .description = "'Xqcicli' (Qualcomm uC Conditional Load Immediate Extension)",
538 .dependencies = featureSet(&[_]Feature{}),425 .dependencies = featureSet(&[_]Feature{}),
539 };426 };
540 result[@intFromEnum(Feature.experimental_sspm)] = .{427 result[@intFromEnum(Feature.experimental_xqcicm)] = .{
541 .llvm_name = "experimental-sspm",428 .llvm_name = "experimental-xqcicm",
542 .description = "'Sspm' (Indicates Supervisor-mode Pointer Masking)",429 .description = "'Xqcicm' (Qualcomm uC Conditional Move Extension)",
430 .dependencies = featureSet(&[_]Feature{
431 .zca,
432 }),
433 };
434 result[@intFromEnum(Feature.experimental_xqcics)] = .{
435 .llvm_name = "experimental-xqcics",
436 .description = "'Xqcics' (Qualcomm uC Conditional Select Extension)",
543 .dependencies = featureSet(&[_]Feature{}),437 .dependencies = featureSet(&[_]Feature{}),
544 };438 };
545 result[@intFromEnum(Feature.experimental_ssqosid)] = .{439 result[@intFromEnum(Feature.experimental_xqcicsr)] = .{
546 .llvm_name = "experimental-ssqosid",440 .llvm_name = "experimental-xqcicsr",
547 .description = "'Ssqosid' (Quality-of-Service (QoS) Identifiers)",441 .description = "'Xqcicsr' (Qualcomm uC CSR Extension)",
548 .dependencies = featureSet(&[_]Feature{}),442 .dependencies = featureSet(&[_]Feature{}),
549 };443 };
550 result[@intFromEnum(Feature.experimental_supm)] = .{444 result[@intFromEnum(Feature.experimental_xqciint)] = .{
551 .llvm_name = "experimental-supm",445 .llvm_name = "experimental-xqciint",
552 .description = "'Supm' (Indicates User-mode Pointer Masking)",446 .description = "'Xqciint' (Qualcomm uC Interrupts Extension)",
447 .dependencies = featureSet(&[_]Feature{
448 .zca,
449 }),
450 };
451 result[@intFromEnum(Feature.experimental_xqcilo)] = .{
452 .llvm_name = "experimental-xqcilo",
453 .description = "'Xqcilo' (Qualcomm uC Large Offset Load Store Extension)",
454 .dependencies = featureSet(&[_]Feature{
455 .zca,
456 }),
457 };
458 result[@intFromEnum(Feature.experimental_xqcilsm)] = .{
459 .llvm_name = "experimental-xqcilsm",
460 .description = "'Xqcilsm' (Qualcomm uC Load Store Multiple Extension)",
553 .dependencies = featureSet(&[_]Feature{}),461 .dependencies = featureSet(&[_]Feature{}),
554 };462 };
555 result[@intFromEnum(Feature.experimental_zacas)] = .{463 result[@intFromEnum(Feature.experimental_xqcisls)] = .{
556 .llvm_name = "experimental-zacas",464 .llvm_name = "experimental-xqcisls",
557 .description = "'Zacas' (Atomic Compare-And-Swap Instructions)",465 .description = "'Xqcisls' (Qualcomm uC Scaled Load Store Extension)",
558 .dependencies = featureSet(&[_]Feature{}),466 .dependencies = featureSet(&[_]Feature{}),
559 };467 };
560 result[@intFromEnum(Feature.experimental_zalasr)] = .{468 result[@intFromEnum(Feature.experimental_zalasr)] = .{
...@@ -577,6 +485,20 @@ pub const all_features = blk: {...@@ -577,6 +485,20 @@ pub const all_features = blk: {
577 .zimop,485 .zimop,
578 }),486 }),
579 };487 };
488 result[@intFromEnum(Feature.experimental_zvbc32e)] = .{
489 .llvm_name = "experimental-zvbc32e",
490 .description = "'Zvbc32e' (Vector Carryless Multiplication with 32-bits elements)",
491 .dependencies = featureSet(&[_]Feature{
492 .zve32x,
493 }),
494 };
495 result[@intFromEnum(Feature.experimental_zvkgs)] = .{
496 .llvm_name = "experimental-zvkgs",
497 .description = "'Zvkgs' (Vector-Scalar GCM instructions for Cryptography)",
498 .dependencies = featureSet(&[_]Feature{
499 .zvkg,
500 }),
501 };
580 result[@intFromEnum(Feature.f)] = .{502 result[@intFromEnum(Feature.f)] = .{
581 .llvm_name = "f",503 .llvm_name = "f",
582 .description = "'F' (Single-Precision Floating-Point)",504 .description = "'F' (Single-Precision Floating-Point)",
...@@ -589,11 +511,6 @@ pub const all_features = blk: {...@@ -589,11 +511,6 @@ pub const all_features = blk: {
589 .description = "Assume that lock-free native-width atomics are available",511 .description = "Assume that lock-free native-width atomics are available",
590 .dependencies = featureSet(&[_]Feature{}),512 .dependencies = featureSet(&[_]Feature{}),
591 };513 };
592 result[@intFromEnum(Feature.forced_sw_shadow_stack)] = .{
593 .llvm_name = "forced-sw-shadow-stack",
594 .description = "Implement shadow stack with software.",
595 .dependencies = featureSet(&[_]Feature{}),
596 };
597 result[@intFromEnum(Feature.h)] = .{514 result[@intFromEnum(Feature.h)] = .{
598 .llvm_name = "h",515 .llvm_name = "h",
599 .description = "'H' (Hypervisor)",516 .description = "'H' (Hypervisor)",
...@@ -621,6 +538,11 @@ pub const all_features = blk: {...@@ -621,6 +538,11 @@ pub const all_features = blk: {
621 .zmmul,538 .zmmul,
622 }),539 }),
623 };540 };
541 result[@intFromEnum(Feature.mips_p8700)] = .{
542 .llvm_name = "mips-p8700",
543 .description = "MIPS p8700 processor",
544 .dependencies = featureSet(&[_]Feature{}),
545 };
624 result[@intFromEnum(Feature.no_default_unroll)] = .{546 result[@intFromEnum(Feature.no_default_unroll)] = .{
625 .llvm_name = "no-default-unroll",547 .llvm_name = "no-default-unroll",
626 .description = "Disable default unroll preference.",548 .description = "Disable default unroll preference.",
...@@ -641,6 +563,41 @@ pub const all_features = blk: {...@@ -641,6 +563,41 @@ pub const all_features = blk: {
641 .description = "Disable trailing fence for seq-cst store.",563 .description = "Disable trailing fence for seq-cst store.",
642 .dependencies = featureSet(&[_]Feature{}),564 .dependencies = featureSet(&[_]Feature{}),
643 };565 };
566 result[@intFromEnum(Feature.optimized_nf2_segment_load_store)] = .{
567 .llvm_name = "optimized-nf2-segment-load-store",
568 .description = "vlseg2eN.v and vsseg2eN.v areimplemented as a wide memory op and shuffle",
569 .dependencies = featureSet(&[_]Feature{}),
570 };
571 result[@intFromEnum(Feature.optimized_nf3_segment_load_store)] = .{
572 .llvm_name = "optimized-nf3-segment-load-store",
573 .description = "vlseg3eN.v and vsseg3eN.v areimplemented as a wide memory op and shuffle",
574 .dependencies = featureSet(&[_]Feature{}),
575 };
576 result[@intFromEnum(Feature.optimized_nf4_segment_load_store)] = .{
577 .llvm_name = "optimized-nf4-segment-load-store",
578 .description = "vlseg4eN.v and vsseg4eN.v areimplemented as a wide memory op and shuffle",
579 .dependencies = featureSet(&[_]Feature{}),
580 };
581 result[@intFromEnum(Feature.optimized_nf5_segment_load_store)] = .{
582 .llvm_name = "optimized-nf5-segment-load-store",
583 .description = "vlseg5eN.v and vsseg5eN.v areimplemented as a wide memory op and shuffle",
584 .dependencies = featureSet(&[_]Feature{}),
585 };
586 result[@intFromEnum(Feature.optimized_nf6_segment_load_store)] = .{
587 .llvm_name = "optimized-nf6-segment-load-store",
588 .description = "vlseg6eN.v and vsseg6eN.v areimplemented as a wide memory op and shuffle",
589 .dependencies = featureSet(&[_]Feature{}),
590 };
591 result[@intFromEnum(Feature.optimized_nf7_segment_load_store)] = .{
592 .llvm_name = "optimized-nf7-segment-load-store",
593 .description = "vlseg7eN.v and vsseg7eN.v areimplemented as a wide memory op and shuffle",
594 .dependencies = featureSet(&[_]Feature{}),
595 };
596 result[@intFromEnum(Feature.optimized_nf8_segment_load_store)] = .{
597 .llvm_name = "optimized-nf8-segment-load-store",
598 .description = "vlseg8eN.v and vsseg8eN.v areimplemented as a wide memory op and shuffle",
599 .dependencies = featureSet(&[_]Feature{}),
600 };
644 result[@intFromEnum(Feature.optimized_zero_stride_load)] = .{601 result[@intFromEnum(Feature.optimized_zero_stride_load)] = .{
645 .llvm_name = "optimized-zero-stride-load",602 .llvm_name = "optimized-zero-stride-load",
646 .description = "Optimized (perform fewer memory operations)zero-stride vector load",603 .description = "Optimized (perform fewer memory operations)zero-stride vector load",
...@@ -864,6 +821,7 @@ pub const all_features = blk: {...@@ -864,6 +821,7 @@ pub const all_features = blk: {
864 .dependencies = featureSet(&[_]Feature{821 .dependencies = featureSet(&[_]Feature{
865 .@"64bit",822 .@"64bit",
866 .a,823 .a,
824 .b,
867 .c,825 .c,
868 .d,826 .d,
869 .i,827 .i,
...@@ -877,9 +835,6 @@ pub const all_features = blk: {...@@ -877,9 +835,6 @@ pub const all_features = blk: {
877 .svinval,835 .svinval,
878 .svpbmt,836 .svpbmt,
879 .za64rs,837 .za64rs,
880 .zba,
881 .zbb,
882 .zbs,
883 .zfhmin,838 .zfhmin,
884 .zic64b,839 .zic64b,
885 .zicbom,840 .zicbom,
...@@ -902,14 +857,12 @@ pub const all_features = blk: {...@@ -902,14 +857,12 @@ pub const all_features = blk: {
902 .dependencies = featureSet(&[_]Feature{857 .dependencies = featureSet(&[_]Feature{
903 .@"64bit",858 .@"64bit",
904 .a,859 .a,
860 .b,
905 .c,861 .c,
906 .d,862 .d,
907 .i,863 .i,
908 .m,864 .m,
909 .za64rs,865 .za64rs,
910 .zba,
911 .zbb,
912 .zbs,
913 .zfhmin,866 .zfhmin,
914 .zic64b,867 .zic64b,
915 .zicbom,868 .zicbom,
...@@ -925,6 +878,176 @@ pub const all_features = blk: {...@@ -925,6 +878,176 @@ pub const all_features = blk: {
925 .zkt,878 .zkt,
926 }),879 }),
927 };880 };
881 result[@intFromEnum(Feature.rva23s64)] = .{
882 .llvm_name = "rva23s64",
883 .description = "RISC-V rva23s64 profile",
884 .dependencies = featureSet(&[_]Feature{
885 .@"64bit",
886 .a,
887 .b,
888 .c,
889 .i,
890 .m,
891 .sha,
892 .ssccptr,
893 .sscofpmf,
894 .sscounterenw,
895 .ssnpm,
896 .sstc,
897 .sstvala,
898 .sstvecd,
899 .ssu64xl,
900 .supm,
901 .svade,
902 .svbare,
903 .svinval,
904 .svnapot,
905 .svpbmt,
906 .v,
907 .za64rs,
908 .zawrs,
909 .zcb,
910 .zcmop,
911 .zfa,
912 .zfhmin,
913 .zic64b,
914 .zicbom,
915 .zicbop,
916 .zicboz,
917 .ziccamoa,
918 .ziccif,
919 .zicclsm,
920 .ziccrse,
921 .zicntr,
922 .zicond,
923 .zifencei,
924 .zihintntl,
925 .zihintpause,
926 .zihpm,
927 .zimop,
928 .zkt,
929 .zvbb,
930 .zvfhmin,
931 .zvkt,
932 }),
933 };
934 result[@intFromEnum(Feature.rva23u64)] = .{
935 .llvm_name = "rva23u64",
936 .description = "RISC-V rva23u64 profile",
937 .dependencies = featureSet(&[_]Feature{
938 .@"64bit",
939 .a,
940 .b,
941 .c,
942 .i,
943 .m,
944 .supm,
945 .v,
946 .za64rs,
947 .zawrs,
948 .zcb,
949 .zcmop,
950 .zfa,
951 .zfhmin,
952 .zic64b,
953 .zicbom,
954 .zicbop,
955 .zicboz,
956 .ziccamoa,
957 .ziccif,
958 .zicclsm,
959 .ziccrse,
960 .zicntr,
961 .zicond,
962 .zihintntl,
963 .zihintpause,
964 .zihpm,
965 .zimop,
966 .zkt,
967 .zvbb,
968 .zvfhmin,
969 .zvkt,
970 }),
971 };
972 result[@intFromEnum(Feature.rvb23s64)] = .{
973 .llvm_name = "rvb23s64",
974 .description = "RISC-V rvb23s64 profile",
975 .dependencies = featureSet(&[_]Feature{
976 .@"64bit",
977 .a,
978 .b,
979 .c,
980 .d,
981 .i,
982 .m,
983 .ssccptr,
984 .sscofpmf,
985 .sscounterenw,
986 .sstc,
987 .sstvala,
988 .sstvecd,
989 .ssu64xl,
990 .svade,
991 .svbare,
992 .svinval,
993 .svnapot,
994 .svpbmt,
995 .za64rs,
996 .zawrs,
997 .zcb,
998 .zcmop,
999 .zfa,
1000 .zic64b,
1001 .zicbom,
1002 .zicbop,
1003 .zicboz,
1004 .ziccamoa,
1005 .ziccif,
1006 .zicclsm,
1007 .ziccrse,
1008 .zicntr,
1009 .zicond,
1010 .zifencei,
1011 .zihintntl,
1012 .zihintpause,
1013 .zihpm,
1014 .zimop,
1015 .zkt,
1016 }),
1017 };
1018 result[@intFromEnum(Feature.rvb23u64)] = .{
1019 .llvm_name = "rvb23u64",
1020 .description = "RISC-V rvb23u64 profile",
1021 .dependencies = featureSet(&[_]Feature{
1022 .@"64bit",
1023 .a,
1024 .b,
1025 .c,
1026 .d,
1027 .i,
1028 .m,
1029 .za64rs,
1030 .zawrs,
1031 .zcb,
1032 .zcmop,
1033 .zfa,
1034 .zic64b,
1035 .zicbom,
1036 .zicbop,
1037 .zicboz,
1038 .ziccamoa,
1039 .ziccif,
1040 .zicclsm,
1041 .ziccrse,
1042 .zicntr,
1043 .zicond,
1044 .zihintntl,
1045 .zihintpause,
1046 .zihpm,
1047 .zimop,
1048 .zkt,
1049 }),
1050 };
928 result[@intFromEnum(Feature.rvi20u32)] = .{1051 result[@intFromEnum(Feature.rvi20u32)] = .{
929 .llvm_name = "rvi20u32",1052 .llvm_name = "rvi20u32",
930 .description = "RISC-V rvi20u32 profile",1053 .description = "RISC-V rvi20u32 profile",
...@@ -946,6 +1069,20 @@ pub const all_features = blk: {...@@ -946,6 +1069,20 @@ pub const all_features = blk: {
946 .description = "Enable save/restore.",1069 .description = "Enable save/restore.",
947 .dependencies = featureSet(&[_]Feature{}),1070 .dependencies = featureSet(&[_]Feature{}),
948 };1071 };
1072 result[@intFromEnum(Feature.sha)] = .{
1073 .llvm_name = "sha",
1074 .description = "'Sha' (Augmented Hypervisor)",
1075 .dependencies = featureSet(&[_]Feature{
1076 .h,
1077 .shcounterenw,
1078 .shgatpa,
1079 .shtvala,
1080 .shvsatpa,
1081 .shvstvala,
1082 .shvstvecd,
1083 .ssstateen,
1084 }),
1085 };
949 result[@intFromEnum(Feature.shcounterenw)] = .{1086 result[@intFromEnum(Feature.shcounterenw)] = .{
950 .llvm_name = "shcounterenw",1087 .llvm_name = "shcounterenw",
951 .description = "'Shcounterenw' (Support writeable hcounteren enable bit for any hpmcounter that is not read-only zero)",1088 .description = "'Shcounterenw' (Support writeable hcounteren enable bit for any hpmcounter that is not read-only zero)",
...@@ -953,7 +1090,7 @@ pub const all_features = blk: {...@@ -953,7 +1090,7 @@ pub const all_features = blk: {
953 };1090 };
954 result[@intFromEnum(Feature.shgatpa)] = .{1091 result[@intFromEnum(Feature.shgatpa)] = .{
955 .llvm_name = "shgatpa",1092 .llvm_name = "shgatpa",
956 .description = "'Sgatpa' (SvNNx4 mode supported for all modes supported by satp, as well as Bare)",1093 .description = "'Shgatpa' (SvNNx4 mode supported for all modes supported by satp, as well as Bare)",
957 .dependencies = featureSet(&[_]Feature{}),1094 .dependencies = featureSet(&[_]Feature{}),
958 };1095 };
959 result[@intFromEnum(Feature.shifted_zextw_fusion)] = .{1096 result[@intFromEnum(Feature.shifted_zextw_fusion)] = .{
...@@ -973,7 +1110,7 @@ pub const all_features = blk: {...@@ -973,7 +1110,7 @@ pub const all_features = blk: {
973 };1110 };
974 result[@intFromEnum(Feature.shvsatpa)] = .{1111 result[@intFromEnum(Feature.shvsatpa)] = .{
975 .llvm_name = "shvsatpa",1112 .llvm_name = "shvsatpa",
976 .description = "'Svsatpa' (vsatp supports all modes supported by satp)",1113 .description = "'Shvsatpa' (vsatp supports all modes supported by satp)",
977 .dependencies = featureSet(&[_]Feature{}),1114 .dependencies = featureSet(&[_]Feature{}),
978 };1115 };
979 result[@intFromEnum(Feature.shvstvala)] = .{1116 result[@intFromEnum(Feature.shvstvala)] = .{
...@@ -1001,11 +1138,31 @@ pub const all_features = blk: {...@@ -1001,11 +1138,31 @@ pub const all_features = blk: {
1001 .description = "'Smcsrind' (Indirect CSR Access Machine Level)",1138 .description = "'Smcsrind' (Indirect CSR Access Machine Level)",
1002 .dependencies = featureSet(&[_]Feature{}),1139 .dependencies = featureSet(&[_]Feature{}),
1003 };1140 };
1141 result[@intFromEnum(Feature.smdbltrp)] = .{
1142 .llvm_name = "smdbltrp",
1143 .description = "'Smdbltrp' (Double Trap Machine Level)",
1144 .dependencies = featureSet(&[_]Feature{}),
1145 };
1004 result[@intFromEnum(Feature.smepmp)] = .{1146 result[@intFromEnum(Feature.smepmp)] = .{
1005 .llvm_name = "smepmp",1147 .llvm_name = "smepmp",
1006 .description = "'Smepmp' (Enhanced Physical Memory Protection)",1148 .description = "'Smepmp' (Enhanced Physical Memory Protection)",
1007 .dependencies = featureSet(&[_]Feature{}),1149 .dependencies = featureSet(&[_]Feature{}),
1008 };1150 };
1151 result[@intFromEnum(Feature.smmpm)] = .{
1152 .llvm_name = "smmpm",
1153 .description = "'Smmpm' (Machine-level Pointer Masking for M-mode)",
1154 .dependencies = featureSet(&[_]Feature{}),
1155 };
1156 result[@intFromEnum(Feature.smnpm)] = .{
1157 .llvm_name = "smnpm",
1158 .description = "'Smnpm' (Machine-level Pointer Masking for next lower privilege mode)",
1159 .dependencies = featureSet(&[_]Feature{}),
1160 };
1161 result[@intFromEnum(Feature.smrnmi)] = .{
1162 .llvm_name = "smrnmi",
1163 .description = "'Smrnmi' (Resumable Non-Maskable Interrupts)",
1164 .dependencies = featureSet(&[_]Feature{}),
1165 };
1009 result[@intFromEnum(Feature.smstateen)] = .{1166 result[@intFromEnum(Feature.smstateen)] = .{
1010 .llvm_name = "smstateen",1167 .llvm_name = "smstateen",
1011 .description = "'Smstateen' (Machine-mode view of the state-enable extension)",1168 .description = "'Smstateen' (Machine-mode view of the state-enable extension)",
...@@ -1041,6 +1198,26 @@ pub const all_features = blk: {...@@ -1041,6 +1198,26 @@ pub const all_features = blk: {
1041 .description = "'Sscsrind' (Indirect CSR Access Supervisor Level)",1198 .description = "'Sscsrind' (Indirect CSR Access Supervisor Level)",
1042 .dependencies = featureSet(&[_]Feature{}),1199 .dependencies = featureSet(&[_]Feature{}),
1043 };1200 };
1201 result[@intFromEnum(Feature.ssdbltrp)] = .{
1202 .llvm_name = "ssdbltrp",
1203 .description = "'Ssdbltrp' (Double Trap Supervisor Level)",
1204 .dependencies = featureSet(&[_]Feature{}),
1205 };
1206 result[@intFromEnum(Feature.ssnpm)] = .{
1207 .llvm_name = "ssnpm",
1208 .description = "'Ssnpm' (Supervisor-level Pointer Masking for next lower privilege mode)",
1209 .dependencies = featureSet(&[_]Feature{}),
1210 };
1211 result[@intFromEnum(Feature.sspm)] = .{
1212 .llvm_name = "sspm",
1213 .description = "'Sspm' (Indicates Supervisor-mode Pointer Masking)",
1214 .dependencies = featureSet(&[_]Feature{}),
1215 };
1216 result[@intFromEnum(Feature.ssqosid)] = .{
1217 .llvm_name = "ssqosid",
1218 .description = "'Ssqosid' (Quality-of-Service (QoS) Identifiers)",
1219 .dependencies = featureSet(&[_]Feature{}),
1220 };
1044 result[@intFromEnum(Feature.ssstateen)] = .{1221 result[@intFromEnum(Feature.ssstateen)] = .{
1045 .llvm_name = "ssstateen",1222 .llvm_name = "ssstateen",
1046 .description = "'Ssstateen' (Supervisor-mode view of the state-enable extension)",1223 .description = "'Ssstateen' (Supervisor-mode view of the state-enable extension)",
...@@ -1071,6 +1248,11 @@ pub const all_features = blk: {...@@ -1071,6 +1248,11 @@ pub const all_features = blk: {
1071 .description = "'Ssu64xl' (UXLEN=64 supported)",1248 .description = "'Ssu64xl' (UXLEN=64 supported)",
1072 .dependencies = featureSet(&[_]Feature{}),1249 .dependencies = featureSet(&[_]Feature{}),
1073 };1250 };
1251 result[@intFromEnum(Feature.supm)] = .{
1252 .llvm_name = "supm",
1253 .description = "'Supm' (Indicates User-mode Pointer Masking)",
1254 .dependencies = featureSet(&[_]Feature{}),
1255 };
1074 result[@intFromEnum(Feature.svade)] = .{1256 result[@intFromEnum(Feature.svade)] = .{
1075 .llvm_name = "svade",1257 .llvm_name = "svade",
1076 .description = "'Svade' (Raise exceptions on improper A/D bits)",1258 .description = "'Svade' (Raise exceptions on improper A/D bits)",
...@@ -1083,7 +1265,7 @@ pub const all_features = blk: {...@@ -1083,7 +1265,7 @@ pub const all_features = blk: {
1083 };1265 };
1084 result[@intFromEnum(Feature.svbare)] = .{1266 result[@intFromEnum(Feature.svbare)] = .{
1085 .llvm_name = "svbare",1267 .llvm_name = "svbare",
1086 .description = "'Svbare' $(satp mode Bare supported)",1268 .description = "'Svbare' (satp mode Bare supported)",
1087 .dependencies = featureSet(&[_]Feature{}),1269 .dependencies = featureSet(&[_]Feature{}),
1088 };1270 };
1089 result[@intFromEnum(Feature.svinval)] = .{1271 result[@intFromEnum(Feature.svinval)] = .{
...@@ -1101,6 +1283,11 @@ pub const all_features = blk: {...@@ -1101,6 +1283,11 @@ pub const all_features = blk: {
1101 .description = "'Svpbmt' (Page-Based Memory Types)",1283 .description = "'Svpbmt' (Page-Based Memory Types)",
1102 .dependencies = featureSet(&[_]Feature{}),1284 .dependencies = featureSet(&[_]Feature{}),
1103 };1285 };
1286 result[@intFromEnum(Feature.svvptc)] = .{
1287 .llvm_name = "svvptc",
1288 .description = "'Svvptc' (Obviating Memory-Management Instructions after Marking PTEs Valid)",
1289 .dependencies = featureSet(&[_]Feature{}),
1290 };
1104 result[@intFromEnum(Feature.tagged_globals)] = .{1291 result[@intFromEnum(Feature.tagged_globals)] = .{
1105 .llvm_name = "tagged-globals",1292 .llvm_name = "tagged-globals",
1106 .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits",1293 .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits",
...@@ -1134,6 +1321,11 @@ pub const all_features = blk: {...@@ -1134,6 +1321,11 @@ pub const all_features = blk: {
1134 .description = "Ventana Veyron-Series processors",1321 .description = "Ventana Veyron-Series processors",
1135 .dependencies = featureSet(&[_]Feature{}),1322 .dependencies = featureSet(&[_]Feature{}),
1136 };1323 };
1324 result[@intFromEnum(Feature.vxrm_pipeline_flush)] = .{
1325 .llvm_name = "vxrm-pipeline-flush",
1326 .description = "VXRM writes causes pipeline flush",
1327 .dependencies = featureSet(&[_]Feature{}),
1328 };
1137 result[@intFromEnum(Feature.xcvalu)] = .{1329 result[@intFromEnum(Feature.xcvalu)] = .{
1138 .llvm_name = "xcvalu",1330 .llvm_name = "xcvalu",
1139 .description = "'XCValu' (CORE-V ALU Operations)",1331 .description = "'XCValu' (CORE-V ALU Operations)",
...@@ -1169,6 +1361,16 @@ pub const all_features = blk: {...@@ -1169,6 +1361,16 @@ pub const all_features = blk: {
1169 .description = "'XCVsimd' (CORE-V SIMD ALU)",1361 .description = "'XCVsimd' (CORE-V SIMD ALU)",
1170 .dependencies = featureSet(&[_]Feature{}),1362 .dependencies = featureSet(&[_]Feature{}),
1171 };1363 };
1364 result[@intFromEnum(Feature.xmipscmove)] = .{
1365 .llvm_name = "xmipscmove",
1366 .description = "'XMIPSCMove' (MIPS conditional move instruction(s) (ccmov))",
1367 .dependencies = featureSet(&[_]Feature{}),
1368 };
1369 result[@intFromEnum(Feature.xmipslsp)] = .{
1370 .llvm_name = "xmipslsp",
1371 .description = "'XMIPSLSP' (MIPS optimization for hardware load-store bonding)",
1372 .dependencies = featureSet(&[_]Feature{}),
1373 };
1172 result[@intFromEnum(Feature.xsfcease)] = .{1374 result[@intFromEnum(Feature.xsfcease)] = .{
1173 .llvm_name = "xsfcease",1375 .llvm_name = "xsfcease",
1174 .description = "'XSfcease' (SiFive sf.cease Instruction)",1376 .description = "'XSfcease' (SiFive sf.cease Instruction)",
...@@ -1304,7 +1506,16 @@ pub const all_features = blk: {...@@ -1304,7 +1506,16 @@ pub const all_features = blk: {
1304 result[@intFromEnum(Feature.zabha)] = .{1506 result[@intFromEnum(Feature.zabha)] = .{
1305 .llvm_name = "zabha",1507 .llvm_name = "zabha",
1306 .description = "'Zabha' (Byte and Halfword Atomic Memory Operations)",1508 .description = "'Zabha' (Byte and Halfword Atomic Memory Operations)",
1307 .dependencies = featureSet(&[_]Feature{}),1509 .dependencies = featureSet(&[_]Feature{
1510 .zaamo,
1511 }),
1512 };
1513 result[@intFromEnum(Feature.zacas)] = .{
1514 .llvm_name = "zacas",
1515 .description = "'Zacas' (Atomic Compare-And-Swap Instructions)",
1516 .dependencies = featureSet(&[_]Feature{
1517 .zaamo,
1518 }),
1308 };1519 };
1309 result[@intFromEnum(Feature.zalrsc)] = .{1520 result[@intFromEnum(Feature.zalrsc)] = .{
1310 .llvm_name = "zalrsc",1521 .llvm_name = "zalrsc",
...@@ -1535,7 +1746,7 @@ pub const all_features = blk: {...@@ -1535,7 +1746,7 @@ pub const all_features = blk: {
1535 };1746 };
1536 result[@intFromEnum(Feature.zicsr)] = .{1747 result[@intFromEnum(Feature.zicsr)] = .{
1537 .llvm_name = "zicsr",1748 .llvm_name = "zicsr",
1538 .description = "'zicsr' (CSRs)",1749 .description = "'Zicsr' (CSRs)",
1539 .dependencies = featureSet(&[_]Feature{}),1750 .dependencies = featureSet(&[_]Feature{}),
1540 };1751 };
1541 result[@intFromEnum(Feature.zifencei)] = .{1752 result[@intFromEnum(Feature.zifencei)] = .{
...@@ -1652,7 +1863,9 @@ pub const all_features = blk: {...@@ -1652,7 +1863,9 @@ pub const all_features = blk: {
1652 result[@intFromEnum(Feature.zvbc)] = .{1863 result[@intFromEnum(Feature.zvbc)] = .{
1653 .llvm_name = "zvbc",1864 .llvm_name = "zvbc",
1654 .description = "'Zvbc' (Vector Carryless Multiplication)",1865 .description = "'Zvbc' (Vector Carryless Multiplication)",
1655 .dependencies = featureSet(&[_]Feature{}),1866 .dependencies = featureSet(&[_]Feature{
1867 .zve64x,
1868 }),
1656 };1869 };
1657 result[@intFromEnum(Feature.zve32f)] = .{1870 result[@intFromEnum(Feature.zve32f)] = .{
1658 .llvm_name = "zve32f",1871 .llvm_name = "zve32f",
...@@ -1696,7 +1909,7 @@ pub const all_features = blk: {...@@ -1696,7 +1909,7 @@ pub const all_features = blk: {
1696 };1909 };
1697 result[@intFromEnum(Feature.zvfbfmin)] = .{1910 result[@intFromEnum(Feature.zvfbfmin)] = .{
1698 .llvm_name = "zvfbfmin",1911 .llvm_name = "zvfbfmin",
1699 .description = "'Zvbfmin' (Vector BF16 Converts)",1912 .description = "'Zvfbfmin' (Vector BF16 Converts)",
1700 .dependencies = featureSet(&[_]Feature{1913 .dependencies = featureSet(&[_]Feature{
1701 .zve32f,1914 .zve32f,
1702 }),1915 }),
...@@ -1727,12 +1940,16 @@ pub const all_features = blk: {...@@ -1727,12 +1940,16 @@ pub const all_features = blk: {
1727 result[@intFromEnum(Feature.zvkb)] = .{1940 result[@intFromEnum(Feature.zvkb)] = .{
1728 .llvm_name = "zvkb",1941 .llvm_name = "zvkb",
1729 .description = "'Zvkb' (Vector Bit-manipulation used in Cryptography)",1942 .description = "'Zvkb' (Vector Bit-manipulation used in Cryptography)",
1730 .dependencies = featureSet(&[_]Feature{}),1943 .dependencies = featureSet(&[_]Feature{
1944 .zve32x,
1945 }),
1731 };1946 };
1732 result[@intFromEnum(Feature.zvkg)] = .{1947 result[@intFromEnum(Feature.zvkg)] = .{
1733 .llvm_name = "zvkg",1948 .llvm_name = "zvkg",
1734 .description = "'Zvkg' (Vector GCM instructions for Cryptography)",1949 .description = "'Zvkg' (Vector GCM instructions for Cryptography)",
1735 .dependencies = featureSet(&[_]Feature{}),1950 .dependencies = featureSet(&[_]Feature{
1951 .zve32x,
1952 }),
1736 };1953 };
1737 result[@intFromEnum(Feature.zvkn)] = .{1954 result[@intFromEnum(Feature.zvkn)] = .{
1738 .llvm_name = "zvkn",1955 .llvm_name = "zvkn",
...@@ -1755,11 +1972,13 @@ pub const all_features = blk: {...@@ -1755,11 +1972,13 @@ pub const all_features = blk: {
1755 result[@intFromEnum(Feature.zvkned)] = .{1972 result[@intFromEnum(Feature.zvkned)] = .{
1756 .llvm_name = "zvkned",1973 .llvm_name = "zvkned",
1757 .description = "'Zvkned' (Vector AES Encryption & Decryption (Single Round))",1974 .description = "'Zvkned' (Vector AES Encryption & Decryption (Single Round))",
1758 .dependencies = featureSet(&[_]Feature{}),1975 .dependencies = featureSet(&[_]Feature{
1976 .zve32x,
1977 }),
1759 };1978 };
1760 result[@intFromEnum(Feature.zvkng)] = .{1979 result[@intFromEnum(Feature.zvkng)] = .{
1761 .llvm_name = "zvkng",1980 .llvm_name = "zvkng",
1762 .description = "'zvkng' (shorthand for 'Zvkn' and 'Zvkg')",1981 .description = "'Zvkng' (shorthand for 'Zvkn' and 'Zvkg')",
1763 .dependencies = featureSet(&[_]Feature{1982 .dependencies = featureSet(&[_]Feature{
1764 .zvkg,1983 .zvkg,
1765 .zvkn,1984 .zvkn,
...@@ -1768,7 +1987,9 @@ pub const all_features = blk: {...@@ -1768,7 +1987,9 @@ pub const all_features = blk: {
1768 result[@intFromEnum(Feature.zvknha)] = .{1987 result[@intFromEnum(Feature.zvknha)] = .{
1769 .llvm_name = "zvknha",1988 .llvm_name = "zvknha",
1770 .description = "'Zvknha' (Vector SHA-2 (SHA-256 only))",1989 .description = "'Zvknha' (Vector SHA-2 (SHA-256 only))",
1771 .dependencies = featureSet(&[_]Feature{}),1990 .dependencies = featureSet(&[_]Feature{
1991 .zve32x,
1992 }),
1772 };1993 };
1773 result[@intFromEnum(Feature.zvknhb)] = .{1994 result[@intFromEnum(Feature.zvknhb)] = .{
1774 .llvm_name = "zvknhb",1995 .llvm_name = "zvknhb",
...@@ -1798,7 +2019,9 @@ pub const all_features = blk: {...@@ -1798,7 +2019,9 @@ pub const all_features = blk: {
1798 result[@intFromEnum(Feature.zvksed)] = .{2019 result[@intFromEnum(Feature.zvksed)] = .{
1799 .llvm_name = "zvksed",2020 .llvm_name = "zvksed",
1800 .description = "'Zvksed' (SM4 Block Cipher Instructions)",2021 .description = "'Zvksed' (SM4 Block Cipher Instructions)",
1801 .dependencies = featureSet(&[_]Feature{}),2022 .dependencies = featureSet(&[_]Feature{
2023 .zve32x,
2024 }),
1802 };2025 };
1803 result[@intFromEnum(Feature.zvksg)] = .{2026 result[@intFromEnum(Feature.zvksg)] = .{
1804 .llvm_name = "zvksg",2027 .llvm_name = "zvksg",
...@@ -1811,7 +2034,9 @@ pub const all_features = blk: {...@@ -1811,7 +2034,9 @@ pub const all_features = blk: {
1811 result[@intFromEnum(Feature.zvksh)] = .{2034 result[@intFromEnum(Feature.zvksh)] = .{
1812 .llvm_name = "zvksh",2035 .llvm_name = "zvksh",
1813 .description = "'Zvksh' (SM3 Hash Function Instructions)",2036 .description = "'Zvksh' (SM3 Hash Function Instructions)",
1814 .dependencies = featureSet(&[_]Feature{}),2037 .dependencies = featureSet(&[_]Feature{
2038 .zve32x,
2039 }),
1815 };2040 };
1816 result[@intFromEnum(Feature.zvkt)] = .{2041 result[@intFromEnum(Feature.zvkt)] = .{
1817 .llvm_name = "zvkt",2042 .llvm_name = "zvkt",
...@@ -1820,82 +2045,82 @@ pub const all_features = blk: {...@@ -1820,82 +2045,82 @@ pub const all_features = blk: {
1820 };2045 };
1821 result[@intFromEnum(Feature.zvl1024b)] = .{2046 result[@intFromEnum(Feature.zvl1024b)] = .{
1822 .llvm_name = "zvl1024b",2047 .llvm_name = "zvl1024b",
1823 .description = "'Zvl' (Minimum Vector Length) 1024",2048 .description = "'Zvl1024b' (Minimum Vector Length 1024)",
1824 .dependencies = featureSet(&[_]Feature{2049 .dependencies = featureSet(&[_]Feature{
1825 .zvl512b,2050 .zvl512b,
1826 }),2051 }),
1827 };2052 };
1828 result[@intFromEnum(Feature.zvl128b)] = .{2053 result[@intFromEnum(Feature.zvl128b)] = .{
1829 .llvm_name = "zvl128b",2054 .llvm_name = "zvl128b",
1830 .description = "'Zvl' (Minimum Vector Length) 128",2055 .description = "'Zvl128b' (Minimum Vector Length 128)",
1831 .dependencies = featureSet(&[_]Feature{2056 .dependencies = featureSet(&[_]Feature{
1832 .zvl64b,2057 .zvl64b,
1833 }),2058 }),
1834 };2059 };
1835 result[@intFromEnum(Feature.zvl16384b)] = .{2060 result[@intFromEnum(Feature.zvl16384b)] = .{
1836 .llvm_name = "zvl16384b",2061 .llvm_name = "zvl16384b",
1837 .description = "'Zvl' (Minimum Vector Length) 16384",2062 .description = "'Zvl16384b' (Minimum Vector Length 16384)",
1838 .dependencies = featureSet(&[_]Feature{2063 .dependencies = featureSet(&[_]Feature{
1839 .zvl8192b,2064 .zvl8192b,
1840 }),2065 }),
1841 };2066 };
1842 result[@intFromEnum(Feature.zvl2048b)] = .{2067 result[@intFromEnum(Feature.zvl2048b)] = .{
1843 .llvm_name = "zvl2048b",2068 .llvm_name = "zvl2048b",
1844 .description = "'Zvl' (Minimum Vector Length) 2048",2069 .description = "'Zvl2048b' (Minimum Vector Length 2048)",
1845 .dependencies = featureSet(&[_]Feature{2070 .dependencies = featureSet(&[_]Feature{
1846 .zvl1024b,2071 .zvl1024b,
1847 }),2072 }),
1848 };2073 };
1849 result[@intFromEnum(Feature.zvl256b)] = .{2074 result[@intFromEnum(Feature.zvl256b)] = .{
1850 .llvm_name = "zvl256b",2075 .llvm_name = "zvl256b",
1851 .description = "'Zvl' (Minimum Vector Length) 256",2076 .description = "'Zvl256b' (Minimum Vector Length 256)",
1852 .dependencies = featureSet(&[_]Feature{2077 .dependencies = featureSet(&[_]Feature{
1853 .zvl128b,2078 .zvl128b,
1854 }),2079 }),
1855 };2080 };
1856 result[@intFromEnum(Feature.zvl32768b)] = .{2081 result[@intFromEnum(Feature.zvl32768b)] = .{
1857 .llvm_name = "zvl32768b",2082 .llvm_name = "zvl32768b",
1858 .description = "'Zvl' (Minimum Vector Length) 32768",2083 .description = "'Zvl32768b' (Minimum Vector Length 32768)",
1859 .dependencies = featureSet(&[_]Feature{2084 .dependencies = featureSet(&[_]Feature{
1860 .zvl16384b,2085 .zvl16384b,
1861 }),2086 }),
1862 };2087 };
1863 result[@intFromEnum(Feature.zvl32b)] = .{2088 result[@intFromEnum(Feature.zvl32b)] = .{
1864 .llvm_name = "zvl32b",2089 .llvm_name = "zvl32b",
1865 .description = "'Zvl' (Minimum Vector Length) 32",2090 .description = "'Zvl32b' (Minimum Vector Length 32)",
1866 .dependencies = featureSet(&[_]Feature{}),2091 .dependencies = featureSet(&[_]Feature{}),
1867 };2092 };
1868 result[@intFromEnum(Feature.zvl4096b)] = .{2093 result[@intFromEnum(Feature.zvl4096b)] = .{
1869 .llvm_name = "zvl4096b",2094 .llvm_name = "zvl4096b",
1870 .description = "'Zvl' (Minimum Vector Length) 4096",2095 .description = "'Zvl4096b' (Minimum Vector Length 4096)",
1871 .dependencies = featureSet(&[_]Feature{2096 .dependencies = featureSet(&[_]Feature{
1872 .zvl2048b,2097 .zvl2048b,
1873 }),2098 }),
1874 };2099 };
1875 result[@intFromEnum(Feature.zvl512b)] = .{2100 result[@intFromEnum(Feature.zvl512b)] = .{
1876 .llvm_name = "zvl512b",2101 .llvm_name = "zvl512b",
1877 .description = "'Zvl' (Minimum Vector Length) 512",2102 .description = "'Zvl512b' (Minimum Vector Length 512)",
1878 .dependencies = featureSet(&[_]Feature{2103 .dependencies = featureSet(&[_]Feature{
1879 .zvl256b,2104 .zvl256b,
1880 }),2105 }),
1881 };2106 };
1882 result[@intFromEnum(Feature.zvl64b)] = .{2107 result[@intFromEnum(Feature.zvl64b)] = .{
1883 .llvm_name = "zvl64b",2108 .llvm_name = "zvl64b",
1884 .description = "'Zvl' (Minimum Vector Length) 64",2109 .description = "'Zvl64b' (Minimum Vector Length 64)",
1885 .dependencies = featureSet(&[_]Feature{2110 .dependencies = featureSet(&[_]Feature{
1886 .zvl32b,2111 .zvl32b,
1887 }),2112 }),
1888 };2113 };
1889 result[@intFromEnum(Feature.zvl65536b)] = .{2114 result[@intFromEnum(Feature.zvl65536b)] = .{
1890 .llvm_name = "zvl65536b",2115 .llvm_name = "zvl65536b",
1891 .description = "'Zvl' (Minimum Vector Length) 65536",2116 .description = "'Zvl65536b' (Minimum Vector Length 65536)",
1892 .dependencies = featureSet(&[_]Feature{2117 .dependencies = featureSet(&[_]Feature{
1893 .zvl32768b,2118 .zvl32768b,
1894 }),2119 }),
1895 };2120 };
1896 result[@intFromEnum(Feature.zvl8192b)] = .{2121 result[@intFromEnum(Feature.zvl8192b)] = .{
1897 .llvm_name = "zvl8192b",2122 .llvm_name = "zvl8192b",
1898 .description = "'Zvl' (Minimum Vector Length) 8192",2123 .description = "'Zvl8192b' (Minimum Vector Length 8192)",
1899 .dependencies = featureSet(&[_]Feature{2124 .dependencies = featureSet(&[_]Feature{
1900 .zvl4096b,2125 .zvl4096b,
1901 }),2126 }),
...@@ -1944,6 +2169,7 @@ pub const cpu = struct {...@@ -1944,6 +2169,7 @@ pub const cpu = struct {
1944 .features = featureSet(&[_]Feature{2169 .features = featureSet(&[_]Feature{
1945 .@"32bit",2170 .@"32bit",
1946 .i,2171 .i,
2172 .optimized_nf2_segment_load_store,
1947 }),2173 }),
1948 };2174 };
1949 pub const generic_rv64: CpuModel = .{2175 pub const generic_rv64: CpuModel = .{
...@@ -1952,6 +2178,25 @@ pub const cpu = struct {...@@ -1952,6 +2178,25 @@ pub const cpu = struct {
1952 .features = featureSet(&[_]Feature{2178 .features = featureSet(&[_]Feature{
1953 .@"64bit",2179 .@"64bit",
1954 .i,2180 .i,
2181 .optimized_nf2_segment_load_store,
2182 }),
2183 };
2184 pub const mips_p8700: CpuModel = .{
2185 .name = "mips_p8700",
2186 .llvm_name = "mips-p8700",
2187 .features = featureSet(&[_]Feature{
2188 .@"64bit",
2189 .a,
2190 .c,
2191 .d,
2192 .i,
2193 .m,
2194 .mips_p8700,
2195 .xmipscmove,
2196 .xmipslsp,
2197 .zba,
2198 .zbb,
2199 .zifencei,
1955 }),2200 }),
1956 };2201 };
1957 pub const rocket: CpuModel = .{2202 pub const rocket: CpuModel = .{
...@@ -1979,6 +2224,25 @@ pub const cpu = struct {...@@ -1979,6 +2224,25 @@ pub const cpu = struct {
1979 .zifencei,2224 .zifencei,
1980 }),2225 }),
1981 };2226 };
2227 pub const rp2350_hazard3: CpuModel = .{
2228 .name = "rp2350_hazard3",
2229 .llvm_name = "rp2350-hazard3",
2230 .features = featureSet(&[_]Feature{
2231 .@"32bit",
2232 .a,
2233 .c,
2234 .i,
2235 .m,
2236 .zba,
2237 .zbb,
2238 .zbkb,
2239 .zbs,
2240 .zcb,
2241 .zcmp,
2242 .zicsr,
2243 .zifencei,
2244 }),
2245 };
1982 pub const sifive_7_series: CpuModel = .{2246 pub const sifive_7_series: CpuModel = .{
1983 .name = "sifive_7_series",2247 .name = "sifive_7_series",
1984 .llvm_name = "sifive-7-series",2248 .llvm_name = "sifive-7-series",
...@@ -2075,6 +2339,7 @@ pub const cpu = struct {...@@ -2075,6 +2339,7 @@ pub const cpu = struct {
2075 .@"64bit",2339 .@"64bit",
2076 .a,2340 .a,
2077 .auipc_addi_fusion,2341 .auipc_addi_fusion,
2342 .b,
2078 .c,2343 .c,
2079 .conditional_cmv_fusion,2344 .conditional_cmv_fusion,
2080 .d,2345 .d,
...@@ -2086,9 +2351,6 @@ pub const cpu = struct {...@@ -2086,9 +2351,6 @@ pub const cpu = struct {
2086 .unaligned_vector_mem,2351 .unaligned_vector_mem,
2087 .use_postra_scheduler,2352 .use_postra_scheduler,
2088 .za64rs,2353 .za64rs,
2089 .zba,
2090 .zbb,
2091 .zbs,
2092 .zfhmin,2354 .zfhmin,
2093 .zic64b,2355 .zic64b,
2094 .zicbom,2356 .zicbom,
...@@ -2098,10 +2360,77 @@ pub const cpu = struct {...@@ -2098,10 +2360,77 @@ pub const cpu = struct {
2098 .ziccif,2360 .ziccif,
2099 .zicclsm,2361 .zicclsm,
2100 .ziccrse,2362 .ziccrse,
2363 .zicntr,
2364 .zifencei,
2365 .zihintntl,
2366 .zihintpause,
2367 .zihpm,
2368 .zkt,
2369 }),
2370 };
2371 pub const sifive_p470: CpuModel = .{
2372 .name = "sifive_p470",
2373 .llvm_name = "sifive-p470",
2374 .features = featureSet(&[_]Feature{
2375 .@"64bit",
2376 .a,
2377 .auipc_addi_fusion,
2378 .b,
2379 .c,
2380 .conditional_cmv_fusion,
2381 .i,
2382 .lui_addi_fusion,
2383 .m,
2384 .no_default_unroll,
2385 .no_sink_splat_operands,
2386 .unaligned_scalar_mem,
2387 .unaligned_vector_mem,
2388 .use_postra_scheduler,
2389 .v,
2390 .vxrm_pipeline_flush,
2391 .xsifivecdiscarddlone,
2392 .xsifivecflushdlone,
2393 .za64rs,
2394 .zfhmin,
2395 .zic64b,
2396 .zicbom,
2397 .zicbop,
2398 .zicboz,
2399 .ziccamoa,
2400 .ziccif,
2401 .zicclsm,
2402 .ziccrse,
2403 .zicntr,
2101 .zifencei,2404 .zifencei,
2102 .zihintntl,2405 .zihintntl,
2103 .zihintpause,2406 .zihintpause,
2104 .zihpm,2407 .zihpm,
2408 .zkt,
2409 .zvbb,
2410 .zvknc,
2411 .zvkng,
2412 .zvksc,
2413 .zvksg,
2414 }),
2415 };
2416 pub const sifive_p550: CpuModel = .{
2417 .name = "sifive_p550",
2418 .llvm_name = "sifive-p550",
2419 .features = featureSet(&[_]Feature{
2420 .@"64bit",
2421 .a,
2422 .auipc_addi_fusion,
2423 .c,
2424 .conditional_cmv_fusion,
2425 .d,
2426 .i,
2427 .lui_addi_fusion,
2428 .m,
2429 .no_default_unroll,
2430 .use_postra_scheduler,
2431 .zba,
2432 .zbb,
2433 .zifencei,
2105 }),2434 }),
2106 };2435 };
2107 pub const sifive_p670: CpuModel = .{2436 pub const sifive_p670: CpuModel = .{
...@@ -2111,6 +2440,7 @@ pub const cpu = struct {...@@ -2111,6 +2440,7 @@ pub const cpu = struct {
2111 .@"64bit",2440 .@"64bit",
2112 .a,2441 .a,
2113 .auipc_addi_fusion,2442 .auipc_addi_fusion,
2443 .b,
2114 .c,2444 .c,
2115 .conditional_cmv_fusion,2445 .conditional_cmv_fusion,
2116 .i,2446 .i,
...@@ -2122,10 +2452,8 @@ pub const cpu = struct {...@@ -2122,10 +2452,8 @@ pub const cpu = struct {
2122 .unaligned_vector_mem,2452 .unaligned_vector_mem,
2123 .use_postra_scheduler,2453 .use_postra_scheduler,
2124 .v,2454 .v,
2455 .vxrm_pipeline_flush,
2125 .za64rs,2456 .za64rs,
2126 .zba,
2127 .zbb,
2128 .zbs,
2129 .zfhmin,2457 .zfhmin,
2130 .zic64b,2458 .zic64b,
2131 .zicbom,2459 .zicbom,
...@@ -2135,10 +2463,12 @@ pub const cpu = struct {...@@ -2135,10 +2463,12 @@ pub const cpu = struct {
2135 .ziccif,2463 .ziccif,
2136 .zicclsm,2464 .zicclsm,
2137 .ziccrse,2465 .ziccrse,
2466 .zicntr,
2138 .zifencei,2467 .zifencei,
2139 .zihintntl,2468 .zihintntl,
2140 .zihintpause,2469 .zihintpause,
2141 .zihpm,2470 .zihpm,
2471 .zkt,
2142 .zvbb,2472 .zvbb,
2143 .zvknc,2473 .zvknc,
2144 .zvkng,2474 .zvkng,
...@@ -2242,6 +2572,7 @@ pub const cpu = struct {...@@ -2242,6 +2572,7 @@ pub const cpu = struct {
2242 .i,2572 .i,
2243 .m,2573 .m,
2244 .no_default_unroll,2574 .no_default_unroll,
2575 .optimized_nf2_segment_load_store,
2245 .optimized_zero_stride_load,2576 .optimized_zero_stride_load,
2246 .short_forward_branch_opt,2577 .short_forward_branch_opt,
2247 .use_postra_scheduler,2578 .use_postra_scheduler,
...@@ -2260,10 +2591,14 @@ pub const cpu = struct {...@@ -2260,10 +2591,14 @@ pub const cpu = struct {
2260 .features = featureSet(&[_]Feature{2591 .features = featureSet(&[_]Feature{
2261 .@"64bit",2592 .@"64bit",
2262 .a,2593 .a,
2594 .b,
2263 .c,2595 .c,
2264 .dlen_factor_2,2596 .dlen_factor_2,
2265 .i,2597 .i,
2266 .m,2598 .m,
2599 .optimized_nf2_segment_load_store,
2600 .optimized_nf3_segment_load_store,
2601 .optimized_nf4_segment_load_store,
2267 .ssccptr,2602 .ssccptr,
2268 .sscofpmf,2603 .sscofpmf,
2269 .sscounterenw,2604 .sscounterenw,
...@@ -2275,13 +2610,12 @@ pub const cpu = struct {...@@ -2275,13 +2610,12 @@ pub const cpu = struct {
2275 .svinval,2610 .svinval,
2276 .svnapot,2611 .svnapot,
2277 .svpbmt,2612 .svpbmt,
2613 .unaligned_scalar_mem,
2278 .v,2614 .v,
2615 .vxrm_pipeline_flush,
2279 .za64rs,2616 .za64rs,
2280 .zba,
2281 .zbb,
2282 .zbc,2617 .zbc,
2283 .zbkc,2618 .zbkc,
2284 .zbs,
2285 .zfh,2619 .zfh,
2286 .zic64b,2620 .zic64b,
2287 .zicbom,2621 .zicbom,
...@@ -2356,6 +2690,149 @@ pub const cpu = struct {...@@ -2356,6 +2690,149 @@ pub const cpu = struct {
2356 .zifencei,2690 .zifencei,
2357 }),2691 }),
2358 };2692 };
2693 pub const syntacore_scr4_rv32: CpuModel = .{
2694 .name = "syntacore_scr4_rv32",
2695 .llvm_name = "syntacore-scr4-rv32",
2696 .features = featureSet(&[_]Feature{
2697 .@"32bit",
2698 .c,
2699 .d,
2700 .i,
2701 .m,
2702 .no_default_unroll,
2703 .use_postra_scheduler,
2704 .zifencei,
2705 }),
2706 };
2707 pub const syntacore_scr4_rv64: CpuModel = .{
2708 .name = "syntacore_scr4_rv64",
2709 .llvm_name = "syntacore-scr4-rv64",
2710 .features = featureSet(&[_]Feature{
2711 .@"64bit",
2712 .a,
2713 .c,
2714 .d,
2715 .i,
2716 .m,
2717 .no_default_unroll,
2718 .use_postra_scheduler,
2719 .zifencei,
2720 }),
2721 };
2722 pub const syntacore_scr5_rv32: CpuModel = .{
2723 .name = "syntacore_scr5_rv32",
2724 .llvm_name = "syntacore-scr5-rv32",
2725 .features = featureSet(&[_]Feature{
2726 .@"32bit",
2727 .a,
2728 .c,
2729 .d,
2730 .i,
2731 .m,
2732 .no_default_unroll,
2733 .use_postra_scheduler,
2734 .zifencei,
2735 }),
2736 };
2737 pub const syntacore_scr5_rv64: CpuModel = .{
2738 .name = "syntacore_scr5_rv64",
2739 .llvm_name = "syntacore-scr5-rv64",
2740 .features = featureSet(&[_]Feature{
2741 .@"64bit",
2742 .a,
2743 .c,
2744 .d,
2745 .i,
2746 .m,
2747 .no_default_unroll,
2748 .use_postra_scheduler,
2749 .zifencei,
2750 }),
2751 };
2752 pub const syntacore_scr7: CpuModel = .{
2753 .name = "syntacore_scr7",
2754 .llvm_name = "syntacore-scr7",
2755 .features = featureSet(&[_]Feature{
2756 .@"64bit",
2757 .a,
2758 .c,
2759 .i,
2760 .m,
2761 .no_default_unroll,
2762 .use_postra_scheduler,
2763 .v,
2764 .zba,
2765 .zbb,
2766 .zbc,
2767 .zbs,
2768 .zifencei,
2769 .zkn,
2770 }),
2771 };
2772 pub const tt_ascalon_d8: CpuModel = .{
2773 .name = "tt_ascalon_d8",
2774 .llvm_name = "tt-ascalon-d8",
2775 .features = featureSet(&[_]Feature{
2776 .@"64bit",
2777 .a,
2778 .b,
2779 .c,
2780 .i,
2781 .m,
2782 .no_default_unroll,
2783 .optimized_zero_stride_load,
2784 .sha,
2785 .smaia,
2786 .ssaia,
2787 .ssccptr,
2788 .sscofpmf,
2789 .sscounterenw,
2790 .ssnpm,
2791 .ssstrict,
2792 .sstc,
2793 .sstvala,
2794 .sstvecd,
2795 .ssu64xl,
2796 .supm,
2797 .svade,
2798 .svbare,
2799 .svinval,
2800 .svnapot,
2801 .svpbmt,
2802 .unaligned_scalar_mem,
2803 .unaligned_vector_mem,
2804 .use_postra_scheduler,
2805 .v,
2806 .za64rs,
2807 .zawrs,
2808 .zcb,
2809 .zcmop,
2810 .zfa,
2811 .zfh,
2812 .zic64b,
2813 .zicbom,
2814 .zicbop,
2815 .zicboz,
2816 .ziccamoa,
2817 .ziccif,
2818 .zicclsm,
2819 .ziccrse,
2820 .zicntr,
2821 .zicond,
2822 .zifencei,
2823 .zihintntl,
2824 .zihintpause,
2825 .zihpm,
2826 .zimop,
2827 .zkt,
2828 .zvbb,
2829 .zvbc,
2830 .zvfbfwma,
2831 .zvfh,
2832 .zvkng,
2833 .zvl256b,
2834 }),
2835 };
2359 pub const veyron_v1: CpuModel = .{2836 pub const veyron_v1: CpuModel = .{
2360 .name = "veyron_v1",2837 .name = "veyron_v1",
2361 .llvm_name = "veyron-v1",2838 .llvm_name = "veyron-v1",
lib/std/Target/s390x.zig+82
...@@ -7,6 +7,7 @@ const CpuModel = std.Target.Cpu.Model;...@@ -7,6 +7,7 @@ const CpuModel = std.Target.Cpu.Model;
7pub const Feature = enum {7pub const Feature = enum {
8 backchain,8 backchain,
9 bear_enhancement,9 bear_enhancement,
10 concurrent_functions,
10 deflate_conversion,11 deflate_conversion,
11 dfp_packed_conversion,12 dfp_packed_conversion,
12 dfp_zoned_conversion,13 dfp_zoned_conversion,
...@@ -24,6 +25,7 @@ pub const Feature = enum {...@@ -24,6 +25,7 @@ pub const Feature = enum {
24 load_and_zero_rightmost_byte,25 load_and_zero_rightmost_byte,
25 load_store_on_cond,26 load_store_on_cond,
26 load_store_on_cond_2,27 load_store_on_cond_2,
28 message_security_assist_extension12,
27 message_security_assist_extension3,29 message_security_assist_extension3,
28 message_security_assist_extension4,30 message_security_assist_extension4,
29 message_security_assist_extension5,31 message_security_assist_extension5,
...@@ -33,6 +35,7 @@ pub const Feature = enum {...@@ -33,6 +35,7 @@ pub const Feature = enum {
33 miscellaneous_extensions,35 miscellaneous_extensions,
34 miscellaneous_extensions_2,36 miscellaneous_extensions_2,
35 miscellaneous_extensions_3,37 miscellaneous_extensions_3,
38 miscellaneous_extensions_4,
36 nnp_assist,39 nnp_assist,
37 population_count,40 population_count,
38 processor_activity_instrumentation,41 processor_activity_instrumentation,
...@@ -46,9 +49,11 @@ pub const Feature = enum {...@@ -46,9 +49,11 @@ pub const Feature = enum {
46 vector,49 vector,
47 vector_enhancements_1,50 vector_enhancements_1,
48 vector_enhancements_2,51 vector_enhancements_2,
52 vector_enhancements_3,
49 vector_packed_decimal,53 vector_packed_decimal,
50 vector_packed_decimal_enhancement,54 vector_packed_decimal_enhancement,
51 vector_packed_decimal_enhancement_2,55 vector_packed_decimal_enhancement_2,
56 vector_packed_decimal_enhancement_3,
52};57};
5358
54pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet;59pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet;
...@@ -70,6 +75,11 @@ pub const all_features = blk: {...@@ -70,6 +75,11 @@ pub const all_features = blk: {
70 .description = "Assume that the BEAR-enhancement facility is installed",75 .description = "Assume that the BEAR-enhancement facility is installed",
71 .dependencies = featureSet(&[_]Feature{}),76 .dependencies = featureSet(&[_]Feature{}),
72 };77 };
78 result[@intFromEnum(Feature.concurrent_functions)] = .{
79 .llvm_name = "concurrent-functions",
80 .description = "Assume that the concurrent-functions facility is installed",
81 .dependencies = featureSet(&[_]Feature{}),
82 };
73 result[@intFromEnum(Feature.deflate_conversion)] = .{83 result[@intFromEnum(Feature.deflate_conversion)] = .{
74 .llvm_name = "deflate-conversion",84 .llvm_name = "deflate-conversion",
75 .description = "Assume that the deflate-conversion facility is installed",85 .description = "Assume that the deflate-conversion facility is installed",
...@@ -155,6 +165,11 @@ pub const all_features = blk: {...@@ -155,6 +165,11 @@ pub const all_features = blk: {
155 .description = "Assume that the load/store-on-condition facility 2 is installed",165 .description = "Assume that the load/store-on-condition facility 2 is installed",
156 .dependencies = featureSet(&[_]Feature{}),166 .dependencies = featureSet(&[_]Feature{}),
157 };167 };
168 result[@intFromEnum(Feature.message_security_assist_extension12)] = .{
169 .llvm_name = "message-security-assist-extension12",
170 .description = "Assume that the message-security-assist extension facility 12 is installed",
171 .dependencies = featureSet(&[_]Feature{}),
172 };
158 result[@intFromEnum(Feature.message_security_assist_extension3)] = .{173 result[@intFromEnum(Feature.message_security_assist_extension3)] = .{
159 .llvm_name = "message-security-assist-extension3",174 .llvm_name = "message-security-assist-extension3",
160 .description = "Assume that the message-security-assist extension facility 3 is installed",175 .description = "Assume that the message-security-assist extension facility 3 is installed",
...@@ -200,6 +215,11 @@ pub const all_features = blk: {...@@ -200,6 +215,11 @@ pub const all_features = blk: {
200 .description = "Assume that the miscellaneous-extensions facility 3 is installed",215 .description = "Assume that the miscellaneous-extensions facility 3 is installed",
201 .dependencies = featureSet(&[_]Feature{}),216 .dependencies = featureSet(&[_]Feature{}),
202 };217 };
218 result[@intFromEnum(Feature.miscellaneous_extensions_4)] = .{
219 .llvm_name = "miscellaneous-extensions-4",
220 .description = "Assume that the miscellaneous-extensions facility 4 is installed",
221 .dependencies = featureSet(&[_]Feature{}),
222 };
203 result[@intFromEnum(Feature.nnp_assist)] = .{223 result[@intFromEnum(Feature.nnp_assist)] = .{
204 .llvm_name = "nnp-assist",224 .llvm_name = "nnp-assist",
205 .description = "Assume that the NNP-assist facility is installed",225 .description = "Assume that the NNP-assist facility is installed",
...@@ -265,6 +285,11 @@ pub const all_features = blk: {...@@ -265,6 +285,11 @@ pub const all_features = blk: {
265 .description = "Assume that the vector enhancements facility 2 is installed",285 .description = "Assume that the vector enhancements facility 2 is installed",
266 .dependencies = featureSet(&[_]Feature{}),286 .dependencies = featureSet(&[_]Feature{}),
267 };287 };
288 result[@intFromEnum(Feature.vector_enhancements_3)] = .{
289 .llvm_name = "vector-enhancements-3",
290 .description = "Assume that the vector enhancements facility 3 is installed",
291 .dependencies = featureSet(&[_]Feature{}),
292 };
268 result[@intFromEnum(Feature.vector_packed_decimal)] = .{293 result[@intFromEnum(Feature.vector_packed_decimal)] = .{
269 .llvm_name = "vector-packed-decimal",294 .llvm_name = "vector-packed-decimal",
270 .description = "Assume that the vector packed decimal facility is installed",295 .description = "Assume that the vector packed decimal facility is installed",
...@@ -280,6 +305,11 @@ pub const all_features = blk: {...@@ -280,6 +305,11 @@ pub const all_features = blk: {
280 .description = "Assume that the vector packed decimal enhancement facility 2 is installed",305 .description = "Assume that the vector packed decimal enhancement facility 2 is installed",
281 .dependencies = featureSet(&[_]Feature{}),306 .dependencies = featureSet(&[_]Feature{}),
282 };307 };
308 result[@intFromEnum(Feature.vector_packed_decimal_enhancement_3)] = .{
309 .llvm_name = "vector-packed-decimal-enhancement-3",
310 .description = "Assume that the vector packed decimal enhancement facility 3 is installed",
311 .dependencies = featureSet(&[_]Feature{}),
312 };
283 const ti = @typeInfo(Feature);313 const ti = @typeInfo(Feature);
284 for (&result, 0..) |*elem, i| {314 for (&result, 0..) |*elem, i| {
285 elem.index = i;315 elem.index = i;
...@@ -465,6 +495,58 @@ pub const cpu = struct {...@@ -465,6 +495,58 @@ pub const cpu = struct {
465 .vector_packed_decimal_enhancement_2,495 .vector_packed_decimal_enhancement_2,
466 }),496 }),
467 };497 };
498 pub const arch15: CpuModel = .{
499 .name = "arch15",
500 .llvm_name = "arch15",
501 .features = featureSet(&[_]Feature{
502 .bear_enhancement,
503 .concurrent_functions,
504 .deflate_conversion,
505 .dfp_packed_conversion,
506 .dfp_zoned_conversion,
507 .distinct_ops,
508 .enhanced_dat_2,
509 .enhanced_sort,
510 .execution_hint,
511 .fast_serialization,
512 .fp_extension,
513 .guarded_storage,
514 .high_word,
515 .insert_reference_bits_multiple,
516 .interlocked_access1,
517 .load_and_trap,
518 .load_and_zero_rightmost_byte,
519 .load_store_on_cond,
520 .load_store_on_cond_2,
521 .message_security_assist_extension12,
522 .message_security_assist_extension3,
523 .message_security_assist_extension4,
524 .message_security_assist_extension5,
525 .message_security_assist_extension7,
526 .message_security_assist_extension8,
527 .message_security_assist_extension9,
528 .miscellaneous_extensions,
529 .miscellaneous_extensions_2,
530 .miscellaneous_extensions_3,
531 .miscellaneous_extensions_4,
532 .nnp_assist,
533 .population_count,
534 .processor_activity_instrumentation,
535 .processor_assist,
536 .reset_dat_protection,
537 .reset_reference_bits_multiple,
538 .test_pending_external_interruption,
539 .transactional_execution,
540 .vector,
541 .vector_enhancements_1,
542 .vector_enhancements_2,
543 .vector_enhancements_3,
544 .vector_packed_decimal,
545 .vector_packed_decimal_enhancement,
546 .vector_packed_decimal_enhancement_2,
547 .vector_packed_decimal_enhancement_3,
548 }),
549 };
468 pub const arch8: CpuModel = .{550 pub const arch8: CpuModel = .{
469 .name = "arch8",551 .name = "arch8",
470 .llvm_name = "arch8",552 .llvm_name = "arch8",
lib/std/Target/sparc.zig+36
...@@ -7,6 +7,11 @@ const CpuModel = std.Target.Cpu.Model;...@@ -7,6 +7,11 @@ const CpuModel = std.Target.Cpu.Model;
7pub const Feature = enum {7pub const Feature = enum {
8 deprecated_v8,8 deprecated_v8,
9 detectroundchange,9 detectroundchange,
10 fix_tn0009,
11 fix_tn0010,
12 fix_tn0011,
13 fix_tn0012,
14 fix_tn0013,
10 fixallfdivsqrt,15 fixallfdivsqrt,
11 hard_quad_float,16 hard_quad_float,
12 hasleoncasa,17 hasleoncasa,
...@@ -48,6 +53,7 @@ pub const Feature = enum {...@@ -48,6 +53,7 @@ pub const Feature = enum {
48 slow_rdpc,53 slow_rdpc,
49 soft_float,54 soft_float,
50 soft_mul_div,55 soft_mul_div,
56 v8plus,
51 v9,57 v9,
52 vis,58 vis,
53 vis2,59 vis2,
...@@ -73,6 +79,31 @@ pub const all_features = blk: {...@@ -73,6 +79,31 @@ pub const all_features = blk: {
73 .description = "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode",79 .description = "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode",
74 .dependencies = featureSet(&[_]Feature{}),80 .dependencies = featureSet(&[_]Feature{}),
75 };81 };
82 result[@intFromEnum(Feature.fix_tn0009)] = .{
83 .llvm_name = "fix-tn0009",
84 .description = "Enable workaround for errata described in GRLIB-TN-0009",
85 .dependencies = featureSet(&[_]Feature{}),
86 };
87 result[@intFromEnum(Feature.fix_tn0010)] = .{
88 .llvm_name = "fix-tn0010",
89 .description = "Enable workaround for errata described in GRLIB-TN-0010",
90 .dependencies = featureSet(&[_]Feature{}),
91 };
92 result[@intFromEnum(Feature.fix_tn0011)] = .{
93 .llvm_name = "fix-tn0011",
94 .description = "Enable workaround for errata described in GRLIB-TN-0011",
95 .dependencies = featureSet(&[_]Feature{}),
96 };
97 result[@intFromEnum(Feature.fix_tn0012)] = .{
98 .llvm_name = "fix-tn0012",
99 .description = "Enable workaround for errata described in GRLIB-TN-0012",
100 .dependencies = featureSet(&[_]Feature{}),
101 };
102 result[@intFromEnum(Feature.fix_tn0013)] = .{
103 .llvm_name = "fix-tn0013",
104 .description = "Enable workaround for errata described in GRLIB-TN-0013",
105 .dependencies = featureSet(&[_]Feature{}),
106 };
76 result[@intFromEnum(Feature.fixallfdivsqrt)] = .{107 result[@intFromEnum(Feature.fixallfdivsqrt)] = .{
77 .llvm_name = "fixallfdivsqrt",108 .llvm_name = "fixallfdivsqrt",
78 .description = "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store",109 .description = "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store",
...@@ -280,6 +311,11 @@ pub const all_features = blk: {...@@ -280,6 +311,11 @@ pub const all_features = blk: {
280 .description = "Use software emulation for integer multiply and divide",311 .description = "Use software emulation for integer multiply and divide",
281 .dependencies = featureSet(&[_]Feature{}),312 .dependencies = featureSet(&[_]Feature{}),
282 };313 };
314 result[@intFromEnum(Feature.v8plus)] = .{
315 .llvm_name = "v8plus",
316 .description = "Enable V8+ mode, allowing use of 64-bit V9 instructions in 32-bit code",
317 .dependencies = featureSet(&[_]Feature{}),
318 };
283 result[@intFromEnum(Feature.v9)] = .{319 result[@intFromEnum(Feature.v9)] = .{
284 .llvm_name = "v9",320 .llvm_name = "v9",
285 .description = "Enable SPARC-V9 instructions",321 .description = "Enable SPARC-V9 instructions",
lib/std/Target/wasm.zig+34-9
...@@ -7,9 +7,11 @@ const CpuModel = std.Target.Cpu.Model;...@@ -7,9 +7,11 @@ const CpuModel = std.Target.Cpu.Model;
7pub const Feature = enum {7pub const Feature = enum {
8 atomics,8 atomics,
9 bulk_memory,9 bulk_memory,
10 bulk_memory_opt,
11 call_indirect_overlong,
10 exception_handling,12 exception_handling,
11 extended_const,13 extended_const,
12 half_precision,14 fp16,
13 multimemory,15 multimemory,
14 multivalue,16 multivalue,
15 mutable_globals,17 mutable_globals,
...@@ -20,6 +22,7 @@ pub const Feature = enum {...@@ -20,6 +22,7 @@ pub const Feature = enum {
20 sign_ext,22 sign_ext,
21 simd128,23 simd128,
22 tail_call,24 tail_call,
25 wide_arithmetic,
23};26};
2427
25pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet;28pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet;
...@@ -39,6 +42,18 @@ pub const all_features = blk: {...@@ -39,6 +42,18 @@ pub const all_features = blk: {
39 result[@intFromEnum(Feature.bulk_memory)] = .{42 result[@intFromEnum(Feature.bulk_memory)] = .{
40 .llvm_name = "bulk-memory",43 .llvm_name = "bulk-memory",
41 .description = "Enable bulk memory operations",44 .description = "Enable bulk memory operations",
45 .dependencies = featureSet(&[_]Feature{
46 .bulk_memory_opt,
47 }),
48 };
49 result[@intFromEnum(Feature.bulk_memory_opt)] = .{
50 .llvm_name = "bulk-memory-opt",
51 .description = "Enable bulk memory optimization operations",
52 .dependencies = featureSet(&[_]Feature{}),
53 };
54 result[@intFromEnum(Feature.call_indirect_overlong)] = .{
55 .llvm_name = "call-indirect-overlong",
56 .description = "Enable overlong encoding for call_indirect immediates",
42 .dependencies = featureSet(&[_]Feature{}),57 .dependencies = featureSet(&[_]Feature{}),
43 };58 };
44 result[@intFromEnum(Feature.exception_handling)] = .{59 result[@intFromEnum(Feature.exception_handling)] = .{
...@@ -51,9 +66,9 @@ pub const all_features = blk: {...@@ -51,9 +66,9 @@ pub const all_features = blk: {
51 .description = "Enable extended const expressions",66 .description = "Enable extended const expressions",
52 .dependencies = featureSet(&[_]Feature{}),67 .dependencies = featureSet(&[_]Feature{}),
53 };68 };
54 result[@intFromEnum(Feature.half_precision)] = .{69 result[@intFromEnum(Feature.fp16)] = .{
55 .llvm_name = "half-precision",70 .llvm_name = "fp16",
56 .description = "Enable half precision instructions",71 .description = "Enable FP16 instructions",
57 .dependencies = featureSet(&[_]Feature{}),72 .dependencies = featureSet(&[_]Feature{}),
58 };73 };
59 result[@intFromEnum(Feature.multimemory)] = .{74 result[@intFromEnum(Feature.multimemory)] = .{
...@@ -75,7 +90,7 @@ pub const all_features = blk: {...@@ -75,7 +90,7 @@ pub const all_features = blk: {
75 .llvm_name = null,90 .llvm_name = null,
76 .description = "Bulk memory operations with a zero length do not trap",91 .description = "Bulk memory operations with a zero length do not trap",
77 .dependencies = featureSet(&[_]Feature{92 .dependencies = featureSet(&[_]Feature{
78 .bulk_memory,93 .bulk_memory_opt,
79 }),94 }),
80 };95 };
81 result[@intFromEnum(Feature.nontrapping_fptoint)] = .{96 result[@intFromEnum(Feature.nontrapping_fptoint)] = .{
...@@ -86,7 +101,9 @@ pub const all_features = blk: {...@@ -86,7 +101,9 @@ pub const all_features = blk: {
86 result[@intFromEnum(Feature.reference_types)] = .{101 result[@intFromEnum(Feature.reference_types)] = .{
87 .llvm_name = "reference-types",102 .llvm_name = "reference-types",
88 .description = "Enable reference types",103 .description = "Enable reference types",
89 .dependencies = featureSet(&[_]Feature{}),104 .dependencies = featureSet(&[_]Feature{
105 .call_indirect_overlong,
106 }),
90 };107 };
91 result[@intFromEnum(Feature.relaxed_simd)] = .{108 result[@intFromEnum(Feature.relaxed_simd)] = .{
92 .llvm_name = "relaxed-simd",109 .llvm_name = "relaxed-simd",
...@@ -108,6 +125,11 @@ pub const all_features = blk: {...@@ -108,6 +125,11 @@ pub const all_features = blk: {
108 .description = "Enable tail call instructions",125 .description = "Enable tail call instructions",
109 .dependencies = featureSet(&[_]Feature{}),126 .dependencies = featureSet(&[_]Feature{}),
110 };127 };
128 result[@intFromEnum(Feature.wide_arithmetic)] = .{
129 .llvm_name = "wide-arithmetic",
130 .description = "Enable wide-arithmetic instructions",
131 .dependencies = featureSet(&[_]Feature{}),
132 };
111 const ti = @typeInfo(Feature);133 const ti = @typeInfo(Feature);
112 for (&result, 0..) |*elem, i| {134 for (&result, 0..) |*elem, i| {
113 elem.index = i;135 elem.index = i;
...@@ -125,7 +147,7 @@ pub const cpu = struct {...@@ -125,7 +147,7 @@ pub const cpu = struct {
125 .bulk_memory,147 .bulk_memory,
126 .exception_handling,148 .exception_handling,
127 .extended_const,149 .extended_const,
128 .half_precision,150 .fp16,
129 .multimemory,151 .multimemory,
130 .multivalue,152 .multivalue,
131 .mutable_globals,153 .mutable_globals,
...@@ -141,17 +163,20 @@ pub const cpu = struct {...@@ -141,17 +163,20 @@ pub const cpu = struct {
141 .name = "generic",163 .name = "generic",
142 .llvm_name = "generic",164 .llvm_name = "generic",
143 .features = featureSet(&[_]Feature{165 .features = featureSet(&[_]Feature{
166 .bulk_memory,
144 .multivalue,167 .multivalue,
145 .mutable_globals,168 .mutable_globals,
169 .nontrapping_fptoint,
146 .reference_types,170 .reference_types,
147 .sign_ext,171 .sign_ext,
148 }),172 }),
149 };173 };
150 pub const lime1: CpuModel = .{174 pub const lime1: CpuModel = .{
151 .name = "lime1",175 .name = "lime1",
152 .llvm_name = null,176 .llvm_name = "lime1",
153 .features = featureSet(&[_]Feature{177 .features = featureSet(&[_]Feature{
154 .bulk_memory,178 .bulk_memory_opt,
179 .call_indirect_overlong,
155 .extended_const,180 .extended_const,
156 .multivalue,181 .multivalue,
157 .mutable_globals,182 .mutable_globals,
lib/std/Target/x86.zig+163
...@@ -13,14 +13,21 @@ pub const Feature = enum {...@@ -13,14 +13,21 @@ pub const Feature = enum {
13 adx,13 adx,
14 aes,14 aes,
15 allow_light_256_bit,15 allow_light_256_bit,
16 amx_avx512,
16 amx_bf16,17 amx_bf16,
17 amx_complex,18 amx_complex,
18 amx_fp16,19 amx_fp16,
20 amx_fp8,
19 amx_int8,21 amx_int8,
22 amx_movrs,
23 amx_tf32,
20 amx_tile,24 amx_tile,
25 amx_transpose,
21 avx,26 avx,
22 avx10_1_256,27 avx10_1_256,
23 avx10_1_512,28 avx10_1_512,
29 avx10_2_256,
30 avx10_2_512,
24 avx2,31 avx2,
25 avx512bf16,32 avx512bf16,
26 avx512bitalg,33 avx512bitalg,
...@@ -114,6 +121,7 @@ pub const Feature = enum {...@@ -114,6 +121,7 @@ pub const Feature = enum {
114 movbe,121 movbe,
115 movdir64b,122 movdir64b,
116 movdiri,123 movdiri,
124 movrs,
117 mwaitx,125 mwaitx,
118 ndd,126 ndd,
119 nf,127 nf,
...@@ -257,6 +265,13 @@ pub const all_features = blk: {...@@ -257,6 +265,13 @@ pub const all_features = blk: {
257 .description = "Enable generation of 256-bit load/stores even if we prefer 128-bit",265 .description = "Enable generation of 256-bit load/stores even if we prefer 128-bit",
258 .dependencies = featureSet(&[_]Feature{}),266 .dependencies = featureSet(&[_]Feature{}),
259 };267 };
268 result[@intFromEnum(Feature.amx_avx512)] = .{
269 .llvm_name = "amx-avx512",
270 .description = "Support AMX-AVX512 instructions",
271 .dependencies = featureSet(&[_]Feature{
272 .amx_tile,
273 }),
274 };
260 result[@intFromEnum(Feature.amx_bf16)] = .{275 result[@intFromEnum(Feature.amx_bf16)] = .{
261 .llvm_name = "amx-bf16",276 .llvm_name = "amx-bf16",
262 .description = "Support AMX-BF16 instructions",277 .description = "Support AMX-BF16 instructions",
...@@ -278,6 +293,13 @@ pub const all_features = blk: {...@@ -278,6 +293,13 @@ pub const all_features = blk: {
278 .amx_tile,293 .amx_tile,
279 }),294 }),
280 };295 };
296 result[@intFromEnum(Feature.amx_fp8)] = .{
297 .llvm_name = "amx-fp8",
298 .description = "Support AMX-FP8 instructions",
299 .dependencies = featureSet(&[_]Feature{
300 .amx_tile,
301 }),
302 };
281 result[@intFromEnum(Feature.amx_int8)] = .{303 result[@intFromEnum(Feature.amx_int8)] = .{
282 .llvm_name = "amx-int8",304 .llvm_name = "amx-int8",
283 .description = "Support AMX-INT8 instructions",305 .description = "Support AMX-INT8 instructions",
...@@ -285,11 +307,32 @@ pub const all_features = blk: {...@@ -285,11 +307,32 @@ pub const all_features = blk: {
285 .amx_tile,307 .amx_tile,
286 }),308 }),
287 };309 };
310 result[@intFromEnum(Feature.amx_movrs)] = .{
311 .llvm_name = "amx-movrs",
312 .description = "Support AMX-MOVRS instructions",
313 .dependencies = featureSet(&[_]Feature{
314 .amx_tile,
315 }),
316 };
317 result[@intFromEnum(Feature.amx_tf32)] = .{
318 .llvm_name = "amx-tf32",
319 .description = "Support AMX-TF32 instructions",
320 .dependencies = featureSet(&[_]Feature{
321 .amx_tile,
322 }),
323 };
288 result[@intFromEnum(Feature.amx_tile)] = .{324 result[@intFromEnum(Feature.amx_tile)] = .{
289 .llvm_name = "amx-tile",325 .llvm_name = "amx-tile",
290 .description = "Support AMX-TILE instructions",326 .description = "Support AMX-TILE instructions",
291 .dependencies = featureSet(&[_]Feature{}),327 .dependencies = featureSet(&[_]Feature{}),
292 };328 };
329 result[@intFromEnum(Feature.amx_transpose)] = .{
330 .llvm_name = "amx-transpose",
331 .description = "Support AMX amx-transpose instructions",
332 .dependencies = featureSet(&[_]Feature{
333 .amx_tile,
334 }),
335 };
293 result[@intFromEnum(Feature.avx)] = .{336 result[@intFromEnum(Feature.avx)] = .{
294 .llvm_name = "avx",337 .llvm_name = "avx",
295 .description = "Enable AVX instructions",338 .description = "Enable AVX instructions",
...@@ -322,6 +365,21 @@ pub const all_features = blk: {...@@ -322,6 +365,21 @@ pub const all_features = blk: {
322 .evex512,365 .evex512,
323 }),366 }),
324 };367 };
368 result[@intFromEnum(Feature.avx10_2_256)] = .{
369 .llvm_name = "avx10.2-256",
370 .description = "Support AVX10.2 up to 256-bit instruction",
371 .dependencies = featureSet(&[_]Feature{
372 .avx10_1_256,
373 }),
374 };
375 result[@intFromEnum(Feature.avx10_2_512)] = .{
376 .llvm_name = "avx10.2-512",
377 .description = "Support AVX10.2 up to 512-bit instruction",
378 .dependencies = featureSet(&[_]Feature{
379 .avx10_1_512,
380 .avx10_2_256,
381 }),
382 };
325 result[@intFromEnum(Feature.avx2)] = .{383 result[@intFromEnum(Feature.avx2)] = .{
326 .llvm_name = "avx2",384 .llvm_name = "avx2",
327 .description = "Enable AVX2 instructions",385 .description = "Enable AVX2 instructions",
...@@ -848,6 +906,11 @@ pub const all_features = blk: {...@@ -848,6 +906,11 @@ pub const all_features = blk: {
848 .description = "Support movdiri instruction (direct store integer)",906 .description = "Support movdiri instruction (direct store integer)",
849 .dependencies = featureSet(&[_]Feature{}),907 .dependencies = featureSet(&[_]Feature{}),
850 };908 };
909 result[@intFromEnum(Feature.movrs)] = .{
910 .llvm_name = "movrs",
911 .description = "Enable MOVRS",
912 .dependencies = featureSet(&[_]Feature{}),
913 };
851 result[@intFromEnum(Feature.mwaitx)] = .{914 result[@intFromEnum(Feature.mwaitx)] = .{
852 .llvm_name = "mwaitx",915 .llvm_name = "mwaitx",
853 .description = "Enable MONITORX/MWAITX timer functionality",916 .description = "Enable MONITORX/MWAITX timer functionality",
...@@ -2412,6 +2475,106 @@ pub const cpu = struct {...@@ -2412,6 +2475,106 @@ pub const cpu = struct {
2412 .x87,2475 .x87,
2413 }),2476 }),
2414 };2477 };
2478 pub const diamondrapids: CpuModel = .{
2479 .name = "diamondrapids",
2480 .llvm_name = "diamondrapids",
2481 .features = featureSet(&[_]Feature{
2482 .@"64bit",
2483 .adx,
2484 .allow_light_256_bit,
2485 .amx_avx512,
2486 .amx_bf16,
2487 .amx_complex,
2488 .amx_fp16,
2489 .amx_fp8,
2490 .amx_int8,
2491 .amx_movrs,
2492 .amx_tf32,
2493 .amx_transpose,
2494 .avx10_2_512,
2495 .avxifma,
2496 .avxneconvert,
2497 .avxvnni,
2498 .avxvnniint16,
2499 .avxvnniint8,
2500 .bmi,
2501 .bmi2,
2502 .branch_hint,
2503 .ccmp,
2504 .cf,
2505 .cldemote,
2506 .clflushopt,
2507 .clwb,
2508 .cmov,
2509 .cmpccxadd,
2510 .cx16,
2511 .egpr,
2512 .enqcmd,
2513 .ermsb,
2514 .false_deps_getmant,
2515 .false_deps_mulc,
2516 .false_deps_mullq,
2517 .false_deps_perm,
2518 .false_deps_range,
2519 .fast_15bytenop,
2520 .fast_gather,
2521 .fast_scalar_fsqrt,
2522 .fast_shld_rotate,
2523 .fast_variable_crosslane_shuffle,
2524 .fast_variable_perlane_shuffle,
2525 .fast_vector_fsqrt,
2526 .fsgsbase,
2527 .fsrm,
2528 .fxsr,
2529 .gfni,
2530 .idivq_to_divl,
2531 .invpcid,
2532 .lzcnt,
2533 .macrofusion,
2534 .mmx,
2535 .movbe,
2536 .movdir64b,
2537 .movdiri,
2538 .movrs,
2539 .ndd,
2540 .nf,
2541 .no_bypass_delay_blend,
2542 .no_bypass_delay_mov,
2543 .no_bypass_delay_shuffle,
2544 .nopl,
2545 .pconfig,
2546 .pku,
2547 .popcnt,
2548 .ppx,
2549 .prefer_256_bit,
2550 .prefetchi,
2551 .prfchw,
2552 .ptwrite,
2553 .push2pop2,
2554 .rdpid,
2555 .rdrnd,
2556 .rdseed,
2557 .sahf,
2558 .serialize,
2559 .sha,
2560 .sha512,
2561 .shstk,
2562 .sm3,
2563 .sm4,
2564 .tsxldtrk,
2565 .tuning_fast_imm_vector_shift,
2566 .uintr,
2567 .usermsr,
2568 .vzeroupper,
2569 .waitpkg,
2570 .wbnoinvd,
2571 .x87,
2572 .xsavec,
2573 .xsaveopt,
2574 .xsaves,
2575 .zu,
2576 }),
2577 };
2415 pub const emeraldrapids: CpuModel = .{2578 pub const emeraldrapids: CpuModel = .{
2416 .name = "emeraldrapids",2579 .name = "emeraldrapids",
2417 .llvm_name = "emeraldrapids",2580 .llvm_name = "emeraldrapids",
src/codegen/llvm.zig+1
...@@ -140,6 +140,7 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {...@@ -140,6 +140,7 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
140 .{ .v9_3a, "v9.3a" },140 .{ .v9_3a, "v9.3a" },
141 .{ .v9_4a, "v9.4a" },141 .{ .v9_4a, "v9.4a" },
142 .{ .v9_5a, "v9.5a" },142 .{ .v9_5a, "v9.5a" },
143 .{ .v9_6a, "v9.6a" },
143 }),144 }),
144 .powerpc => subArchName(features, std.Target.powerpc, .{145 .powerpc => subArchName(features, std.Target.powerpc, .{
145 .{ .spe, "spe" },146 .{ .spe, "spe" },
src/link/Wasm.zig+14-3
...@@ -2820,9 +2820,12 @@ pub const Feature = packed struct(u8) {...@@ -2820,9 +2820,12 @@ pub const Feature = packed struct(u8) {
2820 pub const Tag = enum(u6) {2820 pub const Tag = enum(u6) {
2821 atomics,2821 atomics,
2822 @"bulk-memory",2822 @"bulk-memory",
2823 @"bulk-memory-opt",
2824 @"call-indirect-overlong",
2823 @"exception-handling",2825 @"exception-handling",
2824 @"extended-const",2826 @"extended-const",
2825 @"half-precision",2827 fp16,
2828 memory64,
2826 multimemory,2829 multimemory,
2827 multivalue,2830 multivalue,
2828 @"mutable-globals",2831 @"mutable-globals",
...@@ -2834,14 +2837,17 @@ pub const Feature = packed struct(u8) {...@@ -2834,14 +2837,17 @@ pub const Feature = packed struct(u8) {
2834 simd128,2837 simd128,
2835 @"tail-call",2838 @"tail-call",
2836 @"shared-mem",2839 @"shared-mem",
2840 @"wide-arithmetic",
28372841
2838 pub fn fromCpuFeature(feature: std.Target.wasm.Feature) Tag {2842 pub fn fromCpuFeature(feature: std.Target.wasm.Feature) Tag {
2839 return switch (feature) {2843 return switch (feature) {
2840 .atomics => .atomics,2844 .atomics => .atomics,
2841 .bulk_memory => .@"bulk-memory",2845 .bulk_memory => .@"bulk-memory",
2846 .bulk_memory_opt => .@"bulk-memory-opt",
2847 .call_indirect_overlong => .@"call-indirect-overlong",
2842 .exception_handling => .@"exception-handling",2848 .exception_handling => .@"exception-handling",
2843 .extended_const => .@"extended-const",2849 .extended_const => .@"extended-const",
2844 .half_precision => .@"half-precision",2850 .fp16 => .fp16,
2845 .multimemory => .multimemory,2851 .multimemory => .multimemory,
2846 .multivalue => .multivalue,2852 .multivalue => .multivalue,
2847 .mutable_globals => .@"mutable-globals",2853 .mutable_globals => .@"mutable-globals",
...@@ -2852,6 +2858,7 @@ pub const Feature = packed struct(u8) {...@@ -2852,6 +2858,7 @@ pub const Feature = packed struct(u8) {
2852 .sign_ext => .@"sign-ext",2858 .sign_ext => .@"sign-ext",
2853 .simd128 => .simd128,2859 .simd128 => .simd128,
2854 .tail_call => .@"tail-call",2860 .tail_call => .@"tail-call",
2861 .wide_arithmetic => .@"wide-arithmetic",
2855 };2862 };
2856 }2863 }
28572864
...@@ -2859,9 +2866,12 @@ pub const Feature = packed struct(u8) {...@@ -2859,9 +2866,12 @@ pub const Feature = packed struct(u8) {
2859 return switch (tag) {2866 return switch (tag) {
2860 .atomics => .atomics,2867 .atomics => .atomics,
2861 .@"bulk-memory" => .bulk_memory,2868 .@"bulk-memory" => .bulk_memory,
2869 .@"bulk-memory-opt" => .bulk_memory_opt,
2870 .@"call-indirect-overlong" => .call_indirect_overlong,
2862 .@"exception-handling" => .exception_handling,2871 .@"exception-handling" => .exception_handling,
2863 .@"extended-const" => .extended_const,2872 .@"extended-const" => .extended_const,
2864 .@"half-precision" => .half_precision,2873 .fp16 => .fp16,
2874 .memory64 => null, // Linker-only feature.
2865 .multimemory => .multimemory,2875 .multimemory => .multimemory,
2866 .multivalue => .multivalue,2876 .multivalue => .multivalue,
2867 .@"mutable-globals" => .mutable_globals,2877 .@"mutable-globals" => .mutable_globals,
...@@ -2873,6 +2883,7 @@ pub const Feature = packed struct(u8) {...@@ -2873,6 +2883,7 @@ pub const Feature = packed struct(u8) {
2873 .simd128 => .simd128,2883 .simd128 => .simd128,
2874 .@"tail-call" => .tail_call,2884 .@"tail-call" => .tail_call,
2875 .@"shared-mem" => null, // Linker-only feature.2885 .@"shared-mem" => null, // Linker-only feature.
2886 .@"wide-arithmetic" => .wide_arithmetic,
2876 };2887 };
2877 }2888 }
28782889
src/target.zig+7-1
...@@ -293,7 +293,13 @@ pub fn hasDebugInfo(target: std.Target) bool {...@@ -293,7 +293,13 @@ pub fn hasDebugInfo(target: std.Target) bool {
293 std.Target.nvptx.featureSetHas(target.cpu.features, .ptx77) or293 std.Target.nvptx.featureSetHas(target.cpu.features, .ptx77) or
294 std.Target.nvptx.featureSetHas(target.cpu.features, .ptx78) or294 std.Target.nvptx.featureSetHas(target.cpu.features, .ptx78) or
295 std.Target.nvptx.featureSetHas(target.cpu.features, .ptx80) or295 std.Target.nvptx.featureSetHas(target.cpu.features, .ptx80) or
296 std.Target.nvptx.featureSetHas(target.cpu.features, .ptx81),296 std.Target.nvptx.featureSetHas(target.cpu.features, .ptx81) or
297 std.Target.nvptx.featureSetHas(target.cpu.features, .ptx82) or
298 std.Target.nvptx.featureSetHas(target.cpu.features, .ptx83) or
299 std.Target.nvptx.featureSetHas(target.cpu.features, .ptx84) or
300 std.Target.nvptx.featureSetHas(target.cpu.features, .ptx85) or
301 std.Target.nvptx.featureSetHas(target.cpu.features, .ptx86) or
302 std.Target.nvptx.featureSetHas(target.cpu.features, .ptx87),
297 .bpfel, .bpfeb => false,303 .bpfel, .bpfeb => false,
298 else => true,304 else => true,
299 };305 };
tools/update_cpu_features.zig+21-15
...@@ -778,6 +778,10 @@ const targets = [_]ArchTarget{...@@ -778,6 +778,10 @@ const targets = [_]ArchTarget{
778 .llvm_name = "armv9.5-a",778 .llvm_name = "armv9.5-a",
779 .zig_name = "v9_5a",779 .zig_name = "v9_5a",
780 },780 },
781 .{
782 .llvm_name = "armv9.6-a",
783 .zig_name = "v9_6a",
784 },
781 .{785 .{
782 .llvm_name = "armv9-a",786 .llvm_name = "armv9-a",
783 .zig_name = "v9a",787 .zig_name = "v9a",
...@@ -894,6 +898,10 @@ const targets = [_]ArchTarget{...@@ -894,6 +898,10 @@ const targets = [_]ArchTarget{
894 .llvm_name = "v9.5a",898 .llvm_name = "v9.5a",
895 .zig_name = "has_v9_5a",899 .zig_name = "has_v9_5a",
896 },900 },
901 .{
902 .llvm_name = "v9.6a",
903 .zig_name = "has_v9_6a",
904 },
897 },905 },
898 .extra_cpus = &.{906 .extra_cpus = &.{
899 .{907 .{
...@@ -1092,25 +1100,23 @@ const targets = [_]ArchTarget{...@@ -1092,25 +1100,23 @@ const targets = [_]ArchTarget{
1092 .name = "WebAssembly",1100 .name = "WebAssembly",
1093 .td_name = "WebAssembly",1101 .td_name = "WebAssembly",
1094 },1102 },
1095 .extra_features = &.{1103 // For whatever reason, LLVM's WebAssembly backend sets these implied features in code
1104 // rather than making them proper dependencies, so fix that here...
1105 .feature_overrides = &.{
1096 .{1106 .{
1097 .zig_name = "nontrapping_bulk_memory_len0",1107 .llvm_name = "bulk-memory",
1098 .desc = "Bulk memory operations with a zero length do not trap",1108 .extra_deps = &.{"bulk_memory_opt"},
1099 .deps = &.{"bulk_memory"},1109 },
1110 .{
1111 .llvm_name = "reference-types",
1112 .extra_deps = &.{"call_indirect_overlong"},
1100 },1113 },
1101 },1114 },
1102 .extra_cpus = &.{1115 .extra_features = &.{
1103 .{1116 .{
1104 .llvm_name = null,1117 .zig_name = "nontrapping_bulk_memory_len0",
1105 .zig_name = "lime1",1118 .desc = "Bulk memory operations with a zero length do not trap",
1106 .features = &.{1119 .deps = &.{"bulk_memory_opt"},
1107 "bulk_memory",
1108 "extended_const",
1109 "multivalue",
1110 "mutable_globals",
1111 "nontrapping_fptoint",
1112 "sign_ext",
1113 },
1114 },1120 },
1115 },1121 },
1116 },1122 },