authorgravatar for alichraghi@proton.meAli Chraghi <alichraghi@proton.me> 2025-03-11 00:49:16+03:30
committergravatar for alichraghi@proton.meAli Chraghi <alichraghi@proton.me> 2025-03-17 21:56:17+03:30
log50539a2447c0720f91789063d7349bd0103de4bd
tree4e199fd54e58623f363b84c0899f149c8c718d97
parente2e75774748591fb44bfc905080e7a14008d4ec3

spirv/target: arbitrary_precision_integers feature support

4 files changed, 12 insertions(+), 4 deletions(-)

lib/std/Target/spirv.zig+6
......@@ -17,6 +17,7 @@ pub const Feature = enum {
1717 float64,
1818 matrix,
1919 storage_push_constant16,
20 arbitrary_precision_integers,
2021 kernel,
2122 addresses,
2223 generic_pointer,
......@@ -105,6 +106,11 @@ pub const all_features = blk: {
105106 .description = "Enable SPV_KHR_16bit_storage extension and the StoragePushConstant16 capability",
106107 .dependencies = featureSet(&[_]Feature{.v1_3}),
107108 };
109 result[@intFromEnum(Feature.arbitrary_precision_integers)] = .{
110 .llvm_name = null,
111 .description = "Enable SPV_INTEL_arbitrary_precision_integers extension and the ArbitraryPrecisionIntegersINTEL capability",
112 .dependencies = featureSet(&[_]Feature{ .v1_5, .int8, .int16 }),
113 };
108114 result[@intFromEnum(Feature.kernel)] = .{
109115 .llvm_name = null,
110116 .description = "Enable Kernel capability",
src/codegen/spirv.zig+2-2
......@@ -581,13 +581,13 @@ const NavGen = struct {
581581 /// that size. In this case, multiple elements of the largest type should be used.
582582 /// The backing type will be chosen as the smallest supported integer larger or equal to it in number of bits.
583583 /// The result is valid to be used with OpTypeInt.
584 /// TODO: The extension SPV_INTEL_arbitrary_precision_integers allows any integer size (at least up to 32 bits).
585 /// TODO: This probably needs an ABI-version as well (especially in combination with SPV_INTEL_arbitrary_precision_integers).
586584 /// TODO: Should the result of this function be cached?
587585 fn backingIntBits(self: *NavGen, bits: u16) ?u16 {
588586 // The backend will never be asked to compiler a 0-bit integer, so we won't have to handle those in this function.
589587 assert(bits != 0);
590588
589 if (self.spv.hasFeature(.arbitrary_precision_integers) and bits <= 32) return bits;
590
591591 // 8, 16 and 64-bit integers require the Int8, Int16 and Inr64 capabilities respectively.
592592 // 32-bit integers are always supported (see spec, 2.16.1, Data rules).
593593 const ints = [_]struct { bits: u16, feature: ?Target.spirv.Feature }{
src/codegen/spirv/Module.zig+4
......@@ -343,6 +343,10 @@ pub fn finalize(self: *Module, a: Allocator) ![]Word {
343343 try self.addExtension("SPV_KHR_16bit_storage");
344344 try self.addCapability(.StoragePushConstant16);
345345 },
346 .arbitrary_precision_integers => {
347 try self.addExtension("SPV_INTEL_arbitrary_precision_integers");
348 try self.addCapability(.ArbitraryPrecisionIntegersINTEL);
349 },
346350 .addresses => try self.addCapability(.Addresses),
347351 // Kernel
348352 .kernel => try self.addCapability(.Kernel),
test/behavior/vector.zig-2
......@@ -11,7 +11,6 @@ test "implicit cast vector to array - bool" {
1111 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
1212 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
1313 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
14 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
1514
1615 const S = struct {
1716 fn doTheTest() !void {
......@@ -30,7 +29,6 @@ test "vector wrap operators" {
3029 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
3130 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
3231 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
33 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
3432 if (builtin.zig_backend == .stage2_x86_64 and
3533 !comptime std.Target.x86.featureSetHas(builtin.cpu.features, .sse4_1)) return error.SkipZigTest;
3634