| ... | ... | @@ -525,7 +525,7 @@ pub const Instruction = union(enum) { |
| 525 | 525 | }; |
| 526 | 526 | } |
| 527 | 527 | |
| 528 | | fn format2a(rd: Register, op2: u3, imm: i22) Instruction { |
| 528 | fn format2a(op2: u3, rd: Register, imm: i22) Instruction { |
| 529 | 529 | return Instruction{ |
| 530 | 530 | .format_2a = .{ |
| 531 | 531 | .rd = rd.enc(), |
| ... | ... | @@ -535,7 +535,7 @@ pub const Instruction = union(enum) { |
| 535 | 535 | }; |
| 536 | 536 | } |
| 537 | 537 | |
| 538 | | fn format2b(annul: bool, cond: Condition, op2: u3, disp: i24) Instruction { |
| 538 | fn format2b(op2: u3, cond: Condition, annul: bool, disp: i24) Instruction { |
| 539 | 539 | // In SPARC, branch target needs to be aligned to 4 bytes. |
| 540 | 540 | assert(disp % 4 == 0); |
| 541 | 541 | |
| ... | ... | @@ -551,7 +551,7 @@ pub const Instruction = union(enum) { |
| 551 | 551 | }; |
| 552 | 552 | } |
| 553 | 553 | |
| 554 | | fn format2c(annul: bool, cond: Condition, op2: u3, ccr: CCR, pt: bool, disp: i21) Instruction { |
| 554 | fn format2c(op2: u3, cond: Condition, annul: bool, pt: bool, ccr: CCR, disp: i21) Instruction { |
| 555 | 555 | // In SPARC, branch target needs to be aligned to 4 bytes. |
| 556 | 556 | assert(disp % 4 == 0); |
| 557 | 557 | |
| ... | ... | @@ -573,7 +573,7 @@ pub const Instruction = union(enum) { |
| 573 | 573 | }; |
| 574 | 574 | } |
| 575 | 575 | |
| 576 | | fn format2d(annul: bool, rcond: RCondition, op2: u3, pt: bool, rs1: Register, disp: i18) Instruction { |
| 576 | fn format2d(op2: u3, rcond: RCondition, annul: bool, pt: bool, rs1: Register, disp: i18) Instruction { |
| 577 | 577 | // In SPARC, branch target needs to be aligned to 4 bytes. |
| 578 | 578 | assert(disp % 4 == 0); |
| 579 | 579 | |
| ... | ... | @@ -595,7 +595,7 @@ pub const Instruction = union(enum) { |
| 595 | 595 | }; |
| 596 | 596 | } |
| 597 | 597 | |
| 598 | | fn format3a(rd: Register, op3: u6, rs1: Register, rs2: Register) Instruction { |
| 598 | fn format3a(op3: u6, rs1: Register, rs2: Register, rd: Register) Instruction { |
| 599 | 599 | return Instruction{ |
| 600 | 600 | .format_3a = .{ |
| 601 | 601 | .rd = rd.enc(), |
| ... | ... | @@ -605,7 +605,7 @@ pub const Instruction = union(enum) { |
| 605 | 605 | }, |
| 606 | 606 | }; |
| 607 | 607 | } |
| 608 | | fn format3b(rd: Register, op3: u6, rs1: Register, imm: i13) Instruction { |
| 608 | fn format3b(op3: u6, rs1: Register, imm: i13, rd: Register) Instruction { |
| 609 | 609 | return Instruction{ |
| 610 | 610 | .format_3b = .{ |
| 611 | 611 | .rd = rd.enc(), |
| ... | ... | @@ -633,7 +633,7 @@ pub const Instruction = union(enum) { |
| 633 | 633 | }, |
| 634 | 634 | }; |
| 635 | 635 | } |
| 636 | | fn format3e(rd: Register, op3: u6, rcond: RCondition, rs1: Register, rs2: Register) Instruction { |
| 636 | fn format3e(op3: u6, rcond: RCondition, rs1: Register, rs2: Register, rd: Register) Instruction { |
| 637 | 637 | return Instruction{ |
| 638 | 638 | .format_3e = .{ |
| 639 | 639 | .rd = rd.enc(), |
| ... | ... | @@ -644,7 +644,7 @@ pub const Instruction = union(enum) { |
| 644 | 644 | }, |
| 645 | 645 | }; |
| 646 | 646 | } |
| 647 | | fn format3f(rd: Register, op3: u6, rs1: Register, rcond: RCondition, imm: i10) Instruction { |
| 647 | fn format3f(op3: u6, rcond: RCondition, rs1: Register, imm: i10, rd: Register) Instruction { |
| 648 | 648 | return Instruction{ |
| 649 | 649 | .format_3f = .{ |
| 650 | 650 | .rd = rd.enc(), |
| ... | ... | @@ -655,7 +655,7 @@ pub const Instruction = union(enum) { |
| 655 | 655 | }, |
| 656 | 656 | }; |
| 657 | 657 | } |
| 658 | | fn format3g(rd: Register, op3: u6, rs1: Register, rs2: Register) Instruction { |
| 658 | fn format3g(op3: u6, rs1: Register, rs2: Register, rd: Register) Instruction { |
| 659 | 659 | return Instruction{ |
| 660 | 660 | .format_3g = .{ |
| 661 | 661 | .rd = rd.enc(), |
| ... | ... | @@ -673,7 +673,7 @@ pub const Instruction = union(enum) { |
| 673 | 673 | }, |
| 674 | 674 | }; |
| 675 | 675 | } |
| 676 | | fn format3i(rd: Register, op3: u6, rs1: Register, rs2: Register, asi: ASI) Instruction { |
| 676 | fn format3i(op3: u6, rs1: Register, rs2: Register, rd: Register, asi: ASI) Instruction { |
| 677 | 677 | return Instruction{ |
| 678 | 678 | .format_3i = .{ |
| 679 | 679 | .rd = rd.enc(), |
| ... | ... | @@ -693,7 +693,7 @@ pub const Instruction = union(enum) { |
| 693 | 693 | }, |
| 694 | 694 | }; |
| 695 | 695 | } |
| 696 | | fn format3k(rd: Register, op3: u6, rs1: Register, rs2: Register, sw: ShiftWidth) Instruction { |
| 696 | fn format3k(op3: u6, sw: ShiftWidth, rs1: Register, rs2: Register, rd: Register) Instruction { |
| 697 | 697 | return Instruction{ |
| 698 | 698 | .format_3k = .{ |
| 699 | 699 | .rd = rd.enc(), |
| ... | ... | @@ -704,7 +704,7 @@ pub const Instruction = union(enum) { |
| 704 | 704 | }, |
| 705 | 705 | }; |
| 706 | 706 | } |
| 707 | | fn format3l(rd: Register, op3: u6, rs1: Register, shift_count: u5) Instruction { |
| 707 | fn format3l(op3: u6, rs1: Register, shift_count: u5, rd: Register) Instruction { |
| 708 | 708 | return Instruction{ |
| 709 | 709 | .format_3l = .{ |
| 710 | 710 | .rd = rd.enc(), |
| ... | ... | @@ -714,7 +714,7 @@ pub const Instruction = union(enum) { |
| 714 | 714 | }, |
| 715 | 715 | }; |
| 716 | 716 | } |
| 717 | | fn format3m(rd: Register, op3: u6, rs1: Register, shift_count: u6) Instruction { |
| 717 | fn format3m(op3: u6, rs1: Register, shift_count: u6, rd: Register) Instruction { |
| 718 | 718 | return Instruction{ |
| 719 | 719 | .format_3m = .{ |
| 720 | 720 | .rd = rd.enc(), |
| ... | ... | @@ -724,7 +724,7 @@ pub const Instruction = union(enum) { |
| 724 | 724 | }, |
| 725 | 725 | }; |
| 726 | 726 | } |
| 727 | | fn format3n(rd: Register, op3: u6, opf: u9, rs2: Register) Instruction { |
| 727 | fn format3n(op3: u6, opf: u9, rs2: Register, rd: Register) Instruction { |
| 728 | 728 | return Instruction{ |
| 729 | 729 | .format_3n = .{ |
| 730 | 730 | .rd = rd.enc(), |
| ... | ... | @@ -734,7 +734,7 @@ pub const Instruction = union(enum) { |
| 734 | 734 | }, |
| 735 | 735 | }; |
| 736 | 736 | } |
| 737 | | fn format3o(cc: CCR, op3: u6, rs1: Register, opf: u9, rs2: Register) Instruction { |
| 737 | fn format3o(op3: u6, opf: u9, cc: CCR, rs1: Register, rs2: Register) Instruction { |
| 738 | 738 | const ccr_cc1 = @truncate(u1, @enumToInt(cc) >> 1); |
| 739 | 739 | const ccr_cc0 = @truncate(u1, @enumToInt(cc)); |
| 740 | 740 | return Instruction{ |
| ... | ... | @@ -748,7 +748,7 @@ pub const Instruction = union(enum) { |
| 748 | 748 | }, |
| 749 | 749 | }; |
| 750 | 750 | } |
| 751 | | fn format3p(rd: Register, op3: u6, rs1: Register, opf: u9, rs2: Register) Instruction { |
| 751 | fn format3p(op3: u6, opf: u9, rs1: Register, rs2: Register, rd: Register) Instruction { |
| 752 | 752 | return Instruction{ |
| 753 | 753 | .format_3p = .{ |
| 754 | 754 | .rd = rd.enc(), |
| ... | ... | @@ -759,7 +759,7 @@ pub const Instruction = union(enum) { |
| 759 | 759 | }, |
| 760 | 760 | }; |
| 761 | 761 | } |
| 762 | | fn format3q(rd: Register, op3: u6, rs1: Register) Instruction { |
| 762 | fn format3q(op3: u6, rs1: Register, rd: Register) Instruction { |
| 763 | 763 | return Instruction{ |
| 764 | 764 | .format_3q = .{ |
| 765 | 765 | .rd = rd.enc(), |
| ... | ... | @@ -768,7 +768,7 @@ pub const Instruction = union(enum) { |
| 768 | 768 | }, |
| 769 | 769 | }; |
| 770 | 770 | } |
| 771 | | fn format3r(fcn: u5, op3: u6) Instruction { |
| 771 | fn format3r(op3: u6, fcn: u5) Instruction { |
| 772 | 772 | return Instruction{ |
| 773 | 773 | .format_3r = .{ |
| 774 | 774 | .fcn = fcn, |
| ... | ... | @@ -776,7 +776,7 @@ pub const Instruction = union(enum) { |
| 776 | 776 | }, |
| 777 | 777 | }; |
| 778 | 778 | } |
| 779 | | fn format3s(rd: Register, op3: u6) Instruction { |
| 779 | fn format3s(op3: u6, rd: Register) Instruction { |
| 780 | 780 | return Instruction{ |
| 781 | 781 | .format_3s = .{ |
| 782 | 782 | .rd = rd.enc(), |