From 5b8af7a2a9140fd0533961b62addc61f57b33343 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Thu, 24 Aug 2023 14:38:58 -0700
Subject: [PATCH] skip regressed LLVM 17 std lib test on powerpc

Tracked by #16951
---
 lib/std/mem.zig | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/lib/std/mem.zig b/lib/std/mem.zig
index 7fd02e8232a3949c30dddc866e571568616ca2fb..011be7708da67cf0e8cc6859eaa91d4f9c9740e9 100644
--- a/lib/std/mem.zig
+++ b/lib/std/mem.zig
@@ -4490,6 +4490,11 @@ test "read/write(Var)PackedInt" {
         else => {},
     }
 
+    if (builtin.cpu.arch == .powerpc) {
+        // https://github.com/ziglang/zig/issues/16951
+        return error.SkipZigTest;
+    }
+
     const foreign_endian: Endian = if (native_endian == .Big) .Little else .Big;
     const expect = std.testing.expect;
     var prng = std.rand.DefaultPrng.init(1234);
-- 
2.54.0