authorgravatar for 51252236+xdBronch@users.noreply.github.comxdBronch <51252236+xdBronch@users.noreply.github.com> 2023-11-03 02:56:26-04:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2023-11-03 14:46:53-04:00
log5bd27a2cb6ead1108e2e177f4e2730f31224925c
tree6a39e414206be668e006800a400fb38b5fb54a3d
parentae6df9e96749cdd7cd4f84245ce20cfb3d4d6354

dont assume apple chips are macos exclusive

1 files changed, 16 insertions(+), 0 deletions(-)

lib/std/zig/system/arm.zig+16
...@@ -111,6 +111,21 @@ pub const cpu_models = struct {...@@ -111,6 +111,21 @@ pub const cpu_models = struct {
111 E{ .part = 0xc01, .m64 = &A64.saphira },111 E{ .part = 0xc01, .m64 = &A64.saphira },
112 };112 };
113113
114 const Apple = [_]E{
115 E{ .part = 0x022, .m64 = &A64.apple_m1 },
116 E{ .part = 0x023, .m64 = &A64.apple_m1 },
117 E{ .part = 0x024, .m64 = &A64.apple_m1 },
118 E{ .part = 0x025, .m64 = &A64.apple_m1 },
119 E{ .part = 0x028, .m64 = &A64.apple_m1 },
120 E{ .part = 0x029, .m64 = &A64.apple_m1 },
121 E{ .part = 0x032, .m64 = &A64.apple_m2 },
122 E{ .part = 0x033, .m64 = &A64.apple_m2 },
123 E{ .part = 0x034, .m64 = &A64.apple_m2 },
124 E{ .part = 0x035, .m64 = &A64.apple_m2 },
125 E{ .part = 0x038, .m64 = &A64.apple_m2 },
126 E{ .part = 0x039, .m64 = &A64.apple_m2 },
127 };
128
114 pub fn isKnown(core: CoreInfo, is_64bit: bool) ?*const Target.Cpu.Model {129 pub fn isKnown(core: CoreInfo, is_64bit: bool) ?*const Target.Cpu.Model {
115 const models = switch (core.implementer) {130 const models = switch (core.implementer) {
116 0x41 => &ARM,131 0x41 => &ARM,
...@@ -120,6 +135,7 @@ pub const cpu_models = struct {...@@ -120,6 +135,7 @@ pub const cpu_models = struct {
120 0x48 => &HiSilicon,135 0x48 => &HiSilicon,
121 0x50 => &Ampere,136 0x50 => &Ampere,
122 0x51 => &Qualcomm,137 0x51 => &Qualcomm,
138 0x61 => &Apple,
123 else => return null,139 else => return null,
124 };140 };
125141