From 605c01c2dc7cfd5449a4b175bbc6e04a0bb75207 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= <alex@alexrp.com>
Date: Thu, 4 Jun 2026 23:03:31 +0200
Subject: [PATCH] cbe: map fp to s0 in inline asm on riscv

---
 src/codegen/c.zig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/codegen/c.zig b/src/codegen/c.zig
index 7e00800c8a5f456d11c151a179c674f7704c1740..08e49fa1e13355293532e4bebe108d27a8223193 100644
--- a/src/codegen/c.zig
+++ b/src/codegen/c.zig
@@ -4984,6 +4984,8 @@ fn airAsm(f: *Function, inst: Air.Inst.Index) !CValue {
                 (mem.eql(u8, field_name, "ccr") or mem.eql(u8, field_name, "icc") or mem.eql(u8, field_name, "xcc"))) name: {
                     // C compilers just use `icc` to encompass all of these.
                     break :name "icc";
+                } else if (target.cpu.arch.isRISCV() and mem.eql(u8, field_name, "fp")) name: {
+                    break :name "s0";
                 } else field_name;
 
             try w.print(" {f}", .{fmtStringLiteral(name, null)});
-- 
2.54.0