diff --git a/lib/libc/musl/src/thread/powerpc/clone.s b/lib/libc/musl/src/thread/powerpc/clone.s index 019fd62a95afc6e4cff64f0c5bce1e1d41ae33c8..29c0b2ef4e34a2b0ed04c42e6a43d1deddbb4d13 100644 --- a/lib/libc/musl/src/thread/powerpc/clone.s +++ b/lib/libc/musl/src/thread/powerpc/clone.s @@ -16,8 +16,9 @@ __clone: # store non-volatile regs r30, r31 on stack in order to put our # start func and its arg there -stwu 30, -16(1) -stw 31, 4(1) +stwu 1, -16(1) +stw 30, 8(1) +stw 31, 12(1) # save r3 (func) into r30, and r6(arg) into r31 mr 30, 3 @@ -51,8 +52,8 @@ cmpwi cr7, 3, 0 # if not 0, restore stack and return beq cr7, 2f -lwz 30, 0(1) -lwz 31, 4(1) +lwz 30, 8(1) +lwz 31, 12(1) addi 1, 1, 16 blr diff --git a/lib/std/Thread.zig b/lib/std/Thread.zig index 0cc439d07da7d8a6c0de39a65bf83800ea9b6992..3c79bc68d4e9c09066d5b74a23a1dbf738a5258a 100644 --- a/lib/std/Thread.zig +++ b/lib/std/Thread.zig @@ -1166,29 +1166,29 @@ const LinuxThreadImpl = struct { posix.sigprocmask(std.posix.SIG.BLOCK, &std.os.linux.sigfillset(), null); switch (target.cpu.arch) { .x86 => asm volatile ( - \\ movl $91, %%eax # SYS_munmap - \\ int $128 - \\ movl $1, %%eax # SYS_exit - \\ movl $0, %%ebx - \\ int $128 + \\ movl $91, %%eax # SYS_munmap + \\ int $128 + \\ movl $1, %%eax # SYS_exit + \\ movl $0, %%ebx + \\ int $128 : : [ptr] "{ebx}" (@intFromPtr(self.mapped.ptr)), [len] "{ecx}" (self.mapped.len), ), .x86_64 => asm volatile (switch (target.abi) { .gnux32, .muslx32, .x32 => - \\ movl $0x4000000b, %%eax # SYS_munmap - \\ syscall - \\ movl $0x4000003c, %%eax # SYS_exit - \\ xor %%rdi, %%rdi - \\ syscall + \\ movl $0x4000000b, %%eax # SYS_munmap + \\ syscall + \\ movl $0x4000003c, %%eax # SYS_exit + \\ xor %%rdi, %%rdi + \\ syscall , else => - \\ movl $11, %%eax # SYS_munmap - \\ syscall - \\ movl $60, %%eax # SYS_exit - \\ xor %%rdi, %%rdi - \\ syscall + \\ movl $11, %%eax # SYS_munmap + \\ syscall + \\ movl $60, %%eax # SYS_exit + \\ xor %%rdi, %%rdi + \\ syscall , } : @@ -1196,21 +1196,21 @@ const LinuxThreadImpl = struct { [len] "{rsi}" (self.mapped.len), ), .arm, .armeb, .thumb, .thumbeb => asm volatile ( - \\ mov r7, #91 // SYS_munmap - \\ svc 0 - \\ mov r7, #1 // SYS_exit - \\ mov r0, #0 - \\ svc 0 + \\ mov r7, #91 // SYS_munmap + \\ svc 0 + \\ mov r7, #1 // SYS_exit + \\ mov r0, #0 + \\ svc 0 : : [ptr] "{r0}" (@intFromPtr(self.mapped.ptr)), [len] "{r1}" (self.mapped.len), ), .aarch64, .aarch64_be => asm volatile ( - \\ mov x8, #215 // SYS_munmap - \\ svc 0 - \\ mov x8, #93 // SYS_exit - \\ mov x0, #0 - \\ svc 0 + \\ mov x8, #215 // SYS_munmap + \\ svc 0 + \\ mov x8, #93 // SYS_exit + \\ mov x0, #0 + \\ svc 0 : : [ptr] "{x0}" (@intFromPtr(self.mapped.ptr)), [len] "{x1}" (self.mapped.len), @@ -1236,21 +1236,21 @@ const LinuxThreadImpl = struct { [len] "{r1}" (self.mapped.len), ), .hexagon => asm volatile ( - \\ r6 = #215 // SYS_munmap - \\ trap0(#1) - \\ r6 = #93 // SYS_exit - \\ r0 = #0 - \\ trap0(#1) + \\ r6 = #215 // SYS_munmap + \\ trap0(#1) + \\ r6 = #93 // SYS_exit + \\ r0 = #0 + \\ trap0(#1) : : [ptr] "{r0}" (@intFromPtr(self.mapped.ptr)), [len] "{r1}" (self.mapped.len), ), .hppa => asm volatile ( - \\ ldi 91, %%r20 /* SYS_munmap */ \\ ble 0x100(%%sr2, %%r0) - \\ ldi 1, %%r20 /* SYS_exit */ + \\ ldi 91, %%r20 /* SYS_munmap */ \\ ldi 0, %%r26 \\ ble 0x100(%%sr2, %%r0) + \\ ldi 1, %%r20 /* SYS_exit */ : : [ptr] "{r26}" (@intFromPtr(self.mapped.ptr)), [len] "{r25}" (self.mapped.len), @@ -1275,12 +1275,7 @@ const LinuxThreadImpl = struct { : [ptr] "{r5}" (@intFromPtr(self.mapped.ptr)), [len] "{r6}" (self.mapped.len), ), - // We set `sp` to the address of the current function as a workaround for a Linux - // kernel bug that caused syscalls to return EFAULT if the stack pointer is invalid. - // The bug was introduced in 46e12c07b3b9603c60fc1d421ff18618241cb081 and fixed in - // 7928eb0370d1133d0d8cd2f5ddfca19c309079d5. .mips, .mipsel => asm volatile ( - \\ move $sp, $t9 \\ li $v0, 4091 # SYS_munmap \\ syscall \\ li $v0, 4001 # SYS_exit @@ -1314,37 +1309,36 @@ const LinuxThreadImpl = struct { \\ l.ori r11, r0, 215 # SYS_munmap \\ l.sys 1 \\ l.ori r11, r0, 93 # SYS_exit - \\ l.ori r3, r0, r0 + \\ l.ori r3, r0, 0 \\ l.sys 1 : : [ptr] "{r3}" (@intFromPtr(self.mapped.ptr)), [len] "{r4}" (self.mapped.len), ), .powerpc, .powerpcle, .powerpc64, .powerpc64le => asm volatile ( - \\ li 0, 91 # SYS_munmap - \\ sc - \\ li 0, 1 # SYS_exit - \\ li 3, 0 - \\ sc - \\ blr + \\ li 0, 91 # SYS_munmap + \\ sc + \\ li 0, 1 # SYS_exit + \\ li 3, 0 + \\ sc : : [ptr] "{r3}" (@intFromPtr(self.mapped.ptr)), [len] "{r4}" (self.mapped.len), ), .riscv32, .riscv64 => asm volatile ( - \\ li a7, 215 # SYS_munmap - \\ ecall - \\ li a7, 93 # SYS_exit - \\ mv a0, zero - \\ ecall + \\ li a7, 215 # SYS_munmap + \\ ecall + \\ li a7, 93 # SYS_exit + \\ mv a0, zero + \\ ecall : : [ptr] "{a0}" (@intFromPtr(self.mapped.ptr)), [len] "{a1}" (self.mapped.len), ), .s390x => asm volatile ( - \\ svc 91 # SYS_munmap - \\ lghi %%r2, 0 - \\ svc 1 # SYS_exit + \\ svc 91 # SYS_munmap + \\ lghi %%r2, 0 + \\ svc 1 # SYS_exit : : [ptr] "{r2}" (@intFromPtr(self.mapped.ptr)), [len] "{r3}" (self.mapped.len), @@ -1384,7 +1378,7 @@ const LinuxThreadImpl = struct { : [ptr] "{g1}" (@intFromPtr(self.mapped.ptr)), [len] "{g2}" (self.mapped.len), [stack] "{g3}" (&sparc_exit_stack), - : .{ .memory = true }), + ), .sparc64 => asm volatile ( \\ // Ensure that the kernel only has to flush the current register window. \\ flushw @@ -1403,7 +1397,7 @@ const LinuxThreadImpl = struct { : [ptr] "{g1}" (@intFromPtr(self.mapped.ptr)), [len] "{g2}" (self.mapped.len), [stack] "{g3}" (&sparc_exit_stack), - : .{ .memory = true }), + ), .loongarch32, .loongarch64 => asm volatile ( \\ ori $a7, $zero, 215 # SYS_munmap \\ syscall 0 # call munmap @@ -1413,7 +1407,7 @@ const LinuxThreadImpl = struct { : : [ptr] "{r4}" (@intFromPtr(self.mapped.ptr)), [len] "{r5}" (self.mapped.len), - : .{ .memory = true }), + ), .csky => asm volatile ( \\ movi r7, 215 # SYS_munmap \\ trap 0 @@ -1423,7 +1417,7 @@ const LinuxThreadImpl = struct { : : [ptr] "{r0}" (@intFromPtr(self.mapped.ptr)), [len] "{r1}" (self.mapped.len), - : .{ .memory = true }), + ), .xtensa, .xtensaeb => asm volatile ( \\ movi a2, 81 // SYS_munmap \\ syscall @@ -1433,7 +1427,7 @@ const LinuxThreadImpl = struct { : : [ptr] "{a6}" (@intFromPtr(self.mapped.ptr)), [len] "{a3}" (self.mapped.len), - : .{ .memory = true }), + ), else => |cpu_arch| @compileError("Unsupported linux arch: " ++ @tagName(cpu_arch)), } unreachable; diff --git a/lib/std/atomic.zig b/lib/std/atomic.zig index afbb9137be5148f830dd2fb1cfc3eb5b3535e0b8..abc7b06f0adbfb51e58d33492282780564c06e3a 100644 --- a/lib/std/atomic.zig +++ b/lib/std/atomic.zig @@ -377,13 +377,16 @@ pub inline fn spinLoopHint() void { .aarch64_be, => asm volatile ("isb"), - // `yield` was introduced in v6k but is also available on v6m. // https://www.keil.com/support/man/docs/armasm/armasm_dom1361289926796.htm .arm, .armeb, + => if (comptime builtin.cpu.has(.arm, .has_v6k)) { + asm volatile ("yield"); + }, + .thumb, .thumbeb, - => if (comptime builtin.cpu.hasAny(.arm, &.{ .has_v6k, .has_v6m })) { + => if (comptime builtin.cpu.hasAny(.arm, &.{ .has_v6m, .thumb2 })) { asm volatile ("yield"); }, @@ -392,6 +395,14 @@ pub inline fn spinLoopHint() void { .hexagon, => asm volatile ("pause(#1)"), + .mips, + .mipsel, + .mips64, + .mips64el, + => if (comptime builtin.cpu.has(.mips, .mips32r2)) { + asm volatile ("pause"); + }, + .riscv32, .riscv32be, .riscv64, @@ -400,6 +411,12 @@ pub inline fn spinLoopHint() void { asm volatile ("pause"); }, + .sparc, + .sparc64, + => if (comptime builtin.cpu.hasAny(.sparc, &.{ .v8plus, .v9 })) { + asm volatile ("rd %%ccr, %%g0"); + }, + else => {}, } } diff --git a/lib/std/debug/Dwarf.zig b/lib/std/debug/Dwarf.zig index 2d6e2204a340effe84ef4d2c00f1b87ea5cc1a5c..525e9ce078882cc4fb8013762e323579a1d05126 100644 --- a/lib/std/debug/Dwarf.zig +++ b/lib/std/debug/Dwarf.zig @@ -1462,7 +1462,7 @@ pub fn ipRegNum(arch: std.Target.Cpu.Arch) ?u16 { .powerpc, .powerpcle, .powerpc64, .powerpc64le => 67, .riscv32, .riscv32be, .riscv64, .riscv64be => 65, .s390x => 65, - .sparc, .sparc64 => 32, + .sparc, .sparc64 => 65, .ve => 144, .x86 => 8, .x86_64 => 16, diff --git a/lib/std/debug/cpu_context.zig b/lib/std/debug/cpu_context.zig index ab90b9b2c27e374ef56148334eb83fcc13d6ba75..07bb43a4fa2997a61ea5b2286132de2c427ce648 100644 --- a/lib/std/debug/cpu_context.zig +++ b/lib/std/debug/cpu_context.zig @@ -349,6 +349,7 @@ const Alpha = extern struct { \\ stq $28, 0x0e0($0) \\ stq $29, 0x0e8($0) \\ stq $30, 0x0f0($0) + \\ stq $31, 0x0f8($0) \\ \\ br $1, 1f \\1: @@ -463,10 +464,11 @@ const Arm = struct { \\ stm r0, {r0-r12} \\ str r13, [r0, #0x34] \\ str r14, [r0, #0x38] - \\ str r15, [r0, #0x3c] + \\ mov r1, pc + \\ str r1, [r0, #0x3c] : : [r] "{r0}" (&ctx.r), - : .{ .memory = true }); + : .{ .r1 = true, .memory = true }); return ctx; } @@ -636,8 +638,8 @@ const Hexagon = extern struct { /// This is an `extern struct` so that inline assembly in `current` can use field offsets. const Kvx = extern struct { r: [64]Gpr, + pc: Gpr, ra: Gpr, - pc: Gpr, pub const Gpr = u64; @@ -716,38 +718,38 @@ const Lanai = extern struct { pub inline fn current() Lanai { var ctx: Lanai = undefined; asm volatile ( - \\ st %%r0, 0[r9] - \\ st %%r1, 4[r9] - \\ st %%r2, 8[r9] - \\ st %%r3, 12[r9] - \\ st %%r4, 16[r9] - \\ st %%r5, 20[r9] - \\ st %%r6, 24[r9] - \\ st %%r7, 28[r9] - \\ st %%r8, 32[r9] - \\ st %%r9, 36[r9] - \\ st %%r10, 40[r9] - \\ st %%r11, 44[r9] - \\ st %%r12, 48[r9] - \\ st %%r13, 52[r9] - \\ st %%r14, 56[r9] - \\ st %%r15, 60[r9] - \\ st %%r16, 64[r9] - \\ st %%r17, 68[r9] - \\ st %%r18, 72[r9] - \\ st %%r19, 76[r9] - \\ st %%r20, 80[r9] - \\ st %%r21, 84[r9] - \\ st %%r22, 88[r9] - \\ st %%r23, 92[r9] - \\ st %%r24, 96[r9] - \\ st %%r25, 100[r9] - \\ st %%r26, 104[r9] - \\ st %%r27, 108[r9] - \\ st %%r28, 112[r9] - \\ st %%r29, 116[r9] - \\ st %%r30, 120[r9] - \\ st %%r31, 124[r9] + \\ st %%r0, 0[%%r9] + \\ st %%r1, 4[%%r9] + \\ st %%r2, 8[%%r9] + \\ st %%r3, 12[%%r9] + \\ st %%r4, 16[%%r9] + \\ st %%r5, 20[%%r9] + \\ st %%r6, 24[%%r9] + \\ st %%r7, 28[%%r9] + \\ st %%r8, 32[%%r9] + \\ st %%r9, 36[%%r9] + \\ st %%r10, 40[%%r9] + \\ st %%r11, 44[%%r9] + \\ st %%r12, 48[%%r9] + \\ st %%r13, 52[%%r9] + \\ st %%r14, 56[%%r9] + \\ st %%r15, 60[%%r9] + \\ st %%r16, 64[%%r9] + \\ st %%r17, 68[%%r9] + \\ st %%r18, 72[%%r9] + \\ st %%r19, 76[%%r9] + \\ st %%r20, 80[%%r9] + \\ st %%r21, 84[%%r9] + \\ st %%r22, 88[%%r9] + \\ st %%r23, 92[%%r9] + \\ st %%r24, 96[%%r9] + \\ st %%r25, 100[%%r9] + \\ st %%r26, 104[%%r9] + \\ st %%r27, 108[%%r9] + \\ st %%r28, 112[%%r9] + \\ st %%r29, 116[%%r9] + \\ st %%r30, 120[%%r9] + \\ st %%r31, 124[%%r9] : : [ctx] "{r9}" (&ctx), : .{ .memory = true }); @@ -763,7 +765,7 @@ const Lanai = extern struct { pub fn dwarfRegisterBytes(ctx: *Lanai, register_num: u16) DwarfRegisterError![]u8 { switch (register_num) { - 0...31 => return @ptrCast(&ctx.s[register_num]), + 0...31 => return @ptrCast(&ctx.r[register_num]), else => return error.InvalidRegister, } @@ -1039,6 +1041,7 @@ const Mips = extern struct { \\ sd $fp, 240($t0) \\ sd $ra, 248($t0) \\ bal 1f + \\ nop \\1: \\ sd $ra, 256($t0) \\ .set pop @@ -1080,6 +1083,7 @@ const Mips = extern struct { \\ sw $fp, 120($t4) \\ sw $ra, 124($t4) \\ bal 1f + \\ nop \\1: \\ sw $ra, 128($t4) \\ .set pop @@ -1164,6 +1168,7 @@ const Or1k = extern struct { \\ l.sw 120(r15), r30 \\ l.sw 124(r15), r31 \\ l.jal 1f + \\ l.nop \\1: \\ l.sw 128(r15), r9 : @@ -1512,7 +1517,7 @@ const S390x = extern struct { /// This is an `extern struct` so that inline assembly in `current` can use field offsets. const Sparc = extern struct { - g: [8]Gpr, + g: [8]Gpr align(8), // Align to make `std` safe on 32-bit. o: [8]Gpr, l: [8]Gpr, i: [8]Gpr, @@ -1525,61 +1530,63 @@ const Sparc = extern struct { var ctx: Sparc = undefined; asm volatile (if (Gpr == u64) - \\ stx %g0, [%l0 + 0] - \\ stx %g1, [%l0 + 8] - \\ stx %g2, [%l0 + 16] - \\ stx %g3, [%l0 + 24] - \\ stx %g4, [%l0 + 32] - \\ stx %g5, [%l0 + 40] - \\ stx %g6, [%l0 + 48] - \\ stx %g7, [%l0 + 56] - \\ stx %o0, [%l0 + 64] - \\ stx %o1, [%l0 + 72] - \\ stx %o2, [%l0 + 80] - \\ stx %o3, [%l0 + 88] - \\ stx %o4, [%l0 + 96] - \\ stx %o5, [%l0 + 104] - \\ stx %o6, [%l0 + 112] - \\ stx %o7, [%l0 + 120] - \\ stx %l0, [%l0 + 128] - \\ stx %l1, [%l0 + 136] - \\ stx %l2, [%l0 + 144] - \\ stx %l3, [%l0 + 152] - \\ stx %l4, [%l0 + 160] - \\ stx %l5, [%l0 + 168] - \\ stx %l6, [%l0 + 176] - \\ stx %l7, [%l0 + 184] - \\ stx %i0, [%l0 + 192] - \\ stx %i1, [%l0 + 200] - \\ stx %i2, [%l0 + 208] - \\ stx %i3, [%l0 + 216] - \\ stx %i4, [%l0 + 224] - \\ stx %i5, [%l0 + 232] - \\ stx %i6, [%l0 + 240] - \\ stx %i7, [%l0 + 248] + \\ stx %%g0, [%%l0 + 0] + \\ stx %%g1, [%%l0 + 8] + \\ stx %%g2, [%%l0 + 16] + \\ stx %%g3, [%%l0 + 24] + \\ stx %%g4, [%%l0 + 32] + \\ stx %%g5, [%%l0 + 40] + \\ stx %%g6, [%%l0 + 48] + \\ stx %%g7, [%%l0 + 56] + \\ stx %%o0, [%%l0 + 64] + \\ stx %%o1, [%%l0 + 72] + \\ stx %%o2, [%%l0 + 80] + \\ stx %%o3, [%%l0 + 88] + \\ stx %%o4, [%%l0 + 96] + \\ stx %%o5, [%%l0 + 104] + \\ stx %%o6, [%%l0 + 112] + \\ stx %%o7, [%%l0 + 120] + \\ stx %%l0, [%%l0 + 128] + \\ stx %%l1, [%%l0 + 136] + \\ stx %%l2, [%%l0 + 144] + \\ stx %%l3, [%%l0 + 152] + \\ stx %%l4, [%%l0 + 160] + \\ stx %%l5, [%%l0 + 168] + \\ stx %%l6, [%%l0 + 176] + \\ stx %%l7, [%%l0 + 184] + \\ stx %%i0, [%%l0 + 192] + \\ stx %%i1, [%%l0 + 200] + \\ stx %%i2, [%%l0 + 208] + \\ stx %%i3, [%%l0 + 216] + \\ stx %%i4, [%%l0 + 224] + \\ stx %%i5, [%%l0 + 232] + \\ stx %%i6, [%%l0 + 240] + \\ stx %%i7, [%%l0 + 248] \\ call 1f + \\ nop \\1: - \\ stx %o7, [%l0 + 256] + \\ stx %%o7, [%%l0 + 256] else - \\ std %g0, [%l0 + 0] - \\ std %g2, [%l0 + 8] - \\ std %g4, [%l0 + 16] - \\ std %g6, [%l0 + 24] - \\ std %o0, [%l0 + 32] - \\ std %o2, [%l0 + 40] - \\ std %o4, [%l0 + 48] - \\ std %o6, [%l0 + 56] - \\ std %l0, [%l0 + 64] - \\ std %l2, [%l0 + 72] - \\ std %l4, [%l0 + 80] - \\ std %l6, [%l0 + 88] - \\ std %i0, [%l0 + 96] - \\ std %i2, [%l0 + 104] - \\ std %i4, [%l0 + 112] - \\ std %i6, [%l0 + 120] + \\ std %%g0, [%%l0 + 0] + \\ std %%g2, [%%l0 + 8] + \\ std %%g4, [%%l0 + 16] + \\ std %%g6, [%%l0 + 24] + \\ std %%o0, [%%l0 + 32] + \\ std %%o2, [%%l0 + 40] + \\ std %%o4, [%%l0 + 48] + \\ std %%o6, [%%l0 + 56] + \\ std %%l0, [%%l0 + 64] + \\ std %%l2, [%%l0 + 72] + \\ std %%l4, [%%l0 + 80] + \\ std %%l6, [%%l0 + 88] + \\ std %%i0, [%%l0 + 96] + \\ std %%i2, [%%l0 + 104] + \\ std %%i4, [%%l0 + 112] + \\ std %%i6, [%%l0 + 120] \\ call 1f + \\ nop \\1: - \\ st %o7, [%l0 + 128] + \\ st %%o7, [%%l0 + 128] : : [ctx] "{l0}" (&ctx), : .{ .o7 = true, .memory = true }); @@ -1608,7 +1615,11 @@ const Sparc = extern struct { 8...15 => return @ptrCast(&ctx.o[register_num - 8]), 16...23 => return @ptrCast(&ctx.l[register_num - 16]), 24...31 => return @ptrCast(&ctx.i[register_num - 24]), - 32 => return @ptrCast(&ctx.pc), + 65 => return @ptrCast(&ctx.pc), + + 32...63 => return error.UnsupportedRegister, // F0-F31 + 64 => return error.UnsupportedRegister, // Y + 72...87 => return error.UnsupportedRegister, // D0-D15 else => return error.InvalidRegister, } @@ -1689,9 +1700,8 @@ const Ve = extern struct { \\ st %%s61, 488(, %%s8) \\ st %%s62, 496(, %%s8) \\ st %%s63, 504(, %%s8) - \\ br.l 1f - \\1: - \\ st %%lr, 512(, %%s8) + \\ sic %%s10 + \\ st %%s10, 512(, %%s8) : : [ctx] "{s8}" (&ctx), : .{ .s10 = true, .memory = true }); @@ -1758,7 +1768,7 @@ const X86_16 = struct { switch (register_num) { 4 => return @ptrCast(ctx.regs.getPtr(.sp)), 5 => return @ptrCast(ctx.regs.getPtr(.bp)), - 6 => return @ptrCast(ctx.regs.getPtr(.ip)), + 8 => return @ptrCast(ctx.regs.getPtr(.ip)), 41 => return @ptrCast(ctx.regs.getPtr(.cs)), 42 => return @ptrCast(ctx.regs.getPtr(.ss)), else => return error.InvalidRegister, diff --git a/lib/std/os/linux/aarch64.zig b/lib/std/os/linux/aarch64.zig index 431097feccf104eba84a3f347fac6fe29ae1eb57..930b75bb322040189cbbddc0ccaaf2c5f7eb413d 100644 --- a/lib/std/os/linux/aarch64.zig +++ b/lib/std/os/linux/aarch64.zig @@ -116,55 +116,48 @@ pub fn clone() callconv(.naked) u64 { // syscall(SYS_clone, flags, stack, ptid, tls, ctid) // x8, x0, x1, x2, x3, x4 asm volatile ( - \\ // align stack and save func,arg - \\ and x1,x1,#-16 - \\ stp x0,x3,[x1,#-16]! + \\ // align stack and save func,arg + \\ and x1,x1,#-16 + \\ stp x0,x3,[x1,#-16]! \\ - \\ // syscall - \\ uxtw x0,w2 - \\ mov x2,x4 - \\ mov x3,x5 - \\ mov x4,x6 - \\ mov x8,#220 // SYS_clone - \\ svc #0 + \\ // syscall + \\ uxtw x0,w2 + \\ mov x2,x4 + \\ mov x3,x5 + \\ mov x4,x6 + \\ mov x8,#220 // SYS_clone + \\ svc #0 \\ - \\ cbz x0,1f - \\ // parent - \\ ret + \\ cbz x0,1f + \\ // parent + \\ ret \\ - \\ // child + \\ // child \\1: ); if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile ( - \\ .cfi_undefined lr + \\ .cfi_undefined lr ); asm volatile ( - \\ mov fp, 0 - \\ mov lr, 0 + \\ mov fp, 0 + \\ mov lr, 0 \\ - \\ ldp x1,x0,[sp],#16 - \\ blr x1 - \\ mov x8,#93 // SYS_exit - \\ svc #0 + \\ ldp x1,x0,[sp],#16 + \\ blr x1 + \\ mov x8,#93 // SYS_exit + \\ svc #0 ); } pub const restore = restore_rt; pub fn restore_rt() callconv(.naked) noreturn { - switch (builtin.zig_backend) { - .stage2_c => asm volatile ( - \\ mov w8, %[number] - \\ svc #0 - : - : [number] "i" (@backingInt(SYS.rt_sigreturn)), - ), - else => asm volatile ( - \\ svc #0 - : - : [number] "{x8}" (@backingInt(SYS.rt_sigreturn)), - ), - } + asm volatile ( + \\ mov w8, %[number] + \\ svc #0 + : + : [number] "i" (@backingInt(SYS.rt_sigreturn)), + ); } pub const VDSO = struct { diff --git a/lib/std/os/linux/alpha.zig b/lib/std/os/linux/alpha.zig index 20bf4bd14bbceacc74e2e9328dcfac74c7603b46..82baf15f167215bc94e6a2f705c1f1e34dc5cb04 100644 --- a/lib/std/os/linux/alpha.zig +++ b/lib/std/os/linux/alpha.zig @@ -295,8 +295,8 @@ pub fn clone() callconv(.naked) u64 { // a0 = $16, a1 = $17, a2 = $18, a3 = $19, // a4 = $20, a5 = $21, sp = $30, v0 = $0 \\ # Save function pointer and argument pointer on new thread stack - \\ ldi $1, -8 - \\ and $17, $17, $1 + \\ ldi $1, -16 + \\ and $17, $1, $17 \\ lda $17, -16($17) \\ stq $16, 0($17) \\ stq $19, 8($17) @@ -323,16 +323,16 @@ pub fn clone() callconv(.naked) u64 { \\ .cfi_undefined $26 ); asm volatile ( - // v0 = $0, t9 = $23, a0 = $16, ra = $26, sp = $30, fp = $15 + // v0 = $0, a0 = $16, ra = $26, sp = $30, fp = $15, pv = $27 \\ mov 0, $15 \\ - \\ ldq $23, 0($30) + \\ ldq $27, 0($30) \\ ldq $16, 8($30) \\ lda $30, 16($30) - \\ jsr $26, ($23) + \\ jsr $26, ($27) \\ \\ mov $0, $16 - \\ ldi $0, 1 # SYS_EXIT + \\ ldi $0, 1 # SYS_exit \\ callsys ); } @@ -341,7 +341,7 @@ pub fn restore() noreturn { asm volatile ( // v0 = $0, a0 = $16, sp = $30 \\ mov $30, $16 - \\ ldi $0, 103 # SIGRETURN + \\ ldi $0, 103 # SYS_sigreturn \\ callsys ); } @@ -350,7 +350,7 @@ pub fn restore_rt() noreturn { asm volatile ( // v0 = $0, a0 = $16, sp = $30 \\ mov $30, $16 - \\ ldi $0, 351 # RT_SIGRETURN + \\ ldi $0, 351 # SYS_rt_sigreturn \\ callsys ); } diff --git a/lib/std/os/linux/arc.zig b/lib/std/os/linux/arc.zig index 8721de28f9922068d405cda98f4b64da474b69ab..faef23963b6effd064af866192bcad3949aea2d1 100644 --- a/lib/std/os/linux/arc.zig +++ b/lib/std/os/linux/arc.zig @@ -116,56 +116,49 @@ pub fn clone() callconv(.naked) u32 { // syscall(SYS_clone, flags, stack, ptid, tls, ctid) // r8 r0, r1, r2, r3, r4 asm volatile ( - \\ // Align stack pointer - \\ and r1, r1, -16 - \\ mov r10, r0 - \\ mov r11, r3 - \\ // Setup the arguments - \\ mov r0, r2 - \\ mov r2, r4 - \\ mov r3, r5 - \\ mov r4, r6 - \\ mov r8, 220 // SYS_clone - \\ trap_s 0 - \\ cmp r0, 0 - \\ beq 1f - \\ j [blink] - \\ // Child - \\ 1: + \\ // Align stack pointer + \\ and r1, r1, -16 + \\ mov r10, r0 + \\ mov r11, r3 + \\ // Setup the arguments + \\ mov r0, r2 + \\ mov r2, r4 + \\ mov r3, r5 + \\ mov r4, r6 + \\ mov r8, 220 // SYS_clone + \\ trap_s 0 + \\ cmp r0, 0 + \\ beq 1f + \\ j [blink] + \\ // Child + \\1: ); if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile ( \\ .cfi_undefined blink ); asm volatile ( - \\ mov fp, 0 - \\ mov blink, 0 + \\ mov fp, 0 + \\ mov blink, 0 \\ - \\ mov r0, r11 - \\ jl [r10] + \\ mov r0, r11 + \\ jl [r10] \\ - \\ // Exit - \\ mov r8, 93 // SYS_exit - \\ trap_s 0 + \\ // Exit + \\ mov r8, 93 // SYS_exit + \\ trap_s 0 ); } pub const restore = restore_rt; pub fn restore_rt() callconv(.naked) noreturn { - switch (builtin.zig_backend) { - .stage2_c => asm volatile ( - \\ mov r8, %[number] - \\ trap_s 0 - : - : [number] "I" (@backingInt(SYS.rt_sigreturn)), - ), - else => asm volatile ( - \\ trap_s 0 - : - : [number] "{r8}" (@backingInt(SYS.rt_sigreturn)), - ), - } + asm volatile ( + \\ mov r8, %[number] + \\ trap_s 0 + : + : [number] "I" (@backingInt(SYS.rt_sigreturn)), + ); } pub const time_t = i64; diff --git a/lib/std/os/linux/arm.zig b/lib/std/os/linux/arm.zig index d198c03748a9ad119a477b0de580770d441396ea..522d1c925b5fc2e73377e8591a7a8ca72828ecde 100644 --- a/lib/std/os/linux/arm.zig +++ b/lib/std/os/linux/arm.zig @@ -116,65 +116,53 @@ pub fn clone() callconv(.naked) u32 { // syscall(SYS_clone, flags, stack, ptid, tls, ctid) // r7 r0, r1, r2, r3, r4 asm volatile ( - \\ stmfd sp!,{r4,r5,r6,r7} - \\ mov r7,#120 // SYS_clone - \\ mov r6,r3 - \\ mov r5,r0 - \\ mov r0,r2 - \\ and r1,r1,#-16 - \\ ldr r2,[sp,#16] - \\ ldr r3,[sp,#20] - \\ ldr r4,[sp,#24] - \\ svc 0 - \\ tst r0,r0 - \\ beq 1f - \\ ldmfd sp!,{r4,r5,r6,r7} - \\ bx lr + \\ stmfd sp!,{r4,r5,r6,r7} + \\ mov r7,#120 // SYS_clone + \\ mov r6,r3 + \\ mov r5,r0 + \\ mov r0,r2 + \\ and r1,r1,#-16 + \\ ldr r2,[sp,#16] + \\ ldr r3,[sp,#20] + \\ ldr r4,[sp,#24] + \\ svc 0 + \\ tst r0,r0 + \\ beq 1f + \\ ldmfd sp!,{r4,r5,r6,r7} + \\ bx lr \\ - \\ // https://github.com/llvm/llvm-project/issues/115891 - \\1: mov r7, #0 - \\ mov r11, #0 - \\ mov lr, #0 + \\ // https://github.com/llvm/llvm-project/issues/115891 + \\1: + \\ mov r7, #0 + \\ mov r11, #0 + \\ mov lr, #0 \\ - \\ mov r0,r6 - \\ bl 3f - \\ mov r7,#1 // SYS_exit - \\ svc 0 + \\ mov r0,r6 + \\ bl 3f + \\ mov r7,#1 // SYS_exit + \\ svc 0 \\ - \\3: bx r5 + \\3: + \\ bx r5 ); } pub fn restore() callconv(.naked) noreturn { - switch (builtin.zig_backend) { - .stage2_c => asm volatile ( - \\ mov r7, %[number] - \\ svc #0 - : - : [number] "I" (@backingInt(SYS.sigreturn)), - ), - else => asm volatile ( - \\ svc #0 - : - : [number] "{r7}" (@backingInt(SYS.sigreturn)), - ), - } + asm volatile ( + \\ mov r7, %[number] + \\ svc #0 + : + : [number] "I" (@backingInt(SYS.sigreturn)), + ); } pub fn restore_rt() callconv(.naked) noreturn { - switch (builtin.zig_backend) { - .stage2_c => asm volatile ( - \\ mov r7, %[number] - \\ svc #0 - : - : [number] "I" (@backingInt(SYS.rt_sigreturn)), - ), - else => asm volatile ( - \\ svc #0 - : - : [number] "{r7}" (@backingInt(SYS.rt_sigreturn)), - ), - } + asm volatile ( + \\ mov r7, %[number] + \\ svc #0 + : + : [number] "I" (@backingInt(SYS.rt_sigreturn)), + ); } pub const VDSO = struct { diff --git a/lib/std/os/linux/csky.zig b/lib/std/os/linux/csky.zig index 9a0e854979d79614c8b40235d39e5e03f873bb04..91b6becad8e9418f9d106013597a8dbcad56e822 100644 --- a/lib/std/os/linux/csky.zig +++ b/lib/std/os/linux/csky.zig @@ -113,14 +113,14 @@ pub fn clone() callconv(.naked) u32 { // __clone(func, stack, flags, arg, ptid, tls, ctid) // r0, r1, r2, r3, +0, +4, +8 // - // syscall(SYS_clone, flags, stack, ptid, tls, ctid) - // r7 r0, r1, r2, r3, r4 + // syscall(SYS_clone, flags, stack, ptid, ctid, tls) + // r7 r0, r1, r2, r3, r4 asm volatile ( \\ // Preserve callee-saved registers. \\ mov t0, r4 \\ mov t1, r7 \\ - \\ andi r1, r1, -8 + \\ andni r1, r1, 7 \\ \\ subi r1, 8 \\ stw r0, (r1, 0) diff --git a/lib/std/os/linux/mips.zig b/lib/std/os/linux/mips.zig index ca1e59053dcb5636c599d018160087f1067a5db9..ce15e83d4bfafa9d6bbf355f5cbad21aefc6d353 100644 --- a/lib/std/os/linux/mips.zig +++ b/lib/std/os/linux/mips.zig @@ -10,7 +10,6 @@ pub fn syscall0( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ subu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u32), @@ -25,7 +24,6 @@ pub fn syscall1( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ subu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u32), @@ -42,7 +40,6 @@ pub fn syscall2( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ subu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u32), @@ -61,7 +58,6 @@ pub fn syscall3( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ subu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u32), @@ -82,7 +78,6 @@ pub fn syscall4( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ subu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u32), @@ -111,7 +106,6 @@ pub fn syscall5( \\ syscall \\ addu $sp, $sp, 24 \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ subu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u32), @@ -140,7 +134,6 @@ pub fn syscall6( \\ syscall \\ addu $sp, $sp, 24 \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ subu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u32), @@ -172,7 +165,6 @@ pub fn syscall7( \\ syscall \\ addu $sp, $sp, 32 \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ subu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u32), @@ -193,7 +185,6 @@ pub fn syscall_pipe( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 2f \\ subu $v0, $zero, $v0 \\ b 2f \\1: @@ -229,7 +220,6 @@ pub fn clone() callconv(.naked) u32 { \\ li $v0, 4120 # SYS_clone \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 2f \\ subu $v0, $zero, $v0 \\ b 2f \\1: diff --git a/lib/std/os/linux/mips64.zig b/lib/std/os/linux/mips64.zig index a9ed38257c8c9fb3f25e44b7792b7d8ad1c61d93..aee211ec8aa3aa77265a79c9055df39b606cf390 100644 --- a/lib/std/os/linux/mips64.zig +++ b/lib/std/os/linux/mips64.zig @@ -10,7 +10,6 @@ pub fn syscall0( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ dsubu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u64), @@ -25,7 +24,6 @@ pub fn syscall1( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ dsubu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u64), @@ -42,7 +40,6 @@ pub fn syscall2( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ dsubu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u64), @@ -61,7 +58,6 @@ pub fn syscall3( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ dsubu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u64), @@ -82,7 +78,6 @@ pub fn syscall4( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ dsubu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u64), @@ -105,7 +100,6 @@ pub fn syscall5( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ dsubu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u64), @@ -130,7 +124,6 @@ pub fn syscall6( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ dsubu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u64), @@ -150,7 +143,6 @@ pub fn syscall_pipe( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 2f \\ dsubu $v0, $zero, $v0 \\ b 2f \\1: @@ -184,7 +176,6 @@ pub fn clone() callconv(.naked) u64 { \\ li $v0, 5055 # SYS_clone \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 2f \\ dsubu $v0, $zero, $v0 \\ b 2f \\1: diff --git a/lib/std/os/linux/mipsn32.zig b/lib/std/os/linux/mipsn32.zig index bc1744242729cc3cbce3f7b07215753e564b9461..fa9b2cc298d3a5c70707bbb020cf0669ac73f7c5 100644 --- a/lib/std/os/linux/mipsn32.zig +++ b/lib/std/os/linux/mipsn32.zig @@ -10,7 +10,6 @@ pub fn syscall0( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ subu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u32), @@ -25,7 +24,6 @@ pub fn syscall1( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ subu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u32), @@ -42,7 +40,6 @@ pub fn syscall2( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ subu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u32), @@ -61,7 +58,6 @@ pub fn syscall3( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ subu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u32), @@ -82,7 +78,6 @@ pub fn syscall4( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ subu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u32), @@ -105,7 +100,6 @@ pub fn syscall5( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ subu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u32), @@ -130,7 +124,6 @@ pub fn syscall6( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ subu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u32), @@ -150,7 +143,6 @@ pub fn syscall_pipe( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 2f \\ subu $v0, $zero, $v0 \\ b 2f \\1: @@ -171,7 +163,6 @@ pub fn syscall_lseek( return asm volatile ( \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 1f \\ dsubu $v0, $zero, $v0 \\1: : [ret] "={$2}" (-> u64), @@ -203,7 +194,6 @@ pub fn clone() callconv(.naked) u32 { \\ li $v0, 6055 # SYS_clone \\ syscall \\ beq $a3, $zero, 1f - \\ blez $v0, 2f \\ subu $v0, $zero, $v0 \\ b 2f \\1: diff --git a/lib/std/os/linux/or1k.zig b/lib/std/os/linux/or1k.zig index 2d27b49a8f4f44c4a8f601df3d108c8eedfe0f17..a54b9bd43ff5464c29d920d222c4988440a267d7 100644 --- a/lib/std/os/linux/or1k.zig +++ b/lib/std/os/linux/or1k.zig @@ -124,7 +124,8 @@ pub fn clone() callconv(.naked) u32 { // r11 r3, r4, r5, r6, r7 asm volatile ( \\ # Save function pointer and argument pointer on new thread stack - \\ l.andi r4, r4, -4 + \\ l.addi r13, r0, -4 + \\ l.and r4, r4, r13 \\ l.addi r4, r4, -8 \\ l.sw 0(r4), r3 \\ l.sw 4(r4), r6 @@ -138,7 +139,9 @@ pub fn clone() callconv(.naked) u32 { \\ l.sys 1 \\ l.sfeqi r11, 0 \\ l.bf 1f + \\ l.nop \\ l.jr r9 + \\ l.nop \\1: ); if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile ( @@ -151,6 +154,7 @@ pub fn clone() callconv(.naked) u32 { \\ l.lwz r11, 0(r1) \\ l.lwz r3, 4(r1) \\ l.jalr r11 + \\ l.nop \\ \\ l.ori r3, r11, 0 \\ l.ori r11, r0, 93 # SYS_exit diff --git a/lib/std/os/linux/powerpc.zig b/lib/std/os/linux/powerpc.zig index 614c981f8ff891e2e3fed978b65866da9d9a6ab3..b1ccf17b5594f4b60beb013f4b7f810e4f318705 100644 --- a/lib/std/os/linux/powerpc.zig +++ b/lib/std/os/linux/powerpc.zig @@ -16,7 +16,7 @@ pub fn syscall0( \\ sc \\ bns+ 1f \\ neg 3, 3 - \\ 1: + \\1: : [ret] "={r3}" (-> u32), [r0_out] "={r0}" (r0_out), : [number] "{r0}" (@backingInt(number)), @@ -33,7 +33,7 @@ pub fn syscall1( \\ sc \\ bns+ 1f \\ neg 3, 3 - \\ 1: + \\1: : [ret] "={r3}" (-> u32), [r0_out] "={r0}" (r0_out), : [number] "{r0}" (@backingInt(number)), @@ -53,7 +53,7 @@ pub fn syscall2( \\ sc \\ bns+ 1f \\ neg 3, 3 - \\ 1: + \\1: : [ret] "={r3}" (-> u32), [r0_out] "={r0}" (r0_out), [r4_out] "={r4}" (r4_out), @@ -77,7 +77,7 @@ pub fn syscall3( \\ sc \\ bns+ 1f \\ neg 3, 3 - \\ 1: + \\1: : [ret] "={r3}" (-> u32), [r0_out] "={r0}" (r0_out), [r4_out] "={r4}" (r4_out), @@ -105,7 +105,7 @@ pub fn syscall4( \\ sc \\ bns+ 1f \\ neg 3, 3 - \\ 1: + \\1: : [ret] "={r3}" (-> u32), [r0_out] "={r0}" (r0_out), [r4_out] "={r4}" (r4_out), @@ -137,7 +137,7 @@ pub fn syscall5( \\ sc \\ bns+ 1f \\ neg 3, 3 - \\ 1: + \\1: : [ret] "={r3}" (-> u32), [r0_out] "={r0}" (r0_out), [r4_out] "={r4}" (r4_out), @@ -173,7 +173,7 @@ pub fn syscall6( \\ sc \\ bns+ 1f \\ neg 3, 3 - \\ 1: + \\1: : [ret] "={r3}" (-> u32), [r0_out] "={r0}" (r0_out), [r4_out] "={r4}" (r4_out), @@ -200,8 +200,9 @@ pub fn clone() callconv(.naked) u32 { asm volatile ( \\ # store non-volatile regs r29, r30 on stack in order to put our \\ # start func and its arg there - \\ stwu 29, -16(1) - \\ stw 30, 4(1) + \\ stwu 1, -16(1) + \\ stw 29, 8(1) + \\ stw 30, 12(1) \\ \\ # save r3 (func) into r29, and r6(arg) into r30 \\ mr 29, 3 @@ -234,8 +235,8 @@ pub fn clone() callconv(.naked) u32 { \\ \\ # if not 0, restore stack and return \\ beq cr7, 2f - \\ lwz 29, 0(1) - \\ lwz 30, 4(1) + \\ lwz 29, 8(1) + \\ lwz 30, 12(1) \\ addi 1, 1, 16 \\ blr \\ @@ -247,7 +248,7 @@ pub fn clone() callconv(.naked) u32 { ); asm volatile ( \\ li 31, 0 - \\ mtlr 0 + \\ mtlr 31 \\ \\ #call funcptr: move arg (d) into r3 \\ mr 3, 30 @@ -262,35 +263,21 @@ pub fn clone() callconv(.naked) u32 { } pub fn restore() callconv(.naked) noreturn { - switch (builtin.zig_backend) { - .stage2_c => asm volatile ( - \\ li 0, %[number] - \\ sc - : - : [number] "i" (@backingInt(SYS.sigreturn)), - ), - else => asm volatile ( - \\ sc - : - : [number] "{r0}" (@backingInt(SYS.sigreturn)), - ), - } + asm volatile ( + \\ li 0, %[number] + \\ sc + : + : [number] "i" (@backingInt(SYS.sigreturn)), + ); } pub fn restore_rt() callconv(.naked) noreturn { - switch (builtin.zig_backend) { - .stage2_c => asm volatile ( - \\ li 0, %[number] - \\ sc - : - : [number] "i" (@backingInt(SYS.rt_sigreturn)), - ), - else => asm volatile ( - \\ sc - : - : [number] "{r0}" (@backingInt(SYS.rt_sigreturn)), - ), - } + asm volatile ( + \\ li 0, %[number] + \\ sc + : + : [number] "i" (@backingInt(SYS.rt_sigreturn)), + ); } pub const VDSO = struct { diff --git a/lib/std/os/linux/powerpc64.zig b/lib/std/os/linux/powerpc64.zig index 89f3dbde7b3736d7cc021d55f0b9fb753f347789..92963a2efbe089d164c4d9296f7596552c1abcc4 100644 --- a/lib/std/os/linux/powerpc64.zig +++ b/lib/std/os/linux/powerpc64.zig @@ -16,7 +16,7 @@ pub fn syscall0( \\ sc \\ bns+ 1f \\ neg 3, 3 - \\ 1: + \\1: : [ret] "={r3}" (-> u64), [r0_out] "={r0}" (r0_out), : [number] "{r0}" (@backingInt(number)), @@ -33,7 +33,7 @@ pub fn syscall1( \\ sc \\ bns+ 1f \\ neg 3, 3 - \\ 1: + \\1: : [ret] "={r3}" (-> u64), [r0_out] "={r0}" (r0_out), : [number] "{r0}" (@backingInt(number)), @@ -53,7 +53,7 @@ pub fn syscall2( \\ sc \\ bns+ 1f \\ neg 3, 3 - \\ 1: + \\1: : [ret] "={r3}" (-> u64), [r0_out] "={r0}" (r0_out), [r4_out] "={r4}" (r4_out), @@ -77,7 +77,7 @@ pub fn syscall3( \\ sc \\ bns+ 1f \\ neg 3, 3 - \\ 1: + \\1: : [ret] "={r3}" (-> u64), [r0_out] "={r0}" (r0_out), [r4_out] "={r4}" (r4_out), @@ -105,7 +105,7 @@ pub fn syscall4( \\ sc \\ bns+ 1f \\ neg 3, 3 - \\ 1: + \\1: : [ret] "={r3}" (-> u64), [r0_out] "={r0}" (r0_out), [r4_out] "={r4}" (r4_out), @@ -137,7 +137,7 @@ pub fn syscall5( \\ sc \\ bns+ 1f \\ neg 3, 3 - \\ 1: + \\1: : [ret] "={r3}" (-> u64), [r0_out] "={r0}" (r0_out), [r4_out] "={r4}" (r4_out), @@ -173,7 +173,7 @@ pub fn syscall6( \\ sc \\ bns+ 1f \\ neg 3, 3 - \\ 1: + \\1: : [ret] "={r3}" (-> u64), [r0_out] "={r0}" (r0_out), [r4_out] "={r4}" (r4_out), @@ -198,84 +198,70 @@ pub fn clone() callconv(.naked) u64 { // syscall(SYS_clone, flags, stack, ptid, tls, ctid) // 0 3, 4, 5, 6, 7 asm volatile ( - \\ # create initial stack frame for new thread - \\ clrrdi 4, 4, 4 - \\ li 0, 0 - \\ stdu 0,-32(4) + \\ # create initial stack frame for new thread + \\ clrrdi 4, 4, 4 + \\ li 0, 0 + \\ stdu 0,-32(4) \\ - \\ # save fn and arg to child stack - \\ std 3, 8(4) - \\ std 6, 16(4) + \\ # save fn and arg to child stack + \\ std 3, 8(4) + \\ std 6, 16(4) \\ - \\ # shuffle args into correct registers and call SYS_clone - \\ mr 3, 5 - \\ #mr 4, 4 - \\ mr 5, 7 - \\ mr 6, 8 - \\ mr 7, 9 - \\ li 0, 120 # SYS_clone = 120 - \\ sc + \\ # shuffle args into correct registers and call SYS_clone + \\ mr 3, 5 + \\ #mr 4, 4 + \\ mr 5, 7 + \\ mr 6, 8 + \\ mr 7, 9 + \\ li 0, 120 # SYS_clone = 120 + \\ sc \\ - \\ # if error, negate return (errno) - \\ bns+ 1f - \\ neg 3, 3 + \\ # if error, negate return (errno) + \\ bns+ 1f + \\ neg 3, 3 \\ \\1: - \\ # if we're the parent, return - \\ cmpwi cr7, 3, 0 - \\ bnelr cr7 + \\ # if we're the parent, return + \\ cmpwi cr7, 3, 0 + \\ bnelr cr7 \\ - \\ # we're the child + \\ # we're the child ); if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile ( - \\ .cfi_undefined lr + \\ .cfi_undefined lr ); asm volatile ( - \\ li 31, 0 - \\ mtlr 0 + \\ li 31, 0 + \\ mtlr 31 \\ - \\ # call fn(arg) - \\ ld 3, 16(1) - \\ ld 12, 8(1) - \\ mtctr 12 - \\ bctrl + \\ # call fn(arg) + \\ ld 3, 16(1) + \\ ld 12, 8(1) + \\ mtctr 12 + \\ bctrl \\ - \\ # call SYS_exit. exit code is already in r3 from fn return value - \\ li 0, 1 # SYS_exit = 1 - \\ sc + \\ # call SYS_exit. exit code is already in r3 from fn return value + \\ li 0, 1 # SYS_exit = 1 + \\ sc ); } pub fn restore() callconv(.naked) noreturn { - switch (builtin.zig_backend) { - .stage2_c => asm volatile ( - \\ li 0, %[number] - \\ sc - : - : [number] "i" (@backingInt(SYS.sigreturn)), - ), - else => asm volatile ( - \\ sc - : - : [number] "{r0}" (@backingInt(SYS.sigreturn)), - ), - } + asm volatile ( + \\ li 0, %[number] + \\ sc + : + : [number] "i" (@backingInt(SYS.sigreturn)), + ); } pub fn restore_rt() callconv(.naked) noreturn { - switch (builtin.zig_backend) { - .stage2_c => asm volatile ( - \\ li 0, %[number] - \\ sc - : - : [number] "i" (@backingInt(SYS.rt_sigreturn)), - ), - else => asm volatile ( - \\ sc - : - : [number] "{r0}" (@backingInt(SYS.rt_sigreturn)), - ), - } + asm volatile ( + \\ li 0, %[number] + \\ sc + : + : [number] "i" (@backingInt(SYS.rt_sigreturn)), + ); } pub const VDSO = struct { diff --git a/lib/std/os/linux/riscv32.zig b/lib/std/os/linux/riscv32.zig index ceabe30a87116d5e1ae8114d6f5751c4e15139f4..609e59151da3012b9de1061979767e3f94b0d3e6 100644 --- a/lib/std/os/linux/riscv32.zig +++ b/lib/std/os/linux/riscv32.zig @@ -116,40 +116,41 @@ pub fn clone() callconv(.naked) u32 { // syscall(SYS_clone, flags, stack, ptid, tls, ctid) // a7 a0, a1, a2, a3, a4 asm volatile ( - \\ # Save func and arg to stack - \\ addi a1, a1, -8 - \\ sw a0, 0(a1) - \\ sw a3, 4(a1) + \\ andi a1, a1, -16 + \\ # Save func and arg to stack + \\ addi a1, a1, -16 + \\ sw a0, 0(a1) + \\ sw a3, 4(a1) \\ - \\ # Call SYS_clone - \\ mv a0, a2 - \\ mv a2, a4 - \\ mv a3, a5 - \\ mv a4, a6 - \\ li a7, 220 # SYS_clone - \\ ecall + \\ # Call SYS_clone + \\ mv a0, a2 + \\ mv a2, a4 + \\ mv a3, a5 + \\ mv a4, a6 + \\ li a7, 220 # SYS_clone + \\ ecall \\ - \\ beqz a0, 1f - \\ # Parent - \\ ret + \\ beqz a0, 1f + \\ # Parent + \\ ret \\ - \\ # Child + \\ # Child \\1: ); if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile ( - \\ .cfi_undefined ra + \\ .cfi_undefined ra ); asm volatile ( - \\ mv fp, zero - \\ mv ra, zero + \\ mv fp, zero + \\ mv ra, zero \\ - \\ lw a1, 0(sp) - \\ lw a0, 4(sp) - \\ jalr a1 + \\ lw a1, 0(sp) + \\ lw a0, 4(sp) + \\ jalr a1 \\ - \\ # Exit - \\ li a7, 93 # SYS_exit - \\ ecall + \\ # Exit + \\ li a7, 93 # SYS_exit + \\ ecall ); } diff --git a/lib/std/os/linux/riscv64.zig b/lib/std/os/linux/riscv64.zig index 41dabbb47216c84af9e43ecbe8c89853aee7c584..3d3ce7dba36dd759c5124efaebcfd6c74c588bcb 100644 --- a/lib/std/os/linux/riscv64.zig +++ b/lib/std/os/linux/riscv64.zig @@ -116,40 +116,41 @@ pub fn clone() callconv(.naked) u64 { // syscall(SYS_clone, flags, stack, ptid, tls, ctid) // a7 a0, a1, a2, a3, a4 asm volatile ( - \\ # Save func and arg to stack - \\ addi a1, a1, -16 - \\ sd a0, 0(a1) - \\ sd a3, 8(a1) + \\ andi a1, a1, -16 + \\ # Save func and arg to stack + \\ addi a1, a1, -16 + \\ sd a0, 0(a1) + \\ sd a3, 8(a1) \\ - \\ # Call SYS_clone - \\ mv a0, a2 - \\ mv a2, a4 - \\ mv a3, a5 - \\ mv a4, a6 - \\ li a7, 220 # SYS_clone - \\ ecall + \\ # Call SYS_clone + \\ mv a0, a2 + \\ mv a2, a4 + \\ mv a3, a5 + \\ mv a4, a6 + \\ li a7, 220 # SYS_clone + \\ ecall \\ - \\ beqz a0, 1f - \\ # Parent - \\ ret + \\ beqz a0, 1f + \\ # Parent + \\ ret \\ - \\ # Child + \\ # Child \\1: ); if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile ( - \\ .cfi_undefined ra + \\ .cfi_undefined ra ); asm volatile ( - \\ mv fp, zero - \\ mv ra, zero + \\ mv fp, zero + \\ mv ra, zero \\ - \\ ld a1, 0(sp) - \\ ld a0, 8(sp) - \\ jalr a1 + \\ ld a1, 0(sp) + \\ ld a0, 8(sp) + \\ jalr a1 \\ - \\ # Exit - \\ li a7, 93 # SYS_exit - \\ ecall + \\ # Exit + \\ li a7, 93 # SYS_exit + \\ ecall ); } diff --git a/lib/std/os/linux/s390x.zig b/lib/std/os/linux/s390x.zig index 3c44beeb8df7bb5d7f0d7d7fb13f3c35c840da01..beebd97c1a89d9c6cb96a890b1fd74fd9a444337 100644 --- a/lib/std/os/linux/s390x.zig +++ b/lib/std/os/linux/s390x.zig @@ -111,98 +111,83 @@ pub fn syscall6( pub fn clone() callconv(.naked) u64 { asm volatile ( - \\# int clone( - \\# fn, a = r2 - \\# stack, b = r3 - \\# flags, c = r4 - \\# arg, d = r5 - \\# ptid, e = r6 - \\# tls, f = *(r15+160) - \\# ctid) g = *(r15+168) - \\# - \\# pseudo C code: - \\# tid = syscall(SYS_clone,b,c,e,g,f); - \\# if (!tid) syscall(SYS_exit, a(d)); - \\# return tid; + \\ # int clone( + \\ # fn, a = r2 + \\ # stack, b = r3 + \\ # flags, c = r4 + \\ # arg, d = r5 + \\ # ptid, e = r6 + \\ # tls, f = *(r15+160) + \\ # ctid) g = *(r15+168) + \\ # + \\ # pseudo C code: + \\ # tid = syscall(SYS_clone,b,c,e,g,f); + \\ # if (!tid) syscall(SYS_exit, a(d)); + \\ # return tid; \\ - \\# preserve call-saved register used as syscall arg - \\stg %%r6, 48(%%r15) + \\ # preserve call-saved register used as syscall arg + \\ stg %%r6, 48(%%r15) \\ - \\# create initial stack frame for new thread - \\nill %%r3, 0xfff8 - \\aghi %%r3, -160 - \\lghi %%r0, 0 - \\stg %%r0, 0(%%r3) + \\ # create initial stack frame for new thread + \\ nill %%r3, 0xfff8 + \\ aghi %%r3, -160 + \\ lghi %%r0, 0 + \\ stg %%r0, 0(%%r3) \\ - \\# save fn and arg to child stack - \\stg %%r2, 8(%%r3) - \\stg %%r5, 16(%%r3) + \\ # save fn and arg to child stack + \\ stg %%r2, 8(%%r3) + \\ stg %%r5, 16(%%r3) \\ - \\# shuffle args into correct registers and call SYS_clone - \\lgr %%r2, %%r3 - \\lgr %%r3, %%r4 - \\lgr %%r4, %%r6 - \\lg %%r5, 168(%%r15) - \\lg %%r6, 160(%%r15) - \\svc 120 + \\ # shuffle args into correct registers and call SYS_clone + \\ lgr %%r2, %%r3 + \\ lgr %%r3, %%r4 + \\ lgr %%r4, %%r6 + \\ lg %%r5, 168(%%r15) + \\ lg %%r6, 160(%%r15) + \\ svc 120 \\ - \\# restore call-saved register - \\lg %%r6, 48(%%r15) + \\ # restore call-saved register + \\ lg %%r6, 48(%%r15) \\ - \\# if error or if we're the parent, return - \\ltgr %%r2, %%r2 - \\bnzr %%r14 + \\ # if error or if we're the parent, return + \\ ltgr %%r2, %%r2 + \\ bnzr %%r14 \\ - \\# we're the child + \\ # we're the child ); if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile ( - \\.cfi_undefined %%r14 + \\ .cfi_undefined %%r14 ); asm volatile ( - \\lghi %%r11, 0 - \\lghi %%r14, 0 + \\ lghi %%r11, 0 + \\ lghi %%r14, 0 \\ - \\# call fn(arg) - \\lg %%r1, 8(%%r15) - \\lg %%r2, 16(%%r15) - \\basr %%r14, %%r1 - \\ - \\# call SYS_exit. exit code is already in r2 from fn return value - \\svc 1 + \\ # call fn(arg) + \\ lg %%r1, 8(%%r15) + \\ lg %%r2, 16(%%r15) + \\ basr %%r14, %%r1 \\ + \\ # call SYS_exit. exit code is already in r2 from fn return value + \\ svc 1 ); } pub fn restore() callconv(.naked) noreturn { - switch (builtin.zig_backend) { - .stage2_c => asm volatile ( - \\lghi %%r1, %[number] - \\svc 0 - : - : [number] "K" (@backingInt(SYS.sigreturn)), - ), - else => asm volatile ( - \\svc 0 - : - : [number] "{r1}" (@backingInt(SYS.sigreturn)), - ), - } + asm volatile ( + \\ lghi %%r1, %[number] + \\ svc 0 + : + : [number] "K" (@backingInt(SYS.sigreturn)), + ); } pub fn restore_rt() callconv(.naked) noreturn { - switch (builtin.zig_backend) { - .stage2_c => asm volatile ( - \\lghi %%r1, %[number] - \\svc 0 - : - : [number] "K" (@backingInt(SYS.rt_sigreturn)), - ), - else => asm volatile ( - \\svc 0 - : - : [number] "{r1}" (@backingInt(SYS.rt_sigreturn)), - ), - } + asm volatile ( + \\ lghi %%r1, %[number] + \\ svc 0 + : + : [number] "K" (@backingInt(SYS.rt_sigreturn)), + ); } pub const time_t = i64; diff --git a/lib/std/os/linux/sh.zig b/lib/std/os/linux/sh.zig index 02581ce183ddb67c2c2eda91cd57b88402d58217..bda7330343c722cdf211d6b17aa8edb250db48d3 100644 --- a/lib/std/os/linux/sh.zig +++ b/lib/std/os/linux/sh.zig @@ -167,8 +167,8 @@ pub fn clone() callconv(.naked) u32 { \\ mov #120, r3 ! SYS_clone \\ mov r6, r4 \\ mov.l @r15, r6 - \\ mov.l @(r15, 8), r7 - \\ mov.l @(r15, 4), r0 + \\ mov.l @(8, r15), r7 + \\ mov.l @(4, r15), r0 \\ trapa #31 \\ or r0, r0 \\ or r0, r0 diff --git a/lib/std/os/linux/sparc.zig b/lib/std/os/linux/sparc.zig index c8addd36c45bfc08aff71672c2aeef42bb948f06..10d4b98b9a55a595bed8bc7c386edcedefcc9847 100644 --- a/lib/std/os/linux/sparc.zig +++ b/lib/std/os/linux/sparc.zig @@ -214,11 +214,11 @@ pub fn clone() callconv(.naked) u32 { \\ \\ # Align, and add some extra space for the initial frame \\ and %%i1, -8, %%i1 - \\ sub %%i1, 96 + 2047, %%o1 + \\ sub %%i1, 96, %%o1 \\ \\ mov %%i4, %%o2 \\ mov %%i5, %%o3 - \\ ld [%%fp + 92 + 2047], %%o4 + \\ ld [%%fp + 92], %%o4 \\ t 0x10 \\ bcs 1f \\ nop diff --git a/lib/std/os/linux/tls.zig b/lib/std/os/linux/tls.zig index 81ccd5cb56eb90ff1d2d9582f45c6b22630a5173..aed76fc0cb2ee83318e5c0e2d72b0016cf44eb91 100644 --- a/lib/std/os/linux/tls.zig +++ b/lib/std/os/linux/tls.zig @@ -261,10 +261,9 @@ pub fn setThreadPointer(addr: usize) void { }, .alpha => { asm volatile ( - \\ lda $16, 0(%[addr]) \\ wruniq : - : [addr] "r" (addr), + : [addr] "{$16}" (addr), ); }, .arc, .arceb => { @@ -282,7 +281,7 @@ pub fn setThreadPointer(addr: usize) void { assert(rc == 0); }, .m68k => { - const rc = linux.syscall1(.set_thread_area, addr); + const rc = @call(.always_inline, linux.syscall1, .{ .set_thread_area, addr }); assert(rc == 0); }, .hexagon => { @@ -295,9 +294,10 @@ pub fn setThreadPointer(addr: usize) void { .hppa => { asm volatile ( \\ ble 0xe0(%%sr2, %%r0) + \\ nop : - : [addr] "={r26}" (addr), - : .{ .r29 = true }); + : [addr] "{r26}" (addr), + : .{ .r31 = true }); }, .loongarch32, .loongarch64 => { asm volatile ( @@ -357,7 +357,7 @@ pub fn setThreadPointer(addr: usize) void { }, .sh, .sheb => { asm volatile ( - \\ ldc gbr, %[addr] + \\ ldc %[addr], gbr : : [addr] "r" (addr), ); @@ -417,7 +417,7 @@ pub fn getThreadPointer() usize { \\ move %[ret], $tp : [ret] "=r" (-> usize), ), - .m68k => linux.syscall1(.get_thread_area), + .m68k => linux.syscall0(.get_thread_area), .mips, .mipsel, .mips64, .mips64el => asm ( \\ rdhwr %[ret], $29 : [ret] "=r" (-> usize), @@ -449,7 +449,7 @@ pub fn getThreadPointer() usize { : [ret] "=r" (-> usize), ), .sh, .sheb => asm ( - \\ stc %[ret], gbr + \\ stc gbr, %[ret] : [ret] "=r" (-> usize), ), .sparc, .sparc64 => asm ( diff --git a/lib/std/os/linux/x32.zig b/lib/std/os/linux/x32.zig index 429aac82973def7599ecc441d35409d085e9b28f..0e6d6b6c19aed9c378f8034a845ec2f7a66d9665 100644 --- a/lib/std/os/linux/x32.zig +++ b/lib/std/os/linux/x32.zig @@ -125,54 +125,46 @@ pub fn syscall_lseek( pub fn clone() callconv(.naked) u32 { asm volatile ( - \\ movl $0x40000038,%%eax // SYS_clone - \\ mov %%rdi,%%r11 - \\ mov %%rdx,%%rdi - \\ mov %%r8,%%rdx - \\ mov %%r9,%%r8 - \\ mov 8(%%rsp),%%r10d - \\ mov %%r11,%%r9 - \\ and $-16,%%rsi - \\ sub $8,%%rsi - \\ mov %%rcx,(%%rsi) - \\ syscall - \\ test %%eax,%%eax - \\ jz 1f - \\ ret + \\ movl $0x40000038,%%eax // SYS_clone + \\ mov %%rdi,%%r11 + \\ mov %%rdx,%%rdi + \\ mov %%r8,%%rdx + \\ mov %%r9,%%r8 + \\ mov 8(%%rsp),%%r10d + \\ mov %%r11,%%r9 + \\ and $-16,%%rsi + \\ sub $8,%%rsi + \\ mov %%rcx,(%%rsi) + \\ syscall + \\ test %%eax,%%eax + \\ jz 1f + \\ ret \\ \\1: ); if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile ( - \\ .cfi_undefined %%rip + \\ .cfi_undefined %%rip ); asm volatile ( - \\ xor %%ebp,%%ebp - \\ - \\ pop %%rdi - \\ call *%%r9 - \\ mov %%eax,%%edi - \\ movl $0x4000003c,%%eax // SYS_exit - \\ syscall + \\ xor %%ebp,%%ebp \\ + \\ pop %%rdi + \\ call *%%r9 + \\ mov %%eax,%%edi + \\ movl $0x4000003c,%%eax // SYS_exit + \\ syscall ); } pub const restore = restore_rt; pub fn restore_rt() callconv(.naked) noreturn { - switch (builtin.zig_backend) { - .stage2_c => asm volatile ( - \\ movl %[number], %%eax - \\ syscall - : - : [number] "i" (@backingInt(SYS.rt_sigreturn)), - ), - else => asm volatile ( - \\ syscall - : - : [number] "{rax}" (@backingInt(SYS.rt_sigreturn)), - ), - } + asm volatile ( + \\ movl %[number], %%eax + \\ syscall + : + : [number] "i" (@backingInt(SYS.rt_sigreturn)), + ); } pub const time_t = i64; diff --git a/lib/std/os/linux/x86.zig b/lib/std/os/linux/x86.zig index 8145bf2826c780bcd0e5b85de341b6dc7d6b1281..1537deb7751794f01973e5629614cd803ffc7bf7 100644 --- a/lib/std/os/linux/x86.zig +++ b/lib/std/os/linux/x86.zig @@ -142,81 +142,66 @@ pub fn clone() callconv(.naked) u32 { // syscall(SYS_clone, flags, stack, ptid, tls, ctid) // eax, ebx, ecx, edx, esi, edi asm volatile ( - \\ pushl %%ebp - \\ movl %%esp,%%ebp - \\ pushl %%ebx - \\ pushl %%esi - \\ pushl %%edi - \\ // Setup the arguments - \\ movl 16(%%ebp),%%ebx - \\ movl 12(%%ebp),%%ecx - \\ andl $-16,%%ecx - \\ subl $20,%%ecx - \\ movl 20(%%ebp),%%eax - \\ movl %%eax,4(%%ecx) - \\ movl 8(%%ebp),%%eax - \\ movl %%eax,0(%%ecx) - \\ movl 24(%%ebp),%%edx - \\ movl 28(%%ebp),%%esi - \\ movl 32(%%ebp),%%edi - \\ movl $120,%%eax // SYS_clone - \\ int $128 - \\ testl %%eax,%%eax - \\ jz 1f - \\ popl %%edi - \\ popl %%esi - \\ popl %%ebx - \\ popl %%ebp - \\ retl + \\ pushl %%ebp + \\ movl %%esp,%%ebp + \\ pushl %%ebx + \\ pushl %%esi + \\ pushl %%edi + \\ // Setup the arguments + \\ movl 16(%%ebp),%%ebx + \\ movl 12(%%ebp),%%ecx + \\ andl $-16,%%ecx + \\ subl $20,%%ecx + \\ movl 20(%%ebp),%%eax + \\ movl %%eax,4(%%ecx) + \\ movl 8(%%ebp),%%eax + \\ movl %%eax,0(%%ecx) + \\ movl 24(%%ebp),%%edx + \\ movl 28(%%ebp),%%esi + \\ movl 32(%%ebp),%%edi + \\ movl $120,%%eax // SYS_clone + \\ int $128 + \\ testl %%eax,%%eax + \\ jz 1f + \\ popl %%edi + \\ popl %%esi + \\ popl %%ebx + \\ popl %%ebp + \\ retl \\ \\1: ); if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile ( - \\ .cfi_undefined %%eip + \\ .cfi_undefined %%eip ); asm volatile ( - \\ xorl %%ebp,%%ebp + \\ xorl %%ebp,%%ebp \\ - \\ popl %%eax - \\ calll *%%eax - \\ movl %%eax,%%ebx - \\ movl $1,%%eax // SYS_exit - \\ int $128 + \\ popl %%eax + \\ calll *%%eax + \\ movl %%eax,%%ebx + \\ movl $1,%%eax // SYS_exit + \\ int $128 ); } pub fn restore() callconv(.naked) noreturn { - switch (builtin.zig_backend) { - .stage2_c => asm volatile ( - \\ addl $4, %%esp - \\ movl %[number], %%eax - \\ int $0x80 - : - : [number] "i" (@backingInt(SYS.sigreturn)), - ), - else => asm volatile ( - \\ addl $4, %%esp - \\ int $0x80 - : - : [number] "{eax}" (@backingInt(SYS.sigreturn)), - ), - } + asm volatile ( + \\ addl $4, %%esp + \\ movl %[number], %%eax + \\ int $0x80 + : + : [number] "i" (@backingInt(SYS.sigreturn)), + ); } pub fn restore_rt() callconv(.naked) noreturn { - switch (builtin.zig_backend) { - .stage2_c => asm volatile ( - \\ movl %[number], %%eax - \\ int $0x80 - : - : [number] "i" (@backingInt(SYS.rt_sigreturn)), - ), - else => asm volatile ( - \\ int $0x80 - : - : [number] "{eax}" (@backingInt(SYS.rt_sigreturn)), - ), - } + asm volatile ( + \\ movl %[number], %%eax + \\ int $0x80 + : + : [number] "i" (@backingInt(SYS.rt_sigreturn)), + ); } pub const VDSO = struct { diff --git a/lib/std/os/linux/x86_64.zig b/lib/std/os/linux/x86_64.zig index ae5808921c648f93130b26009940acc9376e97f9..9764941fbe5e774c081435b0d7378fd89ad1d083 100644 --- a/lib/std/os/linux/x86_64.zig +++ b/lib/std/os/linux/x86_64.zig @@ -111,54 +111,46 @@ pub fn syscall6( pub fn clone() callconv(.naked) u64 { asm volatile ( - \\ movl $56,%%eax // SYS_clone - \\ movq %%rdi,%%r11 - \\ movq %%rdx,%%rdi - \\ movq %%r8,%%rdx - \\ movq %%r9,%%r8 - \\ movq 8(%%rsp),%%r10 - \\ movq %%r11,%%r9 - \\ andq $-16,%%rsi - \\ subq $8,%%rsi - \\ movq %%rcx,(%%rsi) - \\ syscall - \\ testq %%rax,%%rax - \\ jz 1f - \\ retq + \\ movl $56,%%eax // SYS_clone + \\ movq %%rdi,%%r11 + \\ movq %%rdx,%%rdi + \\ movq %%r8,%%rdx + \\ movq %%r9,%%r8 + \\ movq 8(%%rsp),%%r10 + \\ movq %%r11,%%r9 + \\ andq $-16,%%rsi + \\ subq $8,%%rsi + \\ movq %%rcx,(%%rsi) + \\ syscall + \\ testq %%rax,%%rax + \\ jz 1f + \\ retq \\ \\1: ); if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile ( - \\ .cfi_undefined %%rip + \\ .cfi_undefined %%rip ); asm volatile ( - \\ xorl %%ebp,%%ebp - \\ - \\ popq %%rdi - \\ callq *%%r9 - \\ movl %%eax,%%edi - \\ movl $60,%%eax // SYS_exit - \\ syscall + \\ xorl %%ebp,%%ebp \\ + \\ popq %%rdi + \\ callq *%%r9 + \\ movl %%eax,%%edi + \\ movl $60,%%eax // SYS_exit + \\ syscall ); } pub const restore = restore_rt; pub fn restore_rt() callconv(.naked) noreturn { - switch (builtin.zig_backend) { - .stage2_c => asm volatile ( - \\ movl %[number], %%eax - \\ syscall - : - : [number] "i" (@backingInt(SYS.rt_sigreturn)), - ), - else => asm volatile ( - \\ syscall - : - : [number] "{rax}" (@backingInt(SYS.rt_sigreturn)), - ), - } + asm volatile ( + \\ movl %[number], %%eax + \\ syscall + : + : [number] "i" (@backingInt(SYS.rt_sigreturn)), + ); } pub const time_t = i64; diff --git a/lib/std/os/linux/xtensa.zig b/lib/std/os/linux/xtensa.zig index 839df53cace5d533c35bb986bcc08bcba8b5dd0c..0bda5a9331365dea6c333818b1624cbfd7aba444 100644 --- a/lib/std/os/linux/xtensa.zig +++ b/lib/std/os/linux/xtensa.zig @@ -173,19 +173,12 @@ pub fn clone() callconv(.naked) u32 { pub const restore = restore_rt; pub fn restore_rt() callconv(.naked) noreturn { - switch (builtin.zig_backend) { - .stage2_c => asm volatile ( - \\ movi a2, %[number] - \\ syscall - : - : [number] "I" (@backingInt(SYS.rt_sigreturn)), - ), - else => asm volatile ( - \\ syscall - : - : [number] "{a2}" (@backingInt(SYS.rt_sigreturn)), - ), - } + asm volatile ( + \\ movi a2, %[number] + \\ syscall + : + : [number] "I" (@backingInt(SYS.rt_sigreturn)), + ); } pub const VDSO = void; diff --git a/lib/std/pie.zig b/lib/std/pie.zig index bcec6acd590f391c56202ff897b364ee0d456554..988ecaa8d424931632ba21ee6f6b436f9402409a 100644 --- a/lib/std/pie.zig +++ b/lib/std/pie.zig @@ -83,7 +83,7 @@ inline fn getDynamicSymbol() [*]const elf.Dyn { \\ add %[ret], pc \\ b 2f \\1: - \\ .word _DYNAMIC-1b + \\ .word _DYNAMIC - 1b \\2: : [ret] "=r" (-> [*]const elf.Dyn), ), @@ -97,20 +97,29 @@ inline fn getDynamicSymbol() [*]const elf.Dyn { ), // The compiler is not required to load the GP register, so do it ourselves. .alpha => asm volatile ( + \\ .weak _DYNAMIC + \\ .hidden _DYNAMIC \\ br $29, 1f \\1: \\ ldgp $29, 0($29) - \\ ldq %[ret], -0x8000($29) + \\ ldah %[ret], _DYNAMIC($29) !gprelhigh + \\ lda %[ret], _DYNAMIC(%[ret]) !gprellow : [ret] "=r" (-> [*]const elf.Dyn), : - : .{ .r26 = true, .r29 = true }), - // The CSKY ABI requires the gb register to point to the GOT. Additionally, the first - // entry in the GOT is defined to hold the address of _DYNAMIC. + : .{ .r29 = true }), .csky => asm volatile ( - \\ mov %[ret], gb - \\ ldw %[ret], %[ret] + \\ .weak _DYNAMIC + \\ .hidden _DYNAMIC + \\ grs %[ret], 1f + \\ br 2f + \\1: + \\ .long _DYNAMIC - 1b + \\2: + \\ ldw r12, (%[ret], 0) + \\ addu %[ret], %[ret], r12 : [ret] "=r" (-> [*]const elf.Dyn), - ), + : + : .{ .r12 = true }), .hexagon => asm volatile ( \\ .weak _DYNAMIC \\ .hidden _DYNAMIC @@ -143,12 +152,20 @@ inline fn getDynamicSymbol() [*]const elf.Dyn { \\ .hidden _DYNAMIC \\ lea _DYNAMIC - . - 8, %[ret] \\ lea (%[ret], %%pc), %[ret] - : [ret] "=r" (-> [*]const elf.Dyn), + : [ret] "=a" (-> [*]const elf.Dyn), ), .microblaze, .microblazeel => asm volatile ( - \\ lwi %[ret], r20, 0 + \\ .weak _DYNAMIC + \\ .hidden _DYNAMIC + \\ mfs %[ret], rpc + \\ bri 1f + \\ .word _DYNAMIC - . + 8 + \\1: + \\ lwi r18, %[ret], 8 + \\ add %[ret], %[ret], r18 : [ret] "=r" (-> [*]const elf.Dyn), - ), + : + : .{ .r18 = true }), .mips, .mipsel => asm volatile ( \\ .weak _DYNAMIC \\ .hidden _DYNAMIC @@ -190,6 +207,7 @@ inline fn getDynamicSymbol() [*]const elf.Dyn { \\ .weak _DYNAMIC \\ .hidden _DYNAMIC \\ l.jal 1f + \\ l.nop \\ .word _DYNAMIC - . \\1: \\ l.lwz %[ret], 0(r9) @@ -212,11 +230,13 @@ inline fn getDynamicSymbol() [*]const elf.Dyn { .powerpc64, .powerpc64le => asm volatile ( \\ .weak _DYNAMIC \\ .hidden _DYNAMIC + \\ .balign 8 \\ bl 1f + \\ nop \\ .quad _DYNAMIC - . \\1: \\ mflr %[ret] - \\ ld 4, 0(%[ret]) + \\ ld 4, 4(%[ret]) \\ add %[ret], 4, %[ret] : [ret] "=r" (-> [*]const elf.Dyn), : @@ -245,24 +265,25 @@ inline fn getDynamicSymbol() [*]const elf.Dyn { \\ mov.l 1f, %[ret] \\ add r0, %[ret] \\ bra 2f - \\1: + \\ nop \\ .balign 4 - \\ .long DYNAMIC - . + \\1: + \\ .long _DYNAMIC - . \\2: : [ret] "=r" (-> [*]const elf.Dyn), : : .{ .r0 = true }), - // The compiler does not necessarily have any obligation to load the `l7` register (pointing - // to the GOT), so do it ourselves just in case. .sparc, .sparc64 => asm volatile ( - \\ sethi %%hi(_GLOBAL_OFFSET_TABLE_ - 4), %%l7 + \\ .weak _DYNAMIC + \\ .hidden _DYNAMIC + \\ sethi %%pc22(_DYNAMIC - 4), %[ret] \\ call 1f - \\ add %%l7, %%lo(_GLOBAL_OFFSET_TABLE_ + 4), %%l7 + \\ add %[ret], %%pc10(_DYNAMIC + 4), %[ret] \\1: - \\ add %%l7, %%o7, %[ret] + \\ add %[ret], %%o7, %[ret] : [ret] "=r" (-> [*]const elf.Dyn), : - : .{ .l7 = true }), + : .{ .o7 = true }), .xtensa, .xtensaeb => asm volatile ( \\ .weak _DYNAMIC \\ .hidden _DYNAMIC @@ -274,7 +295,7 @@ inline fn getDynamicSymbol() [*]const elf.Dyn { \\ .balign 4 \\ .word _DYNAMIC - . \\1: - \\ add a0, a0, 1 + \\ addi a0, a0, 1 \\ l32i a8, a0, 0 \\ add %[ret], a0, a8 : [ret] "=a" (-> [*]const elf.Dyn), diff --git a/lib/std/start.zig b/lib/std/start.zig index 6021da10325aa38a6be00d59ecc1d58634deba77..503de37118a60fabd7f45cf5d1ea7e362ee15e1e 100644 --- a/lib/std/start.zig +++ b/lib/std/start.zig @@ -247,7 +247,7 @@ fn _start() callconv(.naked) noreturn { \\ mov $30, $16 \\ ldi $1, -16 \\ and $30, $30, $1 - \\ jsr $26, %[posixCallMainAndExit] + \\ br $31, %[posixCallMainAndExit] , .arc, .arceb => // ARC v1 and v2 had a very low stack alignment requirement of 4; v3 increased it to 16. @@ -276,14 +276,16 @@ fn _start() callconv(.naked) noreturn { // `_DYNAMIC` as well. // r8 = FP \\ grs t0, 1f - \\ 1: + \\1: \\ lrw gb, 1b@GOTPC \\ addu gb, t0 \\ movi r8, 0 \\ movi lr, 0 \\ mov a0, sp - \\ andi sp, sp, -8 - \\ jmpi %[posixCallMainAndExit] + \\ andni sp, sp, 7 + \\ lrw t1, %[posixCallMainAndExit]@GOTOFF + \\ addu t1, gb + \\ jmp t1 , .hexagon => // r29 = SP, r30 = FP, r31 = LR @@ -293,7 +295,7 @@ fn _start() callconv(.naked) noreturn { \\ r29 = and(r29, #-8) \\ memw(r29 + #-8) = r29 \\ r29 = add(r29, #-8) - \\ call %[posixCallMainAndExit] + \\ jump %[posixCallMainAndExit] , .kvx => \\ make $fp = 0 @@ -324,15 +326,17 @@ fn _start() callconv(.naked) noreturn { \\ l.ori r2, r0, 0 \\ l.ori r9, r0, 0 \\ l.ori r3, r1, 0 - \\ l.andi r1, r1, -4 - \\ l.jal %[posixCallMainAndExit] + \\ l.addi r13, r0, -4 + \\ l.and r1, r1, r13 + \\ l.j %[posixCallMainAndExit] + \\ l.nop , .riscv32, .riscv32be, .riscv64, .riscv64be => \\ li fp, 0 \\ li ra, 0 \\ mv a0, sp \\ andi sp, sp, -16 - \\ tail %[posixCallMainAndExit]@plt + \\ tail %[posixCallMainAndExit] , .m68k => // Note that the - 8 is needed because pc in the jsr instruction points into the middle @@ -354,7 +358,7 @@ fn _start() callconv(.naked) noreturn { \\ or %%r1, %%r0, %%r0 \\ or %%r2, %%r31, %%r0 \\ clr %%r31, %%r31, 4<0> - \\ br.n %[posixCallMainAndExit] + \\ br %[posixCallMainAndExit] , .microblaze, .microblazeel => // r1 = SP, r15 = LR, r19 = FP, r20 = GP @@ -364,7 +368,7 @@ fn _start() callconv(.naked) noreturn { \\ addi r20, r20, _GLOBAL_OFFSET_TABLE_ + 8 \\ ori r5, r1, 0 \\ andi r1, r1, -4 - \\ brlid r15, %[posixCallMainAndExit] + \\ bri %[posixCallMainAndExit] , .mips, .mipsel => \\ move $fp, $zero @@ -383,7 +387,7 @@ fn _start() callconv(.naked) noreturn { \\ move $a0, $sp \\ and $sp, -8 \\ subu $sp, $sp, 16 - \\ jalr $t9 + \\ jr $t9 , .mips64, .mips64el => switch (builtin.abi) { .gnuabin32, .muslabin32, .abin32 => @@ -399,9 +403,9 @@ fn _start() callconv(.naked) noreturn { \\ addu $t9, $t9, $gp \\ move $ra, $zero \\ move $a0, $sp - \\ and $sp, -8 + \\ and $sp, -16 \\ subu $sp, $sp, 16 - \\ jalr $t9 + \\ jr $t9 , else => \\ move $fp, $zero @@ -422,7 +426,7 @@ fn _start() callconv(.naked) noreturn { \\ move $a0, $sp \\ and $sp, -16 \\ dsubu $sp, $sp, 16 - \\ jalr $t9 + \\ jr $t9 , }, .powerpc, .powerpcle => @@ -434,7 +438,7 @@ fn _start() callconv(.naked) noreturn { \\ stwu 1, -16(1) \\ stw 0, 0(1) \\ li 31, 0 - \\ mtlr 0 + \\ mtlr 31 \\ b %[posixCallMainAndExit] , .powerpc64, .powerpc64le => @@ -447,7 +451,7 @@ fn _start() callconv(.naked) noreturn { \\ li 0, 0 \\ stdu 0, -32(1) \\ li 31, 0 - \\ mtlr 0 + \\ mtlr 31 \\ b %[posixCallMainAndExit] \\ nop , @@ -472,12 +476,14 @@ fn _start() callconv(.naked) noreturn { \\ mov r15, r4 \\ mov #-4, r0 \\ and r0, r15 + \\ mova 2f, r0 \\ mov.l 2f, r1 - \\1: - \\ bsrf r1 - \\2: + \\ add r0, r1 + \\ jmp @r1 + \\ nop \\ .balign 4 - \\ .long %[posixCallMainAndExit]@PCREL - (1b + 4 - .) + \\1: + \\ .long %[posixCallMainAndExit] - . , .sparc => // argc is stored after a register window (16 registers * 4 bytes).