authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2021-05-22 18:20:20-04:00
committergravatar for noreply@github.comGitHub <noreply@github.com> 2021-05-22 18:20:20-04:00
log63aabbbba7872eb5178c32235bba260a13d6869a
treea2e0d6a99b6650073c65aa616b5a575d80902c52
parent7cd9b30e0aee01eec148b867e2f949e7449e258d
parentcba97e47730ff42df1da23e7019350a2d9e1a312
signaturebadge-question-mark Signed by PGP key 4AEE18F83AFDEB23

Merge pull request #8852 from Snektron/spirv

SPIR-V: More codegen

2 files changed, 588 insertions(+), 187 deletions(-)

src/codegen/spirv.zig+549-125
...@@ -14,63 +14,180 @@ const LazySrcLoc = Module.LazySrcLoc;...@@ -14,63 +14,180 @@ const LazySrcLoc = Module.LazySrcLoc;
14const ir = @import("../air.zig");14const ir = @import("../air.zig");
15const Inst = ir.Inst;15const Inst = ir.Inst;
1616
17pub const TypeMap = std.HashMap(Type, u32, Type.hash, Type.eql, std.hash_map.default_max_load_percentage);17pub const Word = u32;
18pub const ValueMap = std.AutoHashMap(*Inst, u32);18pub const ResultId = u32;
1919
20pub fn writeOpcode(code: *std.ArrayList(u32), opcode: Opcode, arg_count: u32) !void {20pub const TypeMap = std.HashMap(Type, ResultId, Type.hash, Type.eql, std.hash_map.default_max_load_percentage);
21 const word_count = arg_count + 1;21pub const InstMap = std.AutoHashMap(*Inst, ResultId);
22
23const IncomingBlock = struct {
24 src_label_id: ResultId,
25 break_value_id: ResultId,
26};
27
28pub const BlockMap = std.AutoHashMap(*Inst.Block, struct {
29 label_id: ResultId,
30 incoming_blocks: *std.ArrayListUnmanaged(IncomingBlock),
31});
32
33pub fn writeOpcode(code: *std.ArrayList(Word), opcode: Opcode, arg_count: u16) !void {
34 const word_count: Word = arg_count + 1;
22 try code.append((word_count << 16) | @enumToInt(opcode));35 try code.append((word_count << 16) | @enumToInt(opcode));
23}36}
2437
25pub fn writeInstruction(code: *std.ArrayList(u32), opcode: Opcode, args: []const u32) !void {38pub fn writeInstruction(code: *std.ArrayList(Word), opcode: Opcode, args: []const Word) !void {
26 try writeOpcode(code, opcode, @intCast(u32, args.len));39 try writeOpcode(code, opcode, @intCast(u16, args.len));
27 try code.appendSlice(args);40 try code.appendSlice(args);
28}41}
2942
30/// This structure represents a SPIR-V binary module being compiled, and keeps track of relevant information43pub fn writeInstructionWithString(code: *std.ArrayList(Word), opcode: Opcode, args: []const Word, str: []const u8) !void {
31/// such as code for the different logical sections, and the next result-id.44 // Str needs to be written zero-terminated, so we need to add one to the length.
45 const zero_terminated_len = str.len + 1;
46 const str_words = (zero_terminated_len + @sizeOf(Word) - 1) / @sizeOf(Word);
47
48 try writeOpcode(code, opcode, @intCast(u16, args.len + str_words));
49 try code.ensureUnusedCapacity(args.len + str_words);
50 code.appendSliceAssumeCapacity(args);
51
52 // TODO: Not actually sure whether this is correct for big-endian.
53 // See https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#Literal
54 var i: usize = 0;
55 while (i < zero_terminated_len) : (i += @sizeOf(Word)) {
56 var word: Word = 0;
57
58 var j: usize = 0;
59 while (j < @sizeOf(Word) and i + j < str.len) : (j += 1) {
60 word |= @as(Word, str[i + j]) << @intCast(std.math.Log2Int(Word), j * std.meta.bitCount(u8));
61 }
62
63 code.appendAssumeCapacity(word);
64 }
65}
66
67/// This structure represents a SPIR-V (binary) module being compiled, and keeps track of all relevant information.
68/// That includes the actual instructions, the current result-id bound, and data structures for querying result-id's
69/// of data which needs to be persistent over different calls to Decl code generation.
32pub const SPIRVModule = struct {70pub const SPIRVModule = struct {
33 next_result_id: u32,71 /// A general-purpose allocator which may be used to allocate temporary resources required for compilation.
34 types_globals_constants: std.ArrayList(u32),72 gpa: *Allocator,
35 fn_decls: std.ArrayList(u32),73
74 /// The parent module.
75 module: *Module,
76
77 /// SPIR-V instructions return result-ids. This variable holds the module-wide counter for these.
78 next_result_id: ResultId,
79
80 /// Code of the actual SPIR-V binary, divided into the relevant logical sections.
81 /// Note: To save some bytes, these could also be unmanaged, but since there is only one instance of SPIRVModule
82 /// and this removes some clutter in the rest of the backend, it's fine like this.
83 binary: struct {
84 /// OpCapability and OpExtension instructions (in that order).
85 capabilities_and_extensions: std.ArrayList(Word),
86
87 /// OpString, OpSourceExtension, OpSource, OpSourceContinued.
88 debug_strings: std.ArrayList(Word),
89
90 /// Type declaration instructions, constant instructions, global variable declarations, OpUndef instructions.
91 types_globals_constants: std.ArrayList(Word),
92
93 /// Regular functions.
94 fn_decls: std.ArrayList(Word),
95 },
96
97 /// Global type cache to reduce the amount of generated types.
98 types: TypeMap,
99
100 /// Cache for results of OpString instructions for module file names fed to OpSource.
101 /// Since OpString is pretty much only used for those, we don't need to keep track of all strings,
102 /// just the ones for OpLine. Note that OpLine needs the result of OpString, and not that of OpSource.
103 file_names: std.StringHashMap(ResultId),
36104
37 pub fn init(allocator: *Allocator) SPIRVModule {105 pub fn init(gpa: *Allocator, module: *Module) SPIRVModule {
38 return .{106 return .{
107 .gpa = gpa,
108 .module = module,
39 .next_result_id = 1, // 0 is an invalid SPIR-V result ID.109 .next_result_id = 1, // 0 is an invalid SPIR-V result ID.
40 .types_globals_constants = std.ArrayList(u32).init(allocator),110 .binary = .{
41 .fn_decls = std.ArrayList(u32).init(allocator),111 .capabilities_and_extensions = std.ArrayList(Word).init(gpa),
112 .debug_strings = std.ArrayList(Word).init(gpa),
113 .types_globals_constants = std.ArrayList(Word).init(gpa),
114 .fn_decls = std.ArrayList(Word).init(gpa),
115 },
116 .types = TypeMap.init(gpa),
117 .file_names = std.StringHashMap(ResultId).init(gpa),
42 };118 };
43 }119 }
44120
45 pub fn deinit(self: *SPIRVModule) void {121 pub fn deinit(self: *SPIRVModule) void {
46 self.types_globals_constants.deinit();122 self.file_names.deinit();
47 self.fn_decls.deinit();123 self.types.deinit();
124
125 self.binary.fn_decls.deinit();
126 self.binary.types_globals_constants.deinit();
127 self.binary.debug_strings.deinit();
128 self.binary.capabilities_and_extensions.deinit();
48 }129 }
49130
50 pub fn allocResultId(self: *SPIRVModule) u32 {131 pub fn allocResultId(self: *SPIRVModule) Word {
51 defer self.next_result_id += 1;132 defer self.next_result_id += 1;
52 return self.next_result_id;133 return self.next_result_id;
53 }134 }
54135
55 pub fn resultIdBound(self: *SPIRVModule) u32 {136 pub fn resultIdBound(self: *SPIRVModule) Word {
56 return self.next_result_id;137 return self.next_result_id;
57 }138 }
139
140 fn resolveSourceFileName(self: *SPIRVModule, decl: *Decl) !ResultId {
141 const path = decl.namespace.file_scope.sub_file_path;
142 const result = try self.file_names.getOrPut(path);
143 if (!result.found_existing) {
144 result.entry.value = self.allocResultId();
145 try writeInstructionWithString(&self.binary.debug_strings, .OpString, &[_]Word{result.entry.value}, path);
146 try writeInstruction(&self.binary.debug_strings, .OpSource, &[_]Word{
147 @enumToInt(spec.SourceLanguage.Unknown), // TODO: Register Zig source language.
148 0, // TODO: Zig version as u32?
149 result.entry.value,
150 });
151 }
152
153 return result.entry.value;
154 }
58};155};
59156
60/// This structure is used to compile a declaration, and contains all relevant meta-information to deal with that.157/// This structure is used to compile a declaration, and contains all relevant meta-information to deal with that.
61pub const DeclGen = struct {158pub const DeclGen = struct {
62 module: *Module,159 /// The SPIR-V module code should be put in.
63 spv: *SPIRVModule,160 spv: *SPIRVModule,
64161
65 args: std.ArrayList(u32),162 /// An array of function argument result-ids. Each index corresponds with the function argument of the same index.
163 args: std.ArrayList(ResultId),
164
165 /// A counter to keep track of how many `arg` instructions we've seen yet.
66 next_arg_index: u32,166 next_arg_index: u32,
67167
68 types: TypeMap,168 /// A map keeping track of which instruction generated which result-id.
69 values: ValueMap,169 inst_results: InstMap,
170
171 /// We need to keep track of result ids for block labels, as well as the 'incoming' blocks for a block.
172 blocks: BlockMap,
70173
174 /// The label of the SPIR-V block we are currently generating.
175 current_block_label_id: ResultId,
176
177 /// The actual instructions for this function. We need to declare all locals in the first block, and because we don't
178 /// know which locals there are going to be, we're just going to generate everything after the locals-section in this array.
179 /// Note: It will not contain OpFunction, OpFunctionParameter, OpVariable and the initial OpLabel. These will be generated
180 /// into spv.binary.fn_decls directly.
181 code: std.ArrayList(Word),
182
183 /// The decl we are currently generating code for.
71 decl: *Decl,184 decl: *Decl,
185
186 /// If `gen` returned `Error.AnalysisFail`, this contains an explanatory message. Memory is owned by
187 /// `module.gpa`.
72 error_msg: ?*Module.ErrorMsg,188 error_msg: ?*Module.ErrorMsg,
73189
190 /// Possible errors the `gen` function may return.
74 const Error = error{ AnalysisFail, OutOfMemory };191 const Error = error{ AnalysisFail, OutOfMemory };
75192
76 /// This structure is used to return information about a type typically used for arithmetic operations.193 /// This structure is used to return information about a type typically used for arithmetic operations.
...@@ -117,19 +234,69 @@ pub const DeclGen = struct {...@@ -117,19 +234,69 @@ pub const DeclGen = struct {
117 class: Class,234 class: Class,
118 };235 };
119236
237 /// Initialize the common resources of a DeclGen. Some fields are left uninitialized, only set when `gen` is called.
238 pub fn init(spv: *SPIRVModule) DeclGen {
239 return .{
240 .spv = spv,
241 .args = std.ArrayList(ResultId).init(spv.gpa),
242 .next_arg_index = undefined,
243 .inst_results = InstMap.init(spv.gpa),
244 .blocks = BlockMap.init(spv.gpa),
245 .current_block_label_id = undefined,
246 .code = std.ArrayList(Word).init(spv.gpa),
247 .decl = undefined,
248 .error_msg = undefined,
249 };
250 }
251
252 /// Generate the code for `decl`. If a reportable error occured during code generation,
253 /// a message is returned by this function. Callee owns the memory. If this function returns such
254 /// a reportable error, it is valid to be called again for a different decl.
255 pub fn gen(self: *DeclGen, decl: *Decl) !?*Module.ErrorMsg {
256 // Reset internal resources, we don't want to re-allocate these.
257 self.args.items.len = 0;
258 self.next_arg_index = 0;
259 self.inst_results.clearRetainingCapacity();
260 self.blocks.clearRetainingCapacity();
261 self.current_block_label_id = undefined;
262 self.code.items.len = 0;
263 self.decl = decl;
264 self.error_msg = null;
265
266 try self.genDecl();
267 return self.error_msg;
268 }
269
270 /// Free resources owned by the DeclGen.
271 pub fn deinit(self: *DeclGen) void {
272 self.args.deinit();
273 self.inst_results.deinit();
274 self.blocks.deinit();
275 self.code.deinit();
276 }
277
278 fn getTarget(self: *DeclGen) std.Target {
279 return self.spv.module.getTarget();
280 }
281
120 fn fail(self: *DeclGen, src: LazySrcLoc, comptime format: []const u8, args: anytype) Error {282 fn fail(self: *DeclGen, src: LazySrcLoc, comptime format: []const u8, args: anytype) Error {
121 @setCold(true);283 @setCold(true);
122 const src_loc = src.toSrcLocWithDecl(self.decl);284 const src_loc = src.toSrcLocWithDecl(self.decl);
123 self.error_msg = try Module.ErrorMsg.create(self.module.gpa, src_loc, format, args);285 self.error_msg = try Module.ErrorMsg.create(self.spv.module.gpa, src_loc, format, args);
124 return error.AnalysisFail;286 return error.AnalysisFail;
125 }287 }
126288
127 fn resolve(self: *DeclGen, inst: *Inst) !u32 {289 fn resolve(self: *DeclGen, inst: *Inst) !ResultId {
128 if (inst.value()) |val| {290 if (inst.value()) |val| {
129 return self.genConstant(inst.ty, val);291 return self.genConstant(inst.src, inst.ty, val);
130 }292 }
131293
132 return self.values.get(inst).?; // Instruction does not dominate all uses!294 return self.inst_results.get(inst).?; // Instruction does not dominate all uses!
295 }
296
297 fn beginSPIRVBlock(self: *DeclGen, label_id: ResultId) !void {
298 try writeInstruction(&self.code, .OpLabel, &[_]Word{label_id});
299 self.current_block_label_id = label_id;
133 }300 }
134301
135 /// SPIR-V requires enabling specific integer sizes through capabilities, and so if they are not enabled, we need302 /// SPIR-V requires enabling specific integer sizes through capabilities, and so if they are not enabled, we need
...@@ -143,9 +310,9 @@ pub const DeclGen = struct {...@@ -143,9 +310,9 @@ pub const DeclGen = struct {
143 /// TODO: This probably needs an ABI-version as well (especially in combination with SPV_INTEL_arbitrary_precision_integers).310 /// TODO: This probably needs an ABI-version as well (especially in combination with SPV_INTEL_arbitrary_precision_integers).
144 /// TODO: Should the result of this function be cached?311 /// TODO: Should the result of this function be cached?
145 fn backingIntBits(self: *DeclGen, bits: u16) ?u16 {312 fn backingIntBits(self: *DeclGen, bits: u16) ?u16 {
146 const target = self.module.getTarget();313 const target = self.getTarget();
147314
148 // TODO: Figure out what to do with u0/i0.315 // The backend will never be asked to compiler a 0-bit integer, so we won't have to handle those in this function.
149 std.debug.assert(bits != 0);316 std.debug.assert(bits != 0);
150317
151 // 8, 16 and 64-bit integers require the Int8, Int16 and Inr64 capabilities respectively.318 // 8, 16 and 64-bit integers require the Int8, Int16 and Inr64 capabilities respectively.
...@@ -178,7 +345,7 @@ pub const DeclGen = struct {...@@ -178,7 +345,7 @@ pub const DeclGen = struct {
178 /// is no way of knowing whether those are actually supported.345 /// is no way of knowing whether those are actually supported.
179 /// TODO: Maybe this should be cached?346 /// TODO: Maybe this should be cached?
180 fn largestSupportedIntBits(self: *DeclGen) u16 {347 fn largestSupportedIntBits(self: *DeclGen) u16 {
181 const target = self.module.getTarget();348 const target = self.getTarget();
182 return if (Target.spirv.featureSetHas(target.cpu.features, .Int64))349 return if (Target.spirv.featureSetHas(target.cpu.features, .Int64))
183 64350 64
184 else351 else
...@@ -193,8 +360,7 @@ pub const DeclGen = struct {...@@ -193,8 +360,7 @@ pub const DeclGen = struct {
193 }360 }
194361
195 fn arithmeticTypeInfo(self: *DeclGen, ty: Type) !ArithmeticTypeInfo {362 fn arithmeticTypeInfo(self: *DeclGen, ty: Type) !ArithmeticTypeInfo {
196 const target = self.module.getTarget();363 const target = self.getTarget();
197
198 return switch (ty.zigTypeTag()) {364 return switch (ty.zigTypeTag()) {
199 .Bool => ArithmeticTypeInfo{365 .Bool => ArithmeticTypeInfo{
200 .bits = 1, // Doesn't matter for this class.366 .bits = 1, // Doesn't matter for this class.
...@@ -229,72 +395,108 @@ pub const DeclGen = struct {...@@ -229,72 +395,108 @@ pub const DeclGen = struct {
229395
230 /// Generate a constant representing `val`.396 /// Generate a constant representing `val`.
231 /// TODO: Deduplication?397 /// TODO: Deduplication?
232 fn genConstant(self: *DeclGen, ty: Type, val: Value) Error!u32 {398 fn genConstant(self: *DeclGen, src: LazySrcLoc, ty: Type, val: Value) Error!ResultId {
233 const code = &self.spv.types_globals_constants;399 const target = self.getTarget();
400 const code = &self.spv.binary.types_globals_constants;
234 const result_id = self.spv.allocResultId();401 const result_id = self.spv.allocResultId();
235 const result_type_id = try self.getOrGenType(ty);402 const result_type_id = try self.genType(src, ty);
236403
237 if (val.isUndef()) {404 if (val.isUndef()) {
238 try writeInstruction(code, .OpUndef, &[_]u32{ result_type_id, result_id });405 try writeInstruction(code, .OpUndef, &[_]Word{ result_type_id, result_id });
239 return result_id;406 return result_id;
240 }407 }
241408
242 switch (ty.zigTypeTag()) {409 switch (ty.zigTypeTag()) {
410 .Int => {
411 const int_info = ty.intInfo(target);
412 const backing_bits = self.backingIntBits(int_info.bits) orelse {
413 // Integers too big for any native type are represented as "composite integers": An array of largestSupportedIntBits.
414 return self.fail(src, "TODO: SPIR-V backend: implement composite int constants for {}", .{ty});
415 };
416
417 // We can just use toSignedInt/toUnsignedInt here as it returns u64 - a type large enough to hold any
418 // SPIR-V native type (up to i/u64 with Int64). If SPIR-V ever supports native ints of a larger size, this
419 // might need to be updated.
420 std.debug.assert(self.largestSupportedIntBits() <= std.meta.bitCount(u64));
421 var int_bits = if (ty.isSignedInt()) @bitCast(u64, val.toSignedInt()) else val.toUnsignedInt();
422
423 // Mask the low bits which make up the actual integer. This is to make sure that negative values
424 // only use the actual bits of the type.
425 // TODO: Should this be the backing type bits or the actual type bits?
426 int_bits &= (@as(u64, 1) << @intCast(u6, backing_bits)) - 1;
427
428 switch (backing_bits) {
429 0 => unreachable,
430 1...32 => try writeInstruction(code, .OpConstant, &[_]Word{
431 result_type_id,
432 result_id,
433 @truncate(u32, int_bits),
434 }),
435 33...64 => try writeInstruction(code, .OpConstant, &[_]Word{
436 result_type_id,
437 result_id,
438 @truncate(u32, int_bits),
439 @truncate(u32, int_bits >> @bitSizeOf(u32)),
440 }),
441 else => unreachable, // backing_bits is bounded by largestSupportedIntBits.
442 }
443 },
243 .Bool => {444 .Bool => {
244 const opcode: Opcode = if (val.toBool()) .OpConstantTrue else .OpConstantFalse;445 const opcode: Opcode = if (val.toBool()) .OpConstantTrue else .OpConstantFalse;
245 try writeInstruction(code, opcode, &[_]u32{ result_type_id, result_id });446 try writeInstruction(code, opcode, &[_]Word{ result_type_id, result_id });
246 },447 },
247 .Float => {448 .Float => {
248 // At this point we are guaranteed that the target floating point type is supported, otherwise the function449 // At this point we are guaranteed that the target floating point type is supported, otherwise the function
249 // would have exited at getOrGenType(ty).450 // would have exited at genType(ty).
250451
251 // f16 and f32 require one word of storage. f64 requires 2, low-order first.452 // f16 and f32 require one word of storage. f64 requires 2, low-order first.
252453
253 switch (val.tag()) {454 switch (ty.floatBits(target)) {
254 .float_16 => try writeInstruction(code, .OpConstant, &[_]u32{ result_type_id, result_id, @bitCast(u16, val.castTag(.float_16).?.data) }),455 16 => try writeInstruction(code, .OpConstant, &[_]Word{ result_type_id, result_id, @bitCast(u16, val.toFloat(f16)) }),
255 .float_32 => try writeInstruction(code, .OpConstant, &[_]u32{ result_type_id, result_id, @bitCast(u32, val.castTag(.float_32).?.data) }),456 32 => try writeInstruction(code, .OpConstant, &[_]Word{ result_type_id, result_id, @bitCast(u32, val.toFloat(f32)) }),
256 .float_64 => {457 64 => {
257 const float_bits = @bitCast(u64, val.castTag(.float_64).?.data);458 const float_bits = @bitCast(u64, val.toFloat(f64));
258 try writeInstruction(code, .OpConstant, &[_]u32{459 try writeInstruction(code, .OpConstant, &[_]Word{
259 result_type_id,460 result_type_id,
260 result_id,461 result_id,
261 @truncate(u32, float_bits),462 @truncate(u32, float_bits),
262 @truncate(u32, float_bits >> 32),463 @truncate(u32, float_bits >> @bitSizeOf(u32)),
263 });464 });
264 },465 },
265 .float_128 => unreachable, // Filtered out in the call to getOrGenType.466 128 => unreachable, // Filtered out in the call to genType.
266 // TODO: What tags do we need to handle here anyway?467 // TODO: Insert case for long double when the layout for that is determined.
267 else => return self.fail(.{ .node_offset = 0 }, "TODO: SPIR-V backend: float constant generation of value {s}\n", .{val.tag()}),468 else => unreachable,
268 }469 }
269 },470 },
270 else => return self.fail(.{ .node_offset = 0 }, "TODO: SPIR-V backend: constant generation of type {s}\n", .{ty.zigTypeTag()}),471 .Void => unreachable,
472 else => return self.fail(src, "TODO: SPIR-V backend: constant generation of type {}", .{ty}),
271 }473 }
272474
273 return result_id;475 return result_id;
274 }476 }
275477
276 fn getOrGenType(self: *DeclGen, ty: Type) Error!u32 {478 fn genType(self: *DeclGen, src: LazySrcLoc, ty: Type) Error!ResultId {
277 // We can't use getOrPut here so we can recursively generate types.479 // We can't use getOrPut here so we can recursively generate types.
278 if (self.types.get(ty)) |already_generated| {480 if (self.spv.types.get(ty)) |already_generated| {
279 return already_generated;481 return already_generated;
280 }482 }
281483
282 const target = self.module.getTarget();484 const target = self.getTarget();
283 const code = &self.spv.types_globals_constants;485 const code = &self.spv.binary.types_globals_constants;
284 const result_id = self.spv.allocResultId();486 const result_id = self.spv.allocResultId();
285487
286 switch (ty.zigTypeTag()) {488 switch (ty.zigTypeTag()) {
287 .Void => try writeInstruction(code, .OpTypeVoid, &[_]u32{result_id}),489 .Void => try writeInstruction(code, .OpTypeVoid, &[_]Word{result_id}),
288 .Bool => try writeInstruction(code, .OpTypeBool, &[_]u32{result_id}),490 .Bool => try writeInstruction(code, .OpTypeBool, &[_]Word{result_id}),
289 .Int => {491 .Int => {
290 const int_info = ty.intInfo(target);492 const int_info = ty.intInfo(target);
291 const backing_bits = self.backingIntBits(int_info.bits) orelse {493 const backing_bits = self.backingIntBits(int_info.bits) orelse {
292 // Integers too big for any native type are represented as "composite integers": An array of largestSupportedIntBits.494 // Integers too big for any native type are represented as "composite integers": An array of largestSupportedIntBits.
293 return self.fail(.{ .node_offset = 0 }, "TODO: SPIR-V backend: implement composite ints {}", .{ty});495 return self.fail(src, "TODO: SPIR-V backend: implement composite int {}", .{ty});
294 };496 };
295497
296 // TODO: If backing_bits != int_info.bits, a duplicate type might be generated here.498 // TODO: If backing_bits != int_info.bits, a duplicate type might be generated here.
297 try writeInstruction(code, .OpTypeInt, &[_]u32{499 try writeInstruction(code, .OpTypeInt, &[_]Word{
298 result_id,500 result_id,
299 backing_bits,501 backing_bits,
300 switch (int_info.signedness) {502 switch (int_info.signedness) {
...@@ -316,38 +518,40 @@ pub const DeclGen = struct {...@@ -316,38 +518,40 @@ pub const DeclGen = struct {
316 };518 };
317519
318 if (!supported) {520 if (!supported) {
319 return self.fail(.{ .node_offset = 0 }, "Floating point width of {} bits is not supported for the current SPIR-V feature set", .{bits});521 return self.fail(src, "Floating point width of {} bits is not supported for the current SPIR-V feature set", .{bits});
320 }522 }
321523
322 try writeInstruction(code, .OpTypeFloat, &[_]u32{ result_id, bits });524 try writeInstruction(code, .OpTypeFloat, &[_]Word{ result_id, bits });
323 },525 },
324 .Fn => {526 .Fn => {
325 // We only support zig-calling-convention functions, no varargs.527 // We only support zig-calling-convention functions, no varargs.
326 if (ty.fnCallingConvention() != .Unspecified)528 if (ty.fnCallingConvention() != .Unspecified)
327 return self.fail(.{ .node_offset = 0 }, "Unsupported calling convention for SPIR-V", .{});529 return self.fail(src, "Unsupported calling convention for SPIR-V", .{});
328 if (ty.fnIsVarArgs())530 if (ty.fnIsVarArgs())
329 return self.fail(.{ .node_offset = 0 }, "VarArgs unsupported for SPIR-V", .{});531 return self.fail(src, "VarArgs unsupported for SPIR-V", .{});
330532
331 // In order to avoid a temporary here, first generate all the required types and then simply look them up533 // In order to avoid a temporary here, first generate all the required types and then simply look them up
332 // when generating the function type.534 // when generating the function type.
333 const params = ty.fnParamLen();535 const params = ty.fnParamLen();
334 var i: usize = 0;536 var i: usize = 0;
335 while (i < params) : (i += 1) {537 while (i < params) : (i += 1) {
336 _ = try self.getOrGenType(ty.fnParamType(i));538 _ = try self.genType(src, ty.fnParamType(i));
337 }539 }
338540
339 const return_type_id = try self.getOrGenType(ty.fnReturnType());541 const return_type_id = try self.genType(src, ty.fnReturnType());
340542
341 // result id + result type id + parameter type ids.543 // result id + result type id + parameter type ids.
342 try writeOpcode(code, .OpTypeFunction, 2 + @intCast(u32, ty.fnParamLen()));544 try writeOpcode(code, .OpTypeFunction, 2 + @intCast(u16, ty.fnParamLen()));
343 try code.appendSlice(&.{ result_id, return_type_id });545 try code.appendSlice(&.{ result_id, return_type_id });
344546
345 i = 0;547 i = 0;
346 while (i < params) : (i += 1) {548 while (i < params) : (i += 1) {
347 const param_type_id = self.types.get(ty.fnParamType(i)).?;549 const param_type_id = self.spv.types.get(ty.fnParamType(i)).?;
348 try code.append(param_type_id);550 try code.append(param_type_id);
349 }551 }
350 },552 },
553 // When recursively generating a type, we cannot infer the pointer's storage class. See genPointerType.
554 .Pointer => return self.fail(src, "Cannot create pointer with unkown storage class", .{}),
351 .Vector => {555 .Vector => {
352 // Although not 100% the same, Zig vectors map quite neatly to SPIR-V vectors (including many integer and float operations556 // Although not 100% the same, Zig vectors map quite neatly to SPIR-V vectors (including many integer and float operations
353 // which work on them), so simply use those.557 // which work on them), so simply use those.
...@@ -357,7 +561,7 @@ pub const DeclGen = struct {...@@ -357,7 +561,7 @@ pub const DeclGen = struct {
357 // is adequate at all for this.561 // is adequate at all for this.
358562
359 // TODO: Vectors are not yet supported by the self-hosted compiler itself it seems.563 // TODO: Vectors are not yet supported by the self-hosted compiler itself it seems.
360 return self.fail(.{ .node_offset = 0 }, "TODO: SPIR-V backend: implement type Vector", .{});564 return self.fail(src, "TODO: SPIR-V backend: implement type Vector", .{});
361 },565 },
362 .Null,566 .Null,
363 .Undefined,567 .Undefined,
...@@ -369,24 +573,42 @@ pub const DeclGen = struct {...@@ -369,24 +573,42 @@ pub const DeclGen = struct {
369573
370 .BoundFn => unreachable, // this type will be deleted from the language.574 .BoundFn => unreachable, // this type will be deleted from the language.
371575
372 else => |tag| return self.fail(.{ .node_offset = 0 }, "TODO: SPIR-V backend: implement type {}s", .{tag}),576 else => |tag| return self.fail(src, "TODO: SPIR-V backend: implement type {}s", .{tag}),
373 }577 }
374578
375 try self.types.putNoClobber(ty, result_id);579 try self.spv.types.putNoClobber(ty, result_id);
376 return result_id;580 return result_id;
377 }581 }
378582
379 pub fn gen(self: *DeclGen) !void {583 /// SPIR-V requires pointers to have a storage class (address space), and so we have a special function for that.
584 /// TODO: The result of this needs to be cached.
585 fn genPointerType(self: *DeclGen, src: LazySrcLoc, ty: Type, storage_class: spec.StorageClass) !ResultId {
586 std.debug.assert(ty.zigTypeTag() == .Pointer);
587
588 const code = &self.spv.binary.types_globals_constants;
589 const result_id = self.spv.allocResultId();
590
591 // TODO: There are many constraints which are ignored for now: We may only create pointers to certain types, and to other types
592 // if more capabilities are enabled. For example, we may only create pointers to f16 if Float16Buffer is enabled.
593 // These also relates to the pointer's address space.
594 const child_id = try self.genType(src, ty.elemType());
595
596 try writeInstruction(code, .OpTypePointer, &[_]Word{ result_id, @enumToInt(storage_class), child_id });
597
598 return result_id;
599 }
600
601 fn genDecl(self: *DeclGen) !void {
380 const decl = self.decl;602 const decl = self.decl;
381 const result_id = decl.fn_link.spirv.id;603 const result_id = decl.fn_link.spirv.id;
382604
383 if (decl.val.castTag(.function)) |func_payload| {605 if (decl.val.castTag(.function)) |func_payload| {
384 std.debug.assert(decl.ty.zigTypeTag() == .Fn);606 std.debug.assert(decl.ty.zigTypeTag() == .Fn);
385 const prototype_id = try self.getOrGenType(decl.ty);607 const prototype_id = try self.genType(.{ .node_offset = 0 }, decl.ty);
386 try writeInstruction(&self.spv.fn_decls, .OpFunction, &[_]u32{608 try writeInstruction(&self.spv.binary.fn_decls, .OpFunction, &[_]Word{
387 self.types.get(decl.ty.fnReturnType()).?, // This type should be generated along with the prototype.609 self.spv.types.get(decl.ty.fnReturnType()).?, // This type should be generated along with the prototype.
388 result_id,610 result_id,
389 @bitCast(u32, spec.FunctionControl{}), // TODO: We can set inline here if the type requires it.611 @bitCast(Word, spec.FunctionControl{}), // TODO: We can set inline here if the type requires it.
390 prototype_id,612 prototype_id,
391 });613 });
392614
...@@ -395,33 +617,38 @@ pub const DeclGen = struct {...@@ -395,33 +617,38 @@ pub const DeclGen = struct {
395617
396 try self.args.ensureCapacity(params);618 try self.args.ensureCapacity(params);
397 while (i < params) : (i += 1) {619 while (i < params) : (i += 1) {
398 const param_type_id = self.types.get(decl.ty.fnParamType(i)).?;620 const param_type_id = self.spv.types.get(decl.ty.fnParamType(i)).?;
399 const arg_result_id = self.spv.allocResultId();621 const arg_result_id = self.spv.allocResultId();
400 try writeInstruction(&self.spv.fn_decls, .OpFunctionParameter, &[_]u32{ param_type_id, arg_result_id });622 try writeInstruction(&self.spv.binary.fn_decls, .OpFunctionParameter, &[_]Word{ param_type_id, arg_result_id });
401 self.args.appendAssumeCapacity(arg_result_id);623 self.args.appendAssumeCapacity(arg_result_id);
402 }624 }
403625
404 // TODO: This could probably be done in a better way...626 // TODO: This could probably be done in a better way...
405 const root_block_id = self.spv.allocResultId();627 const root_block_id = self.spv.allocResultId();
406 _ = try writeInstruction(&self.spv.fn_decls, .OpLabel, &[_]u32{root_block_id});628
629 // We need to generate the label directly in the fn_decls here because we're going to write the local variables after
630 // here. Since we're not generating in self.code, we're just going to bypass self.beginSPIRVBlock here.
631 try writeInstruction(&self.spv.binary.fn_decls, .OpLabel, &[_]Word{root_block_id});
632 self.current_block_label_id = root_block_id;
633
407 try self.genBody(func_payload.data.body);634 try self.genBody(func_payload.data.body);
408635
409 try writeInstruction(&self.spv.fn_decls, .OpFunctionEnd, &[_]u32{});636 // Append the actual code into the fn_decls section.
637 try self.spv.binary.fn_decls.appendSlice(self.code.items);
638 try writeInstruction(&self.spv.binary.fn_decls, .OpFunctionEnd, &[_]Word{});
410 } else {639 } else {
411 return self.fail(.{ .node_offset = 0 }, "TODO: SPIR-V backend: generate decl type {}", .{decl.ty.zigTypeTag()});640 return self.fail(.{ .node_offset = 0 }, "TODO: SPIR-V backend: generate decl type {}", .{decl.ty.zigTypeTag()});
412 }641 }
413 }642 }
414643
415 fn genBody(self: *DeclGen, body: ir.Body) !void {644 fn genBody(self: *DeclGen, body: ir.Body) Error!void {
416 for (body.instructions) |inst| {645 for (body.instructions) |inst| {
417 const maybe_result_id = try self.genInst(inst);646 try self.genInst(inst);
418 if (maybe_result_id) |result_id|
419 try self.values.putNoClobber(inst, result_id);
420 }647 }
421 }648 }
422649
423 fn genInst(self: *DeclGen, inst: *Inst) !?u32 {650 fn genInst(self: *DeclGen, inst: *Inst) !void {
424 return switch (inst.tag) {651 const result_id = switch (inst.tag) {
425 .add, .addwrap => try self.genBinOp(inst.castTag(.add).?),652 .add, .addwrap => try self.genBinOp(inst.castTag(.add).?),
426 .sub, .subwrap => try self.genBinOp(inst.castTag(.sub).?),653 .sub, .subwrap => try self.genBinOp(inst.castTag(.sub).?),
427 .mul, .mulwrap => try self.genBinOp(inst.castTag(.mul).?),654 .mul, .mulwrap => try self.genBinOp(inst.castTag(.mul).?),
...@@ -429,34 +656,45 @@ pub const DeclGen = struct {...@@ -429,34 +656,45 @@ pub const DeclGen = struct {
429 .bit_and => try self.genBinOp(inst.castTag(.bit_and).?),656 .bit_and => try self.genBinOp(inst.castTag(.bit_and).?),
430 .bit_or => try self.genBinOp(inst.castTag(.bit_or).?),657 .bit_or => try self.genBinOp(inst.castTag(.bit_or).?),
431 .xor => try self.genBinOp(inst.castTag(.xor).?),658 .xor => try self.genBinOp(inst.castTag(.xor).?),
432 .cmp_eq => try self.genBinOp(inst.castTag(.cmp_eq).?),659 .cmp_eq => try self.genCmp(inst.castTag(.cmp_eq).?),
433 .cmp_neq => try self.genBinOp(inst.castTag(.cmp_neq).?),660 .cmp_neq => try self.genCmp(inst.castTag(.cmp_neq).?),
434 .cmp_gt => try self.genBinOp(inst.castTag(.cmp_gt).?),661 .cmp_gt => try self.genCmp(inst.castTag(.cmp_gt).?),
435 .cmp_gte => try self.genBinOp(inst.castTag(.cmp_gte).?),662 .cmp_gte => try self.genCmp(inst.castTag(.cmp_gte).?),
436 .cmp_lt => try self.genBinOp(inst.castTag(.cmp_lt).?),663 .cmp_lt => try self.genCmp(inst.castTag(.cmp_lt).?),
437 .cmp_lte => try self.genBinOp(inst.castTag(.cmp_lte).?),664 .cmp_lte => try self.genCmp(inst.castTag(.cmp_lte).?),
438 .bool_and => try self.genBinOp(inst.castTag(.bool_and).?),665 .bool_and => try self.genBinOp(inst.castTag(.bool_and).?),
439 .bool_or => try self.genBinOp(inst.castTag(.bool_or).?),666 .bool_or => try self.genBinOp(inst.castTag(.bool_or).?),
440 .not => try self.genUnOp(inst.castTag(.not).?),667 .not => try self.genUnOp(inst.castTag(.not).?),
668 .alloc => try self.genAlloc(inst.castTag(.alloc).?),
441 .arg => self.genArg(),669 .arg => self.genArg(),
670 .block => (try self.genBlock(inst.castTag(.block).?)) orelse return,
671 .br => return try self.genBr(inst.castTag(.br).?),
672 .br_void => return try self.genBrVoid(inst.castTag(.br_void).?),
442 // TODO: Breakpoints won't be supported in SPIR-V, but the compiler seems to insert them673 // TODO: Breakpoints won't be supported in SPIR-V, but the compiler seems to insert them
443 // throughout the IR.674 // throughout the IR.
444 .breakpoint => null,675 .breakpoint => return,
445 .dbg_stmt => null,676 .condbr => return try self.genCondBr(inst.castTag(.condbr).?),
446 .ret => self.genRet(inst.castTag(.ret).?),677 .constant => unreachable,
447 .retvoid => self.genRetVoid(),678 .dbg_stmt => return try self.genDbgStmt(inst.castTag(.dbg_stmt).?),
448 .unreach => self.genUnreach(),679 .load => try self.genLoad(inst.castTag(.load).?),
449 else => self.fail(.{ .node_offset = 0 }, "TODO: SPIR-V backend: implement inst {}", .{inst.tag}),680 .loop => return try self.genLoop(inst.castTag(.loop).?),
681 .ret => return try self.genRet(inst.castTag(.ret).?),
682 .retvoid => return try self.genRetVoid(),
683 .store => return try self.genStore(inst.castTag(.store).?),
684 .unreach => return try self.genUnreach(),
685 else => return self.fail(inst.src, "TODO: SPIR-V backend: implement inst {s}", .{@tagName(inst.tag)}),
450 };686 };
687
688 try self.inst_results.putNoClobber(inst, result_id);
451 }689 }
452690
453 fn genBinOp(self: *DeclGen, inst: *Inst.BinOp) !u32 {691 fn genBinOp(self: *DeclGen, inst: *Inst.BinOp) !ResultId {
454 // TODO: Will lhs and rhs have the same type?692 // TODO: Will lhs and rhs have the same type?
455 const lhs_id = try self.resolve(inst.lhs);693 const lhs_id = try self.resolve(inst.lhs);
456 const rhs_id = try self.resolve(inst.rhs);694 const rhs_id = try self.resolve(inst.rhs);
457695
458 const result_id = self.spv.allocResultId();696 const result_id = self.spv.allocResultId();
459 const result_type_id = try self.getOrGenType(inst.base.ty);697 const result_type_id = try self.genType(inst.base.src, inst.base.ty);
460698
461 // TODO: Is the result the same as the argument types?699 // TODO: Is the result the same as the argument types?
462 // This is supposed to be the case for SPIR-V.700 // This is supposed to be the case for SPIR-V.
...@@ -469,14 +707,16 @@ pub const DeclGen = struct {...@@ -469,14 +707,16 @@ pub const DeclGen = struct {
469 // instead.707 // instead.
470 const info = try self.arithmeticTypeInfo(inst.lhs.ty);708 const info = try self.arithmeticTypeInfo(inst.lhs.ty);
471709
472 if (info.class == .composite_integer)710 if (info.class == .composite_integer) {
473 return self.fail(.{ .node_offset = 0 }, "TODO: SPIR-V backend: binary operations for composite integers", .{});711 return self.fail(inst.base.src, "TODO: SPIR-V backend: binary operations for composite integers", .{});
712 } else if (info.class == .strange_integer) {
713 return self.fail(inst.base.src, "TODO: SPIR-V backend: binary operations for strange integers", .{});
714 }
474715
475 const is_bool = info.class == .bool;716 const is_bool = info.class == .bool;
476 const is_float = info.class == .float;717 const is_float = info.class == .float;
477 const is_signed = info.signedness == .signed;718 const is_signed = info.signedness == .signed;
478 // **Note**: All these operations must be valid for vectors of floats, integers and bools as well!719 // **Note**: All these operations must be valid for vectors as well!
479 // For floating points, we generally want ordered operations (which return false if either operand is nan).
480 const opcode = switch (inst.base.tag) {720 const opcode = switch (inst.base.tag) {
481 // The regular integer operations are all defined for wrapping. Since theyre only relevant for integers,721 // The regular integer operations are all defined for wrapping. Since theyre only relevant for integers,
482 // we can just switch on both cases here.722 // we can just switch on both cases here.
...@@ -493,23 +733,13 @@ pub const DeclGen = struct {...@@ -493,23 +733,13 @@ pub const DeclGen = struct {
493 .bit_and => Opcode.OpBitwiseAnd,733 .bit_and => Opcode.OpBitwiseAnd,
494 .bit_or => Opcode.OpBitwiseOr,734 .bit_or => Opcode.OpBitwiseOr,
495 .xor => Opcode.OpBitwiseXor,735 .xor => Opcode.OpBitwiseXor,
496 // Int/bool/float -> bool operations.
497 .cmp_eq => if (is_float) Opcode.OpFOrdEqual else if (is_bool) Opcode.OpLogicalEqual else Opcode.OpIEqual,
498 .cmp_neq => if (is_float) Opcode.OpFOrdNotEqual else if (is_bool) Opcode.OpLogicalNotEqual else Opcode.OpINotEqual,
499 // Int/float -> bool operations.
500 // TODO: Verify that these OpFOrd type operations produce the right value.
501 // TODO: Is there a more fundamental difference between OpU and OpS operations here than just the type?
502 .cmp_gt => if (is_float) Opcode.OpFOrdGreaterThan else if (is_signed) Opcode.OpSGreaterThan else Opcode.OpUGreaterThan,
503 .cmp_gte => if (is_float) Opcode.OpFOrdGreaterThanEqual else if (is_signed) Opcode.OpSGreaterThanEqual else Opcode.OpUGreaterThanEqual,
504 .cmp_lt => if (is_float) Opcode.OpFOrdLessThan else if (is_signed) Opcode.OpSLessThan else Opcode.OpULessThan,
505 .cmp_lte => if (is_float) Opcode.OpFOrdLessThanEqual else if (is_signed) Opcode.OpSLessThanEqual else Opcode.OpULessThanEqual,
506 // Bool -> bool operations.736 // Bool -> bool operations.
507 .bool_and => Opcode.OpLogicalAnd,737 .bool_and => Opcode.OpLogicalAnd,
508 .bool_or => Opcode.OpLogicalOr,738 .bool_or => Opcode.OpLogicalOr,
509 else => unreachable,739 else => unreachable,
510 };740 };
511741
512 try writeInstruction(&self.spv.fn_decls, opcode, &[_]u32{ result_type_id, result_id, lhs_id, rhs_id });742 try writeInstruction(&self.code, opcode, &[_]Word{ result_type_id, result_id, lhs_id, rhs_id });
513743
514 // TODO: Trap on overflow? Probably going to be annoying.744 // TODO: Trap on overflow? Probably going to be annoying.
515 // TODO: Look into SPV_KHR_no_integer_wrap_decoration which provides NoSignedWrap/NoUnsignedWrap.745 // TODO: Look into SPV_KHR_no_integer_wrap_decoration which provides NoSignedWrap/NoUnsignedWrap.
...@@ -517,14 +747,59 @@ pub const DeclGen = struct {...@@ -517,14 +747,59 @@ pub const DeclGen = struct {
517 if (info.class != .strange_integer)747 if (info.class != .strange_integer)
518 return result_id;748 return result_id;
519749
520 return self.fail(.{ .node_offset = 0 }, "TODO: SPIR-V backend: strange integer operation mask", .{});750 return self.fail(inst.base.src, "TODO: SPIR-V backend: strange integer operation mask", .{});
751 }
752
753 fn genCmp(self: *DeclGen, inst: *Inst.BinOp) !ResultId {
754 const lhs_id = try self.resolve(inst.lhs);
755 const rhs_id = try self.resolve(inst.rhs);
756
757 const result_id = self.spv.allocResultId();
758 const result_type_id = try self.genType(inst.base.src, inst.base.ty);
759
760 // All of these operations should be 2 equal types -> bool
761 std.debug.assert(inst.rhs.ty.eql(inst.lhs.ty));
762 std.debug.assert(inst.base.ty.tag() == .bool);
763
764 // Comparisons are generally applicable to both scalar and vector operations in SPIR-V, but int and float
765 // versions of operations require different opcodes.
766 // Since inst.base.ty is always bool and so not very useful, and because both arguments must be the same, just get the info
767 // from either of the operands.
768 const info = try self.arithmeticTypeInfo(inst.lhs.ty);
769
770 if (info.class == .composite_integer) {
771 return self.fail(inst.base.src, "TODO: SPIR-V backend: binary operations for composite integers", .{});
772 } else if (info.class == .strange_integer) {
773 return self.fail(inst.base.src, "TODO: SPIR-V backend: comparison for strange integers", .{});
774 }
775
776 const is_bool = info.class == .bool;
777 const is_float = info.class == .float;
778 const is_signed = info.signedness == .signed;
779
780 // **Note**: All these operations must be valid for vectors as well!
781 // For floating points, we generally want ordered operations (which return false if either operand is nan).
782 const opcode = switch (inst.base.tag) {
783 .cmp_eq => if (is_float) Opcode.OpFOrdEqual else if (is_bool) Opcode.OpLogicalEqual else Opcode.OpIEqual,
784 .cmp_neq => if (is_float) Opcode.OpFOrdNotEqual else if (is_bool) Opcode.OpLogicalNotEqual else Opcode.OpINotEqual,
785 // TODO: Verify that these OpFOrd type operations produce the right value.
786 // TODO: Is there a more fundamental difference between OpU and OpS operations here than just the type?
787 .cmp_gt => if (is_float) Opcode.OpFOrdGreaterThan else if (is_signed) Opcode.OpSGreaterThan else Opcode.OpUGreaterThan,
788 .cmp_gte => if (is_float) Opcode.OpFOrdGreaterThanEqual else if (is_signed) Opcode.OpSGreaterThanEqual else Opcode.OpUGreaterThanEqual,
789 .cmp_lt => if (is_float) Opcode.OpFOrdLessThan else if (is_signed) Opcode.OpSLessThan else Opcode.OpULessThan,
790 .cmp_lte => if (is_float) Opcode.OpFOrdLessThanEqual else if (is_signed) Opcode.OpSLessThanEqual else Opcode.OpULessThanEqual,
791 else => unreachable,
792 };
793
794 try writeInstruction(&self.code, opcode, &[_]Word{ result_type_id, result_id, lhs_id, rhs_id });
795 return result_id;
521 }796 }
522797
523 fn genUnOp(self: *DeclGen, inst: *Inst.UnOp) !u32 {798 fn genUnOp(self: *DeclGen, inst: *Inst.UnOp) !ResultId {
524 const operand_id = try self.resolve(inst.operand);799 const operand_id = try self.resolve(inst.operand);
525800
526 const result_id = self.spv.allocResultId();801 const result_id = self.spv.allocResultId();
527 const result_type_id = try self.getOrGenType(inst.base.ty);802 const result_type_id = try self.genType(inst.base.src, inst.base.ty);
528803
529 const info = try self.arithmeticTypeInfo(inst.operand.ty);804 const info = try self.arithmeticTypeInfo(inst.operand.ty);
530805
...@@ -534,32 +809,181 @@ pub const DeclGen = struct {...@@ -534,32 +809,181 @@ pub const DeclGen = struct {
534 else => unreachable,809 else => unreachable,
535 };810 };
536811
537 try writeInstruction(&self.spv.fn_decls, opcode, &[_]u32{ result_type_id, result_id, operand_id });812 try writeInstruction(&self.code, opcode, &[_]Word{ result_type_id, result_id, operand_id });
538813
539 return result_id;814 return result_id;
540 }815 }
541816
542 fn genArg(self: *DeclGen) u32 {817 fn genAlloc(self: *DeclGen, inst: *Inst.NoOp) !ResultId {
818 const storage_class = spec.StorageClass.Function;
819 const result_type_id = try self.genPointerType(inst.base.src, inst.base.ty, storage_class);
820 const result_id = self.spv.allocResultId();
821
822 // Rather than generating into code here, we're just going to generate directly into the fn_decls section so that
823 // variable declarations appear in the first block of the function.
824 try writeInstruction(&self.spv.binary.fn_decls, .OpVariable, &[_]Word{ result_type_id, result_id, @enumToInt(storage_class) });
825
826 return result_id;
827 }
828
829 fn genArg(self: *DeclGen) ResultId {
543 defer self.next_arg_index += 1;830 defer self.next_arg_index += 1;
544 return self.args.items[self.next_arg_index];831 return self.args.items[self.next_arg_index];
545 }832 }
546833
547 fn genRet(self: *DeclGen, inst: *Inst.UnOp) !?u32 {834 fn genBlock(self: *DeclGen, inst: *Inst.Block) !?ResultId {
835 // In IR, a block doesn't really define an entry point like a block, but more like a scope that breaks can jump out of and
836 // "return" a value from. This cannot be directly modelled in SPIR-V, so in a block instruction, we're going to split up
837 // the current block by first generating the code of the block, then a label, and then generate the rest of the current
838 // ir.Block in a different SPIR-V block.
839
840 const label_id = self.spv.allocResultId();
841
842 // 4 chosen as arbitrary initial capacity.
843 var incoming_blocks = try std.ArrayListUnmanaged(IncomingBlock).initCapacity(self.spv.gpa, 4);
844
845 try self.blocks.putNoClobber(inst, .{
846 .label_id = label_id,
847 .incoming_blocks = &incoming_blocks,
848 });
849 defer {
850 self.blocks.removeAssertDiscard(inst);
851 incoming_blocks.deinit(self.spv.gpa);
852 }
853
854 try self.genBody(inst.body);
855 try self.beginSPIRVBlock(label_id);
856
857 // If this block didn't produce a value, simply return here.
858 if (!inst.base.ty.hasCodeGenBits())
859 return null;
860
861 // Combine the result from the blocks using the Phi instruction.
862
863 const result_id = self.spv.allocResultId();
864
865 // TODO: OpPhi is limited in the types that it may produce, such as pointers. Figure out which other types
866 // are not allowed to be created from a phi node, and throw an error for those. For now, genType already throws
867 // an error for pointers.
868 const result_type_id = try self.genType(inst.base.src, inst.base.ty);
869
870 try writeOpcode(&self.code, .OpPhi, 2 + @intCast(u16, incoming_blocks.items.len * 2)); // result type + result + variable/parent...
871
872 for (incoming_blocks.items) |incoming| {
873 try self.code.appendSlice(&[_]Word{ incoming.break_value_id, incoming.src_label_id });
874 }
875
876 return result_id;
877 }
878
879 fn genBr(self: *DeclGen, inst: *Inst.Br) !void {
880 // TODO: This instruction needs to be the last in a block. Is that guaranteed?
881 const target = self.blocks.get(inst.block).?;
882
883 // TODO: For some reason, br is emitted with void parameters.
884 if (inst.operand.ty.hasCodeGenBits()) {
885 const operand_id = try self.resolve(inst.operand);
886 // current_block_label_id should not be undefined here, lest there is a br or br_void in the function's body.
887 try target.incoming_blocks.append(self.spv.gpa, .{
888 .src_label_id = self.current_block_label_id,
889 .break_value_id = operand_id
890 });
891 }
892
893 try writeInstruction(&self.code, .OpBranch, &[_]Word{target.label_id});
894 }
895
896 fn genBrVoid(self: *DeclGen, inst: *Inst.BrVoid) !void {
897 // TODO: This instruction needs to be the last in a block. Is that guaranteed?
898 const target = self.blocks.get(inst.block).?;
899 // Don't need to add this to the incoming block list, as there is no value to insert in the phi node anyway.
900 try writeInstruction(&self.code, .OpBranch, &[_]Word{target.label_id});
901 }
902
903 fn genCondBr(self: *DeclGen, inst: *Inst.CondBr) !void {
904 // TODO: This instruction needs to be the last in a block. Is that guaranteed?
905 const condition_id = try self.resolve(inst.condition);
906
907 // These will always generate a new SPIR-V block, since they are ir.Body and not ir.Block.
908 const then_label_id = self.spv.allocResultId();
909 const else_label_id = self.spv.allocResultId();
910
911 // TODO: We can generate OpSelectionMerge here if we know the target block that both of these will resolve to,
912 // but i don't know if those will always resolve to the same block.
913
914 try writeInstruction(&self.code, .OpBranchConditional, &[_]Word{
915 condition_id,
916 then_label_id,
917 else_label_id,
918 });
919
920 try self.beginSPIRVBlock(then_label_id);
921 try self.genBody(inst.then_body);
922 try self.beginSPIRVBlock(else_label_id);
923 try self.genBody(inst.else_body);
924 }
925
926 fn genDbgStmt(self: *DeclGen, inst: *Inst.DbgStmt) !void {
927 const src_fname_id = try self.spv.resolveSourceFileName(self.decl);
928 try writeInstruction(&self.code, .OpLine, &[_]Word{ src_fname_id, inst.line, inst.column });
929 }
930
931 fn genLoad(self: *DeclGen, inst: *Inst.UnOp) !ResultId {
932 const operand_id = try self.resolve(inst.operand);
933
934 const result_type_id = try self.genType(inst.base.src, inst.base.ty);
935 const result_id = self.spv.allocResultId();
936
937 const operands = if (inst.base.ty.isVolatilePtr())
938 &[_]Word{ result_type_id, result_id, operand_id, @bitCast(u32, spec.MemoryAccess{.Volatile = true}) }
939 else
940 &[_]Word{ result_type_id, result_id, operand_id};
941
942 try writeInstruction(&self.code, .OpLoad, operands);
943
944 return result_id;
945 }
946
947 fn genLoop(self: *DeclGen, inst: *Inst.Loop) !void {
948 // TODO: This instruction needs to be the last in a block. Is that guaranteed?
949 const loop_label_id = self.spv.allocResultId();
950
951 // Jump to the loop entry point
952 try writeInstruction(&self.code, .OpBranch, &[_]Word{ loop_label_id });
953
954 // TODO: Look into OpLoopMerge.
955
956 try self.beginSPIRVBlock(loop_label_id);
957 try self.genBody(inst.body);
958
959 try writeInstruction(&self.code, .OpBranch, &[_]Word{ loop_label_id });
960 }
961
962 fn genRet(self: *DeclGen, inst: *Inst.UnOp) !void {
548 const operand_id = try self.resolve(inst.operand);963 const operand_id = try self.resolve(inst.operand);
549 // TODO: This instruction needs to be the last in a block. Is that guaranteed?964 // TODO: This instruction needs to be the last in a block. Is that guaranteed?
550 try writeInstruction(&self.spv.fn_decls, .OpReturnValue, &[_]u32{operand_id});965 try writeInstruction(&self.code, .OpReturnValue, &[_]Word{operand_id});
551 return null;
552 }966 }
553967
554 fn genRetVoid(self: *DeclGen) !?u32 {968 fn genRetVoid(self: *DeclGen) !void {
555 // TODO: This instruction needs to be the last in a block. Is that guaranteed?969 // TODO: This instruction needs to be the last in a block. Is that guaranteed?
556 try writeInstruction(&self.spv.fn_decls, .OpReturn, &[_]u32{});970 try writeInstruction(&self.code, .OpReturn, &[_]Word{});
557 return null;
558 }971 }
559972
560 fn genUnreach(self: *DeclGen) !?u32 {973 fn genStore(self: *DeclGen, inst: *Inst.BinOp) !void {
974 const dst_ptr_id = try self.resolve(inst.lhs);
975 const src_val_id = try self.resolve(inst.rhs);
976
977 const operands = if (inst.lhs.ty.isVolatilePtr())
978 &[_]Word{ dst_ptr_id, src_val_id, @bitCast(u32, spec.MemoryAccess{.Volatile = true}) }
979 else
980 &[_]Word{ dst_ptr_id, src_val_id };
981
982 try writeInstruction(&self.code, .OpStore, operands);
983 }
984
985 fn genUnreach(self: *DeclGen) !void {
561 // TODO: This instruction needs to be the last in a block. Is that guaranteed?986 // TODO: This instruction needs to be the last in a block. Is that guaranteed?
562 try writeInstruction(&self.spv.fn_decls, .OpUnreachable, &[_]u32{});987 try writeInstruction(&self.code, .OpUnreachable, &[_]Word{});
563 return null;
564 }988 }
565};989};
src/link/SpirV.zig+39-62
...@@ -31,15 +31,18 @@ const Module = @import("../Module.zig");...@@ -31,15 +31,18 @@ const Module = @import("../Module.zig");
31const Compilation = @import("../Compilation.zig");31const Compilation = @import("../Compilation.zig");
32const link = @import("../link.zig");32const link = @import("../link.zig");
33const codegen = @import("../codegen/spirv.zig");33const codegen = @import("../codegen/spirv.zig");
34const Word = codegen.Word;
35const ResultId = codegen.ResultId;
34const trace = @import("../tracy.zig").trace;36const trace = @import("../tracy.zig").trace;
35const build_options = @import("build_options");37const build_options = @import("build_options");
36const spec = @import("../codegen/spirv/spec.zig");38const spec = @import("../codegen/spirv/spec.zig");
3739
38// TODO: Should this struct be used at all rather than just a hashmap of aux data for every decl?40// TODO: Should this struct be used at all rather than just a hashmap of aux data for every decl?
39pub const FnData = struct {41pub const FnData = struct {
40// We're going to fill these in flushModule, and we're going to fill them unconditionally,42 // We're going to fill these in flushModule, and we're going to fill them unconditionally,
41// so just set it to undefined.43 // so just set it to undefined.
42id: u32 = undefined };44 id: ResultId = undefined,
45};
4346
44base: link.File,47base: link.File,
4548
...@@ -129,7 +132,7 @@ pub fn flushModule(self: *SpirV, comp: *Compilation) !void {...@@ -129,7 +132,7 @@ pub fn flushModule(self: *SpirV, comp: *Compilation) !void {
129 const module = self.base.options.module.?;132 const module = self.base.options.module.?;
130 const target = comp.getTarget();133 const target = comp.getTarget();
131134
132 var spv = codegen.SPIRVModule.init(self.base.allocator);135 var spv = codegen.SPIRVModule.init(self.base.allocator, module);
133 defer spv.deinit();136 defer spv.deinit();
134137
135 // Allocate an ID for every declaration before generating code,138 // Allocate an ID for every declaration before generating code,
...@@ -143,85 +146,67 @@ pub fn flushModule(self: *SpirV, comp: *Compilation) !void {...@@ -143,85 +146,67 @@ pub fn flushModule(self: *SpirV, comp: *Compilation) !void {
143 if (!decl.has_tv) continue;146 if (!decl.has_tv) continue;
144147
145 decl.fn_link.spirv.id = spv.allocResultId();148 decl.fn_link.spirv.id = spv.allocResultId();
146 log.debug("Allocating id {} to '{s}'", .{ decl.fn_link.spirv.id, std.mem.spanZ(decl.name) });
147 }149 }
148 }150 }
149151
150 // Now, actually generate the code for all declarations.152 // Now, actually generate the code for all declarations.
151 {153 {
152 // We are just going to re-use this same DeclGen for every Decl, and we are just going to154 var decl_gen = codegen.DeclGen.init(&spv);
153 // change the decl. Otherwise, we would have to keep a separate `args` and `types`, and re-construct this155 defer decl_gen.deinit();
154 // structure every time.
155 var decl_gen = codegen.DeclGen{
156 .module = module,
157 .spv = &spv,
158 .args = std.ArrayList(u32).init(self.base.allocator),
159 .next_arg_index = undefined,
160 .types = codegen.TypeMap.init(self.base.allocator),
161 .values = codegen.ValueMap.init(self.base.allocator),
162 .decl = undefined,
163 .error_msg = undefined,
164 };
165
166 defer decl_gen.values.deinit();
167 defer decl_gen.types.deinit();
168 defer decl_gen.args.deinit();
169156
170 for (self.decl_table.items()) |entry| {157 for (self.decl_table.items()) |entry| {
171 const decl = entry.key;158 const decl = entry.key;
172 if (!decl.has_tv) continue;159 if (!decl.has_tv) continue;
173160
174 decl_gen.args.items.len = 0;161 if (try decl_gen.gen(decl)) |msg| {
175 decl_gen.next_arg_index = 0;162 try module.failed_decls.put(module.gpa, decl, msg);
176 decl_gen.decl = decl;163 return; // TODO: Attempt to generate more decls?
177 decl_gen.error_msg = null;164 }
178
179 decl_gen.gen() catch |err| switch (err) {
180 error.AnalysisFail => {
181 try module.failed_decls.put(module.gpa, decl, decl_gen.error_msg.?);
182 return;
183 },
184 else => |e| return e,
185 };
186 }165 }
187 }166 }
188167
189 var binary = std.ArrayList(u32).init(self.base.allocator);168 try writeCapabilities(&spv.binary.capabilities_and_extensions, target);
190 defer binary.deinit();169 try writeMemoryModel(&spv.binary.capabilities_and_extensions, target);
191170
192 try binary.appendSlice(&[_]u32{171 const header = [_]Word{
193 spec.magic_number,172 spec.magic_number,
194 (spec.version.major << 16) | (spec.version.minor << 8),173 (spec.version.major << 16) | (spec.version.minor << 8),
195 0, // TODO: Register Zig compiler magic number.174 0, // TODO: Register Zig compiler magic number.
196 spv.resultIdBound(), // ID bound.175 spv.resultIdBound(),
197 0, // Schema (currently reserved for future use in the SPIR-V spec).176 0, // Schema (currently reserved for future use in the SPIR-V spec).
198 });177 };
199
200 try writeCapabilities(&binary, target);
201 try writeMemoryModel(&binary, target);
202178
203 // Note: The order of adding sections to the final binary179 // Note: The order of adding sections to the final binary
204 // follows the SPIR-V logical module format!180 // follows the SPIR-V logical module format!
205 var all_buffers = [_]std.os.iovec_const{181 const buffers = &[_][]const Word{
206 wordsToIovConst(binary.items),182 &header,
207 wordsToIovConst(spv.types_globals_constants.items),183 spv.binary.capabilities_and_extensions.items,
208 wordsToIovConst(spv.fn_decls.items),184 spv.binary.debug_strings.items,
185 spv.binary.types_globals_constants.items,
186 spv.binary.fn_decls.items,
209 };187 };
210188
211 const file = self.base.file.?;189 var iovc_buffers: [buffers.len]std.os.iovec_const = undefined;
212 const bytes = std.mem.sliceAsBytes(binary.items);190 for (iovc_buffers) |*iovc, i| {
191 const bytes = std.mem.sliceAsBytes(buffers[i]);
192 iovc.* = .{
193 .iov_base = bytes.ptr,
194 .iov_len = bytes.len
195 };
196 }
213197
214 var file_size: u64 = 0;198 var file_size: u64 = 0;
215 for (all_buffers) |iov| {199 for (iovc_buffers) |iov| {
216 file_size += iov.iov_len;200 file_size += iov.iov_len;
217 }201 }
218202
203 const file = self.base.file.?;
219 try file.seekTo(0);204 try file.seekTo(0);
220 try file.setEndPos(file_size);205 try file.setEndPos(file_size);
221 try file.pwritevAll(&all_buffers, 0);206 try file.pwritevAll(&iovc_buffers, 0);
222}207}
223208
224fn writeCapabilities(binary: *std.ArrayList(u32), target: std.Target) !void {209fn writeCapabilities(binary: *std.ArrayList(Word), target: std.Target) !void {
225 // TODO: Integrate with a hypothetical feature system210 // TODO: Integrate with a hypothetical feature system
226 const cap: spec.Capability = switch (target.os.tag) {211 const cap: spec.Capability = switch (target.os.tag) {
227 .opencl => .Kernel,212 .opencl => .Kernel,
...@@ -230,10 +215,10 @@ fn writeCapabilities(binary: *std.ArrayList(u32), target: std.Target) !void {...@@ -230,10 +215,10 @@ fn writeCapabilities(binary: *std.ArrayList(u32), target: std.Target) !void {
230 else => unreachable, // TODO215 else => unreachable, // TODO
231 };216 };
232217
233 try codegen.writeInstruction(binary, .OpCapability, &[_]u32{@enumToInt(cap)});218 try codegen.writeInstruction(binary, .OpCapability, &[_]Word{@enumToInt(cap)});
234}219}
235220
236fn writeMemoryModel(binary: *std.ArrayList(u32), target: std.Target) !void {221fn writeMemoryModel(binary: *std.ArrayList(Word), target: std.Target) !void {
237 const addressing_model = switch (target.os.tag) {222 const addressing_model = switch (target.os.tag) {
238 .opencl => switch (target.cpu.arch) {223 .opencl => switch (target.cpu.arch) {
239 .spirv32 => spec.AddressingModel.Physical32,224 .spirv32 => spec.AddressingModel.Physical32,
...@@ -251,15 +236,7 @@ fn writeMemoryModel(binary: *std.ArrayList(u32), target: std.Target) !void {...@@ -251,15 +236,7 @@ fn writeMemoryModel(binary: *std.ArrayList(u32), target: std.Target) !void {
251 else => unreachable,236 else => unreachable,
252 };237 };
253238
254 try codegen.writeInstruction(binary, .OpMemoryModel, &[_]u32{239 try codegen.writeInstruction(binary, .OpMemoryModel, &[_]Word{
255 @enumToInt(addressing_model), @enumToInt(memory_model),240 @enumToInt(addressing_model), @enumToInt(memory_model),
256 });241 });
257}242}
258
259fn wordsToIovConst(words: []const u32) std.os.iovec_const {
260 const bytes = std.mem.sliceAsBytes(words);
261 return .{
262 .iov_base = bytes.ptr,
263 .iov_len = bytes.len,
264 };
265}