| author | |
| committer | |
| log | 6893f90887836584f9377793cca7235d8947a326 |
| tree | ff0680c19ee97c6521b92fccf324d6f21df65ad7 |
| parent | a5e50891cbd66c740afba722e94f841a2b43c1fc |
5 files changed, 49 insertions(+), 1 deletions(-)
src/arch/x86_64/CodeGen.zig+27-1| ... | ... | @@ -229,6 +229,7 @@ pub const MCValue = union(enum) { |
| 229 | 229 | fn isRegister(mcv: MCValue) bool { |
| 230 | 230 | return switch (mcv) { |
| 231 | 231 | .register => true, |
| 232 | .register_offset => |reg_off| return reg_off.off == 0, | |
| 232 | 233 | else => false, |
| 233 | 234 | }; |
| 234 | 235 | } |
| ... | ... | @@ -1449,7 +1450,6 @@ fn genBody(self: *Self, body: []const Air.Inst.Index) InnerError!void { |
| 1449 | 1450 | .shl_sat => try self.airShlSat(inst), |
| 1450 | 1451 | .slice => try self.airSlice(inst), |
| 1451 | 1452 | |
| 1452 | .sqrt, | |
| 1453 | 1453 | .sin, |
| 1454 | 1454 | .cos, |
| 1455 | 1455 | .tan, |
| ... | ... | @@ -1464,6 +1464,7 @@ fn genBody(self: *Self, body: []const Air.Inst.Index) InnerError!void { |
| 1464 | 1464 | .trunc_float, |
| 1465 | 1465 | => try self.airUnaryMath(inst), |
| 1466 | 1466 | |
| 1467 | .sqrt => try self.airSqrt(inst), | |
| 1467 | 1468 | .neg, .fabs => try self.airFloatSign(inst), |
| 1468 | 1469 | |
| 1469 | 1470 | .add_with_overflow => try self.airAddSubWithOverflow(inst), |
| ... | ... | @@ -4242,6 +4243,31 @@ fn airFloatSign(self: *Self, inst: Air.Inst.Index) !void { |
| 4242 | 4243 | return self.finishAir(inst, dst_mcv, .{ un_op, .none, .none }); |
| 4243 | 4244 | } |
| 4244 | 4245 | |
| 4246 | fn airSqrt(self: *Self, inst: Air.Inst.Index) !void { | |
| 4247 | const un_op = self.air.instructions.items(.data)[inst].un_op; | |
| 4248 | const ty = self.air.typeOf(un_op); | |
| 4249 | ||
| 4250 | const src_mcv = try self.resolveInst(un_op); | |
| 4251 | const dst_mcv = if (src_mcv.isRegister() and self.reuseOperand(inst, un_op, 0, src_mcv)) | |
| 4252 | src_mcv | |
| 4253 | else | |
| 4254 | try self.copyToRegisterWithInstTracking(inst, ty, src_mcv); | |
| 4255 | ||
| 4256 | try self.genBinOpMir(switch (ty.zigTypeTag()) { | |
| 4257 | .Float => switch (ty.floatBits(self.target.*)) { | |
| 4258 | 32 => .sqrtss, | |
| 4259 | 64 => .sqrtsd, | |
| 4260 | else => return self.fail("TODO implement airSqrt for {}", .{ | |
| 4261 | ty.fmt(self.bin_file.options.module.?), | |
| 4262 | }), | |
| 4263 | }, | |
| 4264 | else => return self.fail("TODO implement airSqrt for {}", .{ | |
| 4265 | ty.fmt(self.bin_file.options.module.?), | |
| 4266 | }), | |
| 4267 | }, ty, dst_mcv, src_mcv); | |
| 4268 | return self.finishAir(inst, dst_mcv, .{ un_op, .none, .none }); | |
| 4269 | } | |
| 4270 | ||
| 4245 | 4271 | fn airUnaryMath(self: *Self, inst: Air.Inst.Index) !void { |
| 4246 | 4272 | const un_op = self.air.instructions.items(.data)[inst].un_op; |
| 4247 | 4273 | _ = un_op; |
src/arch/x86_64/Encoding.zig+4| ... | ... | @@ -277,6 +277,8 @@ pub const Mnemonic = enum { |
| 277 | 277 | movss, |
| 278 | 278 | mulss, |
| 279 | 279 | orps, |
| 280 | sqrtps, | |
| 281 | sqrtss, | |
| 280 | 282 | subss, |
| 281 | 283 | ucomiss, |
| 282 | 284 | xorps, |
| ... | ... | @@ -291,6 +293,8 @@ pub const Mnemonic = enum { |
| 291 | 293 | movq, //movd, movsd, |
| 292 | 294 | mulsd, |
| 293 | 295 | orpd, |
| 296 | sqrtpd, | |
| 297 | sqrtsd, | |
| 294 | 298 | subsd, |
| 295 | 299 | ucomisd, |
| 296 | 300 | xorpd, |
src/arch/x86_64/Lower.zig+4| ... | ... | @@ -105,6 +105,8 @@ pub fn lowerMir(lower: *Lower, inst: Mir.Inst) Error![]const Instruction { |
| 105 | 105 | .mulss, |
| 106 | 106 | .orps, |
| 107 | 107 | .roundss, |
| 108 | .sqrtps, | |
| 109 | .sqrtss, | |
| 108 | 110 | .subss, |
| 109 | 111 | .ucomiss, |
| 110 | 112 | .xorps, |
| ... | ... | @@ -122,6 +124,8 @@ pub fn lowerMir(lower: *Lower, inst: Mir.Inst) Error![]const Instruction { |
| 122 | 124 | .mulsd, |
| 123 | 125 | .orpd, |
| 124 | 126 | .roundsd, |
| 127 | .sqrtpd, | |
| 128 | .sqrtsd, | |
| 125 | 129 | .subsd, |
| 126 | 130 | .ucomisd, |
| 127 | 131 | .xorpd, |
src/arch/x86_64/Mir.zig+8| ... | ... | @@ -190,7 +190,11 @@ pub const Inst = struct { |
| 190 | 190 | orps, |
| 191 | 191 | /// Round scalar single-precision floating-point values |
| 192 | 192 | roundss, |
| 193 | /// Square root of scalar single precision floating-point value | |
| 194 | sqrtps, | |
| 193 | 195 | /// Subtract scalar single-precision floating-point values |
| 196 | sqrtss, | |
| 197 | /// Square root of single precision floating-point values | |
| 194 | 198 | subss, |
| 195 | 199 | /// Unordered compare scalar single-precision floating-point values |
| 196 | 200 | ucomiss, |
| ... | ... | @@ -224,6 +228,10 @@ pub const Inst = struct { |
| 224 | 228 | orpd, |
| 225 | 229 | /// Round scalar double-precision floating-point values |
| 226 | 230 | roundsd, |
| 231 | /// Square root of double precision floating-point values | |
| 232 | sqrtpd, | |
| 233 | /// Square root of scalar double precision floating-point value | |
| 234 | sqrtsd, | |
| 227 | 235 | /// Subtract scalar double-precision floating-point values |
| 228 | 236 | subsd, |
| 229 | 237 | /// Unordered compare scalar double-precision floating-point values |
src/arch/x86_64/encodings.zig+6| ... | ... | @@ -856,6 +856,9 @@ pub const table = [_]Entry{ |
| 856 | 856 | |
| 857 | 857 | .{ .subss, .rm, &.{ .xmm, .xmm_m32 }, &.{ 0xf3, 0x0f, 0x5c }, 0, .sse }, |
| 858 | 858 | |
| 859 | .{ .sqrtps, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x0f, 0x51 }, 0, .sse }, | |
| 860 | .{ .sqrtss, .rm, &.{ .xmm, .xmm_m32 }, &.{ 0xf3, 0x0f, 0x51 }, 0, .sse }, | |
| 861 | ||
| 859 | 862 | .{ .ucomiss, .rm, &.{ .xmm, .xmm_m32 }, &.{ 0x0f, 0x2e }, 0, .sse }, |
| 860 | 863 | |
| 861 | 864 | .{ .xorps, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x0f, 0x57 }, 0, .sse }, |
| ... | ... | @@ -895,6 +898,9 @@ pub const table = [_]Entry{ |
| 895 | 898 | |
| 896 | 899 | .{ .orpd, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x56 }, 0, .sse2 }, |
| 897 | 900 | |
| 901 | .{ .sqrtpd, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x51 }, 0, .sse2 }, | |
| 902 | .{ .sqrtsd, .rm, &.{ .xmm, .xmm_m64 }, &.{ 0xf2, 0x0f, 0x51 }, 0, .sse2 }, | |
| 903 | ||
| 898 | 904 | .{ .subsd, .rm, &.{ .xmm, .xmm_m64 }, &.{ 0xf2, 0x0f, 0x5c }, 0, .sse2 }, |
| 899 | 905 | |
| 900 | 906 | .{ .movsd, .rm, &.{ .xmm, .xmm_m64 }, &.{ 0xf2, 0x0f, 0x10 }, 0, .sse2 }, |