| author | |
| committer | |
| log | 6bed45b87358975da97fec45fd30eb095ad1dfc9 |
| tree | 64667cc40b95097f2d834fad1f0971ac8f9f9971 |
| parent | 57236961e6fc9da02623f79131f58113e3fa0531 |
Various backend were mismatching arg instructions and function args.3 files changed, 12 insertions(+), 6 deletions(-)
src/arch/aarch64/CodeGen.zig+4-2| ... | @@ -4177,8 +4177,10 @@ fn airFieldParentPtr(self: *Self, inst: Air.Inst.Index) !void { | ... | @@ -4177,8 +4177,10 @@ fn airFieldParentPtr(self: *Self, inst: Air.Inst.Index) !void { |
| 4177 | } | 4177 | } |
| 4178 | 4178 | ||
| 4179 | fn airArg(self: *Self, inst: Air.Inst.Index) !void { | 4179 | fn airArg(self: *Self, inst: Air.Inst.Index) !void { |
| 4180 | const arg_index = self.arg_index; | 4180 | // skip zero-bit arguments as they don't have a corresponding arg instruction |
| 4181 | self.arg_index += 1; | 4181 | var arg_index = self.arg_index; |
| 4182 | while (self.args[arg_index] == .none) arg_index += 1; | ||
| 4183 | self.arg_index = arg_index + 1; | ||
| 4182 | 4184 | ||
| 4183 | const ty = self.air.typeOfIndex(inst); | 4185 | const ty = self.air.typeOfIndex(inst); |
| 4184 | const tag = self.air.instructions.items(.tag)[inst]; | 4186 | const tag = self.air.instructions.items(.tag)[inst]; |
src/arch/arm/CodeGen.zig+4-2| ... | @@ -4125,8 +4125,10 @@ fn genInlineMemsetCode( | ... | @@ -4125,8 +4125,10 @@ fn genInlineMemsetCode( |
| 4125 | } | 4125 | } |
| 4126 | 4126 | ||
| 4127 | fn airArg(self: *Self, inst: Air.Inst.Index) !void { | 4127 | fn airArg(self: *Self, inst: Air.Inst.Index) !void { |
| 4128 | const arg_index = self.arg_index; | 4128 | // skip zero-bit arguments as they don't have a corresponding arg instruction |
| 4129 | self.arg_index += 1; | 4129 | var arg_index = self.arg_index; |
| 4130 | while (self.args[arg_index] == .none) arg_index += 1; | ||
| 4131 | self.arg_index = arg_index + 1; | ||
| 4130 | 4132 | ||
| 4131 | const ty = self.air.typeOfIndex(inst); | 4133 | const ty = self.air.typeOfIndex(inst); |
| 4132 | const tag = self.air.instructions.items(.tag)[inst]; | 4134 | const tag = self.air.instructions.items(.tag)[inst]; |
src/arch/x86_64/CodeGen.zig+4-2| ... | @@ -3827,8 +3827,10 @@ fn genIntMulComplexOpMir(self: *Self, dst_ty: Type, dst_mcv: MCValue, src_mcv: M | ... | @@ -3827,8 +3827,10 @@ fn genIntMulComplexOpMir(self: *Self, dst_ty: Type, dst_mcv: MCValue, src_mcv: M |
| 3827 | } | 3827 | } |
| 3828 | 3828 | ||
| 3829 | fn airArg(self: *Self, inst: Air.Inst.Index) !void { | 3829 | fn airArg(self: *Self, inst: Air.Inst.Index) !void { |
| 3830 | const arg_index = self.arg_index; | 3830 | // skip zero-bit arguments as they don't have a corresponding arg instruction |
| 3831 | self.arg_index += 1; | 3831 | var arg_index = self.arg_index; |
| 3832 | while (self.args[arg_index] == .none) arg_index += 1; | ||
| 3833 | self.arg_index = arg_index + 1; | ||
| 3832 | 3834 | ||
| 3833 | const ty = self.air.typeOfIndex(inst); | 3835 | const ty = self.air.typeOfIndex(inst); |
| 3834 | const mcv = self.args[arg_index]; | 3836 | const mcv = self.args[arg_index]; |