authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-10-15 20:29:49+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-10-20 09:21:17+02:00
log6c1e306484530bfeaf26450fb83a70ff1c323bcd
treeed5c465b65d6946e153cb458f4b002ff7d691444
parent43344833c52dad441475c5eaceb257f524980c60
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

llvm: Add some missing fnptr alignment specifications in DataLayoutBuilder.

1 files changed, 9 insertions(+), 2 deletions(-)

src/codegen/llvm.zig+9-2
...@@ -458,10 +458,15 @@ const DataLayoutBuilder = struct {...@@ -458,10 +458,15 @@ const DataLayoutBuilder = struct {
458 if (idx != size) try writer.print(":{d}", .{idx});458 if (idx != size) try writer.print(":{d}", .{idx});
459 }459 }
460 }460 }
461 if (self.target.cpu.arch.isArmOrThumb()) try writer.writeAll("-Fi8") // for thumb interwork461 if (self.target.cpu.arch.isArmOrThumb())
462 try writer.writeAll("-Fi8") // for thumb interwork
462 else if (self.target.cpu.arch == .powerpc64 and463 else if (self.target.cpu.arch == .powerpc64 and
463 self.target.os.tag != .freebsd and self.target.abi != .musl)464 self.target.os.tag != .freebsd and
465 self.target.os.tag != .openbsd and
466 !self.target.abi.isMusl())
464 try writer.writeAll("-Fi64")467 try writer.writeAll("-Fi64")
468 else if (self.target.cpu.arch.isPowerPC() and self.target.os.tag == .aix)
469 try writer.writeAll(if (self.target.cpu.arch.isPowerPC64()) "-Fi64" else "-Fi32")
465 else if (self.target.cpu.arch.isPowerPC())470 else if (self.target.cpu.arch.isPowerPC())
466 try writer.writeAll("-Fn32");471 try writer.writeAll("-Fn32");
467 if (self.target.cpu.arch != .hexagon) {472 if (self.target.cpu.arch != .hexagon) {
...@@ -573,6 +578,8 @@ const DataLayoutBuilder = struct {...@@ -573,6 +578,8 @@ const DataLayoutBuilder = struct {
573 self.target.os.tag == .uefi or self.target.os.tag == .windows or578 self.target.os.tag == .uefi or self.target.os.tag == .windows or
574 self.target.cpu.arch == .riscv32)579 self.target.cpu.arch == .riscv32)
575 try writer.print("-S{d}", .{stack_abi});580 try writer.print("-S{d}", .{stack_abi});
581 if (self.target.cpu.arch.isAARCH64())
582 try writer.writeAll("-Fn32");
576 switch (self.target.cpu.arch) {583 switch (self.target.cpu.arch) {
577 .hexagon, .ve => {584 .hexagon, .ve => {
578 try self.typeAlignment(.vector, 32, 128, 128, true, writer);585 try self.typeAlignment(.vector, 32, 128, 128, true, writer);