authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2020-01-30 11:31:41-05:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2020-01-30 11:31:41-05:00
log70ee818d21c44ec0031b997916694327eb9fc37f
tree6078350717e2a11e25a38208274ff20d66b317f7
parentc75f65d38c2c0f5f8f443685a4d694a7ab9c1da3
signaturelock-open Commit is signed but in an unrecognized format.

update target CPUs and features with llvm10's data

based on zig-llvm-target-details-generator commit 3aef1b9b4415ed3acfaea4ce8bc233e213548f71

9 files changed, 894 insertions(+), 86 deletions(-)

lib/std/target.zig+1-1
...@@ -566,7 +566,7 @@ pub const Target = union(enum) {...@@ -566,7 +566,7 @@ pub const Target = union(enum) {
566 pub const Set = struct {566 pub const Set = struct {
567 ints: [usize_count]usize,567 ints: [usize_count]usize,
568568
569 pub const needed_bit_count = 174;569 pub const needed_bit_count = 175;
570 pub const byte_count = (needed_bit_count + 7) / 8;570 pub const byte_count = (needed_bit_count + 7) / 8;
571 pub const usize_count = (byte_count + (@sizeOf(usize) - 1)) / @sizeOf(usize);571 pub const usize_count = (byte_count + (@sizeOf(usize) - 1)) / @sizeOf(usize);
572 pub const Index = std.math.Log2Int(@IntType(false, usize_count * @bitSizeOf(usize)));572 pub const Index = std.math.Log2Int(@IntType(false, usize_count * @bitSizeOf(usize)));
lib/std/target/aarch64.zig+298-24
...@@ -6,6 +6,7 @@ pub const Feature = enum {...@@ -6,6 +6,7 @@ pub const Feature = enum {
6 a53,6 a53,
7 a55,7 a55,
8 a57,8 a57,
9 a65,
9 a72,10 a72,
10 a73,11 a73,
11 a75,12 a75,
...@@ -15,6 +16,11 @@ pub const Feature = enum {...@@ -15,6 +16,11 @@ pub const Feature = enum {
15 alternate_sextload_cvt_f32_pattern,16 alternate_sextload_cvt_f32_pattern,
16 altnzcv,17 altnzcv,
17 am,18 am,
19 apple_a10,
20 apple_a11,
21 apple_a12,
22 apple_a13,
23 apple_a7,
18 arith_bcc_fusion,24 arith_bcc_fusion,
19 arith_cbz_fusion,25 arith_cbz_fusion,
20 balance_fp_ops,26 balance_fp_ops,
...@@ -35,10 +41,10 @@ pub const Feature = enum {...@@ -35,10 +41,10 @@ pub const Feature = enum {
35 crc,41 crc,
36 crypto,42 crypto,
37 custom_cheap_as_move,43 custom_cheap_as_move,
38 cyclone,
39 disable_latency_sched_heuristic,44 disable_latency_sched_heuristic,
40 dit,45 dit,
41 dotprod,46 dotprod,
47 ete,
42 exynos_cheap_as_move,48 exynos_cheap_as_move,
43 exynosm1,49 exynosm1,
44 exynosm2,50 exynosm2,
...@@ -65,12 +71,15 @@ pub const Feature = enum {...@@ -65,12 +71,15 @@ pub const Feature = enum {
65 mpam,71 mpam,
66 mte,72 mte,
67 neon,73 neon,
74 neoversee1,
75 neoversen1,
68 no_neg_immediates,76 no_neg_immediates,
69 nv,77 nv,
70 pa,78 pa,
71 pan,79 pan,
72 pan_rwv,80 pan_rwv,
73 perfmon,81 perfmon,
82 pmu,
74 predictable_select_expensive,83 predictable_select_expensive,
75 predres,84 predres,
76 rand,85 rand,
...@@ -122,16 +131,19 @@ pub const Feature = enum {...@@ -122,16 +131,19 @@ pub const Feature = enum {
122 sve2_bitperm,131 sve2_bitperm,
123 sve2_sha3,132 sve2_sha3,
124 sve2_sm4,133 sve2_sm4,
134 tagged_globals,
125 thunderx,135 thunderx,
126 thunderx2t99,136 thunderx2t99,
127 thunderxt81,137 thunderxt81,
128 thunderxt83,138 thunderxt83,
129 thunderxt88,139 thunderxt88,
130 tlb_rmi,140 tlb_rmi,
141 tme,
131 tpidr_el1,142 tpidr_el1,
132 tpidr_el2,143 tpidr_el2,
133 tpidr_el3,144 tpidr_el3,
134 tracev8_4,145 tracev8_4,
146 trbe,
135 tsv110,147 tsv110,
136 uaops,148 uaops,
137 use_aa,149 use_aa,
...@@ -217,6 +229,21 @@ pub const all_features = blk: {...@@ -217,6 +229,21 @@ pub const all_features = blk: {
217 .use_postra_scheduler,229 .use_postra_scheduler,
218 }),230 }),
219 };231 };
232 result[@enumToInt(Feature.a65)] = .{
233 .llvm_name = "a65",
234 .description = "Cortex-A65 ARM processors",
235 .dependencies = featureSet(&[_]Feature{
236 .crypto,
237 .dotprod,
238 .fp_armv8,
239 .fullfp16,
240 .neon,
241 .ras,
242 .rcpc,
243 .ssbs,
244 .v8_2a,
245 }),
246 };
220 result[@enumToInt(Feature.a72)] = .{247 result[@enumToInt(Feature.a72)] = .{
221 .llvm_name = "a72",248 .llvm_name = "a72",
222 .description = "Cortex-A72 ARM processors",249 .description = "Cortex-A72 ARM processors",
...@@ -297,6 +324,110 @@ pub const all_features = blk: {...@@ -297,6 +324,110 @@ pub const all_features = blk: {
297 .description = "Enable v8.4-A Activity Monitors extension",324 .description = "Enable v8.4-A Activity Monitors extension",
298 .dependencies = featureSet(&[_]Feature{}),325 .dependencies = featureSet(&[_]Feature{}),
299 };326 };
327 result[@enumToInt(Feature.apple_a10)] = .{
328 .llvm_name = "apple-a10",
329 .description = "Apple A10",
330 .dependencies = featureSet(&[_]Feature{
331 .alternate_sextload_cvt_f32_pattern,
332 .arith_bcc_fusion,
333 .arith_cbz_fusion,
334 .crc,
335 .crypto,
336 .disable_latency_sched_heuristic,
337 .fp_armv8,
338 .fuse_aes,
339 .fuse_crypto_eor,
340 .lor,
341 .neon,
342 .pan,
343 .perfmon,
344 .rdm,
345 .vh,
346 .zcm,
347 .zcz,
348 }),
349 };
350 result[@enumToInt(Feature.apple_a11)] = .{
351 .llvm_name = "apple-a11",
352 .description = "Apple A11",
353 .dependencies = featureSet(&[_]Feature{
354 .alternate_sextload_cvt_f32_pattern,
355 .arith_bcc_fusion,
356 .arith_cbz_fusion,
357 .crypto,
358 .disable_latency_sched_heuristic,
359 .fp_armv8,
360 .fullfp16,
361 .fuse_aes,
362 .fuse_crypto_eor,
363 .neon,
364 .perfmon,
365 .v8_2a,
366 .zcm,
367 .zcz,
368 }),
369 };
370 result[@enumToInt(Feature.apple_a12)] = .{
371 .llvm_name = "apple-a12",
372 .description = "Apple A12",
373 .dependencies = featureSet(&[_]Feature{
374 .alternate_sextload_cvt_f32_pattern,
375 .arith_bcc_fusion,
376 .arith_cbz_fusion,
377 .crypto,
378 .disable_latency_sched_heuristic,
379 .fp_armv8,
380 .fullfp16,
381 .fuse_aes,
382 .fuse_crypto_eor,
383 .neon,
384 .perfmon,
385 .v8_3a,
386 .zcm,
387 .zcz,
388 }),
389 };
390 result[@enumToInt(Feature.apple_a13)] = .{
391 .llvm_name = "apple-a13",
392 .description = "Apple A13",
393 .dependencies = featureSet(&[_]Feature{
394 .alternate_sextload_cvt_f32_pattern,
395 .arith_bcc_fusion,
396 .arith_cbz_fusion,
397 .crypto,
398 .disable_latency_sched_heuristic,
399 .fp_armv8,
400 .fp16fml,
401 .fullfp16,
402 .fuse_aes,
403 .fuse_crypto_eor,
404 .neon,
405 .perfmon,
406 .sha3,
407 .v8_4a,
408 .zcm,
409 .zcz,
410 }),
411 };
412 result[@enumToInt(Feature.apple_a7)] = .{
413 .llvm_name = "apple-a7",
414 .description = "Apple A7 (the CPU formerly known as Cyclone)",
415 .dependencies = featureSet(&[_]Feature{
416 .alternate_sextload_cvt_f32_pattern,
417 .arith_bcc_fusion,
418 .arith_cbz_fusion,
419 .crypto,
420 .disable_latency_sched_heuristic,
421 .fp_armv8,
422 .fuse_aes,
423 .fuse_crypto_eor,
424 .neon,
425 .perfmon,
426 .zcm,
427 .zcz,
428 .zcz_fp_workaround,
429 }),
430 };
300 result[@enumToInt(Feature.arith_bcc_fusion)] = .{431 result[@enumToInt(Feature.arith_bcc_fusion)] = .{
301 .llvm_name = "arith-bcc-fusion",432 .llvm_name = "arith-bcc-fusion",
302 .description = "CPU fuses arithmetic+bcc operations",433 .description = "CPU fuses arithmetic+bcc operations",
...@@ -403,25 +534,6 @@ pub const all_features = blk: {...@@ -403,25 +534,6 @@ pub const all_features = blk: {
403 .description = "Use custom handling of cheap instructions",534 .description = "Use custom handling of cheap instructions",
404 .dependencies = featureSet(&[_]Feature{}),535 .dependencies = featureSet(&[_]Feature{}),
405 };536 };
406 result[@enumToInt(Feature.cyclone)] = .{
407 .llvm_name = "cyclone",
408 .description = "Cyclone",
409 .dependencies = featureSet(&[_]Feature{
410 .alternate_sextload_cvt_f32_pattern,
411 .arith_bcc_fusion,
412 .arith_cbz_fusion,
413 .crypto,
414 .disable_latency_sched_heuristic,
415 .fp_armv8,
416 .fuse_aes,
417 .fuse_crypto_eor,
418 .neon,
419 .perfmon,
420 .zcm,
421 .zcz,
422 .zcz_fp_workaround,
423 }),
424 };
425 result[@enumToInt(Feature.disable_latency_sched_heuristic)] = .{537 result[@enumToInt(Feature.disable_latency_sched_heuristic)] = .{
426 .llvm_name = "disable-latency-sched-heuristic",538 .llvm_name = "disable-latency-sched-heuristic",
427 .description = "Disable latency scheduling heuristic",539 .description = "Disable latency scheduling heuristic",
...@@ -437,6 +549,13 @@ pub const all_features = blk: {...@@ -437,6 +549,13 @@ pub const all_features = blk: {
437 .description = "Enable dot product support",549 .description = "Enable dot product support",
438 .dependencies = featureSet(&[_]Feature{}),550 .dependencies = featureSet(&[_]Feature{}),
439 };551 };
552 result[@enumToInt(Feature.ete)] = .{
553 .llvm_name = "ete",
554 .description = "Enable Embedded Trace Extension",
555 .dependencies = featureSet(&[_]Feature{
556 .trbe,
557 }),
558 };
440 result[@enumToInt(Feature.exynos_cheap_as_move)] = .{559 result[@enumToInt(Feature.exynos_cheap_as_move)] = .{
441 .llvm_name = "exynos-cheap-as-move",560 .llvm_name = "exynos-cheap-as-move",
442 .description = "Use Exynos specific handling of cheap instructions",561 .description = "Use Exynos specific handling of cheap instructions",
...@@ -656,6 +775,35 @@ pub const all_features = blk: {...@@ -656,6 +775,35 @@ pub const all_features = blk: {
656 .fp_armv8,775 .fp_armv8,
657 }),776 }),
658 };777 };
778 result[@enumToInt(Feature.neoversee1)] = .{
779 .llvm_name = "neoversee1",
780 .description = "Neoverse E1 ARM processors",
781 .dependencies = featureSet(&[_]Feature{
782 .crypto,
783 .dotprod,
784 .fp_armv8,
785 .fullfp16,
786 .neon,
787 .rcpc,
788 .ssbs,
789 .v8_2a,
790 }),
791 };
792 result[@enumToInt(Feature.neoversen1)] = .{
793 .llvm_name = "neoversen1",
794 .description = "Neoverse N1 ARM processors",
795 .dependencies = featureSet(&[_]Feature{
796 .crypto,
797 .dotprod,
798 .fp_armv8,
799 .fullfp16,
800 .neon,
801 .rcpc,
802 .spe,
803 .ssbs,
804 .v8_2a,
805 }),
806 };
659 result[@enumToInt(Feature.no_neg_immediates)] = .{807 result[@enumToInt(Feature.no_neg_immediates)] = .{
660 .llvm_name = "no-neg-immediates",808 .llvm_name = "no-neg-immediates",
661 .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",809 .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
...@@ -688,6 +836,11 @@ pub const all_features = blk: {...@@ -688,6 +836,11 @@ pub const all_features = blk: {
688 .description = "Enable ARMv8 PMUv3 Performance Monitors extension",836 .description = "Enable ARMv8 PMUv3 Performance Monitors extension",
689 .dependencies = featureSet(&[_]Feature{}),837 .dependencies = featureSet(&[_]Feature{}),
690 };838 };
839 result[@enumToInt(Feature.pmu)] = .{
840 .llvm_name = "pmu",
841 .description = "Enable v8.4-A PMU extension",
842 .dependencies = featureSet(&[_]Feature{}),
843 };
691 result[@enumToInt(Feature.predictable_select_expensive)] = .{844 result[@enumToInt(Feature.predictable_select_expensive)] = .{
692 .llvm_name = "predictable-select-expensive",845 .llvm_name = "predictable-select-expensive",
693 .description = "Prefer likely predicted branches over selects",846 .description = "Prefer likely predicted branches over selects",
...@@ -979,6 +1132,11 @@ pub const all_features = blk: {...@@ -979,6 +1132,11 @@ pub const all_features = blk: {
979 .sve2,1132 .sve2,
980 }),1133 }),
981 };1134 };
1135 result[@enumToInt(Feature.tagged_globals)] = .{
1136 .llvm_name = "tagged-globals",
1137 .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits",
1138 .dependencies = featureSet(&[_]Feature{}),
1139 };
982 result[@enumToInt(Feature.thunderx)] = .{1140 result[@enumToInt(Feature.thunderx)] = .{
983 .llvm_name = "thunderx",1141 .llvm_name = "thunderx",
984 .description = "Cavium ThunderX processors",1142 .description = "Cavium ThunderX processors",
...@@ -1052,6 +1210,11 @@ pub const all_features = blk: {...@@ -1052,6 +1210,11 @@ pub const all_features = blk: {
1052 .description = "Enable v8.4-A TLB Range and Maintenance Instructions",1210 .description = "Enable v8.4-A TLB Range and Maintenance Instructions",
1053 .dependencies = featureSet(&[_]Feature{}),1211 .dependencies = featureSet(&[_]Feature{}),
1054 };1212 };
1213 result[@enumToInt(Feature.tme)] = .{
1214 .llvm_name = "tme",
1215 .description = "Enable Transactional Memory Extension",
1216 .dependencies = featureSet(&[_]Feature{}),
1217 };
1055 result[@enumToInt(Feature.tpidr_el1)] = .{1218 result[@enumToInt(Feature.tpidr_el1)] = .{
1056 .llvm_name = "tpidr-el1",1219 .llvm_name = "tpidr-el1",
1057 .description = "Permit use of TPIDR_EL1 for the TLS base",1220 .description = "Permit use of TPIDR_EL1 for the TLS base",
...@@ -1072,6 +1235,11 @@ pub const all_features = blk: {...@@ -1072,6 +1235,11 @@ pub const all_features = blk: {
1072 .description = "Enable v8.4-A Trace extension",1235 .description = "Enable v8.4-A Trace extension",
1073 .dependencies = featureSet(&[_]Feature{}),1236 .dependencies = featureSet(&[_]Feature{}),
1074 };1237 };
1238 result[@enumToInt(Feature.trbe)] = .{
1239 .llvm_name = "trbe",
1240 .description = "Enable Trace Buffer Extension",
1241 .dependencies = featureSet(&[_]Feature{}),
1242 };
1075 result[@enumToInt(Feature.tsv110)] = .{1243 result[@enumToInt(Feature.tsv110)] = .{
1076 .llvm_name = "tsv110",1244 .llvm_name = "tsv110",
1077 .description = "HiSilicon TS-V110 processors",1245 .description = "HiSilicon TS-V110 processors",
...@@ -1164,6 +1332,7 @@ pub const all_features = blk: {...@@ -1164,6 +1332,7 @@ pub const all_features = blk: {
1164 .fmi,1332 .fmi,
1165 .mpam,1333 .mpam,
1166 .nv,1334 .nv,
1335 .pmu,
1167 .rasv8_4,1336 .rasv8_4,
1168 .rcpc_immo,1337 .rcpc_immo,
1169 .sel2,1338 .sel2,
...@@ -1229,11 +1398,74 @@ pub const all_features = blk: {...@@ -1229,11 +1398,74 @@ pub const all_features = blk: {
1229};1398};
12301399
1231pub const cpu = struct {1400pub const cpu = struct {
1401 pub const apple_a10 = Cpu{
1402 .name = "apple_a10",
1403 .llvm_name = "apple-a10",
1404 .features = featureSet(&[_]Feature{
1405 .apple_a10,
1406 }),
1407 };
1408 pub const apple_a11 = Cpu{
1409 .name = "apple_a11",
1410 .llvm_name = "apple-a11",
1411 .features = featureSet(&[_]Feature{
1412 .apple_a11,
1413 }),
1414 };
1415 pub const apple_a12 = Cpu{
1416 .name = "apple_a12",
1417 .llvm_name = "apple-a12",
1418 .features = featureSet(&[_]Feature{
1419 .apple_a12,
1420 }),
1421 };
1422 pub const apple_a13 = Cpu{
1423 .name = "apple_a13",
1424 .llvm_name = "apple-a13",
1425 .features = featureSet(&[_]Feature{
1426 .apple_a13,
1427 }),
1428 };
1429 pub const apple_a7 = Cpu{
1430 .name = "apple_a7",
1431 .llvm_name = "apple-a7",
1432 .features = featureSet(&[_]Feature{
1433 .apple_a7,
1434 }),
1435 };
1436 pub const apple_a8 = Cpu{
1437 .name = "apple_a8",
1438 .llvm_name = "apple-a8",
1439 .features = featureSet(&[_]Feature{
1440 .apple_a7,
1441 }),
1442 };
1443 pub const apple_a9 = Cpu{
1444 .name = "apple_a9",
1445 .llvm_name = "apple-a9",
1446 .features = featureSet(&[_]Feature{
1447 .apple_a7,
1448 }),
1449 };
1232 pub const apple_latest = Cpu{1450 pub const apple_latest = Cpu{
1233 .name = "apple_latest",1451 .name = "apple_latest",
1234 .llvm_name = "apple-latest",1452 .llvm_name = "apple-latest",
1235 .features = featureSet(&[_]Feature{1453 .features = featureSet(&[_]Feature{
1236 .cyclone,1454 .apple_a13,
1455 }),
1456 };
1457 pub const apple_s4 = Cpu{
1458 .name = "apple_s4",
1459 .llvm_name = "apple-s4",
1460 .features = featureSet(&[_]Feature{
1461 .apple_a12,
1462 }),
1463 };
1464 pub const apple_s5 = Cpu{
1465 .name = "apple_s5",
1466 .llvm_name = "apple-s5",
1467 .features = featureSet(&[_]Feature{
1468 .apple_a12,
1237 }),1469 }),
1238 };1470 };
1239 pub const cortex_a35 = Cpu{1471 pub const cortex_a35 = Cpu{
...@@ -1264,6 +1496,20 @@ pub const cpu = struct {...@@ -1264,6 +1496,20 @@ pub const cpu = struct {
1264 .a57,1496 .a57,
1265 }),1497 }),
1266 };1498 };
1499 pub const cortex_a65 = Cpu{
1500 .name = "cortex_a65",
1501 .llvm_name = "cortex-a65",
1502 .features = featureSet(&[_]Feature{
1503 .a65,
1504 }),
1505 };
1506 pub const cortex_a65ae = Cpu{
1507 .name = "cortex_a65ae",
1508 .llvm_name = "cortex-a65ae",
1509 .features = featureSet(&[_]Feature{
1510 .a65,
1511 }),
1512 };
1267 pub const cortex_a72 = Cpu{1513 pub const cortex_a72 = Cpu{
1268 .name = "cortex_a72",1514 .name = "cortex_a72",
1269 .llvm_name = "cortex-a72",1515 .llvm_name = "cortex-a72",
...@@ -1303,19 +1549,19 @@ pub const cpu = struct {...@@ -1303,19 +1549,19 @@ pub const cpu = struct {
1303 .name = "cyclone",1549 .name = "cyclone",
1304 .llvm_name = "cyclone",1550 .llvm_name = "cyclone",
1305 .features = featureSet(&[_]Feature{1551 .features = featureSet(&[_]Feature{
1306 .cyclone,1552 .apple_a7,
1307 }),1553 }),
1308 };1554 };
1309 pub const exynos_m1 = Cpu{1555 pub const exynos_m1 = Cpu{
1310 .name = "exynos_m1",1556 .name = "exynos_m1",
1311 .llvm_name = "exynos-m1",1557 .llvm_name = null,
1312 .features = featureSet(&[_]Feature{1558 .features = featureSet(&[_]Feature{
1313 .exynosm1,1559 .exynosm1,
1314 }),1560 }),
1315 };1561 };
1316 pub const exynos_m2 = Cpu{1562 pub const exynos_m2 = Cpu{
1317 .name = "exynos_m2",1563 .name = "exynos_m2",
1318 .llvm_name = "exynos-m2",1564 .llvm_name = null,
1319 .features = featureSet(&[_]Feature{1565 .features = featureSet(&[_]Feature{
1320 .exynosm2,1566 .exynosm2,
1321 }),1567 }),
...@@ -1352,6 +1598,7 @@ pub const cpu = struct {...@@ -1352,6 +1598,7 @@ pub const cpu = struct {
1352 .name = "generic",1598 .name = "generic",
1353 .llvm_name = "generic",1599 .llvm_name = "generic",
1354 .features = featureSet(&[_]Feature{1600 .features = featureSet(&[_]Feature{
1601 .ete,
1355 .fp_armv8,1602 .fp_armv8,
1356 .fuse_aes,1603 .fuse_aes,
1357 .neon,1604 .neon,
...@@ -1366,6 +1613,20 @@ pub const cpu = struct {...@@ -1366,6 +1613,20 @@ pub const cpu = struct {
1366 .kryo,1613 .kryo,
1367 }),1614 }),
1368 };1615 };
1616 pub const neoverse_e1 = Cpu{
1617 .name = "neoverse_e1",
1618 .llvm_name = "neoverse-e1",
1619 .features = featureSet(&[_]Feature{
1620 .neoversee1,
1621 }),
1622 };
1623 pub const neoverse_n1 = Cpu{
1624 .name = "neoverse_n1",
1625 .llvm_name = "neoverse-n1",
1626 .features = featureSet(&[_]Feature{
1627 .neoversen1,
1628 }),
1629 };
1369 pub const saphira = Cpu{1630 pub const saphira = Cpu{
1370 .name = "saphira",1631 .name = "saphira",
1371 .llvm_name = "saphira",1632 .llvm_name = "saphira",
...@@ -1421,11 +1682,22 @@ pub const cpu = struct {...@@ -1421,11 +1682,22 @@ pub const cpu = struct {
1421/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage11682/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
1422/// compiler has inefficient memory and CPU usage, affecting build times.1683/// compiler has inefficient memory and CPU usage, affecting build times.
1423pub const all_cpus = &[_]*const Cpu{1684pub const all_cpus = &[_]*const Cpu{
1685 &cpu.apple_a10,
1686 &cpu.apple_a11,
1687 &cpu.apple_a12,
1688 &cpu.apple_a13,
1689 &cpu.apple_a7,
1690 &cpu.apple_a8,
1691 &cpu.apple_a9,
1424 &cpu.apple_latest,1692 &cpu.apple_latest,
1693 &cpu.apple_s4,
1694 &cpu.apple_s5,
1425 &cpu.cortex_a35,1695 &cpu.cortex_a35,
1426 &cpu.cortex_a53,1696 &cpu.cortex_a53,
1427 &cpu.cortex_a55,1697 &cpu.cortex_a55,
1428 &cpu.cortex_a57,1698 &cpu.cortex_a57,
1699 &cpu.cortex_a65,
1700 &cpu.cortex_a65ae,
1429 &cpu.cortex_a72,1701 &cpu.cortex_a72,
1430 &cpu.cortex_a73,1702 &cpu.cortex_a73,
1431 &cpu.cortex_a75,1703 &cpu.cortex_a75,
...@@ -1440,6 +1712,8 @@ pub const all_cpus = &[_]*const Cpu{...@@ -1440,6 +1712,8 @@ pub const all_cpus = &[_]*const Cpu{
1440 &cpu.falkor,1712 &cpu.falkor,
1441 &cpu.generic,1713 &cpu.generic,
1442 &cpu.kryo,1714 &cpu.kryo,
1715 &cpu.neoverse_e1,
1716 &cpu.neoverse_n1,
1443 &cpu.saphira,1717 &cpu.saphira,
1444 &cpu.thunderx,1718 &cpu.thunderx,
1445 &cpu.thunderx2t99,1719 &cpu.thunderx2t99,
lib/std/target/amdgpu.zig+7
...@@ -62,6 +62,7 @@ pub const Feature = enum {...@@ -62,6 +62,7 @@ pub const Feature = enum {
62 max_private_element_size_16,62 max_private_element_size_16,
63 max_private_element_size_4,63 max_private_element_size_4,
64 max_private_element_size_8,64 max_private_element_size_8,
65 mfma_inline_literal_bug,
65 mimg_r128,66 mimg_r128,
66 movrel,67 movrel,
67 no_data_dep_hazard,68 no_data_dep_hazard,
...@@ -490,6 +491,11 @@ pub const all_features = blk: {...@@ -490,6 +491,11 @@ pub const all_features = blk: {
490 .description = "Maximum private access size may be 8",491 .description = "Maximum private access size may be 8",
491 .dependencies = featureSet(&[_]Feature{}),492 .dependencies = featureSet(&[_]Feature{}),
492 };493 };
494 result[@enumToInt(Feature.mfma_inline_literal_bug)] = .{
495 .llvm_name = "mfma-inline-literal-bug",
496 .description = "MFMA cannot use inline literal as SrcC",
497 .dependencies = featureSet(&[_]Feature{}),
498 };
493 result[@enumToInt(Feature.mimg_r128)] = .{499 result[@enumToInt(Feature.mimg_r128)] = .{
494 .llvm_name = "mimg-r128",500 .llvm_name = "mimg-r128",
495 .description = "Support 128-bit texture resources",501 .description = "Support 128-bit texture resources",
...@@ -1102,6 +1108,7 @@ pub const cpu = struct {...@@ -1102,6 +1108,7 @@ pub const cpu = struct {
1102 .half_rate_64_ops,1108 .half_rate_64_ops,
1103 .ldsbankcount32,1109 .ldsbankcount32,
1104 .mai_insts,1110 .mai_insts,
1111 .mfma_inline_literal_bug,
1105 .pk_fmac_f16_inst,1112 .pk_fmac_f16_inst,
1106 .sram_ecc,1113 .sram_ecc,
1107 }),1114 }),
lib/std/target/arm.zig+54-34
...@@ -100,6 +100,9 @@ pub const Feature = enum {...@@ -100,6 +100,9 @@ pub const Feature = enum {
100 muxed_units,100 muxed_units,
101 mve,101 mve,
102 mve_fp,102 mve_fp,
103 mve1beat,
104 mve2beat,
105 mve4beat,
103 nacl_trap,106 nacl_trap,
104 neon,107 neon,
105 neon_fpmovs,108 neon_fpmovs,
...@@ -129,6 +132,7 @@ pub const Feature = enum {...@@ -129,6 +132,7 @@ pub const Feature = enum {
129 slow_odd_reg,132 slow_odd_reg,
130 slow_vdup32,133 slow_vdup32,
131 slow_vgetlni32,134 slow_vgetlni32,
135 slowfpvfmx,
132 slowfpvmlx,136 slowfpvmlx,
133 soft_float,137 soft_float,
134 splat_vfp_neon,138 splat_vfp_neon,
...@@ -137,7 +141,6 @@ pub const Feature = enum {...@@ -137,7 +141,6 @@ pub const Feature = enum {
137 thumb_mode,141 thumb_mode,
138 thumb2,142 thumb2,
139 trustzone,143 trustzone,
140 use_aa,
141 use_misched,144 use_misched,
142 v4t,145 v4t,
143 v5t,146 v5t,
...@@ -158,8 +161,6 @@ pub const Feature = enum {...@@ -158,8 +161,6 @@ pub const Feature = enum {
158 v8m,161 v8m,
159 v8m_main,162 v8m_main,
160 vfp2,163 vfp2,
161 vfp2d16,
162 vfp2d16sp,
163 vfp2sp,164 vfp2sp,
164 vfp3,165 vfp3,
165 vfp3d16,166 vfp3d16,
...@@ -746,9 +747,9 @@ pub const all_features = blk: {...@@ -746,9 +747,9 @@ pub const all_features = blk: {
746 .slow_fp_brcc,747 .slow_fp_brcc,
747 .slow_vdup32,748 .slow_vdup32,
748 .slow_vgetlni32,749 .slow_vgetlni32,
750 .slowfpvfmx,
749 .slowfpvmlx,751 .slowfpvmlx,
750 .splat_vfp_neon,752 .splat_vfp_neon,
751 .use_aa,
752 .wide_stride_vfp,753 .wide_stride_vfp,
753 .zcz,754 .zcz,
754 }),755 }),
...@@ -936,6 +937,21 @@ pub const all_features = blk: {...@@ -936,6 +937,21 @@ pub const all_features = blk: {
936 .mve,937 .mve,
937 }),938 }),
938 };939 };
940 result[@enumToInt(Feature.mve1beat)] = .{
941 .llvm_name = "mve1beat",
942 .description = "Model MVE instructions as a 1 beat per tick architecture",
943 .dependencies = featureSet(&[_]Feature{}),
944 };
945 result[@enumToInt(Feature.mve2beat)] = .{
946 .llvm_name = "mve2beat",
947 .description = "Model MVE instructions as a 2 beats per tick architecture",
948 .dependencies = featureSet(&[_]Feature{}),
949 };
950 result[@enumToInt(Feature.mve4beat)] = .{
951 .llvm_name = "mve4beat",
952 .description = "Model MVE instructions as a 4 beats per tick architecture",
953 .dependencies = featureSet(&[_]Feature{}),
954 };
939 result[@enumToInt(Feature.nacl_trap)] = .{955 result[@enumToInt(Feature.nacl_trap)] = .{
940 .llvm_name = "nacl-trap",956 .llvm_name = "nacl-trap",
941 .description = "NaCl trap",957 .description = "NaCl trap",
...@@ -1085,6 +1101,11 @@ pub const all_features = blk: {...@@ -1085,6 +1101,11 @@ pub const all_features = blk: {
1085 .description = "Has slow VGETLNi32 - prefer VMOV",1101 .description = "Has slow VGETLNi32 - prefer VMOV",
1086 .dependencies = featureSet(&[_]Feature{}),1102 .dependencies = featureSet(&[_]Feature{}),
1087 };1103 };
1104 result[@enumToInt(Feature.slowfpvfmx)] = .{
1105 .llvm_name = "slowfpvfmx",
1106 .description = "Disable VFP / NEON FMA instructions",
1107 .dependencies = featureSet(&[_]Feature{}),
1108 };
1088 result[@enumToInt(Feature.slowfpvmlx)] = .{1109 result[@enumToInt(Feature.slowfpvmlx)] = .{
1089 .llvm_name = "slowfpvmlx",1110 .llvm_name = "slowfpvmlx",
1090 .description = "Disable VFP / NEON MAC instructions",1111 .description = "Disable VFP / NEON MAC instructions",
...@@ -1127,11 +1148,6 @@ pub const all_features = blk: {...@@ -1127,11 +1148,6 @@ pub const all_features = blk: {
1127 .description = "Enable support for TrustZone security extensions",1148 .description = "Enable support for TrustZone security extensions",
1128 .dependencies = featureSet(&[_]Feature{}),1149 .dependencies = featureSet(&[_]Feature{}),
1129 };1150 };
1130 result[@enumToInt(Feature.use_aa)] = .{
1131 .llvm_name = "use-aa",
1132 .description = "Use alias analysis during codegen",
1133 .dependencies = featureSet(&[_]Feature{}),
1134 };
1135 result[@enumToInt(Feature.use_misched)] = .{1151 result[@enumToInt(Feature.use_misched)] = .{
1136 .llvm_name = "use-misched",1152 .llvm_name = "use-misched",
1137 .description = "Use the MachineScheduler",1153 .description = "Use the MachineScheduler",
...@@ -1269,31 +1285,16 @@ pub const all_features = blk: {...@@ -1269,31 +1285,16 @@ pub const all_features = blk: {
1269 result[@enumToInt(Feature.vfp2)] = .{1285 result[@enumToInt(Feature.vfp2)] = .{
1270 .llvm_name = "vfp2",1286 .llvm_name = "vfp2",
1271 .description = "Enable VFP2 instructions",1287 .description = "Enable VFP2 instructions",
1272 .dependencies = featureSet(&[_]Feature{
1273 .vfp2d16,
1274 .vfp2sp,
1275 }),
1276 };
1277 result[@enumToInt(Feature.vfp2d16)] = .{
1278 .llvm_name = "vfp2d16",
1279 .description = "Enable VFP2 instructions",
1280 .dependencies = featureSet(&[_]Feature{1288 .dependencies = featureSet(&[_]Feature{
1281 .fp64,1289 .fp64,
1282 .vfp2d16sp,1290 .vfp2sp,
1283 }),
1284 };
1285 result[@enumToInt(Feature.vfp2d16sp)] = .{
1286 .llvm_name = "vfp2d16sp",
1287 .description = "Enable VFP2 instructions with no double precision",
1288 .dependencies = featureSet(&[_]Feature{
1289 .fpregs,
1290 }),1291 }),
1291 };1292 };
1292 result[@enumToInt(Feature.vfp2sp)] = .{1293 result[@enumToInt(Feature.vfp2sp)] = .{
1293 .llvm_name = "vfp2sp",1294 .llvm_name = "vfp2sp",
1294 .description = "Enable VFP2 instructions with no double precision",1295 .description = "Enable VFP2 instructions with no double precision",
1295 .dependencies = featureSet(&[_]Feature{1296 .dependencies = featureSet(&[_]Feature{
1296 .vfp2d16sp,1297 .fpregs,
1297 }),1298 }),
1298 };1299 };
1299 result[@enumToInt(Feature.vfp3)] = .{1300 result[@enumToInt(Feature.vfp3)] = .{
...@@ -1704,6 +1705,7 @@ pub const cpu = struct {...@@ -1704,6 +1705,7 @@ pub const cpu = struct {
1704 .mp,1705 .mp,
1705 .ret_addr_stack,1706 .ret_addr_stack,
1706 .slow_fp_brcc,1707 .slow_fp_brcc,
1708 .slowfpvfmx,
1707 .slowfpvmlx,1709 .slowfpvmlx,
1708 .trustzone,1710 .trustzone,
1709 .vfp4,1711 .vfp4,
...@@ -1758,6 +1760,7 @@ pub const cpu = struct {...@@ -1758,6 +1760,7 @@ pub const cpu = struct {
1758 .mp,1760 .mp,
1759 .ret_addr_stack,1761 .ret_addr_stack,
1760 .slow_fp_brcc,1762 .slow_fp_brcc,
1763 .slowfpvfmx,
1761 .slowfpvmlx,1764 .slowfpvmlx,
1762 .trustzone,1765 .trustzone,
1763 .vfp4,1766 .vfp4,
...@@ -1838,6 +1841,7 @@ pub const cpu = struct {...@@ -1838,6 +1841,7 @@ pub const cpu = struct {
1838 .nonpipelined_vfp,1841 .nonpipelined_vfp,
1839 .ret_addr_stack,1842 .ret_addr_stack,
1840 .slow_fp_brcc,1843 .slow_fp_brcc,
1844 .slowfpvfmx,
1841 .slowfpvmlx,1845 .slowfpvmlx,
1842 .trustzone,1846 .trustzone,
1843 .vmlx_forwarding,1847 .vmlx_forwarding,
...@@ -1901,7 +1905,6 @@ pub const cpu = struct {...@@ -1901,7 +1905,6 @@ pub const cpu = struct {
1901 .loop_align,1905 .loop_align,
1902 .m3,1906 .m3,
1903 .no_branch_predictor,1907 .no_branch_predictor,
1904 .use_aa,
1905 .use_misched,1908 .use_misched,
1906 }),1909 }),
1907 };1910 };
...@@ -1914,8 +1917,8 @@ pub const cpu = struct {...@@ -1914,8 +1917,8 @@ pub const cpu = struct {
1914 .fp_armv8d16sp,1917 .fp_armv8d16sp,
1915 .loop_align,1918 .loop_align,
1916 .no_branch_predictor,1919 .no_branch_predictor,
1920 .slowfpvfmx,
1917 .slowfpvmlx,1921 .slowfpvmlx,
1918 .use_aa,
1919 .use_misched,1922 .use_misched,
1920 }),1923 }),
1921 };1924 };
...@@ -1928,8 +1931,8 @@ pub const cpu = struct {...@@ -1928,8 +1931,8 @@ pub const cpu = struct {
1928 .fp_armv8d16sp,1931 .fp_armv8d16sp,
1929 .loop_align,1932 .loop_align,
1930 .no_branch_predictor,1933 .no_branch_predictor,
1934 .slowfpvfmx,
1931 .slowfpvmlx,1935 .slowfpvmlx,
1932 .use_aa,
1933 .use_misched,1936 .use_misched,
1934 }),1937 }),
1935 };1938 };
...@@ -1940,8 +1943,8 @@ pub const cpu = struct {...@@ -1940,8 +1943,8 @@ pub const cpu = struct {
1940 .armv7e_m,1943 .armv7e_m,
1941 .loop_align,1944 .loop_align,
1942 .no_branch_predictor,1945 .no_branch_predictor,
1946 .slowfpvfmx,
1943 .slowfpvmlx,1947 .slowfpvmlx,
1944 .use_aa,
1945 .use_misched,1948 .use_misched,
1946 .vfp4d16sp,1949 .vfp4d16sp,
1947 }),1950 }),
...@@ -1973,6 +1976,7 @@ pub const cpu = struct {...@@ -1973,6 +1976,7 @@ pub const cpu = struct {
1973 .r4,1976 .r4,
1974 .ret_addr_stack,1977 .ret_addr_stack,
1975 .slow_fp_brcc,1978 .slow_fp_brcc,
1979 .slowfpvfmx,
1976 .slowfpvmlx,1980 .slowfpvmlx,
1977 .vfp3d16,1981 .vfp3d16,
1978 }),1982 }),
...@@ -1987,6 +1991,7 @@ pub const cpu = struct {...@@ -1987,6 +1991,7 @@ pub const cpu = struct {
1987 .r5,1991 .r5,
1988 .ret_addr_stack,1992 .ret_addr_stack,
1989 .slow_fp_brcc,1993 .slow_fp_brcc,
1994 .slowfpvfmx,
1990 .slowfpvmlx,1995 .slowfpvmlx,
1991 .vfp3d16,1996 .vfp3d16,
1992 }),1997 }),
...@@ -1998,7 +2003,6 @@ pub const cpu = struct {...@@ -1998,7 +2003,6 @@ pub const cpu = struct {
1998 .armv8_r,2003 .armv8_r,
1999 .fpao,2004 .fpao,
2000 .r52,2005 .r52,
2001 .use_aa,
2002 .use_misched,2006 .use_misched,
2003 }),2007 }),
2004 };2008 };
...@@ -2014,6 +2018,7 @@ pub const cpu = struct {...@@ -2014,6 +2018,7 @@ pub const cpu = struct {
2014 .r7,2018 .r7,
2015 .ret_addr_stack,2019 .ret_addr_stack,
2016 .slow_fp_brcc,2020 .slow_fp_brcc,
2021 .slowfpvfmx,
2017 .slowfpvmlx,2022 .slowfpvmlx,
2018 .vfp3d16,2023 .vfp3d16,
2019 }),2024 }),
...@@ -2029,6 +2034,7 @@ pub const cpu = struct {...@@ -2029,6 +2034,7 @@ pub const cpu = struct {
2029 .mp,2034 .mp,
2030 .ret_addr_stack,2035 .ret_addr_stack,
2031 .slow_fp_brcc,2036 .slow_fp_brcc,
2037 .slowfpvfmx,
2032 .slowfpvmlx,2038 .slowfpvmlx,
2033 .vfp3d16,2039 .vfp3d16,
2034 }),2040 }),
...@@ -2047,6 +2053,7 @@ pub const cpu = struct {...@@ -2047,6 +2053,7 @@ pub const cpu = struct {
2047 .mp,2053 .mp,
2048 .neonfp,2054 .neonfp,
2049 .ret_addr_stack,2055 .ret_addr_stack,
2056 .slowfpvfmx,
2050 .slowfpvmlx,2057 .slowfpvmlx,
2051 .swift,2058 .swift,
2052 .use_misched,2059 .use_misched,
...@@ -2063,7 +2070,7 @@ pub const cpu = struct {...@@ -2063,7 +2070,7 @@ pub const cpu = struct {
2063 };2070 };
2064 pub const exynos_m1 = Cpu{2071 pub const exynos_m1 = Cpu{
2065 .name = "exynos_m1",2072 .name = "exynos_m1",
2066 .llvm_name = "exynos-m1",2073 .llvm_name = null,
2067 .features = featureSet(&[_]Feature{2074 .features = featureSet(&[_]Feature{
2068 .armv8_a,2075 .armv8_a,
2069 .exynos,2076 .exynos,
...@@ -2071,7 +2078,7 @@ pub const cpu = struct {...@@ -2071,7 +2078,7 @@ pub const cpu = struct {
2071 };2078 };
2072 pub const exynos_m2 = Cpu{2079 pub const exynos_m2 = Cpu{
2073 .name = "exynos_m2",2080 .name = "exynos_m2",
2074 .llvm_name = "exynos-m2",2081 .llvm_name = null,
2075 .features = featureSet(&[_]Feature{2082 .features = featureSet(&[_]Feature{
2076 .armv8_a,2083 .armv8_a,
2077 .exynos,2084 .exynos,
...@@ -2162,6 +2169,18 @@ pub const cpu = struct {...@@ -2162,6 +2169,18 @@ pub const cpu = struct {
2162 .armv6k,2169 .armv6k,
2163 }),2170 }),
2164 };2171 };
2172 pub const neoverse_n1 = Cpu{
2173 .name = "neoverse_n1",
2174 .llvm_name = "neoverse-n1",
2175 .features = featureSet(&[_]Feature{
2176 .armv8_2_a,
2177 .crc,
2178 .crypto,
2179 .dotprod,
2180 .hwdiv,
2181 .hwdiv_arm,
2182 }),
2183 };
2165 pub const sc000 = Cpu{2184 pub const sc000 = Cpu{
2166 .name = "sc000",2185 .name = "sc000",
2167 .llvm_name = "sc000",2186 .llvm_name = "sc000",
...@@ -2176,7 +2195,6 @@ pub const cpu = struct {...@@ -2176,7 +2195,6 @@ pub const cpu = struct {
2176 .armv7_m,2195 .armv7_m,
2177 .m3,2196 .m3,
2178 .no_branch_predictor,2197 .no_branch_predictor,
2179 .use_aa,
2180 .use_misched,2198 .use_misched,
2181 }),2199 }),
2182 };2200 };
...@@ -2227,6 +2245,7 @@ pub const cpu = struct {...@@ -2227,6 +2245,7 @@ pub const cpu = struct {
2227 .slow_odd_reg,2245 .slow_odd_reg,
2228 .slow_vdup32,2246 .slow_vdup32,
2229 .slow_vgetlni32,2247 .slow_vgetlni32,
2248 .slowfpvfmx,
2230 .slowfpvmlx,2249 .slowfpvmlx,
2231 .swift,2250 .swift,
2232 .use_misched,2251 .use_misched,
...@@ -2322,6 +2341,7 @@ pub const all_cpus = &[_]*const Cpu{...@@ -2322,6 +2341,7 @@ pub const all_cpus = &[_]*const Cpu{
2322 &cpu.kryo,2341 &cpu.kryo,
2323 &cpu.mpcore,2342 &cpu.mpcore,
2324 &cpu.mpcorenovfp,2343 &cpu.mpcorenovfp,
2344 &cpu.neoverse_n1,
2325 &cpu.sc000,2345 &cpu.sc000,
2326 &cpu.sc300,2346 &cpu.sc300,
2327 &cpu.strongarm,2347 &cpu.strongarm,
lib/std/target/mips.zig+32
...@@ -4,6 +4,7 @@ const Cpu = std.Target.Cpu;...@@ -4,6 +4,7 @@ const Cpu = std.Target.Cpu;
4pub const Feature = enum {4pub const Feature = enum {
5 abs2008,5 abs2008,
6 cnmips,6 cnmips,
7 cnmipsp,
7 crc,8 crc,
8 dsp,9 dsp,
9 dspr2,10 dspr2,
...@@ -51,6 +52,7 @@ pub const Feature = enum {...@@ -51,6 +52,7 @@ pub const Feature = enum {
51 use_tcc_in_div,52 use_tcc_in_div,
52 vfpu,53 vfpu,
53 virt,54 virt,
55 xgot,
54};56};
5557
56pub usingnamespace Cpu.Feature.feature_set_fns(Feature);58pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
...@@ -71,6 +73,13 @@ pub const all_features = blk: {...@@ -71,6 +73,13 @@ pub const all_features = blk: {
71 .mips64r2,73 .mips64r2,
72 }),74 }),
73 };75 };
76 result[@enumToInt(Feature.cnmipsp)] = .{
77 .llvm_name = "cnmipsp",
78 .description = "Octeon+ cnMIPS Support",
79 .dependencies = featureSet(&[_]Feature{
80 .cnmips,
81 }),
82 };
74 result[@enumToInt(Feature.crc)] = .{83 result[@enumToInt(Feature.crc)] = .{
75 .llvm_name = "crc",84 .llvm_name = "crc",
76 .description = "Mips R6 CRC ASE",85 .description = "Mips R6 CRC ASE",
...@@ -363,6 +372,11 @@ pub const all_features = blk: {...@@ -363,6 +372,11 @@ pub const all_features = blk: {
363 .description = "Mips Virtualization ASE",372 .description = "Mips Virtualization ASE",
364 .dependencies = featureSet(&[_]Feature{}),373 .dependencies = featureSet(&[_]Feature{}),
365 };374 };
375 result[@enumToInt(Feature.xgot)] = .{
376 .llvm_name = "xgot",
377 .description = "Assume 32-bit GOT",
378 .dependencies = featureSet(&[_]Feature{}),
379 };
366 const ti = @typeInfo(Feature);380 const ti = @typeInfo(Feature);
367 for (result) |*elem, i| {381 for (result) |*elem, i| {
368 elem.index = i;382 elem.index = i;
...@@ -372,6 +386,13 @@ pub const all_features = blk: {...@@ -372,6 +386,13 @@ pub const all_features = blk: {
372};386};
373387
374pub const cpu = struct {388pub const cpu = struct {
389 pub const generic = Cpu{
390 .name = "generic",
391 .llvm_name = "generic",
392 .features = featureSet(&[_]Feature{
393 .mips32,
394 }),
395 };
375 pub const mips1 = Cpu{396 pub const mips1 = Cpu{
376 .name = "mips1",397 .name = "mips1",
377 .llvm_name = "mips1",398 .llvm_name = "mips1",
...@@ -485,6 +506,15 @@ pub const cpu = struct {...@@ -485,6 +506,15 @@ pub const cpu = struct {
485 .mips64r2,506 .mips64r2,
486 }),507 }),
487 };508 };
509 pub const @"octeon+" = Cpu{
510 .name = "octeon+",
511 .llvm_name = "octeon+",
512 .features = featureSet(&[_]Feature{
513 .cnmips,
514 .cnmipsp,
515 .mips64r2,
516 }),
517 };
488 pub const p5600 = Cpu{518 pub const p5600 = Cpu{
489 .name = "p5600",519 .name = "p5600",
490 .llvm_name = "p5600",520 .llvm_name = "p5600",
...@@ -498,6 +528,7 @@ pub const cpu = struct {...@@ -498,6 +528,7 @@ pub const cpu = struct {
498/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1528/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
499/// compiler has inefficient memory and CPU usage, affecting build times.529/// compiler has inefficient memory and CPU usage, affecting build times.
500pub const all_cpus = &[_]*const Cpu{530pub const all_cpus = &[_]*const Cpu{
531 &cpu.generic,
501 &cpu.mips1,532 &cpu.mips1,
502 &cpu.mips2,533 &cpu.mips2,
503 &cpu.mips3,534 &cpu.mips3,
...@@ -514,5 +545,6 @@ pub const all_cpus = &[_]*const Cpu{...@@ -514,5 +545,6 @@ pub const all_cpus = &[_]*const Cpu{
514 &cpu.mips64r5,545 &cpu.mips64r5,
515 &cpu.mips64r6,546 &cpu.mips64r6,
516 &cpu.octeon,547 &cpu.octeon,
548 &cpu.@"octeon+",
517 &cpu.p5600,549 &cpu.p5600,
518};550};
lib/std/target/powerpc.zig+51
...@@ -4,6 +4,7 @@ const Cpu = std.Target.Cpu;...@@ -4,6 +4,7 @@ const Cpu = std.Target.Cpu;
4pub const Feature = enum {4pub const Feature = enum {
5 @"64bit",5 @"64bit",
6 @"64bitregs",6 @"64bitregs",
7 allow_unaligned_fp_access,
7 altivec,8 altivec,
8 booke,9 booke,
9 bpermd,10 bpermd,
...@@ -71,6 +72,11 @@ pub const all_features = blk: {...@@ -71,6 +72,11 @@ pub const all_features = blk: {
71 .description = "Enable 64-bit registers usage for ppc32 [beta]",72 .description = "Enable 64-bit registers usage for ppc32 [beta]",
72 .dependencies = featureSet(&[_]Feature{}),73 .dependencies = featureSet(&[_]Feature{}),
73 };74 };
75 result[@enumToInt(Feature.allow_unaligned_fp_access)] = .{
76 .llvm_name = "allow-unaligned-fp-access",
77 .description = "CPU does not trap on unaligned FP access",
78 .dependencies = featureSet(&[_]Feature{}),
79 };
74 result[@enumToInt(Feature.altivec)] = .{80 result[@enumToInt(Feature.altivec)] = .{
75 .llvm_name = "altivec",81 .llvm_name = "altivec",
76 .description = "Enable Altivec instructions",82 .description = "Enable Altivec instructions",
...@@ -560,6 +566,7 @@ pub const cpu = struct {...@@ -560,6 +566,7 @@ pub const cpu = struct {
560 .booke,566 .booke,
561 .icbt,567 .icbt,
562 .isel,568 .isel,
569 .spe,
563 }),570 }),
564 };571 };
565 pub const e500mc = Cpu{572 pub const e500mc = Cpu{
...@@ -584,6 +591,45 @@ pub const cpu = struct {...@@ -584,6 +591,45 @@ pub const cpu = struct {
584 .stfiwx,591 .stfiwx,
585 }),592 }),
586 };593 };
594 pub const future = Cpu{
595 .name = "future",
596 .llvm_name = "future",
597 .features = featureSet(&[_]Feature{
598 .@"64bit",
599 .allow_unaligned_fp_access,
600 .altivec,
601 .bpermd,
602 .cmpb,
603 .crypto,
604 .direct_move,
605 .extdiv,
606 .fcpsgn,
607 .fpcvt,
608 .fprnd,
609 .fre,
610 .fres,
611 .frsqrte,
612 .frsqrtes,
613 .fsqrt,
614 .htm,
615 .icbt,
616 .isa_v30_instructions,
617 .isel,
618 .ldbrx,
619 .lfiwax,
620 .mfocrf,
621 .partword_atomics,
622 .popcntd,
623 .power8_altivec,
624 .power8_vector,
625 .power9_altivec,
626 .power9_vector,
627 .recipprec,
628 .stfiwx,
629 .two_const_nr,
630 .vsx,
631 }),
632 };
587 pub const g3 = Cpu{633 pub const g3 = Cpu{
588 .name = "g3",634 .name = "g3",
589 .llvm_name = "g3",635 .llvm_name = "g3",
...@@ -662,6 +708,7 @@ pub const cpu = struct {...@@ -662,6 +708,7 @@ pub const cpu = struct {
662 .llvm_name = "ppc64le",708 .llvm_name = "ppc64le",
663 .features = featureSet(&[_]Feature{709 .features = featureSet(&[_]Feature{
664 .@"64bit",710 .@"64bit",
711 .allow_unaligned_fp_access,
665 .altivec,712 .altivec,
666 .bpermd,713 .bpermd,
667 .cmpb,714 .cmpb,
...@@ -793,6 +840,7 @@ pub const cpu = struct {...@@ -793,6 +840,7 @@ pub const cpu = struct {
793 .llvm_name = "pwr7",840 .llvm_name = "pwr7",
794 .features = featureSet(&[_]Feature{841 .features = featureSet(&[_]Feature{
795 .@"64bit",842 .@"64bit",
843 .allow_unaligned_fp_access,
796 .altivec,844 .altivec,
797 .bpermd,845 .bpermd,
798 .cmpb,846 .cmpb,
...@@ -821,6 +869,7 @@ pub const cpu = struct {...@@ -821,6 +869,7 @@ pub const cpu = struct {
821 .llvm_name = "pwr8",869 .llvm_name = "pwr8",
822 .features = featureSet(&[_]Feature{870 .features = featureSet(&[_]Feature{
823 .@"64bit",871 .@"64bit",
872 .allow_unaligned_fp_access,
824 .altivec,873 .altivec,
825 .bpermd,874 .bpermd,
826 .cmpb,875 .cmpb,
...@@ -856,6 +905,7 @@ pub const cpu = struct {...@@ -856,6 +905,7 @@ pub const cpu = struct {
856 .llvm_name = "pwr9",905 .llvm_name = "pwr9",
857 .features = featureSet(&[_]Feature{906 .features = featureSet(&[_]Feature{
858 .@"64bit",907 .@"64bit",
908 .allow_unaligned_fp_access,
859 .altivec,909 .altivec,
860 .bpermd,910 .bpermd,
861 .cmpb,911 .cmpb,
...@@ -917,6 +967,7 @@ pub const all_cpus = &[_]*const Cpu{...@@ -917,6 +967,7 @@ pub const all_cpus = &[_]*const Cpu{
917 &cpu.e500,967 &cpu.e500,
918 &cpu.e500mc,968 &cpu.e500mc,
919 &cpu.e5500,969 &cpu.e5500,
970 &cpu.future,
920 &cpu.g3,971 &cpu.g3,
921 &cpu.g4,972 &cpu.g4,
922 &cpu.@"g4+",973 &cpu.@"g4+",
lib/std/target/riscv.zig+196-2
...@@ -10,6 +10,38 @@ pub const Feature = enum {...@@ -10,6 +10,38 @@ pub const Feature = enum {
10 f,10 f,
11 m,11 m,
12 relax,12 relax,
13 reserve_x1,
14 reserve_x10,
15 reserve_x11,
16 reserve_x12,
17 reserve_x13,
18 reserve_x14,
19 reserve_x15,
20 reserve_x16,
21 reserve_x17,
22 reserve_x18,
23 reserve_x19,
24 reserve_x2,
25 reserve_x20,
26 reserve_x21,
27 reserve_x22,
28 reserve_x23,
29 reserve_x24,
30 reserve_x25,
31 reserve_x26,
32 reserve_x27,
33 reserve_x28,
34 reserve_x29,
35 reserve_x3,
36 reserve_x30,
37 reserve_x31,
38 reserve_x4,
39 reserve_x5,
40 reserve_x6,
41 reserve_x7,
42 reserve_x8,
43 reserve_x9,
44 rvc_hints,
13};45};
1446
15pub usingnamespace Cpu.Feature.feature_set_fns(Feature);47pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
...@@ -60,6 +92,166 @@ pub const all_features = blk: {...@@ -60,6 +92,166 @@ pub const all_features = blk: {
60 .description = "Enable Linker relaxation.",92 .description = "Enable Linker relaxation.",
61 .dependencies = featureSet(&[_]Feature{}),93 .dependencies = featureSet(&[_]Feature{}),
62 };94 };
95 result[@enumToInt(Feature.reserve_x1)] = .{
96 .llvm_name = "reserve-x1",
97 .description = "Reserve X1",
98 .dependencies = featureSet(&[_]Feature{}),
99 };
100 result[@enumToInt(Feature.reserve_x10)] = .{
101 .llvm_name = "reserve-x10",
102 .description = "Reserve X10",
103 .dependencies = featureSet(&[_]Feature{}),
104 };
105 result[@enumToInt(Feature.reserve_x11)] = .{
106 .llvm_name = "reserve-x11",
107 .description = "Reserve X11",
108 .dependencies = featureSet(&[_]Feature{}),
109 };
110 result[@enumToInt(Feature.reserve_x12)] = .{
111 .llvm_name = "reserve-x12",
112 .description = "Reserve X12",
113 .dependencies = featureSet(&[_]Feature{}),
114 };
115 result[@enumToInt(Feature.reserve_x13)] = .{
116 .llvm_name = "reserve-x13",
117 .description = "Reserve X13",
118 .dependencies = featureSet(&[_]Feature{}),
119 };
120 result[@enumToInt(Feature.reserve_x14)] = .{
121 .llvm_name = "reserve-x14",
122 .description = "Reserve X14",
123 .dependencies = featureSet(&[_]Feature{}),
124 };
125 result[@enumToInt(Feature.reserve_x15)] = .{
126 .llvm_name = "reserve-x15",
127 .description = "Reserve X15",
128 .dependencies = featureSet(&[_]Feature{}),
129 };
130 result[@enumToInt(Feature.reserve_x16)] = .{
131 .llvm_name = "reserve-x16",
132 .description = "Reserve X16",
133 .dependencies = featureSet(&[_]Feature{}),
134 };
135 result[@enumToInt(Feature.reserve_x17)] = .{
136 .llvm_name = "reserve-x17",
137 .description = "Reserve X17",
138 .dependencies = featureSet(&[_]Feature{}),
139 };
140 result[@enumToInt(Feature.reserve_x18)] = .{
141 .llvm_name = "reserve-x18",
142 .description = "Reserve X18",
143 .dependencies = featureSet(&[_]Feature{}),
144 };
145 result[@enumToInt(Feature.reserve_x19)] = .{
146 .llvm_name = "reserve-x19",
147 .description = "Reserve X19",
148 .dependencies = featureSet(&[_]Feature{}),
149 };
150 result[@enumToInt(Feature.reserve_x2)] = .{
151 .llvm_name = "reserve-x2",
152 .description = "Reserve X2",
153 .dependencies = featureSet(&[_]Feature{}),
154 };
155 result[@enumToInt(Feature.reserve_x20)] = .{
156 .llvm_name = "reserve-x20",
157 .description = "Reserve X20",
158 .dependencies = featureSet(&[_]Feature{}),
159 };
160 result[@enumToInt(Feature.reserve_x21)] = .{
161 .llvm_name = "reserve-x21",
162 .description = "Reserve X21",
163 .dependencies = featureSet(&[_]Feature{}),
164 };
165 result[@enumToInt(Feature.reserve_x22)] = .{
166 .llvm_name = "reserve-x22",
167 .description = "Reserve X22",
168 .dependencies = featureSet(&[_]Feature{}),
169 };
170 result[@enumToInt(Feature.reserve_x23)] = .{
171 .llvm_name = "reserve-x23",
172 .description = "Reserve X23",
173 .dependencies = featureSet(&[_]Feature{}),
174 };
175 result[@enumToInt(Feature.reserve_x24)] = .{
176 .llvm_name = "reserve-x24",
177 .description = "Reserve X24",
178 .dependencies = featureSet(&[_]Feature{}),
179 };
180 result[@enumToInt(Feature.reserve_x25)] = .{
181 .llvm_name = "reserve-x25",
182 .description = "Reserve X25",
183 .dependencies = featureSet(&[_]Feature{}),
184 };
185 result[@enumToInt(Feature.reserve_x26)] = .{
186 .llvm_name = "reserve-x26",
187 .description = "Reserve X26",
188 .dependencies = featureSet(&[_]Feature{}),
189 };
190 result[@enumToInt(Feature.reserve_x27)] = .{
191 .llvm_name = "reserve-x27",
192 .description = "Reserve X27",
193 .dependencies = featureSet(&[_]Feature{}),
194 };
195 result[@enumToInt(Feature.reserve_x28)] = .{
196 .llvm_name = "reserve-x28",
197 .description = "Reserve X28",
198 .dependencies = featureSet(&[_]Feature{}),
199 };
200 result[@enumToInt(Feature.reserve_x29)] = .{
201 .llvm_name = "reserve-x29",
202 .description = "Reserve X29",
203 .dependencies = featureSet(&[_]Feature{}),
204 };
205 result[@enumToInt(Feature.reserve_x3)] = .{
206 .llvm_name = "reserve-x3",
207 .description = "Reserve X3",
208 .dependencies = featureSet(&[_]Feature{}),
209 };
210 result[@enumToInt(Feature.reserve_x30)] = .{
211 .llvm_name = "reserve-x30",
212 .description = "Reserve X30",
213 .dependencies = featureSet(&[_]Feature{}),
214 };
215 result[@enumToInt(Feature.reserve_x31)] = .{
216 .llvm_name = "reserve-x31",
217 .description = "Reserve X31",
218 .dependencies = featureSet(&[_]Feature{}),
219 };
220 result[@enumToInt(Feature.reserve_x4)] = .{
221 .llvm_name = "reserve-x4",
222 .description = "Reserve X4",
223 .dependencies = featureSet(&[_]Feature{}),
224 };
225 result[@enumToInt(Feature.reserve_x5)] = .{
226 .llvm_name = "reserve-x5",
227 .description = "Reserve X5",
228 .dependencies = featureSet(&[_]Feature{}),
229 };
230 result[@enumToInt(Feature.reserve_x6)] = .{
231 .llvm_name = "reserve-x6",
232 .description = "Reserve X6",
233 .dependencies = featureSet(&[_]Feature{}),
234 };
235 result[@enumToInt(Feature.reserve_x7)] = .{
236 .llvm_name = "reserve-x7",
237 .description = "Reserve X7",
238 .dependencies = featureSet(&[_]Feature{}),
239 };
240 result[@enumToInt(Feature.reserve_x8)] = .{
241 .llvm_name = "reserve-x8",
242 .description = "Reserve X8",
243 .dependencies = featureSet(&[_]Feature{}),
244 };
245 result[@enumToInt(Feature.reserve_x9)] = .{
246 .llvm_name = "reserve-x9",
247 .description = "Reserve X9",
248 .dependencies = featureSet(&[_]Feature{}),
249 };
250 result[@enumToInt(Feature.rvc_hints)] = .{
251 .llvm_name = "rvc-hints",
252 .description = "Enable RVC Hint Instructions.",
253 .dependencies = featureSet(&[_]Feature{}),
254 };
63 const ti = @typeInfo(Feature);255 const ti = @typeInfo(Feature);
64 for (result) |*elem, i| {256 for (result) |*elem, i| {
65 elem.index = i;257 elem.index = i;
...@@ -99,14 +291,16 @@ pub const cpu = struct {...@@ -99,14 +291,16 @@ pub const cpu = struct {
99 pub const generic_rv32 = Cpu{291 pub const generic_rv32 = Cpu{
100 .name = "generic_rv32",292 .name = "generic_rv32",
101 .llvm_name = "generic-rv32",293 .llvm_name = "generic-rv32",
102 .features = featureSet(&[_]Feature{}),294 .features = featureSet(&[_]Feature{
295 .rvc_hints,
296 }),
103 };297 };
104
105 pub const generic_rv64 = Cpu{298 pub const generic_rv64 = Cpu{
106 .name = "generic_rv64",299 .name = "generic_rv64",
107 .llvm_name = "generic-rv64",300 .llvm_name = "generic-rv64",
108 .features = featureSet(&[_]Feature{301 .features = featureSet(&[_]Feature{
109 .@"64bit",302 .@"64bit",
303 .rvc_hints,
110 }),304 }),
111 };305 };
112};306};
lib/std/target/systemz.zig+42
...@@ -450,6 +450,47 @@ pub const cpu = struct {...@@ -450,6 +450,47 @@ pub const cpu = struct {
450 .vector_packed_decimal,450 .vector_packed_decimal,
451 }),451 }),
452 };452 };
453 pub const z15 = Cpu{
454 .name = "z15",
455 .llvm_name = "z15",
456 .features = featureSet(&[_]Feature{
457 .deflate_conversion,
458 .dfp_packed_conversion,
459 .dfp_zoned_conversion,
460 .distinct_ops,
461 .enhanced_dat_2,
462 .enhanced_sort,
463 .execution_hint,
464 .fast_serialization,
465 .fp_extension,
466 .guarded_storage,
467 .high_word,
468 .insert_reference_bits_multiple,
469 .interlocked_access1,
470 .load_and_trap,
471 .load_and_zero_rightmost_byte,
472 .load_store_on_cond,
473 .load_store_on_cond_2,
474 .message_security_assist_extension3,
475 .message_security_assist_extension4,
476 .message_security_assist_extension5,
477 .message_security_assist_extension7,
478 .message_security_assist_extension8,
479 .message_security_assist_extension9,
480 .miscellaneous_extensions,
481 .miscellaneous_extensions_2,
482 .miscellaneous_extensions_3,
483 .population_count,
484 .processor_assist,
485 .reset_reference_bits_multiple,
486 .transactional_execution,
487 .vector,
488 .vector_enhancements_1,
489 .vector_enhancements_2,
490 .vector_packed_decimal,
491 .vector_packed_decimal_enhancement,
492 }),
493 };
453 pub const z196 = Cpu{494 pub const z196 = Cpu{
454 .name = "z196",495 .name = "z196",
455 .llvm_name = "z196",496 .llvm_name = "z196",
...@@ -505,6 +546,7 @@ pub const all_cpus = &[_]*const Cpu{...@@ -505,6 +546,7 @@ pub const all_cpus = &[_]*const Cpu{
505 &cpu.z10,546 &cpu.z10,
506 &cpu.z13,547 &cpu.z13,
507 &cpu.z14,548 &cpu.z14,
549 &cpu.z15,
508 &cpu.z196,550 &cpu.z196,
509 &cpu.zEC12,551 &cpu.zEC12,
510};552};
lib/std/target/x86.zig+213-25
...@@ -2,9 +2,12 @@ const std = @import("../std.zig");...@@ -2,9 +2,12 @@ const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;2const Cpu = std.Target.Cpu;
33
4pub const Feature = enum {4pub const Feature = enum {
5 @"16bit_mode",
6 @"32bit_mode",
5 @"3dnow",7 @"3dnow",
6 @"3dnowa",8 @"3dnowa",
7 @"64bit",9 @"64bit",
10 @"64bit_mode",
8 adx,11 adx,
9 aes,12 aes,
10 avx,13 avx,
...@@ -45,7 +48,6 @@ pub const Feature = enum {...@@ -45,7 +48,6 @@ pub const Feature = enum {
45 fast_gather,48 fast_gather,
46 fast_hops,49 fast_hops,
47 fast_lzcnt,50 fast_lzcnt,
48 fast_partial_ymm_or_zmm_write,
49 fast_scalar_fsqrt,51 fast_scalar_fsqrt,
50 fast_scalar_shift_masks,52 fast_scalar_shift_masks,
51 fast_shld_rotate,53 fast_shld_rotate,
...@@ -78,7 +80,9 @@ pub const Feature = enum {...@@ -78,7 +80,9 @@ pub const Feature = enum {
78 pconfig,80 pconfig,
79 pku,81 pku,
80 popcnt,82 popcnt,
83 prefer_128_bit,
81 prefer_256_bit,84 prefer_256_bit,
85 prefer_mask_registers,
82 prefetchwt1,86 prefetchwt1,
83 prfchw,87 prfchw,
84 ptwrite,88 ptwrite,
...@@ -113,8 +117,11 @@ pub const Feature = enum {...@@ -113,8 +117,11 @@ pub const Feature = enum {
113 sse4a,117 sse4a,
114 ssse3,118 ssse3,
115 tbm,119 tbm,
120 use_aa,
121 use_glm_div_sqrt_costs,
116 vaes,122 vaes,
117 vpclmulqdq,123 vpclmulqdq,
124 vzeroupper,
118 waitpkg,125 waitpkg,
119 wbnoinvd,126 wbnoinvd,
120 x87,127 x87,
...@@ -131,6 +138,16 @@ pub const all_features = blk: {...@@ -131,6 +138,16 @@ pub const all_features = blk: {
131 const len = @typeInfo(Feature).Enum.fields.len;138 const len = @typeInfo(Feature).Enum.fields.len;
132 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);139 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
133 var result: [len]Cpu.Feature = undefined;140 var result: [len]Cpu.Feature = undefined;
141 result[@enumToInt(Feature.@"16bit_mode")] = .{
142 .llvm_name = "16bit-mode",
143 .description = "16-bit mode (i8086)",
144 .dependencies = featureSet(&[_]Feature{}),
145 };
146 result[@enumToInt(Feature.@"32bit_mode")] = .{
147 .llvm_name = "32bit-mode",
148 .description = "32-bit mode (80386)",
149 .dependencies = featureSet(&[_]Feature{}),
150 };
134 result[@enumToInt(Feature.@"3dnow")] = .{151 result[@enumToInt(Feature.@"3dnow")] = .{
135 .llvm_name = "3dnow",152 .llvm_name = "3dnow",
136 .description = "Enable 3DNow! instructions",153 .description = "Enable 3DNow! instructions",
...@@ -150,6 +167,11 @@ pub const all_features = blk: {...@@ -150,6 +167,11 @@ pub const all_features = blk: {
150 .description = "Support 64-bit instructions",167 .description = "Support 64-bit instructions",
151 .dependencies = featureSet(&[_]Feature{}),168 .dependencies = featureSet(&[_]Feature{}),
152 };169 };
170 result[@enumToInt(Feature.@"64bit_mode")] = .{
171 .llvm_name = "64bit-mode",
172 .description = "64-bit mode (x86_64)",
173 .dependencies = featureSet(&[_]Feature{}),
174 };
153 result[@enumToInt(Feature.adx)] = .{175 result[@enumToInt(Feature.adx)] = .{
154 .llvm_name = "adx",176 .llvm_name = "adx",
155 .description = "Support ADX instructions",177 .description = "Support ADX instructions",
...@@ -385,20 +407,13 @@ pub const all_features = blk: {...@@ -385,20 +407,13 @@ pub const all_features = blk: {
385 result[@enumToInt(Feature.fast_hops)] = .{407 result[@enumToInt(Feature.fast_hops)] = .{
386 .llvm_name = "fast-hops",408 .llvm_name = "fast-hops",
387 .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",409 .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",
388 .dependencies = featureSet(&[_]Feature{410 .dependencies = featureSet(&[_]Feature{}),
389 .sse3,
390 }),
391 };411 };
392 result[@enumToInt(Feature.fast_lzcnt)] = .{412 result[@enumToInt(Feature.fast_lzcnt)] = .{
393 .llvm_name = "fast-lzcnt",413 .llvm_name = "fast-lzcnt",
394 .description = "LZCNT instructions are as fast as most simple integer ops",414 .description = "LZCNT instructions are as fast as most simple integer ops",
395 .dependencies = featureSet(&[_]Feature{}),415 .dependencies = featureSet(&[_]Feature{}),
396 };416 };
397 result[@enumToInt(Feature.fast_partial_ymm_or_zmm_write)] = .{
398 .llvm_name = "fast-partial-ymm-or-zmm-write",
399 .description = "Partial writes to YMM/ZMM registers are fast",
400 .dependencies = featureSet(&[_]Feature{}),
401 };
402 result[@enumToInt(Feature.fast_scalar_fsqrt)] = .{417 result[@enumToInt(Feature.fast_scalar_fsqrt)] = .{
403 .llvm_name = "fast-scalar-fsqrt",418 .llvm_name = "fast-scalar-fsqrt",
404 .description = "Scalar SQRT is fast (disable Newton-Raphson)",419 .description = "Scalar SQRT is fast (disable Newton-Raphson)",
...@@ -528,7 +543,7 @@ pub const all_features = blk: {...@@ -528,7 +543,7 @@ pub const all_features = blk: {
528 };543 };
529 result[@enumToInt(Feature.mpx)] = .{544 result[@enumToInt(Feature.mpx)] = .{
530 .llvm_name = "mpx",545 .llvm_name = "mpx",
531 .description = "Support MPX instructions",546 .description = "Deprecated. Support MPX instructions",
532 .dependencies = featureSet(&[_]Feature{}),547 .dependencies = featureSet(&[_]Feature{}),
533 };548 };
534 result[@enumToInt(Feature.mwaitx)] = .{549 result[@enumToInt(Feature.mwaitx)] = .{
...@@ -568,11 +583,21 @@ pub const all_features = blk: {...@@ -568,11 +583,21 @@ pub const all_features = blk: {
568 .description = "Support POPCNT instruction",583 .description = "Support POPCNT instruction",
569 .dependencies = featureSet(&[_]Feature{}),584 .dependencies = featureSet(&[_]Feature{}),
570 };585 };
586 result[@enumToInt(Feature.prefer_128_bit)] = .{
587 .llvm_name = "prefer-128-bit",
588 .description = "Prefer 128-bit AVX instructions",
589 .dependencies = featureSet(&[_]Feature{}),
590 };
571 result[@enumToInt(Feature.prefer_256_bit)] = .{591 result[@enumToInt(Feature.prefer_256_bit)] = .{
572 .llvm_name = "prefer-256-bit",592 .llvm_name = "prefer-256-bit",
573 .description = "Prefer 256-bit AVX instructions",593 .description = "Prefer 256-bit AVX instructions",
574 .dependencies = featureSet(&[_]Feature{}),594 .dependencies = featureSet(&[_]Feature{}),
575 };595 };
596 result[@enumToInt(Feature.prefer_mask_registers)] = .{
597 .llvm_name = "prefer-mask-registers",
598 .description = "Prefer AVX512 mask registers over PTEST/MOVMSK",
599 .dependencies = featureSet(&[_]Feature{}),
600 };
576 result[@enumToInt(Feature.prefetchwt1)] = .{601 result[@enumToInt(Feature.prefetchwt1)] = .{
577 .llvm_name = "prefetchwt1",602 .llvm_name = "prefetchwt1",
578 .description = "Prefetch with Intent to Write and T1 Hint",603 .description = "Prefetch with Intent to Write and T1 Hint",
...@@ -762,6 +787,16 @@ pub const all_features = blk: {...@@ -762,6 +787,16 @@ pub const all_features = blk: {
762 .description = "Enable TBM instructions",787 .description = "Enable TBM instructions",
763 .dependencies = featureSet(&[_]Feature{}),788 .dependencies = featureSet(&[_]Feature{}),
764 };789 };
790 result[@enumToInt(Feature.use_aa)] = .{
791 .llvm_name = "use-aa",
792 .description = "Use alias analysis during codegen",
793 .dependencies = featureSet(&[_]Feature{}),
794 };
795 result[@enumToInt(Feature.use_glm_div_sqrt_costs)] = .{
796 .llvm_name = "use-glm-div-sqrt-costs",
797 .description = "Use Goldmont specific floating point div/sqrt costs",
798 .dependencies = featureSet(&[_]Feature{}),
799 };
765 result[@enumToInt(Feature.vaes)] = .{800 result[@enumToInt(Feature.vaes)] = .{
766 .llvm_name = "vaes",801 .llvm_name = "vaes",
767 .description = "Promote selected AES instructions to AVX512/AVX registers",802 .description = "Promote selected AES instructions to AVX512/AVX registers",
...@@ -778,6 +813,11 @@ pub const all_features = blk: {...@@ -778,6 +813,11 @@ pub const all_features = blk: {
778 .pclmul,813 .pclmul,
779 }),814 }),
780 };815 };
816 result[@enumToInt(Feature.vzeroupper)] = .{
817 .llvm_name = "vzeroupper",
818 .description = "Should insert vzeroupper instructions",
819 .dependencies = featureSet(&[_]Feature{}),
820 };
781 result[@enumToInt(Feature.waitpkg)] = .{821 result[@enumToInt(Feature.waitpkg)] = .{
782 .llvm_name = "waitpkg",822 .llvm_name = "waitpkg",
783 .description = "Wait and pause enhancements",823 .description = "Wait and pause enhancements",
...@@ -846,6 +886,7 @@ pub const cpu = struct {...@@ -846,6 +886,7 @@ pub const cpu = struct {
846 .sahf,886 .sahf,
847 .slow_shld,887 .slow_shld,
848 .sse4a,888 .sse4a,
889 .vzeroupper,
849 .x87,890 .x87,
850 }),891 }),
851 };892 };
...@@ -859,6 +900,7 @@ pub const cpu = struct {...@@ -859,6 +900,7 @@ pub const cpu = struct {
859 .nopl,900 .nopl,
860 .slow_shld,901 .slow_shld,
861 .slow_unaligned_mem_16,902 .slow_unaligned_mem_16,
903 .vzeroupper,
862 .x87,904 .x87,
863 }),905 }),
864 };906 };
...@@ -874,6 +916,7 @@ pub const cpu = struct {...@@ -874,6 +916,7 @@ pub const cpu = struct {
874 .slow_shld,916 .slow_shld,
875 .slow_unaligned_mem_16,917 .slow_unaligned_mem_16,
876 .sse,918 .sse,
919 .vzeroupper,
877 .x87,920 .x87,
878 }),921 }),
879 };922 };
...@@ -891,6 +934,7 @@ pub const cpu = struct {...@@ -891,6 +934,7 @@ pub const cpu = struct {
891 .slow_shld,934 .slow_shld,
892 .slow_unaligned_mem_16,935 .slow_unaligned_mem_16,
893 .sse2,936 .sse2,
937 .vzeroupper,
894 .x87,938 .x87,
895 }),939 }),
896 };940 };
...@@ -906,6 +950,7 @@ pub const cpu = struct {...@@ -906,6 +950,7 @@ pub const cpu = struct {
906 .slow_shld,950 .slow_shld,
907 .slow_unaligned_mem_16,951 .slow_unaligned_mem_16,
908 .sse,952 .sse,
953 .vzeroupper,
909 .x87,954 .x87,
910 }),955 }),
911 };956 };
...@@ -919,6 +964,7 @@ pub const cpu = struct {...@@ -919,6 +964,7 @@ pub const cpu = struct {
919 .nopl,964 .nopl,
920 .slow_shld,965 .slow_shld,
921 .slow_unaligned_mem_16,966 .slow_unaligned_mem_16,
967 .vzeroupper,
922 .x87,968 .x87,
923 }),969 }),
924 };970 };
...@@ -934,6 +980,7 @@ pub const cpu = struct {...@@ -934,6 +980,7 @@ pub const cpu = struct {
934 .slow_shld,980 .slow_shld,
935 .slow_unaligned_mem_16,981 .slow_unaligned_mem_16,
936 .sse,982 .sse,
983 .vzeroupper,
937 .x87,984 .x87,
938 }),985 }),
939 };986 };
...@@ -951,6 +998,7 @@ pub const cpu = struct {...@@ -951,6 +998,7 @@ pub const cpu = struct {
951 .slow_shld,998 .slow_shld,
952 .slow_unaligned_mem_16,999 .slow_unaligned_mem_16,
953 .sse2,1000 .sse2,
1001 .vzeroupper,
954 .x87,1002 .x87,
955 }),1003 }),
956 };1004 };
...@@ -969,6 +1017,7 @@ pub const cpu = struct {...@@ -969,6 +1017,7 @@ pub const cpu = struct {
969 .slow_shld,1017 .slow_shld,
970 .slow_unaligned_mem_16,1018 .slow_unaligned_mem_16,
971 .sse3,1019 .sse3,
1020 .vzeroupper,
972 .x87,1021 .x87,
973 }),1022 }),
974 };1023 };
...@@ -993,6 +1042,7 @@ pub const cpu = struct {...@@ -993,6 +1042,7 @@ pub const cpu = struct {
993 .slow_two_mem_ops,1042 .slow_two_mem_ops,
994 .slow_unaligned_mem_16,1043 .slow_unaligned_mem_16,
995 .ssse3,1044 .ssse3,
1045 .vzeroupper,
996 .x87,1046 .x87,
997 }),1047 }),
998 };1048 };
...@@ -1013,6 +1063,7 @@ pub const cpu = struct {...@@ -1013,6 +1063,7 @@ pub const cpu = struct {
1013 .sahf,1063 .sahf,
1014 .slow_shld,1064 .slow_shld,
1015 .sse4a,1065 .sse4a,
1066 .vzeroupper,
1016 .x87,1067 .x87,
1017 }),1068 }),
1018 };1069 };
...@@ -1038,6 +1089,7 @@ pub const cpu = struct {...@@ -1038,6 +1089,7 @@ pub const cpu = struct {
1038 .prfchw,1089 .prfchw,
1039 .sahf,1090 .sahf,
1040 .slow_shld,1091 .slow_shld,
1092 .vzeroupper,
1041 .x87,1093 .x87,
1042 .xop,1094 .xop,
1043 .xsave,1095 .xsave,
...@@ -1070,6 +1122,7 @@ pub const cpu = struct {...@@ -1070,6 +1122,7 @@ pub const cpu = struct {
1070 .sahf,1122 .sahf,
1071 .slow_shld,1123 .slow_shld,
1072 .tbm,1124 .tbm,
1125 .vzeroupper,
1073 .x87,1126 .x87,
1074 .xop,1127 .xop,
1075 .xsave,1128 .xsave,
...@@ -1103,6 +1156,7 @@ pub const cpu = struct {...@@ -1103,6 +1156,7 @@ pub const cpu = struct {
1103 .sahf,1156 .sahf,
1104 .slow_shld,1157 .slow_shld,
1105 .tbm,1158 .tbm,
1159 .vzeroupper,
1106 .x87,1160 .x87,
1107 .xop,1161 .xop,
1108 .xsave,1162 .xsave,
...@@ -1140,6 +1194,7 @@ pub const cpu = struct {...@@ -1140,6 +1194,7 @@ pub const cpu = struct {
1140 .sahf,1194 .sahf,
1141 .slow_shld,1195 .slow_shld,
1142 .tbm,1196 .tbm,
1197 .vzeroupper,
1143 .x87,1198 .x87,
1144 .xop,1199 .xop,
1145 .xsave,1200 .xsave,
...@@ -1167,6 +1222,7 @@ pub const cpu = struct {...@@ -1167,6 +1222,7 @@ pub const cpu = struct {
1167 .slow_two_mem_ops,1222 .slow_two_mem_ops,
1168 .slow_unaligned_mem_16,1223 .slow_unaligned_mem_16,
1169 .ssse3,1224 .ssse3,
1225 .vzeroupper,
1170 .x87,1226 .x87,
1171 }),1227 }),
1172 };1228 };
...@@ -1209,6 +1265,7 @@ pub const cpu = struct {...@@ -1209,6 +1265,7 @@ pub const cpu = struct {
1209 .sahf,1265 .sahf,
1210 .slow_3ops_lea,1266 .slow_3ops_lea,
1211 .sse4_2,1267 .sse4_2,
1268 .vzeroupper,
1212 .x87,1269 .x87,
1213 .xsave,1270 .xsave,
1214 .xsaveopt,1271 .xsaveopt,
...@@ -1235,6 +1292,7 @@ pub const cpu = struct {...@@ -1235,6 +1292,7 @@ pub const cpu = struct {
1235 .slow_shld,1292 .slow_shld,
1236 .sse4a,1293 .sse4a,
1237 .ssse3,1294 .ssse3,
1295 .vzeroupper,
1238 .x87,1296 .x87,
1239 }),1297 }),
1240 };1298 };
...@@ -1254,7 +1312,6 @@ pub const cpu = struct {...@@ -1254,7 +1312,6 @@ pub const cpu = struct {
1254 .fast_bextr,1312 .fast_bextr,
1255 .fast_hops,1313 .fast_hops,
1256 .fast_lzcnt,1314 .fast_lzcnt,
1257 .fast_partial_ymm_or_zmm_write,
1258 .fast_scalar_shift_masks,1315 .fast_scalar_shift_masks,
1259 .fast_vector_shift_masks,1316 .fast_vector_shift_masks,
1260 .fxsr,1317 .fxsr,
...@@ -1280,6 +1337,7 @@ pub const cpu = struct {...@@ -1280,6 +1337,7 @@ pub const cpu = struct {
1280 .features = featureSet(&[_]Feature{1337 .features = featureSet(&[_]Feature{
1281 .@"3dnow",1338 .@"3dnow",
1282 .slow_unaligned_mem_16,1339 .slow_unaligned_mem_16,
1340 .vzeroupper,
1283 .x87,1341 .x87,
1284 }),1342 }),
1285 };1343 };
...@@ -1293,6 +1351,7 @@ pub const cpu = struct {...@@ -1293,6 +1351,7 @@ pub const cpu = struct {
1293 .mmx,1351 .mmx,
1294 .slow_unaligned_mem_16,1352 .slow_unaligned_mem_16,
1295 .sse,1353 .sse,
1354 .vzeroupper,
1296 .x87,1355 .x87,
1297 }),1356 }),
1298 };1357 };
...@@ -1335,11 +1394,11 @@ pub const cpu = struct {...@@ -1335,11 +1394,11 @@ pub const cpu = struct {
1335 .merge_to_threeway_branch,1394 .merge_to_threeway_branch,
1336 .mmx,1395 .mmx,
1337 .movbe,1396 .movbe,
1338 .mpx,
1339 .nopl,1397 .nopl,
1340 .pclmul,1398 .pclmul,
1341 .pku,1399 .pku,
1342 .popcnt,1400 .popcnt,
1401 .prefer_256_bit,
1343 .prfchw,1402 .prfchw,
1344 .rdrnd,1403 .rdrnd,
1345 .rdseed,1404 .rdseed,
...@@ -1348,6 +1407,7 @@ pub const cpu = struct {...@@ -1348,6 +1407,7 @@ pub const cpu = struct {
1348 .sha,1407 .sha,
1349 .slow_3ops_lea,1408 .slow_3ops_lea,
1350 .sse4_2,1409 .sse4_2,
1410 .vzeroupper,
1351 .x87,1411 .x87,
1352 .xsave,1412 .xsave,
1353 .xsavec,1413 .xsavec,
...@@ -1395,17 +1455,18 @@ pub const cpu = struct {...@@ -1395,17 +1455,18 @@ pub const cpu = struct {
1395 .merge_to_threeway_branch,1455 .merge_to_threeway_branch,
1396 .mmx,1456 .mmx,
1397 .movbe,1457 .movbe,
1398 .mpx,
1399 .nopl,1458 .nopl,
1400 .pclmul,1459 .pclmul,
1401 .pku,1460 .pku,
1402 .popcnt,1461 .popcnt,
1462 .prefer_256_bit,
1403 .prfchw,1463 .prfchw,
1404 .rdrnd,1464 .rdrnd,
1405 .rdseed,1465 .rdseed,
1406 .sahf,1466 .sahf,
1407 .slow_3ops_lea,1467 .slow_3ops_lea,
1408 .sse4_2,1468 .sse4_2,
1469 .vzeroupper,
1409 .x87,1470 .x87,
1410 .xsave,1471 .xsave,
1411 .xsavec,1472 .xsavec,
...@@ -1454,17 +1515,18 @@ pub const cpu = struct {...@@ -1454,17 +1515,18 @@ pub const cpu = struct {
1454 .merge_to_threeway_branch,1515 .merge_to_threeway_branch,
1455 .mmx,1516 .mmx,
1456 .movbe,1517 .movbe,
1457 .mpx,
1458 .nopl,1518 .nopl,
1459 .pclmul,1519 .pclmul,
1460 .pku,1520 .pku,
1461 .popcnt,1521 .popcnt,
1522 .prefer_256_bit,
1462 .prfchw,1523 .prfchw,
1463 .rdrnd,1524 .rdrnd,
1464 .rdseed,1525 .rdseed,
1465 .sahf,1526 .sahf,
1466 .slow_3ops_lea,1527 .slow_3ops_lea,
1467 .sse4_2,1528 .sse4_2,
1529 .vzeroupper,
1468 .x87,1530 .x87,
1469 .xsave,1531 .xsave,
1470 .xsavec,1532 .xsavec,
...@@ -1499,6 +1561,7 @@ pub const cpu = struct {...@@ -1499,6 +1561,7 @@ pub const cpu = struct {
1499 .slow_3ops_lea,1561 .slow_3ops_lea,
1500 .slow_unaligned_mem_32,1562 .slow_unaligned_mem_32,
1501 .sse4_2,1563 .sse4_2,
1564 .vzeroupper,
1502 .x87,1565 .x87,
1503 .xsave,1566 .xsave,
1504 .xsaveopt,1567 .xsaveopt,
...@@ -1540,6 +1603,7 @@ pub const cpu = struct {...@@ -1540,6 +1603,7 @@ pub const cpu = struct {
1540 .sahf,1603 .sahf,
1541 .slow_3ops_lea,1604 .slow_3ops_lea,
1542 .sse4_2,1605 .sse4_2,
1606 .vzeroupper,
1543 .x87,1607 .x87,
1544 .xsave,1608 .xsave,
1545 .xsaveopt,1609 .xsaveopt,
...@@ -1560,6 +1624,7 @@ pub const cpu = struct {...@@ -1560,6 +1624,7 @@ pub const cpu = struct {
1560 .sahf,1624 .sahf,
1561 .slow_unaligned_mem_16,1625 .slow_unaligned_mem_16,
1562 .ssse3,1626 .ssse3,
1627 .vzeroupper,
1563 .x87,1628 .x87,
1564 }),1629 }),
1565 };1630 };
...@@ -1578,6 +1643,7 @@ pub const cpu = struct {...@@ -1578,6 +1643,7 @@ pub const cpu = struct {
1578 .popcnt,1643 .popcnt,
1579 .sahf,1644 .sahf,
1580 .sse4_2,1645 .sse4_2,
1646 .vzeroupper,
1581 .x87,1647 .x87,
1582 }),1648 }),
1583 };1649 };
...@@ -1605,6 +1671,7 @@ pub const cpu = struct {...@@ -1605,6 +1671,7 @@ pub const cpu = struct {
1605 .slow_3ops_lea,1671 .slow_3ops_lea,
1606 .slow_unaligned_mem_32,1672 .slow_unaligned_mem_32,
1607 .sse4_2,1673 .sse4_2,
1674 .vzeroupper,
1608 .x87,1675 .x87,
1609 .xsave,1676 .xsave,
1610 .xsaveopt,1677 .xsaveopt,
...@@ -1616,6 +1683,7 @@ pub const cpu = struct {...@@ -1616,6 +1683,7 @@ pub const cpu = struct {
1616 .features = featureSet(&[_]Feature{1683 .features = featureSet(&[_]Feature{
1617 .cx8,1684 .cx8,
1618 .slow_unaligned_mem_16,1685 .slow_unaligned_mem_16,
1686 .vzeroupper,
1619 .x87,1687 .x87,
1620 }),1688 }),
1621 };1689 };
...@@ -1626,6 +1694,7 @@ pub const cpu = struct {...@@ -1626,6 +1694,7 @@ pub const cpu = struct {
1626 .@"3dnowa",1694 .@"3dnowa",
1627 .cx8,1695 .cx8,
1628 .slow_unaligned_mem_16,1696 .slow_unaligned_mem_16,
1697 .vzeroupper,
1629 .x87,1698 .x87,
1630 }),1699 }),
1631 };1700 };
...@@ -1644,7 +1713,6 @@ pub const cpu = struct {...@@ -1644,7 +1713,6 @@ pub const cpu = struct {
1644 .fxsr,1713 .fxsr,
1645 .mmx,1714 .mmx,
1646 .movbe,1715 .movbe,
1647 .mpx,
1648 .nopl,1716 .nopl,
1649 .pclmul,1717 .pclmul,
1650 .popcnt,1718 .popcnt,
...@@ -1658,6 +1726,8 @@ pub const cpu = struct {...@@ -1658,6 +1726,8 @@ pub const cpu = struct {
1658 .slow_two_mem_ops,1726 .slow_two_mem_ops,
1659 .sse4_2,1727 .sse4_2,
1660 .ssse3,1728 .ssse3,
1729 .use_glm_div_sqrt_costs,
1730 .vzeroupper,
1661 .x87,1731 .x87,
1662 .xsave,1732 .xsave,
1663 .xsavec,1733 .xsavec,
...@@ -1679,7 +1749,6 @@ pub const cpu = struct {...@@ -1679,7 +1749,6 @@ pub const cpu = struct {
1679 .fxsr,1749 .fxsr,
1680 .mmx,1750 .mmx,
1681 .movbe,1751 .movbe,
1682 .mpx,
1683 .nopl,1752 .nopl,
1684 .pclmul,1753 .pclmul,
1685 .popcnt,1754 .popcnt,
...@@ -1696,6 +1765,8 @@ pub const cpu = struct {...@@ -1696,6 +1765,8 @@ pub const cpu = struct {
1696 .slow_two_mem_ops,1765 .slow_two_mem_ops,
1697 .sse4_2,1766 .sse4_2,
1698 .ssse3,1767 .ssse3,
1768 .use_glm_div_sqrt_costs,
1769 .vzeroupper,
1699 .x87,1770 .x87,
1700 .xsave,1771 .xsave,
1701 .xsavec,1772 .xsavec,
...@@ -1739,6 +1810,7 @@ pub const cpu = struct {...@@ -1739,6 +1810,7 @@ pub const cpu = struct {
1739 .sahf,1810 .sahf,
1740 .slow_3ops_lea,1811 .slow_3ops_lea,
1741 .sse4_2,1812 .sse4_2,
1813 .vzeroupper,
1742 .x87,1814 .x87,
1743 .xsave,1815 .xsave,
1744 .xsaveopt,1816 .xsaveopt,
...@@ -1749,6 +1821,7 @@ pub const cpu = struct {...@@ -1749,6 +1821,7 @@ pub const cpu = struct {
1749 .llvm_name = "i386",1821 .llvm_name = "i386",
1750 .features = featureSet(&[_]Feature{1822 .features = featureSet(&[_]Feature{
1751 .slow_unaligned_mem_16,1823 .slow_unaligned_mem_16,
1824 .vzeroupper,
1752 .x87,1825 .x87,
1753 }),1826 }),
1754 };1827 };
...@@ -1757,6 +1830,7 @@ pub const cpu = struct {...@@ -1757,6 +1830,7 @@ pub const cpu = struct {
1757 .llvm_name = "i486",1830 .llvm_name = "i486",
1758 .features = featureSet(&[_]Feature{1831 .features = featureSet(&[_]Feature{
1759 .slow_unaligned_mem_16,1832 .slow_unaligned_mem_16,
1833 .vzeroupper,
1760 .x87,1834 .x87,
1761 }),1835 }),
1762 };1836 };
...@@ -1766,6 +1840,7 @@ pub const cpu = struct {...@@ -1766,6 +1840,7 @@ pub const cpu = struct {
1766 .features = featureSet(&[_]Feature{1840 .features = featureSet(&[_]Feature{
1767 .cx8,1841 .cx8,
1768 .slow_unaligned_mem_16,1842 .slow_unaligned_mem_16,
1843 .vzeroupper,
1769 .x87,1844 .x87,
1770 }),1845 }),
1771 };1846 };
...@@ -1776,6 +1851,7 @@ pub const cpu = struct {...@@ -1776,6 +1851,7 @@ pub const cpu = struct {
1776 .cmov,1851 .cmov,
1777 .cx8,1852 .cx8,
1778 .slow_unaligned_mem_16,1853 .slow_unaligned_mem_16,
1854 .vzeroupper,
1779 .x87,1855 .x87,
1780 }),1856 }),
1781 };1857 };
...@@ -1824,11 +1900,11 @@ pub const cpu = struct {...@@ -1824,11 +1900,11 @@ pub const cpu = struct {
1824 .merge_to_threeway_branch,1900 .merge_to_threeway_branch,
1825 .mmx,1901 .mmx,
1826 .movbe,1902 .movbe,
1827 .mpx,
1828 .nopl,1903 .nopl,
1829 .pclmul,1904 .pclmul,
1830 .pku,1905 .pku,
1831 .popcnt,1906 .popcnt,
1907 .prefer_256_bit,
1832 .prfchw,1908 .prfchw,
1833 .rdpid,1909 .rdpid,
1834 .rdrnd,1910 .rdrnd,
...@@ -1840,6 +1916,7 @@ pub const cpu = struct {...@@ -1840,6 +1916,7 @@ pub const cpu = struct {
1840 .sse4_2,1916 .sse4_2,
1841 .vaes,1917 .vaes,
1842 .vpclmulqdq,1918 .vpclmulqdq,
1919 .vzeroupper,
1843 .x87,1920 .x87,
1844 .xsave,1921 .xsave,
1845 .xsavec,1922 .xsavec,
...@@ -1892,12 +1969,12 @@ pub const cpu = struct {...@@ -1892,12 +1969,12 @@ pub const cpu = struct {
1892 .merge_to_threeway_branch,1969 .merge_to_threeway_branch,
1893 .mmx,1970 .mmx,
1894 .movbe,1971 .movbe,
1895 .mpx,
1896 .nopl,1972 .nopl,
1897 .pclmul,1973 .pclmul,
1898 .pconfig,1974 .pconfig,
1899 .pku,1975 .pku,
1900 .popcnt,1976 .popcnt,
1977 .prefer_256_bit,
1901 .prfchw,1978 .prfchw,
1902 .rdpid,1979 .rdpid,
1903 .rdrnd,1980 .rdrnd,
...@@ -1909,6 +1986,7 @@ pub const cpu = struct {...@@ -1909,6 +1986,7 @@ pub const cpu = struct {
1909 .sse4_2,1986 .sse4_2,
1910 .vaes,1987 .vaes,
1911 .vpclmulqdq,1988 .vpclmulqdq,
1989 .vzeroupper,
1912 .wbnoinvd,1990 .wbnoinvd,
1913 .x87,1991 .x87,
1914 .xsave,1992 .xsave,
...@@ -1944,6 +2022,7 @@ pub const cpu = struct {...@@ -1944,6 +2022,7 @@ pub const cpu = struct {
1944 .slow_3ops_lea,2022 .slow_3ops_lea,
1945 .slow_unaligned_mem_32,2023 .slow_unaligned_mem_32,
1946 .sse4_2,2024 .sse4_2,
2025 .vzeroupper,
1947 .x87,2026 .x87,
1948 .xsave,2027 .xsave,
1949 .xsaveopt,2028 .xsaveopt,
...@@ -1956,6 +2035,7 @@ pub const cpu = struct {...@@ -1956,6 +2035,7 @@ pub const cpu = struct {
1956 .cx8,2035 .cx8,
1957 .mmx,2036 .mmx,
1958 .slow_unaligned_mem_16,2037 .slow_unaligned_mem_16,
2038 .vzeroupper,
1959 .x87,2039 .x87,
1960 }),2040 }),
1961 };2041 };
...@@ -1966,6 +2046,7 @@ pub const cpu = struct {...@@ -1966,6 +2046,7 @@ pub const cpu = struct {
1966 .@"3dnow",2046 .@"3dnow",
1967 .cx8,2047 .cx8,
1968 .slow_unaligned_mem_16,2048 .slow_unaligned_mem_16,
2049 .vzeroupper,
1969 .x87,2050 .x87,
1970 }),2051 }),
1971 };2052 };
...@@ -1976,6 +2057,7 @@ pub const cpu = struct {...@@ -1976,6 +2057,7 @@ pub const cpu = struct {
1976 .@"3dnow",2057 .@"3dnow",
1977 .cx8,2058 .cx8,
1978 .slow_unaligned_mem_16,2059 .slow_unaligned_mem_16,
2060 .vzeroupper,
1979 .x87,2061 .x87,
1980 }),2062 }),
1981 };2063 };
...@@ -1993,6 +2075,7 @@ pub const cpu = struct {...@@ -1993,6 +2075,7 @@ pub const cpu = struct {
1993 .slow_shld,2075 .slow_shld,
1994 .slow_unaligned_mem_16,2076 .slow_unaligned_mem_16,
1995 .sse2,2077 .sse2,
2078 .vzeroupper,
1996 .x87,2079 .x87,
1997 }),2080 }),
1998 };2081 };
...@@ -2011,6 +2094,7 @@ pub const cpu = struct {...@@ -2011,6 +2094,7 @@ pub const cpu = struct {
2011 .slow_shld,2094 .slow_shld,
2012 .slow_unaligned_mem_16,2095 .slow_unaligned_mem_16,
2013 .sse3,2096 .sse3,
2097 .vzeroupper,
2014 .x87,2098 .x87,
2015 }),2099 }),
2016 };2100 };
...@@ -2032,7 +2116,6 @@ pub const cpu = struct {...@@ -2032,7 +2116,6 @@ pub const cpu = struct {
2032 .cx8,2116 .cx8,
2033 .f16c,2117 .f16c,
2034 .fast_gather,2118 .fast_gather,
2035 .fast_partial_ymm_or_zmm_write,
2036 .fma,2119 .fma,
2037 .fsgsbase,2120 .fsgsbase,
2038 .fxsr,2121 .fxsr,
...@@ -2043,6 +2126,7 @@ pub const cpu = struct {...@@ -2043,6 +2126,7 @@ pub const cpu = struct {
2043 .nopl,2126 .nopl,
2044 .pclmul,2127 .pclmul,
2045 .popcnt,2128 .popcnt,
2129 .prefer_mask_registers,
2046 .prefetchwt1,2130 .prefetchwt1,
2047 .prfchw,2131 .prfchw,
2048 .rdrnd,2132 .rdrnd,
...@@ -2076,7 +2160,6 @@ pub const cpu = struct {...@@ -2076,7 +2160,6 @@ pub const cpu = struct {
2076 .cx8,2160 .cx8,
2077 .f16c,2161 .f16c,
2078 .fast_gather,2162 .fast_gather,
2079 .fast_partial_ymm_or_zmm_write,
2080 .fma,2163 .fma,
2081 .fsgsbase,2164 .fsgsbase,
2082 .fxsr,2165 .fxsr,
...@@ -2087,6 +2170,7 @@ pub const cpu = struct {...@@ -2087,6 +2170,7 @@ pub const cpu = struct {
2087 .nopl,2170 .nopl,
2088 .pclmul,2171 .pclmul,
2089 .popcnt,2172 .popcnt,
2173 .prefer_mask_registers,
2090 .prefetchwt1,2174 .prefetchwt1,
2091 .prfchw,2175 .prfchw,
2092 .rdrnd,2176 .rdrnd,
...@@ -2104,7 +2188,9 @@ pub const cpu = struct {...@@ -2104,7 +2188,9 @@ pub const cpu = struct {
2104 pub const lakemont = Cpu{2188 pub const lakemont = Cpu{
2105 .name = "lakemont",2189 .name = "lakemont",
2106 .llvm_name = "lakemont",2190 .llvm_name = "lakemont",
2107 .features = featureSet(&[_]Feature{}),2191 .features = featureSet(&[_]Feature{
2192 .vzeroupper,
2193 }),
2108 };2194 };
2109 pub const nehalem = Cpu{2195 pub const nehalem = Cpu{
2110 .name = "nehalem",2196 .name = "nehalem",
...@@ -2121,6 +2207,7 @@ pub const cpu = struct {...@@ -2121,6 +2207,7 @@ pub const cpu = struct {
2121 .popcnt,2207 .popcnt,
2122 .sahf,2208 .sahf,
2123 .sse4_2,2209 .sse4_2,
2210 .vzeroupper,
2124 .x87,2211 .x87,
2125 }),2212 }),
2126 };2213 };
...@@ -2137,6 +2224,7 @@ pub const cpu = struct {...@@ -2137,6 +2224,7 @@ pub const cpu = struct {
2137 .nopl,2224 .nopl,
2138 .slow_unaligned_mem_16,2225 .slow_unaligned_mem_16,
2139 .sse3,2226 .sse3,
2227 .vzeroupper,
2140 .x87,2228 .x87,
2141 }),2229 }),
2142 };2230 };
...@@ -2154,6 +2242,7 @@ pub const cpu = struct {...@@ -2154,6 +2242,7 @@ pub const cpu = struct {
2154 .slow_shld,2242 .slow_shld,
2155 .slow_unaligned_mem_16,2243 .slow_unaligned_mem_16,
2156 .sse2,2244 .sse2,
2245 .vzeroupper,
2157 .x87,2246 .x87,
2158 }),2247 }),
2159 };2248 };
...@@ -2172,6 +2261,7 @@ pub const cpu = struct {...@@ -2172,6 +2261,7 @@ pub const cpu = struct {
2172 .slow_shld,2261 .slow_shld,
2173 .slow_unaligned_mem_16,2262 .slow_unaligned_mem_16,
2174 .sse3,2263 .sse3,
2264 .vzeroupper,
2175 .x87,2265 .x87,
2176 }),2266 }),
2177 };2267 };
...@@ -2190,6 +2280,7 @@ pub const cpu = struct {...@@ -2190,6 +2280,7 @@ pub const cpu = struct {
2190 .sahf,2280 .sahf,
2191 .slow_unaligned_mem_16,2281 .slow_unaligned_mem_16,
2192 .sse4_1,2282 .sse4_1,
2283 .vzeroupper,
2193 .x87,2284 .x87,
2194 }),2285 }),
2195 };2286 };
...@@ -2199,6 +2290,7 @@ pub const cpu = struct {...@@ -2199,6 +2290,7 @@ pub const cpu = struct {
2199 .features = featureSet(&[_]Feature{2290 .features = featureSet(&[_]Feature{
2200 .cx8,2291 .cx8,
2201 .slow_unaligned_mem_16,2292 .slow_unaligned_mem_16,
2293 .vzeroupper,
2202 .x87,2294 .x87,
2203 }),2295 }),
2204 };2296 };
...@@ -2213,6 +2305,7 @@ pub const cpu = struct {...@@ -2213,6 +2305,7 @@ pub const cpu = struct {
2213 .nopl,2305 .nopl,
2214 .slow_unaligned_mem_16,2306 .slow_unaligned_mem_16,
2215 .sse2,2307 .sse2,
2308 .vzeroupper,
2216 .x87,2309 .x87,
2217 }),2310 }),
2218 };2311 };
...@@ -2223,6 +2316,7 @@ pub const cpu = struct {...@@ -2223,6 +2316,7 @@ pub const cpu = struct {
2223 .cx8,2316 .cx8,
2224 .mmx,2317 .mmx,
2225 .slow_unaligned_mem_16,2318 .slow_unaligned_mem_16,
2319 .vzeroupper,
2226 .x87,2320 .x87,
2227 }),2321 }),
2228 };2322 };
...@@ -2236,6 +2330,7 @@ pub const cpu = struct {...@@ -2236,6 +2330,7 @@ pub const cpu = struct {
2236 .mmx,2330 .mmx,
2237 .nopl,2331 .nopl,
2238 .slow_unaligned_mem_16,2332 .slow_unaligned_mem_16,
2333 .vzeroupper,
2239 .x87,2334 .x87,
2240 }),2335 }),
2241 };2336 };
...@@ -2250,6 +2345,7 @@ pub const cpu = struct {...@@ -2250,6 +2345,7 @@ pub const cpu = struct {
2250 .nopl,2345 .nopl,
2251 .slow_unaligned_mem_16,2346 .slow_unaligned_mem_16,
2252 .sse,2347 .sse,
2348 .vzeroupper,
2253 .x87,2349 .x87,
2254 }),2350 }),
2255 };2351 };
...@@ -2264,6 +2360,7 @@ pub const cpu = struct {...@@ -2264,6 +2360,7 @@ pub const cpu = struct {
2264 .nopl,2360 .nopl,
2265 .slow_unaligned_mem_16,2361 .slow_unaligned_mem_16,
2266 .sse,2362 .sse,
2363 .vzeroupper,
2267 .x87,2364 .x87,
2268 }),2365 }),
2269 };2366 };
...@@ -2278,6 +2375,7 @@ pub const cpu = struct {...@@ -2278,6 +2375,7 @@ pub const cpu = struct {
2278 .nopl,2375 .nopl,
2279 .slow_unaligned_mem_16,2376 .slow_unaligned_mem_16,
2280 .sse2,2377 .sse2,
2378 .vzeroupper,
2281 .x87,2379 .x87,
2282 }),2380 }),
2283 };2381 };
...@@ -2292,6 +2390,7 @@ pub const cpu = struct {...@@ -2292,6 +2390,7 @@ pub const cpu = struct {
2292 .nopl,2390 .nopl,
2293 .slow_unaligned_mem_16,2391 .slow_unaligned_mem_16,
2294 .sse2,2392 .sse2,
2393 .vzeroupper,
2295 .x87,2394 .x87,
2296 }),2395 }),
2297 };2396 };
...@@ -2303,6 +2402,7 @@ pub const cpu = struct {...@@ -2303,6 +2402,7 @@ pub const cpu = struct {
2303 .cx8,2402 .cx8,
2304 .nopl,2403 .nopl,
2305 .slow_unaligned_mem_16,2404 .slow_unaligned_mem_16,
2405 .vzeroupper,
2306 .x87,2406 .x87,
2307 }),2407 }),
2308 };2408 };
...@@ -2317,6 +2417,7 @@ pub const cpu = struct {...@@ -2317,6 +2417,7 @@ pub const cpu = struct {
2317 .nopl,2417 .nopl,
2318 .slow_unaligned_mem_16,2418 .slow_unaligned_mem_16,
2319 .sse3,2419 .sse3,
2420 .vzeroupper,
2320 .x87,2421 .x87,
2321 }),2422 }),
2322 };2423 };
...@@ -2344,6 +2445,7 @@ pub const cpu = struct {...@@ -2344,6 +2445,7 @@ pub const cpu = struct {
2344 .slow_3ops_lea,2445 .slow_3ops_lea,
2345 .slow_unaligned_mem_32,2446 .slow_unaligned_mem_32,
2346 .sse4_2,2447 .sse4_2,
2448 .vzeroupper,
2347 .x87,2449 .x87,
2348 .xsave,2450 .xsave,
2349 .xsaveopt,2451 .xsaveopt,
...@@ -2374,6 +2476,7 @@ pub const cpu = struct {...@@ -2374,6 +2476,7 @@ pub const cpu = struct {
2374 .slow_two_mem_ops,2476 .slow_two_mem_ops,
2375 .sse4_2,2477 .sse4_2,
2376 .ssse3,2478 .ssse3,
2479 .vzeroupper,
2377 .x87,2480 .x87,
2378 }),2481 }),
2379 };2482 };
...@@ -2416,17 +2519,18 @@ pub const cpu = struct {...@@ -2416,17 +2519,18 @@ pub const cpu = struct {
2416 .merge_to_threeway_branch,2519 .merge_to_threeway_branch,
2417 .mmx,2520 .mmx,
2418 .movbe,2521 .movbe,
2419 .mpx,
2420 .nopl,2522 .nopl,
2421 .pclmul,2523 .pclmul,
2422 .pku,2524 .pku,
2423 .popcnt,2525 .popcnt,
2526 .prefer_256_bit,
2424 .prfchw,2527 .prfchw,
2425 .rdrnd,2528 .rdrnd,
2426 .rdseed,2529 .rdseed,
2427 .sahf,2530 .sahf,
2428 .slow_3ops_lea,2531 .slow_3ops_lea,
2429 .sse4_2,2532 .sse4_2,
2533 .vzeroupper,
2430 .x87,2534 .x87,
2431 .xsave,2535 .xsave,
2432 .xsavec,2536 .xsavec,
...@@ -2467,7 +2571,6 @@ pub const cpu = struct {...@@ -2467,7 +2571,6 @@ pub const cpu = struct {
2467 .merge_to_threeway_branch,2571 .merge_to_threeway_branch,
2468 .mmx,2572 .mmx,
2469 .movbe,2573 .movbe,
2470 .mpx,
2471 .nopl,2574 .nopl,
2472 .pclmul,2575 .pclmul,
2473 .popcnt,2576 .popcnt,
...@@ -2478,6 +2581,7 @@ pub const cpu = struct {...@@ -2478,6 +2581,7 @@ pub const cpu = struct {
2478 .sgx,2581 .sgx,
2479 .slow_3ops_lea,2582 .slow_3ops_lea,
2480 .sse4_2,2583 .sse4_2,
2584 .vzeroupper,
2481 .x87,2585 .x87,
2482 .xsave,2586 .xsave,
2483 .xsavec,2587 .xsavec,
...@@ -2524,17 +2628,18 @@ pub const cpu = struct {...@@ -2524,17 +2628,18 @@ pub const cpu = struct {
2524 .merge_to_threeway_branch,2628 .merge_to_threeway_branch,
2525 .mmx,2629 .mmx,
2526 .movbe,2630 .movbe,
2527 .mpx,
2528 .nopl,2631 .nopl,
2529 .pclmul,2632 .pclmul,
2530 .pku,2633 .pku,
2531 .popcnt,2634 .popcnt,
2635 .prefer_256_bit,
2532 .prfchw,2636 .prfchw,
2533 .rdrnd,2637 .rdrnd,
2534 .rdseed,2638 .rdseed,
2535 .sahf,2639 .sahf,
2536 .slow_3ops_lea,2640 .slow_3ops_lea,
2537 .sse4_2,2641 .sse4_2,
2642 .vzeroupper,
2538 .x87,2643 .x87,
2539 .xsave,2644 .xsave,
2540 .xsavec,2645 .xsavec,
...@@ -2567,7 +2672,81 @@ pub const cpu = struct {...@@ -2567,7 +2672,81 @@ pub const cpu = struct {
2567 .slow_two_mem_ops,2672 .slow_two_mem_ops,
2568 .sse4_2,2673 .sse4_2,
2569 .ssse3,2674 .ssse3,
2675 .vzeroupper,
2676 .x87,
2677 }),
2678 };
2679 pub const tigerlake = Cpu{
2680 .name = "tigerlake",
2681 .llvm_name = "tigerlake",
2682 .features = featureSet(&[_]Feature{
2683 .@"64bit",
2684 .adx,
2685 .aes,
2686 .avx,
2687 .avx2,
2688 .avx512bitalg,
2689 .avx512bw,
2690 .avx512cd,
2691 .avx512dq,
2692 .avx512f,
2693 .avx512ifma,
2694 .avx512vbmi,
2695 .avx512vbmi2,
2696 .avx512vl,
2697 .avx512vnni,
2698 .avx512vp2intersect,
2699 .avx512vpopcntdq,
2700 .bmi,
2701 .bmi2,
2702 .clflushopt,
2703 .clwb,
2704 .cmov,
2705 .cx16,
2706 .cx8,
2707 .ermsb,
2708 .f16c,
2709 .fast_gather,
2710 .fast_scalar_fsqrt,
2711 .fast_shld_rotate,
2712 .fast_variable_shuffle,
2713 .fast_vector_fsqrt,
2714 .fma,
2715 .fsgsbase,
2716 .fxsr,
2717 .gfni,
2718 .idivq_to_divl,
2719 .invpcid,
2720 .lzcnt,
2721 .macrofusion,
2722 .merge_to_threeway_branch,
2723 .mmx,
2724 .movbe,
2725 .movdir64b,
2726 .movdiri,
2727 .nopl,
2728 .pclmul,
2729 .pku,
2730 .popcnt,
2731 .prefer_256_bit,
2732 .prfchw,
2733 .rdpid,
2734 .rdrnd,
2735 .rdseed,
2736 .sahf,
2737 .sgx,
2738 .sha,
2739 .shstk,
2740 .slow_3ops_lea,
2741 .sse4_2,
2742 .vaes,
2743 .vpclmulqdq,
2744 .vzeroupper,
2570 .x87,2745 .x87,
2746 .xsave,
2747 .xsavec,
2748 .xsaveopt,
2749 .xsaves,
2571 }),2750 }),
2572 };2751 };
2573 pub const tremont = Cpu{2752 pub const tremont = Cpu{
...@@ -2588,7 +2767,6 @@ pub const cpu = struct {...@@ -2588,7 +2767,6 @@ pub const cpu = struct {
2588 .movbe,2767 .movbe,
2589 .movdir64b,2768 .movdir64b,
2590 .movdiri,2769 .movdiri,
2591 .mpx,
2592 .nopl,2770 .nopl,
2593 .pclmul,2771 .pclmul,
2594 .popcnt,2772 .popcnt,
...@@ -2605,6 +2783,8 @@ pub const cpu = struct {...@@ -2605,6 +2783,8 @@ pub const cpu = struct {
2605 .slow_two_mem_ops,2783 .slow_two_mem_ops,
2606 .sse4_2,2784 .sse4_2,
2607 .ssse3,2785 .ssse3,
2786 .use_glm_div_sqrt_costs,
2787 .vzeroupper,
2608 .waitpkg,2788 .waitpkg,
2609 .x87,2789 .x87,
2610 .xsave,2790 .xsave,
...@@ -2629,6 +2809,7 @@ pub const cpu = struct {...@@ -2629,6 +2809,7 @@ pub const cpu = struct {
2629 .popcnt,2809 .popcnt,
2630 .sahf,2810 .sahf,
2631 .sse4_2,2811 .sse4_2,
2812 .vzeroupper,
2632 .x87,2813 .x87,
2633 }),2814 }),
2634 };2815 };
...@@ -2638,6 +2819,7 @@ pub const cpu = struct {...@@ -2638,6 +2819,7 @@ pub const cpu = struct {
2638 .features = featureSet(&[_]Feature{2819 .features = featureSet(&[_]Feature{
2639 .mmx,2820 .mmx,
2640 .slow_unaligned_mem_16,2821 .slow_unaligned_mem_16,
2822 .vzeroupper,
2641 .x87,2823 .x87,
2642 }),2824 }),
2643 };2825 };
...@@ -2647,6 +2829,7 @@ pub const cpu = struct {...@@ -2647,6 +2829,7 @@ pub const cpu = struct {
2647 .features = featureSet(&[_]Feature{2829 .features = featureSet(&[_]Feature{
2648 .@"3dnow",2830 .@"3dnow",
2649 .slow_unaligned_mem_16,2831 .slow_unaligned_mem_16,
2832 .vzeroupper,
2650 .x87,2833 .x87,
2651 }),2834 }),
2652 };2835 };
...@@ -2664,6 +2847,7 @@ pub const cpu = struct {...@@ -2664,6 +2847,7 @@ pub const cpu = struct {
2664 .slow_3ops_lea,2847 .slow_3ops_lea,
2665 .slow_incdec,2848 .slow_incdec,
2666 .sse2,2849 .sse2,
2850 .vzeroupper,
2667 .x87,2851 .x87,
2668 }),2852 }),
2669 };2853 };
...@@ -2678,6 +2862,7 @@ pub const cpu = struct {...@@ -2678,6 +2862,7 @@ pub const cpu = struct {
2678 .nopl,2862 .nopl,
2679 .slow_unaligned_mem_16,2863 .slow_unaligned_mem_16,
2680 .sse3,2864 .sse3,
2865 .vzeroupper,
2681 .x87,2866 .x87,
2682 }),2867 }),
2683 };2868 };
...@@ -2718,6 +2903,7 @@ pub const cpu = struct {...@@ -2718,6 +2903,7 @@ pub const cpu = struct {
2718 .sha,2903 .sha,
2719 .slow_shld,2904 .slow_shld,
2720 .sse4a,2905 .sse4a,
2906 .vzeroupper,
2721 .x87,2907 .x87,
2722 .xsave,2908 .xsave,
2723 .xsavec,2909 .xsavec,
...@@ -2764,6 +2950,7 @@ pub const cpu = struct {...@@ -2764,6 +2950,7 @@ pub const cpu = struct {
2764 .sha,2950 .sha,
2765 .slow_shld,2951 .slow_shld,
2766 .sse4a,2952 .sse4a,
2953 .vzeroupper,
2767 .wbnoinvd,2954 .wbnoinvd,
2768 .x87,2955 .x87,
2769 .xsave,2956 .xsave,
...@@ -2848,6 +3035,7 @@ pub const all_cpus = &[_]*const Cpu{...@@ -2848,6 +3035,7 @@ pub const all_cpus = &[_]*const Cpu{
2848 &cpu.skylake,3035 &cpu.skylake,
2849 &cpu.skylake_avx512,3036 &cpu.skylake_avx512,
2850 &cpu.slm,3037 &cpu.slm,
3038 &cpu.tigerlake,
2851 &cpu.tremont,3039 &cpu.tremont,
2852 &cpu.westmere,3040 &cpu.westmere,
2853 &cpu.winchip_c6,3041 &cpu.winchip_c6,