authorgravatar for koachan@protonmail.comKoakuma <koachan@protonmail.com> 2022-04-01 22:23:19+07:00
committergravatar for koachan@protonmail.comKoakuma <koachan@protonmail.com> 2022-04-14 22:18:06+07:00
log71cd3466ec129404a9cc6679f25b0dde8623b094
treee3323629e7f9ed640f60a576989e609996f5937f
parent18c98eb4293ced51689ad67f15575afc120ceee1

stage2: sparcv9: Adjust RegisterManager settings

2 files changed, 20 insertions(+), 4 deletions(-)

src/arch/sparcv9/CodeGen.zig+4-1
...@@ -16,6 +16,8 @@ const Type = @import("../../type.zig").Type;...@@ -16,6 +16,8 @@ const Type = @import("../../type.zig").Type;
16const GenerateSymbolError = @import("../../codegen.zig").GenerateSymbolError;16const GenerateSymbolError = @import("../../codegen.zig").GenerateSymbolError;
17const FnResult = @import("../../codegen.zig").FnResult;17const FnResult = @import("../../codegen.zig").FnResult;
18const DebugInfoOutput = @import("../../codegen.zig").DebugInfoOutput;18const DebugInfoOutput = @import("../../codegen.zig").DebugInfoOutput;
19const RegisterManagerFn = @import("../../register_manager.zig").RegisterManager;
20const RegisterManager = RegisterManagerFn(Self, Register, &abi.allocatable_regs);
1921
20const build_options = @import("build_options");22const build_options = @import("build_options");
2123
...@@ -73,6 +75,8 @@ branch_stack: *std.ArrayList(Branch),...@@ -73,6 +75,8 @@ branch_stack: *std.ArrayList(Branch),
73// Key is the block instruction75// Key is the block instruction
74blocks: std.AutoHashMapUnmanaged(Air.Inst.Index, BlockData) = .{},76blocks: std.AutoHashMapUnmanaged(Air.Inst.Index, BlockData) = .{},
7577
78register_manager: RegisterManager = .{},
79
76/// Maps offset to what is stored there.80/// Maps offset to what is stored there.
77stack: std.AutoHashMapUnmanaged(u32, StackAllocation) = .{},81stack: std.AutoHashMapUnmanaged(u32, StackAllocation) = .{},
7882
...@@ -380,7 +384,6 @@ fn resolveCallingConventionValues(self: *Self, fn_ty: Type, is_caller: bool) !Ca...@@ -380,7 +384,6 @@ fn resolveCallingConventionValues(self: *Self, fn_ty: Type, is_caller: bool) !Ca
380 return result;384 return result;
381}385}
382386
383/// Caller must call `CallMCValues.deinit`.
384fn gen(self: *Self) !void {387fn gen(self: *Self) !void {
385 const cc = self.fn_type.fnCallingConvention();388 const cc = self.fn_type.fnCallingConvention();
386 if (cc != .Naked) {389 if (cc != .Naked) {
src/arch/sparcv9/abi.zig+16-3
...@@ -1,9 +1,22 @@...@@ -1,9 +1,22 @@
1const bits = @import("bits.zig");1const bits = @import("bits.zig");
2const Register = bits.Register;2const Register = bits.Register;
33
4// Register windowing mechanism will take care of preserving registers4// There are no callee-preserved registers since the windowing
5// so no need to do it manually5// mechanism already takes care of them.
6pub const callee_preserved_regs = [_]Register{};6// We still need to preserve %o0-%o5, %g1, %g4, and %g5 before calling
7// something, though, as those are shared with the callee and might be
8// thrashed by it.
9pub const caller_preserved_regs = [_]Register{ .o0, .o1, .o2, .o3, .o4, .o5, .g1, .g4, .g5 };
10
11// Try to allocate i, l, o, then g sets of registers, in order of priority.
12pub const allocatable_regs = [_]Register{
13 // zig fmt: off
14 .@"i0", .@"i1", .@"i2", .@"i3", .@"i4", .@"i5",
15 .l0, .l1, .l2, .l3, .l4, .l5, .l6, .l7,
16 .o0, .o1, .o2, .o3, .o4, .o5,
17 .g1, .g4, .g5,
18 // zig fmt: on
19};
720
8pub const c_abi_int_param_regs_caller_view = [_]Register{ .o0, .o1, .o2, .o3, .o4, .o5 };21pub const c_abi_int_param_regs_caller_view = [_]Register{ .o0, .o1, .o2, .o3, .o4, .o5 };
9pub const c_abi_int_param_regs_callee_view = [_]Register{ .@"i0", .@"i1", .@"i2", .@"i3", .@"i4", .@"i5" };22pub const c_abi_int_param_regs_callee_view = [_]Register{ .@"i0", .@"i1", .@"i2", .@"i3", .@"i4", .@"i5" };