From 7ca0bf0f36a8af70635a902546d6e9032b6e6551 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Sun, 6 Sep 2026 09:48:22 +0200 Subject: [PATCH 01/11] std.c: add more CTL constants for freebsd --- lib/std/c.zig | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/lib/std/c.zig b/lib/std/c.zig index 857d2296a910a3d4be22146fc91a5c2de5ab5fe8..c6af875df2cc3a251cf1d9de35544a268729f0fa 100644 --- a/lib/std/c.zig +++ b/lib/std/c.zig @@ -1330,8 +1330,16 @@ pub const IOV_MAX = switch (native_os) { }; pub const CTL = switch (native_os) { .freebsd => struct { + pub const SYSCTL = 0; pub const KERN = 1; + pub const VM = 2; + pub const VFS = 3; + pub const NET = 4; pub const DEBUG = 5; + pub const HW = 6; + pub const MACHDEP = 7; + pub const USER = 8; + pub const P1003_1B = 9; }, .netbsd => struct { pub const KERN = 1; -- 2.54.0 From 0e3010e54d44f208eaa0bd3ca011b674738fc1e2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Sun, 6 Sep 2026 09:46:23 +0200 Subject: [PATCH 02/11] std.c: add HW constants for freebsd --- lib/std/c.zig | 46 ++++++++++++++++++++++++++++++++++++++++++- lib/std/c/openbsd.zig | 29 --------------------------- 2 files changed, 45 insertions(+), 30 deletions(-) diff --git a/lib/std/c.zig b/lib/std/c.zig index c6af875df2cc3a251cf1d9de35544a268729f0fa..ae616664cb0cfc3699948431c50fd1d64936b8f7 100644 --- a/lib/std/c.zig +++ b/lib/std/c.zig @@ -1395,6 +1395,51 @@ pub const CPU = switch (native_os) { }, else => void, }; +pub const HW = switch (native_os) { + .freebsd => struct { + pub const MACHINE = 1; + pub const MODEL = 2; + pub const NCPU = 3; + pub const BYTEORDER = 4; + pub const PHYSMEM = 5; + pub const USERMEM = 6; + pub const PAGESIZE = 7; + pub const DISKNAMES = 8; + pub const DISKSTATS = 9; + pub const FLOATINGPT = 10; + pub const MACHINE_ARCH = 11; + pub const REALMEM = 12; + }, + .openbsd => struct { + pub const MACHINE = 1; + pub const MODEL = 2; + pub const NCPU = 3; + pub const BYTEORDER = 4; + pub const PHYSMEM = 5; + pub const USERMEM = 6; + pub const PAGESIZE = 7; + pub const DISKNAMES = 8; + pub const DISKSTATS = 9; + pub const DISKCOUNT = 10; + pub const SENSORS = 11; + pub const CPUSPEED = 12; + pub const SETPERF = 13; + pub const VENDOR = 14; + pub const PRODUCT = 15; + pub const VERSION = 16; + pub const SERIALNO = 17; + pub const UUID = 18; + pub const PHYSMEM64 = 19; + pub const USERMEM64 = 20; + pub const NCPUFOUND = 21; + pub const ALLOWPOWERDOWN = 22; + pub const PERFPOLICY = 23; + pub const SMT = 24; + pub const NCPUONLINE = 25; + pub const POWER = 26; + }, + else => void, +}; pub const KERN = switch (native_os) { .freebsd => struct { /// struct: process entries @@ -11333,7 +11378,6 @@ pub const writev_pos = haiku.writev_pos; pub const AUTH = openbsd.AUTH; pub const BI = openbsd.BI; -pub const HW = openbsd.HW; pub const PTHREAD_STACK_MIN = openbsd.PTHREAD_STACK_MIN; pub const TCFLUSH = openbsd.TCFLUSH; pub const TCIO = openbsd.TCIO; diff --git a/lib/std/c/openbsd.zig b/lib/std/c/openbsd.zig index 91ba8a8f5f76b85a2952c0a37421dcc11925a087..e6d277af9f4a613743d5d6fd1e29a739a7be6d93 100644 --- a/lib/std/c/openbsd.zig +++ b/lib/std/c/openbsd.zig @@ -273,35 +273,6 @@ pub const MAX_PAGE_SHIFT = switch (builtin.cpu.arch) { .sparc64 => 13, }; -pub const HW = struct { - pub const MACHINE = 1; - pub const MODEL = 2; - pub const NCPU = 3; - pub const BYTEORDER = 4; - pub const PHYSMEM = 5; - pub const USERMEM = 6; - pub const PAGESIZE = 7; - pub const DISKNAMES = 8; - pub const DISKSTATS = 9; - pub const DISKCOUNT = 10; - pub const SENSORS = 11; - pub const CPUSPEED = 12; - pub const SETPERF = 13; - pub const VENDOR = 14; - pub const PRODUCT = 15; - pub const VERSION = 16; - pub const SERIALNO = 17; - pub const UUID = 18; - pub const PHYSMEM64 = 19; - pub const USERMEM64 = 20; - pub const NCPUFOUND = 21; - pub const ALLOWPOWERDOWN = 22; - pub const PERFPOLICY = 23; - pub const SMT = 24; - pub const NCPUONLINE = 25; - pub const POWER = 26; -}; - pub const PTHREAD_STACK_MIN = switch (builtin.cpu.arch) { .sparc64 => 1 << 13, .mips64 => 1 << 14, -- 2.54.0 From 80e52554bbaf2d2f029f860bd59945c477cde630 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Sun, 6 Sep 2026 09:08:26 +0200 Subject: [PATCH 03/11] std.zig.system: ref more OS namespaces in test block --- lib/std/zig/system.zig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/lib/std/zig/system.zig b/lib/std/zig/system.zig index 567d03b59f3f55c72451278ad0cc44563d5337f5..5930a32533428a8c4718fd165de4ac4078ba4780 100644 --- a/lib/std/zig/system.zig +++ b/lib/std/zig/system.zig @@ -1203,6 +1203,9 @@ test { _ = NativePaths; _ = darwin; + _ = freebsd; _ = linux; + _ = netbsd; + _ = openbsd; _ = windows; } -- 2.54.0 From f04a251e05c3f8bef73421b6bf152902153f55a6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Sun, 6 Sep 2026 09:12:10 +0200 Subject: [PATCH 04/11] std.zig.system.freebsd: tiny refactor --- lib/std/zig/system/freebsd.zig | 38 ++++++++++++++++++---------------- 1 file changed, 20 insertions(+), 18 deletions(-) diff --git a/lib/std/zig/system/freebsd.zig b/lib/std/zig/system/freebsd.zig index d36600aaa1810b5f2c0c6d52cdfc387c44bd7bab..b1ed37dd67e3e2d9f94b845ddea14b1b55e58ac4 100644 --- a/lib/std/zig/system/freebsd.zig +++ b/lib/std/zig/system/freebsd.zig @@ -9,28 +9,30 @@ const aarch64 = struct { : [ret] "=r" (-> u64), ); } + + fn detectNativeCpuAndFeatures(arch: std.Target.Cpu.Arch) std.Target.Cpu { + const registers = [12]u64{ + aarch64.mrs("MIDR_EL1"), + aarch64.mrs("ID_AA64PFR0_EL1"), + aarch64.mrs("ID_AA64PFR1_EL1"), + aarch64.mrs("ID_AA64DFR0_EL1"), + aarch64.mrs("ID_AA64DFR1_EL1"), + aarch64.mrs("ID_AA64AFR0_EL1"), + aarch64.mrs("ID_AA64AFR1_EL1"), + aarch64.mrs("ID_AA64ISAR0_EL1"), + aarch64.mrs("ID_AA64ISAR1_EL1"), + aarch64.mrs("ID_AA64MMFR0_EL1"), + aarch64.mrs("ID_AA64MMFR1_EL1"), + aarch64.mrs("ID_AA64MMFR2_EL1"), + }; + + return @import("arm.zig").aarch64.detectNativeCpuAndFeatures(arch, registers); + } }; pub fn detectNativeCpuAndFeatures() ?std.Target.Cpu { return switch (native_arch) { - .aarch64, .aarch64_be => b: { - const registers = [12]u64{ - aarch64.mrs("MIDR_EL1"), - aarch64.mrs("ID_AA64PFR0_EL1"), - aarch64.mrs("ID_AA64PFR1_EL1"), - aarch64.mrs("ID_AA64DFR0_EL1"), - aarch64.mrs("ID_AA64DFR1_EL1"), - aarch64.mrs("ID_AA64AFR0_EL1"), - aarch64.mrs("ID_AA64AFR1_EL1"), - aarch64.mrs("ID_AA64ISAR0_EL1"), - aarch64.mrs("ID_AA64ISAR1_EL1"), - aarch64.mrs("ID_AA64MMFR0_EL1"), - aarch64.mrs("ID_AA64MMFR1_EL1"), - aarch64.mrs("ID_AA64MMFR2_EL1"), - }; - - break :b @import("arm.zig").aarch64.detectNativeCpuAndFeatures(native_arch, registers); - }, + .aarch64 => aarch64.detectNativeCpuAndFeatures(native_arch), else => null, }; } -- 2.54.0 From 165b8c28e5c306e1d05d266ffbf51abed4bfbc36 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Sun, 6 Sep 2026 09:48:55 +0200 Subject: [PATCH 05/11] std.zig.system.freebsd: implement powerpc CPU model detection ref https://codeberg.org/ziglang/zig/issues/36726 --- lib/std/zig/system/freebsd.zig | 74 ++++++++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) diff --git a/lib/std/zig/system/freebsd.zig b/lib/std/zig/system/freebsd.zig index b1ed37dd67e3e2d9f94b845ddea14b1b55e58ac4..a54042e7712f6dad913e4b4eab5c314979f2e0b6 100644 --- a/lib/std/zig/system/freebsd.zig +++ b/lib/std/zig/system/freebsd.zig @@ -30,9 +30,83 @@ const aarch64 = struct { } }; +const powerpc = struct { + const models = .{ + .{ "Freescale e500v1 core", &std.Target.powerpc.cpu.e500 }, + .{ "Freescale e500v2 core", &std.Target.powerpc.cpu.e500 }, // TODO: This should have efpu2. + .{ "Freescale e500mc core", &std.Target.powerpc.cpu.e500mc }, + .{ "Freescale e5500 core", &std.Target.powerpc.cpu.e5500 }, + .{ "Freescale e6500 core", &std.Target.powerpc.cpu.e5500 }, // TODO: This should have altivec. + .{ "IBM Cell Broadband Engine", &std.Target.powerpc.cpu.ppc64 }, + .{ "IBM PowerPC 750FX", &std.Target.powerpc.cpu.@"750" }, + .{ "IBM PowerPC 970", &std.Target.powerpc.cpu.@"970" }, + .{ "IBM PowerPC 970FX", &std.Target.powerpc.cpu.@"970" }, + .{ "IBM PowerPC 970GX", &std.Target.powerpc.cpu.@"970" }, + .{ "IBM PowerPC 970MP", &std.Target.powerpc.cpu.@"970" }, + .{ "IBM POWER4", &std.Target.powerpc.cpu.pwr4 }, + .{ "IBM POWER4+", &std.Target.powerpc.cpu.pwr4 }, + .{ "IBM POWER5", &std.Target.powerpc.cpu.pwr5 }, + .{ "IBM POWER5+", &std.Target.powerpc.cpu.pwr5x }, + .{ "IBM POWER6", &std.Target.powerpc.cpu.pwr6 }, + .{ "IBM POWER7", &std.Target.powerpc.cpu.pwr7 }, + .{ "IBM POWER7+", &std.Target.powerpc.cpu.pwr7 }, + .{ "IBM POWER8E", &std.Target.powerpc.cpu.pwr8 }, + .{ "IBM POWER8NVL", &std.Target.powerpc.cpu.pwr8 }, + .{ "IBM POWER8", &std.Target.powerpc.cpu.pwr8 }, + .{ "IBM POWER9", &std.Target.powerpc.cpu.pwr9 }, + .{ "IBM POWER10", &std.Target.powerpc.cpu.pwr10 }, + .{ "IBM POWER11", &std.Target.powerpc.cpu.pwr11 }, + .{ "Motorola PowerPC 601", &std.Target.powerpc.cpu.@"601" }, + .{ "Motorola PowerPC 602", &std.Target.powerpc.cpu.@"602" }, + .{ "Motorola PowerPC 603", &std.Target.powerpc.cpu.@"603" }, + .{ "Motorola PowerPC 603e", &std.Target.powerpc.cpu.@"603e" }, + .{ "Motorola PowerPC 603ev", &std.Target.powerpc.cpu.@"603ev" }, + .{ "Motorola PowerPC 604", &std.Target.powerpc.cpu.@"604" }, + .{ "Motorola PowerPC 604ev", &std.Target.powerpc.cpu.@"604e" }, + .{ "Motorola PowerPC 620", &std.Target.powerpc.cpu.@"620" }, + .{ "Motorola PowerPC 750", &std.Target.powerpc.cpu.@"750" }, + .{ "Motorola PowerPC 7400", &std.Target.powerpc.cpu.@"7400" }, + .{ "Motorola PowerPC 7410", &std.Target.powerpc.cpu.@"7400" }, + .{ "Motorola PowerPC 7450", &std.Target.powerpc.cpu.@"7450" }, + .{ "Motorola PowerPC 7455", &std.Target.powerpc.cpu.@"7450" }, + .{ "Motorola PowerPC 7457", &std.Target.powerpc.cpu.@"7450" }, + .{ "Motorola PowerPC 7457", &std.Target.powerpc.cpu.@"7450" }, + .{ "Motorola PowerPC 7447A", &std.Target.powerpc.cpu.@"7450" }, + .{ "Motorola PowerPC 7448", &std.Target.powerpc.cpu.@"7450" }, + .{ "Motorola PowerPC 8240", &std.Target.powerpc.cpu.@"603e" }, + .{ "Motorola PowerPC 8245", &std.Target.powerpc.cpu.@"603e" }, + }; + + fn detectNativeCpu(arch: std.Target.Cpu.Arch) ?std.Target.Cpu { + const mib: [2]c_int = [_]c_int{ + std.c.CTL.HW, + std.c.HW.MODEL, + }; + var buf: [64:0]u8 = undefined; + var len: usize = buf.len + 1; + + std.posix.sysctl(&mib, &buf, &len, null, 0) catch |err| switch (err) { + error.NameTooLong => unreachable, + error.PermissionDenied => unreachable, + error.SystemResources => unreachable, + error.UnknownName => unreachable, + error.Unexpected => return null, + }; + + const name = buf[0 .. len - 1 :0]; + + inline for (models) |pair| { + if (std.mem.eql(u8, name, pair[0])) return pair[1].toCpu(arch); + } + + return null; + } +}; + pub fn detectNativeCpuAndFeatures() ?std.Target.Cpu { return switch (native_arch) { .aarch64 => aarch64.detectNativeCpuAndFeatures(native_arch), + .powerpc64, .powerpc64le => powerpc.detectNativeCpu(native_arch), else => null, }; } -- 2.54.0 From b29dbbc951b55b6c36dd338c2990c3c67eef45cf Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Sun, 6 Sep 2026 10:30:38 +0200 Subject: [PATCH 06/11] std.zig.system.freebsd: implement arm CPU model detection --- lib/std/zig/system/freebsd.zig | 64 ++++++++++++++++++++++++++-------- 1 file changed, 49 insertions(+), 15 deletions(-) diff --git a/lib/std/zig/system/freebsd.zig b/lib/std/zig/system/freebsd.zig index a54042e7712f6dad913e4b4eab5c314979f2e0b6..94cadffd8470a294a5fee2018ed04b31c2ba083e 100644 --- a/lib/std/zig/system/freebsd.zig +++ b/lib/std/zig/system/freebsd.zig @@ -3,6 +3,24 @@ const std = @import("std"); const native_arch = builtin.target.cpu.arch; +fn hwModelName(buf: [:0]u8) ?[:0]const u8 { + const mib: [2]c_int = [_]c_int{ + std.c.CTL.HW, + std.c.HW.MODEL, + }; + var len: usize = buf.len + 1; + + std.posix.sysctl(&mib, buf.ptr, &len, null, 0) catch |err| switch (err) { + error.NameTooLong => unreachable, + error.PermissionDenied => unreachable, + error.SystemResources => unreachable, + error.UnknownName => unreachable, + error.Unexpected => return null, + }; + + return buf[0 .. len - 1 :0]; +} + const aarch64 = struct { inline fn mrs(comptime feat_reg: []const u8) u64 { return asm ("mrs %[ret], " ++ feat_reg @@ -30,6 +48,35 @@ const aarch64 = struct { } }; +const arm = struct { + const models = .{ + .{ "ARM ARM1176", &std.Target.arm.cpu.arm1176jzf_s }, + .{ "ARM Cortex-A12", &std.Target.arm.cpu.cortex_a12 }, + .{ "ARM Cortex-A15", &std.Target.arm.cpu.cortex_a15 }, + .{ "ARM Cortex-A17", &std.Target.arm.cpu.cortex_a17 }, + .{ "ARM Cortex-A53", &std.Target.arm.cpu.cortex_a53 }, + .{ "ARM Cortex-A57", &std.Target.arm.cpu.cortex_a57 }, + .{ "ARM Cortex-A5", &std.Target.arm.cpu.cortex_a5 }, + .{ "ARM Cortex-A72", &std.Target.arm.cpu.cortex_a72 }, + .{ "ARM Cortex-A73", &std.Target.arm.cpu.cortex_a73 }, + .{ "ARM Cortex-A7", &std.Target.arm.cpu.cortex_a7 }, + .{ "ARM Cortex-A8", &std.Target.arm.cpu.cortex_a8 }, + .{ "ARM Cortex-A9", &std.Target.arm.cpu.cortex_a9 }, + .{ "Qualcomm Krait 300", &std.Target.arm.cpu.krait }, + }; + + fn detectNativeCpu(arch: std.Target.Cpu.Arch) ?std.Target.Cpu { + var buf: [64:0]u8 = undefined; + const name = hwModelName(&buf) orelse return null; + + inline for (models) |pair| { + if (std.mem.startsWith(u8, name, pair[0])) return pair[1].toCpu(arch); + } + + return null; + } +}; + const powerpc = struct { const models = .{ .{ "Freescale e500v1 core", &std.Target.powerpc.cpu.e500 }, @@ -78,22 +125,8 @@ const powerpc = struct { }; fn detectNativeCpu(arch: std.Target.Cpu.Arch) ?std.Target.Cpu { - const mib: [2]c_int = [_]c_int{ - std.c.CTL.HW, - std.c.HW.MODEL, - }; var buf: [64:0]u8 = undefined; - var len: usize = buf.len + 1; - - std.posix.sysctl(&mib, &buf, &len, null, 0) catch |err| switch (err) { - error.NameTooLong => unreachable, - error.PermissionDenied => unreachable, - error.SystemResources => unreachable, - error.UnknownName => unreachable, - error.Unexpected => return null, - }; - - const name = buf[0 .. len - 1 :0]; + const name = hwModelName(&buf) orelse return null; inline for (models) |pair| { if (std.mem.eql(u8, name, pair[0])) return pair[1].toCpu(arch); @@ -106,6 +139,7 @@ const powerpc = struct { pub fn detectNativeCpuAndFeatures() ?std.Target.Cpu { return switch (native_arch) { .aarch64 => aarch64.detectNativeCpuAndFeatures(native_arch), + .arm => arm.detectNativeCpu(native_arch), .powerpc64, .powerpc64le => powerpc.detectNativeCpu(native_arch), else => null, }; -- 2.54.0 From 3cf655356c388ce00a4b6fbf9fbb411f1481250e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Sun, 6 Sep 2026 10:04:32 +0200 Subject: [PATCH 07/11] std.zig.system.netbsd: tiny refactor --- lib/std/zig/system/netbsd.zig | 70 ++++++++++++++++++----------------- 1 file changed, 36 insertions(+), 34 deletions(-) diff --git a/lib/std/zig/system/netbsd.zig b/lib/std/zig/system/netbsd.zig index 2319807018a64709f664f04fd2e4121037057ad0..f60872ffbb8f70c50afec9910a30674863527de7 100644 --- a/lib/std/zig/system/netbsd.zig +++ b/lib/std/zig/system/netbsd.zig @@ -32,44 +32,46 @@ const aarch64 = struct { clidr: u64, ctr: u64, }; + + fn detectNativeCpuAndFeatures(arch: std.Target.Cpu.Arch) ?std.Target.Cpu { + var value: aarch64.sysctl_cpu_id = undefined; + var len: usize = @sizeOf(@TypeOf(value)); + switch (std.posix.errno(std.c.sysctlbyname("machdep.cpu0.cpu_id", &value, &len, null, 0))) { + .SUCCESS => {}, + .FAULT => unreachable, + .INVAL => unreachable, + .ISDIR => unreachable, + .NOENT => unreachable, // 👻 + .NOMEM => {}, // `aarch64.sysctl_cpu_id` has grown upstream, harmless + .NOTDIR => unreachable, + .NOTEMPTY => unreachable, + .OPNOTSUPP => unreachable, + .PERM => unreachable, + else => return null, + } + + const registers = [12]u64{ + value.midr, + value.aa64pfr0, + value.aa64pfr1, + value.aa64dfr0, + value.aa64dfr1, + 0, // ID_AA64AFR0_EL1 + 0, // ID_AA64AFR1_EL1 + value.aa64isar0, + value.aa64isar1, + value.aa64mmfr0, + value.aa64mmfr1, + value.aa64mmfr2, + }; + + return @import("arm.zig").aarch64.detectNativeCpuAndFeatures(arch, registers); + } }; pub fn detectNativeCpuAndFeatures() ?std.Target.Cpu { return switch (native_arch) { - .aarch64, .aarch64_be => b: { - var value: aarch64.sysctl_cpu_id = undefined; - var len: usize = @sizeOf(@TypeOf(value)); - switch (std.posix.errno(std.c.sysctlbyname("machdep.cpu0.cpu_id", &value, &len, null, 0))) { - .SUCCESS => {}, - .FAULT => unreachable, - .INVAL => unreachable, - .ISDIR => unreachable, - .NOENT => unreachable, // 👻 - .NOMEM => {}, // `aarch64.sysctl_cpu_id` has grown upstream, harmless - .NOTDIR => unreachable, - .NOTEMPTY => unreachable, - .OPNOTSUPP => unreachable, - .PERM => unreachable, - else => return null, - } - - const registers = [12]u64{ - value.midr, - value.aa64pfr0, - value.aa64pfr1, - value.aa64dfr0, - value.aa64dfr1, - 0, // ID_AA64AFR0_EL1 - 0, // ID_AA64AFR1_EL1 - value.aa64isar0, - value.aa64isar1, - value.aa64mmfr0, - value.aa64mmfr1, - value.aa64mmfr2, - }; - - break :b @import("arm.zig").aarch64.detectNativeCpuAndFeatures(native_arch, registers); - }, + .aarch64, .aarch64_be => aarch64.detectNativeCpuAndFeatures(native_arch), else => null, }; } -- 2.54.0 From d30609829eb744b28a26a5161c2788dfdef3618d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Sun, 6 Sep 2026 09:09:09 +0200 Subject: [PATCH 08/11] std.zig.system.openbsd: bail aarch64 detection if we don't get all registers --- lib/std/zig/system/openbsd.zig | 42 ++++++++++++++++++---------------- 1 file changed, 22 insertions(+), 20 deletions(-) diff --git a/lib/std/zig/system/openbsd.zig b/lib/std/zig/system/openbsd.zig index 211222d33ed376e90f70e9461c856cea61fe918f..4a6b064210db8af1ade69625d6769657f1042420 100644 --- a/lib/std/zig/system/openbsd.zig +++ b/lib/std/zig/system/openbsd.zig @@ -4,7 +4,7 @@ const std = @import("std"); const native_arch = builtin.target.cpu.arch; const aarch64 = struct { - fn sysctlReg(key: c_int) u64 { + fn sysctlReg(key: c_int) ?u64 { const mib: [2]c_int = [_]c_int{ std.c.CTL.MACHDEP, key, @@ -17,33 +17,35 @@ const aarch64 = struct { error.PermissionDenied => unreachable, error.SystemResources => unreachable, error.UnknownName => unreachable, - error.Unexpected => return 0, + error.Unexpected => return null, }; return value; } + + fn detectNativeCpuAndFeatures(arch: std.Target.Cpu.Arch) ?std.Target.Cpu { + const registers = [12]u64{ + 0, // MIDR_EL1 + sysctlReg(std.c.CPU.AA64PFR0) orelse return null, + sysctlReg(std.c.CPU.AA64PFR1) orelse return null, + 0, // ID_AA64DFR0_EL1 + 0, // ID_AA64DFR1_EL1 + 0, // ID_AA64AFR0_EL1 + 0, // ID_AA64AFR1_EL1 + sysctlReg(std.c.CPU.ID_AA64ISAR0) orelse return null, + sysctlReg(std.c.CPU.ID_AA64ISAR1) orelse return null, + sysctlReg(std.c.CPU.ID_AA64MMFR0) orelse return null, + sysctlReg(std.c.CPU.ID_AA64MMFR1) orelse return null, + sysctlReg(std.c.CPU.ID_AA64MMFR2) orelse return null, + }; + + return @import("arm.zig").aarch64.detectNativeCpuAndFeatures(arch, registers); + } }; pub fn detectNativeCpuAndFeatures() ?std.Target.Cpu { return switch (native_arch) { - .aarch64, .aarch64_be => b: { - const registers = [12]u64{ - 0, // MIDR_EL1 - aarch64.sysctlReg(std.c.CPU.AA64PFR0), - aarch64.sysctlReg(std.c.CPU.AA64PFR1), - 0, // ID_AA64DFR0_EL1 - 0, // ID_AA64DFR1_EL1 - 0, // ID_AA64AFR0_EL1 - 0, // ID_AA64AFR1_EL1 - aarch64.sysctlReg(std.c.CPU.ID_AA64ISAR0), - aarch64.sysctlReg(std.c.CPU.ID_AA64ISAR1), - aarch64.sysctlReg(std.c.CPU.ID_AA64MMFR0), - aarch64.sysctlReg(std.c.CPU.ID_AA64MMFR1), - aarch64.sysctlReg(std.c.CPU.ID_AA64MMFR2), - }; - - break :b @import("arm.zig").aarch64.detectNativeCpuAndFeatures(native_arch, registers); - }, + .aarch64 => aarch64.detectNativeCpuAndFeatures(native_arch), else => null, }; } -- 2.54.0 From 93cb0f1552b0c7285ef22f6713239675170a348b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Sun, 6 Sep 2026 09:09:30 +0200 Subject: [PATCH 09/11] std.zig.system.openbsd: implement powerpc CPU model detection ref https://codeberg.org/ziglang/zig/issues/36726 --- lib/std/zig/system/openbsd.zig | 55 ++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/lib/std/zig/system/openbsd.zig b/lib/std/zig/system/openbsd.zig index 4a6b064210db8af1ade69625d6769657f1042420..39f2156ffa7dd189d826c4c4549e6e21445a6ee1 100644 --- a/lib/std/zig/system/openbsd.zig +++ b/lib/std/zig/system/openbsd.zig @@ -43,9 +43,64 @@ const aarch64 = struct { } }; +const powerpc = struct { + const models = .{ + .{ "601", &std.Target.powerpc.cpu.@"601" }, + .{ "603ev", &std.Target.powerpc.cpu.@"603ev" }, + .{ "603e", &std.Target.powerpc.cpu.@"603e" }, + .{ "603", &std.Target.powerpc.cpu.@"603" }, + .{ "604ev", &std.Target.powerpc.cpu.@"604e" }, + .{ "604", &std.Target.powerpc.cpu.@"604" }, + .{ "7400", &std.Target.powerpc.cpu.@"7400" }, + .{ "7410", &std.Target.powerpc.cpu.@"7400" }, + .{ "7450", &std.Target.powerpc.cpu.@"7450" }, + .{ "7451", &std.Target.powerpc.cpu.@"7450" }, + .{ "7455", &std.Target.powerpc.cpu.@"7450" }, + .{ "7457", &std.Target.powerpc.cpu.@"7450" }, + .{ "7447A", &std.Target.powerpc.cpu.@"7450" }, + .{ "7448", &std.Target.powerpc.cpu.@"7450" }, + .{ "750FX", &std.Target.powerpc.cpu.@"750" }, + .{ "750", &std.Target.powerpc.cpu.@"750" }, + .{ "970FX", &std.Target.powerpc.cpu.@"970" }, + .{ "970MP", &std.Target.powerpc.cpu.@"970" }, + .{ "970", &std.Target.powerpc.cpu.@"970" }, + .{ "IBM POWER8E", &std.Target.powerpc.cpu.pwr8 }, + .{ "IBM POWER8NVL", &std.Target.powerpc.cpu.pwr8 }, + .{ "IBM POWER8", &std.Target.powerpc.cpu.pwr8 }, + .{ "IBM POWER9P", &std.Target.powerpc.cpu.pwr9 }, + .{ "IBM POWER9", &std.Target.powerpc.cpu.pwr9 }, + }; + + fn detectNativeCpu(arch: std.Target.Cpu.Arch) ?std.Target.Cpu { + const mib: [2]c_int = [_]c_int{ + std.c.CTL.HW, + std.c.HW.MODEL, + }; + var buf: [64:0]u8 = undefined; + var len: usize = buf.len + 1; + + std.posix.sysctl(&mib, &buf, &len, null, 0) catch |err| switch (err) { + error.NameTooLong => unreachable, + error.PermissionDenied => unreachable, + error.SystemResources => unreachable, + error.UnknownName => unreachable, + error.Unexpected => return null, + }; + + const name = buf[0 .. len - 1 :0]; + + inline for (models) |pair| { + if (std.mem.startsWith(u8, name, pair[0])) return pair[1].toCpu(arch); + } + + return null; + } +}; + pub fn detectNativeCpuAndFeatures() ?std.Target.Cpu { return switch (native_arch) { .aarch64 => aarch64.detectNativeCpuAndFeatures(native_arch), + .powerpc, .powerpc64 => powerpc.detectNativeCpu(native_arch), else => null, }; } -- 2.54.0 From 71a7185ebb777e04f668590358079fb1f08da3e8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Sun, 6 Sep 2026 10:17:06 +0200 Subject: [PATCH 10/11] std.zig.system.openbsd: implement arm CPU model detection --- lib/std/zig/system/openbsd.zig | 66 ++++++++++++++++++++++++++-------- 1 file changed, 51 insertions(+), 15 deletions(-) diff --git a/lib/std/zig/system/openbsd.zig b/lib/std/zig/system/openbsd.zig index 39f2156ffa7dd189d826c4c4549e6e21445a6ee1..7c2dc0b143414bf156f1dd8f3da9e5a6d3a6e076 100644 --- a/lib/std/zig/system/openbsd.zig +++ b/lib/std/zig/system/openbsd.zig @@ -3,6 +3,24 @@ const std = @import("std"); const native_arch = builtin.target.cpu.arch; +fn hwModelName(buf: [:0]u8) ?[:0]const u8 { + const mib: [2]c_int = [_]c_int{ + std.c.CTL.HW, + std.c.HW.MODEL, + }; + var len: usize = buf.len + 1; + + std.posix.sysctl(&mib, buf.ptr, &len, null, 0) catch |err| switch (err) { + error.NameTooLong => unreachable, + error.PermissionDenied => unreachable, + error.SystemResources => unreachable, + error.UnknownName => unreachable, + error.Unexpected => return null, + }; + + return buf[0 .. len - 1 :0]; +} + const aarch64 = struct { fn sysctlReg(key: c_int) ?u64 { const mib: [2]c_int = [_]c_int{ @@ -43,6 +61,37 @@ const aarch64 = struct { } }; +const arm = struct { + const models = .{ + .{ "ARM Cortex-A12", &std.Target.arm.cpu.cortex_a12 }, + .{ "ARM Cortex-A15", &std.Target.arm.cpu.cortex_a15 }, + .{ "ARM Cortex-A17", &std.Target.arm.cpu.cortex_a17 }, + .{ "ARM Cortex-A32", &std.Target.arm.cpu.cortex_a32 }, + .{ "ARM Cortex-A35", &std.Target.arm.cpu.cortex_a35 }, + .{ "ARM Cortex-A53", &std.Target.arm.cpu.cortex_a53 }, + .{ "ARM Cortex-A55", &std.Target.arm.cpu.cortex_a55 }, + .{ "ARM Cortex-A57", &std.Target.arm.cpu.cortex_a57 }, + .{ "ARM Cortex-A5", &std.Target.arm.cpu.cortex_a5 }, + .{ "ARM Cortex-A72", &std.Target.arm.cpu.cortex_a72 }, + .{ "ARM Cortex-A73", &std.Target.arm.cpu.cortex_a73 }, + .{ "ARM Cortex-A75", &std.Target.arm.cpu.cortex_a75 }, + .{ "ARM Cortex-A7", &std.Target.arm.cpu.cortex_a7 }, + .{ "ARM Cortex-A8", &std.Target.arm.cpu.cortex_a8 }, + .{ "ARM Cortex-A9", &std.Target.arm.cpu.cortex_a9 }, + }; + + fn detectNativeCpu(arch: std.Target.Cpu.Arch) ?std.Target.Cpu { + var buf: [64:0]u8 = undefined; + const name = hwModelName(&buf) orelse return null; + + inline for (models) |pair| { + if (std.mem.startsWith(u8, name, pair[0])) return pair[1].toCpu(arch); + } + + return null; + } +}; + const powerpc = struct { const models = .{ .{ "601", &std.Target.powerpc.cpu.@"601" }, @@ -72,22 +121,8 @@ const powerpc = struct { }; fn detectNativeCpu(arch: std.Target.Cpu.Arch) ?std.Target.Cpu { - const mib: [2]c_int = [_]c_int{ - std.c.CTL.HW, - std.c.HW.MODEL, - }; var buf: [64:0]u8 = undefined; - var len: usize = buf.len + 1; - - std.posix.sysctl(&mib, &buf, &len, null, 0) catch |err| switch (err) { - error.NameTooLong => unreachable, - error.PermissionDenied => unreachable, - error.SystemResources => unreachable, - error.UnknownName => unreachable, - error.Unexpected => return null, - }; - - const name = buf[0 .. len - 1 :0]; + const name = hwModelName(&buf) orelse return null; inline for (models) |pair| { if (std.mem.startsWith(u8, name, pair[0])) return pair[1].toCpu(arch); @@ -100,6 +135,7 @@ const powerpc = struct { pub fn detectNativeCpuAndFeatures() ?std.Target.Cpu { return switch (native_arch) { .aarch64 => aarch64.detectNativeCpuAndFeatures(native_arch), + .arm => arm.detectNativeCpu(native_arch), .powerpc, .powerpc64 => powerpc.detectNativeCpu(native_arch), else => null, }; -- 2.54.0 From 6bee34ee56ab0fd6da1903924efa8816494ba3f6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Sun, 6 Sep 2026 10:40:09 +0200 Subject: [PATCH 11/11] std.zig.system.openbsd: implement riscv CPU model detection --- lib/std/zig/system/openbsd.zig | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/lib/std/zig/system/openbsd.zig b/lib/std/zig/system/openbsd.zig index 7c2dc0b143414bf156f1dd8f3da9e5a6d3a6e076..3b4fe7649f69bc936c5333aded849911a1218dbc 100644 --- a/lib/std/zig/system/openbsd.zig +++ b/lib/std/zig/system/openbsd.zig @@ -132,11 +132,32 @@ const powerpc = struct { } }; +const riscv = struct { + const models = .{ + .{ "SiFive U5", &std.Target.riscv.cpu.sifive_u54 }, + .{ "SiFive U7", &std.Target.riscv.cpu.sifive_u74 }, + .{ "SpacemiT X60", &std.Target.riscv.cpu.spacemit_x60 }, + .{ "SpacemiT X100", &std.Target.riscv.cpu.spacemit_x100 }, + }; + + fn detectNativeCpu(arch: std.Target.Cpu.Arch) ?std.Target.Cpu { + var buf: [64:0]u8 = undefined; + const name = hwModelName(&buf) orelse return null; + + inline for (models) |pair| { + if (std.mem.startsWith(u8, name, pair[0])) return pair[1].toCpu(arch); + } + + return null; + } +}; + pub fn detectNativeCpuAndFeatures() ?std.Target.Cpu { return switch (native_arch) { .aarch64 => aarch64.detectNativeCpuAndFeatures(native_arch), .arm => arm.detectNativeCpu(native_arch), .powerpc, .powerpc64 => powerpc.detectNativeCpu(native_arch), + .riscv64 => riscv.detectNativeCpu(native_arch), else => null, }; } -- 2.54.0