diff --git a/lib/std/zig/system.zig b/lib/std/zig/system.zig
index 0650a2ae21602aa945b26735c6772bfa5aeb0561..b8bb161a5da98ede37391dbe1dac4b850ff9bd40 100644
--- a/lib/std/zig/system.zig
+++ b/lib/std/zig/system.zig
@@ -15,6 +15,7 @@ pub const NativePaths = @import("system/NativePaths.zig");
 pub const windows = @import("system/windows.zig");
 pub const darwin = @import("system/darwin.zig");
 pub const linux = @import("system/linux.zig");
+pub const freebsd = @import("system/freebsd.zig");
 
 pub const Executor = union(enum) {
     native,
@@ -543,6 +544,7 @@ fn detectNativeCpuAndFeatures(io: Io, cpu_arch: Target.Cpu.Arch, os: Target.Os,
     }
 
     switch (builtin.os.tag) {
+        .freebsd => return freebsd.detectNativeCpuAndFeatures(),
         .linux => return linux.detectNativeCpuAndFeatures(io),
         .macos => return darwin.macos.detectNativeCpuAndFeatures(),
         .windows => return windows.detectNativeCpuAndFeatures(),
diff --git a/lib/std/zig/system/freebsd.zig b/lib/std/zig/system/freebsd.zig
new file mode 100644
index 0000000000000000000000000000000000000000..be7a09f6402b65832356e9865c42b74e9f7cdc40
--- /dev/null
+++ b/lib/std/zig/system/freebsd.zig
@@ -0,0 +1,34 @@
+const builtin = @import("builtin");
+const std = @import("std");
+
+const native_arch = builtin.target.cpu.arch;
+
+inline fn getAArch64CpuFeature(comptime feat_reg: []const u8) u64 {
+    return asm ("mrs %[ret], " ++ feat_reg
+        : [ret] "=r" (-> u64),
+    );
+}
+
+pub fn detectNativeCpuAndFeatures() ?std.Target.Cpu {
+    return switch (native_arch) {
+        .aarch64, .aarch64_be => b: {
+            const registers = [12]u64{
+                getAArch64CpuFeature("MIDR_EL1"),
+                getAArch64CpuFeature("ID_AA64PFR0_EL1"),
+                getAArch64CpuFeature("ID_AA64PFR1_EL1"),
+                getAArch64CpuFeature("ID_AA64DFR0_EL1"),
+                getAArch64CpuFeature("ID_AA64DFR1_EL1"),
+                getAArch64CpuFeature("ID_AA64AFR0_EL1"),
+                getAArch64CpuFeature("ID_AA64AFR1_EL1"),
+                getAArch64CpuFeature("ID_AA64ISAR0_EL1"),
+                getAArch64CpuFeature("ID_AA64ISAR1_EL1"),
+                getAArch64CpuFeature("ID_AA64MMFR0_EL1"),
+                getAArch64CpuFeature("ID_AA64MMFR1_EL1"),
+                getAArch64CpuFeature("ID_AA64MMFR2_EL1"),
+            };
+
+            break :b @import("arm.zig").aarch64.detectNativeCpuAndFeatures(native_arch, registers);
+        },
+        else => null,
+    };
+}