| ... | ... | @@ -4810,21 +4810,32 @@ pub fn doNotOptimizeAway(val: anytype) void { |
| 4810 | 4810 | return; |
| 4811 | 4811 | } |
| 4812 | 4812 | |
| 4813 | | const max_gp_register_bits = @bitSizeOf(c_long); |
| 4814 | 4813 | switch (@typeInfo(@TypeOf(val))) { |
| 4815 | 4814 | .void, .null, .comptime_int, .comptime_float => return, |
| 4816 | 4815 | .@"enum" => doNotOptimizeAway(@backingInt(val)), |
| 4817 | 4816 | .bool => doNotOptimizeAway(@intFromBool(val)), |
| 4818 | | .int => |int| if (int.bits <= max_gp_register_bits) { |
| 4819 | | const val2 = @as( |
| 4820 | | @Int(int.signedness, @max(8, std.math.ceilPowerOfTwoAssert(u16, int.bits))), |
| 4821 | | val, |
| 4822 | | ); |
| 4823 | | asm volatile ("" |
| 4824 | | : |
| 4825 | | : [_] "r" (val2), |
| 4826 | | ); |
| 4827 | | } else doNotOptimizeAway(&val), |
| 4817 | .int => |int| { |
| 4818 | // SPIR-V targets do not have registers per se, they have values |
| 4819 | // tied to IDs that can be passed to valid instructions. Some |
| 4820 | // SPIR-V targets do not define c_long, so we just allow any sized |
| 4821 | // integer on these targets |
| 4822 | const val_fits_in_gp_register = builtin.target.cpu.arch.isSpirV() or fits: { |
| 4823 | const max_gp_register_bits = @bitSizeOf(c_long); |
| 4824 | break :fits int.bits <= max_gp_register_bits; |
| 4825 | }; |
| 4826 | if (val_fits_in_gp_register) { |
| 4827 | const val2 = @as( |
| 4828 | @Int(int.signedness, @max(8, std.math.ceilPowerOfTwoAssert(u16, int.bits))), |
| 4829 | val, |
| 4830 | ); |
| 4831 | asm volatile ("" |
| 4832 | : |
| 4833 | : [_] "r" (val2), |
| 4834 | ); |
| 4835 | } else { |
| 4836 | doNotOptimizeAway(&val); |
| 4837 | } |
| 4838 | }, |
| 4828 | 4839 | .float => |float| switch (float.bits) { |
| 4829 | 4840 | else => comptime unreachable, |
| 4830 | 4841 | 16, 80, 128 => doNotOptimizeAway(&val), |
Mick Sayson <mick@sayson.com> 2026-07-13 15:41:54-07:00
Andrew Kelley <andrew@ziglang.org> 2026-08-04 18:13:01-07:00
lib