diff --git a/lib/std/c/darwin.zig b/lib/std/c/darwin.zig
index 7b10e7900a701bc0aa3c1d3f646a6ceb582036b5..f0ea120699c434e6bdf979d4bbbbd5b7e556efa4 100644
--- a/lib/std/c/darwin.zig
+++ b/lib/std/c/darwin.zig
@@ -1184,6 +1184,10 @@ pub const CPUFAMILY = enum(u32) {
     ARM_BRAVA = 0x17d5b93a,
     ARM_TAHITI = 0x75d4acb9,
     ARM_TUPAI = 0x204526d0,
+    ARM_HIDRA = 0x1d5a87e8,
+    ARM_SOTRA = 0xf76c5b1a,
+    ARM_THERA = 0xab345f09,
+    ARM_TILOS = 0x01d7a72b,
     _,
 };
 
diff --git a/lib/std/zig/system/darwin/macos.zig b/lib/std/zig/system/darwin/macos.zig
index c9dc8b57ce5928ba1e3eca5135f243d797643728..7844cd1d7a9519662698ad5653b57dd8381f2156 100644
--- a/lib/std/zig/system/darwin/macos.zig
+++ b/lib/std/zig/system/darwin/macos.zig
@@ -411,7 +411,7 @@ pub fn detectNativeCpuAndFeatures() ?Target.Cpu {
 
     const current_arch = builtin.cpu.arch;
     switch (current_arch) {
-        .aarch64, .aarch64_be => {
+        .aarch64 => {
             const model = switch (cpu_family) {
                 .ARM_CYCLONE => &Target.aarch64.cpu.apple_a7,
                 .ARM_TYPHOON => &Target.aarch64.cpu.apple_a8,
@@ -420,17 +420,21 @@ pub fn detectNativeCpuAndFeatures() ?Target.Cpu {
                 .ARM_MONSOON_MISTRAL => &Target.aarch64.cpu.apple_a11,
                 .ARM_VORTEX_TEMPEST => &Target.aarch64.cpu.apple_a12,
                 .ARM_LIGHTNING_THUNDER => &Target.aarch64.cpu.apple_a13,
-                .ARM_FIRESTORM_ICESTORM => &Target.aarch64.cpu.apple_m1, // a14
-                .ARM_BLIZZARD_AVALANCHE => &Target.aarch64.cpu.apple_m2, // a15
-                .ARM_EVEREST_SAWTOOTH => &Target.aarch64.cpu.apple_m3, // a16
+                .ARM_FIRESTORM_ICESTORM => &Target.aarch64.cpu.apple_a14,
+                .ARM_BLIZZARD_AVALANCHE => &Target.aarch64.cpu.apple_a15,
+                .ARM_EVEREST_SAWTOOTH => &Target.aarch64.cpu.apple_a16,
                 .ARM_IBIZA => &Target.aarch64.cpu.apple_m3, // base
                 .ARM_PALMA => &Target.aarch64.cpu.apple_m3, // max
                 .ARM_LOBOS => &Target.aarch64.cpu.apple_m3, // pro
-                .ARM_COLL => &Target.aarch64.cpu.apple_a17, // a17 pro
+                .ARM_COLL => &Target.aarch64.cpu.apple_a17, // pro
                 .ARM_DONAN => &Target.aarch64.cpu.apple_m4, // base
                 .ARM_BRAVA => &Target.aarch64.cpu.apple_m4, // pro/max
-                .ARM_TAHITI => &Target.aarch64.cpu.apple_m4, // a18 pro
-                .ARM_TUPAI => &Target.aarch64.cpu.apple_m4, // a18
+                .ARM_TAHITI => &Target.aarch64.cpu.apple_a18, // pro
+                .ARM_TUPAI => &Target.aarch64.cpu.apple_a18, // base
+                .ARM_HIDRA => &Target.aarch64.cpu.apple_m5, // base
+                .ARM_SOTRA => &Target.aarch64.cpu.apple_m5, // pro/max
+                .ARM_THERA => &Target.aarch64.cpu.apple_a19, // pro
+                .ARM_TILOS => &Target.aarch64.cpu.apple_a19, // base
                 else => return null,
             };