authorgravatar for git@vexu.euVeikka Tuominen <git@vexu.eu> 2020-03-11 16:46:12+02:00
committergravatar for git@vexu.euVeikka Tuominen <git@vexu.eu> 2020-03-11 16:48:18+02:00
log9262f065f50db3ea72454b6c1b9b66fd911aa6ba
tree79ccf2cc6b2f06fd87545ebc252c8403bd82357c
parentec906a97712b329694e8f2e1a35b50b75d052642
signaturelock-open Commit is signed but in an unrecognized format.

Move abi size checking to codegen

4 files changed, 84 insertions(+), 71 deletions(-)

lib/std/atomic/int.zig+5-8
......@@ -1,6 +1,3 @@
1const builtin = @import("builtin");
2const AtomicOrder = builtin.AtomicOrder;
3
41/// Thread-safe, lock-free integer
52pub fn Int(comptime T: type) type {
63 return struct {
......@@ -14,16 +11,16 @@ pub fn Int(comptime T: type) type {
1411
1512 /// Returns previous value
1613 pub fn incr(self: *Self) T {
17 return @atomicRmw(T, &self.unprotected_value, builtin.AtomicRmwOp.Add, 1, AtomicOrder.SeqCst);
14 return @atomicRmw(T, &self.unprotected_value, .Add, 1, .SeqCst);
1815 }
1916
2017 /// Returns previous value
2118 pub fn decr(self: *Self) T {
22 return @atomicRmw(T, &self.unprotected_value, builtin.AtomicRmwOp.Sub, 1, AtomicOrder.SeqCst);
19 return @atomicRmw(T, &self.unprotected_value, .Sub, 1, .SeqCst);
2320 }
2421
2522 pub fn get(self: *Self) T {
26 return @atomicLoad(T, &self.unprotected_value, AtomicOrder.SeqCst);
23 return @atomicLoad(T, &self.unprotected_value, .SeqCst);
2724 }
2825
2926 pub fn set(self: *Self, new_value: T) void {
......@@ -31,11 +28,11 @@ pub fn Int(comptime T: type) type {
3128 }
3229
3330 pub fn xchg(self: *Self, new_value: T) T {
34 return @atomicRmw(T, &self.unprotected_value, builtin.AtomicRmwOp.Xchg, new_value, AtomicOrder.SeqCst);
31 return @atomicRmw(T, &self.unprotected_value, .Xchg, new_value, .SeqCst);
3532 }
3633
3734 pub fn fetchAdd(self: *Self, op: T) T {
38 return @atomicRmw(T, &self.unprotected_value, builtin.AtomicRmwOp.Add, op, AtomicOrder.SeqCst);
35 return @atomicRmw(T, &self.unprotected_value, .Add, op, .SeqCst);
3936 }
4037 };
4138}
src/all_types.hpp-8
......@@ -3567,8 +3567,6 @@ struct IrInstGenCmpxchg {
35673567 IrInstGen *cmp_value;
35683568 IrInstGen *new_value;
35693569 IrInstGen *result_loc;
3570 // non null if operand needs widening and truncating
3571 ZigType *actual_type;
35723570 bool is_weak;
35733571};
35743572
......@@ -4201,8 +4199,6 @@ struct IrInstGenAtomicRmw {
42014199
42024200 IrInstGen *ptr;
42034201 IrInstGen *operand;
4204 // non null if operand needs widening and truncating
4205 ZigType *actual_type;
42064202 AtomicRmwOp op;
42074203 AtomicOrder ordering;
42084204};
......@@ -4219,8 +4215,6 @@ struct IrInstGenAtomicLoad {
42194215 IrInstGen base;
42204216
42214217 IrInstGen *ptr;
4222 // non null if operand needs widening and truncating
4223 ZigType *actual_type;
42244218 AtomicOrder ordering;
42254219};
42264220
......@@ -4238,8 +4232,6 @@ struct IrInstGenAtomicStore {
42384232
42394233 IrInstGen *ptr;
42404234 IrInstGen *value;
4241 // non null if operand needs widening and truncating
4242 ZigType *actual_type;
42434235 AtomicOrder ordering;
42444236};
42454237
src/codegen.cpp+47-14
......@@ -5219,18 +5219,48 @@ static enum ZigLLVM_AtomicRMWBinOp to_ZigLLVMAtomicRMWBinOp(AtomicRmwOp op, bool
52195219 zig_unreachable();
52205220}
52215221
5222static LLVMTypeRef get_atomic_abi_type(CodeGen *g, IrInstGen *instruction) {
5223 // If the operand type of an atomic operation is not a power of two sized
5224 // we need to widen it before using it and then truncate the result.
5225
5226 ir_assert(instruction->value->type->id == ZigTypeIdPointer, instruction);
5227 ZigType *operand_type = instruction->value->type->data.pointer.child_type;
5228 if (operand_type->id == ZigTypeIdInt || operand_type->id == ZigTypeIdEnum) {
5229 if (operand_type->id == ZigTypeIdEnum) {
5230 operand_type = operand_type->data.enumeration.tag_int_type;
5231 }
5232 auto bit_count = operand_type->data.integral.bit_count;
5233 bool is_signed = operand_type->data.integral.is_signed;
5234
5235 ir_assert(bit_count != 0, instruction);
5236 if (bit_count == 1 || !is_power_of_2(bit_count)) {
5237 return get_llvm_type(g, get_int_type(g, is_signed, operand_type->abi_size * 8));
5238 } else {
5239 return nullptr;
5240 }
5241 } else if (operand_type->id == ZigTypeIdFloat) {
5242 return nullptr;
5243 } else if (operand_type->id == ZigTypeIdBool) {
5244 return g->builtin_types.entry_u8->llvm_type;
5245 } else {
5246 ir_assert(get_codegen_ptr_type_bail(g, operand_type) != nullptr, instruction);
5247 return nullptr;
5248 }
5249}
5250
52225251static LLVMValueRef ir_render_cmpxchg(CodeGen *g, IrExecutableGen *executable, IrInstGenCmpxchg *instruction) {
52235252 LLVMValueRef ptr_val = ir_llvm_value(g, instruction->ptr);
52245253 LLVMValueRef cmp_val = ir_llvm_value(g, instruction->cmp_value);
52255254 LLVMValueRef new_val = ir_llvm_value(g, instruction->new_value);
52265255
52275256 ZigType *operand_type = instruction->new_value->value->type;
5228 if (instruction->actual_type != nullptr) {
5257 LLVMTypeRef actual_abi_type = get_atomic_abi_type(g, instruction->ptr);
5258 if (actual_abi_type != nullptr) {
52295259 // operand needs widening and truncating
52305260 ptr_val = LLVMBuildBitCast(g->builder, ptr_val,
5231 LLVMPointerType(get_llvm_type(g, instruction->actual_type), 0), "");
5232 cmp_val = LLVMBuildZExt(g->builder, cmp_val, get_llvm_type(g, instruction->actual_type), "");
5233 new_val = LLVMBuildZExt(g->builder, new_val, get_llvm_type(g, instruction->actual_type), "");
5261 LLVMPointerType(actual_abi_type, 0), "");
5262 cmp_val = LLVMBuildZExt(g->builder, cmp_val, actual_abi_type, "");
5263 new_val = LLVMBuildZExt(g->builder, new_val, actual_abi_type, "");
52345264 }
52355265
52365266 LLVMAtomicOrdering success_order = to_LLVMAtomicOrdering(instruction->success_order);
......@@ -5245,7 +5275,7 @@ static LLVMValueRef ir_render_cmpxchg(CodeGen *g, IrExecutableGen *executable, I
52455275
52465276 if (!handle_is_ptr(g, optional_type)) {
52475277 LLVMValueRef payload_val = LLVMBuildExtractValue(g->builder, result_val, 0, "");
5248 if (instruction->actual_type != nullptr) {
5278 if (actual_abi_type != nullptr) {
52495279 payload_val = LLVMBuildTrunc(g->builder, payload_val, get_llvm_type(g, operand_type), "");
52505280 }
52515281 LLVMValueRef success_bit = LLVMBuildExtractValue(g->builder, result_val, 1, "");
......@@ -5262,7 +5292,7 @@ static LLVMValueRef ir_render_cmpxchg(CodeGen *g, IrExecutableGen *executable, I
52625292 ir_assert(type_has_bits(g, child_type), &instruction->base);
52635293
52645294 LLVMValueRef payload_val = LLVMBuildExtractValue(g->builder, result_val, 0, "");
5265 if (instruction->actual_type != nullptr) {
5295 if (actual_abi_type != nullptr) {
52665296 payload_val = LLVMBuildTrunc(g->builder, payload_val, get_llvm_type(g, operand_type), "");
52675297 }
52685298 LLVMValueRef val_ptr = LLVMBuildStructGEP(g->builder, result_loc, maybe_child_index, "");
......@@ -5842,11 +5872,12 @@ static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, IrExecutableGen *executable
58425872 LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);
58435873 LLVMValueRef operand = ir_llvm_value(g, instruction->operand);
58445874
5845 if (instruction->actual_type != nullptr) {
5875 LLVMTypeRef actual_abi_type = get_atomic_abi_type(g, instruction->ptr);
5876 if (actual_abi_type != nullptr) {
58465877 // operand needs widening and truncating
58475878 LLVMValueRef casted_ptr = LLVMBuildBitCast(g->builder, ptr,
5848 LLVMPointerType(get_llvm_type(g, instruction->actual_type), 0), "");
5849 LLVMValueRef casted_operand = LLVMBuildZExt(g->builder, operand, get_llvm_type(g, instruction->actual_type), "");
5879 LLVMPointerType(actual_abi_type, 0), "");
5880 LLVMValueRef casted_operand = LLVMBuildZExt(g->builder, operand, actual_abi_type, "");
58505881 LLVMValueRef uncasted_result = ZigLLVMBuildAtomicRMW(g->builder, op, casted_ptr, casted_operand, ordering,
58515882 g->is_single_threaded);
58525883 return LLVMBuildTrunc(g->builder, uncasted_result, get_llvm_type(g, operand_type), "");
......@@ -5872,10 +5903,11 @@ static LLVMValueRef ir_render_atomic_load(CodeGen *g, IrExecutableGen *executabl
58725903 LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);
58735904
58745905 ZigType *operand_type = instruction->ptr->value->type->data.pointer.child_type;
5875 if (instruction->actual_type != nullptr) {
5906 LLVMTypeRef actual_abi_type = get_atomic_abi_type(g, instruction->ptr);
5907 if (actual_abi_type != nullptr) {
58765908 // operand needs widening and truncating
58775909 ptr = LLVMBuildBitCast(g->builder, ptr,
5878 LLVMPointerType(get_llvm_type(g, instruction->actual_type), 0), "");
5910 LLVMPointerType(actual_abi_type, 0), "");
58795911 LLVMValueRef load_inst = gen_load(g, ptr, instruction->ptr->value->type, "");
58805912 LLVMSetOrdering(load_inst, ordering);
58815913 return LLVMBuildTrunc(g->builder, load_inst, get_llvm_type(g, operand_type), "");
......@@ -5892,11 +5924,12 @@ static LLVMValueRef ir_render_atomic_store(CodeGen *g, IrExecutableGen *executab
58925924 LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);
58935925 LLVMValueRef value = ir_llvm_value(g, instruction->value);
58945926
5895 if (instruction->actual_type != nullptr) {
5927 LLVMTypeRef actual_abi_type = get_atomic_abi_type(g, instruction->ptr);
5928 if (actual_abi_type != nullptr) {
58965929 // operand needs widening
58975930 ptr = LLVMBuildBitCast(g->builder, ptr,
5898 LLVMPointerType(get_llvm_type(g, instruction->actual_type), 0), "");
5899 value = LLVMBuildZExt(g->builder, value, get_llvm_type(g, instruction->actual_type), "");
5931 LLVMPointerType(actual_abi_type, 0), "");
5932 value = LLVMBuildZExt(g->builder, value, actual_abi_type, "");
59005933 }
59015934 LLVMValueRef store_inst = gen_store(g, value, ptr, instruction->ptr->value->type);
59025935 LLVMSetOrdering(store_inst, ordering);
src/ir.cpp+32-41
......@@ -227,7 +227,7 @@ static IrInstGen *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_name
227227static void ir_assert(bool ok, IrInst* source_instruction);
228228static void ir_assert_gen(bool ok, IrInstGen *source_instruction);
229229static IrInstGen *ir_get_var_ptr(IrAnalyze *ira, IrInst *source_instr, ZigVar *var);
230static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op, ZigType **actual_type);
230static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op);
231231static IrInstSrc *ir_lval_wrap(IrBuilderSrc *irb, Scope *scope, IrInstSrc *value, LVal lval, ResultLoc *result_loc);
232232static IrInstSrc *ir_expr_wrap(IrBuilderSrc *irb, Scope *scope, IrInstSrc *inst, ResultLoc *result_loc);
233233static ZigType *adjust_ptr_align(CodeGen *g, ZigType *ptr_type, uint32_t new_align);
......@@ -3406,7 +3406,7 @@ static IrInstSrc *ir_build_cmpxchg_src(IrBuilderSrc *irb, Scope *scope, AstNode
34063406
34073407static IrInstGen *ir_build_cmpxchg_gen(IrAnalyze *ira, IrInst *source_instruction, ZigType *result_type,
34083408 IrInstGen *ptr, IrInstGen *cmp_value, IrInstGen *new_value,
3409 AtomicOrder success_order, AtomicOrder failure_order, bool is_weak, IrInstGen *result_loc, ZigType *actual_type)
3409 AtomicOrder success_order, AtomicOrder failure_order, bool is_weak, IrInstGen *result_loc)
34103410{
34113411 IrInstGenCmpxchg *instruction = ir_build_inst_gen<IrInstGenCmpxchg>(&ira->new_irb,
34123412 source_instruction->scope, source_instruction->source_node);
......@@ -3418,7 +3418,6 @@ static IrInstGen *ir_build_cmpxchg_gen(IrAnalyze *ira, IrInst *source_instructio
34183418 instruction->failure_order = failure_order;
34193419 instruction->is_weak = is_weak;
34203420 instruction->result_loc = result_loc;
3421 instruction->actual_type = actual_type;
34223421
34233422 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
34243423 ir_ref_inst_gen(cmp_value, ira->new_irb.current_basic_block);
......@@ -4555,7 +4554,7 @@ static IrInstSrc *ir_build_atomic_rmw_src(IrBuilderSrc *irb, Scope *scope, AstNo
45554554}
45564555
45574556static IrInstGen *ir_build_atomic_rmw_gen(IrAnalyze *ira, IrInst *source_instr,
4558 IrInstGen *ptr, IrInstGen *operand, AtomicRmwOp op, AtomicOrder ordering, ZigType *operand_type, ZigType *actual_type)
4557 IrInstGen *ptr, IrInstGen *operand, AtomicRmwOp op, AtomicOrder ordering, ZigType *operand_type)
45594558{
45604559 IrInstGenAtomicRmw *instruction = ir_build_inst_gen<IrInstGenAtomicRmw>(&ira->new_irb, source_instr->scope, source_instr->source_node);
45614560 instruction->base.value->type = operand_type;
......@@ -4563,7 +4562,6 @@ static IrInstGen *ir_build_atomic_rmw_gen(IrAnalyze *ira, IrInst *source_instr,
45634562 instruction->op = op;
45644563 instruction->operand = operand;
45654564 instruction->ordering = ordering;
4566 instruction->actual_type = actual_type;
45674565
45684566 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
45694567 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
......@@ -4587,14 +4585,13 @@ static IrInstSrc *ir_build_atomic_load_src(IrBuilderSrc *irb, Scope *scope, AstN
45874585}
45884586
45894587static IrInstGen *ir_build_atomic_load_gen(IrAnalyze *ira, IrInst *source_instr,
4590 IrInstGen *ptr, AtomicOrder ordering, ZigType *operand_type, ZigType *actual_type)
4588 IrInstGen *ptr, AtomicOrder ordering, ZigType *operand_type)
45914589{
45924590 IrInstGenAtomicLoad *instruction = ir_build_inst_gen<IrInstGenAtomicLoad>(&ira->new_irb,
45934591 source_instr->scope, source_instr->source_node);
45944592 instruction->base.value->type = operand_type;
45954593 instruction->ptr = ptr;
45964594 instruction->ordering = ordering;
4597 instruction->actual_type = actual_type;
45984595
45994596 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
46004597
......@@ -4619,14 +4616,13 @@ static IrInstSrc *ir_build_atomic_store_src(IrBuilderSrc *irb, Scope *scope, Ast
46194616}
46204617
46214618static IrInstGen *ir_build_atomic_store_gen(IrAnalyze *ira, IrInst *source_instr,
4622 IrInstGen *ptr, IrInstGen *value, AtomicOrder ordering, ZigType *actual_type)
4619 IrInstGen *ptr, IrInstGen *value, AtomicOrder ordering)
46234620{
46244621 IrInstGenAtomicStore *instruction = ir_build_inst_void<IrInstGenAtomicStore>(&ira->new_irb,
46254622 source_instr->scope, source_instr->source_node);
46264623 instruction->ptr = ptr;
46274624 instruction->value = value;
46284625 instruction->ordering = ordering;
4629 instruction->actual_type = actual_type;
46304626
46314627 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
46324628 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
......@@ -25125,8 +25121,7 @@ static IrInstGen *ir_analyze_instruction_embed_file(IrAnalyze *ira, IrInstSrcEmb
2512525121}
2512625122
2512725123static IrInstGen *ir_analyze_instruction_cmpxchg(IrAnalyze *ira, IrInstSrcCmpxchg *instruction) {
25128 ZigType *actual_type;
25129 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->type_value->child, &actual_type);
25124 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->type_value->child);
2513025125 if (type_is_invalid(operand_type))
2513125126 return ira->codegen->invalid_inst_gen;
2513225127
......@@ -25203,29 +25198,34 @@ static IrInstGen *ir_analyze_instruction_cmpxchg(IrAnalyze *ira, IrInstSrcCmpxch
2520325198
2520425199 // special case zero bit types
2520525200 if (type_has_one_possible_value(ira->codegen, operand_type) == OnePossibleValueYes) {
25206 ZigValue *val = ira->codegen->pass1_arena->allocate<ZigValue>(1);
25207 val->special = ConstValSpecialStatic;
25208 val->type = result_type;
25209 set_optional_value_to_null(val);
25210 return ir_const_move(ira, &instruction->base.base, val);
25201 IrInstGen *result = ir_const(ira, &instruction->base.base, result_type);
25202 set_optional_value_to_null(result->value);
25203 return result;
2521125204 }
2521225205
2521325206 if (instr_is_comptime(casted_ptr) && casted_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar &&
2521425207 instr_is_comptime(casted_cmp_value) && instr_is_comptime(casted_new_value)) {
25215 IrInstGen *result = ir_get_deref(ira, &instruction->base.base, casted_ptr, nullptr);
25216 ZigValue *op1_val = ir_resolve_const(ira, result, UndefBad);
25208 ZigValue *ptr_val = ir_resolve_const(ira, casted_ptr, UndefBad);
25209 if (ptr_val == nullptr)
25210 return ira->codegen->invalid_inst_gen;
25211
25212 ZigValue *op1_val = const_ptr_pointee(ira, ira->codegen, ptr_val, instruction->base.base.source_node);
25213 if (op1_val == nullptr)
25214 return ira->codegen->invalid_inst_gen;
25215
2521725216 ZigValue *op2_val = ir_resolve_const(ira, casted_cmp_value, UndefBad);
25217 if (op2_val == nullptr)
25218 return ira->codegen->invalid_inst_gen;
25219
2521825220 bool eql = const_values_equal(ira->codegen, op1_val, op2_val);
25219 ZigValue *val = ira->codegen->pass1_arena->allocate<ZigValue>(1);
25220 val->special = ConstValSpecialStatic;
25221 val->type = result_type;
25221 IrInstGen *result = ir_const(ira, &instruction->base.base, result_type);
2522225222 if (eql) {
2522325223 ir_analyze_store_ptr(ira, &instruction->base.base, casted_ptr, casted_new_value, false);
25224 set_optional_value_to_null(val);
25224 set_optional_value_to_null(result->value);
2522525225 } else {
25226 set_optional_payload(val, op1_val);
25226 set_optional_payload(result->value, op1_val);
2522725227 }
25228 return ir_const_move(ira, &instruction->base.base, val);
25228 return result;
2522925229 }
2523025230
2523125231 IrInstGen *result_loc;
......@@ -25241,7 +25241,7 @@ static IrInstGen *ir_analyze_instruction_cmpxchg(IrAnalyze *ira, IrInstSrcCmpxch
2524125241
2524225242 return ir_build_cmpxchg_gen(ira, &instruction->base.base, result_type,
2524325243 casted_ptr, casted_cmp_value, casted_new_value,
25244 success_order, failure_order, instruction->is_weak, result_loc, actual_type);
25244 success_order, failure_order, instruction->is_weak, result_loc);
2524525245}
2524625246
2524725247static IrInstGen *ir_analyze_instruction_fence(IrAnalyze *ira, IrInstSrcFence *instruction) {
......@@ -28333,12 +28333,11 @@ static IrInstGen *ir_analyze_instruction_tag_type(IrAnalyze *ira, IrInstSrcTagTy
2833328333 }
2833428334}
2833528335
28336static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op, ZigType **actual_type) {
28336static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op) {
2833728337 ZigType *operand_type = ir_resolve_type(ira, op);
2833828338 if (type_is_invalid(operand_type))
2833928339 return ira->codegen->builtin_types.entry_invalid;
2834028340
28341 *actual_type = nullptr;
2834228341 if (operand_type->id == ZigTypeIdInt || operand_type->id == ZigTypeIdEnum) {
2834328342 ZigType *int_type;
2834428343 if (operand_type->id == ZigTypeIdEnum) {
......@@ -28355,10 +28354,6 @@ static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op, Zi
2835528354 max_atomic_bits, bit_count));
2835628355 return ira->codegen->builtin_types.entry_invalid;
2835728356 }
28358
28359 if (bit_count == 1 || !is_power_of_2(bit_count)) {
28360 *actual_type = get_int_type(ira->codegen, int_type->data.integral.is_signed, int_type->abi_size * 8);
28361 }
2836228357 } else if (operand_type->id == ZigTypeIdFloat) {
2836328358 uint32_t max_atomic_bits = target_arch_largest_atomic_bits(ira->codegen->zig_target->arch);
2836428359 if (operand_type->data.floating.bit_count > max_atomic_bits) {
......@@ -28369,7 +28364,6 @@ static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op, Zi
2836928364 }
2837028365 } else if (operand_type->id == ZigTypeIdBool) {
2837128366 // will be treated as u8
28372 *actual_type = ira->codegen->builtin_types.entry_u8;
2837328367 } else {
2837428368 Error err;
2837528369 ZigType *operand_ptr_type;
......@@ -28387,8 +28381,7 @@ static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op, Zi
2838728381}
2838828382
2838928383static IrInstGen *ir_analyze_instruction_atomic_rmw(IrAnalyze *ira, IrInstSrcAtomicRmw *instruction) {
28390 ZigType *actual_type;
28391 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child, &actual_type);
28384 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child);
2839228385 if (type_is_invalid(operand_type))
2839328386 return ira->codegen->invalid_inst_gen;
2839428387
......@@ -28451,12 +28444,11 @@ static IrInstGen *ir_analyze_instruction_atomic_rmw(IrAnalyze *ira, IrInstSrcAto
2845128444 }
2845228445
2845328446 return ir_build_atomic_rmw_gen(ira, &instruction->base.base, casted_ptr, casted_operand, op,
28454 ordering, operand_type, actual_type);
28447 ordering, operand_type);
2845528448}
2845628449
2845728450static IrInstGen *ir_analyze_instruction_atomic_load(IrAnalyze *ira, IrInstSrcAtomicLoad *instruction) {
28458 ZigType *actual_type;
28459 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child, &actual_type);
28451 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child);
2846028452 if (type_is_invalid(operand_type))
2846128453 return ira->codegen->invalid_inst_gen;
2846228454
......@@ -28486,12 +28478,11 @@ static IrInstGen *ir_analyze_instruction_atomic_load(IrAnalyze *ira, IrInstSrcAt
2848628478 return result;
2848728479 }
2848828480
28489 return ir_build_atomic_load_gen(ira, &instruction->base.base, casted_ptr, ordering, operand_type, actual_type);
28481 return ir_build_atomic_load_gen(ira, &instruction->base.base, casted_ptr, ordering, operand_type);
2849028482}
2849128483
2849228484static IrInstGen *ir_analyze_instruction_atomic_store(IrAnalyze *ira, IrInstSrcAtomicStore *instruction) {
28493 ZigType *actual_type;
28494 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child, &actual_type);
28485 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child);
2849528486 if (type_is_invalid(operand_type))
2849628487 return ira->codegen->invalid_inst_gen;
2849728488
......@@ -28535,7 +28526,7 @@ static IrInstGen *ir_analyze_instruction_atomic_store(IrAnalyze *ira, IrInstSrcA
2853528526 return result;
2853628527 }
2853728528
28538 return ir_build_atomic_store_gen(ira, &instruction->base.base, casted_ptr, casted_value, ordering, actual_type);
28529 return ir_build_atomic_store_gen(ira, &instruction->base.base, casted_ptr, casted_value, ordering);
2853928530}
2854028531
2854128532static IrInstGen *ir_analyze_instruction_save_err_ret_addr(IrAnalyze *ira, IrInstSrcSaveErrRetAddr *instruction) {