| author | |
| committer | |
| log | 9542ee9bf87424f89b7ca182944fe825193a5702 |
| tree | bdad4881b0874730e18b9fb7e46d738f4055eb86 |
| parent | ace1a69a55dd77a8189b7408b126d9d1ca0066ee |
4 files changed, 10 insertions(+), 9 deletions(-)
src/arch/x86_64/Emit.zig+2-2| ... | ... | @@ -120,7 +120,7 @@ pub fn emitMir(emit: *Emit) Error!void { |
| 120 | 120 | } |
| 121 | 121 | if (emit.lower.pic) { |
| 122 | 122 | const r_type: u32 = if (sym.flags.needs_zig_got and !is_obj_or_static_lib) |
| 123 | link.File.Elf.R_X86_64_ZIG_GOTPCREL | |
| 123 | link.File.Elf.R_ZIG_GOTPCREL | |
| 124 | 124 | else if (sym.flags.needs_got) |
| 125 | 125 | @intFromEnum(std.elf.R_X86_64.R_X86_64_GOTPCREL) |
| 126 | 126 | else |
| ... | ... | @@ -140,7 +140,7 @@ pub fn emitMir(emit: *Emit) Error!void { |
| 140 | 140 | }); |
| 141 | 141 | } else { |
| 142 | 142 | const r_type: u32 = if (sym.flags.needs_zig_got and !is_obj_or_static_lib) |
| 143 | link.File.Elf.R_X86_64_ZIG_GOT32 | |
| 143 | link.File.Elf.R_ZIG_GOT32 | |
| 144 | 144 | else if (sym.flags.needs_got) |
| 145 | 145 | @intFromEnum(std.elf.R_X86_64.R_X86_64_GOT32) |
| 146 | 146 | else if (sym.flags.is_tls) |
src/link/Elf.zig+3-2| ... | ... | @@ -6065,8 +6065,9 @@ const RelaSection = struct { |
| 6065 | 6065 | }; |
| 6066 | 6066 | const RelaSectionTable = std.AutoArrayHashMapUnmanaged(u32, RelaSection); |
| 6067 | 6067 | |
| 6068 | pub const R_X86_64_ZIG_GOT32: u32 = 0xff00; | |
| 6069 | pub const R_X86_64_ZIG_GOTPCREL: u32 = 0xff01; | |
| 6068 | // TODO: add comptime check we don't clobber any reloc for any ISA | |
| 6069 | pub const R_ZIG_GOT32: u32 = 0xff00; | |
| 6070 | pub const R_ZIG_GOTPCREL: u32 = 0xff01; | |
| 6070 | 6071 | |
| 6071 | 6072 | fn defaultEntrySymbolName(cpu_arch: std.Target.Cpu.Arch) []const u8 { |
| 6072 | 6073 | return switch (cpu_arch) { |
src/link/Elf/Atom.zig+4-4| ... | ... | @@ -968,8 +968,8 @@ const x86_64 = struct { |
| 968 | 968 | |
| 969 | 969 | else => |x| switch (@intFromEnum(x)) { |
| 970 | 970 | // Zig custom relocations |
| 971 | Elf.R_X86_64_ZIG_GOT32, | |
| 972 | Elf.R_X86_64_ZIG_GOTPCREL, | |
| 971 | Elf.R_ZIG_GOT32, | |
| 972 | Elf.R_ZIG_GOTPCREL, | |
| 973 | 973 | => { |
| 974 | 974 | assert(symbol.flags.has_zig_got); |
| 975 | 975 | }, |
| ... | ... | @@ -1153,8 +1153,8 @@ const x86_64 = struct { |
| 1153 | 1153 | |
| 1154 | 1154 | else => |x| switch (@intFromEnum(x)) { |
| 1155 | 1155 | // Zig custom relocations |
| 1156 | Elf.R_X86_64_ZIG_GOT32 => try cwriter.writeInt(u32, @as(u32, @intCast(ZIG_GOT + A)), .little), | |
| 1157 | Elf.R_X86_64_ZIG_GOTPCREL => try cwriter.writeInt(i32, @as(i32, @intCast(ZIG_GOT + A - P)), .little), | |
| 1156 | Elf.R_ZIG_GOT32 => try cwriter.writeInt(u32, @as(u32, @intCast(ZIG_GOT + A)), .little), | |
| 1157 | Elf.R_ZIG_GOTPCREL => try cwriter.writeInt(i32, @as(i32, @intCast(ZIG_GOT + A - P)), .little), | |
| 1158 | 1158 | |
| 1159 | 1159 | else => {}, |
| 1160 | 1160 | }, |
src/link/Elf/relocation.zig+1-1| ... | ... | @@ -55,7 +55,7 @@ const aarch64_relocs = Table(10, elf.R_AARCH64, .{ |
| 55 | 55 | .{ .tlsdesc, .R_AARCH64_TLSDESC }, |
| 56 | 56 | }); |
| 57 | 57 | |
| 58 | const riscv64_relocs = Table(8, elf.R_RISCV, .{ | |
| 58 | const riscv64_relocs = Table(9, elf.R_RISCV, .{ | |
| 59 | 59 | .{ .abs, .R_RISCV_64 }, |
| 60 | 60 | .{ .copy, .R_RISCV_COPY }, |
| 61 | 61 | .{ .rel, .R_RISCV_RELATIVE }, |