authorgravatar for joachim.schmidt557@outlook.comJoachim Schmidt <joachim.schmidt557@outlook.com> 2021-06-09 14:03:14+08:00
committergravatar for git@vexu.euVeikka Tuominen <git@vexu.eu> 2021-06-09 21:37:23+03:00
log96c60bcca5fd1a76ded5eba576bfdb1def38139f
treeb92752c4dd0c19864c06c367dbac8cb64566023e
parentf62f35e346f3ebe732974ca3a945b6da5cd12b0f

stage2 codegen: Remove hacks for discontinued SPU II backend

1 files changed, 8 insertions(+), 26 deletions(-)

src/codegen.zig+8-26
...@@ -781,12 +781,8 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {...@@ -781,12 +781,8 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
781 branch.inst_table.putAssumeCapacity(inst, .dead);781 branch.inst_table.putAssumeCapacity(inst, .dead);
782 switch (prev_value) {782 switch (prev_value) {
783 .register => |reg| {783 .register => |reg| {
784 // TODO separate architectures with registers from784 const canon_reg = toCanonicalReg(reg);
785 // stack-based architectures (spu_2)785 self.register_manager.freeReg(canon_reg);
786 if (callee_preserved_regs.len > 0) {
787 const canon_reg = toCanonicalReg(reg);
788 self.register_manager.freeReg(canon_reg);
789 }
790 },786 },
791 else => {}, // TODO process stack allocation death787 else => {}, // TODO process stack allocation death
792 }788 }
...@@ -926,12 +922,8 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {...@@ -926,12 +922,8 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
926 const ptr_bits = arch.ptrBitWidth();922 const ptr_bits = arch.ptrBitWidth();
927 const ptr_bytes: u64 = @divExact(ptr_bits, 8);923 const ptr_bytes: u64 = @divExact(ptr_bits, 8);
928 if (abi_size <= ptr_bytes) {924 if (abi_size <= ptr_bytes) {
929 // TODO separate architectures with registers from925 if (self.register_manager.tryAllocReg(inst, &.{})) |reg| {
930 // stack-based architectures (spu_2)926 return MCValue{ .register = registerAlias(reg, abi_size) };
931 if (callee_preserved_regs.len > 0) {
932 if (self.register_manager.tryAllocReg(inst, &.{})) |reg| {
933 return MCValue{ .register = registerAlias(reg, abi_size) };
934 }
935 }927 }
936 }928 }
937 }929 }
...@@ -1249,16 +1241,12 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {...@@ -1249,16 +1241,12 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
1249 .register => |reg| {1241 .register => |reg| {
1250 // If it's in the registers table, need to associate the register with the1242 // If it's in the registers table, need to associate the register with the
1251 // new instruction.1243 // new instruction.
1252 // TODO separate architectures with registers from1244 if (reg.allocIndex()) |index| {
1253 // stack-based architectures (spu_2)1245 if (!self.register_manager.isRegFree(reg)) {
1254 if (callee_preserved_regs.len > 0) {1246 self.register_manager.registers[index] = inst;
1255 if (reg.allocIndex()) |index| {
1256 if (!self.register_manager.isRegFree(reg)) {
1257 self.register_manager.registers[index] = inst;
1258 }
1259 }1247 }
1260 log.debug("reusing {} => {*}", .{ reg, inst });
1261 }1248 }
1249 log.debug("reusing {} => {*}", .{ reg, inst });
1262 },1250 },
1263 .stack_offset => |off| {1251 .stack_offset => |off| {
1264 log.debug("reusing stack offset {} => {*}", .{ off, inst });1252 log.debug("reusing stack offset {} => {*}", .{ off, inst });
...@@ -2182,12 +2170,6 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {...@@ -2182,12 +2170,6 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
2182 const arg_index = self.arg_index;2170 const arg_index = self.arg_index;
2183 self.arg_index += 1;2171 self.arg_index += 1;
21842172
2185 // TODO separate architectures with registers from
2186 // stack-based architectures (spu_2)
2187 if (callee_preserved_regs.len == 0) {
2188 return self.fail(inst.base.src, "TODO implement Register enum for {}", .{self.target.cpu.arch});
2189 }
2190
2191 const result = self.args[arg_index];2173 const result = self.args[arg_index];
2192 const mcv = switch (arch) {2174 const mcv = switch (arch) {
2193 // TODO support stack-only arguments on all target architectures2175 // TODO support stack-only arguments on all target architectures