authorgravatar for readcuttingt@gmail.comTom Read Cutting <readcuttingt@gmail.com> 2022-03-10 22:17:07+00:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2022-03-15 13:48:42-04:00
log9bb19a090ea1d1d47b214974d5e18e11ef4adb85
treebc1d9837eeb21afdb0a80ae355e671ad54b8151a
parentc64279b15b527749420e0e79fcc6dbfbfeb02812

std: Add elf.EM, coff.MachineType to Target.CPU.Arch conversions

target.Arch already supports finding the correct encoding for either target, so being able to do the inverse has use cases for when parsing files of an unknown target (i.e. for zar).

2 files changed, 46 insertions(+), 1 deletions(-)

lib/std/coff.zig+15
......@@ -62,6 +62,21 @@ pub const MachineType = enum(u16) {
6262 Thumb = 0x1c2,
6363 /// MIPS little-endian WCE v2
6464 WCEMIPSV2 = 0x169,
65
66 pub fn toTargetCpuArch(machine_type: MachineType) ?std.Target.Cpu.Arch {
67 return switch (machine_type) {
68 .ARM => .arm,
69 .POWERPC => .powerpc,
70 .RISCV32 => .riscv32,
71 .Thumb => .thumb,
72 .I386 => .i386,
73 .ARM64 => .aarch64,
74 .RISCV64 => .riscv64,
75 .X64 => .x86_64,
76 // there's cases we don't (yet) handle
77 else => null,
78 };
79 }
6580};
6681
6782// OptionalHeader.magic values
lib/std/elf.zig+31-1
......@@ -1481,6 +1481,36 @@ pub const EM = enum(u16) {
14811481 _BPF = 247,
14821482
14831483 _,
1484
1485 pub fn toTargetCpuArch(em: EM) ?std.Target.Cpu.Arch {
1486 return switch (em) {
1487 ._AVR => .avr,
1488 ._MSP430 => .msp430,
1489 ._ARC => .arc,
1490 ._ARM => .arm,
1491 ._HEXAGON => .hexagon,
1492 ._68K => .m68k,
1493 ._MIPS => .mips,
1494 ._MIPS_RS3_LE => .mipsel,
1495 ._PPC => .powerpc,
1496 ._SPARC => .sparc,
1497 ._386 => .i386,
1498 ._XCORE => .xcore,
1499 ._CSR_KALIMBA => .kalimba,
1500 ._LANAI => .lanai,
1501 ._AARCH64 => .aarch64,
1502 ._PPC64 => .powerpc64,
1503 ._RISCV => .riscv64,
1504 ._X86_64 => .x86_64,
1505 ._BPF => .bpfel,
1506 ._SPARCV9 => .sparcv9,
1507 ._S390 => .s390x,
1508 ._SPU_2 => .spu_2,
1509 // there's many cases we don't (yet) handle, or will never have a
1510 // zig target cpu arch equivalent (such as null).
1511 else => null,
1512 };
1513 }
14841514};
14851515
14861516/// Section data should be writable during execution.
......@@ -1681,7 +1711,7 @@ pub const R_X86_64_TLSDESC = 36;
16811711pub const R_X86_64_IRELATIVE = 37;
16821712/// 64-bit adjust by program base
16831713pub const R_X86_64_RELATIVE64 = 38;
1684/// 39 Reserved was R_X86_64_PC32_BND
1714/// 39 Reserved was R_X86_64_PC32_BND
16851715/// 40 Reserved was R_X86_64_PLT32_BND
16861716/// Load from 32 bit signed pc relative offset to GOT entry without REX prefix, relaxable
16871717pub const R_X86_64_GOTPCRELX = 41;