| ... | @@ -56,15 +56,15 @@ const llvm_targets = [_]LlvmTarget{ | ... | @@ -56,15 +56,15 @@ const llvm_targets = [_]LlvmTarget{ |
| 56 | .llvm_name = "all", | 56 | .llvm_name = "all", |
| 57 | .omit = true, | 57 | .omit = true, |
| 58 | }, | 58 | }, |
| 59 | .{ | | |
| 60 | .llvm_name = "v8a", | | |
| 61 | .extra_deps = &.{ "fp_armv8", "neon" }, | | |
| 62 | }, | | |
| 63 | .{ | 59 | .{ |
| 64 | .llvm_name = "CONTEXTIDREL2", | 60 | .llvm_name = "CONTEXTIDREL2", |
| 65 | .zig_name = "contextidr_el2", | 61 | .zig_name = "contextidr_el2", |
| 66 | .desc = "Enable RW operand Context ID Register (EL2)", | 62 | .desc = "Enable RW operand Context ID Register (EL2)", |
| 67 | }, | 63 | }, |
| | 64 | .{ |
| | 65 | .llvm_name = "v8a", |
| | 66 | .extra_deps = &.{"neon"}, |
| | 67 | }, |
| 68 | .{ | 68 | .{ |
| 69 | .llvm_name = "neoversee1", | 69 | .llvm_name = "neoversee1", |
| 70 | .flatten = true, | 70 | .flatten = true, |
| ... | @@ -77,6 +77,10 @@ const llvm_targets = [_]LlvmTarget{ | ... | @@ -77,6 +77,10 @@ const llvm_targets = [_]LlvmTarget{ |
| 77 | .llvm_name = "neoversen2", | 77 | .llvm_name = "neoversen2", |
| 78 | .flatten = true, | 78 | .flatten = true, |
| 79 | }, | 79 | }, |
| | 80 | .{ |
| | 81 | .llvm_name = "neoversen3", |
| | 82 | .flatten = true, |
| | 83 | }, |
| 80 | .{ | 84 | .{ |
| 81 | .llvm_name = "neoversev1", | 85 | .llvm_name = "neoversev1", |
| 82 | .flatten = true, | 86 | .flatten = true, |
| ... | @@ -85,32 +89,37 @@ const llvm_targets = [_]LlvmTarget{ | ... | @@ -85,32 +89,37 @@ const llvm_targets = [_]LlvmTarget{ |
| 85 | .llvm_name = "neoversev2", | 89 | .llvm_name = "neoversev2", |
| 86 | .flatten = true, | 90 | .flatten = true, |
| 87 | }, | 91 | }, |
| | 92 | .{ |
| | 93 | .llvm_name = "neoversev3", |
| | 94 | .flatten = true, |
| | 95 | }, |
| | 96 | .{ |
| | 97 | .llvm_name = "neoversev3AE", |
| | 98 | .flatten = true, |
| | 99 | }, |
| 88 | .{ | 100 | .{ |
| 89 | .llvm_name = "neoverse512tvb", | 101 | .llvm_name = "neoverse512tvb", |
| 90 | .flatten = true, | 102 | .flatten = true, |
| 91 | }, | 103 | }, |
| 92 | .{ | 104 | .{ |
| 93 | .llvm_name = "exynosm3", | 105 | .llvm_name = "oryon-1", |
| 94 | .flatten = true, | 106 | .flatten = true, |
| 95 | .extra_deps = &.{"v8a"}, | | |
| 96 | }, | 107 | }, |
| 97 | .{ | 108 | .{ |
| 98 | .llvm_name = "exynosm4", | 109 | .llvm_name = "exynosm3", |
| 99 | .flatten = true, | 110 | .flatten = true, |
| 100 | }, | 111 | }, |
| 101 | .{ | 112 | .{ |
| 102 | .llvm_name = "v8.1a", | 113 | .llvm_name = "exynosm4", |
| 103 | .extra_deps = &.{"v8a"}, | 114 | .flatten = true, |
| 104 | }, | 115 | }, |
| 105 | .{ | 116 | .{ |
| 106 | .llvm_name = "a35", | 117 | .llvm_name = "a35", |
| 107 | .flatten = true, | 118 | .flatten = true, |
| 108 | .extra_deps = &.{"v8a"}, | | |
| 109 | }, | 119 | }, |
| 110 | .{ | 120 | .{ |
| 111 | .llvm_name = "a53", | 121 | .llvm_name = "a53", |
| 112 | .flatten = true, | 122 | .flatten = true, |
| 113 | .extra_deps = &.{"v8a"}, | | |
| 114 | }, | 123 | }, |
| 115 | .{ | 124 | .{ |
| 116 | .llvm_name = "a55", | 125 | .llvm_name = "a55", |
| ... | @@ -119,34 +128,75 @@ const llvm_targets = [_]LlvmTarget{ | ... | @@ -119,34 +128,75 @@ const llvm_targets = [_]LlvmTarget{ |
| 119 | .{ | 128 | .{ |
| 120 | .llvm_name = "a57", | 129 | .llvm_name = "a57", |
| 121 | .flatten = true, | 130 | .flatten = true, |
| 122 | .extra_deps = &.{"v8a"}, | 131 | }, |
| | 132 | .{ |
| | 133 | .llvm_name = "a510", |
| | 134 | .flatten = true, |
| | 135 | }, |
| | 136 | .{ |
| | 137 | .llvm_name = "a520", |
| | 138 | .flatten = true, |
| | 139 | }, |
| | 140 | .{ |
| | 141 | .llvm_name = "a520ae", |
| | 142 | .flatten = true, |
| 123 | }, | 143 | }, |
| 124 | .{ | 144 | .{ |
| 125 | .llvm_name = "a64fx", | 145 | .llvm_name = "a64fx", |
| 126 | .flatten = true, | 146 | .flatten = true, |
| 127 | }, | 147 | }, |
| | 148 | .{ |
| | 149 | .llvm_name = "a65", |
| | 150 | .flatten = true, |
| | 151 | }, |
| 128 | .{ | 152 | .{ |
| 129 | .llvm_name = "a72", | 153 | .llvm_name = "a72", |
| 130 | .flatten = true, | 154 | .flatten = true, |
| 131 | .extra_deps = &.{"v8a"}, | | |
| 132 | }, | 155 | }, |
| 133 | .{ | 156 | .{ |
| 134 | .llvm_name = "a73", | 157 | .llvm_name = "a73", |
| 135 | .flatten = true, | 158 | .flatten = true, |
| 136 | .extra_deps = &.{"v8a"}, | | |
| 137 | }, | 159 | }, |
| 138 | .{ | 160 | .{ |
| 139 | .llvm_name = "a75", | 161 | .llvm_name = "a75", |
| 140 | .flatten = true, | 162 | .flatten = true, |
| 141 | }, | 163 | }, |
| | 164 | .{ |
| | 165 | .llvm_name = "a76", |
| | 166 | .flatten = true, |
| | 167 | }, |
| 142 | .{ | 168 | .{ |
| 143 | .llvm_name = "a77", | 169 | .llvm_name = "a77", |
| 144 | .flatten = true, | 170 | .flatten = true, |
| 145 | }, | 171 | }, |
| | 172 | .{ |
| | 173 | .llvm_name = "a78", |
| | 174 | .flatten = true, |
| | 175 | }, |
| | 176 | .{ |
| | 177 | .llvm_name = "a78ae", |
| | 178 | .flatten = true, |
| | 179 | }, |
| | 180 | .{ |
| | 181 | .llvm_name = "a78c", |
| | 182 | .flatten = true, |
| | 183 | }, |
| | 184 | .{ |
| | 185 | .llvm_name = "a710", |
| | 186 | .flatten = true, |
| | 187 | }, |
| 146 | .{ | 188 | .{ |
| 147 | .llvm_name = "a715", | 189 | .llvm_name = "a715", |
| 148 | .flatten = true, | 190 | .flatten = true, |
| 149 | }, | 191 | }, |
| | 192 | .{ |
| | 193 | .llvm_name = "a720", |
| | 194 | .flatten = true, |
| | 195 | }, |
| | 196 | .{ |
| | 197 | .llvm_name = "a720ae", |
| | 198 | .flatten = true, |
| | 199 | }, |
| 150 | .{ | 200 | .{ |
| 151 | .llvm_name = "ampere1a", | 201 | .llvm_name = "ampere1a", |
| 152 | .flatten = true, | 202 | .flatten = true, |
| ... | @@ -191,14 +241,30 @@ const llvm_targets = [_]LlvmTarget{ | ... | @@ -191,14 +241,30 @@ const llvm_targets = [_]LlvmTarget{ |
| 191 | .llvm_name = "apple-a7-sysreg", | 241 | .llvm_name = "apple-a7-sysreg", |
| 192 | .flatten = true, | 242 | .flatten = true, |
| 193 | }, | 243 | }, |
| | 244 | .{ |
| | 245 | .llvm_name = "apple-m4", |
| | 246 | .flatten = true, |
| | 247 | }, |
| 194 | .{ | 248 | .{ |
| 195 | .llvm_name = "carmel", | 249 | .llvm_name = "carmel", |
| 196 | .flatten = true, | 250 | .flatten = true, |
| 197 | }, | 251 | }, |
| | 252 | .{ |
| | 253 | .llvm_name = "cortex-a725", |
| | 254 | .flatten = true, |
| | 255 | }, |
| 198 | .{ | 256 | .{ |
| 199 | .llvm_name = "cortex-a78", | 257 | .llvm_name = "cortex-a78", |
| 200 | .flatten = true, | 258 | .flatten = true, |
| 201 | }, | 259 | }, |
| | 260 | .{ |
| | 261 | .llvm_name = "cortex-r82", |
| | 262 | .flatten = true, |
| | 263 | }, |
| | 264 | .{ |
| | 265 | .llvm_name = "cortex-r82ae", |
| | 266 | .flatten = true, |
| | 267 | }, |
| 202 | .{ | 268 | .{ |
| 203 | .llvm_name = "cortex-x1", | 269 | .llvm_name = "cortex-x1", |
| 204 | .flatten = true, | 270 | .flatten = true, |
| ... | @@ -215,15 +281,17 @@ const llvm_targets = [_]LlvmTarget{ | ... | @@ -215,15 +281,17 @@ const llvm_targets = [_]LlvmTarget{ |
| 215 | .llvm_name = "cortex-x4", | 281 | .llvm_name = "cortex-x4", |
| 216 | .flatten = true, | 282 | .flatten = true, |
| 217 | }, | 283 | }, |
| | 284 | .{ |
| | 285 | .llvm_name = "cortex-x925", |
| | 286 | .flatten = true, |
| | 287 | }, |
| 218 | .{ | 288 | .{ |
| 219 | .llvm_name = "falkor", | 289 | .llvm_name = "falkor", |
| 220 | .flatten = true, | 290 | .flatten = true, |
| 221 | .extra_deps = &.{"v8a"}, | | |
| 222 | }, | 291 | }, |
| 223 | .{ | 292 | .{ |
| 224 | .llvm_name = "kryo", | 293 | .llvm_name = "kryo", |
| 225 | .flatten = true, | 294 | .flatten = true, |
| 226 | .extra_deps = &.{"v8a"}, | | |
| 227 | }, | 295 | }, |
| 228 | .{ | 296 | .{ |
| 229 | .llvm_name = "saphira", | 297 | .llvm_name = "saphira", |
| ... | @@ -232,7 +300,6 @@ const llvm_targets = [_]LlvmTarget{ | ... | @@ -232,7 +300,6 @@ const llvm_targets = [_]LlvmTarget{ |
| 232 | .{ | 300 | .{ |
| 233 | .llvm_name = "thunderx", | 301 | .llvm_name = "thunderx", |
| 234 | .flatten = true, | 302 | .flatten = true, |
| 235 | .extra_deps = &.{"v8a"}, | | |
| 236 | }, | 303 | }, |
| 237 | .{ | 304 | .{ |
| 238 | .llvm_name = "thunderx2t99", | 305 | .llvm_name = "thunderx2t99", |
| ... | @@ -245,17 +312,14 @@ const llvm_targets = [_]LlvmTarget{ | ... | @@ -245,17 +312,14 @@ const llvm_targets = [_]LlvmTarget{ |
| 245 | .{ | 312 | .{ |
| 246 | .llvm_name = "thunderxt81", | 313 | .llvm_name = "thunderxt81", |
| 247 | .flatten = true, | 314 | .flatten = true, |
| 248 | .extra_deps = &.{"v8a"}, | | |
| 249 | }, | 315 | }, |
| 250 | .{ | 316 | .{ |
| 251 | .llvm_name = "thunderxt83", | 317 | .llvm_name = "thunderxt83", |
| 252 | .flatten = true, | 318 | .flatten = true, |
| 253 | .extra_deps = &.{"v8a"}, | | |
| 254 | }, | 319 | }, |
| 255 | .{ | 320 | .{ |
| 256 | .llvm_name = "thunderxt88", | 321 | .llvm_name = "thunderxt88", |
| 257 | .flatten = true, | 322 | .flatten = true, |
| 258 | .extra_deps = &.{"v8a"}, | | |
| 259 | }, | 323 | }, |
| 260 | .{ | 324 | .{ |
| 261 | .llvm_name = "tsv110", | 325 | .llvm_name = "tsv110", |
| ... | @@ -308,8 +372,6 @@ const llvm_targets = [_]LlvmTarget{ | ... | @@ -308,8 +372,6 @@ const llvm_targets = [_]LlvmTarget{ |
| 308 | .llvm_name = null, | 372 | .llvm_name = null, |
| 309 | .zig_name = "xgene1", | 373 | .zig_name = "xgene1", |
| 310 | .features = &.{ | 374 | .features = &.{ |
| 311 | "fp_armv8", | | |
| 312 | "neon", | | |
| 313 | "perfmon", | 375 | "perfmon", |
| 314 | "v8a", | 376 | "v8a", |
| 315 | }, | 377 | }, |
| ... | @@ -320,13 +382,16 @@ const llvm_targets = [_]LlvmTarget{ | ... | @@ -320,13 +382,16 @@ const llvm_targets = [_]LlvmTarget{ |
| 320 | .features = &.{ | 382 | .features = &.{ |
| 321 | "crc", | 383 | "crc", |
| 322 | "crypto", | 384 | "crypto", |
| 323 | "fp_armv8", | | |
| 324 | "neon", | | |
| 325 | "perfmon", | 385 | "perfmon", |
| 326 | "v8a", | 386 | "v8a", |
| 327 | }, | 387 | }, |
| 328 | }, | 388 | }, |
| 329 | }, | 389 | }, |
| | 390 | .omit_cpus = &.{ |
| | 391 | // Who thought this alias was a good idea? Upgrade your compiler and suddenly your |
| | 392 | // programs SIGILL because this changed meaning. Brilliant. |
| | 393 | "apple-latest", |
| | 394 | }, |
| 330 | }, | 395 | }, |
| 331 | .{ | 396 | .{ |
| 332 | .zig_name = "amdgpu", | 397 | .zig_name = "amdgpu", |
| ... | @@ -383,10 +448,18 @@ const llvm_targets = [_]LlvmTarget{ | ... | @@ -383,10 +448,18 @@ const llvm_targets = [_]LlvmTarget{ |
| 383 | }, | 448 | }, |
| 384 | }, | 449 | }, |
| 385 | .feature_overrides = &.{ | 450 | .feature_overrides = &.{ |
| | 451 | .{ |
| | 452 | .llvm_name = "exynos", |
| | 453 | .flatten = true, |
| | 454 | }, |
| 386 | .{ | 455 | .{ |
| 387 | .llvm_name = "cortex-a78", | 456 | .llvm_name = "cortex-a78", |
| 388 | .flatten = true, | 457 | .flatten = true, |
| 389 | }, | 458 | }, |
| | 459 | .{ |
| | 460 | .llvm_name = "cortex-a78ae", |
| | 461 | .flatten = true, |
| | 462 | }, |
| 390 | .{ | 463 | .{ |
| 391 | .llvm_name = "cortex-a710", | 464 | .llvm_name = "cortex-a710", |
| 392 | .flatten = true, | 465 | .flatten = true, |
| ... | @@ -420,6 +493,14 @@ const llvm_targets = [_]LlvmTarget{ | ... | @@ -420,6 +493,14 @@ const llvm_targets = [_]LlvmTarget{ |
| 420 | .llvm_name = "cortex-x1c", | 493 | .llvm_name = "cortex-x1c", |
| 421 | .flatten = true, | 494 | .flatten = true, |
| 422 | }, | 495 | }, |
| | 496 | .{ |
| | 497 | .llvm_name = "r4", |
| | 498 | .flatten = true, |
| | 499 | }, |
| | 500 | .{ |
| | 501 | .llvm_name = "r52plus", |
| | 502 | .flatten = true, |
| | 503 | }, |
| 423 | .{ | 504 | .{ |
| 424 | .llvm_name = "r5", | 505 | .llvm_name = "r5", |
| 425 | .flatten = true, | 506 | .flatten = true, |
| ... | @@ -432,6 +513,10 @@ const llvm_targets = [_]LlvmTarget{ | ... | @@ -432,6 +513,10 @@ const llvm_targets = [_]LlvmTarget{ |
| 432 | .llvm_name = "r7", | 513 | .llvm_name = "r7", |
| 433 | .flatten = true, | 514 | .flatten = true, |
| 434 | }, | 515 | }, |
| | 516 | .{ |
| | 517 | .llvm_name = "m3", |
| | 518 | .flatten = true, |
| | 519 | }, |
| 435 | .{ | 520 | .{ |
| 436 | .llvm_name = "m7", | 521 | .llvm_name = "m7", |
| 437 | .flatten = true, | 522 | .flatten = true, |
| ... | @@ -444,6 +529,10 @@ const llvm_targets = [_]LlvmTarget{ | ... | @@ -444,6 +529,10 @@ const llvm_targets = [_]LlvmTarget{ |
| 444 | .llvm_name = "kryo", | 529 | .llvm_name = "kryo", |
| 445 | .flatten = true, | 530 | .flatten = true, |
| 446 | }, | 531 | }, |
| | 532 | .{ |
| | 533 | .llvm_name = "swift", |
| | 534 | .flatten = true, |
| | 535 | }, |
| 447 | .{ | 536 | .{ |
| 448 | .llvm_name = "cortex-x1", | 537 | .llvm_name = "cortex-x1", |
| 449 | .flatten = true, | 538 | .flatten = true, |
| ... | @@ -512,6 +601,10 @@ const llvm_targets = [_]LlvmTarget{ | ... | @@ -512,6 +601,10 @@ const llvm_targets = [_]LlvmTarget{ |
| 512 | .llvm_name = "a75", | 601 | .llvm_name = "a75", |
| 513 | .flatten = true, | 602 | .flatten = true, |
| 514 | }, | 603 | }, |
| | 604 | .{ |
| | 605 | .llvm_name = "a76", |
| | 606 | .flatten = true, |
| | 607 | }, |
| 515 | .{ | 608 | .{ |
| 516 | .llvm_name = "a77", | 609 | .llvm_name = "a77", |
| 517 | .flatten = true, | 610 | .flatten = true, |
| ... | @@ -903,6 +996,7 @@ const llvm_targets = [_]LlvmTarget{ | ... | @@ -903,6 +996,7 @@ const llvm_targets = [_]LlvmTarget{ |
| 903 | .zig_name = "riscv", | 996 | .zig_name = "riscv", |
| 904 | .llvm_name = "RISCV", | 997 | .llvm_name = "RISCV", |
| 905 | .td_name = "RISCV.td", | 998 | .td_name = "RISCV.td", |
| | 999 | .branch_quota = 2000, |
| 906 | .feature_overrides = &.{ | 1000 | .feature_overrides = &.{ |
| 907 | .{ | 1001 | .{ |
| 908 | .llvm_name = "sifive7", | 1002 | .llvm_name = "sifive7", |
| ... | @@ -913,12 +1007,12 @@ const llvm_targets = [_]LlvmTarget{ | ... | @@ -913,12 +1007,12 @@ const llvm_targets = [_]LlvmTarget{ |
| 913 | .{ | 1007 | .{ |
| 914 | .llvm_name = null, | 1008 | .llvm_name = null, |
| 915 | .zig_name = "baseline_rv32", | 1009 | .zig_name = "baseline_rv32", |
| 916 | .features = &.{ "32bit", "a", "c", "d", "f", "m" }, | 1010 | .features = &.{ "32bit", "a", "c", "d", "f", "i", "m" }, |
| 917 | }, | 1011 | }, |
| 918 | .{ | 1012 | .{ |
| 919 | .llvm_name = null, | 1013 | .llvm_name = null, |
| 920 | .zig_name = "baseline_rv64", | 1014 | .zig_name = "baseline_rv64", |
| 921 | .features = &.{ "64bit", "a", "c", "d", "f", "m" }, | 1015 | .features = &.{ "64bit", "a", "c", "d", "f", "i", "m" }, |
| 922 | }, | 1016 | }, |
| 923 | }, | 1017 | }, |
| 924 | }, | 1018 | }, |
| ... | @@ -957,10 +1051,130 @@ const llvm_targets = [_]LlvmTarget{ | ... | @@ -957,10 +1051,130 @@ const llvm_targets = [_]LlvmTarget{ |
| 957 | .llvm_name = "64bit-mode", | 1051 | .llvm_name = "64bit-mode", |
| 958 | .omit = true, | 1052 | .omit = true, |
| 959 | }, | 1053 | }, |
| | 1054 | .{ |
| | 1055 | .llvm_name = "amdfam10", |
| | 1056 | .extra_deps = &.{"3dnowa"}, |
| | 1057 | }, |
| | 1058 | .{ |
| | 1059 | .llvm_name = "athlon", |
| | 1060 | .extra_deps = &.{"3dnowa"}, |
| | 1061 | }, |
| | 1062 | .{ |
| | 1063 | .llvm_name = "athlon64", |
| | 1064 | .extra_deps = &.{"3dnowa"}, |
| | 1065 | }, |
| | 1066 | .{ |
| | 1067 | .llvm_name = "athlon64-sse3", |
| | 1068 | .extra_deps = &.{"3dnowa"}, |
| | 1069 | }, |
| | 1070 | .{ |
| | 1071 | .llvm_name = "athlon-4", |
| | 1072 | .extra_deps = &.{"3dnowa"}, |
| | 1073 | }, |
| | 1074 | .{ |
| | 1075 | .llvm_name = "athlon-fx", |
| | 1076 | .extra_deps = &.{"3dnowa"}, |
| | 1077 | }, |
| | 1078 | .{ |
| | 1079 | .llvm_name = "athlon-mp", |
| | 1080 | .extra_deps = &.{"3dnowa"}, |
| | 1081 | }, |
| | 1082 | .{ |
| | 1083 | .llvm_name = "athlon-tbird", |
| | 1084 | .extra_deps = &.{"3dnowa"}, |
| | 1085 | }, |
| | 1086 | .{ |
| | 1087 | .llvm_name = "athlon-xp", |
| | 1088 | .extra_deps = &.{"3dnowa"}, |
| | 1089 | }, |
| | 1090 | .{ |
| | 1091 | .llvm_name = "barcelona", |
| | 1092 | .extra_deps = &.{"3dnowa"}, |
| | 1093 | }, |
| | 1094 | .{ |
| | 1095 | .llvm_name = "c3", |
| | 1096 | .extra_deps = &.{"3dnow"}, |
| | 1097 | }, |
| | 1098 | .{ |
| | 1099 | .llvm_name = "geode", |
| | 1100 | .extra_deps = &.{"3dnowa"}, |
| | 1101 | }, |
| | 1102 | .{ |
| | 1103 | .llvm_name = "k6-2", |
| | 1104 | .extra_deps = &.{"3dnow"}, |
| | 1105 | }, |
| | 1106 | .{ |
| | 1107 | .llvm_name = "k6-3", |
| | 1108 | .extra_deps = &.{"3dnow"}, |
| | 1109 | }, |
| | 1110 | .{ |
| | 1111 | .llvm_name = "k8", |
| | 1112 | .extra_deps = &.{"3dnowa"}, |
| | 1113 | }, |
| | 1114 | .{ |
| | 1115 | .llvm_name = "k8-sse3", |
| | 1116 | .extra_deps = &.{"3dnowa"}, |
| | 1117 | }, |
| | 1118 | .{ |
| | 1119 | .llvm_name = "knl", |
| | 1120 | .extra_deps = &.{ |
| | 1121 | "avx512er", |
| | 1122 | "avx512pf", |
| | 1123 | "prefetchwt1", |
| | 1124 | }, |
| | 1125 | }, |
| | 1126 | .{ |
| | 1127 | .llvm_name = "knm", |
| | 1128 | .extra_deps = &.{ |
| | 1129 | "avx512er", |
| | 1130 | "avx512pf", |
| | 1131 | "prefetchwt1", |
| | 1132 | }, |
| | 1133 | }, |
| 960 | .{ | 1134 | .{ |
| 961 | .llvm_name = "lakemont", | 1135 | .llvm_name = "lakemont", |
| 962 | .extra_deps = &.{"soft_float"}, | 1136 | .extra_deps = &.{"soft_float"}, |
| 963 | }, | 1137 | }, |
| | 1138 | .{ |
| | 1139 | .llvm_name = "opteron", |
| | 1140 | .extra_deps = &.{"3dnowa"}, |
| | 1141 | }, |
| | 1142 | .{ |
| | 1143 | .llvm_name = "opteron-sse3", |
| | 1144 | .extra_deps = &.{"3dnowa"}, |
| | 1145 | }, |
| | 1146 | .{ |
| | 1147 | .llvm_name = "winchip2", |
| | 1148 | .extra_deps = &.{"3dnow"}, |
| | 1149 | }, |
| | 1150 | }, |
| | 1151 | // Features removed from LLVM |
| | 1152 | .extra_features = &.{ |
| | 1153 | .{ |
| | 1154 | .zig_name = "3dnow", |
| | 1155 | .desc = "Enable 3DNow! instructions", |
| | 1156 | .deps = &.{"mmx"}, |
| | 1157 | }, |
| | 1158 | .{ |
| | 1159 | .zig_name = "3dnowa", |
| | 1160 | .desc = "Enable 3DNow! Athlon instructions", |
| | 1161 | .deps = &.{"3dnow"}, |
| | 1162 | }, |
| | 1163 | .{ |
| | 1164 | .zig_name = "avx512er", |
| | 1165 | .desc = "Enable AVX-512 Exponential and Reciprocal Instructions", |
| | 1166 | .deps = &.{"avx512f"}, |
| | 1167 | }, |
| | 1168 | .{ |
| | 1169 | .zig_name = "avx512pf", |
| | 1170 | .desc = "Enable AVX-512 PreFetch Instructions", |
| | 1171 | .deps = &.{"avx512f"}, |
| | 1172 | }, |
| | 1173 | .{ |
| | 1174 | .zig_name = "prefetchwt1", |
| | 1175 | .desc = "Prefetch with Intent to Write and T1 Hint", |
| | 1176 | .deps = &.{}, |
| | 1177 | }, |
| 964 | }, | 1178 | }, |
| 965 | .omit_cpus = &.{ | 1179 | .omit_cpus = &.{ |
| 966 | // LLVM defines a bunch of dumb aliases with foreach loops in X86.td. | 1180 | // LLVM defines a bunch of dumb aliases with foreach loops in X86.td. |
| ... | @@ -1111,7 +1325,7 @@ fn processOneTarget(job: Job) anyerror!void { | ... | @@ -1111,7 +1325,7 @@ fn processOneTarget(job: Job) anyerror!void { |
| 1111 | const child_result = try std.process.Child.run(.{ | 1325 | const child_result = try std.process.Child.run(.{ |
| 1112 | .allocator = arena, | 1326 | .allocator = arena, |
| 1113 | .argv = &child_args, | 1327 | .argv = &child_args, |
| 1114 | .max_output_bytes = 400 * 1024 * 1024, | 1328 | .max_output_bytes = 500 * 1024 * 1024, |
| 1115 | }); | 1329 | }); |
| 1116 | tblgen_progress.end(); | 1330 | tblgen_progress.end(); |
| 1117 | if (child_result.stderr.len != 0) { | 1331 | if (child_result.stderr.len != 0) { |
| ... | @@ -1138,6 +1352,36 @@ fn processOneTarget(job: Job) anyerror!void { | ... | @@ -1138,6 +1352,36 @@ fn processOneTarget(job: Job) anyerror!void { |
| 1138 | | 1352 | |
| 1139 | const render_progress = progress_node.start("render zig code", 0); | 1353 | const render_progress = progress_node.start("render zig code", 0); |
| 1140 | | 1354 | |
| | 1355 | // So far LLVM has only had a few aliases for the same CPU. |
| | 1356 | var cpu_aliases = std.StringHashMap(std.SegmentedList(struct { |
| | 1357 | llvm: []const u8, |
| | 1358 | zig: []const u8, |
| | 1359 | }, 4)).init(arena); |
| | 1360 | |
| | 1361 | { |
| | 1362 | var it = root_map.iterator(); |
| | 1363 | while (it.next()) |kv| { |
| | 1364 | if (kv.key_ptr.len == 0) continue; |
| | 1365 | if (kv.key_ptr.*[0] == '!') continue; |
| | 1366 | if (kv.value_ptr.* != .object) continue; |
| | 1367 | if (hasSuperclass(&kv.value_ptr.object, "ProcessorAlias")) { |
| | 1368 | // Note that `Name` is actually the alias, while `Alias` is the name that will have |
| | 1369 | // a full `Processor` object defined. |
| | 1370 | const llvm_alias = kv.value_ptr.object.get("Name").?.string; |
| | 1371 | const llvm_name = kv.value_ptr.object.get("Alias").?.string; |
| | 1372 | |
| | 1373 | const gop = try cpu_aliases.getOrPut(try llvmNameToZigName(arena, llvm_name)); |
| | 1374 | |
| | 1375 | if (!gop.found_existing) gop.value_ptr.* = .{}; |
| | 1376 | |
| | 1377 | try gop.value_ptr.append(arena, .{ |
| | 1378 | .llvm = llvm_alias, |
| | 1379 | .zig = try llvmNameToZigName(arena, llvm_alias), |
| | 1380 | }); |
| | 1381 | } |
| | 1382 | } |
| | 1383 | } |
| | 1384 | |
| 1141 | var features_table = std.StringHashMap(Feature).init(arena); | 1385 | var features_table = std.StringHashMap(Feature).init(arena); |
| 1142 | var all_features = std.ArrayList(Feature).init(arena); | 1386 | var all_features = std.ArrayList(Feature).init(arena); |
| 1143 | var all_cpus = std.ArrayList(Cpu).init(arena); | 1387 | var all_cpus = std.ArrayList(Cpu).init(arena); |
| ... | @@ -1184,7 +1428,7 @@ fn processOneTarget(job: Job) anyerror!void { | ... | @@ -1184,7 +1428,7 @@ fn processOneTarget(job: Job) anyerror!void { |
| 1184 | const other_key = imply.object.get("def").?.string; | 1428 | const other_key = imply.object.get("def").?.string; |
| 1185 | const other_obj = &root_map.getPtr(other_key).?.object; | 1429 | const other_obj = &root_map.getPtr(other_key).?.object; |
| 1186 | const other_llvm_name = other_obj.get("Name").?.string; | 1430 | const other_llvm_name = other_obj.get("Name").?.string; |
| 1187 | const other_zig_name = (try llvmNameToZigNameOmit( | 1431 | const other_zig_name = (try llvmFeatureNameToZigNameOmit( |
| 1188 | arena, | 1432 | arena, |
| 1189 | llvm_target, | 1433 | llvm_target, |
| 1190 | other_llvm_name, | 1434 | other_llvm_name, |
| ... | @@ -1241,7 +1485,7 @@ fn processOneTarget(job: Job) anyerror!void { | ... | @@ -1241,7 +1485,7 @@ fn processOneTarget(job: Job) anyerror!void { |
| 1241 | const feature_obj = &root_map.getPtr(feature_key).?.object; | 1485 | const feature_obj = &root_map.getPtr(feature_key).?.object; |
| 1242 | const feature_llvm_name = feature_obj.get("Name").?.string; | 1486 | const feature_llvm_name = feature_obj.get("Name").?.string; |
| 1243 | if (feature_llvm_name.len == 0) continue; | 1487 | if (feature_llvm_name.len == 0) continue; |
| 1244 | const feature_zig_name = (try llvmNameToZigNameOmit( | 1488 | const feature_zig_name = (try llvmFeatureNameToZigNameOmit( |
| 1245 | arena, | 1489 | arena, |
| 1246 | llvm_target, | 1490 | llvm_target, |
| 1247 | feature_llvm_name, | 1491 | feature_llvm_name, |
| ... | @@ -1261,7 +1505,7 @@ fn processOneTarget(job: Job) anyerror!void { | ... | @@ -1261,7 +1505,7 @@ fn processOneTarget(job: Job) anyerror!void { |
| 1261 | const feature_obj = &root_map.getPtr(feature_key).?.object; | 1505 | const feature_obj = &root_map.getPtr(feature_key).?.object; |
| 1262 | const feature_llvm_name = feature_obj.get("Name").?.string; | 1506 | const feature_llvm_name = feature_obj.get("Name").?.string; |
| 1263 | if (feature_llvm_name.len == 0) continue; | 1507 | if (feature_llvm_name.len == 0) continue; |
| 1264 | const feature_zig_name = (try llvmNameToZigNameOmit( | 1508 | const feature_zig_name = (try llvmFeatureNameToZigNameOmit( |
| 1265 | arena, | 1509 | arena, |
| 1266 | llvm_target, | 1510 | llvm_target, |
| 1267 | feature_llvm_name, | 1511 | feature_llvm_name, |
| ... | @@ -1287,6 +1531,22 @@ fn processOneTarget(job: Job) anyerror!void { | ... | @@ -1287,6 +1531,22 @@ fn processOneTarget(job: Job) anyerror!void { |
| 1287 | .zig_name = zig_name, | 1531 | .zig_name = zig_name, |
| 1288 | .features = deps.items, | 1532 | .features = deps.items, |
| 1289 | }); | 1533 | }); |
| | 1534 | |
| | 1535 | if (cpu_aliases.get(zig_name)) |aliases| { |
| | 1536 | var alias_it = aliases.constIterator(0); |
| | 1537 | |
| | 1538 | alias_it: while (alias_it.next()) |alias| { |
| | 1539 | for (llvm_target.omit_cpus) |omit_cpu_name| { |
| | 1540 | if (mem.eql(u8, omit_cpu_name, alias.llvm)) continue :alias_it; |
| | 1541 | } |
| | 1542 | |
| | 1543 | try all_cpus.append(.{ |
| | 1544 | .llvm_name = alias.llvm, |
| | 1545 | .zig_name = alias.zig, |
| | 1546 | .features = deps.items, |
| | 1547 | }); |
| | 1548 | } |
| | 1549 | } |
| 1290 | } | 1550 | } |
| 1291 | } | 1551 | } |
| 1292 | } | 1552 | } |
| ... | @@ -1525,7 +1785,7 @@ fn llvmNameToZigName(arena: mem.Allocator, llvm_name: []const u8) ![]const u8 { | ... | @@ -1525,7 +1785,7 @@ fn llvmNameToZigName(arena: mem.Allocator, llvm_name: []const u8) ![]const u8 { |
| 1525 | return duped; | 1785 | return duped; |
| 1526 | } | 1786 | } |
| 1527 | | 1787 | |
| 1528 | fn llvmNameToZigNameOmit( | 1788 | fn llvmFeatureNameToZigNameOmit( |
| 1529 | arena: mem.Allocator, | 1789 | arena: mem.Allocator, |
| 1530 | llvm_target: LlvmTarget, | 1790 | llvm_target: LlvmTarget, |
| 1531 | llvm_name: []const u8, | 1791 | llvm_name: []const u8, |
Alex Rønne Petersen <alex@alexrp.com> 2024-08-23 01:44:45+02:00
Andrew Kelley <andrew@ziglang.org> 2024-09-19 18:20:21-07:00