| ... | @@ -561,6 +561,8 @@ static void destroy_instruction_src(IrInstSrc *inst) { | ... | @@ -561,6 +561,8 @@ static void destroy_instruction_src(IrInstSrc *inst) { |
| 561 | return heap::c_allocator.destroy(reinterpret_cast<IrInstSrcWasmMemorySize *>(inst)); | 561 | return heap::c_allocator.destroy(reinterpret_cast<IrInstSrcWasmMemorySize *>(inst)); |
| 562 | case IrInstSrcIdWasmMemoryGrow: | 562 | case IrInstSrcIdWasmMemoryGrow: |
| 563 | return heap::c_allocator.destroy(reinterpret_cast<IrInstSrcWasmMemoryGrow *>(inst)); | 563 | return heap::c_allocator.destroy(reinterpret_cast<IrInstSrcWasmMemoryGrow *>(inst)); |
| | 564 | case IrInstSrcIdSrc: |
| | 565 | return heap::c_allocator.destroy(reinterpret_cast<IrInstSrcSrc *>(inst)); |
| 564 | } | 566 | } |
| 565 | zig_unreachable(); | 567 | zig_unreachable(); |
| 566 | } | 568 | } |
| ... | @@ -1627,6 +1629,9 @@ static constexpr IrInstSrcId ir_inst_id(IrInstSrcWasmMemoryGrow *) { | ... | @@ -1627,6 +1629,9 @@ static constexpr IrInstSrcId ir_inst_id(IrInstSrcWasmMemoryGrow *) { |
| 1627 | return IrInstSrcIdWasmMemoryGrow; | 1629 | return IrInstSrcIdWasmMemoryGrow; |
| 1628 | } | 1630 | } |
| 1629 | | 1631 | |
| | 1632 | static constexpr IrInstSrcId ir_inst_id(IrInstSrcSrc *) { |
| | 1633 | return IrInstSrcIdSrc; |
| | 1634 | } |
| 1630 | | 1635 | |
| 1631 | static constexpr IrInstGenId ir_inst_id(IrInstGenDeclVar *) { | 1636 | static constexpr IrInstGenId ir_inst_id(IrInstGenDeclVar *) { |
| 1632 | return IrInstGenIdDeclVar; | 1637 | return IrInstGenIdDeclVar; |
| ... | @@ -5030,6 +5035,11 @@ static IrInstGen *ir_build_wasm_memory_grow_gen(IrAnalyze *ira, IrInst *source_i | ... | @@ -5030,6 +5035,11 @@ static IrInstGen *ir_build_wasm_memory_grow_gen(IrAnalyze *ira, IrInst *source_i |
| 5030 | return &instruction->base; | 5035 | return &instruction->base; |
| 5031 | } | 5036 | } |
| 5032 | | 5037 | |
| | 5038 | static IrInstSrc *ir_build_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) { |
| | 5039 | IrInstSrcSrc *instruction = ir_build_instruction<IrInstSrcSrc>(irb, scope, source_node); |
| | 5040 | |
| | 5041 | return &instruction->base; |
| | 5042 | } |
| 5033 | | 5043 | |
| 5034 | static void ir_count_defers(IrBuilderSrc *irb, Scope *inner_scope, Scope *outer_scope, size_t *results) { | 5044 | static void ir_count_defers(IrBuilderSrc *irb, Scope *inner_scope, Scope *outer_scope, size_t *results) { |
| 5035 | results[ReturnKindUnconditional] = 0; | 5045 | results[ReturnKindUnconditional] = 0; |
| ... | @@ -7450,6 +7460,11 @@ static IrInstSrc *ir_gen_builtin_fn_call(IrBuilderSrc *irb, Scope *scope, AstNod | ... | @@ -7450,6 +7460,11 @@ static IrInstSrc *ir_gen_builtin_fn_call(IrBuilderSrc *irb, Scope *scope, AstNod |
| 7450 | return ir_gen_union_init_expr(irb, scope, node, union_type_inst, name_inst, init_node, | 7460 | return ir_gen_union_init_expr(irb, scope, node, union_type_inst, name_inst, init_node, |
| 7451 | lval, result_loc); | 7461 | lval, result_loc); |
| 7452 | } | 7462 | } |
| | 7463 | case BuiltinFnIdSrc: |
| | 7464 | { |
| | 7465 | IrInstSrc *src_inst = ir_build_src(irb, scope, node); |
| | 7466 | return ir_lval_wrap(irb, scope, src_inst, lval, result_loc); |
| | 7467 | } |
| 7453 | } | 7468 | } |
| 7454 | zig_unreachable(); | 7469 | zig_unreachable(); |
| 7455 | } | 7470 | } |
| ... | @@ -30859,6 +30874,64 @@ static IrInstGen *ir_analyze_instruction_spill_end(IrAnalyze *ira, IrInstSrcSpil | ... | @@ -30859,6 +30874,64 @@ static IrInstGen *ir_analyze_instruction_spill_end(IrAnalyze *ira, IrInstSrcSpil |
| 30859 | return ir_build_spill_end_gen(ira, &instruction->base.base, begin, operand->value->type); | 30874 | return ir_build_spill_end_gen(ira, &instruction->base.base, begin, operand->value->type); |
| 30860 | } | 30875 | } |
| 30861 | | 30876 | |
| | 30877 | static IrInstGen *ir_analyze_instruction_src(IrAnalyze *ira, IrInstSrcSrc *instruction) { |
| | 30878 | ZigFn *fn_entry = scope_fn_entry(instruction->base.base.scope); |
| | 30879 | if (fn_entry == nullptr) { |
| | 30880 | ir_add_error(ira, &instruction->base.base, buf_sprintf("@src outside function")); |
| | 30881 | return ira->codegen->invalid_inst_gen; |
| | 30882 | } |
| | 30883 | |
| | 30884 | ZigType *u8_ptr = get_pointer_to_type_extra( |
| | 30885 | ira->codegen, ira->codegen->builtin_types.entry_u8, |
| | 30886 | true, false, PtrLenUnknown, |
| | 30887 | 0, 0, 0, false); |
| | 30888 | ZigType *u8_slice = get_slice_type(ira->codegen, u8_ptr); |
| | 30889 | |
| | 30890 | ZigType *source_location_type = get_builtin_type(ira->codegen, "SourceLocation"); |
| | 30891 | if (type_resolve(ira->codegen, source_location_type, ResolveStatusSizeKnown)) { |
| | 30892 | zig_unreachable(); |
| | 30893 | } |
| | 30894 | |
| | 30895 | ZigValue *result = ira->codegen->pass1_arena->create<ZigValue>(); |
| | 30896 | result->special = ConstValSpecialStatic; |
| | 30897 | result->type = source_location_type; |
| | 30898 | |
| | 30899 | ZigValue **fields = alloc_const_vals_ptrs(ira->codegen, 4); |
| | 30900 | result->data.x_struct.fields = fields; |
| | 30901 | |
| | 30902 | // file: []const u8 |
| | 30903 | ensure_field_index(source_location_type, "file", 0); |
| | 30904 | fields[0]->special = ConstValSpecialStatic; |
| | 30905 | fields[0]->type = u8_slice; |
| | 30906 | |
| | 30907 | ZigType *import = instruction->base.base.source_node->owner; |
| | 30908 | Buf *path = import->data.structure.root_struct->path; |
| | 30909 | ZigValue *file_name = create_const_str_lit(ira->codegen, path)->data.x_ptr.data.ref.pointee; |
| | 30910 | init_const_slice(ira->codegen, fields[0], file_name, 0, buf_len(path), true); |
| | 30911 | |
| | 30912 | // fn_name: []const u8 |
| | 30913 | ensure_field_index(source_location_type, "fn_name", 1); |
| | 30914 | fields[1]->special = ConstValSpecialStatic; |
| | 30915 | fields[1]->type = u8_slice; |
| | 30916 | |
| | 30917 | ZigValue *fn_name = create_const_str_lit(ira->codegen, &fn_entry->symbol_name)->data.x_ptr.data.ref.pointee; |
| | 30918 | init_const_slice(ira->codegen, fields[1], fn_name, 0, buf_len(&fn_entry->symbol_name), true); |
| | 30919 | |
| | 30920 | // line: u32 |
| | 30921 | ensure_field_index(source_location_type, "line", 2); |
| | 30922 | fields[2]->special = ConstValSpecialStatic; |
| | 30923 | fields[2]->type = ira->codegen->builtin_types.entry_u32; |
| | 30924 | bigint_init_unsigned(&fields[2]->data.x_bigint, instruction->base.base.source_node->line + 1); |
| | 30925 | |
| | 30926 | // column: u32 |
| | 30927 | ensure_field_index(source_location_type, "column", 3); |
| | 30928 | fields[3]->special = ConstValSpecialStatic; |
| | 30929 | fields[3]->type = ira->codegen->builtin_types.entry_u32; |
| | 30930 | bigint_init_unsigned(&fields[3]->data.x_bigint, instruction->base.base.source_node->column + 1); |
| | 30931 | |
| | 30932 | return ir_const_move(ira, &instruction->base.base, result); |
| | 30933 | } |
| | 30934 | |
| 30862 | static IrInstGen *ir_analyze_instruction_base(IrAnalyze *ira, IrInstSrc *instruction) { | 30935 | static IrInstGen *ir_analyze_instruction_base(IrAnalyze *ira, IrInstSrc *instruction) { |
| 30863 | switch (instruction->id) { | 30936 | switch (instruction->id) { |
| 30864 | case IrInstSrcIdInvalid: | 30937 | case IrInstSrcIdInvalid: |
| ... | @@ -31130,6 +31203,8 @@ static IrInstGen *ir_analyze_instruction_base(IrAnalyze *ira, IrInstSrc *instruc | ... | @@ -31130,6 +31203,8 @@ static IrInstGen *ir_analyze_instruction_base(IrAnalyze *ira, IrInstSrc *instruc |
| 31130 | return ir_analyze_instruction_wasm_memory_size(ira, (IrInstSrcWasmMemorySize *)instruction); | 31203 | return ir_analyze_instruction_wasm_memory_size(ira, (IrInstSrcWasmMemorySize *)instruction); |
| 31131 | case IrInstSrcIdWasmMemoryGrow: | 31204 | case IrInstSrcIdWasmMemoryGrow: |
| 31132 | return ir_analyze_instruction_wasm_memory_grow(ira, (IrInstSrcWasmMemoryGrow *)instruction); | 31205 | return ir_analyze_instruction_wasm_memory_grow(ira, (IrInstSrcWasmMemoryGrow *)instruction); |
| | 31206 | case IrInstSrcIdSrc: |
| | 31207 | return ir_analyze_instruction_src(ira, (IrInstSrcSrc *)instruction); |
| 31133 | } | 31208 | } |
| 31134 | zig_unreachable(); | 31209 | zig_unreachable(); |
| 31135 | } | 31210 | } |
| ... | @@ -31525,6 +31600,7 @@ bool ir_inst_src_has_side_effects(IrInstSrc *instruction) { | ... | @@ -31525,6 +31600,7 @@ bool ir_inst_src_has_side_effects(IrInstSrc *instruction) { |
| 31525 | case IrInstSrcIdAlloca: | 31600 | case IrInstSrcIdAlloca: |
| 31526 | case IrInstSrcIdSpillEnd: | 31601 | case IrInstSrcIdSpillEnd: |
| 31527 | case IrInstSrcIdWasmMemorySize: | 31602 | case IrInstSrcIdWasmMemorySize: |
| | 31603 | case IrInstSrcIdSrc: |
| 31528 | return false; | 31604 | return false; |
| 31529 | | 31605 | |
| 31530 | case IrInstSrcIdAsm: | 31606 | case IrInstSrcIdAsm: |