authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2020-01-29 23:33:12-05:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2020-01-29 23:33:12-05:00
loga95dce15ae4bd95cfd2266da51ba860cc6524a1b
treee761ecb74f37ff699d2e1f09d122811b101826e4
parent800ead2810fa573a7e94979e707a14d4e066ef77
parent7ebc624a15c5a01d6bee8eaf9c7487b30ed1904c
signaturelock-open Commit is signed but in an unrecognized format.

Merge remote-tracking branch 'origin/master' into llvm10

95 files changed, 31970 insertions(+), 10652 deletions(-)

doc/langref.html.in+1-1
......@@ -10113,7 +10113,7 @@ Available libcs:
1011310113 The Zig Standard Library ({#syntax#}@import("std"){#endsyntax#}) has architecture, environment, and operating system
1011410114 abstractions, and thus takes additional work to support more platforms.
1011510115 Not all standard library code requires operating system abstractions, however,
10116 so things such as generic data structures work an all above platforms.
10116 so things such as generic data structures work on all above platforms.
1011710117 </p>
1011810118 <p>The current list of targets supported by the Zig Standard Library is:</p>
1011910119 <ul>
lib/std/buffer.zig+3-3
......@@ -57,11 +57,11 @@ pub const Buffer = struct {
5757
5858 /// The caller owns the returned memory. The Buffer becomes null and
5959 /// is safe to `deinit`.
60 pub fn toOwnedSlice(self: *Buffer) []u8 {
60 pub fn toOwnedSlice(self: *Buffer) [:0]u8 {
6161 const allocator = self.list.allocator;
62 const result = allocator.shrink(self.list.items, self.len());
62 const result = self.list.toOwnedSlice();
6363 self.* = initNull(allocator);
64 return result;
64 return result[0 .. result.len - 1 :0];
6565 }
6666
6767 pub fn allocPrint(allocator: *Allocator, comptime format: []const u8, args: var) !Buffer {
lib/std/build.zig+49-1
......@@ -484,6 +484,7 @@ pub const Builder = struct {
484484 .arch = builtin.arch,
485485 .os = builtin.os,
486486 .abi = builtin.abi,
487 .cpu_features = builtin.cpu_features,
487488 },
488489 }).linuxTriple(self.allocator);
489490
......@@ -1148,6 +1149,7 @@ pub const LibExeObjStep = struct {
11481149 name_prefix: []const u8,
11491150 filter: ?[]const u8,
11501151 single_threaded: bool,
1152 code_model: builtin.CodeModel = .default,
11511153
11521154 root_src: ?FileSource,
11531155 out_h_filename: []const u8,
......@@ -1375,6 +1377,7 @@ pub const LibExeObjStep = struct {
13751377 .arch = target_arch,
13761378 .os = target_os,
13771379 .abi = target_abi,
1380 .cpu_features = target_arch.getBaselineCpuFeatures(),
13781381 },
13791382 });
13801383 }
......@@ -1968,11 +1971,56 @@ pub const LibExeObjStep = struct {
19681971 try zig_args.append("-fno-sanitize-c");
19691972 }
19701973
1974 if (self.code_model != .default) {
1975 try zig_args.append("-code-model");
1976 try zig_args.append(@tagName(self.code_model));
1977 }
1978
19711979 switch (self.target) {
19721980 .Native => {},
1973 .Cross => {
1981 .Cross => |cross| {
19741982 try zig_args.append("-target");
19751983 try zig_args.append(self.target.zigTriple(builder.allocator) catch unreachable);
1984
1985 const all_features = self.target.getArch().allFeaturesList();
1986 var populated_cpu_features = cross.cpu_features.cpu.features;
1987 if (self.target.getArch().subArchFeature()) |sub_arch_index| {
1988 populated_cpu_features.addFeature(sub_arch_index);
1989 }
1990 populated_cpu_features.populateDependencies(all_features);
1991
1992 if (populated_cpu_features.eql(cross.cpu_features.features)) {
1993 // The CPU name alone is sufficient.
1994 // If it is the baseline CPU, no command line args are required.
1995 if (cross.cpu_features.cpu != self.target.getArch().getBaselineCpuFeatures().cpu) {
1996 try zig_args.append("-target-cpu");
1997 try zig_args.append(cross.cpu_features.cpu.name);
1998 }
1999 } else {
2000 try zig_args.append("-target-cpu");
2001 try zig_args.append(cross.cpu_features.cpu.name);
2002
2003 try zig_args.append("-target-feature");
2004 var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0);
2005 for (all_features) |feature, i_usize| {
2006 const i = @intCast(Target.Cpu.Feature.Set.Index, i_usize);
2007 const in_cpu_set = populated_cpu_features.isEnabled(i);
2008 const in_actual_set = cross.cpu_features.features.isEnabled(i);
2009 if (in_cpu_set and !in_actual_set) {
2010 try feature_str_buffer.appendByte('-');
2011 try feature_str_buffer.append(feature.name);
2012 try feature_str_buffer.appendByte(',');
2013 } else if (!in_cpu_set and in_actual_set) {
2014 try feature_str_buffer.appendByte('+');
2015 try feature_str_buffer.append(feature.name);
2016 try feature_str_buffer.appendByte(',');
2017 }
2018 }
2019 if (mem.endsWith(u8, feature_str_buffer.toSliceConst(), ",")) {
2020 feature_str_buffer.shrink(feature_str_buffer.len() - 1);
2021 }
2022 try zig_args.append(feature_str_buffer.toSliceConst());
2023 }
19762024 },
19772025 }
19782026
lib/std/builtin.zig+24
......@@ -1,5 +1,8 @@
11pub usingnamespace @import("builtin");
22
3/// Deprecated: use `std.Target`.
4pub const Target = std.Target;
5
36/// Deprecated: use `std.Target.Os`.
47pub const Os = std.Target.Os;
58
......@@ -15,6 +18,12 @@ pub const ObjectFormat = std.Target.ObjectFormat;
1518/// Deprecated: use `std.Target.SubSystem`.
1619pub const SubSystem = std.Target.SubSystem;
1720
21/// Deprecated: use `std.Target.CpuFeatures`.
22pub const CpuFeatures = std.Target.CpuFeatures;
23
24/// Deprecated: use `std.Target.Cpu`.
25pub const Cpu = std.Target.Cpu;
26
1827/// `explicit_subsystem` is missing when the subsystem is automatically detected,
1928/// so Zig standard library has the subsystem detection logic here. This should generally be
2029/// used rather than `explicit_subsystem`.
......@@ -82,6 +91,21 @@ pub const AtomicRmwOp = enum {
8291 Min,
8392};
8493
94/// The code model puts constraints on the location of symbols and the size of code and data.
95/// The selection of a code model is a trade off on speed and restrictions that needs to be selected on a per application basis to meet its requirements.
96/// A slightly more detailed explanation can be found in (for example) the [System V Application Binary Interface (x86_64)](https://github.com/hjl-tools/x86-psABI/wiki/x86-64-psABI-1.0.pdf) 3.5.1.
97///
98/// This data structure is used by the Zig language code generation and
99/// therefore must be kept in sync with the compiler implementation.
100pub const CodeModel = enum {
101 default,
102 tiny,
103 small,
104 kernel,
105 medium,
106 large,
107};
108
85109/// This data structure is used by the Zig language code generation and
86110/// therefore must be kept in sync with the compiler implementation.
87111pub const Mode = enum {
lib/std/c.zig+6
......@@ -2,6 +2,12 @@ const builtin = @import("builtin");
22const std = @import("std");
33const page_size = std.mem.page_size;
44
5pub const tokenizer = @import("c/tokenizer.zig");
6pub const Token = tokenizer.Token;
7pub const Tokenizer = tokenizer.Tokenizer;
8pub const parse = @import("c/parse.zig").parse;
9pub const ast = @import("c/ast.zig");
10
511pub usingnamespace @import("os/bits.zig");
612
713pub usingnamespace switch (builtin.os) {
lib/std/c/ast.zig created+681
......@@ -0,0 +1,681 @@
1const std = @import("std");
2const SegmentedList = std.SegmentedList;
3const Token = std.c.Token;
4const Source = std.c.tokenizer.Source;
5
6pub const TokenIndex = usize;
7
8pub const Tree = struct {
9 tokens: TokenList,
10 sources: SourceList,
11 root_node: *Node.Root,
12 arena_allocator: std.heap.ArenaAllocator,
13 msgs: MsgList,
14
15 pub const SourceList = SegmentedList(Source, 4);
16 pub const TokenList = Source.TokenList;
17 pub const MsgList = SegmentedList(Msg, 0);
18
19 pub fn deinit(self: *Tree) void {
20 // Here we copy the arena allocator into stack memory, because
21 // otherwise it would destroy itself while it was still working.
22 var arena_allocator = self.arena_allocator;
23 arena_allocator.deinit();
24 // self is destroyed
25 }
26
27 pub fn tokenSlice(tree: *Tree, token: TokenIndex) []const u8 {
28 return tree.tokens.at(token).slice();
29 }
30
31 pub fn tokenEql(tree: *Tree, a: TokenIndex, b: TokenIndex) bool {
32 const atok = tree.tokens.at(a);
33 const btok = tree.tokens.at(b);
34 return atok.eql(btok.*);
35 }
36};
37
38pub const Msg = struct {
39 kind: enum {
40 Error,
41 Warning,
42 Note,
43 },
44 inner: Error,
45};
46
47pub const Error = union(enum) {
48 InvalidToken: SingleTokenError("invalid token '{}'"),
49 ExpectedToken: ExpectedToken,
50 ExpectedExpr: SingleTokenError("expected expression, found '{}'"),
51 ExpectedTypeName: SingleTokenError("expected type name, found '{}'"),
52 ExpectedFnBody: SingleTokenError("expected function body, found '{}'"),
53 ExpectedDeclarator: SingleTokenError("expected declarator, found '{}'"),
54 ExpectedInitializer: SingleTokenError("expected initializer, found '{}'"),
55 ExpectedEnumField: SingleTokenError("expected enum field, found '{}'"),
56 ExpectedType: SingleTokenError("expected enum field, found '{}'"),
57 InvalidTypeSpecifier: InvalidTypeSpecifier,
58 InvalidStorageClass: SingleTokenError("invalid storage class, found '{}'"),
59 InvalidDeclarator: SimpleError("invalid declarator"),
60 DuplicateQualifier: SingleTokenError("duplicate type qualifier '{}'"),
61 DuplicateSpecifier: SingleTokenError("duplicate declaration specifier '{}'"),
62 MustUseKwToRefer: MustUseKwToRefer,
63 FnSpecOnNonFn: SingleTokenError("function specifier '{}' on non function"),
64 NothingDeclared: SimpleError("declaration doesn't declare anything"),
65 QualifierIgnored: SingleTokenError("qualifier '{}' ignored"),
66
67 pub fn render(self: *const Error, tree: *Tree, stream: var) !void {
68 switch (self.*) {
69 .InvalidToken => |*x| return x.render(tree, stream),
70 .ExpectedToken => |*x| return x.render(tree, stream),
71 .ExpectedExpr => |*x| return x.render(tree, stream),
72 .ExpectedTypeName => |*x| return x.render(tree, stream),
73 .ExpectedDeclarator => |*x| return x.render(tree, stream),
74 .ExpectedFnBody => |*x| return x.render(tree, stream),
75 .ExpectedInitializer => |*x| return x.render(tree, stream),
76 .ExpectedEnumField => |*x| return x.render(tree, stream),
77 .ExpectedType => |*x| return x.render(tree, stream),
78 .InvalidTypeSpecifier => |*x| return x.render(tree, stream),
79 .InvalidStorageClass => |*x| return x.render(tree, stream),
80 .InvalidDeclarator => |*x| return x.render(tree, stream),
81 .DuplicateQualifier => |*x| return x.render(tree, stream),
82 .DuplicateSpecifier => |*x| return x.render(tree, stream),
83 .MustUseKwToRefer => |*x| return x.render(tree, stream),
84 .FnSpecOnNonFn => |*x| return x.render(tree, stream),
85 .NothingDeclared => |*x| return x.render(tree, stream),
86 .QualifierIgnored => |*x| return x.render(tree, stream),
87 }
88 }
89
90 pub fn loc(self: *const Error) TokenIndex {
91 switch (self.*) {
92 .InvalidToken => |x| return x.token,
93 .ExpectedToken => |x| return x.token,
94 .ExpectedExpr => |x| return x.token,
95 .ExpectedTypeName => |x| return x.token,
96 .ExpectedDeclarator => |x| return x.token,
97 .ExpectedFnBody => |x| return x.token,
98 .ExpectedInitializer => |x| return x.token,
99 .ExpectedEnumField => |x| return x.token,
100 .ExpectedType => |*x| return x.token,
101 .InvalidTypeSpecifier => |x| return x.token,
102 .InvalidStorageClass => |x| return x.token,
103 .InvalidDeclarator => |x| return x.token,
104 .DuplicateQualifier => |x| return x.token,
105 .DuplicateSpecifier => |x| return x.token,
106 .MustUseKwToRefer => |*x| return x.name,
107 .FnSpecOnNonFn => |*x| return x.name,
108 .NothingDeclared => |*x| return x.name,
109 .QualifierIgnored => |*x| return x.name,
110 }
111 }
112
113 pub const ExpectedToken = struct {
114 token: TokenIndex,
115 expected_id: @TagType(Token.Id),
116
117 pub fn render(self: *const ExpectedToken, tree: *Tree, stream: var) !void {
118 const found_token = tree.tokens.at(self.token);
119 if (found_token.id == .Invalid) {
120 return stream.print("expected '{}', found invalid bytes", .{self.expected_id.symbol()});
121 } else {
122 const token_name = found_token.id.symbol();
123 return stream.print("expected '{}', found '{}'", .{ self.expected_id.symbol(), token_name });
124 }
125 }
126 };
127
128 pub const InvalidTypeSpecifier = struct {
129 token: TokenIndex,
130 type_spec: *Node.TypeSpec,
131
132 pub fn render(self: *const ExpectedToken, tree: *Tree, stream: var) !void {
133 try stream.write("invalid type specifier '");
134 try type_spec.spec.print(tree, stream);
135 const token_name = tree.tokens.at(self.token).id.symbol();
136 return stream.print("{}'", .{token_name});
137 }
138 };
139
140 pub const MustUseKwToRefer = struct {
141 kw: TokenIndex,
142 name: TokenIndex,
143
144 pub fn render(self: *const ExpectedToken, tree: *Tree, stream: var) !void {
145 return stream.print("must use '{}' tag to refer to type '{}'", .{ tree.slice(kw), tree.slice(name) });
146 }
147 };
148
149 fn SingleTokenError(comptime msg: []const u8) type {
150 return struct {
151 token: TokenIndex,
152
153 pub fn render(self: *const @This(), tree: *Tree, stream: var) !void {
154 const actual_token = tree.tokens.at(self.token);
155 return stream.print(msg, .{actual_token.id.symbol()});
156 }
157 };
158 }
159
160 fn SimpleError(comptime msg: []const u8) type {
161 return struct {
162 const ThisError = @This();
163
164 token: TokenIndex,
165
166 pub fn render(self: *const ThisError, tokens: *Tree.TokenList, stream: var) !void {
167 return stream.write(msg);
168 }
169 };
170 }
171};
172
173pub const Type = struct {
174 pub const TypeList = std.SegmentedList(*Type, 4);
175 @"const": bool = false,
176 atomic: bool = false,
177 @"volatile": bool = false,
178 restrict: bool = false,
179
180 id: union(enum) {
181 Int: struct {
182 id: Id,
183 is_signed: bool,
184
185 pub const Id = enum {
186 Char,
187 Short,
188 Int,
189 Long,
190 LongLong,
191 };
192 },
193 Float: struct {
194 id: Id,
195
196 pub const Id = enum {
197 Float,
198 Double,
199 LongDouble,
200 };
201 },
202 Pointer: *Type,
203 Function: struct {
204 return_type: *Type,
205 param_types: TypeList,
206 },
207 Typedef: *Type,
208 Record: *Node.RecordType,
209 Enum: *Node.EnumType,
210
211 /// Special case for macro parameters that can be any type.
212 /// Only present if `retain_macros == true`.
213 Macro,
214 },
215};
216
217pub const Node = struct {
218 id: Id,
219
220 pub const Id = enum {
221 Root,
222 EnumField,
223 RecordField,
224 RecordDeclarator,
225 JumpStmt,
226 ExprStmt,
227 LabeledStmt,
228 CompoundStmt,
229 IfStmt,
230 SwitchStmt,
231 WhileStmt,
232 DoStmt,
233 ForStmt,
234 StaticAssert,
235 Declarator,
236 Pointer,
237 FnDecl,
238 Typedef,
239 VarDecl,
240 };
241
242 pub const Root = struct {
243 base: Node = Node{ .id = .Root },
244 decls: DeclList,
245 eof: TokenIndex,
246
247 pub const DeclList = SegmentedList(*Node, 4);
248 };
249
250 pub const DeclSpec = struct {
251 storage_class: union(enum) {
252 Auto: TokenIndex,
253 Extern: TokenIndex,
254 Register: TokenIndex,
255 Static: TokenIndex,
256 Typedef: TokenIndex,
257 None,
258 } = .None,
259 thread_local: ?TokenIndex = null,
260 type_spec: TypeSpec = TypeSpec{},
261 fn_spec: union(enum) {
262 Inline: TokenIndex,
263 Noreturn: TokenIndex,
264 None,
265 } = .None,
266 align_spec: ?struct {
267 alignas: TokenIndex,
268 expr: *Node,
269 rparen: TokenIndex,
270 } = null,
271 };
272
273 pub const TypeSpec = struct {
274 qual: TypeQual = TypeQual{},
275 spec: union(enum) {
276 /// error or default to int
277 None,
278 Void: TokenIndex,
279 Char: struct {
280 sign: ?TokenIndex = null,
281 char: TokenIndex,
282 },
283 Short: struct {
284 sign: ?TokenIndex = null,
285 short: TokenIndex = null,
286 int: ?TokenIndex = null,
287 },
288 Int: struct {
289 sign: ?TokenIndex = null,
290 int: ?TokenIndex = null,
291 },
292 Long: struct {
293 sign: ?TokenIndex = null,
294 long: TokenIndex,
295 longlong: ?TokenIndex = null,
296 int: ?TokenIndex = null,
297 },
298 Float: struct {
299 float: TokenIndex,
300 complex: ?TokenIndex = null,
301 },
302 Double: struct {
303 long: ?TokenIndex = null,
304 double: ?TokenIndex,
305 complex: ?TokenIndex = null,
306 },
307 Bool: TokenIndex,
308 Atomic: struct {
309 atomic: TokenIndex,
310 typename: *Node,
311 rparen: TokenIndex,
312 },
313 Enum: *EnumType,
314 Record: *RecordType,
315 Typedef: struct {
316 sym: TokenIndex,
317 sym_type: *Type,
318 },
319
320 pub fn print(self: *@This(), self: *const @This(), tree: *Tree, stream: var) !void {
321 switch (self.spec) {
322 .None => unreachable,
323 .Void => |index| try stream.write(tree.slice(index)),
324 .Char => |char| {
325 if (char.sign) |s| {
326 try stream.write(tree.slice(s));
327 try stream.writeByte(' ');
328 }
329 try stream.write(tree.slice(char.char));
330 },
331 .Short => |short| {
332 if (short.sign) |s| {
333 try stream.write(tree.slice(s));
334 try stream.writeByte(' ');
335 }
336 try stream.write(tree.slice(short.short));
337 if (short.int) |i| {
338 try stream.writeByte(' ');
339 try stream.write(tree.slice(i));
340 }
341 },
342 .Int => |int| {
343 if (int.sign) |s| {
344 try stream.write(tree.slice(s));
345 try stream.writeByte(' ');
346 }
347 if (int.int) |i| {
348 try stream.writeByte(' ');
349 try stream.write(tree.slice(i));
350 }
351 },
352 .Long => |long| {
353 if (long.sign) |s| {
354 try stream.write(tree.slice(s));
355 try stream.writeByte(' ');
356 }
357 try stream.write(tree.slice(long.long));
358 if (long.longlong) |l| {
359 try stream.writeByte(' ');
360 try stream.write(tree.slice(l));
361 }
362 if (long.int) |i| {
363 try stream.writeByte(' ');
364 try stream.write(tree.slice(i));
365 }
366 },
367 .Float => |float| {
368 try stream.write(tree.slice(float.float));
369 if (float.complex) |c| {
370 try stream.writeByte(' ');
371 try stream.write(tree.slice(c));
372 }
373 },
374 .Double => |double| {
375 if (double.long) |l| {
376 try stream.write(tree.slice(l));
377 try stream.writeByte(' ');
378 }
379 try stream.write(tree.slice(double.double));
380 if (double.complex) |c| {
381 try stream.writeByte(' ');
382 try stream.write(tree.slice(c));
383 }
384 },
385 .Bool => |index| try stream.write(tree.slice(index)),
386 .Typedef => |typedef| try stream.write(tree.slice(typedef.sym)),
387 else => try stream.print("TODO print {}", self.spec),
388 }
389 }
390 } = .None,
391 };
392
393 pub const EnumType = struct {
394 tok: TokenIndex,
395 name: ?TokenIndex,
396 body: ?struct {
397 lbrace: TokenIndex,
398
399 /// always EnumField
400 fields: FieldList,
401 rbrace: TokenIndex,
402 },
403
404 pub const FieldList = Root.DeclList;
405 };
406
407 pub const EnumField = struct {
408 base: Node = Node{ .id = .EnumField },
409 name: TokenIndex,
410 value: ?*Node,
411 };
412
413 pub const RecordType = struct {
414 tok: TokenIndex,
415 kind: enum {
416 Struct,
417 Union,
418 },
419 name: ?TokenIndex,
420 body: ?struct {
421 lbrace: TokenIndex,
422
423 /// RecordField or StaticAssert
424 fields: FieldList,
425 rbrace: TokenIndex,
426 },
427
428 pub const FieldList = Root.DeclList;
429 };
430
431 pub const RecordField = struct {
432 base: Node = Node{ .id = .RecordField },
433 type_spec: TypeSpec,
434 declarators: DeclaratorList,
435 semicolon: TokenIndex,
436
437 pub const DeclaratorList = Root.DeclList;
438 };
439
440 pub const RecordDeclarator = struct {
441 base: Node = Node{ .id = .RecordDeclarator },
442 declarator: ?*Declarator,
443 bit_field_expr: ?*Expr,
444 };
445
446 pub const TypeQual = struct {
447 @"const": ?TokenIndex = null,
448 atomic: ?TokenIndex = null,
449 @"volatile": ?TokenIndex = null,
450 restrict: ?TokenIndex = null,
451 };
452
453 pub const JumpStmt = struct {
454 base: Node = Node{ .id = .JumpStmt },
455 ltoken: TokenIndex,
456 kind: union(enum) {
457 Break,
458 Continue,
459 Return: ?*Node,
460 Goto: TokenIndex,
461 },
462 semicolon: TokenIndex,
463 };
464
465 pub const ExprStmt = struct {
466 base: Node = Node{ .id = .ExprStmt },
467 expr: ?*Expr,
468 semicolon: TokenIndex,
469 };
470
471 pub const LabeledStmt = struct {
472 base: Node = Node{ .id = .LabeledStmt },
473 kind: union(enum) {
474 Label: TokenIndex,
475 Case: TokenIndex,
476 Default: TokenIndex,
477 },
478 stmt: *Node,
479 };
480
481 pub const CompoundStmt = struct {
482 base: Node = Node{ .id = .CompoundStmt },
483 lbrace: TokenIndex,
484 statements: StmtList,
485 rbrace: TokenIndex,
486
487 pub const StmtList = Root.DeclList;
488 };
489
490 pub const IfStmt = struct {
491 base: Node = Node{ .id = .IfStmt },
492 @"if": TokenIndex,
493 cond: *Node,
494 body: *Node,
495 @"else": ?struct {
496 tok: TokenIndex,
497 body: *Node,
498 },
499 };
500
501 pub const SwitchStmt = struct {
502 base: Node = Node{ .id = .SwitchStmt },
503 @"switch": TokenIndex,
504 expr: *Expr,
505 rparen: TokenIndex,
506 stmt: *Node,
507 };
508
509 pub const WhileStmt = struct {
510 base: Node = Node{ .id = .WhileStmt },
511 @"while": TokenIndex,
512 cond: *Expr,
513 rparen: TokenIndex,
514 body: *Node,
515 };
516
517 pub const DoStmt = struct {
518 base: Node = Node{ .id = .DoStmt },
519 do: TokenIndex,
520 body: *Node,
521 @"while": TokenIndex,
522 cond: *Expr,
523 semicolon: TokenIndex,
524 };
525
526 pub const ForStmt = struct {
527 base: Node = Node{ .id = .ForStmt },
528 @"for": TokenIndex,
529 init: ?*Node,
530 cond: ?*Expr,
531 semicolon: TokenIndex,
532 incr: ?*Expr,
533 rparen: TokenIndex,
534 body: *Node,
535 };
536
537 pub const StaticAssert = struct {
538 base: Node = Node{ .id = .StaticAssert },
539 assert: TokenIndex,
540 expr: *Node,
541 semicolon: TokenIndex,
542 };
543
544 pub const Declarator = struct {
545 base: Node = Node{ .id = .Declarator },
546 pointer: ?*Pointer,
547 prefix: union(enum) {
548 None,
549 Identifer: TokenIndex,
550 Complex: struct {
551 lparen: TokenIndex,
552 inner: *Node,
553 rparen: TokenIndex,
554 },
555 },
556 suffix: union(enum) {
557 None,
558 Fn: struct {
559 lparen: TokenIndex,
560 params: Params,
561 rparen: TokenIndex,
562 },
563 Array: Arrays,
564 },
565
566 pub const Arrays = std.SegmentedList(*Array, 2);
567 pub const Params = std.SegmentedList(*Param, 4);
568 };
569
570 pub const Array = struct {
571 lbracket: TokenIndex,
572 inner: union(enum) {
573 Inferred,
574 Unspecified: TokenIndex,
575 Variable: struct {
576 asterisk: ?TokenIndex,
577 static: ?TokenIndex,
578 qual: TypeQual,
579 expr: *Expr,
580 },
581 },
582 rbracket: TokenIndex,
583 };
584
585 pub const Pointer = struct {
586 base: Node = Node{ .id = .Pointer },
587 asterisk: TokenIndex,
588 qual: TypeQual,
589 pointer: ?*Pointer,
590 };
591
592 pub const Param = struct {
593 kind: union(enum) {
594 Variable,
595 Old: TokenIndex,
596 Normal: struct {
597 decl_spec: *DeclSpec,
598 declarator: *Node,
599 },
600 },
601 };
602
603 pub const FnDecl = struct {
604 base: Node = Node{ .id = .FnDecl },
605 decl_spec: DeclSpec,
606 declarator: *Declarator,
607 old_decls: OldDeclList,
608 body: ?*CompoundStmt,
609
610 pub const OldDeclList = SegmentedList(*Node, 0);
611 };
612
613 pub const Typedef = struct {
614 base: Node = Node{ .id = .Typedef },
615 decl_spec: DeclSpec,
616 declarators: DeclaratorList,
617 semicolon: TokenIndex,
618
619 pub const DeclaratorList = Root.DeclList;
620 };
621
622 pub const VarDecl = struct {
623 base: Node = Node{ .id = .VarDecl },
624 decl_spec: DeclSpec,
625 initializers: Initializers,
626 semicolon: TokenIndex,
627
628 pub const Initializers = Root.DeclList;
629 };
630
631 pub const Initialized = struct {
632 base: Node = Node{ .id = Initialized },
633 declarator: *Declarator,
634 eq: TokenIndex,
635 init: Initializer,
636 };
637
638 pub const Initializer = union(enum) {
639 list: struct {
640 initializers: InitializerList,
641 rbrace: TokenIndex,
642 },
643 expr: *Expr,
644 pub const InitializerList = std.SegmentedList(*Initializer, 4);
645 };
646
647 pub const Macro = struct {
648 base: Node = Node{ .id = Macro },
649 kind: union(enum) {
650 Undef: []const u8,
651 Fn: struct {
652 params: []const []const u8,
653 expr: *Expr,
654 },
655 Expr: *Expr,
656 },
657 };
658};
659
660pub const Expr = struct {
661 id: Id,
662 ty: *Type,
663 value: union(enum) {
664 None,
665 },
666
667 pub const Id = enum {
668 Infix,
669 Literal,
670 };
671
672 pub const Infix = struct {
673 base: Expr = Expr{ .id = .Infix },
674 lhs: *Expr,
675 op_token: TokenIndex,
676 op: Op,
677 rhs: *Expr,
678
679 pub const Op = enum {};
680 };
681};
lib/std/c/darwin.zig+3
......@@ -7,7 +7,10 @@ usingnamespace @import("../os/bits.zig");
77
88extern "c" fn __error() *c_int;
99pub extern "c" fn _NSGetExecutablePath(buf: [*]u8, bufsize: *u32) c_int;
10pub extern "c" fn _dyld_image_count() u32;
1011pub extern "c" fn _dyld_get_image_header(image_index: u32) ?*mach_header;
12pub extern "c" fn _dyld_get_image_vmaddr_slide(image_index: u32) usize;
13pub extern "c" fn _dyld_get_image_name(image_index: u32) [*:0]const u8;
1114
1215pub extern "c" fn __getdirentries64(fd: c_int, buf_ptr: [*]u8, buf_len: usize, basep: *i64) isize;
1316
lib/std/c/parse.zig created+1431
......@@ -0,0 +1,1431 @@
1const std = @import("std");
2const mem = std.mem;
3const assert = std.debug.assert;
4const Allocator = std.mem.Allocator;
5const ast = std.c.ast;
6const Node = ast.Node;
7const Type = ast.Type;
8const Tree = ast.Tree;
9const TokenIndex = ast.TokenIndex;
10const Token = std.c.Token;
11const TokenIterator = ast.Tree.TokenList.Iterator;
12
13pub const Error = error{ParseError} || Allocator.Error;
14
15pub const Options = struct {
16 // /// Keep simple macros unexpanded and add the definitions to the ast
17 // retain_macros: bool = false,
18 /// Warning or error
19 warn_as_err: union(enum) {
20 /// All warnings are warnings
21 None,
22
23 /// Some warnings are errors
24 Some: []@TagType(ast.Error),
25
26 /// All warnings are errors
27 All,
28 } = .All,
29};
30
31/// Result should be freed with tree.deinit() when there are
32/// no more references to any of the tokens or nodes.
33pub fn parse(allocator: *Allocator, source: []const u8, options: Options) !*Tree {
34 const tree = blk: {
35 // This block looks unnecessary, but is a "foot-shield" to prevent the SegmentedLists
36 // from being initialized with a pointer to this `arena`, which is created on
37 // the stack. Following code should instead refer to `&tree.arena_allocator`, a
38 // pointer to data which lives safely on the heap and will outlive `parse`.
39 var arena = std.heap.ArenaAllocator.init(allocator);
40 errdefer arena.deinit();
41 const tree = try arena.allocator.create(ast.Tree);
42 tree.* = .{
43 .root_node = undefined,
44 .arena_allocator = arena,
45 .tokens = undefined,
46 .sources = undefined,
47 };
48 break :blk tree;
49 };
50 errdefer tree.deinit();
51 const arena = &tree.arena_allocator.allocator;
52
53 tree.tokens = ast.Tree.TokenList.init(arena);
54 tree.sources = ast.Tree.SourceList.init(arena);
55
56 var tokenizer = std.zig.Tokenizer.init(source);
57 while (true) {
58 const tree_token = try tree.tokens.addOne();
59 tree_token.* = tokenizer.next();
60 if (tree_token.id == .Eof) break;
61 }
62 // TODO preprocess here
63 var it = tree.tokens.iterator(0);
64
65 while (true) {
66 const tok = it.peek().?.id;
67 switch (id) {
68 .LineComment,
69 .MultiLineComment,
70 => {
71 _ = it.next();
72 },
73 else => break,
74 }
75 }
76
77 var parse_arena = std.heap.ArenaAllocator.init(allocator);
78 defer parse_arena.deinit();
79
80 var parser = Parser{
81 .scopes = Parser.SymbolList.init(allocator),
82 .arena = &parse_arena.allocator,
83 .it = &it,
84 .tree = tree,
85 .options = options,
86 };
87 defer parser.symbols.deinit();
88
89 tree.root_node = try parser.root();
90 return tree;
91}
92
93const Parser = struct {
94 arena: *Allocator,
95 it: *TokenIterator,
96 tree: *Tree,
97
98 arena: *Allocator,
99 scopes: ScopeList,
100 options: Options,
101
102 const ScopeList = std.SegmentedLists(Scope);
103 const SymbolList = std.SegmentedLists(Symbol);
104
105 const Scope = struct {
106 kind: ScopeKind,
107 syms: SymbolList,
108 };
109
110 const Symbol = struct {
111 name: []const u8,
112 ty: *Type,
113 };
114
115 const ScopeKind = enum {
116 Block,
117 Loop,
118 Root,
119 Switch,
120 };
121
122 fn pushScope(parser: *Parser, kind: ScopeKind) !void {
123 const new = try parser.scopes.addOne();
124 new.* = .{
125 .kind = kind,
126 .syms = SymbolList.init(parser.arena),
127 };
128 }
129
130 fn popScope(parser: *Parser, len: usize) void {
131 _ = parser.scopes.pop();
132 }
133
134 fn getSymbol(parser: *Parser, tok: TokenIndex) ?*Symbol {
135 const name = parser.tree.tokenSlice(tok);
136 var scope_it = parser.scopes.iterator(parser.scopes.len);
137 while (scope_it.prev()) |scope| {
138 var sym_it = scope.syms.iterator(scope.syms.len);
139 while (sym_it.prev()) |sym| {
140 if (mem.eql(u8, sym.name, name)) {
141 return sym;
142 }
143 }
144 }
145 return null;
146 }
147
148 fn declareSymbol(parser: *Parser, type_spec: Node.TypeSpec, dr: *Node.Declarator) Error!void {
149 return; // TODO
150 }
151
152 /// Root <- ExternalDeclaration* eof
153 fn root(parser: *Parser) Allocator.Error!*Node.Root {
154 try parser.pushScope(.Root);
155 defer parser.popScope();
156 const node = try parser.arena.create(Node.Root);
157 node.* = .{
158 .decls = Node.Root.DeclList.init(parser.arena),
159 .eof = undefined,
160 };
161 while (parser.externalDeclarations() catch |e| switch (e) {
162 error.OutOfMemory => return error.OutOfMemory,
163 error.ParseError => return node,
164 }) |decl| {
165 try node.decls.push(decl);
166 }
167 node.eof = parser.eatToken(.Eof) orelse return node;
168 return node;
169 }
170
171 /// ExternalDeclaration
172 /// <- DeclSpec Declarator OldStyleDecl* CompoundStmt
173 /// / Declaration
174 /// OldStyleDecl <- DeclSpec Declarator (COMMA Declarator)* SEMICOLON
175 fn externalDeclarations(parser: *Parser) !?*Node {
176 return parser.declarationExtra(false);
177 }
178
179 /// Declaration
180 /// <- DeclSpec DeclInit SEMICOLON
181 /// / StaticAssert
182 /// DeclInit <- Declarator (EQUAL Initializer)? (COMMA Declarator (EQUAL Initializer)?)*
183 fn declaration(parser: *Parser) !?*Node {
184 return parser.declarationExtra(true);
185 }
186
187 fn declarationExtra(parser: *Parser, local: bool) !?*Node {
188 if (try parser.staticAssert()) |decl| return decl;
189 const begin = parser.it.index + 1;
190 var ds = Node.DeclSpec{};
191 const got_ds = try parser.declSpec(&ds);
192 if (local and !got_ds) {
193 // not a declaration
194 return null;
195 }
196 switch (ds.storage_class) {
197 .Auto, .Register => |tok| return parser.err(.{
198 .InvalidStorageClass = .{ .token = tok },
199 }),
200 .Typedef => {
201 const node = try parser.arena.create(Node.Typedef);
202 node.* = .{
203 .decl_spec = ds,
204 .declarators = Node.Typedef.DeclaratorList.init(parser.arena),
205 .semicolon = undefined,
206 };
207 while (true) {
208 const dr = @fieldParentPtr(Node.Declarator, "base", (try parser.declarator(.Must)) orelse return parser.err(.{
209 .ExpectedDeclarator = .{ .token = parser.it.index },
210 }));
211 try parser.declareSymbol(ds.type_spec, dr);
212 try node.declarators.push(&dr.base);
213 if (parser.eatToken(.Comma)) |_| {} else break;
214 }
215 return &node.base;
216 },
217 else => {},
218 }
219 var first_dr = try parser.declarator(.Must);
220 if (first_dr != null and declaratorIsFunction(first_dr.?)) {
221 // TODO typedeffed fn proto-only
222 const dr = @fieldParentPtr(Node.Declarator, "base", first_dr.?);
223 try parser.declareSymbol(ds.type_spec, dr);
224 var old_decls = Node.FnDecl.OldDeclList.init(parser.arena);
225 const body = if (parser.eatToken(.Semicolon)) |_|
226 null
227 else blk: {
228 if (local) {
229 // TODO nested function warning
230 }
231 // TODO first_dr.is_old
232 // while (true) {
233 // var old_ds = Node.DeclSpec{};
234 // if (!(try parser.declSpec(&old_ds))) {
235 // // not old decl
236 // break;
237 // }
238 // var old_dr = (try parser.declarator(.Must));
239 // // if (old_dr == null)
240 // // try parser.err(.{
241 // // .NoParamName = .{ .token = parser.it.index },
242 // // });
243 // // try old_decls.push(decl);
244 // }
245 const body_node = (try parser.compoundStmt()) orelse return parser.err(.{
246 .ExpectedFnBody = .{ .token = parser.it.index },
247 });
248 break :blk @fieldParentPtr(Node.CompoundStmt, "base", body_node);
249 };
250
251 const node = try parser.arena.create(Node.FnDecl);
252 node.* = .{
253 .decl_spec = ds,
254 .declarator = dr,
255 .old_decls = old_decls,
256 .body = body,
257 };
258 return &node.base;
259 } else {
260 switch (ds.fn_spec) {
261 .Inline, .Noreturn => |tok| return parser.err(.{
262 .FnSpecOnNonFn = .{ .token = tok },
263 }),
264 else => {},
265 }
266 // TODO threadlocal without static or extern on local variable
267 const node = try parser.arena.create(Node.VarDecl);
268 node.* = .{
269 .decl_spec = ds,
270 .initializers = Node.VarDecl.Initializers.init(parser.arena),
271 .semicolon = undefined,
272 };
273 if (first_dr == null) {
274 node.semicolon = try parser.expectToken(.Semicolon);
275 const ok = switch (ds.type_spec.spec) {
276 .Enum => |e| e.name != null,
277 .Record => |r| r.name != null,
278 else => false,
279 };
280 const q = ds.type_spec.qual;
281 if (!ok)
282 try parser.warn(.{
283 .NothingDeclared = .{ .token = begin },
284 })
285 else if (q.@"const" orelse q.atomic orelse q.@"volatile" orelse q.restrict) |tok|
286 try parser.warn(.{
287 .QualifierIgnored = .{ .token = tok },
288 });
289 return &node.base;
290 }
291 var dr = @fieldParentPtr(Node.Declarator, "base", first_dr.?);
292 while (true) {
293 try parser.declareSymbol(ds.type_spec, dr);
294 if (parser.eatToken(.Equal)) |tok| {
295 try node.initializers.push((try parser.initializer(dr)) orelse return parser.err(.{
296 .ExpectedInitializer = .{ .token = parser.it.index },
297 }));
298 } else
299 try node.initializers.push(&dr.base);
300 if (parser.eatToken(.Comma) != null) break;
301 dr = @fieldParentPtr(Node.Declarator, "base", (try parser.declarator(.Must)) orelse return parser.err(.{
302 .ExpectedDeclarator = .{ .token = parser.it.index },
303 }));
304 }
305 node.semicolon = try parser.expectToken(.Semicolon);
306 return &node.base;
307 }
308 }
309
310 fn declaratorIsFunction(node: *Node) bool {
311 if (node.id != .Declarator) return false;
312 assert(node.id == .Declarator);
313 const dr = @fieldParentPtr(Node.Declarator, "base", node);
314 if (dr.suffix != .Fn) return false;
315 switch (dr.prefix) {
316 .None, .Identifer => return true,
317 .Complex => |inner| {
318 var inner_node = inner.inner;
319 while (true) {
320 if (inner_node.id != .Declarator) return false;
321 assert(inner_node.id == .Declarator);
322 const inner_dr = @fieldParentPtr(Node.Declarator, "base", inner_node);
323 if (inner_dr.pointer != null) return false;
324 switch (inner_dr.prefix) {
325 .None, .Identifer => return true,
326 .Complex => |c| inner_node = c.inner,
327 }
328 }
329 },
330 }
331 }
332
333 /// StaticAssert <- Keyword_static_assert LPAREN ConstExpr COMMA STRINGLITERAL RPAREN SEMICOLON
334 fn staticAssert(parser: *Parser) !?*Node {
335 const tok = parser.eatToken(.Keyword_static_assert) orelse return null;
336 _ = try parser.expectToken(.LParen);
337 const const_expr = (try parser.constExpr()) orelse parser.err(.{
338 .ExpectedExpr = .{ .token = parser.it.index },
339 });
340 _ = try parser.expectToken(.Comma);
341 const str = try parser.expectToken(.StringLiteral);
342 _ = try parser.expectToken(.RParen);
343 const node = try parser.arena.create(Node.StaticAssert);
344 node.* = .{
345 .assert = tok,
346 .expr = const_expr,
347 .semicolon = try parser.expectToken(.Semicolon),
348 };
349 return &node.base;
350 }
351
352 /// DeclSpec <- (StorageClassSpec / TypeSpec / FnSpec / AlignSpec)*
353 /// returns true if any tokens were consumed
354 fn declSpec(parser: *Parser, ds: *Node.DeclSpec) !bool {
355 var got = false;
356 while ((try parser.storageClassSpec(ds)) or (try parser.typeSpec(&ds.type_spec)) or (try parser.fnSpec(ds)) or (try parser.alignSpec(ds))) {
357 got = true;
358 }
359 return got;
360 }
361
362 /// StorageClassSpec
363 /// <- Keyword_typedef / Keyword_extern / Keyword_static / Keyword_thread_local / Keyword_auto / Keyword_register
364 fn storageClassSpec(parser: *Parser, ds: *Node.DeclSpec) !bool {
365 blk: {
366 if (parser.eatToken(.Keyword_typedef)) |tok| {
367 if (ds.storage_class != .None or ds.thread_local != null)
368 break :blk;
369 ds.storage_class = .{ .Typedef = tok };
370 } else if (parser.eatToken(.Keyword_extern)) |tok| {
371 if (ds.storage_class != .None)
372 break :blk;
373 ds.storage_class = .{ .Extern = tok };
374 } else if (parser.eatToken(.Keyword_static)) |tok| {
375 if (ds.storage_class != .None)
376 break :blk;
377 ds.storage_class = .{ .Static = tok };
378 } else if (parser.eatToken(.Keyword_thread_local)) |tok| {
379 switch (ds.storage_class) {
380 .None, .Extern, .Static => {},
381 else => break :blk,
382 }
383 ds.thread_local = tok;
384 } else if (parser.eatToken(.Keyword_auto)) |tok| {
385 if (ds.storage_class != .None or ds.thread_local != null)
386 break :blk;
387 ds.storage_class = .{ .Auto = tok };
388 } else if (parser.eatToken(.Keyword_register)) |tok| {
389 if (ds.storage_class != .None or ds.thread_local != null)
390 break :blk;
391 ds.storage_class = .{ .Register = tok };
392 } else return false;
393 return true;
394 }
395 try parser.warn(.{
396 .DuplicateSpecifier = .{ .token = parser.it.index },
397 });
398 return true;
399 }
400
401 /// TypeSpec
402 /// <- Keyword_void / Keyword_char / Keyword_short / Keyword_int / Keyword_long / Keyword_float / Keyword_double
403 /// / Keyword_signed / Keyword_unsigned / Keyword_bool / Keyword_complex / Keyword_imaginary /
404 /// / Keyword_atomic LPAREN TypeName RPAREN
405 /// / EnumSpec
406 /// / RecordSpec
407 /// / IDENTIFIER // typedef name
408 /// / TypeQual
409 fn typeSpec(parser: *Parser, type_spec: *Node.TypeSpec) !bool {
410 blk: {
411 if (parser.eatToken(.Keyword_void)) |tok| {
412 if (type_spec.spec != .None)
413 break :blk;
414 type_spec.spec = .{ .Void = tok };
415 } else if (parser.eatToken(.Keyword_char)) |tok| {
416 switch (type_spec.spec) {
417 .None => {
418 type_spec.spec = .{
419 .Char = .{
420 .char = tok,
421 },
422 };
423 },
424 .Int => |int| {
425 if (int.int != null)
426 break :blk;
427 type_spec.spec = .{
428 .Char = .{
429 .char = tok,
430 .sign = int.sign,
431 },
432 };
433 },
434 else => break :blk,
435 }
436 } else if (parser.eatToken(.Keyword_short)) |tok| {
437 switch (type_spec.spec) {
438 .None => {
439 type_spec.spec = .{
440 .Short = .{
441 .short = tok,
442 },
443 };
444 },
445 .Int => |int| {
446 if (int.int != null)
447 break :blk;
448 type_spec.spec = .{
449 .Short = .{
450 .short = tok,
451 .sign = int.sign,
452 },
453 };
454 },
455 else => break :blk,
456 }
457 } else if (parser.eatToken(.Keyword_long)) |tok| {
458 switch (type_spec.spec) {
459 .None => {
460 type_spec.spec = .{
461 .Long = .{
462 .long = tok,
463 },
464 };
465 },
466 .Int => |int| {
467 type_spec.spec = .{
468 .Long = .{
469 .long = tok,
470 .sign = int.sign,
471 .int = int.int,
472 },
473 };
474 },
475 .Long => |*long| {
476 if (long.longlong != null)
477 break :blk;
478 long.longlong = tok;
479 },
480 .Double => |*double| {
481 if (double.long != null)
482 break :blk;
483 double.long = tok;
484 },
485 else => break :blk,
486 }
487 } else if (parser.eatToken(.Keyword_int)) |tok| {
488 switch (type_spec.spec) {
489 .None => {
490 type_spec.spec = .{
491 .Int = .{
492 .int = tok,
493 },
494 };
495 },
496 .Short => |*short| {
497 if (short.int != null)
498 break :blk;
499 short.int = tok;
500 },
501 .Int => |*int| {
502 if (int.int != null)
503 break :blk;
504 int.int = tok;
505 },
506 .Long => |*long| {
507 if (long.int != null)
508 break :blk;
509 long.int = tok;
510 },
511 else => break :blk,
512 }
513 } else if (parser.eatToken(.Keyword_signed) orelse parser.eatToken(.Keyword_unsigned)) |tok| {
514 switch (type_spec.spec) {
515 .None => {
516 type_spec.spec = .{
517 .Int = .{
518 .sign = tok,
519 },
520 };
521 },
522 .Char => |*char| {
523 if (char.sign != null)
524 break :blk;
525 char.sign = tok;
526 },
527 .Short => |*short| {
528 if (short.sign != null)
529 break :blk;
530 short.sign = tok;
531 },
532 .Int => |*int| {
533 if (int.sign != null)
534 break :blk;
535 int.sign = tok;
536 },
537 .Long => |*long| {
538 if (long.sign != null)
539 break :blk;
540 long.sign = tok;
541 },
542 else => break :blk,
543 }
544 } else if (parser.eatToken(.Keyword_float)) |tok| {
545 if (type_spec.spec != .None)
546 break :blk;
547 type_spec.spec = .{
548 .Float = .{
549 .float = tok,
550 },
551 };
552 } else if (parser.eatToken(.Keyword_double)) |tok| {
553 if (type_spec.spec != .None)
554 break :blk;
555 type_spec.spec = .{
556 .Double = .{
557 .double = tok,
558 },
559 };
560 } else if (parser.eatToken(.Keyword_complex)) |tok| {
561 switch (type_spec.spec) {
562 .None => {
563 type_spec.spec = .{
564 .Double = .{
565 .complex = tok,
566 .double = null,
567 },
568 };
569 },
570 .Float => |*float| {
571 if (float.complex != null)
572 break :blk;
573 float.complex = tok;
574 },
575 .Double => |*double| {
576 if (double.complex != null)
577 break :blk;
578 double.complex = tok;
579 },
580 else => break :blk,
581 }
582 } else if (parser.eatToken(.Keyword_bool)) |tok| {
583 if (type_spec.spec != .None)
584 break :blk;
585 type_spec.spec = .{ .Bool = tok };
586 } else if (parser.eatToken(.Keyword_atomic)) |tok| {
587 // might be _Atomic qualifier
588 if (parser.eatToken(.LParen)) |_| {
589 if (type_spec.spec != .None)
590 break :blk;
591 const name = (try parser.typeName()) orelse return parser.err(.{
592 .ExpectedTypeName = .{ .token = parser.it.index },
593 });
594 type_spec.spec.Atomic = .{
595 .atomic = tok,
596 .typename = name,
597 .rparen = try parser.expectToken(.RParen),
598 };
599 } else {
600 parser.putBackToken(tok);
601 }
602 } else if (parser.eatToken(.Keyword_enum)) |tok| {
603 if (type_spec.spec != .None)
604 break :blk;
605 type_spec.spec.Enum = try parser.enumSpec(tok);
606 } else if (parser.eatToken(.Keyword_union) orelse parser.eatToken(.Keyword_struct)) |tok| {
607 if (type_spec.spec != .None)
608 break :blk;
609 type_spec.spec.Record = try parser.recordSpec(tok);
610 } else if (parser.eatToken(.Identifier)) |tok| {
611 const ty = parser.getSymbol(tok) orelse {
612 parser.putBackToken(tok);
613 return false;
614 };
615 switch (ty.id) {
616 .Enum => |e| blk: {
617 if (e.name) |some|
618 if (!parser.tree.tokenEql(some, tok))
619 break :blk;
620 return parser.err(.{
621 .MustUseKwToRefer = .{ .kw = e.tok, .name = tok },
622 });
623 },
624 .Record => |r| blk: {
625 if (r.name) |some|
626 if (!parser.tree.tokenEql(some, tok))
627 break :blk;
628 return parser.err(.{
629 .MustUseKwToRefer = .{
630 .kw = r.tok,
631 .name = tok,
632 },
633 });
634 },
635 .Typedef => {
636 type_spec.spec = .{
637 .Typedef = .{
638 .sym = tok,
639 .sym_type = ty,
640 },
641 };
642 return true;
643 },
644 else => {},
645 }
646 parser.putBackToken(tok);
647 return false;
648 }
649 return parser.typeQual(&type_spec.qual);
650 }
651 return parser.err(.{
652 .InvalidTypeSpecifier = .{
653 .token = parser.it.index,
654 .type_spec = type_spec,
655 },
656 });
657 }
658
659 /// TypeQual <- Keyword_const / Keyword_restrict / Keyword_volatile / Keyword_atomic
660 fn typeQual(parser: *Parser, qual: *Node.TypeQual) !bool {
661 blk: {
662 if (parser.eatToken(.Keyword_const)) |tok| {
663 if (qual.@"const" != null)
664 break :blk;
665 qual.@"const" = tok;
666 } else if (parser.eatToken(.Keyword_restrict)) |tok| {
667 if (qual.atomic != null)
668 break :blk;
669 qual.atomic = tok;
670 } else if (parser.eatToken(.Keyword_volatile)) |tok| {
671 if (qual.@"volatile" != null)
672 break :blk;
673 qual.@"volatile" = tok;
674 } else if (parser.eatToken(.Keyword_atomic)) |tok| {
675 if (qual.atomic != null)
676 break :blk;
677 qual.atomic = tok;
678 } else return false;
679 return true;
680 }
681 try parser.warn(.{
682 .DuplicateQualifier = .{ .token = parser.it.index },
683 });
684 return true;
685 }
686
687 /// FnSpec <- Keyword_inline / Keyword_noreturn
688 fn fnSpec(parser: *Parser, ds: *Node.DeclSpec) !bool {
689 blk: {
690 if (parser.eatToken(.Keyword_inline)) |tok| {
691 if (ds.fn_spec != .None)
692 break :blk;
693 ds.fn_spec = .{ .Inline = tok };
694 } else if (parser.eatToken(.Keyword_noreturn)) |tok| {
695 if (ds.fn_spec != .None)
696 break :blk;
697 ds.fn_spec = .{ .Noreturn = tok };
698 } else return false;
699 return true;
700 }
701 try parser.warn(.{
702 .DuplicateSpecifier = .{ .token = parser.it.index },
703 });
704 return true;
705 }
706
707 /// AlignSpec <- Keyword_alignas LPAREN (TypeName / ConstExpr) RPAREN
708 fn alignSpec(parser: *Parser, ds: *Node.DeclSpec) !bool {
709 if (parser.eatToken(.Keyword_alignas)) |tok| {
710 _ = try parser.expectToken(.LParen);
711 const node = (try parser.typeName()) orelse (try parser.constExpr()) orelse parser.err(.{
712 .ExpectedExpr = .{ .token = parser.it.index },
713 });
714 if (ds.align_spec != null) {
715 try parser.warn(.{
716 .DuplicateSpecifier = .{ .token = parser.it.index },
717 });
718 }
719 ds.align_spec = .{
720 .alignas = tok,
721 .expr = node,
722 .rparen = try parser.expectToken(.RParen),
723 };
724 return true;
725 }
726 return false;
727 }
728
729 /// EnumSpec <- Keyword_enum IDENTIFIER? (LBRACE EnumField RBRACE)?
730 fn enumSpec(parser: *Parser, tok: TokenIndex) !*Node.EnumType {
731 const node = try parser.arena.create(Node.EnumType);
732 const name = parser.eatToken(.Identifier);
733 node.* = .{
734 .tok = tok,
735 .name = name,
736 .body = null,
737 };
738 const ty = try parser.arena.create(Type);
739 ty.* = .{
740 .id = .{
741 .Enum = node,
742 },
743 };
744 if (name) |some|
745 try parser.symbols.append(.{
746 .name = parser.tree.tokenSlice(some),
747 .ty = ty,
748 });
749 if (parser.eatToken(.LBrace)) |lbrace| {
750 var fields = Node.EnumType.FieldList.init(parser.arena);
751 try fields.push((try parser.enumField()) orelse return parser.err(.{
752 .ExpectedEnumField = .{ .token = parser.it.index },
753 }));
754 while (parser.eatToken(.Comma)) |_| {
755 try fields.push((try parser.enumField()) orelse break);
756 }
757 node.body = .{
758 .lbrace = lbrace,
759 .fields = fields,
760 .rbrace = try parser.expectToken(.RBrace),
761 };
762 }
763 return node;
764 }
765
766 /// EnumField <- IDENTIFIER (EQUAL ConstExpr)? (COMMA EnumField) COMMA?
767 fn enumField(parser: *Parser) !?*Node {
768 const name = parser.eatToken(.Identifier) orelse return null;
769 const node = try parser.arena.create(Node.EnumField);
770 node.* = .{
771 .name = name,
772 .value = null,
773 };
774 if (parser.eatToken(.Equal)) |eq| {
775 node.value = (try parser.constExpr()) orelse parser.err(.{
776 .ExpectedExpr = .{ .token = parser.it.index },
777 });
778 }
779 return &node.base;
780 }
781
782 /// RecordSpec <- (Keyword_struct / Keyword_union) IDENTIFIER? (LBRACE RecordField+ RBRACE)?
783 fn recordSpec(parser: *Parser, tok: TokenIndex) !*Node.RecordType {
784 const node = try parser.arena.create(Node.RecordType);
785 const name = parser.eatToken(.Identifier);
786 const is_struct = parser.tree.tokenSlice(tok)[0] == 's';
787 node.* = .{
788 .tok = tok,
789 .kind = if (is_struct) .Struct else .Union,
790 .name = name,
791 .body = null,
792 };
793 const ty = try parser.arena.create(Type);
794 ty.* = .{
795 .id = .{
796 .Record = node,
797 },
798 };
799 if (name) |some|
800 try parser.symbols.append(.{
801 .name = parser.tree.tokenSlice(some),
802 .ty = ty,
803 });
804 if (parser.eatToken(.LBrace)) |lbrace| {
805 try parser.pushScope(.Block);
806 defer parser.popScope();
807 var fields = Node.RecordType.FieldList.init(parser.arena);
808 while (true) {
809 if (parser.eatToken(.RBrace)) |rbrace| {
810 node.body = .{
811 .lbrace = lbrace,
812 .fields = fields,
813 .rbrace = rbrace,
814 };
815 break;
816 }
817 try fields.push(try parser.recordField());
818 }
819 }
820 return node;
821 }
822
823 /// RecordField
824 /// <- TypeSpec* (RecordDeclarator (COMMA RecordDeclarator))? SEMICOLON
825 /// \ StaticAssert
826 fn recordField(parser: *Parser) Error!*Node {
827 if (try parser.staticAssert()) |decl| return decl;
828 var got = false;
829 var type_spec = Node.TypeSpec{};
830 while (try parser.typeSpec(&type_spec)) got = true;
831 if (!got)
832 return parser.err(.{
833 .ExpectedType = .{ .token = parser.it.index },
834 });
835 const node = try parser.arena.create(Node.RecordField);
836 node.* = .{
837 .type_spec = type_spec,
838 .declarators = Node.RecordField.DeclaratorList.init(parser.arena),
839 .semicolon = undefined,
840 };
841 while (true) {
842 const rdr = try parser.recordDeclarator();
843 try parser.declareSymbol(type_spec, rdr.declarator);
844 try node.declarators.push(&rdr.base);
845 if (parser.eatToken(.Comma)) |_| {} else break;
846 }
847
848 node.semicolon = try parser.expectToken(.Semicolon);
849 return &node.base;
850 }
851
852 /// TypeName <- TypeSpec* AbstractDeclarator?
853 fn typeName(parser: *Parser) Error!?*Node {
854 @panic("TODO");
855 }
856
857 /// RecordDeclarator <- Declarator? (COLON ConstExpr)?
858 fn recordDeclarator(parser: *Parser) Error!*Node.RecordDeclarator {
859 @panic("TODO");
860 }
861
862 /// Pointer <- ASTERISK TypeQual* Pointer?
863 fn pointer(parser: *Parser) Error!?*Node.Pointer {
864 const asterisk = parser.eatToken(.Asterisk) orelse return null;
865 const node = try parser.arena.create(Node.Pointer);
866 node.* = .{
867 .asterisk = asterisk,
868 .qual = .{},
869 .pointer = null,
870 };
871 while (try parser.typeQual(&node.qual)) {}
872 node.pointer = try parser.pointer();
873 return node;
874 }
875
876 const Named = enum {
877 Must,
878 Allowed,
879 Forbidden,
880 };
881
882 /// Declarator <- Pointer? DeclaratorSuffix
883 /// DeclaratorPrefix
884 /// <- IDENTIFIER // if named != .Forbidden
885 /// / LPAREN Declarator RPAREN
886 /// / (none) // if named != .Must
887 /// DeclaratorSuffix
888 /// <- DeclaratorPrefix (LBRACKET ArrayDeclarator? RBRACKET)*
889 /// / DeclaratorPrefix LPAREN (ParamDecl (COMMA ParamDecl)* (COMMA ELLIPSIS)?)? RPAREN
890 fn declarator(parser: *Parser, named: Named) Error!?*Node {
891 const ptr = try parser.pointer();
892 var node: *Node.Declarator = undefined;
893 var inner_fn = false;
894
895 // TODO sizof(int (int))
896 // prefix
897 if (parser.eatToken(.LParen)) |lparen| {
898 const inner = (try parser.declarator(named)) orelse return parser.err(.{
899 .ExpectedDeclarator = .{ .token = lparen + 1 },
900 });
901 inner_fn = declaratorIsFunction(inner);
902 node = try parser.arena.create(Node.Declarator);
903 node.* = .{
904 .pointer = ptr,
905 .prefix = .{
906 .Complex = .{
907 .lparen = lparen,
908 .inner = inner,
909 .rparen = try parser.expectToken(.RParen),
910 },
911 },
912 .suffix = .None,
913 };
914 } else if (named != .Forbidden) {
915 if (parser.eatToken(.Identifier)) |tok| {
916 node = try parser.arena.create(Node.Declarator);
917 node.* = .{
918 .pointer = ptr,
919 .prefix = .{ .Identifer = tok },
920 .suffix = .None,
921 };
922 } else if (named == .Must) {
923 return parser.err(.{
924 .ExpectedToken = .{ .token = parser.it.index, .expected_id = .Identifier },
925 });
926 } else {
927 if (ptr) |some|
928 return &some.base;
929 return null;
930 }
931 } else {
932 node = try parser.arena.create(Node.Declarator);
933 node.* = .{
934 .pointer = ptr,
935 .prefix = .None,
936 .suffix = .None,
937 };
938 }
939 // suffix
940 if (parser.eatToken(.LParen)) |lparen| {
941 if (inner_fn)
942 return parser.err(.{
943 .InvalidDeclarator = .{ .token = lparen },
944 });
945 node.suffix = .{
946 .Fn = .{
947 .lparen = lparen,
948 .params = Node.Declarator.Params.init(parser.arena),
949 .rparen = undefined,
950 },
951 };
952 try parser.paramDecl(node);
953 node.suffix.Fn.rparen = try parser.expectToken(.RParen);
954 } else if (parser.eatToken(.LBracket)) |tok| {
955 if (inner_fn)
956 return parser.err(.{
957 .InvalidDeclarator = .{ .token = tok },
958 });
959 node.suffix = .{ .Array = Node.Declarator.Arrays.init(parser.arena) };
960 var lbrace = tok;
961 while (true) {
962 try node.suffix.Array.push(try parser.arrayDeclarator(lbrace));
963 if (parser.eatToken(.LBracket)) |t| lbrace = t else break;
964 }
965 }
966 if (parser.eatToken(.LParen) orelse parser.eatToken(.LBracket)) |tok|
967 return parser.err(.{
968 .InvalidDeclarator = .{ .token = tok },
969 });
970 return &node.base;
971 }
972
973 /// ArrayDeclarator
974 /// <- ASTERISK
975 /// / Keyword_static TypeQual* AssignmentExpr
976 /// / TypeQual+ (ASTERISK / Keyword_static AssignmentExpr)
977 /// / TypeQual+ AssignmentExpr?
978 /// / AssignmentExpr
979 fn arrayDeclarator(parser: *Parser, lbracket: TokenIndex) !*Node.Array {
980 const arr = try parser.arena.create(Node.Array);
981 arr.* = .{
982 .lbracket = lbracket,
983 .inner = .Inferred,
984 .rbracket = undefined,
985 };
986 if (parser.eatToken(.Asterisk)) |tok| {
987 arr.inner = .{ .Unspecified = tok };
988 } else {
989 // TODO
990 }
991 arr.rbracket = try parser.expectToken(.RBracket);
992 return arr;
993 }
994
995 /// Params <- ParamDecl (COMMA ParamDecl)* (COMMA ELLIPSIS)?
996 /// ParamDecl <- DeclSpec (Declarator / AbstractDeclarator)
997 fn paramDecl(parser: *Parser, dr: *Node.Declarator) !void {
998 var old_style = false;
999 while (true) {
1000 var ds = Node.DeclSpec{};
1001 if (try parser.declSpec(&ds)) {
1002 //TODO
1003 // TODO try parser.declareSymbol(ds.type_spec, dr);
1004 } else if (parser.eatToken(.Identifier)) |tok| {
1005 old_style = true;
1006 } else if (parser.eatToken(.Ellipsis)) |tok| {
1007 // TODO
1008 }
1009 }
1010 }
1011
1012 /// Expr <- AssignmentExpr (COMMA Expr)*
1013 fn expr(parser: *Parser) Error!?*Expr {
1014 @panic("TODO");
1015 }
1016
1017 /// AssignmentExpr
1018 /// <- ConditionalExpr // TODO recursive?
1019 /// / UnaryExpr (EQUAL / ASTERISKEQUAL / SLASHEQUAL / PERCENTEQUAL / PLUSEQUAL / MINUSEQUA /
1020 /// / ANGLEBRACKETANGLEBRACKETLEFTEQUAL / ANGLEBRACKETANGLEBRACKETRIGHTEQUAL /
1021 /// / AMPERSANDEQUAL / CARETEQUAL / PIPEEQUAL) AssignmentExpr
1022 fn assignmentExpr(parser: *Parser) !?*Expr {
1023 @panic("TODO");
1024 }
1025
1026 /// ConstExpr <- ConditionalExpr
1027 fn constExpr(parser: *Parser) Error!?*Expr {
1028 const start = parser.it.index;
1029 const expression = try parser.conditionalExpr();
1030 if (expression != null and expression.?.value == .None)
1031 return parser.err(.{
1032 .ConsExpr = start,
1033 });
1034 return expression;
1035 }
1036
1037 /// ConditionalExpr <- LogicalOrExpr (QUESTIONMARK Expr COLON ConditionalExpr)?
1038 fn conditionalExpr(parser: *Parser) Error!?*Expr {
1039 @panic("TODO");
1040 }
1041
1042 /// LogicalOrExpr <- LogicalAndExpr (PIPEPIPE LogicalOrExpr)*
1043 fn logicalOrExpr(parser: *Parser) !*Node {
1044 const lhs = (try parser.logicalAndExpr()) orelse return null;
1045 }
1046
1047 /// LogicalAndExpr <- BinOrExpr (AMPERSANDAMPERSAND LogicalAndExpr)*
1048 fn logicalAndExpr(parser: *Parser) !*Node {
1049 @panic("TODO");
1050 }
1051
1052 /// BinOrExpr <- BinXorExpr (PIPE BinOrExpr)*
1053 fn binOrExpr(parser: *Parser) !*Node {
1054 @panic("TODO");
1055 }
1056
1057 /// BinXorExpr <- BinAndExpr (CARET BinXorExpr)*
1058 fn binXorExpr(parser: *Parser) !*Node {
1059 @panic("TODO");
1060 }
1061
1062 /// BinAndExpr <- EqualityExpr (AMPERSAND BinAndExpr)*
1063 fn binAndExpr(parser: *Parser) !*Node {
1064 @panic("TODO");
1065 }
1066
1067 /// EqualityExpr <- ComparisionExpr ((EQUALEQUAL / BANGEQUAL) EqualityExpr)*
1068 fn equalityExpr(parser: *Parser) !*Node {
1069 @panic("TODO");
1070 }
1071
1072 /// ComparisionExpr <- ShiftExpr (ANGLEBRACKETLEFT / ANGLEBRACKETLEFTEQUAL /ANGLEBRACKETRIGHT / ANGLEBRACKETRIGHTEQUAL) ComparisionExpr)*
1073 fn comparisionExpr(parser: *Parser) !*Node {
1074 @panic("TODO");
1075 }
1076
1077 /// ShiftExpr <- AdditiveExpr (ANGLEBRACKETANGLEBRACKETLEFT / ANGLEBRACKETANGLEBRACKETRIGHT) ShiftExpr)*
1078 fn shiftExpr(parser: *Parser) !*Node {
1079 @panic("TODO");
1080 }
1081
1082 /// AdditiveExpr <- MultiplicativeExpr (PLUS / MINUS) AdditiveExpr)*
1083 fn additiveExpr(parser: *Parser) !*Node {
1084 @panic("TODO");
1085 }
1086
1087 /// MultiplicativeExpr <- UnaryExpr (ASTERISK / SLASH / PERCENT) MultiplicativeExpr)*
1088 fn multiplicativeExpr(parser: *Parser) !*Node {
1089 @panic("TODO");
1090 }
1091
1092 /// UnaryExpr
1093 /// <- LPAREN TypeName RPAREN UnaryExpr
1094 /// / Keyword_sizeof LAPERN TypeName RPAREN
1095 /// / Keyword_sizeof UnaryExpr
1096 /// / Keyword_alignof LAPERN TypeName RPAREN
1097 /// / (AMPERSAND / ASTERISK / PLUS / PLUSPLUS / MINUS / MINUSMINUS / TILDE / BANG) UnaryExpr
1098 /// / PrimaryExpr PostFixExpr*
1099 fn unaryExpr(parser: *Parser) !*Node {
1100 @panic("TODO");
1101 }
1102
1103 /// PrimaryExpr
1104 /// <- IDENTIFIER
1105 /// / INTEGERLITERAL / FLOATLITERAL / STRINGLITERAL / CHARLITERAL
1106 /// / LPAREN Expr RPAREN
1107 /// / Keyword_generic LPAREN AssignmentExpr (COMMA Generic)+ RPAREN
1108 fn primaryExpr(parser: *Parser) !*Node {
1109 @panic("TODO");
1110 }
1111
1112 /// Generic
1113 /// <- TypeName COLON AssignmentExpr
1114 /// / Keyword_default COLON AssignmentExpr
1115 fn generic(parser: *Parser) !*Node {
1116 @panic("TODO");
1117 }
1118
1119 /// PostFixExpr
1120 /// <- LPAREN TypeName RPAREN LBRACE Initializers RBRACE
1121 /// / LBRACKET Expr RBRACKET
1122 /// / LPAREN (AssignmentExpr (COMMA AssignmentExpr)*)? RPAREN
1123 /// / (PERIOD / ARROW) IDENTIFIER
1124 /// / (PLUSPLUS / MINUSMINUS)
1125 fn postFixExpr(parser: *Parser) !*Node {
1126 @panic("TODO");
1127 }
1128
1129 /// Initializers <- ((Designator+ EQUAL)? Initializer COMMA)* (Designator+ EQUAL)? Initializer COMMA?
1130 fn initializers(parser: *Parser) !*Node {
1131 @panic("TODO");
1132 }
1133
1134 /// Initializer
1135 /// <- LBRACE Initializers RBRACE
1136 /// / AssignmentExpr
1137 fn initializer(parser: *Parser, dr: *Node.Declarator) Error!?*Node {
1138 @panic("TODO");
1139 }
1140
1141 /// Designator
1142 /// <- LBRACKET ConstExpr RBRACKET
1143 /// / PERIOD IDENTIFIER
1144 fn designator(parser: *Parser) !*Node {
1145 @panic("TODO");
1146 }
1147
1148 /// CompoundStmt <- LBRACE (Declaration / Stmt)* RBRACE
1149 fn compoundStmt(parser: *Parser) Error!?*Node {
1150 const lbrace = parser.eatToken(.LBrace) orelse return null;
1151 try parser.pushScope(.Block);
1152 defer parser.popScope();
1153 const body_node = try parser.arena.create(Node.CompoundStmt);
1154 body_node.* = .{
1155 .lbrace = lbrace,
1156 .statements = Node.CompoundStmt.StmtList.init(parser.arena),
1157 .rbrace = undefined,
1158 };
1159 while (true) {
1160 if (parser.eatToken(.RBRACE)) |rbrace| {
1161 body_node.rbrace = rbrace;
1162 break;
1163 }
1164 try body_node.statements.push((try parser.declaration()) orelse (try parser.stmt()));
1165 }
1166 return &body_node.base;
1167 }
1168
1169 /// Stmt
1170 /// <- CompoundStmt
1171 /// / Keyword_if LPAREN Expr RPAREN Stmt (Keyword_ELSE Stmt)?
1172 /// / Keyword_switch LPAREN Expr RPAREN Stmt
1173 /// / Keyword_while LPAREN Expr RPAREN Stmt
1174 /// / Keyword_do statement Keyword_while LPAREN Expr RPAREN SEMICOLON
1175 /// / Keyword_for LPAREN (Declaration / ExprStmt) ExprStmt Expr? RPAREN Stmt
1176 /// / Keyword_default COLON Stmt
1177 /// / Keyword_case ConstExpr COLON Stmt
1178 /// / Keyword_goto IDENTIFIER SEMICOLON
1179 /// / Keyword_continue SEMICOLON
1180 /// / Keyword_break SEMICOLON
1181 /// / Keyword_return Expr? SEMICOLON
1182 /// / IDENTIFIER COLON Stmt
1183 /// / ExprStmt
1184 fn stmt(parser: *Parser) Error!*Node {
1185 if (try parser.compoundStmt()) |node| return node;
1186 if (parser.eatToken(.Keyword_if)) |tok| {
1187 const node = try parser.arena.create(Node.IfStmt);
1188 _ = try parser.expectToken(.LParen);
1189 node.* = .{
1190 .@"if" = tok,
1191 .cond = (try parser.expr()) orelse return parser.err(.{
1192 .ExpectedExpr = .{ .token = parser.it.index },
1193 }),
1194 .body = undefined,
1195 .@"else" = null,
1196 };
1197 _ = try parser.expectToken(.RParen);
1198 node.body = try parser.stmt();
1199 if (parser.eatToken(.Keyword_else)) |else_tok| {
1200 node.@"else" = .{
1201 .tok = else_tok,
1202 .body = try parser.stmt(),
1203 };
1204 }
1205 return &node.base;
1206 }
1207 if (parser.eatToken(.Keyword_while)) |tok| {
1208 try parser.pushScope(.Loop);
1209 defer parser.popScope();
1210 _ = try parser.expectToken(.LParen);
1211 const cond = (try parser.expr()) orelse return parser.err(.{
1212 .ExpectedExpr = .{ .token = parser.it.index },
1213 });
1214 const rparen = try parser.expectToken(.RParen);
1215 const node = try parser.arena.create(Node.WhileStmt);
1216 node.* = .{
1217 .@"while" = tok,
1218 .cond = cond,
1219 .rparen = rparen,
1220 .body = try parser.stmt(),
1221 .semicolon = try parser.expectToken(.Semicolon),
1222 };
1223 return &node.base;
1224 }
1225 if (parser.eatToken(.Keyword_do)) |tok| {
1226 try parser.pushScope(.Loop);
1227 defer parser.popScope();
1228 const body = try parser.stmt();
1229 _ = try parser.expectToken(.LParen);
1230 const cond = (try parser.expr()) orelse return parser.err(.{
1231 .ExpectedExpr = .{ .token = parser.it.index },
1232 });
1233 _ = try parser.expectToken(.RParen);
1234 const node = try parser.arena.create(Node.DoStmt);
1235 node.* = .{
1236 .do = tok,
1237 .body = body,
1238 .cond = cond,
1239 .@"while" = @"while",
1240 .semicolon = try parser.expectToken(.Semicolon),
1241 };
1242 return &node.base;
1243 }
1244 if (parser.eatToken(.Keyword_for)) |tok| {
1245 try parser.pushScope(.Loop);
1246 defer parser.popScope();
1247 _ = try parser.expectToken(.LParen);
1248 const init = if (try parser.declaration()) |decl| blk: {
1249 // TODO disallow storage class other than auto and register
1250 break :blk decl;
1251 } else try parser.exprStmt();
1252 const cond = try parser.expr();
1253 const semicolon = try parser.expectToken(.Semicolon);
1254 const incr = try parser.expr();
1255 const rparen = try parser.expectToken(.RParen);
1256 const node = try parser.arena.create(Node.ForStmt);
1257 node.* = .{
1258 .@"for" = tok,
1259 .init = init,
1260 .cond = cond,
1261 .semicolon = semicolon,
1262 .incr = incr,
1263 .rparen = rparen,
1264 .body = try parser.stmt(),
1265 };
1266 return &node.base;
1267 }
1268 if (parser.eatToken(.Keyword_switch)) |tok| {
1269 try parser.pushScope(.Switch);
1270 defer parser.popScope();
1271 _ = try parser.expectToken(.LParen);
1272 const switch_expr = try parser.exprStmt();
1273 const rparen = try parser.expectToken(.RParen);
1274 const node = try parser.arena.create(Node.SwitchStmt);
1275 node.* = .{
1276 .@"switch" = tok,
1277 .expr = switch_expr,
1278 .rparen = rparen,
1279 .body = try parser.stmt(),
1280 };
1281 return &node.base;
1282 }
1283 if (parser.eatToken(.Keyword_default)) |tok| {
1284 _ = try parser.expectToken(.Colon);
1285 const node = try parser.arena.create(Node.LabeledStmt);
1286 node.* = .{
1287 .kind = .{ .Default = tok },
1288 .stmt = try parser.stmt(),
1289 };
1290 return &node.base;
1291 }
1292 if (parser.eatToken(.Keyword_case)) |tok| {
1293 _ = try parser.expectToken(.Colon);
1294 const node = try parser.arena.create(Node.LabeledStmt);
1295 node.* = .{
1296 .kind = .{ .Case = tok },
1297 .stmt = try parser.stmt(),
1298 };
1299 return &node.base;
1300 }
1301 if (parser.eatToken(.Keyword_goto)) |tok| {
1302 const node = try parser.arena.create(Node.JumpStmt);
1303 node.* = .{
1304 .ltoken = tok,
1305 .kind = .{ .Goto = tok },
1306 .semicolon = try parser.expectToken(.Semicolon),
1307 };
1308 return &node.base;
1309 }
1310 if (parser.eatToken(.Keyword_continue)) |tok| {
1311 const node = try parser.arena.create(Node.JumpStmt);
1312 node.* = .{
1313 .ltoken = tok,
1314 .kind = .Continue,
1315 .semicolon = try parser.expectToken(.Semicolon),
1316 };
1317 return &node.base;
1318 }
1319 if (parser.eatToken(.Keyword_break)) |tok| {
1320 const node = try parser.arena.create(Node.JumpStmt);
1321 node.* = .{
1322 .ltoken = tok,
1323 .kind = .Break,
1324 .semicolon = try parser.expectToken(.Semicolon),
1325 };
1326 return &node.base;
1327 }
1328 if (parser.eatToken(.Keyword_return)) |tok| {
1329 const node = try parser.arena.create(Node.JumpStmt);
1330 node.* = .{
1331 .ltoken = tok,
1332 .kind = .{ .Return = try parser.expr() },
1333 .semicolon = try parser.expectToken(.Semicolon),
1334 };
1335 return &node.base;
1336 }
1337 if (parser.eatToken(.Identifier)) |tok| {
1338 if (parser.eatToken(.Colon)) |_| {
1339 const node = try parser.arena.create(Node.LabeledStmt);
1340 node.* = .{
1341 .kind = .{ .Label = tok },
1342 .stmt = try parser.stmt(),
1343 };
1344 return &node.base;
1345 }
1346 parser.putBackToken(tok);
1347 }
1348 return parser.exprStmt();
1349 }
1350
1351 /// ExprStmt <- Expr? SEMICOLON
1352 fn exprStmt(parser: *Parser) !*Node {
1353 const node = try parser.arena.create(Node.ExprStmt);
1354 node.* = .{
1355 .expr = try parser.expr(),
1356 .semicolon = try parser.expectToken(.Semicolon),
1357 };
1358 return &node.base;
1359 }
1360
1361 fn eatToken(parser: *Parser, id: @TagType(Token.Id)) ?TokenIndex {
1362 while (true) {
1363 switch ((parser.it.next() orelse return null).id) {
1364 .LineComment, .MultiLineComment, .Nl => continue,
1365 else => |next_id| if (next_id == id) {
1366 return parser.it.index;
1367 } else {
1368 _ = parser.it.prev();
1369 return null;
1370 },
1371 }
1372 }
1373 }
1374
1375 fn expectToken(parser: *Parser, id: @TagType(Token.Id)) Error!TokenIndex {
1376 while (true) {
1377 switch ((parser.it.next() orelse return error.ParseError).id) {
1378 .LineComment, .MultiLineComment, .Nl => continue,
1379 else => |next_id| if (next_id != id) {
1380 return parser.err(.{
1381 .ExpectedToken = .{ .token = parser.it.index, .expected_id = id },
1382 });
1383 } else {
1384 return parser.it.index;
1385 },
1386 }
1387 }
1388 }
1389
1390 fn putBackToken(parser: *Parser, putting_back: TokenIndex) void {
1391 while (true) {
1392 const prev_tok = parser.it.next() orelse return;
1393 switch (prev_tok.id) {
1394 .LineComment, .MultiLineComment, .Nl => continue,
1395 else => {
1396 assert(parser.it.list.at(putting_back) == prev_tok);
1397 return;
1398 },
1399 }
1400 }
1401 }
1402
1403 fn err(parser: *Parser, msg: ast.Error) Error {
1404 try parser.tree.msgs.push(.{
1405 .kind = .Error,
1406 .inner = msg,
1407 });
1408 return error.ParseError;
1409 }
1410
1411 fn warn(parser: *Parser, msg: ast.Error) Error!void {
1412 const is_warning = switch (parser.options.warn_as_err) {
1413 .None => true,
1414 .Some => |list| for (list) |item| (if (item == msg) break false) else true,
1415 .All => false,
1416 };
1417 try parser.tree.msgs.push(.{
1418 .kind = if (is_warning) .Warning else .Error,
1419 .inner = msg,
1420 });
1421 if (!is_warning) return error.ParseError;
1422 }
1423
1424 fn note(parser: *Parser, msg: ast.Error) Error!void {
1425 try parser.tree.msgs.push(.{
1426 .kind = .Note,
1427 .inner = msg,
1428 });
1429 }
1430};
1431
lib/std/c/tokenizer.zig created+1583
......@@ -0,0 +1,1583 @@
1const std = @import("std");
2const mem = std.mem;
3
4pub const Source = struct {
5 buffer: []const u8,
6 file_name: []const u8,
7 tokens: TokenList,
8
9 pub const TokenList = std.SegmentedList(Token, 64);
10};
11
12pub const Token = struct {
13 id: Id,
14 start: usize,
15 end: usize,
16 source: *Source,
17
18 pub const Id = union(enum) {
19 Invalid,
20 Eof,
21 Nl,
22 Identifier,
23
24 /// special case for #include <...>
25 MacroString,
26 StringLiteral: StrKind,
27 CharLiteral: StrKind,
28 IntegerLiteral: NumSuffix,
29 FloatLiteral: NumSuffix,
30 Bang,
31 BangEqual,
32 Pipe,
33 PipePipe,
34 PipeEqual,
35 Equal,
36 EqualEqual,
37 LParen,
38 RParen,
39 LBrace,
40 RBrace,
41 LBracket,
42 RBracket,
43 Period,
44 Ellipsis,
45 Caret,
46 CaretEqual,
47 Plus,
48 PlusPlus,
49 PlusEqual,
50 Minus,
51 MinusMinus,
52 MinusEqual,
53 Asterisk,
54 AsteriskEqual,
55 Percent,
56 PercentEqual,
57 Arrow,
58 Colon,
59 Semicolon,
60 Slash,
61 SlashEqual,
62 Comma,
63 Ampersand,
64 AmpersandAmpersand,
65 AmpersandEqual,
66 QuestionMark,
67 AngleBracketLeft,
68 AngleBracketLeftEqual,
69 AngleBracketAngleBracketLeft,
70 AngleBracketAngleBracketLeftEqual,
71 AngleBracketRight,
72 AngleBracketRightEqual,
73 AngleBracketAngleBracketRight,
74 AngleBracketAngleBracketRightEqual,
75 Tilde,
76 LineComment,
77 MultiLineComment,
78 Hash,
79 HashHash,
80
81 Keyword_auto,
82 Keyword_break,
83 Keyword_case,
84 Keyword_char,
85 Keyword_const,
86 Keyword_continue,
87 Keyword_default,
88 Keyword_do,
89 Keyword_double,
90 Keyword_else,
91 Keyword_enum,
92 Keyword_extern,
93 Keyword_float,
94 Keyword_for,
95 Keyword_goto,
96 Keyword_if,
97 Keyword_int,
98 Keyword_long,
99 Keyword_register,
100 Keyword_return,
101 Keyword_short,
102 Keyword_signed,
103 Keyword_sizeof,
104 Keyword_static,
105 Keyword_struct,
106 Keyword_switch,
107 Keyword_typedef,
108 Keyword_union,
109 Keyword_unsigned,
110 Keyword_void,
111 Keyword_volatile,
112 Keyword_while,
113
114 // ISO C99
115 Keyword_bool,
116 Keyword_complex,
117 Keyword_imaginary,
118 Keyword_inline,
119 Keyword_restrict,
120
121 // ISO C11
122 Keyword_alignas,
123 Keyword_alignof,
124 Keyword_atomic,
125 Keyword_generic,
126 Keyword_noreturn,
127 Keyword_static_assert,
128 Keyword_thread_local,
129
130 // Preprocessor directives
131 Keyword_include,
132 Keyword_define,
133 Keyword_ifdef,
134 Keyword_ifndef,
135 Keyword_error,
136 Keyword_pragma,
137
138 pub fn symbol(id: @TagType(Id)) []const u8 {
139 return switch (id) {
140 .Invalid => "Invalid",
141 .Eof => "Eof",
142 .Nl => "NewLine",
143 .Identifier => "Identifier",
144 .MacroString => "MacroString",
145 .StringLiteral => "StringLiteral",
146 .CharLiteral => "CharLiteral",
147 .IntegerLiteral => "IntegerLiteral",
148 .FloatLiteral => "FloatLiteral",
149 .LineComment => "LineComment",
150 .MultiLineComment => "MultiLineComment",
151
152 .Bang => "!",
153 .BangEqual => "!=",
154 .Pipe => "|",
155 .PipePipe => "||",
156 .PipeEqual => "|=",
157 .Equal => "=",
158 .EqualEqual => "==",
159 .LParen => "(",
160 .RParen => ")",
161 .LBrace => "{",
162 .RBrace => "}",
163 .LBracket => "[",
164 .RBracket => "]",
165 .Period => ".",
166 .Ellipsis => "...",
167 .Caret => "^",
168 .CaretEqual => "^=",
169 .Plus => "+",
170 .PlusPlus => "++",
171 .PlusEqual => "+=",
172 .Minus => "-",
173 .MinusMinus => "--",
174 .MinusEqual => "-=",
175 .Asterisk => "*",
176 .AsteriskEqual => "*=",
177 .Percent => "%",
178 .PercentEqual => "%=",
179 .Arrow => "->",
180 .Colon => ":",
181 .Semicolon => ";",
182 .Slash => "/",
183 .SlashEqual => "/=",
184 .Comma => ",",
185 .Ampersand => "&",
186 .AmpersandAmpersand => "&&",
187 .AmpersandEqual => "&=",
188 .QuestionMark => "?",
189 .AngleBracketLeft => "<",
190 .AngleBracketLeftEqual => "<=",
191 .AngleBracketAngleBracketLeft => "<<",
192 .AngleBracketAngleBracketLeftEqual => "<<=",
193 .AngleBracketRight => ">",
194 .AngleBracketRightEqual => ">=",
195 .AngleBracketAngleBracketRight => ">>",
196 .AngleBracketAngleBracketRightEqual => ">>=",
197 .Tilde => "~",
198 .Hash => "#",
199 .HashHash => "##",
200 .Keyword_auto => "auto",
201 .Keyword_break => "break",
202 .Keyword_case => "case",
203 .Keyword_char => "char",
204 .Keyword_const => "const",
205 .Keyword_continue => "continue",
206 .Keyword_default => "default",
207 .Keyword_do => "do",
208 .Keyword_double => "double",
209 .Keyword_else => "else",
210 .Keyword_enum => "enum",
211 .Keyword_extern => "extern",
212 .Keyword_float => "float",
213 .Keyword_for => "for",
214 .Keyword_goto => "goto",
215 .Keyword_if => "if",
216 .Keyword_int => "int",
217 .Keyword_long => "long",
218 .Keyword_register => "register",
219 .Keyword_return => "return",
220 .Keyword_short => "short",
221 .Keyword_signed => "signed",
222 .Keyword_sizeof => "sizeof",
223 .Keyword_static => "static",
224 .Keyword_struct => "struct",
225 .Keyword_switch => "switch",
226 .Keyword_typedef => "typedef",
227 .Keyword_union => "union",
228 .Keyword_unsigned => "unsigned",
229 .Keyword_void => "void",
230 .Keyword_volatile => "volatile",
231 .Keyword_while => "while",
232 .Keyword_bool => "_Bool",
233 .Keyword_complex => "_Complex",
234 .Keyword_imaginary => "_Imaginary",
235 .Keyword_inline => "inline",
236 .Keyword_restrict => "restrict",
237 .Keyword_alignas => "_Alignas",
238 .Keyword_alignof => "_Alignof",
239 .Keyword_atomic => "_Atomic",
240 .Keyword_generic => "_Generic",
241 .Keyword_noreturn => "_Noreturn",
242 .Keyword_static_assert => "_Static_assert",
243 .Keyword_thread_local => "_Thread_local",
244 .Keyword_include => "include",
245 .Keyword_define => "define",
246 .Keyword_ifdef => "ifdef",
247 .Keyword_ifndef => "ifndef",
248 .Keyword_error => "error",
249 .Keyword_pragma => "pragma",
250 };
251 }
252 };
253
254 pub fn eql(a: Token, b: Token) bool {
255 // do we really need this cast here
256 if (@as(@TagType(Id), a.id) != b.id) return false;
257 return mem.eql(u8, a.slice(), b.slice());
258 }
259
260 pub fn slice(tok: Token) []const u8 {
261 return tok.source.buffer[tok.start..tok.end];
262 }
263
264 pub const Keyword = struct {
265 bytes: []const u8,
266 id: Id,
267 hash: u32,
268
269 fn init(bytes: []const u8, id: Id) Keyword {
270 @setEvalBranchQuota(2000);
271 return .{
272 .bytes = bytes,
273 .id = id,
274 .hash = std.hash_map.hashString(bytes),
275 };
276 }
277 };
278
279 // TODO extensions
280 pub const keywords = [_]Keyword{
281 Keyword.init("auto", .Keyword_auto),
282 Keyword.init("break", .Keyword_break),
283 Keyword.init("case", .Keyword_case),
284 Keyword.init("char", .Keyword_char),
285 Keyword.init("const", .Keyword_const),
286 Keyword.init("continue", .Keyword_continue),
287 Keyword.init("default", .Keyword_default),
288 Keyword.init("do", .Keyword_do),
289 Keyword.init("double", .Keyword_double),
290 Keyword.init("else", .Keyword_else),
291 Keyword.init("enum", .Keyword_enum),
292 Keyword.init("extern", .Keyword_extern),
293 Keyword.init("float", .Keyword_float),
294 Keyword.init("for", .Keyword_for),
295 Keyword.init("goto", .Keyword_goto),
296 Keyword.init("if", .Keyword_if),
297 Keyword.init("int", .Keyword_int),
298 Keyword.init("long", .Keyword_long),
299 Keyword.init("register", .Keyword_register),
300 Keyword.init("return", .Keyword_return),
301 Keyword.init("short", .Keyword_short),
302 Keyword.init("signed", .Keyword_signed),
303 Keyword.init("sizeof", .Keyword_sizeof),
304 Keyword.init("static", .Keyword_static),
305 Keyword.init("struct", .Keyword_struct),
306 Keyword.init("switch", .Keyword_switch),
307 Keyword.init("typedef", .Keyword_typedef),
308 Keyword.init("union", .Keyword_union),
309 Keyword.init("unsigned", .Keyword_unsigned),
310 Keyword.init("void", .Keyword_void),
311 Keyword.init("volatile", .Keyword_volatile),
312 Keyword.init("while", .Keyword_while),
313
314 // ISO C99
315 Keyword.init("_Bool", .Keyword_bool),
316 Keyword.init("_Complex", .Keyword_complex),
317 Keyword.init("_Imaginary", .Keyword_imaginary),
318 Keyword.init("inline", .Keyword_inline),
319 Keyword.init("restrict", .Keyword_restrict),
320
321 // ISO C11
322 Keyword.init("_Alignas", .Keyword_alignas),
323 Keyword.init("_Alignof", .Keyword_alignof),
324 Keyword.init("_Atomic", .Keyword_atomic),
325 Keyword.init("_Generic", .Keyword_generic),
326 Keyword.init("_Noreturn", .Keyword_noreturn),
327 Keyword.init("_Static_assert", .Keyword_static_assert),
328 Keyword.init("_Thread_local", .Keyword_thread_local),
329
330 // Preprocessor directives
331 Keyword.init("include", .Keyword_include),
332 Keyword.init("define", .Keyword_define),
333 Keyword.init("ifdef", .Keyword_ifdef),
334 Keyword.init("ifndef", .Keyword_ifndef),
335 Keyword.init("error", .Keyword_error),
336 Keyword.init("pragma", .Keyword_pragma),
337 };
338
339 // TODO perfect hash at comptime
340 // TODO do this in the preprocessor
341 pub fn getKeyword(bytes: []const u8, pp_directive: bool) ?Id {
342 var hash = std.hash_map.hashString(bytes);
343 for (keywords) |kw| {
344 if (kw.hash == hash and mem.eql(u8, kw.bytes, bytes)) {
345 switch (kw.id) {
346 .Keyword_include,
347 .Keyword_define,
348 .Keyword_ifdef,
349 .Keyword_ifndef,
350 .Keyword_error,
351 .Keyword_pragma,
352 => if (!pp_directive) return null,
353 else => {},
354 }
355 return kw.id;
356 }
357 }
358 return null;
359 }
360
361 pub const NumSuffix = enum {
362 None,
363 F,
364 L,
365 U,
366 LU,
367 LL,
368 LLU,
369 };
370
371 pub const StrKind = enum {
372 None,
373 Wide,
374 Utf8,
375 Utf16,
376 Utf32,
377 };
378};
379
380pub const Tokenizer = struct {
381 source: *Source,
382 index: usize = 0,
383 prev_tok_id: @TagType(Token.Id) = .Invalid,
384 pp_directive: bool = false,
385
386 pub fn next(self: *Tokenizer) Token {
387 const start_index = self.index;
388 var result = Token{
389 .id = .Eof,
390 .start = self.index,
391 .end = undefined,
392 .source = self.source,
393 };
394 var state: enum {
395 Start,
396 Cr,
397 BackSlash,
398 BackSlashCr,
399 u,
400 u8,
401 U,
402 L,
403 StringLiteral,
404 CharLiteralStart,
405 CharLiteral,
406 EscapeSequence,
407 CrEscape,
408 OctalEscape,
409 HexEscape,
410 UnicodeEscape,
411 Identifier,
412 Equal,
413 Bang,
414 Pipe,
415 Percent,
416 Asterisk,
417 Plus,
418
419 /// special case for #include <...>
420 MacroString,
421 AngleBracketLeft,
422 AngleBracketAngleBracketLeft,
423 AngleBracketRight,
424 AngleBracketAngleBracketRight,
425 Caret,
426 Period,
427 Period2,
428 Minus,
429 Slash,
430 Ampersand,
431 Hash,
432 LineComment,
433 MultiLineComment,
434 MultiLineCommentAsterisk,
435 Zero,
436 IntegerLiteralOct,
437 IntegerLiteralBinary,
438 IntegerLiteralHex,
439 IntegerLiteral,
440 IntegerSuffix,
441 IntegerSuffixU,
442 IntegerSuffixL,
443 IntegerSuffixLL,
444 IntegerSuffixUL,
445 FloatFraction,
446 FloatFractionHex,
447 FloatExponent,
448 FloatExponentDigits,
449 FloatSuffix,
450 } = .Start;
451 var string = false;
452 var counter: u32 = 0;
453 while (self.index < self.source.buffer.len) : (self.index += 1) {
454 const c = self.source.buffer[self.index];
455 switch (state) {
456 .Start => switch (c) {
457 '\n' => {
458 self.pp_directive = false;
459 result.id = .Nl;
460 self.index += 1;
461 break;
462 },
463 '\r' => {
464 state = .Cr;
465 },
466 '"' => {
467 result.id = .{ .StringLiteral = .None };
468 state = .StringLiteral;
469 },
470 '\'' => {
471 result.id = .{ .CharLiteral = .None };
472 state = .CharLiteralStart;
473 },
474 'u' => {
475 state = .u;
476 },
477 'U' => {
478 state = .U;
479 },
480 'L' => {
481 state = .L;
482 },
483 'a'...'t', 'v'...'z', 'A'...'K', 'M'...'T', 'V'...'Z', '_' => {
484 state = .Identifier;
485 },
486 '=' => {
487 state = .Equal;
488 },
489 '!' => {
490 state = .Bang;
491 },
492 '|' => {
493 state = .Pipe;
494 },
495 '(' => {
496 result.id = .LParen;
497 self.index += 1;
498 break;
499 },
500 ')' => {
501 result.id = .RParen;
502 self.index += 1;
503 break;
504 },
505 '[' => {
506 result.id = .LBracket;
507 self.index += 1;
508 break;
509 },
510 ']' => {
511 result.id = .RBracket;
512 self.index += 1;
513 break;
514 },
515 ';' => {
516 result.id = .Semicolon;
517 self.index += 1;
518 break;
519 },
520 ',' => {
521 result.id = .Comma;
522 self.index += 1;
523 break;
524 },
525 '?' => {
526 result.id = .QuestionMark;
527 self.index += 1;
528 break;
529 },
530 ':' => {
531 result.id = .Colon;
532 self.index += 1;
533 break;
534 },
535 '%' => {
536 state = .Percent;
537 },
538 '*' => {
539 state = .Asterisk;
540 },
541 '+' => {
542 state = .Plus;
543 },
544 '<' => {
545 if (self.prev_tok_id == .Keyword_include)
546 state = .MacroString
547 else
548 state = .AngleBracketLeft;
549 },
550 '>' => {
551 state = .AngleBracketRight;
552 },
553 '^' => {
554 state = .Caret;
555 },
556 '{' => {
557 result.id = .LBrace;
558 self.index += 1;
559 break;
560 },
561 '}' => {
562 result.id = .RBrace;
563 self.index += 1;
564 break;
565 },
566 '~' => {
567 result.id = .Tilde;
568 self.index += 1;
569 break;
570 },
571 '.' => {
572 state = .Period;
573 },
574 '-' => {
575 state = .Minus;
576 },
577 '/' => {
578 state = .Slash;
579 },
580 '&' => {
581 state = .Ampersand;
582 },
583 '#' => {
584 state = .Hash;
585 },
586 '0' => {
587 state = .Zero;
588 },
589 '1'...'9' => {
590 state = .IntegerLiteral;
591 },
592 '\\' => {
593 state = .BackSlash;
594 },
595 '\t', '\x0B', '\x0C', ' ' => {
596 result.start = self.index + 1;
597 },
598 else => {
599 // TODO handle invalid bytes better
600 result.id = .Invalid;
601 self.index += 1;
602 break;
603 },
604 },
605 .Cr => switch (c) {
606 '\n' => {
607 self.pp_directive = false;
608 result.id = .Nl;
609 self.index += 1;
610 break;
611 },
612 else => {
613 result.id = .Invalid;
614 break;
615 },
616 },
617 .BackSlash => switch (c) {
618 '\n' => {
619 state = .Start;
620 },
621 '\r' => {
622 state = .BackSlashCr;
623 },
624 '\t', '\x0B', '\x0C', ' ' => {
625 // TODO warn
626 },
627 else => {
628 result.id = .Invalid;
629 break;
630 },
631 },
632 .BackSlashCr => switch (c) {
633 '\n' => {
634 state = .Start;
635 },
636 else => {
637 result.id = .Invalid;
638 break;
639 },
640 },
641 .u => switch (c) {
642 '8' => {
643 state = .u8;
644 },
645 '\'' => {
646 result.id = .{ .CharLiteral = .Utf16 };
647 state = .CharLiteralStart;
648 },
649 '\"' => {
650 result.id = .{ .StringLiteral = .Utf16 };
651 state = .StringLiteral;
652 },
653 else => {
654 state = .Identifier;
655 },
656 },
657 .u8 => switch (c) {
658 '\"' => {
659 result.id = .{ .StringLiteral = .Utf8 };
660 state = .StringLiteral;
661 },
662 else => {
663 state = .Identifier;
664 },
665 },
666 .U => switch (c) {
667 '\'' => {
668 result.id = .{ .CharLiteral = .Utf32 };
669 state = .CharLiteralStart;
670 },
671 '\"' => {
672 result.id = .{ .StringLiteral = .Utf32 };
673 state = .StringLiteral;
674 },
675 else => {
676 state = .Identifier;
677 },
678 },
679 .L => switch (c) {
680 '\'' => {
681 result.id = .{ .CharLiteral = .Wide };
682 state = .CharLiteralStart;
683 },
684 '\"' => {
685 result.id = .{ .StringLiteral = .Wide };
686 state = .StringLiteral;
687 },
688 else => {
689 state = .Identifier;
690 },
691 },
692 .StringLiteral => switch (c) {
693 '\\' => {
694 string = true;
695 state = .EscapeSequence;
696 },
697 '"' => {
698 self.index += 1;
699 break;
700 },
701 '\n', '\r' => {
702 result.id = .Invalid;
703 break;
704 },
705 else => {},
706 },
707 .CharLiteralStart => switch (c) {
708 '\\' => {
709 string = false;
710 state = .EscapeSequence;
711 },
712 '\'', '\n' => {
713 result.id = .Invalid;
714 break;
715 },
716 else => {
717 state = .CharLiteral;
718 },
719 },
720 .CharLiteral => switch (c) {
721 '\\' => {
722 string = false;
723 state = .EscapeSequence;
724 },
725 '\'' => {
726 self.index += 1;
727 break;
728 },
729 '\n' => {
730 result.id = .Invalid;
731 break;
732 },
733 else => {},
734 },
735 .EscapeSequence => switch (c) {
736 '\'', '"', '?', '\\', 'a', 'b', 'f', 'n', 'r', 't', 'v', '\n' => {
737 state = if (string) .StringLiteral else .CharLiteral;
738 },
739 '\r' => {
740 state = .CrEscape;
741 },
742 '0'...'7' => {
743 counter = 1;
744 state = .OctalEscape;
745 },
746 'x' => {
747 state = .HexEscape;
748 },
749 'u' => {
750 counter = 4;
751 state = .OctalEscape;
752 },
753 'U' => {
754 counter = 8;
755 state = .OctalEscape;
756 },
757 else => {
758 result.id = .Invalid;
759 break;
760 },
761 },
762 .CrEscape => switch (c) {
763 '\n' => {
764 state = if (string) .StringLiteral else .CharLiteral;
765 },
766 else => {
767 result.id = .Invalid;
768 break;
769 },
770 },
771 .OctalEscape => switch (c) {
772 '0'...'7' => {
773 counter += 1;
774 if (counter == 3) {
775 state = if (string) .StringLiteral else .CharLiteral;
776 }
777 },
778 else => {
779 state = if (string) .StringLiteral else .CharLiteral;
780 },
781 },
782 .HexEscape => switch (c) {
783 '0'...'9', 'a'...'f', 'A'...'F' => {},
784 else => {
785 state = if (string) .StringLiteral else .CharLiteral;
786 },
787 },
788 .UnicodeEscape => switch (c) {
789 '0'...'9', 'a'...'f', 'A'...'F' => {
790 counter -= 1;
791 if (counter == 0) {
792 state = if (string) .StringLiteral else .CharLiteral;
793 }
794 },
795 else => {
796 if (counter != 0) {
797 result.id = .Invalid;
798 break;
799 }
800 state = if (string) .StringLiteral else .CharLiteral;
801 },
802 },
803 .Identifier => switch (c) {
804 'a'...'z', 'A'...'Z', '_', '0'...'9' => {},
805 else => {
806 result.id = Token.getKeyword(self.source.buffer[result.start..self.index], self.prev_tok_id == .Hash and !self.pp_directive) orelse .Identifier;
807 if (self.prev_tok_id == .Hash)
808 self.pp_directive = true;
809 break;
810 },
811 },
812 .Equal => switch (c) {
813 '=' => {
814 result.id = .EqualEqual;
815 self.index += 1;
816 break;
817 },
818 else => {
819 result.id = .Equal;
820 break;
821 },
822 },
823 .Bang => switch (c) {
824 '=' => {
825 result.id = .BangEqual;
826 self.index += 1;
827 break;
828 },
829 else => {
830 result.id = .Bang;
831 break;
832 },
833 },
834 .Pipe => switch (c) {
835 '=' => {
836 result.id = .PipeEqual;
837 self.index += 1;
838 break;
839 },
840 '|' => {
841 result.id = .PipePipe;
842 self.index += 1;
843 break;
844 },
845 else => {
846 result.id = .Pipe;
847 break;
848 },
849 },
850 .Percent => switch (c) {
851 '=' => {
852 result.id = .PercentEqual;
853 self.index += 1;
854 break;
855 },
856 else => {
857 result.id = .Percent;
858 break;
859 },
860 },
861 .Asterisk => switch (c) {
862 '=' => {
863 result.id = .AsteriskEqual;
864 self.index += 1;
865 break;
866 },
867 else => {
868 result.id = .Asterisk;
869 break;
870 },
871 },
872 .Plus => switch (c) {
873 '=' => {
874 result.id = .PlusEqual;
875 self.index += 1;
876 break;
877 },
878 '+' => {
879 result.id = .PlusPlus;
880 self.index += 1;
881 break;
882 },
883 else => {
884 result.id = .Plus;
885 break;
886 },
887 },
888 .MacroString => switch (c) {
889 '>' => {
890 result.id = .MacroString;
891 self.index += 1;
892 break;
893 },
894 else => {},
895 },
896 .AngleBracketLeft => switch (c) {
897 '<' => {
898 state = .AngleBracketAngleBracketLeft;
899 },
900 '=' => {
901 result.id = .AngleBracketLeftEqual;
902 self.index += 1;
903 break;
904 },
905 else => {
906 result.id = .AngleBracketLeft;
907 break;
908 },
909 },
910 .AngleBracketAngleBracketLeft => switch (c) {
911 '=' => {
912 result.id = .AngleBracketAngleBracketLeftEqual;
913 self.index += 1;
914 break;
915 },
916 else => {
917 result.id = .AngleBracketAngleBracketLeft;
918 break;
919 },
920 },
921 .AngleBracketRight => switch (c) {
922 '>' => {
923 state = .AngleBracketAngleBracketRight;
924 },
925 '=' => {
926 result.id = .AngleBracketRightEqual;
927 self.index += 1;
928 break;
929 },
930 else => {
931 result.id = .AngleBracketRight;
932 break;
933 },
934 },
935 .AngleBracketAngleBracketRight => switch (c) {
936 '=' => {
937 result.id = .AngleBracketAngleBracketRightEqual;
938 self.index += 1;
939 break;
940 },
941 else => {
942 result.id = .AngleBracketAngleBracketRight;
943 break;
944 },
945 },
946 .Caret => switch (c) {
947 '=' => {
948 result.id = .CaretEqual;
949 self.index += 1;
950 break;
951 },
952 else => {
953 result.id = .Caret;
954 break;
955 },
956 },
957 .Period => switch (c) {
958 '.' => {
959 state = .Period2;
960 },
961 '0'...'9' => {
962 state = .FloatFraction;
963 },
964 else => {
965 result.id = .Period;
966 break;
967 },
968 },
969 .Period2 => switch (c) {
970 '.' => {
971 result.id = .Ellipsis;
972 self.index += 1;
973 break;
974 },
975 else => {
976 result.id = .Period;
977 self.index -= 1;
978 break;
979 },
980 },
981 .Minus => switch (c) {
982 '>' => {
983 result.id = .Arrow;
984 self.index += 1;
985 break;
986 },
987 '=' => {
988 result.id = .MinusEqual;
989 self.index += 1;
990 break;
991 },
992 '-' => {
993 result.id = .MinusMinus;
994 self.index += 1;
995 break;
996 },
997 else => {
998 result.id = .Minus;
999 break;
1000 },
1001 },
1002 .Slash => switch (c) {
1003 '/' => {
1004 state = .LineComment;
1005 },
1006 '*' => {
1007 state = .MultiLineComment;
1008 },
1009 '=' => {
1010 result.id = .SlashEqual;
1011 self.index += 1;
1012 break;
1013 },
1014 else => {
1015 result.id = .Slash;
1016 break;
1017 },
1018 },
1019 .Ampersand => switch (c) {
1020 '&' => {
1021 result.id = .AmpersandAmpersand;
1022 self.index += 1;
1023 break;
1024 },
1025 '=' => {
1026 result.id = .AmpersandEqual;
1027 self.index += 1;
1028 break;
1029 },
1030 else => {
1031 result.id = .Ampersand;
1032 break;
1033 },
1034 },
1035 .Hash => switch (c) {
1036 '#' => {
1037 result.id = .HashHash;
1038 self.index += 1;
1039 break;
1040 },
1041 else => {
1042 result.id = .Hash;
1043 break;
1044 },
1045 },
1046 .LineComment => switch (c) {
1047 '\n' => {
1048 result.id = .LineComment;
1049 self.index += 1;
1050 break;
1051 },
1052 else => {},
1053 },
1054 .MultiLineComment => switch (c) {
1055 '*' => {
1056 state = .MultiLineCommentAsterisk;
1057 },
1058 else => {},
1059 },
1060 .MultiLineCommentAsterisk => switch (c) {
1061 '/' => {
1062 result.id = .MultiLineComment;
1063 self.index += 1;
1064 break;
1065 },
1066 else => {
1067 state = .MultiLineComment;
1068 },
1069 },
1070 .Zero => switch (c) {
1071 '0'...'9' => {
1072 state = .IntegerLiteralOct;
1073 },
1074 'b', 'B' => {
1075 state = .IntegerLiteralBinary;
1076 },
1077 'x', 'X' => {
1078 state = .IntegerLiteralHex;
1079 },
1080 else => {
1081 state = .IntegerSuffix;
1082 self.index -= 1;
1083 },
1084 },
1085 .IntegerLiteralOct => switch (c) {
1086 '0'...'7' => {},
1087 else => {
1088 state = .IntegerSuffix;
1089 self.index -= 1;
1090 },
1091 },
1092 .IntegerLiteralBinary => switch (c) {
1093 '0', '1' => {},
1094 else => {
1095 state = .IntegerSuffix;
1096 self.index -= 1;
1097 },
1098 },
1099 .IntegerLiteralHex => switch (c) {
1100 '0'...'9', 'a'...'f', 'A'...'F' => {},
1101 '.' => {
1102 state = .FloatFractionHex;
1103 },
1104 'p', 'P' => {
1105 state = .FloatExponent;
1106 },
1107 else => {
1108 state = .IntegerSuffix;
1109 self.index -= 1;
1110 },
1111 },
1112 .IntegerLiteral => switch (c) {
1113 '0'...'9' => {},
1114 '.' => {
1115 state = .FloatFraction;
1116 },
1117 'e', 'E' => {
1118 state = .FloatExponent;
1119 },
1120 else => {
1121 state = .IntegerSuffix;
1122 self.index -= 1;
1123 },
1124 },
1125 .IntegerSuffix => switch (c) {
1126 'u', 'U' => {
1127 state = .IntegerSuffixU;
1128 },
1129 'l', 'L' => {
1130 state = .IntegerSuffixL;
1131 },
1132 else => {
1133 result.id = .{ .IntegerLiteral = .None };
1134 break;
1135 },
1136 },
1137 .IntegerSuffixU => switch (c) {
1138 'l', 'L' => {
1139 state = .IntegerSuffixUL;
1140 },
1141 else => {
1142 result.id = .{ .IntegerLiteral = .U };
1143 break;
1144 },
1145 },
1146 .IntegerSuffixL => switch (c) {
1147 'l', 'L' => {
1148 state = .IntegerSuffixLL;
1149 },
1150 'u', 'U' => {
1151 result.id = .{ .IntegerLiteral = .LU };
1152 self.index += 1;
1153 break;
1154 },
1155 else => {
1156 result.id = .{ .IntegerLiteral = .L };
1157 break;
1158 },
1159 },
1160 .IntegerSuffixLL => switch (c) {
1161 'u', 'U' => {
1162 result.id = .{ .IntegerLiteral = .LLU };
1163 self.index += 1;
1164 break;
1165 },
1166 else => {
1167 result.id = .{ .IntegerLiteral = .LL };
1168 break;
1169 },
1170 },
1171 .IntegerSuffixUL => switch (c) {
1172 'l', 'L' => {
1173 result.id = .{ .IntegerLiteral = .LLU };
1174 self.index += 1;
1175 break;
1176 },
1177 else => {
1178 result.id = .{ .IntegerLiteral = .LU };
1179 break;
1180 },
1181 },
1182 .FloatFraction => switch (c) {
1183 '0'...'9' => {},
1184 'e', 'E' => {
1185 state = .FloatExponent;
1186 },
1187 else => {
1188 self.index -= 1;
1189 state = .FloatSuffix;
1190 },
1191 },
1192 .FloatFractionHex => switch (c) {
1193 '0'...'9', 'a'...'f', 'A'...'F' => {},
1194 'p', 'P' => {
1195 state = .FloatExponent;
1196 },
1197 else => {
1198 result.id = .Invalid;
1199 break;
1200 },
1201 },
1202 .FloatExponent => switch (c) {
1203 '+', '-' => {
1204 state = .FloatExponentDigits;
1205 },
1206 else => {
1207 self.index -= 1;
1208 state = .FloatExponentDigits;
1209 },
1210 },
1211 .FloatExponentDigits => switch (c) {
1212 '0'...'9' => {
1213 counter += 1;
1214 },
1215 else => {
1216 if (counter == 0) {
1217 result.id = .Invalid;
1218 break;
1219 }
1220 state = .FloatSuffix;
1221 },
1222 },
1223 .FloatSuffix => switch (c) {
1224 'l', 'L' => {
1225 result.id = .{ .FloatLiteral = .L };
1226 self.index += 1;
1227 break;
1228 },
1229 'f', 'F' => {
1230 result.id = .{ .FloatLiteral = .F };
1231 self.index += 1;
1232 break;
1233 },
1234 else => {
1235 result.id = .{ .FloatLiteral = .None };
1236 break;
1237 },
1238 },
1239 }
1240 } else if (self.index == self.source.buffer.len) {
1241 switch (state) {
1242 .Start => {},
1243 .u, .u8, .U, .L, .Identifier => {
1244 result.id = Token.getKeyword(self.source.buffer[result.start..self.index], self.prev_tok_id == .Hash and !self.pp_directive) orelse .Identifier;
1245 },
1246
1247 .Cr,
1248 .BackSlash,
1249 .BackSlashCr,
1250 .Period2,
1251 .StringLiteral,
1252 .CharLiteralStart,
1253 .CharLiteral,
1254 .EscapeSequence,
1255 .CrEscape,
1256 .OctalEscape,
1257 .HexEscape,
1258 .UnicodeEscape,
1259 .MultiLineComment,
1260 .MultiLineCommentAsterisk,
1261 .FloatFraction,
1262 .FloatFractionHex,
1263 .FloatExponent,
1264 .FloatExponentDigits,
1265 .MacroString,
1266 => result.id = .Invalid,
1267
1268 .IntegerLiteralOct,
1269 .IntegerLiteralBinary,
1270 .IntegerLiteralHex,
1271 .IntegerLiteral,
1272 .IntegerSuffix,
1273 .Zero,
1274 => result.id = .{ .IntegerLiteral = .None },
1275 .IntegerSuffixU => result.id = .{ .IntegerLiteral = .U },
1276 .IntegerSuffixL => result.id = .{ .IntegerLiteral = .L },
1277 .IntegerSuffixLL => result.id = .{ .IntegerLiteral = .LL },
1278 .IntegerSuffixUL => result.id = .{ .IntegerLiteral = .LU },
1279
1280 .FloatSuffix => result.id = .{ .FloatLiteral = .None },
1281 .Equal => result.id = .Equal,
1282 .Bang => result.id = .Bang,
1283 .Minus => result.id = .Minus,
1284 .Slash => result.id = .Slash,
1285 .Ampersand => result.id = .Ampersand,
1286 .Hash => result.id = .Hash,
1287 .Period => result.id = .Period,
1288 .Pipe => result.id = .Pipe,
1289 .AngleBracketAngleBracketRight => result.id = .AngleBracketAngleBracketRight,
1290 .AngleBracketRight => result.id = .AngleBracketRight,
1291 .AngleBracketAngleBracketLeft => result.id = .AngleBracketAngleBracketLeft,
1292 .AngleBracketLeft => result.id = .AngleBracketLeft,
1293 .Plus => result.id = .Plus,
1294 .Percent => result.id = .Percent,
1295 .Caret => result.id = .Caret,
1296 .Asterisk => result.id = .Asterisk,
1297 .LineComment => result.id = .LineComment,
1298 }
1299 }
1300
1301 self.prev_tok_id = result.id;
1302 result.end = self.index;
1303 return result;
1304 }
1305};
1306
1307test "operators" {
1308 expectTokens(
1309 \\ ! != | || |= = ==
1310 \\ ( ) { } [ ] . .. ...
1311 \\ ^ ^= + ++ += - -- -=
1312 \\ * *= % %= -> : ; / /=
1313 \\ , & && &= ? < <= <<
1314 \\ <<= > >= >> >>= ~ # ##
1315 \\
1316 , &[_]Token.Id{
1317 .Bang,
1318 .BangEqual,
1319 .Pipe,
1320 .PipePipe,
1321 .PipeEqual,
1322 .Equal,
1323 .EqualEqual,
1324 .Nl,
1325 .LParen,
1326 .RParen,
1327 .LBrace,
1328 .RBrace,
1329 .LBracket,
1330 .RBracket,
1331 .Period,
1332 .Period,
1333 .Period,
1334 .Ellipsis,
1335 .Nl,
1336 .Caret,
1337 .CaretEqual,
1338 .Plus,
1339 .PlusPlus,
1340 .PlusEqual,
1341 .Minus,
1342 .MinusMinus,
1343 .MinusEqual,
1344 .Nl,
1345 .Asterisk,
1346 .AsteriskEqual,
1347 .Percent,
1348 .PercentEqual,
1349 .Arrow,
1350 .Colon,
1351 .Semicolon,
1352 .Slash,
1353 .SlashEqual,
1354 .Nl,
1355 .Comma,
1356 .Ampersand,
1357 .AmpersandAmpersand,
1358 .AmpersandEqual,
1359 .QuestionMark,
1360 .AngleBracketLeft,
1361 .AngleBracketLeftEqual,
1362 .AngleBracketAngleBracketLeft,
1363 .Nl,
1364 .AngleBracketAngleBracketLeftEqual,
1365 .AngleBracketRight,
1366 .AngleBracketRightEqual,
1367 .AngleBracketAngleBracketRight,
1368 .AngleBracketAngleBracketRightEqual,
1369 .Tilde,
1370 .Hash,
1371 .HashHash,
1372 .Nl,
1373 });
1374}
1375
1376test "keywords" {
1377 expectTokens(
1378 \\auto break case char const continue default do
1379 \\double else enum extern float for goto if int
1380 \\long register return short signed sizeof static
1381 \\struct switch typedef union unsigned void volatile
1382 \\while _Bool _Complex _Imaginary inline restrict _Alignas
1383 \\_Alignof _Atomic _Generic _Noreturn _Static_assert _Thread_local
1384 \\
1385 , &[_]Token.Id{
1386 .Keyword_auto,
1387 .Keyword_break,
1388 .Keyword_case,
1389 .Keyword_char,
1390 .Keyword_const,
1391 .Keyword_continue,
1392 .Keyword_default,
1393 .Keyword_do,
1394 .Nl,
1395 .Keyword_double,
1396 .Keyword_else,
1397 .Keyword_enum,
1398 .Keyword_extern,
1399 .Keyword_float,
1400 .Keyword_for,
1401 .Keyword_goto,
1402 .Keyword_if,
1403 .Keyword_int,
1404 .Nl,
1405 .Keyword_long,
1406 .Keyword_register,
1407 .Keyword_return,
1408 .Keyword_short,
1409 .Keyword_signed,
1410 .Keyword_sizeof,
1411 .Keyword_static,
1412 .Nl,
1413 .Keyword_struct,
1414 .Keyword_switch,
1415 .Keyword_typedef,
1416 .Keyword_union,
1417 .Keyword_unsigned,
1418 .Keyword_void,
1419 .Keyword_volatile,
1420 .Nl,
1421 .Keyword_while,
1422 .Keyword_bool,
1423 .Keyword_complex,
1424 .Keyword_imaginary,
1425 .Keyword_inline,
1426 .Keyword_restrict,
1427 .Keyword_alignas,
1428 .Nl,
1429 .Keyword_alignof,
1430 .Keyword_atomic,
1431 .Keyword_generic,
1432 .Keyword_noreturn,
1433 .Keyword_static_assert,
1434 .Keyword_thread_local,
1435 .Nl,
1436 });
1437}
1438
1439test "preprocessor keywords" {
1440 expectTokens(
1441 \\#include <test>
1442 \\#define #include <1
1443 \\#ifdef
1444 \\#ifndef
1445 \\#error
1446 \\#pragma
1447 \\
1448 , &[_]Token.Id{
1449 .Hash,
1450 .Keyword_include,
1451 .MacroString,
1452 .Nl,
1453 .Hash,
1454 .Keyword_define,
1455 .Hash,
1456 .Identifier,
1457 .AngleBracketLeft,
1458 .{ .IntegerLiteral = .None },
1459 .Nl,
1460 .Hash,
1461 .Keyword_ifdef,
1462 .Nl,
1463 .Hash,
1464 .Keyword_ifndef,
1465 .Nl,
1466 .Hash,
1467 .Keyword_error,
1468 .Nl,
1469 .Hash,
1470 .Keyword_pragma,
1471 .Nl,
1472 });
1473}
1474
1475test "line continuation" {
1476 expectTokens(
1477 \\#define foo \
1478 \\ bar
1479 \\"foo\
1480 \\ bar"
1481 \\#define "foo"
1482 \\ "bar"
1483 \\#define "foo" \
1484 \\ "bar"
1485 , &[_]Token.Id{
1486 .Hash,
1487 .Keyword_define,
1488 .Identifier,
1489 .Identifier,
1490 .Nl,
1491 .{ .StringLiteral = .None },
1492 .Nl,
1493 .Hash,
1494 .Keyword_define,
1495 .{ .StringLiteral = .None },
1496 .Nl,
1497 .{ .StringLiteral = .None },
1498 .Nl,
1499 .Hash,
1500 .Keyword_define,
1501 .{ .StringLiteral = .None },
1502 .{ .StringLiteral = .None },
1503 });
1504}
1505
1506test "string prefix" {
1507 expectTokens(
1508 \\"foo"
1509 \\u"foo"
1510 \\u8"foo"
1511 \\U"foo"
1512 \\L"foo"
1513 \\'foo'
1514 \\u'foo'
1515 \\U'foo'
1516 \\L'foo'
1517 \\
1518 , &[_]Token.Id{
1519 .{ .StringLiteral = .None },
1520 .Nl,
1521 .{ .StringLiteral = .Utf16 },
1522 .Nl,
1523 .{ .StringLiteral = .Utf8 },
1524 .Nl,
1525 .{ .StringLiteral = .Utf32 },
1526 .Nl,
1527 .{ .StringLiteral = .Wide },
1528 .Nl,
1529 .{ .CharLiteral = .None },
1530 .Nl,
1531 .{ .CharLiteral = .Utf16 },
1532 .Nl,
1533 .{ .CharLiteral = .Utf32 },
1534 .Nl,
1535 .{ .CharLiteral = .Wide },
1536 .Nl,
1537 });
1538}
1539
1540test "num suffixes" {
1541 expectTokens(
1542 \\ 1.0f 1.0L 1.0 .0 1.
1543 \\ 0l 0lu 0ll 0llu 0
1544 \\ 1u 1ul 1ull 1
1545 \\
1546 , &[_]Token.Id{
1547 .{ .FloatLiteral = .F },
1548 .{ .FloatLiteral = .L },
1549 .{ .FloatLiteral = .None },
1550 .{ .FloatLiteral = .None },
1551 .{ .FloatLiteral = .None },
1552 .Nl,
1553 .{ .IntegerLiteral = .L },
1554 .{ .IntegerLiteral = .LU },
1555 .{ .IntegerLiteral = .LL },
1556 .{ .IntegerLiteral = .LLU },
1557 .{ .IntegerLiteral = .None },
1558 .Nl,
1559 .{ .IntegerLiteral = .U },
1560 .{ .IntegerLiteral = .LU },
1561 .{ .IntegerLiteral = .LLU },
1562 .{ .IntegerLiteral = .None },
1563 .Nl,
1564 });
1565}
1566
1567fn expectTokens(source: []const u8, expected_tokens: []const Token.Id) void {
1568 var tokenizer = Tokenizer{
1569 .source = &Source{
1570 .buffer = source,
1571 .file_name = undefined,
1572 .tokens = undefined,
1573 },
1574 };
1575 for (expected_tokens) |expected_token_id| {
1576 const token = tokenizer.next();
1577 if (!std.meta.eql(token.id, expected_token_id)) {
1578 std.debug.panic("expected {}, found {}\n", .{ @tagName(expected_token_id), @tagName(token.id) });
1579 }
1580 }
1581 const last_token = tokenizer.next();
1582 std.testing.expect(last_token.id == .Eof);
1583}
lib/std/debug.zig+451-620
......@@ -81,10 +81,20 @@ pub fn getSelfDebugInfo() !*DebugInfo {
8181 }
8282}
8383
84fn wantTtyColor() bool {
84pub fn detectTTYConfig() TTY.Config {
8585 var bytes: [128]u8 = undefined;
8686 const allocator = &std.heap.FixedBufferAllocator.init(bytes[0..]).allocator;
87 return if (process.getEnvVarOwned(allocator, "ZIG_DEBUG_COLOR")) |_| true else |_| stderr_file.isTty();
87 if (process.getEnvVarOwned(allocator, "ZIG_DEBUG_COLOR")) |_| {
88 return .escape_codes;
89 } else |_| {
90 if (stderr_file.supportsAnsiEscapeCodes()) {
91 return .escape_codes;
92 } else if (builtin.os == .windows and stderr_file.isTty()) {
93 return .windows_api;
94 } else {
95 return .no_color;
96 }
97 }
8898}
8999
90100/// Tries to print the current stack trace to stderr, unbuffered, and ignores any error returned.
......@@ -99,7 +109,7 @@ pub fn dumpCurrentStackTrace(start_addr: ?usize) void {
99109 stderr.print("Unable to dump stack trace: Unable to open debug info: {}\n", .{@errorName(err)}) catch return;
100110 return;
101111 };
102 writeCurrentStackTrace(stderr, debug_info, wantTtyColor(), start_addr) catch |err| {
112 writeCurrentStackTrace(stderr, debug_info, detectTTYConfig(), start_addr) catch |err| {
103113 stderr.print("Unable to dump stack trace: {}\n", .{@errorName(err)}) catch return;
104114 return;
105115 };
......@@ -118,16 +128,16 @@ pub fn dumpStackTraceFromBase(bp: usize, ip: usize) void {
118128 stderr.print("Unable to dump stack trace: Unable to open debug info: {}\n", .{@errorName(err)}) catch return;
119129 return;
120130 };
121 const tty_color = wantTtyColor();
122 printSourceAtAddress(debug_info, stderr, ip, tty_color) catch return;
131 const tty_config = detectTTYConfig();
132 printSourceAtAddress(debug_info, stderr, ip, tty_config) catch return;
123133 const first_return_address = @intToPtr(*const usize, bp + @sizeOf(usize)).*;
124 printSourceAtAddress(debug_info, stderr, first_return_address - 1, tty_color) catch return;
134 printSourceAtAddress(debug_info, stderr, first_return_address - 1, tty_config) catch return;
125135 var it = StackIterator{
126136 .first_addr = null,
127137 .fp = bp,
128138 };
129139 while (it.next()) |return_address| {
130 printSourceAtAddress(debug_info, stderr, return_address - 1, tty_color) catch return;
140 printSourceAtAddress(debug_info, stderr, return_address - 1, tty_config) catch return;
131141 }
132142}
133143
......@@ -191,7 +201,7 @@ pub fn dumpStackTrace(stack_trace: builtin.StackTrace) void {
191201 stderr.print("Unable to dump stack trace: Unable to open debug info: {}\n", .{@errorName(err)}) catch return;
192202 return;
193203 };
194 writeStackTrace(stack_trace, stderr, getDebugInfoAllocator(), debug_info, wantTtyColor()) catch |err| {
204 writeStackTrace(stack_trace, stderr, getDebugInfoAllocator(), debug_info, detectTTYConfig()) catch |err| {
195205 stderr.print("Unable to dump stack trace: {}\n", .{@errorName(err)}) catch return;
196206 return;
197207 };
......@@ -264,7 +274,7 @@ pub fn writeStackTrace(
264274 out_stream: var,
265275 allocator: *mem.Allocator,
266276 debug_info: *DebugInfo,
267 tty_color: bool,
277 tty_config: TTY.Config,
268278) !void {
269279 if (builtin.strip_debug_info) return error.MissingDebugInfo;
270280 var frame_index: usize = 0;
......@@ -275,7 +285,7 @@ pub fn writeStackTrace(
275285 frame_index = (frame_index + 1) % stack_trace.instruction_addresses.len;
276286 }) {
277287 const return_address = stack_trace.instruction_addresses[frame_index];
278 try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_color);
288 try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_config);
279289 }
280290}
281291
......@@ -319,20 +329,25 @@ pub const StackIterator = struct {
319329 }
320330};
321331
322pub fn writeCurrentStackTrace(out_stream: var, debug_info: *DebugInfo, tty_color: bool, start_addr: ?usize) !void {
332pub fn writeCurrentStackTrace(
333 out_stream: var,
334 debug_info: *DebugInfo,
335 tty_config: TTY.Config,
336 start_addr: ?usize,
337) !void {
323338 if (builtin.os == .windows) {
324 return writeCurrentStackTraceWindows(out_stream, debug_info, tty_color, start_addr);
339 return writeCurrentStackTraceWindows(out_stream, debug_info, tty_config, start_addr);
325340 }
326341 var it = StackIterator.init(start_addr);
327342 while (it.next()) |return_address| {
328 try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_color);
343 try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_config);
329344 }
330345}
331346
332347pub fn writeCurrentStackTraceWindows(
333348 out_stream: var,
334349 debug_info: *DebugInfo,
335 tty_color: bool,
350 tty_config: TTY.Config,
336351 start_addr: ?usize,
337352) !void {
338353 var addr_buf: [1024]usize = undefined;
......@@ -345,23 +360,28 @@ pub fn writeCurrentStackTraceWindows(
345360 return;
346361 } else 0;
347362 for (addrs[start_i..]) |addr| {
348 try printSourceAtAddress(debug_info, out_stream, addr, tty_color);
363 try printSourceAtAddress(debug_info, out_stream, addr - 1, tty_config);
349364 }
350365}
351366
352367/// TODO once https://github.com/ziglang/zig/issues/3157 is fully implemented,
353368/// make this `noasync fn` and remove the individual noasync calls.
354pub fn printSourceAtAddress(debug_info: *DebugInfo, out_stream: var, address: usize, tty_color: bool) !void {
369pub fn printSourceAtAddress(debug_info: *DebugInfo, out_stream: var, address: usize, tty_config: TTY.Config) !void {
355370 if (builtin.os == .windows) {
356 return noasync printSourceAtAddressWindows(debug_info, out_stream, address, tty_color);
371 return noasync printSourceAtAddressWindows(debug_info, out_stream, address, tty_config);
357372 }
358373 if (comptime std.Target.current.isDarwin()) {
359 return noasync printSourceAtAddressMacOs(debug_info, out_stream, address, tty_color);
374 return noasync printSourceAtAddressMacOs(debug_info, out_stream, address, tty_config);
360375 }
361 return noasync printSourceAtAddressPosix(debug_info, out_stream, address, tty_color);
376 return noasync printSourceAtAddressPosix(debug_info, out_stream, address, tty_config);
362377}
363378
364fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_address: usize, tty_color: bool) !void {
379fn printSourceAtAddressWindows(
380 di: *DebugInfo,
381 out_stream: var,
382 relocated_address: usize,
383 tty_config: TTY.Config,
384) !void {
365385 const allocator = getDebugInfoAllocator();
366386 const base_address = process.getBaseAddress();
367387 const relative_address = relocated_address - base_address;
......@@ -379,16 +399,7 @@ fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_addres
379399 }
380400 } else {
381401 // we have no information to add to the address
382 if (tty_color) {
383 try out_stream.print("???:?:?: ", .{});
384 setTtyColor(TtyColor.Dim);
385 try out_stream.print("0x{x} in ??? (???)", .{relocated_address});
386 setTtyColor(TtyColor.Reset);
387 try out_stream.print("\n\n\n", .{});
388 } else {
389 try out_stream.print("???:?:?: 0x{x} in ??? (???)\n\n\n", .{relocated_address});
390 }
391 return;
402 return printLineInfo(out_stream, null, relocated_address, "???", "???", tty_config, printLineFromFileAnyOs);
392403 };
393404
394405 const mod = &di.modules[mod_index];
......@@ -401,7 +412,7 @@ fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_addres
401412 if (prefix.RecordLen < 2)
402413 return error.InvalidDebugInfo;
403414 switch (prefix.RecordKind) {
404 pdb.SymbolKind.S_LPROC32 => {
415 .S_LPROC32, .S_GPROC32 => {
405416 const proc_sym = @ptrCast(*pdb.ProcSym, &mod.symbols[symbol_i + @sizeOf(pdb.RecordPrefix)]);
406417 const vaddr_start = coff_section.header.virtual_address + proc_sym.CodeOffset;
407418 const vaddr_end = vaddr_start + proc_sym.CodeSize;
......@@ -510,137 +521,86 @@ fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_addres
510521 }
511522 };
512523
513 if (tty_color) {
514 setTtyColor(TtyColor.White);
515 if (opt_line_info) |li| {
516 try out_stream.print("{}:{}:{}", .{ li.file_name, li.line, li.column });
517 } else {
518 try out_stream.print("???:?:?", .{});
519 }
520 setTtyColor(TtyColor.Reset);
521 try out_stream.print(": ", .{});
522 setTtyColor(TtyColor.Dim);
523 try out_stream.print("0x{x} in {} ({})", .{ relocated_address, symbol_name, obj_basename });
524 setTtyColor(TtyColor.Reset);
525
526 if (opt_line_info) |line_info| {
527 try out_stream.print("\n", .{});
528 if (printLineFromFileAnyOs(out_stream, line_info)) {
529 if (line_info.column == 0) {
530 try out_stream.write("\n");
531 } else {
532 {
533 var col_i: usize = 1;
534 while (col_i < line_info.column) : (col_i += 1) {
535 try out_stream.writeByte(' ');
536 }
537 }
538 setTtyColor(TtyColor.Green);
539 try out_stream.write("^");
540 setTtyColor(TtyColor.Reset);
541 try out_stream.write("\n");
542 }
543 } else |err| switch (err) {
544 error.EndOfFile => {},
545 error.FileNotFound => {
546 setTtyColor(TtyColor.Dim);
547 try out_stream.write("file not found\n\n");
548 setTtyColor(TtyColor.White);
549 },
550 else => return err,
551 }
552 } else {
553 try out_stream.print("\n\n\n", .{});
554 }
555 } else {
556 if (opt_line_info) |li| {
557 try out_stream.print("{}:{}:{}: 0x{x} in {} ({})\n\n\n", .{
558 li.file_name,
559 li.line,
560 li.column,
561 relocated_address,
562 symbol_name,
563 obj_basename,
564 });
565 } else {
566 try out_stream.print("???:?:?: 0x{x} in {} ({})\n\n\n", .{
567 relocated_address,
568 symbol_name,
569 obj_basename,
570 });
571 }
572 }
524 try printLineInfo(
525 out_stream,
526 opt_line_info,
527 relocated_address,
528 symbol_name,
529 obj_basename,
530 tty_config,
531 printLineFromFileAnyOs,
532 );
573533}
574534
575const TtyColor = enum {
576 Red,
577 Green,
578 Cyan,
579 White,
580 Dim,
581 Bold,
582 Reset,
583};
535pub const TTY = struct {
536 pub const Color = enum {
537 Red,
538 Green,
539 Cyan,
540 White,
541 Dim,
542 Bold,
543 Reset,
544 };
584545
585/// TODO this is a special case hack right now. clean it up and maybe make it part of std.fmt
586fn setTtyColor(tty_color: TtyColor) void {
587 if (stderr_file.supportsAnsiEscapeCodes()) {
588 switch (tty_color) {
589 TtyColor.Red => {
590 stderr_file.write(RED) catch return;
591 },
592 TtyColor.Green => {
593 stderr_file.write(GREEN) catch return;
594 },
595 TtyColor.Cyan => {
596 stderr_file.write(CYAN) catch return;
597 },
598 TtyColor.White, TtyColor.Bold => {
599 stderr_file.write(WHITE) catch return;
600 },
601 TtyColor.Dim => {
602 stderr_file.write(DIM) catch return;
603 },
604 TtyColor.Reset => {
605 stderr_file.write(RESET) catch return;
606 },
607 }
608 } else {
609 const S = struct {
610 var attrs: windows.WORD = undefined;
611 var init_attrs = false;
612 };
613 if (!S.init_attrs) {
614 S.init_attrs = true;
615 var info: windows.CONSOLE_SCREEN_BUFFER_INFO = undefined;
616 // TODO handle error
617 _ = windows.kernel32.GetConsoleScreenBufferInfo(stderr_file.handle, &info);
618 S.attrs = info.wAttributes;
619 }
546 pub const Config = enum {
547 no_color,
548 escape_codes,
549 // TODO give this a payload of file handle
550 windows_api,
551
552 fn setColor(conf: Config, out_stream: var, color: Color) void {
553 switch (conf) {
554 .no_color => return,
555 .escape_codes => switch (color) {
556 .Red => out_stream.write(RED) catch return,
557 .Green => out_stream.write(GREEN) catch return,
558 .Cyan => out_stream.write(CYAN) catch return,
559 .White, .Bold => out_stream.write(WHITE) catch return,
560 .Dim => out_stream.write(DIM) catch return,
561 .Reset => out_stream.write(RESET) catch return,
562 },
563 .windows_api => if (builtin.os == .windows) {
564 const S = struct {
565 var attrs: windows.WORD = undefined;
566 var init_attrs = false;
567 };
568 if (!S.init_attrs) {
569 S.init_attrs = true;
570 var info: windows.CONSOLE_SCREEN_BUFFER_INFO = undefined;
571 // TODO handle error
572 _ = windows.kernel32.GetConsoleScreenBufferInfo(stderr_file.handle, &info);
573 S.attrs = info.wAttributes;
574 }
620575
621 // TODO handle errors
622 switch (tty_color) {
623 TtyColor.Red => {
624 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED | windows.FOREGROUND_INTENSITY) catch {};
625 },
626 TtyColor.Green => {
627 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN | windows.FOREGROUND_INTENSITY) catch {};
628 },
629 TtyColor.Cyan => {
630 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN | windows.FOREGROUND_BLUE | windows.FOREGROUND_INTENSITY) catch {};
631 },
632 TtyColor.White, TtyColor.Bold => {
633 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED | windows.FOREGROUND_GREEN | windows.FOREGROUND_BLUE | windows.FOREGROUND_INTENSITY) catch {};
634 },
635 TtyColor.Dim => {
636 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_INTENSITY) catch {};
637 },
638 TtyColor.Reset => {
639 _ = windows.SetConsoleTextAttribute(stderr_file.handle, S.attrs) catch {};
640 },
576 // TODO handle errors
577 switch (color) {
578 .Red => {
579 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED | windows.FOREGROUND_INTENSITY) catch {};
580 },
581 .Green => {
582 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN | windows.FOREGROUND_INTENSITY) catch {};
583 },
584 .Cyan => {
585 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN | windows.FOREGROUND_BLUE | windows.FOREGROUND_INTENSITY) catch {};
586 },
587 .White, .Bold => {
588 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED | windows.FOREGROUND_GREEN | windows.FOREGROUND_BLUE | windows.FOREGROUND_INTENSITY) catch {};
589 },
590 .Dim => {
591 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_INTENSITY) catch {};
592 },
593 .Reset => {
594 _ = windows.SetConsoleTextAttribute(stderr_file.handle, S.attrs) catch {};
595 },
596 }
597 } else {
598 unreachable;
599 },
600 }
641601 }
642 }
643}
602 };
603};
644604
645605fn populateModule(di: *DebugInfo, mod: *Module) !void {
646606 if (mod.populated)
......@@ -706,17 +666,12 @@ fn machoSearchSymbols(symbols: []const MachoSymbol, address: usize) ?*const Mach
706666 return null;
707667}
708668
709fn printSourceAtAddressMacOs(di: *DebugInfo, out_stream: var, address: usize, tty_color: bool) !void {
669fn printSourceAtAddressMacOs(di: *DebugInfo, out_stream: var, address: usize, tty_config: TTY.Config) !void {
710670 const base_addr = process.getBaseAddress();
711671 const adjusted_addr = 0x100000000 + (address - base_addr);
712672
713673 const symbol = machoSearchSymbols(di.symbols, adjusted_addr) orelse {
714 if (tty_color) {
715 try out_stream.print("???:?:?: " ++ DIM ++ "0x{x} in ??? (???)" ++ RESET ++ "\n\n\n", .{address});
716 } else {
717 try out_stream.print("???:?:?: 0x{x} in ??? (???)\n\n\n", .{address});
718 }
719 return;
674 return printLineInfo(out_stream, null, address, "???", "???", tty_config, printLineFromFileAnyOs);
720675 };
721676
722677 const symbol_name = mem.toSliceConst(u8, @ptrCast([*:0]const u8, di.strings.ptr + symbol.nlist.n_strx));
......@@ -724,78 +679,70 @@ fn printSourceAtAddressMacOs(di: *DebugInfo, out_stream: var, address: usize, tt
724679 const ofile_path = mem.toSliceConst(u8, @ptrCast([*:0]const u8, di.strings.ptr + ofile.n_strx));
725680 break :blk fs.path.basename(ofile_path);
726681 } else "???";
727 if (getLineNumberInfoMacOs(di, symbol.*, adjusted_addr)) |line_info| {
728 defer line_info.deinit();
729 try printLineInfo(
730 out_stream,
731 line_info,
732 address,
733 symbol_name,
734 compile_unit_name,
735 tty_color,
736 printLineFromFileAnyOs,
737 );
738 } else |err| switch (err) {
739 error.MissingDebugInfo, error.InvalidDebugInfo => {
740 if (tty_color) {
741 try out_stream.print("???:?:?: " ++ DIM ++ "0x{x} in {} ({})" ++ RESET ++ "\n\n\n", .{
742 address, symbol_name, compile_unit_name,
743 });
744 } else {
745 try out_stream.print("???:?:?: 0x{x} in {} ({})\n\n\n", .{ address, symbol_name, compile_unit_name });
746 }
747 },
682
683 const line_info = getLineNumberInfoMacOs(di, symbol.*, adjusted_addr) catch |err| switch (err) {
684 error.MissingDebugInfo, error.InvalidDebugInfo => null,
748685 else => return err,
749 }
686 };
687 defer if (line_info) |li| li.deinit();
688
689 try printLineInfo(
690 out_stream,
691 line_info,
692 address,
693 symbol_name,
694 compile_unit_name,
695 tty_config,
696 printLineFromFileAnyOs,
697 );
750698}
751699
752pub fn printSourceAtAddressPosix(debug_info: *DebugInfo, out_stream: var, address: usize, tty_color: bool) !void {
753 return debug_info.printSourceAtAddress(out_stream, address, tty_color, printLineFromFileAnyOs);
700pub fn printSourceAtAddressPosix(debug_info: *DebugInfo, out_stream: var, address: usize, tty_config: TTY.Config) !void {
701 return debug_info.printSourceAtAddress(out_stream, address, tty_config, printLineFromFileAnyOs);
754702}
755703
756704fn printLineInfo(
757705 out_stream: var,
758 line_info: LineInfo,
706 line_info: ?LineInfo,
759707 address: usize,
760708 symbol_name: []const u8,
761709 compile_unit_name: []const u8,
762 tty_color: bool,
710 tty_config: TTY.Config,
763711 comptime printLineFromFile: var,
764712) !void {
765 if (tty_color) {
766 try out_stream.print(WHITE ++ "{}:{}:{}" ++ RESET ++ ": " ++ DIM ++ "0x{x} in {} ({})" ++ RESET ++ "\n", .{
767 line_info.file_name,
768 line_info.line,
769 line_info.column,
770 address,
771 symbol_name,
772 compile_unit_name,
773 });
774 if (printLineFromFile(out_stream, line_info)) {
775 if (line_info.column == 0) {
776 try out_stream.write("\n");
777 } else {
778 {
779 var col_i: usize = 1;
780 while (col_i < line_info.column) : (col_i += 1) {
781 try out_stream.writeByte(' ');
782 }
783 }
784 try out_stream.write(GREEN ++ "^" ++ RESET ++ "\n");
713 tty_config.setColor(out_stream, .White);
714
715 if (line_info) |*li| {
716 try out_stream.print("{}:{}:{}", .{ li.file_name, li.line, li.column });
717 } else {
718 try out_stream.print("???:?:?", .{});
719 }
720
721 tty_config.setColor(out_stream, .Reset);
722 try out_stream.write(": ");
723 tty_config.setColor(out_stream, .Dim);
724 try out_stream.print("0x{x} in {} ({})", .{ address, symbol_name, compile_unit_name });
725 tty_config.setColor(out_stream, .Reset);
726 try out_stream.write("\n");
727
728 // Show the matching source code line if possible
729 if (line_info) |li| {
730 if (noasync printLineFromFile(out_stream, li)) {
731 if (li.column > 0) {
732 // The caret already takes one char
733 const space_needed = @intCast(usize, li.column - 1);
734
735 try out_stream.writeByteNTimes(' ', space_needed);
736 tty_config.setColor(out_stream, .Green);
737 try out_stream.write("^");
738 tty_config.setColor(out_stream, .Reset);
785739 }
740 try out_stream.write("\n");
786741 } else |err| switch (err) {
787742 error.EndOfFile, error.FileNotFound => {},
743 error.BadPathName => {},
788744 else => return err,
789745 }
790 } else {
791 try out_stream.print("{}:{}:{}: 0x{x} in {} ({})\n", .{
792 line_info.file_name,
793 line_info.line,
794 line_info.column,
795 address,
796 symbol_name,
797 compile_unit_name,
798 });
799746 }
800747}
801748
......@@ -1016,59 +963,61 @@ pub fn openDwarfDebugInfo(di: *DwarfInfo, allocator: *mem.Allocator) !void {
1016963
1017964pub fn openElfDebugInfo(
1018965 allocator: *mem.Allocator,
1019 elf_seekable_stream: *DwarfSeekableStream,
1020 elf_in_stream: *DwarfInStream,
966 data: []u8,
1021967) !DwarfInfo {
1022 var efile = try elf.Elf.openStream(allocator, elf_seekable_stream, elf_in_stream);
1023 errdefer efile.close();
968 var seekable_stream = io.SliceSeekableInStream.init(data);
969 var efile = try elf.Elf.openStream(
970 allocator,
971 @ptrCast(*DwarfSeekableStream, &seekable_stream.seekable_stream),
972 @ptrCast(*DwarfInStream, &seekable_stream.stream),
973 );
974 defer efile.close();
975
976 const debug_info = (try efile.findSection(".debug_info")) orelse
977 return error.MissingDebugInfo;
978 const debug_abbrev = (try efile.findSection(".debug_abbrev")) orelse
979 return error.MissingDebugInfo;
980 const debug_str = (try efile.findSection(".debug_str")) orelse
981 return error.MissingDebugInfo;
982 const debug_line = (try efile.findSection(".debug_line")) orelse
983 return error.MissingDebugInfo;
984 const opt_debug_ranges = try efile.findSection(".debug_ranges");
1024985
1025986 var di = DwarfInfo{
1026 .dwarf_seekable_stream = elf_seekable_stream,
1027 .dwarf_in_stream = elf_in_stream,
1028987 .endian = efile.endian,
1029 .debug_info = (try findDwarfSectionFromElf(&efile, ".debug_info")) orelse return error.MissingDebugInfo,
1030 .debug_abbrev = (try findDwarfSectionFromElf(&efile, ".debug_abbrev")) orelse return error.MissingDebugInfo,
1031 .debug_str = (try findDwarfSectionFromElf(&efile, ".debug_str")) orelse return error.MissingDebugInfo,
1032 .debug_line = (try findDwarfSectionFromElf(&efile, ".debug_line")) orelse return error.MissingDebugInfo,
1033 .debug_ranges = (try findDwarfSectionFromElf(&efile, ".debug_ranges")),
1034 .abbrev_table_list = undefined,
1035 .compile_unit_list = undefined,
1036 .func_list = undefined,
988 .debug_info = (data[@intCast(usize, debug_info.offset)..@intCast(usize, debug_info.offset + debug_info.size)]),
989 .debug_abbrev = (data[@intCast(usize, debug_abbrev.offset)..@intCast(usize, debug_abbrev.offset + debug_abbrev.size)]),
990 .debug_str = (data[@intCast(usize, debug_str.offset)..@intCast(usize, debug_str.offset + debug_str.size)]),
991 .debug_line = (data[@intCast(usize, debug_line.offset)..@intCast(usize, debug_line.offset + debug_line.size)]),
992 .debug_ranges = if (opt_debug_ranges) |debug_ranges|
993 data[@intCast(usize, debug_ranges.offset)..@intCast(usize, debug_ranges.offset + debug_ranges.size)]
994 else
995 null,
1037996 };
997
998 efile.close();
999
10381000 try openDwarfDebugInfo(&di, allocator);
10391001 return di;
10401002}
10411003
10421004fn openSelfDebugInfoPosix(allocator: *mem.Allocator) !DwarfInfo {
1043 const S = struct {
1044 var self_exe_file: File = undefined;
1045 var self_exe_mmap_seekable: io.SliceSeekableInStream = undefined;
1046 };
1047
1048 S.self_exe_file = try fs.openSelfExe();
1049 errdefer S.self_exe_file.close();
1005 var exe_file = try fs.openSelfExe();
1006 errdefer exe_file.close();
10501007
1051 const self_exe_len = math.cast(usize, try S.self_exe_file.getEndPos()) catch return error.DebugInfoTooLarge;
1052 const self_exe_mmap_len = mem.alignForward(self_exe_len, mem.page_size);
1053 const self_exe_mmap = try os.mmap(
1008 const exe_len = math.cast(usize, try exe_file.getEndPos()) catch
1009 return error.DebugInfoTooLarge;
1010 const exe_mmap = try os.mmap(
10541011 null,
1055 self_exe_mmap_len,
1012 exe_len,
10561013 os.PROT_READ,
10571014 os.MAP_SHARED,
1058 S.self_exe_file.handle,
1015 exe_file.handle,
10591016 0,
10601017 );
1061 errdefer os.munmap(self_exe_mmap);
1018 errdefer os.munmap(exe_mmap);
10621019
1063 S.self_exe_mmap_seekable = io.SliceSeekableInStream.init(self_exe_mmap);
1064
1065 return openElfDebugInfo(
1066 allocator,
1067 // TODO https://github.com/ziglang/zig/issues/764
1068 @ptrCast(*DwarfSeekableStream, &S.self_exe_mmap_seekable.seekable_stream),
1069 // TODO https://github.com/ziglang/zig/issues/764
1070 @ptrCast(*DwarfInStream, &S.self_exe_mmap_seekable.stream),
1071 );
1020 return openElfDebugInfo(allocator, exe_mmap);
10721021}
10731022
10741023fn openSelfDebugInfoMacOs(allocator: *mem.Allocator) !DebugInfo {
......@@ -1195,83 +1144,56 @@ const MachoSymbol = struct {
11951144 }
11961145};
11971146
1198const MachOFile = struct {
1199 bytes: []align(@alignOf(macho.mach_header_64)) const u8,
1200 sect_debug_info: ?*const macho.section_64,
1201 sect_debug_line: ?*const macho.section_64,
1202};
1203
12041147pub const DwarfSeekableStream = io.SeekableStream(anyerror, anyerror);
12051148pub const DwarfInStream = io.InStream(anyerror);
12061149
12071150pub const DwarfInfo = struct {
1208 dwarf_seekable_stream: *DwarfSeekableStream,
1209 dwarf_in_stream: *DwarfInStream,
12101151 endian: builtin.Endian,
1211 debug_info: Section,
1212 debug_abbrev: Section,
1213 debug_str: Section,
1214 debug_line: Section,
1215 debug_ranges: ?Section,
1216 abbrev_table_list: ArrayList(AbbrevTableHeader),
1217 compile_unit_list: ArrayList(CompileUnit),
1218 func_list: ArrayList(Func),
1219
1220 pub const Section = struct {
1221 offset: u64,
1222 size: u64,
1223 };
1152 // No memory is owned by the DwarfInfo
1153 debug_info: []u8,
1154 debug_abbrev: []u8,
1155 debug_str: []u8,
1156 debug_line: []u8,
1157 debug_ranges: ?[]u8,
1158 // Filled later by the initializer
1159 abbrev_table_list: ArrayList(AbbrevTableHeader) = undefined,
1160 compile_unit_list: ArrayList(CompileUnit) = undefined,
1161 func_list: ArrayList(Func) = undefined,
12241162
12251163 pub fn allocator(self: DwarfInfo) *mem.Allocator {
12261164 return self.abbrev_table_list.allocator;
12271165 }
12281166
1229 pub fn readString(self: *DwarfInfo) ![]u8 {
1230 return readStringRaw(self.allocator(), self.dwarf_in_stream);
1231 }
1232
12331167 /// This function works in freestanding mode.
12341168 /// fn printLineFromFile(out_stream: var, line_info: LineInfo) !void
12351169 pub fn printSourceAtAddress(
12361170 self: *DwarfInfo,
12371171 out_stream: var,
12381172 address: usize,
1239 tty_color: bool,
1173 tty_config: TTY.Config,
12401174 comptime printLineFromFile: var,
12411175 ) !void {
12421176 const compile_unit = self.findCompileUnit(address) catch {
1243 if (tty_color) {
1244 try out_stream.print("???:?:?: " ++ DIM ++ "0x{x} in ??? (???)" ++ RESET ++ "\n\n\n", .{address});
1245 } else {
1246 try out_stream.print("???:?:?: 0x{x} in ??? (???)\n\n\n", .{address});
1247 }
1248 return;
1177 return printLineInfo(out_stream, null, address, "???", "???", tty_config, printLineFromFile);
12491178 };
1179
12501180 const compile_unit_name = try compile_unit.die.getAttrString(self, DW.AT_name);
1251 if (self.getLineNumberInfo(compile_unit.*, address)) |line_info| {
1252 defer line_info.deinit();
1253 const symbol_name = self.getSymbolName(address) orelse "???";
1254 try printLineInfo(
1255 out_stream,
1256 line_info,
1257 address,
1258 symbol_name,
1259 compile_unit_name,
1260 tty_color,
1261 printLineFromFile,
1262 );
1263 } else |err| switch (err) {
1264 error.MissingDebugInfo, error.InvalidDebugInfo => {
1265 if (tty_color) {
1266 try out_stream.print("???:?:?: " ++ DIM ++ "0x{x} in ??? ({})" ++ RESET ++ "\n\n\n", .{
1267 address, compile_unit_name,
1268 });
1269 } else {
1270 try out_stream.print("???:?:?: 0x{x} in ??? ({})\n\n\n", .{ address, compile_unit_name });
1271 }
1272 },
1181 const symbol_name = self.getSymbolName(address) orelse "???";
1182 const line_info = self.getLineNumberInfo(compile_unit.*, address) catch |err| switch (err) {
1183 error.MissingDebugInfo, error.InvalidDebugInfo => null,
12731184 else => return err,
1274 }
1185 };
1186 defer if (line_info) |li| li.deinit();
1187
1188 try printLineInfo(
1189 out_stream,
1190 line_info,
1191 address,
1192 symbol_name,
1193 compile_unit_name,
1194 tty_config,
1195 printLineFromFile,
1196 );
12751197 }
12761198
12771199 fn getSymbolName(di: *DwarfInfo, address: u64) ?[]const u8 {
......@@ -1287,35 +1209,38 @@ pub const DwarfInfo = struct {
12871209 }
12881210
12891211 fn scanAllFunctions(di: *DwarfInfo) !void {
1290 const debug_info_end = di.debug_info.offset + di.debug_info.size;
1291 var this_unit_offset = di.debug_info.offset;
1212 var s = io.SliceSeekableInStream.init(di.debug_info);
1213 var this_unit_offset: u64 = 0;
12921214
1293 while (this_unit_offset < debug_info_end) {
1294 try di.dwarf_seekable_stream.seekTo(this_unit_offset);
1215 while (true) {
1216 s.seekable_stream.seekTo(this_unit_offset) catch |err| switch (err) {
1217 error.EndOfStream => return,
1218 else => return err,
1219 };
12951220
12961221 var is_64: bool = undefined;
1297 const unit_length = try readInitialLength(@TypeOf(di.dwarf_in_stream.readFn).ReturnType.ErrorSet, di.dwarf_in_stream, &is_64);
1222 const unit_length = try readInitialLength(@TypeOf(s.stream.readFn).ReturnType.ErrorSet, &s.stream, &is_64);
12981223 if (unit_length == 0) return;
12991224 const next_offset = unit_length + (if (is_64) @as(usize, 12) else @as(usize, 4));
13001225
1301 const version = try di.dwarf_in_stream.readInt(u16, di.endian);
1226 const version = try s.stream.readInt(u16, di.endian);
13021227 if (version < 2 or version > 5) return error.InvalidDebugInfo;
13031228
1304 const debug_abbrev_offset = if (is_64) try di.dwarf_in_stream.readInt(u64, di.endian) else try di.dwarf_in_stream.readInt(u32, di.endian);
1229 const debug_abbrev_offset = if (is_64) try s.stream.readInt(u64, di.endian) else try s.stream.readInt(u32, di.endian);
13051230
1306 const address_size = try di.dwarf_in_stream.readByte();
1231 const address_size = try s.stream.readByte();
13071232 if (address_size != @sizeOf(usize)) return error.InvalidDebugInfo;
13081233
1309 const compile_unit_pos = try di.dwarf_seekable_stream.getPos();
1234 const compile_unit_pos = try s.seekable_stream.getPos();
13101235 const abbrev_table = try di.getAbbrevTable(debug_abbrev_offset);
13111236
1312 try di.dwarf_seekable_stream.seekTo(compile_unit_pos);
1237 try s.seekable_stream.seekTo(compile_unit_pos);
13131238
13141239 const next_unit_pos = this_unit_offset + next_offset;
13151240
1316 while ((try di.dwarf_seekable_stream.getPos()) < next_unit_pos) {
1317 const die_obj = (try di.parseDie(abbrev_table, is_64)) orelse continue;
1318 const after_die_offset = try di.dwarf_seekable_stream.getPos();
1241 while ((try s.seekable_stream.getPos()) < next_unit_pos) {
1242 const die_obj = (try di.parseDie(&s.stream, abbrev_table, is_64)) orelse continue;
1243 const after_die_offset = try s.seekable_stream.getPos();
13191244
13201245 switch (die_obj.tag_id) {
13211246 DW.TAG_subprogram, DW.TAG_inlined_subroutine, DW.TAG_subroutine, DW.TAG_entry_point => {
......@@ -1331,14 +1256,14 @@ pub const DwarfInfo = struct {
13311256 // Follow the DIE it points to and repeat
13321257 const ref_offset = try this_die_obj.getAttrRef(DW.AT_abstract_origin);
13331258 if (ref_offset > next_offset) return error.InvalidDebugInfo;
1334 try di.dwarf_seekable_stream.seekTo(this_unit_offset + ref_offset);
1335 this_die_obj = (try di.parseDie(abbrev_table, is_64)) orelse return error.InvalidDebugInfo;
1259 try s.seekable_stream.seekTo(this_unit_offset + ref_offset);
1260 this_die_obj = (try di.parseDie(&s.stream, abbrev_table, is_64)) orelse return error.InvalidDebugInfo;
13361261 } else if (this_die_obj.getAttr(DW.AT_specification)) |ref| {
13371262 // Follow the DIE it points to and repeat
13381263 const ref_offset = try this_die_obj.getAttrRef(DW.AT_specification);
13391264 if (ref_offset > next_offset) return error.InvalidDebugInfo;
1340 try di.dwarf_seekable_stream.seekTo(this_unit_offset + ref_offset);
1341 this_die_obj = (try di.parseDie(abbrev_table, is_64)) orelse return error.InvalidDebugInfo;
1265 try s.seekable_stream.seekTo(this_unit_offset + ref_offset);
1266 this_die_obj = (try di.parseDie(&s.stream, abbrev_table, is_64)) orelse return error.InvalidDebugInfo;
13421267 } else {
13431268 break :x null;
13441269 }
......@@ -1376,12 +1301,10 @@ pub const DwarfInfo = struct {
13761301 .pc_range = pc_range,
13771302 });
13781303 },
1379 else => {
1380 continue;
1381 },
1304 else => {},
13821305 }
13831306
1384 try di.dwarf_seekable_stream.seekTo(after_die_offset);
1307 try s.seekable_stream.seekTo(after_die_offset);
13851308 }
13861309
13871310 this_unit_offset += next_offset;
......@@ -1389,32 +1312,35 @@ pub const DwarfInfo = struct {
13891312 }
13901313
13911314 fn scanAllCompileUnits(di: *DwarfInfo) !void {
1392 const debug_info_end = di.debug_info.offset + di.debug_info.size;
1393 var this_unit_offset = di.debug_info.offset;
1315 var s = io.SliceSeekableInStream.init(di.debug_info);
1316 var this_unit_offset: u64 = 0;
13941317
1395 while (this_unit_offset < debug_info_end) {
1396 try di.dwarf_seekable_stream.seekTo(this_unit_offset);
1318 while (true) {
1319 s.seekable_stream.seekTo(this_unit_offset) catch |err| switch (err) {
1320 error.EndOfStream => return,
1321 else => return err,
1322 };
13971323
13981324 var is_64: bool = undefined;
1399 const unit_length = try readInitialLength(@TypeOf(di.dwarf_in_stream.readFn).ReturnType.ErrorSet, di.dwarf_in_stream, &is_64);
1325 const unit_length = try readInitialLength(@TypeOf(s.stream.readFn).ReturnType.ErrorSet, &s.stream, &is_64);
14001326 if (unit_length == 0) return;
14011327 const next_offset = unit_length + (if (is_64) @as(usize, 12) else @as(usize, 4));
14021328
1403 const version = try di.dwarf_in_stream.readInt(u16, di.endian);
1329 const version = try s.stream.readInt(u16, di.endian);
14041330 if (version < 2 or version > 5) return error.InvalidDebugInfo;
14051331
1406 const debug_abbrev_offset = if (is_64) try di.dwarf_in_stream.readInt(u64, di.endian) else try di.dwarf_in_stream.readInt(u32, di.endian);
1332 const debug_abbrev_offset = if (is_64) try s.stream.readInt(u64, di.endian) else try s.stream.readInt(u32, di.endian);
14071333
1408 const address_size = try di.dwarf_in_stream.readByte();
1334 const address_size = try s.stream.readByte();
14091335 if (address_size != @sizeOf(usize)) return error.InvalidDebugInfo;
14101336
1411 const compile_unit_pos = try di.dwarf_seekable_stream.getPos();
1337 const compile_unit_pos = try s.seekable_stream.getPos();
14121338 const abbrev_table = try di.getAbbrevTable(debug_abbrev_offset);
14131339
1414 try di.dwarf_seekable_stream.seekTo(compile_unit_pos);
1340 try s.seekable_stream.seekTo(compile_unit_pos);
14151341
14161342 const compile_unit_die = try di.allocator().create(Die);
1417 compile_unit_die.* = (try di.parseDie(abbrev_table, is_64)) orelse return error.InvalidDebugInfo;
1343 compile_unit_die.* = (try di.parseDie(&s.stream, abbrev_table, is_64)) orelse return error.InvalidDebugInfo;
14181344
14191345 if (compile_unit_die.tag_id != DW.TAG_compile_unit) return error.InvalidDebugInfo;
14201346
......@@ -1458,28 +1384,38 @@ pub const DwarfInfo = struct {
14581384 if (compile_unit.pc_range) |range| {
14591385 if (target_address >= range.start and target_address < range.end) return compile_unit;
14601386 }
1461 if (compile_unit.die.getAttrSecOffset(DW.AT_ranges)) |ranges_offset| {
1462 var base_address: usize = 0;
1463 if (di.debug_ranges) |debug_ranges| {
1464 try di.dwarf_seekable_stream.seekTo(debug_ranges.offset + ranges_offset);
1387 if (di.debug_ranges) |debug_ranges| {
1388 if (compile_unit.die.getAttrSecOffset(DW.AT_ranges)) |ranges_offset| {
1389 var s = io.SliceSeekableInStream.init(debug_ranges);
1390
1391 // All the addresses in the list are relative to the value
1392 // specified by DW_AT_low_pc or to some other value encoded
1393 // in the list itself
1394 var base_address = try compile_unit.die.getAttrAddr(DW.AT_low_pc);
1395
1396 try s.seekable_stream.seekTo(ranges_offset);
1397
14651398 while (true) {
1466 const begin_addr = try di.dwarf_in_stream.readIntLittle(usize);
1467 const end_addr = try di.dwarf_in_stream.readIntLittle(usize);
1399 const begin_addr = try s.stream.readIntLittle(usize);
1400 const end_addr = try s.stream.readIntLittle(usize);
14681401 if (begin_addr == 0 and end_addr == 0) {
14691402 break;
14701403 }
1404 // This entry selects a new value for the base address
14711405 if (begin_addr == maxInt(usize)) {
1472 base_address = begin_addr;
1406 base_address = end_addr;
14731407 continue;
14741408 }
1475 if (target_address >= begin_addr and target_address < end_addr) {
1409 if (target_address >= base_address + begin_addr and target_address < base_address + end_addr) {
14761410 return compile_unit;
14771411 }
14781412 }
1413
1414 return error.InvalidDebugInfo;
1415 } else |err| {
1416 if (err != error.MissingDebugInfo) return err;
1417 continue;
14791418 }
1480 } else |err| {
1481 if (err != error.MissingDebugInfo) return err;
1482 continue;
14831419 }
14841420 }
14851421 return error.MissingDebugInfo;
......@@ -1493,30 +1429,33 @@ pub const DwarfInfo = struct {
14931429 return &header.table;
14941430 }
14951431 }
1496 try di.dwarf_seekable_stream.seekTo(di.debug_abbrev.offset + abbrev_offset);
14971432 try di.abbrev_table_list.append(AbbrevTableHeader{
14981433 .offset = abbrev_offset,
1499 .table = try di.parseAbbrevTable(),
1434 .table = try di.parseAbbrevTable(abbrev_offset),
15001435 });
15011436 return &di.abbrev_table_list.items[di.abbrev_table_list.len - 1].table;
15021437 }
15031438
1504 fn parseAbbrevTable(di: *DwarfInfo) !AbbrevTable {
1439 fn parseAbbrevTable(di: *DwarfInfo, offset: u64) !AbbrevTable {
1440 var s = io.SliceSeekableInStream.init(di.debug_abbrev);
1441
1442 try s.seekable_stream.seekTo(offset);
15051443 var result = AbbrevTable.init(di.allocator());
1444 errdefer result.deinit();
15061445 while (true) {
1507 const abbrev_code = try leb.readULEB128(u64, di.dwarf_in_stream);
1446 const abbrev_code = try leb.readULEB128(u64, &s.stream);
15081447 if (abbrev_code == 0) return result;
15091448 try result.append(AbbrevTableEntry{
15101449 .abbrev_code = abbrev_code,
1511 .tag_id = try leb.readULEB128(u64, di.dwarf_in_stream),
1512 .has_children = (try di.dwarf_in_stream.readByte()) == DW.CHILDREN_yes,
1450 .tag_id = try leb.readULEB128(u64, &s.stream),
1451 .has_children = (try s.stream.readByte()) == DW.CHILDREN_yes,
15131452 .attrs = ArrayList(AbbrevAttr).init(di.allocator()),
15141453 });
15151454 const attrs = &result.items[result.len - 1].attrs;
15161455
15171456 while (true) {
1518 const attr_id = try leb.readULEB128(u64, di.dwarf_in_stream);
1519 const form_id = try leb.readULEB128(u64, di.dwarf_in_stream);
1457 const attr_id = try leb.readULEB128(u64, &s.stream);
1458 const form_id = try leb.readULEB128(u64, &s.stream);
15201459 if (attr_id == 0 and form_id == 0) break;
15211460 try attrs.append(AbbrevAttr{
15221461 .attr_id = attr_id,
......@@ -1526,8 +1465,8 @@ pub const DwarfInfo = struct {
15261465 }
15271466 }
15281467
1529 fn parseDie(di: *DwarfInfo, abbrev_table: *const AbbrevTable, is_64: bool) !?Die {
1530 const abbrev_code = try leb.readULEB128(u64, di.dwarf_in_stream);
1468 fn parseDie(di: *DwarfInfo, in_stream: var, abbrev_table: *const AbbrevTable, is_64: bool) !?Die {
1469 const abbrev_code = try leb.readULEB128(u64, in_stream);
15311470 if (abbrev_code == 0) return null;
15321471 const table_entry = getAbbrevTableEntry(abbrev_table, abbrev_code) orelse return error.InvalidDebugInfo;
15331472
......@@ -1540,63 +1479,63 @@ pub const DwarfInfo = struct {
15401479 for (table_entry.attrs.toSliceConst()) |attr, i| {
15411480 result.attrs.items[i] = Die.Attr{
15421481 .id = attr.attr_id,
1543 .value = try parseFormValue(di.allocator(), di.dwarf_in_stream, attr.form_id, is_64),
1482 .value = try parseFormValue(di.allocator(), in_stream, attr.form_id, is_64),
15441483 };
15451484 }
15461485 return result;
15471486 }
15481487
15491488 fn getLineNumberInfo(di: *DwarfInfo, compile_unit: CompileUnit, target_address: usize) !LineInfo {
1489 var s = io.SliceSeekableInStream.init(di.debug_line);
1490
15501491 const compile_unit_cwd = try compile_unit.die.getAttrString(di, DW.AT_comp_dir);
15511492 const line_info_offset = try compile_unit.die.getAttrSecOffset(DW.AT_stmt_list);
15521493
1553 assert(line_info_offset < di.debug_line.size);
1554
1555 try di.dwarf_seekable_stream.seekTo(di.debug_line.offset + line_info_offset);
1494 try s.seekable_stream.seekTo(line_info_offset);
15561495
15571496 var is_64: bool = undefined;
1558 const unit_length = try readInitialLength(@TypeOf(di.dwarf_in_stream.readFn).ReturnType.ErrorSet, di.dwarf_in_stream, &is_64);
1497 const unit_length = try readInitialLength(@TypeOf(s.stream.readFn).ReturnType.ErrorSet, &s.stream, &is_64);
15591498 if (unit_length == 0) {
15601499 return error.MissingDebugInfo;
15611500 }
15621501 const next_offset = unit_length + (if (is_64) @as(usize, 12) else @as(usize, 4));
15631502
1564 const version = try di.dwarf_in_stream.readInt(u16, di.endian);
1503 const version = try s.stream.readInt(u16, di.endian);
15651504 // TODO support 3 and 5
15661505 if (version != 2 and version != 4) return error.InvalidDebugInfo;
15671506
1568 const prologue_length = if (is_64) try di.dwarf_in_stream.readInt(u64, di.endian) else try di.dwarf_in_stream.readInt(u32, di.endian);
1569 const prog_start_offset = (try di.dwarf_seekable_stream.getPos()) + prologue_length;
1507 const prologue_length = if (is_64) try s.stream.readInt(u64, di.endian) else try s.stream.readInt(u32, di.endian);
1508 const prog_start_offset = (try s.seekable_stream.getPos()) + prologue_length;
15701509
1571 const minimum_instruction_length = try di.dwarf_in_stream.readByte();
1510 const minimum_instruction_length = try s.stream.readByte();
15721511 if (minimum_instruction_length == 0) return error.InvalidDebugInfo;
15731512
15741513 if (version >= 4) {
15751514 // maximum_operations_per_instruction
1576 _ = try di.dwarf_in_stream.readByte();
1515 _ = try s.stream.readByte();
15771516 }
15781517
1579 const default_is_stmt = (try di.dwarf_in_stream.readByte()) != 0;
1580 const line_base = try di.dwarf_in_stream.readByteSigned();
1518 const default_is_stmt = (try s.stream.readByte()) != 0;
1519 const line_base = try s.stream.readByteSigned();
15811520
1582 const line_range = try di.dwarf_in_stream.readByte();
1521 const line_range = try s.stream.readByte();
15831522 if (line_range == 0) return error.InvalidDebugInfo;
15841523
1585 const opcode_base = try di.dwarf_in_stream.readByte();
1524 const opcode_base = try s.stream.readByte();
15861525
15871526 const standard_opcode_lengths = try di.allocator().alloc(u8, opcode_base - 1);
15881527
15891528 {
15901529 var i: usize = 0;
15911530 while (i < opcode_base - 1) : (i += 1) {
1592 standard_opcode_lengths[i] = try di.dwarf_in_stream.readByte();
1531 standard_opcode_lengths[i] = try s.stream.readByte();
15931532 }
15941533 }
15951534
15961535 var include_directories = ArrayList([]u8).init(di.allocator());
15971536 try include_directories.append(compile_unit_cwd);
15981537 while (true) {
1599 const dir = try di.readString();
1538 const dir = try readStringRaw(di.allocator(), &s.stream);
16001539 if (dir.len == 0) break;
16011540 try include_directories.append(dir);
16021541 }
......@@ -1605,11 +1544,11 @@ pub const DwarfInfo = struct {
16051544 var prog = LineNumberProgram.init(default_is_stmt, include_directories.toSliceConst(), &file_entries, target_address);
16061545
16071546 while (true) {
1608 const file_name = try di.readString();
1547 const file_name = try readStringRaw(di.allocator(), &s.stream);
16091548 if (file_name.len == 0) break;
1610 const dir_index = try leb.readULEB128(usize, di.dwarf_in_stream);
1611 const mtime = try leb.readULEB128(usize, di.dwarf_in_stream);
1612 const len_bytes = try leb.readULEB128(usize, di.dwarf_in_stream);
1549 const dir_index = try leb.readULEB128(usize, &s.stream);
1550 const mtime = try leb.readULEB128(usize, &s.stream);
1551 const len_bytes = try leb.readULEB128(usize, &s.stream);
16131552 try file_entries.append(FileEntry{
16141553 .file_name = file_name,
16151554 .dir_index = dir_index,
......@@ -1618,30 +1557,32 @@ pub const DwarfInfo = struct {
16181557 });
16191558 }
16201559
1621 try di.dwarf_seekable_stream.seekTo(prog_start_offset);
1560 try s.seekable_stream.seekTo(prog_start_offset);
16221561
1623 while (true) {
1624 const opcode = try di.dwarf_in_stream.readByte();
1562 const next_unit_pos = line_info_offset + next_offset;
1563
1564 while ((try s.seekable_stream.getPos()) < next_unit_pos) {
1565 const opcode = try s.stream.readByte();
16251566
16261567 if (opcode == DW.LNS_extended_op) {
1627 const op_size = try leb.readULEB128(u64, di.dwarf_in_stream);
1568 const op_size = try leb.readULEB128(u64, &s.stream);
16281569 if (op_size < 1) return error.InvalidDebugInfo;
1629 var sub_op = try di.dwarf_in_stream.readByte();
1570 var sub_op = try s.stream.readByte();
16301571 switch (sub_op) {
16311572 DW.LNE_end_sequence => {
16321573 prog.end_sequence = true;
16331574 if (try prog.checkLineMatch()) |info| return info;
1634 return error.MissingDebugInfo;
1575 prog.reset();
16351576 },
16361577 DW.LNE_set_address => {
1637 const addr = try di.dwarf_in_stream.readInt(usize, di.endian);
1578 const addr = try s.stream.readInt(usize, di.endian);
16381579 prog.address = addr;
16391580 },
16401581 DW.LNE_define_file => {
1641 const file_name = try di.readString();
1642 const dir_index = try leb.readULEB128(usize, di.dwarf_in_stream);
1643 const mtime = try leb.readULEB128(usize, di.dwarf_in_stream);
1644 const len_bytes = try leb.readULEB128(usize, di.dwarf_in_stream);
1582 const file_name = try readStringRaw(di.allocator(), &s.stream);
1583 const dir_index = try leb.readULEB128(usize, &s.stream);
1584 const mtime = try leb.readULEB128(usize, &s.stream);
1585 const len_bytes = try leb.readULEB128(usize, &s.stream);
16451586 try file_entries.append(FileEntry{
16461587 .file_name = file_name,
16471588 .dir_index = dir_index,
......@@ -1651,7 +1592,7 @@ pub const DwarfInfo = struct {
16511592 },
16521593 else => {
16531594 const fwd_amt = math.cast(isize, op_size - 1) catch return error.InvalidDebugInfo;
1654 try di.dwarf_seekable_stream.seekBy(fwd_amt);
1595 try s.seekable_stream.seekBy(fwd_amt);
16551596 },
16561597 }
16571598 } else if (opcode >= opcode_base) {
......@@ -1670,19 +1611,19 @@ pub const DwarfInfo = struct {
16701611 prog.basic_block = false;
16711612 },
16721613 DW.LNS_advance_pc => {
1673 const arg = try leb.readULEB128(usize, di.dwarf_in_stream);
1614 const arg = try leb.readULEB128(usize, &s.stream);
16741615 prog.address += arg * minimum_instruction_length;
16751616 },
16761617 DW.LNS_advance_line => {
1677 const arg = try leb.readILEB128(i64, di.dwarf_in_stream);
1618 const arg = try leb.readILEB128(i64, &s.stream);
16781619 prog.line += arg;
16791620 },
16801621 DW.LNS_set_file => {
1681 const arg = try leb.readULEB128(usize, di.dwarf_in_stream);
1622 const arg = try leb.readULEB128(usize, &s.stream);
16821623 prog.file = arg;
16831624 },
16841625 DW.LNS_set_column => {
1685 const arg = try leb.readULEB128(u64, di.dwarf_in_stream);
1626 const arg = try leb.readULEB128(u64, &s.stream);
16861627 prog.column = arg;
16871628 },
16881629 DW.LNS_negate_stmt => {
......@@ -1696,14 +1637,14 @@ pub const DwarfInfo = struct {
16961637 prog.address += inc_addr;
16971638 },
16981639 DW.LNS_fixed_advance_pc => {
1699 const arg = try di.dwarf_in_stream.readInt(u16, di.endian);
1640 const arg = try s.stream.readInt(u16, di.endian);
17001641 prog.address += arg;
17011642 },
17021643 DW.LNS_set_prologue_end => {},
17031644 else => {
17041645 if (opcode - 1 >= standard_opcode_lengths.len) return error.InvalidDebugInfo;
17051646 const len_bytes = standard_opcode_lengths[opcode - 1];
1706 try di.dwarf_seekable_stream.seekBy(len_bytes);
1647 try s.seekable_stream.seekBy(len_bytes);
17071648 },
17081649 }
17091650 }
......@@ -1713,9 +1654,17 @@ pub const DwarfInfo = struct {
17131654 }
17141655
17151656 fn getString(di: *DwarfInfo, offset: u64) ![]u8 {
1716 const pos = di.debug_str.offset + offset;
1717 try di.dwarf_seekable_stream.seekTo(pos);
1718 return di.readString();
1657 if (offset > di.debug_str.len)
1658 return error.InvalidDebugInfo;
1659 const casted_offset = math.cast(usize, offset) catch
1660 return error.InvalidDebugInfo;
1661
1662 // Valid strings always have a terminating zero byte
1663 if (mem.indexOfScalarPos(u8, di.debug_str, casted_offset, 0)) |last| {
1664 return di.debug_str[casted_offset..last];
1665 }
1666
1667 return error.InvalidDebugInfo;
17191668 }
17201669};
17211670
......@@ -1727,7 +1676,7 @@ pub const DebugInfo = switch (builtin.os) {
17271676
17281677 const OFileTable = std.HashMap(
17291678 *macho.nlist_64,
1730 MachOFile,
1679 DwarfInfo,
17311680 std.hash_map.getHashPtrAddrFn(*macho.nlist_64),
17321681 std.hash_map.getTrivialEqlFn(*macho.nlist_64),
17331682 );
......@@ -1888,6 +1837,7 @@ const LineNumberProgram = struct {
18881837 basic_block: bool,
18891838 end_sequence: bool,
18901839
1840 default_is_stmt: bool,
18911841 target_address: usize,
18921842 include_dirs: []const []const u8,
18931843 file_entries: *ArrayList(FileEntry),
......@@ -1900,6 +1850,25 @@ const LineNumberProgram = struct {
19001850 prev_basic_block: bool,
19011851 prev_end_sequence: bool,
19021852
1853 // Reset the state machine following the DWARF specification
1854 pub fn reset(self: *LineNumberProgram) void {
1855 self.address = 0;
1856 self.file = 1;
1857 self.line = 1;
1858 self.column = 0;
1859 self.is_stmt = self.default_is_stmt;
1860 self.basic_block = false;
1861 self.end_sequence = false;
1862 // Invalidate all the remaining fields
1863 self.prev_address = 0;
1864 self.prev_file = undefined;
1865 self.prev_line = undefined;
1866 self.prev_column = undefined;
1867 self.prev_is_stmt = undefined;
1868 self.prev_basic_block = undefined;
1869 self.prev_end_sequence = undefined;
1870 }
1871
19031872 pub fn init(is_stmt: bool, include_dirs: []const []const u8, file_entries: *ArrayList(FileEntry), target_address: usize) LineNumberProgram {
19041873 return LineNumberProgram{
19051874 .address = 0,
......@@ -1911,6 +1880,7 @@ const LineNumberProgram = struct {
19111880 .end_sequence = false,
19121881 .include_dirs = include_dirs,
19131882 .file_entries = file_entries,
1883 .default_is_stmt = is_stmt,
19141884 .target_address = target_address,
19151885 .prev_address = 0,
19161886 .prev_file = undefined,
......@@ -2100,24 +2070,32 @@ fn getAbbrevTableEntry(abbrev_table: *const AbbrevTable, abbrev_code: u64) ?*con
21002070 return null;
21012071}
21022072
2103fn getLineNumberInfoMacOs(di: *DebugInfo, symbol: MachoSymbol, target_address: usize) !LineInfo {
2073fn getLineNumberInfoMacOs(di: *DebugInfo, symbol: MachoSymbol, address: usize) !LineInfo {
21042074 const ofile = symbol.ofile orelse return error.MissingDebugInfo;
21052075 const gop = try di.ofiles.getOrPut(ofile);
2106 const mach_o_file = if (gop.found_existing) &gop.kv.value else blk: {
2076 const dwarf_info = if (gop.found_existing) &gop.kv.value else blk: {
21072077 errdefer _ = di.ofiles.remove(ofile);
21082078 const ofile_path = mem.toSliceConst(u8, @ptrCast([*:0]const u8, di.strings.ptr + ofile.n_strx));
21092079
2110 gop.kv.value = MachOFile{
2111 .bytes = try std.fs.cwd().readFileAllocAligned(
2112 di.ofiles.allocator,
2113 ofile_path,
2114 maxInt(usize),
2115 @alignOf(macho.mach_header_64),
2116 ),
2117 .sect_debug_info = null,
2118 .sect_debug_line = null,
2119 };
2120 const hdr = @ptrCast(*const macho.mach_header_64, gop.kv.value.bytes.ptr);
2080 var exe_file = try std.fs.openFileAbsoluteC(ofile_path, .{});
2081 errdefer exe_file.close();
2082
2083 const exe_len = math.cast(usize, try exe_file.getEndPos()) catch
2084 return error.DebugInfoTooLarge;
2085 const exe_mmap = try os.mmap(
2086 null,
2087 exe_len,
2088 os.PROT_READ,
2089 os.MAP_SHARED,
2090 exe_file.handle,
2091 0,
2092 );
2093 errdefer os.munmap(exe_mmap);
2094
2095 const hdr = @ptrCast(
2096 *const macho.mach_header_64,
2097 @alignCast(@alignOf(macho.mach_header_64), exe_mmap.ptr),
2098 );
21212099 if (hdr.magic != std.macho.MH_MAGIC_64) return error.InvalidDebugInfo;
21222100
21232101 const hdr_base = @ptrCast([*]const u8, hdr);
......@@ -2126,181 +2104,75 @@ fn getLineNumberInfoMacOs(di: *DebugInfo, symbol: MachoSymbol, target_address: u
21262104 const segcmd = while (ncmd != 0) : (ncmd -= 1) {
21272105 const lc = @ptrCast(*const std.macho.load_command, ptr);
21282106 switch (lc.cmd) {
2129 std.macho.LC_SEGMENT_64 => break @ptrCast(*const std.macho.segment_command_64, @alignCast(@alignOf(std.macho.segment_command_64), ptr)),
2107 std.macho.LC_SEGMENT_64 => {
2108 break @ptrCast(
2109 *const std.macho.segment_command_64,
2110 @alignCast(@alignOf(std.macho.segment_command_64), ptr),
2111 );
2112 },
21302113 else => {},
21312114 }
21322115 ptr = @alignCast(@alignOf(std.macho.load_command), ptr + lc.cmdsize);
21332116 } else {
21342117 return error.MissingDebugInfo;
21352118 };
2119
2120 var opt_debug_line: ?*const macho.section_64 = null;
2121 var opt_debug_info: ?*const macho.section_64 = null;
2122 var opt_debug_abbrev: ?*const macho.section_64 = null;
2123 var opt_debug_str: ?*const macho.section_64 = null;
2124 var opt_debug_ranges: ?*const macho.section_64 = null;
2125
21362126 const sections = @ptrCast([*]const macho.section_64, @alignCast(@alignOf(macho.section_64), ptr + @sizeOf(std.macho.segment_command_64)))[0..segcmd.nsects];
21372127 for (sections) |*sect| {
2138 if (sect.flags & macho.SECTION_TYPE == macho.S_REGULAR and
2139 (sect.flags & macho.SECTION_ATTRIBUTES) & macho.S_ATTR_DEBUG == macho.S_ATTR_DEBUG)
2140 {
2141 const sect_name = mem.toSliceConst(u8, @ptrCast([*:0]const u8, &sect.sectname));
2142 if (mem.eql(u8, sect_name, "__debug_line")) {
2143 gop.kv.value.sect_debug_line = sect;
2144 } else if (mem.eql(u8, sect_name, "__debug_info")) {
2145 gop.kv.value.sect_debug_info = sect;
2146 }
2128 // The section name may not exceed 16 chars and a trailing null may
2129 // not be present
2130 const name = if (mem.indexOfScalar(u8, sect.sectname[0..], 0)) |last|
2131 sect.sectname[0..last]
2132 else
2133 sect.sectname[0..];
2134
2135 if (mem.eql(u8, name, "__debug_line")) {
2136 opt_debug_line = sect;
2137 } else if (mem.eql(u8, name, "__debug_info")) {
2138 opt_debug_info = sect;
2139 } else if (mem.eql(u8, name, "__debug_abbrev")) {
2140 opt_debug_abbrev = sect;
2141 } else if (mem.eql(u8, name, "__debug_str")) {
2142 opt_debug_str = sect;
2143 } else if (mem.eql(u8, name, "__debug_ranges")) {
2144 opt_debug_ranges = sect;
21472145 }
21482146 }
21492147
2150 break :blk &gop.kv.value;
2151 };
2152
2153 const sect_debug_line = mach_o_file.sect_debug_line orelse return error.MissingDebugInfo;
2154 var ptr = mach_o_file.bytes.ptr + sect_debug_line.offset;
2155
2156 var is_64: bool = undefined;
2157 const unit_length = try readInitialLengthMem(&ptr, &is_64);
2158 if (unit_length == 0) return error.MissingDebugInfo;
2159
2160 const version = readIntMem(&ptr, u16, builtin.Endian.Little);
2161 // TODO support 3 and 5
2162 if (version != 2 and version != 4) return error.InvalidDebugInfo;
2163
2164 const prologue_length = if (is_64)
2165 readIntMem(&ptr, u64, builtin.Endian.Little)
2166 else
2167 readIntMem(&ptr, u32, builtin.Endian.Little);
2168 const prog_start = ptr + prologue_length;
2169
2170 const minimum_instruction_length = readByteMem(&ptr);
2171 if (minimum_instruction_length == 0) return error.InvalidDebugInfo;
2172
2173 if (version >= 4) {
2174 // maximum_operations_per_instruction
2175 ptr += 1;
2176 }
2177
2178 const default_is_stmt = readByteMem(&ptr) != 0;
2179 const line_base = readByteSignedMem(&ptr);
2180
2181 const line_range = readByteMem(&ptr);
2182 if (line_range == 0) return error.InvalidDebugInfo;
2183
2184 const opcode_base = readByteMem(&ptr);
2185
2186 const standard_opcode_lengths = ptr[0 .. opcode_base - 1];
2187 ptr += opcode_base - 1;
2188
2189 var include_directories = ArrayList([]const u8).init(di.allocator());
2190 try include_directories.append("");
2191 while (true) {
2192 const dir = readStringMem(&ptr);
2193 if (dir.len == 0) break;
2194 try include_directories.append(dir);
2195 }
2196
2197 var file_entries = ArrayList(FileEntry).init(di.allocator());
2198 var prog = LineNumberProgram.init(default_is_stmt, include_directories.toSliceConst(), &file_entries, target_address);
2148 var debug_line = opt_debug_line orelse
2149 return error.MissingDebugInfo;
2150 var debug_info = opt_debug_info orelse
2151 return error.MissingDebugInfo;
2152 var debug_str = opt_debug_str orelse
2153 return error.MissingDebugInfo;
2154 var debug_abbrev = opt_debug_abbrev orelse
2155 return error.MissingDebugInfo;
21992156
2200 while (true) {
2201 const file_name = readStringMem(&ptr);
2202 if (file_name.len == 0) break;
2203 const dir_index = try leb.readULEB128Mem(usize, &ptr);
2204 const mtime = try leb.readULEB128Mem(usize, &ptr);
2205 const len_bytes = try leb.readULEB128Mem(usize, &ptr);
2206 try file_entries.append(FileEntry{
2207 .file_name = file_name,
2208 .dir_index = dir_index,
2209 .mtime = mtime,
2210 .len_bytes = len_bytes,
2211 });
2212 }
2157 gop.kv.value = DwarfInfo{
2158 .endian = .Little,
2159 .debug_info = exe_mmap[@intCast(usize, debug_info.offset)..@intCast(usize, debug_info.offset + debug_info.size)],
2160 .debug_abbrev = exe_mmap[@intCast(usize, debug_abbrev.offset)..@intCast(usize, debug_abbrev.offset + debug_abbrev.size)],
2161 .debug_str = exe_mmap[@intCast(usize, debug_str.offset)..@intCast(usize, debug_str.offset + debug_str.size)],
2162 .debug_line = exe_mmap[@intCast(usize, debug_line.offset)..@intCast(usize, debug_line.offset + debug_line.size)],
2163 .debug_ranges = if (opt_debug_ranges) |debug_ranges|
2164 exe_mmap[@intCast(usize, debug_ranges.offset)..@intCast(usize, debug_ranges.offset + debug_ranges.size)]
2165 else
2166 null,
2167 };
2168 try openDwarfDebugInfo(&gop.kv.value, di.allocator());
22132169
2214 ptr = prog_start;
2215 while (true) {
2216 const opcode = readByteMem(&ptr);
2217
2218 if (opcode == DW.LNS_extended_op) {
2219 const op_size = try leb.readULEB128Mem(u64, &ptr);
2220 if (op_size < 1) return error.InvalidDebugInfo;
2221 var sub_op = readByteMem(&ptr);
2222 switch (sub_op) {
2223 DW.LNE_end_sequence => {
2224 prog.end_sequence = true;
2225 if (try prog.checkLineMatch()) |info| return info;
2226 return error.MissingDebugInfo;
2227 },
2228 DW.LNE_set_address => {
2229 const addr = readIntMem(&ptr, usize, builtin.Endian.Little);
2230 prog.address = symbol.reloc + addr;
2231 },
2232 DW.LNE_define_file => {
2233 const file_name = readStringMem(&ptr);
2234 const dir_index = try leb.readULEB128Mem(usize, &ptr);
2235 const mtime = try leb.readULEB128Mem(usize, &ptr);
2236 const len_bytes = try leb.readULEB128Mem(usize, &ptr);
2237 try file_entries.append(FileEntry{
2238 .file_name = file_name,
2239 .dir_index = dir_index,
2240 .mtime = mtime,
2241 .len_bytes = len_bytes,
2242 });
2243 },
2244 else => {
2245 ptr += op_size - 1;
2246 },
2247 }
2248 } else if (opcode >= opcode_base) {
2249 // special opcodes
2250 const adjusted_opcode = opcode - opcode_base;
2251 const inc_addr = minimum_instruction_length * (adjusted_opcode / line_range);
2252 const inc_line = @as(i32, line_base) + @as(i32, adjusted_opcode % line_range);
2253 prog.line += inc_line;
2254 prog.address += inc_addr;
2255 if (try prog.checkLineMatch()) |info| return info;
2256 prog.basic_block = false;
2257 } else {
2258 switch (opcode) {
2259 DW.LNS_copy => {
2260 if (try prog.checkLineMatch()) |info| return info;
2261 prog.basic_block = false;
2262 },
2263 DW.LNS_advance_pc => {
2264 const arg = try leb.readULEB128Mem(usize, &ptr);
2265 prog.address += arg * minimum_instruction_length;
2266 },
2267 DW.LNS_advance_line => {
2268 const arg = try leb.readILEB128Mem(i64, &ptr);
2269 prog.line += arg;
2270 },
2271 DW.LNS_set_file => {
2272 const arg = try leb.readULEB128Mem(usize, &ptr);
2273 prog.file = arg;
2274 },
2275 DW.LNS_set_column => {
2276 const arg = try leb.readULEB128Mem(u64, &ptr);
2277 prog.column = arg;
2278 },
2279 DW.LNS_negate_stmt => {
2280 prog.is_stmt = !prog.is_stmt;
2281 },
2282 DW.LNS_set_basic_block => {
2283 prog.basic_block = true;
2284 },
2285 DW.LNS_const_add_pc => {
2286 const inc_addr = minimum_instruction_length * ((255 - opcode_base) / line_range);
2287 prog.address += inc_addr;
2288 },
2289 DW.LNS_fixed_advance_pc => {
2290 const arg = readIntMem(&ptr, u16, builtin.Endian.Little);
2291 prog.address += arg;
2292 },
2293 DW.LNS_set_prologue_end => {},
2294 else => {
2295 if (opcode - 1 >= standard_opcode_lengths.len) return error.InvalidDebugInfo;
2296 const len_bytes = standard_opcode_lengths[opcode - 1];
2297 ptr += len_bytes;
2298 },
2299 }
2300 }
2301 }
2170 break :blk &gop.kv.value;
2171 };
23022172
2303 return error.MissingDebugInfo;
2173 const o_file_address = address - symbol.reloc;
2174 const compile_unit = try dwarf_info.findCompileUnit(o_file_address);
2175 return dwarf_info.getLineNumberInfo(compile_unit.*, o_file_address);
23042176}
23052177
23062178const Func = struct {
......@@ -2308,47 +2180,6 @@ const Func = struct {
23082180 name: ?[]u8,
23092181};
23102182
2311fn readIntMem(ptr: *[*]const u8, comptime T: type, endian: builtin.Endian) T {
2312 // TODO https://github.com/ziglang/zig/issues/863
2313 const size = (T.bit_count + 7) / 8;
2314 const result = mem.readIntSlice(T, ptr.*[0..size], endian);
2315 ptr.* += size;
2316 return result;
2317}
2318
2319fn readByteMem(ptr: *[*]const u8) u8 {
2320 const result = ptr.*[0];
2321 ptr.* += 1;
2322 return result;
2323}
2324
2325fn readByteSignedMem(ptr: *[*]const u8) i8 {
2326 return @bitCast(i8, readByteMem(ptr));
2327}
2328
2329fn readInitialLengthMem(ptr: *[*]const u8, is_64: *bool) !u64 {
2330 // TODO this code can be improved with https://github.com/ziglang/zig/issues/863
2331 const first_32_bits = mem.readIntSliceLittle(u32, ptr.*[0..4]);
2332 is_64.* = (first_32_bits == 0xffffffff);
2333 if (is_64.*) {
2334 ptr.* += 4;
2335 const result = mem.readIntSliceLittle(u64, ptr.*[0..8]);
2336 ptr.* += 8;
2337 return result;
2338 } else {
2339 if (first_32_bits >= 0xfffffff0) return error.InvalidDebugInfo;
2340 ptr.* += 4;
2341 // TODO this cast should not be needed
2342 return @as(u64, first_32_bits);
2343 }
2344}
2345
2346fn readStringMem(ptr: *[*]const u8) [:0]const u8 {
2347 const result = mem.toSliceConst(u8, @ptrCast([*:0]const u8, ptr.*));
2348 ptr.* += result.len + 1;
2349 return result;
2350}
2351
23522183fn readInitialLength(comptime E: type, in_stream: *io.InStream(E), is_64: *bool) !u64 {
23532184 const first_32_bits = try in_stream.readIntLittle(u32);
23542185 is_64.* = (first_32_bits == 0xffffffff);
lib/std/fmt.zig+5
......@@ -1135,6 +1135,11 @@ fn countSize(size: *usize, bytes: []const u8) (error{}!void) {
11351135 size.* += bytes.len;
11361136}
11371137
1138pub fn allocPrint0(allocator: *mem.Allocator, comptime fmt: []const u8, args: var) AllocPrintError![:0]u8 {
1139 const result = try allocPrint(allocator, fmt ++ "\x00", args);
1140 return result[0 .. result.len - 1 :0];
1141}
1142
11381143test "bufPrintInt" {
11391144 var buffer: [100]u8 = undefined;
11401145 const buf = buffer[0..];
lib/std/fmt/parse_float.zig+4
......@@ -382,6 +382,10 @@ pub fn parseFloat(comptime T: type, s: []const u8) !T {
382382}
383383
384384test "fmt.parseFloat" {
385 if (std.Target.current.isWindows()) {
386 // TODO https://github.com/ziglang/zig/issues/508
387 return error.SkipZigTest;
388 }
385389 const testing = std.testing;
386390 const expect = testing.expect;
387391 const expectEqual = testing.expectEqual;
lib/std/hash/murmur.zig+3-3
......@@ -15,7 +15,7 @@ pub const Murmur2_32 = struct {
1515 const m: u32 = 0x5bd1e995;
1616 const len = @truncate(u32, str.len);
1717 var h1: u32 = seed ^ len;
18 for (@ptrCast([*]allowzero align(1) const u32, str.ptr)[0..(len >> 2)]) |v| {
18 for (@ptrCast([*]align(1) const u32, str.ptr)[0..(len >> 2)]) |v| {
1919 var k1: u32 = v;
2020 if (builtin.endian == builtin.Endian.Big)
2121 k1 = @byteSwap(u32, k1);
......@@ -100,7 +100,7 @@ pub const Murmur2_64 = struct {
100100 const m: u64 = 0xc6a4a7935bd1e995;
101101 const len = @as(u64, str.len);
102102 var h1: u64 = seed ^ (len *% m);
103 for (@ptrCast([*]allowzero align(1) const u64, str.ptr)[0..@intCast(usize, len >> 3)]) |v| {
103 for (@ptrCast([*]align(1) const u64, str.ptr)[0..@intCast(usize, len >> 3)]) |v| {
104104 var k1: u64 = v;
105105 if (builtin.endian == builtin.Endian.Big)
106106 k1 = @byteSwap(u64, k1);
......@@ -180,7 +180,7 @@ pub const Murmur3_32 = struct {
180180 const c2: u32 = 0x1b873593;
181181 const len = @truncate(u32, str.len);
182182 var h1: u32 = seed;
183 for (@ptrCast([*]allowzero align(1) const u32, str.ptr)[0..(len >> 2)]) |v| {
183 for (@ptrCast([*]align(1) const u32, str.ptr)[0..(len >> 2)]) |v| {
184184 var k1: u32 = v;
185185 if (builtin.endian == builtin.Endian.Big)
186186 k1 = @byteSwap(u32, k1);
lib/std/http/headers.zig+1-1
......@@ -172,7 +172,7 @@ pub const Headers = struct {
172172 var dex = HeaderIndexList.init(self.allocator);
173173 try dex.append(n - 1);
174174 errdefer dex.deinit();
175 _ = try self.index.put(name, dex);
175 _ = try self.index.put(name_dup, dex);
176176 }
177177 self.data.appendAssumeCapacity(entry);
178178 }
lib/std/io/out_stream.zig+8-4
......@@ -45,10 +45,14 @@ pub fn OutStream(comptime WriteError: type) type {
4545 }
4646
4747 pub fn writeByteNTimes(self: *Self, byte: u8, n: usize) Error!void {
48 const slice = @as(*const [1]u8, &byte)[0..];
49 var i: usize = 0;
50 while (i < n) : (i += 1) {
51 try self.writeFn(self, slice);
48 var bytes: [256]u8 = undefined;
49 mem.set(u8, bytes[0..], byte);
50
51 var remaining: usize = n;
52 while (remaining > 0) {
53 const to_write = std.math.min(remaining, bytes.len);
54 try self.writeFn(self, bytes[0..to_write]);
55 remaining -= to_write;
5256 }
5357 }
5458
lib/std/io/test.zig+4
......@@ -547,6 +547,10 @@ fn testSerializerDeserializer(comptime endian: builtin.Endian, comptime packing:
547547}
548548
549549test "Serializer/Deserializer generic" {
550 if (std.Target.current.isWindows()) {
551 // TODO https://github.com/ziglang/zig/issues/508
552 return error.SkipZigTest;
553 }
550554 try testSerializerDeserializer(builtin.Endian.Big, .Byte);
551555 try testSerializerDeserializer(builtin.Endian.Little, .Byte);
552556 try testSerializerDeserializer(builtin.Endian.Big, .Bit);
lib/std/math/fabs.zig+4
......@@ -95,6 +95,10 @@ test "math.fabs64.special" {
9595}
9696
9797test "math.fabs128.special" {
98 if (std.Target.current.isWindows()) {
99 // TODO https://github.com/ziglang/zig/issues/508
100 return error.SkipZigTest;
101 }
98102 expect(math.isPositiveInf(fabs(math.inf(f128))));
99103 expect(math.isPositiveInf(fabs(-math.inf(f128))));
100104 expect(math.isNan(fabs(math.nan(f128))));
lib/std/math/isinf.zig+12
......@@ -74,6 +74,10 @@ pub fn isNegativeInf(x: var) bool {
7474}
7575
7676test "math.isInf" {
77 if (std.Target.current.isWindows()) {
78 // TODO https://github.com/ziglang/zig/issues/508
79 return error.SkipZigTest;
80 }
7781 expect(!isInf(@as(f16, 0.0)));
7882 expect(!isInf(@as(f16, -0.0)));
7983 expect(!isInf(@as(f32, 0.0)));
......@@ -93,6 +97,10 @@ test "math.isInf" {
9397}
9498
9599test "math.isPositiveInf" {
100 if (std.Target.current.isWindows()) {
101 // TODO https://github.com/ziglang/zig/issues/508
102 return error.SkipZigTest;
103 }
96104 expect(!isPositiveInf(@as(f16, 0.0)));
97105 expect(!isPositiveInf(@as(f16, -0.0)));
98106 expect(!isPositiveInf(@as(f32, 0.0)));
......@@ -112,6 +120,10 @@ test "math.isPositiveInf" {
112120}
113121
114122test "math.isNegativeInf" {
123 if (std.Target.current.isWindows()) {
124 // TODO https://github.com/ziglang/zig/issues/508
125 return error.SkipZigTest;
126 }
115127 expect(!isNegativeInf(@as(f16, 0.0)));
116128 expect(!isNegativeInf(@as(f16, -0.0)));
117129 expect(!isNegativeInf(@as(f32, 0.0)));
lib/std/math/isnan.zig+4
......@@ -16,6 +16,10 @@ pub fn isSignalNan(x: var) bool {
1616}
1717
1818test "math.isNan" {
19 if (std.Target.current.isWindows()) {
20 // TODO https://github.com/ziglang/zig/issues/508
21 return error.SkipZigTest;
22 }
1923 expect(isNan(math.nan(f16)));
2024 expect(isNan(math.nan(f32)));
2125 expect(isNan(math.nan(f64)));
lib/std/mem.zig+3
......@@ -175,6 +175,7 @@ pub const Allocator = struct {
175175
176176 const old_byte_slice = @sliceToBytes(old_mem);
177177 const byte_count = math.mul(usize, @sizeOf(T), new_n) catch return Error.OutOfMemory;
178 // Note: can't set shrunk memory to undefined as memory shouldn't be modified on realloc failure
178179 const byte_slice = try self.reallocFn(self, old_byte_slice, Slice.alignment, byte_count, new_alignment);
179180 assert(byte_slice.len == byte_count);
180181 if (new_n > old_mem.len) {
......@@ -221,6 +222,7 @@ pub const Allocator = struct {
221222 const byte_count = @sizeOf(T) * new_n;
222223
223224 const old_byte_slice = @sliceToBytes(old_mem);
225 @memset(old_byte_slice.ptr + byte_count, undefined, old_byte_slice.len - byte_count);
224226 const byte_slice = self.shrinkFn(self, old_byte_slice, Slice.alignment, byte_count, new_alignment);
225227 assert(byte_slice.len == byte_count);
226228 return @bytesToSlice(T, @alignCast(new_alignment, byte_slice));
......@@ -234,6 +236,7 @@ pub const Allocator = struct {
234236 const bytes_len = bytes.len + @boolToInt(Slice.sentinel != null);
235237 if (bytes_len == 0) return;
236238 const non_const_ptr = @intToPtr([*]u8, @ptrToInt(bytes.ptr));
239 @memset(non_const_ptr, undefined, bytes_len);
237240 const shrink_result = self.shrinkFn(self, non_const_ptr[0..bytes_len], Slice.alignment, 0, 1);
238241 assert(shrink_result.len == 0);
239242 }
lib/std/meta.zig+18
......@@ -556,3 +556,21 @@ pub fn refAllDecls(comptime T: type) void {
556556 if (!builtin.is_test) return;
557557 _ = declarations(T);
558558}
559
560/// Returns a slice of pointers to public declarations of a namespace.
561pub fn declList(comptime Namespace: type, comptime Decl: type) []const *const Decl {
562 const S = struct {
563 fn declNameLessThan(lhs: *const Decl, rhs: *const Decl) bool {
564 return mem.lessThan(u8, lhs.name, rhs.name);
565 }
566 };
567 comptime {
568 const decls = declarations(Namespace);
569 var array: [decls.len]*const Decl = undefined;
570 for (decls) |decl, i| {
571 array[i] = &@field(Namespace, decl.name);
572 }
573 std.sort.sort(*const Decl, &array, S.declNameLessThan);
574 return &array;
575 }
576}
lib/std/os.zig+1-1
......@@ -2697,7 +2697,7 @@ pub fn dl_iterate_phdr(
26972697 // the whole ELF image
26982698 if (it.end()) {
26992699 var info = dl_phdr_info{
2700 .dlpi_addr = elf_base,
2700 .dlpi_addr = 0,
27012701 .dlpi_name = "/proc/self/exe",
27022702 .dlpi_phdr = phdrs.ptr,
27032703 .dlpi_phnum = ehdr.e_phnum,
lib/std/os/linux.zig-57
......@@ -1041,63 +1041,6 @@ pub fn uname(uts: *utsname) usize {
10411041 return syscall1(SYS_uname, @ptrToInt(uts));
10421042}
10431043
1044// XXX: This should be weak
1045extern const __ehdr_start: elf.Ehdr;
1046
1047pub fn dl_iterate_phdr(comptime T: type, callback: extern fn (info: *dl_phdr_info, size: usize, data: ?*T) i32, data: ?*T) isize {
1048 if (builtin.link_libc) {
1049 return std.c.dl_iterate_phdr(@ptrCast(std.c.dl_iterate_phdr_callback, callback), @ptrCast(?*c_void, data));
1050 }
1051
1052 const elf_base = @ptrToInt(&__ehdr_start);
1053 const n_phdr = __ehdr_start.e_phnum;
1054 const phdrs = (@intToPtr([*]elf.Phdr, elf_base + __ehdr_start.e_phoff))[0..n_phdr];
1055
1056 var it = dl.linkmap_iterator(phdrs) catch return 0;
1057
1058 // The executable has no dynamic link segment, create a single entry for
1059 // the whole ELF image
1060 if (it.end()) {
1061 var info = dl_phdr_info{
1062 .dlpi_addr = elf_base,
1063 .dlpi_name = "/proc/self/exe",
1064 .dlpi_phdr = @intToPtr([*]elf.Phdr, elf_base + __ehdr_start.e_phoff),
1065 .dlpi_phnum = __ehdr_start.e_phnum,
1066 };
1067
1068 return callback(&info, @sizeOf(dl_phdr_info), data);
1069 }
1070
1071 // Last return value from the callback function
1072 var last_r: isize = 0;
1073 while (it.next()) |entry| {
1074 var dlpi_phdr: usize = undefined;
1075 var dlpi_phnum: u16 = undefined;
1076
1077 if (entry.l_addr != 0) {
1078 const elf_header = @intToPtr(*elf.Ehdr, entry.l_addr);
1079 dlpi_phdr = entry.l_addr + elf_header.e_phoff;
1080 dlpi_phnum = elf_header.e_phnum;
1081 } else {
1082 // This is the running ELF image
1083 dlpi_phdr = elf_base + __ehdr_start.e_phoff;
1084 dlpi_phnum = __ehdr_start.e_phnum;
1085 }
1086
1087 var info = dl_phdr_info{
1088 .dlpi_addr = entry.l_addr,
1089 .dlpi_name = entry.l_name,
1090 .dlpi_phdr = @intToPtr([*]elf.Phdr, dlpi_phdr),
1091 .dlpi_phnum = dlpi_phnum,
1092 };
1093
1094 last_r = callback(&info, @sizeOf(dl_phdr_info), data);
1095 if (last_r != 0) break;
1096 }
1097
1098 return last_r;
1099}
1100
11011044pub fn io_uring_setup(entries: u32, p: *io_uring_params) usize {
11021045 return syscall2(SYS_io_uring_setup, entries, @ptrToInt(p));
11031046}
lib/std/os/linux/tls.zig+1-1
......@@ -211,7 +211,7 @@ pub fn initTLS() ?*elf.Phdr {
211211
212212 if (tls_phdr) |phdr| {
213213 // If the cpu is arm-based, check if it supports the TLS register
214 if (builtin.arch == builtin.Arch.arm and at_hwcap & std.os.linux.HWCAP_TLS == 0) {
214 if (builtin.arch == .arm and at_hwcap & std.os.linux.HWCAP_TLS == 0) {
215215 // If the CPU does not support TLS via a coprocessor register,
216216 // a kernel helper function can be used instead on certain linux kernels.
217217 // See linux/arch/arm/include/asm/tls.h and musl/src/thread/arm/__set_thread_area.c.
lib/std/os/test.zig+2-1
......@@ -186,8 +186,9 @@ fn iter_fn(info: *dl_phdr_info, size: usize, data: ?*usize) callconv(.C) i32 {
186186
187187 if (phdr.p_type != elf.PT_LOAD) continue;
188188
189 const reloc_addr = info.dlpi_addr + phdr.p_vaddr;
189190 // Find the ELF header
190 const elf_header = @intToPtr(*elf.Ehdr, phdr.p_vaddr - phdr.p_offset);
191 const elf_header = @intToPtr(*elf.Ehdr, reloc_addr - phdr.p_offset);
191192 // Validate the magic
192193 if (!mem.eql(u8, elf_header.e_ident[0..4], "\x7fELF")) return -1;
193194 // Consistency check
lib/std/sort.zig+7-9
......@@ -7,16 +7,14 @@ const builtin = @import("builtin");
77
88/// Stable in-place sort. O(n) best case, O(pow(n, 2)) worst case. O(1) memory (no allocator required).
99pub fn insertionSort(comptime T: type, items: []T, lessThan: fn (lhs: T, rhs: T) bool) void {
10 {
11 var i: usize = 1;
12 while (i < items.len) : (i += 1) {
13 const x = items[i];
14 var j: usize = i;
15 while (j > 0 and lessThan(x, items[j - 1])) : (j -= 1) {
16 items[j] = items[j - 1];
17 }
18 items[j] = x;
10 var i: usize = 1;
11 while (i < items.len) : (i += 1) {
12 const x = items[i];
13 var j: usize = i;
14 while (j > 0 and lessThan(x, items[j - 1])) : (j -= 1) {
15 items[j] = items[j - 1];
1916 }
17 items[j] = x;
2018 }
2119}
2220
lib/std/special/compiler_rt.zig+1
......@@ -130,6 +130,7 @@ comptime {
130130 @export(@import("compiler_rt/int.zig").__udivmoddi4, .{ .name = "__udivmoddi4", .linkage = linkage });
131131 @export(@import("compiler_rt/popcountdi2.zig").__popcountdi2, .{ .name = "__popcountdi2", .linkage = linkage });
132132
133 @export(@import("compiler_rt/int.zig").__mulsi3, .{ .name = "__mulsi3", .linkage = linkage });
133134 @export(@import("compiler_rt/muldi3.zig").__muldi3, .{ .name = "__muldi3", .linkage = linkage });
134135 @export(@import("compiler_rt/int.zig").__divmoddi4, .{ .name = "__divmoddi4", .linkage = linkage });
135136 @export(@import("compiler_rt/int.zig").__divsi3, .{ .name = "__divsi3", .linkage = linkage });
lib/std/special/compiler_rt/addXf3_test.zig+8
......@@ -31,6 +31,10 @@ fn test__addtf3(a: f128, b: f128, expected_hi: u64, expected_lo: u64) void {
3131}
3232
3333test "addtf3" {
34 if (@import("std").Target.current.isWindows()) {
35 // TODO https://github.com/ziglang/zig/issues/508
36 return error.SkipZigTest;
37 }
3438 test__addtf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0);
3539
3640 // NaN + any = NaN
......@@ -71,6 +75,10 @@ fn test__subtf3(a: f128, b: f128, expected_hi: u64, expected_lo: u64) void {
7175}
7276
7377test "subtf3" {
78 if (@import("std").Target.current.isWindows()) {
79 // TODO https://github.com/ziglang/zig/issues/508
80 return error.SkipZigTest;
81 }
7482 // qNaN - any = qNaN
7583 test__subtf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0);
7684
lib/std/special/compiler_rt/fixtfdi_test.zig+4
......@@ -11,6 +11,10 @@ fn test__fixtfdi(a: f128, expected: i64) void {
1111}
1212
1313test "fixtfdi" {
14 if (@import("std").Target.current.isWindows()) {
15 // TODO https://github.com/ziglang/zig/issues/508
16 return error.SkipZigTest;
17 }
1418 //warn("\n", .{});
1519 test__fixtfdi(-math.f128_max, math.minInt(i64));
1620
lib/std/special/compiler_rt/fixtfsi_test.zig+4
......@@ -11,6 +11,10 @@ fn test__fixtfsi(a: f128, expected: i32) void {
1111}
1212
1313test "fixtfsi" {
14 if (@import("std").Target.current.isWindows()) {
15 // TODO https://github.com/ziglang/zig/issues/508
16 return error.SkipZigTest;
17 }
1418 //warn("\n", .{});
1519 test__fixtfsi(-math.f128_max, math.minInt(i32));
1620
lib/std/special/compiler_rt/fixtfti_test.zig+4
......@@ -11,6 +11,10 @@ fn test__fixtfti(a: f128, expected: i128) void {
1111}
1212
1313test "fixtfti" {
14 if (@import("std").Target.current.isWindows()) {
15 // TODO https://github.com/ziglang/zig/issues/508
16 return error.SkipZigTest;
17 }
1418 //warn("\n", .{});
1519 test__fixtfti(-math.f128_max, math.minInt(i128));
1620
lib/std/special/compiler_rt/fixunstfdi_test.zig+4
......@@ -7,6 +7,10 @@ fn test__fixunstfdi(a: f128, expected: u64) void {
77}
88
99test "fixunstfdi" {
10 if (@import("std").Target.current.isWindows()) {
11 // TODO https://github.com/ziglang/zig/issues/508
12 return error.SkipZigTest;
13 }
1014 test__fixunstfdi(0.0, 0);
1115
1216 test__fixunstfdi(0.5, 0);
lib/std/special/compiler_rt/fixunstfsi_test.zig+4
......@@ -9,6 +9,10 @@ fn test__fixunstfsi(a: f128, expected: u32) void {
99const inf128 = @bitCast(f128, @as(u128, 0x7fff0000000000000000000000000000));
1010
1111test "fixunstfsi" {
12 if (@import("std").Target.current.isWindows()) {
13 // TODO https://github.com/ziglang/zig/issues/508
14 return error.SkipZigTest;
15 }
1216 test__fixunstfsi(inf128, 0xffffffff);
1317 test__fixunstfsi(0, 0x0);
1418 test__fixunstfsi(0x1.23456789abcdefp+5, 0x24);
lib/std/special/compiler_rt/fixunstfti_test.zig+4
......@@ -9,6 +9,10 @@ fn test__fixunstfti(a: f128, expected: u128) void {
99const inf128 = @bitCast(f128, @as(u128, 0x7fff0000000000000000000000000000));
1010
1111test "fixunstfti" {
12 if (@import("std").Target.current.isWindows()) {
13 // TODO https://github.com/ziglang/zig/issues/508
14 return error.SkipZigTest;
15 }
1216 test__fixunstfti(inf128, 0xffffffffffffffffffffffffffffffff);
1317
1418 test__fixunstfti(0.0, 0);
lib/std/special/compiler_rt/floattitf_test.zig+4
......@@ -7,6 +7,10 @@ fn test__floattitf(a: i128, expected: f128) void {
77}
88
99test "floattitf" {
10 if (@import("std").Target.current.isWindows()) {
11 // TODO https://github.com/ziglang/zig/issues/508
12 return error.SkipZigTest;
13 }
1014 test__floattitf(0, 0.0);
1115
1216 test__floattitf(1, 1.0);
lib/std/special/compiler_rt/floatuntitf_test.zig+4
......@@ -7,6 +7,10 @@ fn test__floatuntitf(a: u128, expected: f128) void {
77}
88
99test "floatuntitf" {
10 if (@import("std").Target.current.isWindows()) {
11 // TODO https://github.com/ziglang/zig/issues/508
12 return error.SkipZigTest;
13 }
1014 test__floatuntitf(0, 0.0);
1115
1216 test__floatuntitf(1, 1.0);
lib/std/special/compiler_rt/int.zig+60
......@@ -1,6 +1,8 @@
11// Builtin functions that operate on integer types
22const builtin = @import("builtin");
33const testing = @import("std").testing;
4const maxInt = @import("std").math.maxInt;
5const minInt = @import("std").math.minInt;
46
57const udivmod = @import("udivmod.zig").udivmod;
68
......@@ -578,3 +580,61 @@ fn test_one_umodsi3(a: u32, b: u32, expected_r: u32) void {
578580 const r: u32 = __umodsi3(a, b);
579581 testing.expect(r == expected_r);
580582}
583
584pub fn __mulsi3(a: i32, b: i32) callconv(.C) i32 {
585 @setRuntimeSafety(builtin.is_test);
586
587 var ua = @bitCast(u32, a);
588 var ub = @bitCast(u32, b);
589 var r: u32 = 0;
590
591 while (ua > 0) {
592 if ((ua & 1) != 0) r +%= ub;
593 ua >>= 1;
594 ub <<= 1;
595 }
596
597 return @bitCast(i32, r);
598}
599
600fn test_one_mulsi3(a: i32, b: i32, result: i32) void {
601 testing.expectEqual(result, __mulsi3(a, b));
602}
603
604test "mulsi3" {
605 test_one_mulsi3(0, 0, 0);
606 test_one_mulsi3(0, 1, 0);
607 test_one_mulsi3(1, 0, 0);
608 test_one_mulsi3(0, 10, 0);
609 test_one_mulsi3(10, 0, 0);
610 test_one_mulsi3(0, maxInt(i32), 0);
611 test_one_mulsi3(maxInt(i32), 0, 0);
612 test_one_mulsi3(0, -1, 0);
613 test_one_mulsi3(-1, 0, 0);
614 test_one_mulsi3(0, -10, 0);
615 test_one_mulsi3(-10, 0, 0);
616 test_one_mulsi3(0, minInt(i32), 0);
617 test_one_mulsi3(minInt(i32), 0, 0);
618 test_one_mulsi3(1, 1, 1);
619 test_one_mulsi3(1, 10, 10);
620 test_one_mulsi3(10, 1, 10);
621 test_one_mulsi3(1, maxInt(i32), maxInt(i32));
622 test_one_mulsi3(maxInt(i32), 1, maxInt(i32));
623 test_one_mulsi3(1, -1, -1);
624 test_one_mulsi3(1, -10, -10);
625 test_one_mulsi3(-10, 1, -10);
626 test_one_mulsi3(1, minInt(i32), minInt(i32));
627 test_one_mulsi3(minInt(i32), 1, minInt(i32));
628 test_one_mulsi3(46340, 46340, 2147395600);
629 test_one_mulsi3(-46340, 46340, -2147395600);
630 test_one_mulsi3(46340, -46340, -2147395600);
631 test_one_mulsi3(-46340, -46340, 2147395600);
632 test_one_mulsi3(4194303, 8192, @truncate(i32, 34359730176));
633 test_one_mulsi3(-4194303, 8192, @truncate(i32, -34359730176));
634 test_one_mulsi3(4194303, -8192, @truncate(i32, -34359730176));
635 test_one_mulsi3(-4194303, -8192, @truncate(i32, 34359730176));
636 test_one_mulsi3(8192, 4194303, @truncate(i32, 34359730176));
637 test_one_mulsi3(-8192, 4194303, @truncate(i32, -34359730176));
638 test_one_mulsi3(8192, -4194303, @truncate(i32, -34359730176));
639 test_one_mulsi3(-8192, -4194303, @truncate(i32, 34359730176));
640}
lib/std/special/compiler_rt/mulXf3_test.zig+4
......@@ -44,6 +44,10 @@ fn makeNaN128(rand: u64) f128 {
4444 return float_result;
4545}
4646test "multf3" {
47 if (@import("std").Target.current.isWindows()) {
48 // TODO https://github.com/ziglang/zig/issues/508
49 return error.SkipZigTest;
50 }
4751 // qNaN * any = qNaN
4852 test__multf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0);
4953
lib/std/special/compiler_rt/truncXfYf2_test.zig+8
......@@ -151,6 +151,10 @@ fn test__trunctfsf2(a: f128, expected: u32) void {
151151}
152152
153153test "trunctfsf2" {
154 if (@import("std").Target.current.isWindows()) {
155 // TODO https://github.com/ziglang/zig/issues/508
156 return error.SkipZigTest;
157 }
154158 // qnan
155159 test__trunctfsf2(@bitCast(f128, @as(u128, 0x7fff800000000000 << 64)), 0x7fc00000);
156160 // nan
......@@ -186,6 +190,10 @@ fn test__trunctfdf2(a: f128, expected: u64) void {
186190}
187191
188192test "trunctfdf2" {
193 if (@import("std").Target.current.isWindows()) {
194 // TODO https://github.com/ziglang/zig/issues/508
195 return error.SkipZigTest;
196 }
189197 // qnan
190198 test__trunctfdf2(@bitCast(f128, @as(u128, 0x7fff800000000000 << 64)), 0x7ff8000000000000);
191199 // nan
lib/std/target.zig+370-10
......@@ -49,6 +49,22 @@ pub const Target = union(enum) {
4949 other,
5050 };
5151
52 pub const aarch64 = @import("target/aarch64.zig");
53 pub const amdgpu = @import("target/amdgpu.zig");
54 pub const arm = @import("target/arm.zig");
55 pub const avr = @import("target/avr.zig");
56 pub const bpf = @import("target/bpf.zig");
57 pub const hexagon = @import("target/hexagon.zig");
58 pub const mips = @import("target/mips.zig");
59 pub const msp430 = @import("target/msp430.zig");
60 pub const nvptx = @import("target/nvptx.zig");
61 pub const powerpc = @import("target/powerpc.zig");
62 pub const riscv = @import("target/riscv.zig");
63 pub const sparc = @import("target/sparc.zig");
64 pub const systemz = @import("target/systemz.zig");
65 pub const wasm = @import("target/wasm.zig");
66 pub const x86 = @import("target/x86.zig");
67
5268 pub const Arch = union(enum) {
5369 arm: Arm32,
5470 armeb: Arm32,
......@@ -108,12 +124,12 @@ pub const Target = union(enum) {
108124 v8_3a,
109125 v8_2a,
110126 v8_1a,
111 v8,
127 v8a,
112128 v8r,
113129 v8m_baseline,
114130 v8m_mainline,
115131 v8_1m_mainline,
116 v7,
132 v7a,
117133 v7em,
118134 v7m,
119135 v7s,
......@@ -129,8 +145,8 @@ pub const Target = union(enum) {
129145
130146 pub fn version(version: Arm32) comptime_int {
131147 return switch (version) {
132 .v8_5a, .v8_4a, .v8_3a, .v8_2a, .v8_1a, .v8, .v8r, .v8m_baseline, .v8m_mainline, .v8_1m_mainline => 8,
133 .v7, .v7em, .v7m, .v7s, .v7k, .v7ve => 7,
148 .v8_5a, .v8_4a, .v8_3a, .v8_2a, .v8_1a, .v8a, .v8r, .v8m_baseline, .v8m_mainline, .v8_1m_mainline => 8,
149 .v7a, .v7em, .v7m, .v7s, .v7k, .v7ve => 7,
134150 .v6, .v6m, .v6k, .v6t2 => 6,
135151 .v5, .v5te => 5,
136152 .v4t => 4,
......@@ -143,10 +159,7 @@ pub const Target = union(enum) {
143159 v8_3a,
144160 v8_2a,
145161 v8_1a,
146 v8,
147 v8r,
148 v8m_baseline,
149 v8m_mainline,
162 v8a,
150163 };
151164 pub const Kalimba = enum {
152165 v5,
......@@ -160,6 +173,54 @@ pub const Target = union(enum) {
160173 spe,
161174 };
162175
176 pub fn subArchName(arch: Arch) ?[]const u8 {
177 return switch (arch) {
178 .arm, .armeb, .thumb, .thumbeb => |arm32| @tagName(arm32),
179 .aarch64, .aarch64_be, .aarch64_32 => |arm64| @tagName(arm64),
180 .kalimba => |kalimba| @tagName(kalimba),
181 else => return null,
182 };
183 }
184
185 pub fn subArchFeature(arch: Arch) ?Cpu.Feature.Set.Index {
186 return switch (arch) {
187 .arm, .armeb, .thumb, .thumbeb => |arm32| switch (arm32) {
188 .v8_5a => @enumToInt(arm.Feature.armv8_5_a),
189 .v8_4a => @enumToInt(arm.Feature.armv8_4_a),
190 .v8_3a => @enumToInt(arm.Feature.armv8_3_a),
191 .v8_2a => @enumToInt(arm.Feature.armv8_2_a),
192 .v8_1a => @enumToInt(arm.Feature.armv8_1_a),
193 .v8a => @enumToInt(arm.Feature.armv8_a),
194 .v8r => @enumToInt(arm.Feature.armv8_r),
195 .v8m_baseline => @enumToInt(arm.Feature.armv8_m_base),
196 .v8m_mainline => @enumToInt(arm.Feature.armv8_m_main),
197 .v8_1m_mainline => @enumToInt(arm.Feature.armv8_1_m_main),
198 .v7a => @enumToInt(arm.Feature.armv7_a),
199 .v7em => @enumToInt(arm.Feature.armv7e_m),
200 .v7m => @enumToInt(arm.Feature.armv7_m),
201 .v7s => @enumToInt(arm.Feature.armv7s),
202 .v7k => @enumToInt(arm.Feature.armv7k),
203 .v7ve => @enumToInt(arm.Feature.armv7ve),
204 .v6 => @enumToInt(arm.Feature.armv6),
205 .v6m => @enumToInt(arm.Feature.armv6_m),
206 .v6k => @enumToInt(arm.Feature.armv6k),
207 .v6t2 => @enumToInt(arm.Feature.armv6t2),
208 .v5 => @enumToInt(arm.Feature.armv5t),
209 .v5te => @enumToInt(arm.Feature.armv5te),
210 .v4t => @enumToInt(arm.Feature.armv4t),
211 },
212 .aarch64, .aarch64_be, .aarch64_32 => |arm64| switch (arm64) {
213 .v8_5a => @enumToInt(aarch64.Feature.v8_5a),
214 .v8_4a => @enumToInt(aarch64.Feature.v8_4a),
215 .v8_3a => @enumToInt(aarch64.Feature.v8_3a),
216 .v8_2a => @enumToInt(aarch64.Feature.v8_2a),
217 .v8_1a => @enumToInt(aarch64.Feature.v8_1a),
218 .v8a => @enumToInt(aarch64.Feature.v8a),
219 },
220 else => return null,
221 };
222 }
223
163224 pub fn isARM(arch: Arch) bool {
164225 return switch (arch) {
165226 .arm, .armeb => true,
......@@ -188,6 +249,53 @@ pub const Target = union(enum) {
188249 };
189250 }
190251
252 pub fn parseCpu(arch: Arch, cpu_name: []const u8) !*const Cpu {
253 for (arch.allCpus()) |cpu| {
254 if (mem.eql(u8, cpu_name, cpu.name)) {
255 return cpu;
256 }
257 }
258 return error.UnknownCpu;
259 }
260
261 /// Comma-separated list of features, with + or - in front of each feature. This
262 /// form represents a deviation from baseline CPU, which is provided as a parameter.
263 /// Extra commas are ignored.
264 pub fn parseCpuFeatureSet(arch: Arch, cpu: *const Cpu, features_text: []const u8) !Cpu.Feature.Set {
265 const all_features = arch.allFeaturesList();
266 var set = cpu.features;
267 var it = mem.tokenize(features_text, ",");
268 while (it.next()) |item_text| {
269 var feature_name: []const u8 = undefined;
270 var op: enum {
271 add,
272 sub,
273 } = undefined;
274 if (mem.startsWith(u8, item_text, "+")) {
275 op = .add;
276 feature_name = item_text[1..];
277 } else if (mem.startsWith(u8, item_text, "-")) {
278 op = .sub;
279 feature_name = item_text[1..];
280 } else {
281 return error.InvalidCpuFeatures;
282 }
283 for (all_features) |feature, index_usize| {
284 const index = @intCast(Cpu.Feature.Set.Index, index_usize);
285 if (mem.eql(u8, feature_name, feature.name)) {
286 switch (op) {
287 .add => set.addFeature(index),
288 .sub => set.removeFeature(index),
289 }
290 break;
291 }
292 } else {
293 return error.UnknownCpuFeature;
294 }
295 }
296 return set;
297 }
298
191299 pub fn toElfMachine(arch: Arch) std.elf.EM {
192300 return switch (arch) {
193301 .avr => ._AVR,
......@@ -300,6 +408,109 @@ pub const Target = union(enum) {
300408 => .Big,
301409 };
302410 }
411
412 /// Returns a name that matches the lib/std/target/* directory name.
413 pub fn genericName(arch: Arch) []const u8 {
414 return switch (arch) {
415 .arm, .armeb, .thumb, .thumbeb => "arm",
416 .aarch64, .aarch64_be, .aarch64_32 => "aarch64",
417 .avr => "avr",
418 .bpfel, .bpfeb => "bpf",
419 .hexagon => "hexagon",
420 .mips, .mipsel, .mips64, .mips64el => "mips",
421 .msp430 => "msp430",
422 .powerpc, .powerpc64, .powerpc64le => "powerpc",
423 .amdgcn => "amdgpu",
424 .riscv32, .riscv64 => "riscv",
425 .sparc, .sparcv9, .sparcel => "sparc",
426 .s390x => "systemz",
427 .i386, .x86_64 => "x86",
428 .nvptx, .nvptx64 => "nvptx",
429 .wasm32, .wasm64 => "wasm",
430 else => @tagName(arch),
431 };
432 }
433
434 /// All CPU features Zig is aware of, sorted lexicographically by name.
435 pub fn allFeaturesList(arch: Arch) []const Cpu.Feature {
436 return switch (arch) {
437 .arm, .armeb, .thumb, .thumbeb => &arm.all_features,
438 .aarch64, .aarch64_be, .aarch64_32 => &aarch64.all_features,
439 .avr => &avr.all_features,
440 .bpfel, .bpfeb => &bpf.all_features,
441 .hexagon => &hexagon.all_features,
442 .mips, .mipsel, .mips64, .mips64el => &mips.all_features,
443 .msp430 => &msp430.all_features,
444 .powerpc, .powerpc64, .powerpc64le => &powerpc.all_features,
445 .amdgcn => &amdgpu.all_features,
446 .riscv32, .riscv64 => &riscv.all_features,
447 .sparc, .sparcv9, .sparcel => &sparc.all_features,
448 .s390x => &systemz.all_features,
449 .i386, .x86_64 => &x86.all_features,
450 .nvptx, .nvptx64 => &nvptx.all_features,
451 .wasm32, .wasm64 => &wasm.all_features,
452
453 else => &[0]Cpu.Feature{},
454 };
455 }
456
457 /// The "default" set of CPU features for cross-compiling. A conservative set
458 /// of features that is expected to be supported on most available hardware.
459 pub fn getBaselineCpuFeatures(arch: Arch) CpuFeatures {
460 const S = struct {
461 const generic_cpu = Cpu{
462 .name = "generic",
463 .llvm_name = null,
464 .features = Cpu.Feature.Set.empty,
465 };
466 };
467 const cpu = switch (arch) {
468 .arm, .armeb, .thumb, .thumbeb => &arm.cpu.generic,
469 .aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.generic,
470 .avr => &avr.cpu.avr1,
471 .bpfel, .bpfeb => &bpf.cpu.generic,
472 .hexagon => &hexagon.cpu.generic,
473 .mips, .mipsel => &mips.cpu.mips32,
474 .mips64, .mips64el => &mips.cpu.mips64,
475 .msp430 => &msp430.cpu.generic,
476 .powerpc, .powerpc64, .powerpc64le => &powerpc.cpu.generic,
477 .amdgcn => &amdgpu.cpu.generic,
478 .riscv32 => &riscv.cpu.baseline_rv32,
479 .riscv64 => &riscv.cpu.baseline_rv64,
480 .sparc, .sparcv9, .sparcel => &sparc.cpu.generic,
481 .s390x => &systemz.cpu.generic,
482 .i386 => &x86.cpu.pentium4,
483 .x86_64 => &x86.cpu.x86_64,
484 .nvptx, .nvptx64 => &nvptx.cpu.sm_20,
485 .wasm32, .wasm64 => &wasm.cpu.generic,
486
487 else => &S.generic_cpu,
488 };
489 return CpuFeatures.initFromCpu(arch, cpu);
490 }
491
492 /// All CPUs Zig is aware of, sorted lexicographically by name.
493 pub fn allCpus(arch: Arch) []const *const Cpu {
494 return switch (arch) {
495 .arm, .armeb, .thumb, .thumbeb => arm.all_cpus,
496 .aarch64, .aarch64_be, .aarch64_32 => aarch64.all_cpus,
497 .avr => avr.all_cpus,
498 .bpfel, .bpfeb => bpf.all_cpus,
499 .hexagon => hexagon.all_cpus,
500 .mips, .mipsel, .mips64, .mips64el => mips.all_cpus,
501 .msp430 => msp430.all_cpus,
502 .powerpc, .powerpc64, .powerpc64le => powerpc.all_cpus,
503 .amdgcn => amdgpu.all_cpus,
504 .riscv32, .riscv64 => riscv.all_cpus,
505 .sparc, .sparcv9, .sparcel => sparc.all_cpus,
506 .s390x => systemz.all_cpus,
507 .i386, .x86_64 => x86.all_cpus,
508 .nvptx, .nvptx64 => nvptx.all_cpus,
509 .wasm32, .wasm64 => wasm.all_cpus,
510
511 else => &[0]*const Cpu{},
512 };
513 }
303514 };
304515
305516 pub const Abi = enum {
......@@ -325,6 +536,109 @@ pub const Target = union(enum) {
325536 macabi,
326537 };
327538
539 pub const Cpu = struct {
540 name: []const u8,
541 llvm_name: ?[:0]const u8,
542 features: Feature.Set,
543
544 pub const Feature = struct {
545 /// The bit index into `Set`. Has a default value of `undefined` because the canonical
546 /// structures are populated via comptime logic.
547 index: Set.Index = undefined,
548
549 /// Has a default value of `undefined` because the canonical
550 /// structures are populated via comptime logic.
551 name: []const u8 = undefined,
552
553 /// If this corresponds to an LLVM-recognized feature, this will be populated;
554 /// otherwise null.
555 llvm_name: ?[:0]const u8,
556
557 /// Human-friendly UTF-8 text.
558 description: []const u8,
559
560 /// Sparse `Set` of features this depends on.
561 dependencies: Set,
562
563 /// A bit set of all the features.
564 pub const Set = struct {
565 ints: [usize_count]usize,
566
567 pub const needed_bit_count = 174;
568 pub const byte_count = (needed_bit_count + 7) / 8;
569 pub const usize_count = (byte_count + (@sizeOf(usize) - 1)) / @sizeOf(usize);
570 pub const Index = std.math.Log2Int(@IntType(false, usize_count * @bitSizeOf(usize)));
571 pub const ShiftInt = std.math.Log2Int(usize);
572
573 pub const empty = Set{ .ints = [1]usize{0} ** usize_count };
574 pub fn empty_workaround() Set {
575 return Set{ .ints = [1]usize{0} ** usize_count };
576 }
577
578 pub fn isEnabled(set: Set, arch_feature_index: Index) bool {
579 const usize_index = arch_feature_index / @bitSizeOf(usize);
580 const bit_index = @intCast(ShiftInt, arch_feature_index % @bitSizeOf(usize));
581 return (set.ints[usize_index] & (@as(usize, 1) << bit_index)) != 0;
582 }
583
584 /// Adds the specified feature but not its dependencies.
585 pub fn addFeature(set: *Set, arch_feature_index: Index) void {
586 const usize_index = arch_feature_index / @bitSizeOf(usize);
587 const bit_index = @intCast(ShiftInt, arch_feature_index % @bitSizeOf(usize));
588 set.ints[usize_index] |= @as(usize, 1) << bit_index;
589 }
590
591 /// Removes the specified feature but not its dependents.
592 pub fn removeFeature(set: *Set, arch_feature_index: Index) void {
593 const usize_index = arch_feature_index / @bitSizeOf(usize);
594 const bit_index = @intCast(ShiftInt, arch_feature_index % @bitSizeOf(usize));
595 set.ints[usize_index] &= ~(@as(usize, 1) << bit_index);
596 }
597
598 pub fn populateDependencies(set: *Set, all_features_list: []const Cpu.Feature) void {
599 var old = set.ints;
600 while (true) {
601 for (all_features_list) |feature, index_usize| {
602 const index = @intCast(Index, index_usize);
603 if (set.isEnabled(index)) {
604 set.ints = @as(@Vector(usize_count, usize), set.ints) |
605 @as(@Vector(usize_count, usize), feature.dependencies.ints);
606 }
607 }
608 const nothing_changed = mem.eql(usize, &old, &set.ints);
609 if (nothing_changed) return;
610 old = set.ints;
611 }
612 }
613
614 pub fn asBytes(set: *const Set) *const [byte_count]u8 {
615 return @ptrCast(*const [byte_count]u8, &set.ints);
616 }
617
618 pub fn eql(set: Set, other: Set) bool {
619 return mem.eql(usize, &set.ints, &other.ints);
620 }
621 };
622
623 pub fn feature_set_fns(comptime F: type) type {
624 return struct {
625 /// Populates only the feature bits specified.
626 pub fn featureSet(features: []const F) Set {
627 var x = Set.empty_workaround(); // TODO remove empty_workaround
628 for (features) |feature| {
629 x.addFeature(@enumToInt(feature));
630 }
631 return x;
632 }
633
634 pub fn featureSetHas(set: Set, feature: F) bool {
635 return set.isEnabled(@enumToInt(feature));
636 }
637 };
638 }
639 };
640 };
641
328642 pub const ObjectFormat = enum {
329643 unknown,
330644 coff,
......@@ -348,6 +662,28 @@ pub const Target = union(enum) {
348662 arch: Arch,
349663 os: Os,
350664 abi: Abi,
665 cpu_features: CpuFeatures,
666 };
667
668 pub const CpuFeatures = struct {
669 /// The CPU to target. It has a set of features
670 /// which are overridden with the `features` field.
671 cpu: *const Cpu,
672
673 /// Explicitly provide the entire CPU feature set.
674 features: Cpu.Feature.Set,
675
676 pub fn initFromCpu(arch: Arch, cpu: *const Cpu) CpuFeatures {
677 var features = cpu.features;
678 if (arch.subArchFeature()) |sub_arch_index| {
679 features.addFeature(sub_arch_index);
680 }
681 features.populateDependencies(arch.allFeaturesList());
682 return CpuFeatures{
683 .cpu = cpu,
684 .features = features,
685 };
686 }
351687 };
352688
353689 pub const current = Target{
......@@ -355,11 +691,19 @@ pub const Target = union(enum) {
355691 .arch = builtin.arch,
356692 .os = builtin.os,
357693 .abi = builtin.abi,
694 .cpu_features = builtin.cpu_features,
358695 },
359696 };
360697
361698 pub const stack_align = 16;
362699
700 pub fn getCpuFeatures(self: Target) CpuFeatures {
701 return switch (self) {
702 .Native => builtin.cpu_features,
703 .Cross => |cross| cross.cpu_features,
704 };
705 }
706
363707 pub fn zigTriple(self: Target, allocator: *mem.Allocator) ![]u8 {
364708 return std.fmt.allocPrint(allocator, "{}{}-{}-{}", .{
365709 @tagName(self.getArch()),
......@@ -425,14 +769,18 @@ pub const Target = union(enum) {
425769 });
426770 }
427771
772 /// TODO: Support CPU features here?
773 /// https://github.com/ziglang/zig/issues/4261
428774 pub fn parse(text: []const u8) !Target {
429775 var it = mem.separate(text, "-");
430776 const arch_name = it.next() orelse return error.MissingArchitecture;
431777 const os_name = it.next() orelse return error.MissingOperatingSystem;
432778 const abi_name = it.next();
779 const arch = try parseArchSub(arch_name);
433780
434781 var cross = Cross{
435 .arch = try parseArchSub(arch_name),
782 .arch = arch,
783 .cpu_features = arch.getBaselineCpuFeatures(),
436784 .os = try parseOs(os_name),
437785 .abi = undefined,
438786 };
......@@ -498,7 +846,7 @@ pub const Target = union(enum) {
498846 pub fn parseArchSub(text: []const u8) ParseArchSubError!Arch {
499847 const info = @typeInfo(Arch);
500848 inline for (info.Union.fields) |field| {
501 if (mem.eql(u8, text, field.name)) {
849 if (mem.startsWith(u8, text, field.name)) {
502850 if (field.field_type == void) {
503851 return @as(Arch, @field(Arch, field.name));
504852 } else {
......@@ -819,3 +1167,15 @@ pub const Target = union(enum) {
8191167 return .unavailable;
8201168 }
8211169};
1170
1171test "parseCpuFeatureSet" {
1172 const arch: Target.Arch = .x86_64;
1173 const baseline = arch.getBaselineCpuFeatures();
1174 const set = try arch.parseCpuFeatureSet(baseline.cpu, "-sse,-avx,-cx8");
1175 std.testing.expect(!Target.x86.featureSetHas(set, .sse));
1176 std.testing.expect(!Target.x86.featureSetHas(set, .avx));
1177 std.testing.expect(!Target.x86.featureSetHas(set, .cx8));
1178 // These are expected because they are part of the baseline
1179 std.testing.expect(Target.x86.featureSetHas(set, .cmov));
1180 std.testing.expect(Target.x86.featureSetHas(set, .fxsr));
1181}
lib/std/target/aarch64.zig created+1450
......@@ -0,0 +1,1450 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 a35,
6 a53,
7 a55,
8 a57,
9 a72,
10 a73,
11 a75,
12 a76,
13 aes,
14 aggressive_fma,
15 alternate_sextload_cvt_f32_pattern,
16 altnzcv,
17 am,
18 arith_bcc_fusion,
19 arith_cbz_fusion,
20 balance_fp_ops,
21 bti,
22 call_saved_x10,
23 call_saved_x11,
24 call_saved_x12,
25 call_saved_x13,
26 call_saved_x14,
27 call_saved_x15,
28 call_saved_x18,
29 call_saved_x8,
30 call_saved_x9,
31 ccdp,
32 ccidx,
33 ccpp,
34 complxnum,
35 crc,
36 crypto,
37 custom_cheap_as_move,
38 cyclone,
39 disable_latency_sched_heuristic,
40 dit,
41 dotprod,
42 exynos_cheap_as_move,
43 exynosm1,
44 exynosm2,
45 exynosm3,
46 exynosm4,
47 falkor,
48 fmi,
49 force_32bit_jump_tables,
50 fp_armv8,
51 fp16fml,
52 fptoint,
53 fullfp16,
54 fuse_address,
55 fuse_aes,
56 fuse_arith_logic,
57 fuse_crypto_eor,
58 fuse_csel,
59 fuse_literals,
60 jsconv,
61 kryo,
62 lor,
63 lse,
64 lsl_fast,
65 mpam,
66 mte,
67 neon,
68 no_neg_immediates,
69 nv,
70 pa,
71 pan,
72 pan_rwv,
73 perfmon,
74 predictable_select_expensive,
75 predres,
76 rand,
77 ras,
78 rasv8_4,
79 rcpc,
80 rcpc_immo,
81 rdm,
82 reserve_x1,
83 reserve_x10,
84 reserve_x11,
85 reserve_x12,
86 reserve_x13,
87 reserve_x14,
88 reserve_x15,
89 reserve_x18,
90 reserve_x2,
91 reserve_x20,
92 reserve_x21,
93 reserve_x22,
94 reserve_x23,
95 reserve_x24,
96 reserve_x25,
97 reserve_x26,
98 reserve_x27,
99 reserve_x28,
100 reserve_x3,
101 reserve_x4,
102 reserve_x5,
103 reserve_x6,
104 reserve_x7,
105 reserve_x9,
106 saphira,
107 sb,
108 sel2,
109 sha2,
110 sha3,
111 slow_misaligned_128store,
112 slow_paired_128,
113 slow_strqro_store,
114 sm4,
115 spe,
116 specrestrict,
117 ssbs,
118 strict_align,
119 sve,
120 sve2,
121 sve2_aes,
122 sve2_bitperm,
123 sve2_sha3,
124 sve2_sm4,
125 thunderx,
126 thunderx2t99,
127 thunderxt81,
128 thunderxt83,
129 thunderxt88,
130 tlb_rmi,
131 tpidr_el1,
132 tpidr_el2,
133 tpidr_el3,
134 tracev8_4,
135 tsv110,
136 uaops,
137 use_aa,
138 use_postra_scheduler,
139 use_reciprocal_square_root,
140 v8a,
141 v8_1a,
142 v8_2a,
143 v8_3a,
144 v8_4a,
145 v8_5a,
146 vh,
147 zcm,
148 zcz,
149 zcz_fp,
150 zcz_fp_workaround,
151 zcz_gp,
152};
153
154pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
155
156pub const all_features = blk: {
157 @setEvalBranchQuota(2000);
158 const len = @typeInfo(Feature).Enum.fields.len;
159 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
160 var result: [len]Cpu.Feature = undefined;
161 result[@enumToInt(Feature.a35)] = .{
162 .llvm_name = "a35",
163 .description = "Cortex-A35 ARM processors",
164 .dependencies = featureSet(&[_]Feature{
165 .crc,
166 .crypto,
167 .fp_armv8,
168 .neon,
169 .perfmon,
170 }),
171 };
172 result[@enumToInt(Feature.a53)] = .{
173 .llvm_name = "a53",
174 .description = "Cortex-A53 ARM processors",
175 .dependencies = featureSet(&[_]Feature{
176 .balance_fp_ops,
177 .crc,
178 .crypto,
179 .custom_cheap_as_move,
180 .fp_armv8,
181 .fuse_aes,
182 .neon,
183 .perfmon,
184 .use_aa,
185 .use_postra_scheduler,
186 }),
187 };
188 result[@enumToInt(Feature.a55)] = .{
189 .llvm_name = "a55",
190 .description = "Cortex-A55 ARM processors",
191 .dependencies = featureSet(&[_]Feature{
192 .crypto,
193 .dotprod,
194 .fp_armv8,
195 .fullfp16,
196 .fuse_aes,
197 .neon,
198 .perfmon,
199 .rcpc,
200 .v8_2a,
201 }),
202 };
203 result[@enumToInt(Feature.a57)] = .{
204 .llvm_name = "a57",
205 .description = "Cortex-A57 ARM processors",
206 .dependencies = featureSet(&[_]Feature{
207 .balance_fp_ops,
208 .crc,
209 .crypto,
210 .custom_cheap_as_move,
211 .fp_armv8,
212 .fuse_aes,
213 .fuse_literals,
214 .neon,
215 .perfmon,
216 .predictable_select_expensive,
217 .use_postra_scheduler,
218 }),
219 };
220 result[@enumToInt(Feature.a72)] = .{
221 .llvm_name = "a72",
222 .description = "Cortex-A72 ARM processors",
223 .dependencies = featureSet(&[_]Feature{
224 .crc,
225 .crypto,
226 .fp_armv8,
227 .fuse_aes,
228 .neon,
229 .perfmon,
230 }),
231 };
232 result[@enumToInt(Feature.a73)] = .{
233 .llvm_name = "a73",
234 .description = "Cortex-A73 ARM processors",
235 .dependencies = featureSet(&[_]Feature{
236 .crc,
237 .crypto,
238 .fp_armv8,
239 .fuse_aes,
240 .neon,
241 .perfmon,
242 }),
243 };
244 result[@enumToInt(Feature.a75)] = .{
245 .llvm_name = "a75",
246 .description = "Cortex-A75 ARM processors",
247 .dependencies = featureSet(&[_]Feature{
248 .crypto,
249 .dotprod,
250 .fp_armv8,
251 .fullfp16,
252 .fuse_aes,
253 .neon,
254 .perfmon,
255 .rcpc,
256 .v8_2a,
257 }),
258 };
259 result[@enumToInt(Feature.a76)] = .{
260 .llvm_name = "a76",
261 .description = "Cortex-A76 ARM processors",
262 .dependencies = featureSet(&[_]Feature{
263 .crypto,
264 .dotprod,
265 .fp_armv8,
266 .fullfp16,
267 .neon,
268 .rcpc,
269 .ssbs,
270 .v8_2a,
271 }),
272 };
273 result[@enumToInt(Feature.aes)] = .{
274 .llvm_name = "aes",
275 .description = "Enable AES support",
276 .dependencies = featureSet(&[_]Feature{
277 .neon,
278 }),
279 };
280 result[@enumToInt(Feature.aggressive_fma)] = .{
281 .llvm_name = "aggressive-fma",
282 .description = "Enable Aggressive FMA for floating-point.",
283 .dependencies = featureSet(&[_]Feature{}),
284 };
285 result[@enumToInt(Feature.alternate_sextload_cvt_f32_pattern)] = .{
286 .llvm_name = "alternate-sextload-cvt-f32-pattern",
287 .description = "Use alternative pattern for sextload convert to f32",
288 .dependencies = featureSet(&[_]Feature{}),
289 };
290 result[@enumToInt(Feature.altnzcv)] = .{
291 .llvm_name = "altnzcv",
292 .description = "Enable alternative NZCV format for floating point comparisons",
293 .dependencies = featureSet(&[_]Feature{}),
294 };
295 result[@enumToInt(Feature.am)] = .{
296 .llvm_name = "am",
297 .description = "Enable v8.4-A Activity Monitors extension",
298 .dependencies = featureSet(&[_]Feature{}),
299 };
300 result[@enumToInt(Feature.arith_bcc_fusion)] = .{
301 .llvm_name = "arith-bcc-fusion",
302 .description = "CPU fuses arithmetic+bcc operations",
303 .dependencies = featureSet(&[_]Feature{}),
304 };
305 result[@enumToInt(Feature.arith_cbz_fusion)] = .{
306 .llvm_name = "arith-cbz-fusion",
307 .description = "CPU fuses arithmetic + cbz/cbnz operations",
308 .dependencies = featureSet(&[_]Feature{}),
309 };
310 result[@enumToInt(Feature.balance_fp_ops)] = .{
311 .llvm_name = "balance-fp-ops",
312 .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops",
313 .dependencies = featureSet(&[_]Feature{}),
314 };
315 result[@enumToInt(Feature.bti)] = .{
316 .llvm_name = "bti",
317 .description = "Enable Branch Target Identification",
318 .dependencies = featureSet(&[_]Feature{}),
319 };
320 result[@enumToInt(Feature.call_saved_x10)] = .{
321 .llvm_name = "call-saved-x10",
322 .description = "Make X10 callee saved.",
323 .dependencies = featureSet(&[_]Feature{}),
324 };
325 result[@enumToInt(Feature.call_saved_x11)] = .{
326 .llvm_name = "call-saved-x11",
327 .description = "Make X11 callee saved.",
328 .dependencies = featureSet(&[_]Feature{}),
329 };
330 result[@enumToInt(Feature.call_saved_x12)] = .{
331 .llvm_name = "call-saved-x12",
332 .description = "Make X12 callee saved.",
333 .dependencies = featureSet(&[_]Feature{}),
334 };
335 result[@enumToInt(Feature.call_saved_x13)] = .{
336 .llvm_name = "call-saved-x13",
337 .description = "Make X13 callee saved.",
338 .dependencies = featureSet(&[_]Feature{}),
339 };
340 result[@enumToInt(Feature.call_saved_x14)] = .{
341 .llvm_name = "call-saved-x14",
342 .description = "Make X14 callee saved.",
343 .dependencies = featureSet(&[_]Feature{}),
344 };
345 result[@enumToInt(Feature.call_saved_x15)] = .{
346 .llvm_name = "call-saved-x15",
347 .description = "Make X15 callee saved.",
348 .dependencies = featureSet(&[_]Feature{}),
349 };
350 result[@enumToInt(Feature.call_saved_x18)] = .{
351 .llvm_name = "call-saved-x18",
352 .description = "Make X18 callee saved.",
353 .dependencies = featureSet(&[_]Feature{}),
354 };
355 result[@enumToInt(Feature.call_saved_x8)] = .{
356 .llvm_name = "call-saved-x8",
357 .description = "Make X8 callee saved.",
358 .dependencies = featureSet(&[_]Feature{}),
359 };
360 result[@enumToInt(Feature.call_saved_x9)] = .{
361 .llvm_name = "call-saved-x9",
362 .description = "Make X9 callee saved.",
363 .dependencies = featureSet(&[_]Feature{}),
364 };
365 result[@enumToInt(Feature.ccdp)] = .{
366 .llvm_name = "ccdp",
367 .description = "Enable v8.5 Cache Clean to Point of Deep Persistence",
368 .dependencies = featureSet(&[_]Feature{}),
369 };
370 result[@enumToInt(Feature.ccidx)] = .{
371 .llvm_name = "ccidx",
372 .description = "Enable v8.3-A Extend of the CCSIDR number of sets",
373 .dependencies = featureSet(&[_]Feature{}),
374 };
375 result[@enumToInt(Feature.ccpp)] = .{
376 .llvm_name = "ccpp",
377 .description = "Enable v8.2 data Cache Clean to Point of Persistence",
378 .dependencies = featureSet(&[_]Feature{}),
379 };
380 result[@enumToInt(Feature.complxnum)] = .{
381 .llvm_name = "complxnum",
382 .description = "Enable v8.3-A Floating-point complex number support",
383 .dependencies = featureSet(&[_]Feature{
384 .neon,
385 }),
386 };
387 result[@enumToInt(Feature.crc)] = .{
388 .llvm_name = "crc",
389 .description = "Enable ARMv8 CRC-32 checksum instructions",
390 .dependencies = featureSet(&[_]Feature{}),
391 };
392 result[@enumToInt(Feature.crypto)] = .{
393 .llvm_name = "crypto",
394 .description = "Enable cryptographic instructions",
395 .dependencies = featureSet(&[_]Feature{
396 .aes,
397 .neon,
398 .sha2,
399 }),
400 };
401 result[@enumToInt(Feature.custom_cheap_as_move)] = .{
402 .llvm_name = "custom-cheap-as-move",
403 .description = "Use custom handling of cheap instructions",
404 .dependencies = featureSet(&[_]Feature{}),
405 };
406 result[@enumToInt(Feature.cyclone)] = .{
407 .llvm_name = "cyclone",
408 .description = "Cyclone",
409 .dependencies = featureSet(&[_]Feature{
410 .alternate_sextload_cvt_f32_pattern,
411 .arith_bcc_fusion,
412 .arith_cbz_fusion,
413 .crypto,
414 .disable_latency_sched_heuristic,
415 .fp_armv8,
416 .fuse_aes,
417 .fuse_crypto_eor,
418 .neon,
419 .perfmon,
420 .zcm,
421 .zcz,
422 .zcz_fp_workaround,
423 }),
424 };
425 result[@enumToInt(Feature.disable_latency_sched_heuristic)] = .{
426 .llvm_name = "disable-latency-sched-heuristic",
427 .description = "Disable latency scheduling heuristic",
428 .dependencies = featureSet(&[_]Feature{}),
429 };
430 result[@enumToInt(Feature.dit)] = .{
431 .llvm_name = "dit",
432 .description = "Enable v8.4-A Data Independent Timing instructions",
433 .dependencies = featureSet(&[_]Feature{}),
434 };
435 result[@enumToInt(Feature.dotprod)] = .{
436 .llvm_name = "dotprod",
437 .description = "Enable dot product support",
438 .dependencies = featureSet(&[_]Feature{}),
439 };
440 result[@enumToInt(Feature.exynos_cheap_as_move)] = .{
441 .llvm_name = "exynos-cheap-as-move",
442 .description = "Use Exynos specific handling of cheap instructions",
443 .dependencies = featureSet(&[_]Feature{
444 .custom_cheap_as_move,
445 }),
446 };
447 result[@enumToInt(Feature.exynosm1)] = .{
448 .llvm_name = "exynosm1",
449 .description = "Samsung Exynos-M1 processors",
450 .dependencies = featureSet(&[_]Feature{
451 .crc,
452 .crypto,
453 .exynos_cheap_as_move,
454 .force_32bit_jump_tables,
455 .fuse_aes,
456 .perfmon,
457 .slow_misaligned_128store,
458 .slow_paired_128,
459 .use_postra_scheduler,
460 .use_reciprocal_square_root,
461 .zcz_fp,
462 }),
463 };
464 result[@enumToInt(Feature.exynosm2)] = .{
465 .llvm_name = "exynosm2",
466 .description = "Samsung Exynos-M2 processors",
467 .dependencies = featureSet(&[_]Feature{
468 .crc,
469 .crypto,
470 .exynos_cheap_as_move,
471 .force_32bit_jump_tables,
472 .fuse_aes,
473 .perfmon,
474 .slow_misaligned_128store,
475 .slow_paired_128,
476 .use_postra_scheduler,
477 .zcz_fp,
478 }),
479 };
480 result[@enumToInt(Feature.exynosm3)] = .{
481 .llvm_name = "exynosm3",
482 .description = "Samsung Exynos-M3 processors",
483 .dependencies = featureSet(&[_]Feature{
484 .crc,
485 .crypto,
486 .exynos_cheap_as_move,
487 .force_32bit_jump_tables,
488 .fuse_address,
489 .fuse_aes,
490 .fuse_csel,
491 .fuse_literals,
492 .lsl_fast,
493 .perfmon,
494 .predictable_select_expensive,
495 .use_postra_scheduler,
496 .zcz_fp,
497 }),
498 };
499 result[@enumToInt(Feature.exynosm4)] = .{
500 .llvm_name = "exynosm4",
501 .description = "Samsung Exynos-M4 processors",
502 .dependencies = featureSet(&[_]Feature{
503 .arith_bcc_fusion,
504 .arith_cbz_fusion,
505 .crypto,
506 .dotprod,
507 .exynos_cheap_as_move,
508 .force_32bit_jump_tables,
509 .fullfp16,
510 .fuse_address,
511 .fuse_aes,
512 .fuse_arith_logic,
513 .fuse_csel,
514 .fuse_literals,
515 .lsl_fast,
516 .perfmon,
517 .use_postra_scheduler,
518 .v8_2a,
519 .zcz,
520 }),
521 };
522 result[@enumToInt(Feature.falkor)] = .{
523 .llvm_name = "falkor",
524 .description = "Qualcomm Falkor processors",
525 .dependencies = featureSet(&[_]Feature{
526 .crc,
527 .crypto,
528 .custom_cheap_as_move,
529 .fp_armv8,
530 .lsl_fast,
531 .neon,
532 .perfmon,
533 .predictable_select_expensive,
534 .rdm,
535 .slow_strqro_store,
536 .use_postra_scheduler,
537 .zcz,
538 }),
539 };
540 result[@enumToInt(Feature.fmi)] = .{
541 .llvm_name = "fmi",
542 .description = "Enable v8.4-A Flag Manipulation Instructions",
543 .dependencies = featureSet(&[_]Feature{}),
544 };
545 result[@enumToInt(Feature.force_32bit_jump_tables)] = .{
546 .llvm_name = "force-32bit-jump-tables",
547 .description = "Force jump table entries to be 32-bits wide except at MinSize",
548 .dependencies = featureSet(&[_]Feature{}),
549 };
550 result[@enumToInt(Feature.fp_armv8)] = .{
551 .llvm_name = "fp-armv8",
552 .description = "Enable ARMv8 FP",
553 .dependencies = featureSet(&[_]Feature{}),
554 };
555 result[@enumToInt(Feature.fp16fml)] = .{
556 .llvm_name = "fp16fml",
557 .description = "Enable FP16 FML instructions",
558 .dependencies = featureSet(&[_]Feature{
559 .fullfp16,
560 }),
561 };
562 result[@enumToInt(Feature.fptoint)] = .{
563 .llvm_name = "fptoint",
564 .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int",
565 .dependencies = featureSet(&[_]Feature{}),
566 };
567 result[@enumToInt(Feature.fullfp16)] = .{
568 .llvm_name = "fullfp16",
569 .description = "Full FP16",
570 .dependencies = featureSet(&[_]Feature{
571 .fp_armv8,
572 }),
573 };
574 result[@enumToInt(Feature.fuse_address)] = .{
575 .llvm_name = "fuse-address",
576 .description = "CPU fuses address generation and memory operations",
577 .dependencies = featureSet(&[_]Feature{}),
578 };
579 result[@enumToInt(Feature.fuse_aes)] = .{
580 .llvm_name = "fuse-aes",
581 .description = "CPU fuses AES crypto operations",
582 .dependencies = featureSet(&[_]Feature{}),
583 };
584 result[@enumToInt(Feature.fuse_arith_logic)] = .{
585 .llvm_name = "fuse-arith-logic",
586 .description = "CPU fuses arithmetic and logic operations",
587 .dependencies = featureSet(&[_]Feature{}),
588 };
589 result[@enumToInt(Feature.fuse_crypto_eor)] = .{
590 .llvm_name = "fuse-crypto-eor",
591 .description = "CPU fuses AES/PMULL and EOR operations",
592 .dependencies = featureSet(&[_]Feature{}),
593 };
594 result[@enumToInt(Feature.fuse_csel)] = .{
595 .llvm_name = "fuse-csel",
596 .description = "CPU fuses conditional select operations",
597 .dependencies = featureSet(&[_]Feature{}),
598 };
599 result[@enumToInt(Feature.fuse_literals)] = .{
600 .llvm_name = "fuse-literals",
601 .description = "CPU fuses literal generation operations",
602 .dependencies = featureSet(&[_]Feature{}),
603 };
604 result[@enumToInt(Feature.jsconv)] = .{
605 .llvm_name = "jsconv",
606 .description = "Enable v8.3-A JavaScript FP conversion enchancement",
607 .dependencies = featureSet(&[_]Feature{
608 .fp_armv8,
609 }),
610 };
611 result[@enumToInt(Feature.kryo)] = .{
612 .llvm_name = "kryo",
613 .description = "Qualcomm Kryo processors",
614 .dependencies = featureSet(&[_]Feature{
615 .crc,
616 .crypto,
617 .custom_cheap_as_move,
618 .fp_armv8,
619 .lsl_fast,
620 .neon,
621 .perfmon,
622 .predictable_select_expensive,
623 .use_postra_scheduler,
624 .zcz,
625 }),
626 };
627 result[@enumToInt(Feature.lor)] = .{
628 .llvm_name = "lor",
629 .description = "Enables ARM v8.1 Limited Ordering Regions extension",
630 .dependencies = featureSet(&[_]Feature{}),
631 };
632 result[@enumToInt(Feature.lse)] = .{
633 .llvm_name = "lse",
634 .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions",
635 .dependencies = featureSet(&[_]Feature{}),
636 };
637 result[@enumToInt(Feature.lsl_fast)] = .{
638 .llvm_name = "lsl-fast",
639 .description = "CPU has a fastpath logical shift of up to 3 places",
640 .dependencies = featureSet(&[_]Feature{}),
641 };
642 result[@enumToInt(Feature.mpam)] = .{
643 .llvm_name = "mpam",
644 .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension",
645 .dependencies = featureSet(&[_]Feature{}),
646 };
647 result[@enumToInt(Feature.mte)] = .{
648 .llvm_name = "mte",
649 .description = "Enable Memory Tagging Extension",
650 .dependencies = featureSet(&[_]Feature{}),
651 };
652 result[@enumToInt(Feature.neon)] = .{
653 .llvm_name = "neon",
654 .description = "Enable Advanced SIMD instructions",
655 .dependencies = featureSet(&[_]Feature{
656 .fp_armv8,
657 }),
658 };
659 result[@enumToInt(Feature.no_neg_immediates)] = .{
660 .llvm_name = "no-neg-immediates",
661 .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
662 .dependencies = featureSet(&[_]Feature{}),
663 };
664 result[@enumToInt(Feature.nv)] = .{
665 .llvm_name = "nv",
666 .description = "Enable v8.4-A Nested Virtualization Enchancement",
667 .dependencies = featureSet(&[_]Feature{}),
668 };
669 result[@enumToInt(Feature.pa)] = .{
670 .llvm_name = "pa",
671 .description = "Enable v8.3-A Pointer Authentication enchancement",
672 .dependencies = featureSet(&[_]Feature{}),
673 };
674 result[@enumToInt(Feature.pan)] = .{
675 .llvm_name = "pan",
676 .description = "Enables ARM v8.1 Privileged Access-Never extension",
677 .dependencies = featureSet(&[_]Feature{}),
678 };
679 result[@enumToInt(Feature.pan_rwv)] = .{
680 .llvm_name = "pan-rwv",
681 .description = "Enable v8.2 PAN s1e1R and s1e1W Variants",
682 .dependencies = featureSet(&[_]Feature{
683 .pan,
684 }),
685 };
686 result[@enumToInt(Feature.perfmon)] = .{
687 .llvm_name = "perfmon",
688 .description = "Enable ARMv8 PMUv3 Performance Monitors extension",
689 .dependencies = featureSet(&[_]Feature{}),
690 };
691 result[@enumToInt(Feature.predictable_select_expensive)] = .{
692 .llvm_name = "predictable-select-expensive",
693 .description = "Prefer likely predicted branches over selects",
694 .dependencies = featureSet(&[_]Feature{}),
695 };
696 result[@enumToInt(Feature.predres)] = .{
697 .llvm_name = "predres",
698 .description = "Enable v8.5a execution and data prediction invalidation instructions",
699 .dependencies = featureSet(&[_]Feature{}),
700 };
701 result[@enumToInt(Feature.rand)] = .{
702 .llvm_name = "rand",
703 .description = "Enable Random Number generation instructions",
704 .dependencies = featureSet(&[_]Feature{}),
705 };
706 result[@enumToInt(Feature.ras)] = .{
707 .llvm_name = "ras",
708 .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions",
709 .dependencies = featureSet(&[_]Feature{}),
710 };
711 result[@enumToInt(Feature.rasv8_4)] = .{
712 .llvm_name = "rasv8_4",
713 .description = "Enable v8.4-A Reliability, Availability and Serviceability extension",
714 .dependencies = featureSet(&[_]Feature{
715 .ras,
716 }),
717 };
718 result[@enumToInt(Feature.rcpc)] = .{
719 .llvm_name = "rcpc",
720 .description = "Enable support for RCPC extension",
721 .dependencies = featureSet(&[_]Feature{}),
722 };
723 result[@enumToInt(Feature.rcpc_immo)] = .{
724 .llvm_name = "rcpc-immo",
725 .description = "Enable v8.4-A RCPC instructions with Immediate Offsets",
726 .dependencies = featureSet(&[_]Feature{
727 .rcpc,
728 }),
729 };
730 result[@enumToInt(Feature.rdm)] = .{
731 .llvm_name = "rdm",
732 .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions",
733 .dependencies = featureSet(&[_]Feature{}),
734 };
735 result[@enumToInt(Feature.reserve_x1)] = .{
736 .llvm_name = "reserve-x1",
737 .description = "Reserve X1, making it unavailable as a GPR",
738 .dependencies = featureSet(&[_]Feature{}),
739 };
740 result[@enumToInt(Feature.reserve_x10)] = .{
741 .llvm_name = "reserve-x10",
742 .description = "Reserve X10, making it unavailable as a GPR",
743 .dependencies = featureSet(&[_]Feature{}),
744 };
745 result[@enumToInt(Feature.reserve_x11)] = .{
746 .llvm_name = "reserve-x11",
747 .description = "Reserve X11, making it unavailable as a GPR",
748 .dependencies = featureSet(&[_]Feature{}),
749 };
750 result[@enumToInt(Feature.reserve_x12)] = .{
751 .llvm_name = "reserve-x12",
752 .description = "Reserve X12, making it unavailable as a GPR",
753 .dependencies = featureSet(&[_]Feature{}),
754 };
755 result[@enumToInt(Feature.reserve_x13)] = .{
756 .llvm_name = "reserve-x13",
757 .description = "Reserve X13, making it unavailable as a GPR",
758 .dependencies = featureSet(&[_]Feature{}),
759 };
760 result[@enumToInt(Feature.reserve_x14)] = .{
761 .llvm_name = "reserve-x14",
762 .description = "Reserve X14, making it unavailable as a GPR",
763 .dependencies = featureSet(&[_]Feature{}),
764 };
765 result[@enumToInt(Feature.reserve_x15)] = .{
766 .llvm_name = "reserve-x15",
767 .description = "Reserve X15, making it unavailable as a GPR",
768 .dependencies = featureSet(&[_]Feature{}),
769 };
770 result[@enumToInt(Feature.reserve_x18)] = .{
771 .llvm_name = "reserve-x18",
772 .description = "Reserve X18, making it unavailable as a GPR",
773 .dependencies = featureSet(&[_]Feature{}),
774 };
775 result[@enumToInt(Feature.reserve_x2)] = .{
776 .llvm_name = "reserve-x2",
777 .description = "Reserve X2, making it unavailable as a GPR",
778 .dependencies = featureSet(&[_]Feature{}),
779 };
780 result[@enumToInt(Feature.reserve_x20)] = .{
781 .llvm_name = "reserve-x20",
782 .description = "Reserve X20, making it unavailable as a GPR",
783 .dependencies = featureSet(&[_]Feature{}),
784 };
785 result[@enumToInt(Feature.reserve_x21)] = .{
786 .llvm_name = "reserve-x21",
787 .description = "Reserve X21, making it unavailable as a GPR",
788 .dependencies = featureSet(&[_]Feature{}),
789 };
790 result[@enumToInt(Feature.reserve_x22)] = .{
791 .llvm_name = "reserve-x22",
792 .description = "Reserve X22, making it unavailable as a GPR",
793 .dependencies = featureSet(&[_]Feature{}),
794 };
795 result[@enumToInt(Feature.reserve_x23)] = .{
796 .llvm_name = "reserve-x23",
797 .description = "Reserve X23, making it unavailable as a GPR",
798 .dependencies = featureSet(&[_]Feature{}),
799 };
800 result[@enumToInt(Feature.reserve_x24)] = .{
801 .llvm_name = "reserve-x24",
802 .description = "Reserve X24, making it unavailable as a GPR",
803 .dependencies = featureSet(&[_]Feature{}),
804 };
805 result[@enumToInt(Feature.reserve_x25)] = .{
806 .llvm_name = "reserve-x25",
807 .description = "Reserve X25, making it unavailable as a GPR",
808 .dependencies = featureSet(&[_]Feature{}),
809 };
810 result[@enumToInt(Feature.reserve_x26)] = .{
811 .llvm_name = "reserve-x26",
812 .description = "Reserve X26, making it unavailable as a GPR",
813 .dependencies = featureSet(&[_]Feature{}),
814 };
815 result[@enumToInt(Feature.reserve_x27)] = .{
816 .llvm_name = "reserve-x27",
817 .description = "Reserve X27, making it unavailable as a GPR",
818 .dependencies = featureSet(&[_]Feature{}),
819 };
820 result[@enumToInt(Feature.reserve_x28)] = .{
821 .llvm_name = "reserve-x28",
822 .description = "Reserve X28, making it unavailable as a GPR",
823 .dependencies = featureSet(&[_]Feature{}),
824 };
825 result[@enumToInt(Feature.reserve_x3)] = .{
826 .llvm_name = "reserve-x3",
827 .description = "Reserve X3, making it unavailable as a GPR",
828 .dependencies = featureSet(&[_]Feature{}),
829 };
830 result[@enumToInt(Feature.reserve_x4)] = .{
831 .llvm_name = "reserve-x4",
832 .description = "Reserve X4, making it unavailable as a GPR",
833 .dependencies = featureSet(&[_]Feature{}),
834 };
835 result[@enumToInt(Feature.reserve_x5)] = .{
836 .llvm_name = "reserve-x5",
837 .description = "Reserve X5, making it unavailable as a GPR",
838 .dependencies = featureSet(&[_]Feature{}),
839 };
840 result[@enumToInt(Feature.reserve_x6)] = .{
841 .llvm_name = "reserve-x6",
842 .description = "Reserve X6, making it unavailable as a GPR",
843 .dependencies = featureSet(&[_]Feature{}),
844 };
845 result[@enumToInt(Feature.reserve_x7)] = .{
846 .llvm_name = "reserve-x7",
847 .description = "Reserve X7, making it unavailable as a GPR",
848 .dependencies = featureSet(&[_]Feature{}),
849 };
850 result[@enumToInt(Feature.reserve_x9)] = .{
851 .llvm_name = "reserve-x9",
852 .description = "Reserve X9, making it unavailable as a GPR",
853 .dependencies = featureSet(&[_]Feature{}),
854 };
855 result[@enumToInt(Feature.saphira)] = .{
856 .llvm_name = "saphira",
857 .description = "Qualcomm Saphira processors",
858 .dependencies = featureSet(&[_]Feature{
859 .crypto,
860 .custom_cheap_as_move,
861 .fp_armv8,
862 .lsl_fast,
863 .neon,
864 .perfmon,
865 .predictable_select_expensive,
866 .spe,
867 .use_postra_scheduler,
868 .v8_4a,
869 .zcz,
870 }),
871 };
872 result[@enumToInt(Feature.sb)] = .{
873 .llvm_name = "sb",
874 .description = "Enable v8.5 Speculation Barrier",
875 .dependencies = featureSet(&[_]Feature{}),
876 };
877 result[@enumToInt(Feature.sel2)] = .{
878 .llvm_name = "sel2",
879 .description = "Enable v8.4-A Secure Exception Level 2 extension",
880 .dependencies = featureSet(&[_]Feature{}),
881 };
882 result[@enumToInt(Feature.sha2)] = .{
883 .llvm_name = "sha2",
884 .description = "Enable SHA1 and SHA256 support",
885 .dependencies = featureSet(&[_]Feature{
886 .neon,
887 }),
888 };
889 result[@enumToInt(Feature.sha3)] = .{
890 .llvm_name = "sha3",
891 .description = "Enable SHA512 and SHA3 support",
892 .dependencies = featureSet(&[_]Feature{
893 .neon,
894 .sha2,
895 }),
896 };
897 result[@enumToInt(Feature.slow_misaligned_128store)] = .{
898 .llvm_name = "slow-misaligned-128store",
899 .description = "Misaligned 128 bit stores are slow",
900 .dependencies = featureSet(&[_]Feature{}),
901 };
902 result[@enumToInt(Feature.slow_paired_128)] = .{
903 .llvm_name = "slow-paired-128",
904 .description = "Paired 128 bit loads and stores are slow",
905 .dependencies = featureSet(&[_]Feature{}),
906 };
907 result[@enumToInt(Feature.slow_strqro_store)] = .{
908 .llvm_name = "slow-strqro-store",
909 .description = "STR of Q register with register offset is slow",
910 .dependencies = featureSet(&[_]Feature{}),
911 };
912 result[@enumToInt(Feature.sm4)] = .{
913 .llvm_name = "sm4",
914 .description = "Enable SM3 and SM4 support",
915 .dependencies = featureSet(&[_]Feature{
916 .neon,
917 }),
918 };
919 result[@enumToInt(Feature.spe)] = .{
920 .llvm_name = "spe",
921 .description = "Enable Statistical Profiling extension",
922 .dependencies = featureSet(&[_]Feature{}),
923 };
924 result[@enumToInt(Feature.specrestrict)] = .{
925 .llvm_name = "specrestrict",
926 .description = "Enable architectural speculation restriction",
927 .dependencies = featureSet(&[_]Feature{}),
928 };
929 result[@enumToInt(Feature.ssbs)] = .{
930 .llvm_name = "ssbs",
931 .description = "Enable Speculative Store Bypass Safe bit",
932 .dependencies = featureSet(&[_]Feature{}),
933 };
934 result[@enumToInt(Feature.strict_align)] = .{
935 .llvm_name = "strict-align",
936 .description = "Disallow all unaligned memory access",
937 .dependencies = featureSet(&[_]Feature{}),
938 };
939 result[@enumToInt(Feature.sve)] = .{
940 .llvm_name = "sve",
941 .description = "Enable Scalable Vector Extension (SVE) instructions",
942 .dependencies = featureSet(&[_]Feature{}),
943 };
944 result[@enumToInt(Feature.sve2)] = .{
945 .llvm_name = "sve2",
946 .description = "Enable Scalable Vector Extension 2 (SVE2) instructions",
947 .dependencies = featureSet(&[_]Feature{
948 .sve,
949 }),
950 };
951 result[@enumToInt(Feature.sve2_aes)] = .{
952 .llvm_name = "sve2-aes",
953 .description = "Enable AES SVE2 instructions",
954 .dependencies = featureSet(&[_]Feature{
955 .aes,
956 .sve2,
957 }),
958 };
959 result[@enumToInt(Feature.sve2_bitperm)] = .{
960 .llvm_name = "sve2-bitperm",
961 .description = "Enable bit permutation SVE2 instructions",
962 .dependencies = featureSet(&[_]Feature{
963 .sve2,
964 }),
965 };
966 result[@enumToInt(Feature.sve2_sha3)] = .{
967 .llvm_name = "sve2-sha3",
968 .description = "Enable SHA3 SVE2 instructions",
969 .dependencies = featureSet(&[_]Feature{
970 .sha3,
971 .sve2,
972 }),
973 };
974 result[@enumToInt(Feature.sve2_sm4)] = .{
975 .llvm_name = "sve2-sm4",
976 .description = "Enable SM4 SVE2 instructions",
977 .dependencies = featureSet(&[_]Feature{
978 .sm4,
979 .sve2,
980 }),
981 };
982 result[@enumToInt(Feature.thunderx)] = .{
983 .llvm_name = "thunderx",
984 .description = "Cavium ThunderX processors",
985 .dependencies = featureSet(&[_]Feature{
986 .crc,
987 .crypto,
988 .fp_armv8,
989 .neon,
990 .perfmon,
991 .predictable_select_expensive,
992 .use_postra_scheduler,
993 }),
994 };
995 result[@enumToInt(Feature.thunderx2t99)] = .{
996 .llvm_name = "thunderx2t99",
997 .description = "Cavium ThunderX2 processors",
998 .dependencies = featureSet(&[_]Feature{
999 .aggressive_fma,
1000 .arith_bcc_fusion,
1001 .crc,
1002 .crypto,
1003 .fp_armv8,
1004 .lse,
1005 .neon,
1006 .predictable_select_expensive,
1007 .use_postra_scheduler,
1008 .v8_1a,
1009 }),
1010 };
1011 result[@enumToInt(Feature.thunderxt81)] = .{
1012 .llvm_name = "thunderxt81",
1013 .description = "Cavium ThunderX processors",
1014 .dependencies = featureSet(&[_]Feature{
1015 .crc,
1016 .crypto,
1017 .fp_armv8,
1018 .neon,
1019 .perfmon,
1020 .predictable_select_expensive,
1021 .use_postra_scheduler,
1022 }),
1023 };
1024 result[@enumToInt(Feature.thunderxt83)] = .{
1025 .llvm_name = "thunderxt83",
1026 .description = "Cavium ThunderX processors",
1027 .dependencies = featureSet(&[_]Feature{
1028 .crc,
1029 .crypto,
1030 .fp_armv8,
1031 .neon,
1032 .perfmon,
1033 .predictable_select_expensive,
1034 .use_postra_scheduler,
1035 }),
1036 };
1037 result[@enumToInt(Feature.thunderxt88)] = .{
1038 .llvm_name = "thunderxt88",
1039 .description = "Cavium ThunderX processors",
1040 .dependencies = featureSet(&[_]Feature{
1041 .crc,
1042 .crypto,
1043 .fp_armv8,
1044 .neon,
1045 .perfmon,
1046 .predictable_select_expensive,
1047 .use_postra_scheduler,
1048 }),
1049 };
1050 result[@enumToInt(Feature.tlb_rmi)] = .{
1051 .llvm_name = "tlb-rmi",
1052 .description = "Enable v8.4-A TLB Range and Maintenance Instructions",
1053 .dependencies = featureSet(&[_]Feature{}),
1054 };
1055 result[@enumToInt(Feature.tpidr_el1)] = .{
1056 .llvm_name = "tpidr-el1",
1057 .description = "Permit use of TPIDR_EL1 for the TLS base",
1058 .dependencies = featureSet(&[_]Feature{}),
1059 };
1060 result[@enumToInt(Feature.tpidr_el2)] = .{
1061 .llvm_name = "tpidr-el2",
1062 .description = "Permit use of TPIDR_EL2 for the TLS base",
1063 .dependencies = featureSet(&[_]Feature{}),
1064 };
1065 result[@enumToInt(Feature.tpidr_el3)] = .{
1066 .llvm_name = "tpidr-el3",
1067 .description = "Permit use of TPIDR_EL3 for the TLS base",
1068 .dependencies = featureSet(&[_]Feature{}),
1069 };
1070 result[@enumToInt(Feature.tracev8_4)] = .{
1071 .llvm_name = "tracev8.4",
1072 .description = "Enable v8.4-A Trace extension",
1073 .dependencies = featureSet(&[_]Feature{}),
1074 };
1075 result[@enumToInt(Feature.tsv110)] = .{
1076 .llvm_name = "tsv110",
1077 .description = "HiSilicon TS-V110 processors",
1078 .dependencies = featureSet(&[_]Feature{
1079 .crypto,
1080 .custom_cheap_as_move,
1081 .dotprod,
1082 .fp_armv8,
1083 .fp16fml,
1084 .fullfp16,
1085 .fuse_aes,
1086 .neon,
1087 .perfmon,
1088 .spe,
1089 .use_postra_scheduler,
1090 .v8_2a,
1091 }),
1092 };
1093 result[@enumToInt(Feature.uaops)] = .{
1094 .llvm_name = "uaops",
1095 .description = "Enable v8.2 UAO PState",
1096 .dependencies = featureSet(&[_]Feature{}),
1097 };
1098 result[@enumToInt(Feature.use_aa)] = .{
1099 .llvm_name = "use-aa",
1100 .description = "Use alias analysis during codegen",
1101 .dependencies = featureSet(&[_]Feature{}),
1102 };
1103 result[@enumToInt(Feature.use_postra_scheduler)] = .{
1104 .llvm_name = "use-postra-scheduler",
1105 .description = "Schedule again after register allocation",
1106 .dependencies = featureSet(&[_]Feature{}),
1107 };
1108 result[@enumToInt(Feature.use_reciprocal_square_root)] = .{
1109 .llvm_name = "use-reciprocal-square-root",
1110 .description = "Use the reciprocal square root approximation",
1111 .dependencies = featureSet(&[_]Feature{}),
1112 };
1113 result[@enumToInt(Feature.v8a)] = .{
1114 .llvm_name = null,
1115 .description = "Support ARM v8a instructions",
1116 .dependencies = featureSet(&[_]Feature{
1117 .fp_armv8,
1118 .neon,
1119 }),
1120 };
1121 result[@enumToInt(Feature.v8_1a)] = .{
1122 .llvm_name = "v8.1a",
1123 .description = "Support ARM v8.1a instructions",
1124 .dependencies = featureSet(&[_]Feature{
1125 .crc,
1126 .lor,
1127 .lse,
1128 .pan,
1129 .rdm,
1130 .vh,
1131 .v8a,
1132 }),
1133 };
1134 result[@enumToInt(Feature.v8_2a)] = .{
1135 .llvm_name = "v8.2a",
1136 .description = "Support ARM v8.2a instructions",
1137 .dependencies = featureSet(&[_]Feature{
1138 .ccpp,
1139 .pan_rwv,
1140 .ras,
1141 .uaops,
1142 .v8_1a,
1143 }),
1144 };
1145 result[@enumToInt(Feature.v8_3a)] = .{
1146 .llvm_name = "v8.3a",
1147 .description = "Support ARM v8.3a instructions",
1148 .dependencies = featureSet(&[_]Feature{
1149 .ccidx,
1150 .complxnum,
1151 .jsconv,
1152 .pa,
1153 .rcpc,
1154 .v8_2a,
1155 }),
1156 };
1157 result[@enumToInt(Feature.v8_4a)] = .{
1158 .llvm_name = "v8.4a",
1159 .description = "Support ARM v8.4a instructions",
1160 .dependencies = featureSet(&[_]Feature{
1161 .am,
1162 .dit,
1163 .dotprod,
1164 .fmi,
1165 .mpam,
1166 .nv,
1167 .rasv8_4,
1168 .rcpc_immo,
1169 .sel2,
1170 .tlb_rmi,
1171 .tracev8_4,
1172 .v8_3a,
1173 }),
1174 };
1175 result[@enumToInt(Feature.v8_5a)] = .{
1176 .llvm_name = "v8.5a",
1177 .description = "Support ARM v8.5a instructions",
1178 .dependencies = featureSet(&[_]Feature{
1179 .altnzcv,
1180 .bti,
1181 .ccdp,
1182 .fptoint,
1183 .predres,
1184 .sb,
1185 .specrestrict,
1186 .ssbs,
1187 .v8_4a,
1188 }),
1189 };
1190 result[@enumToInt(Feature.vh)] = .{
1191 .llvm_name = "vh",
1192 .description = "Enables ARM v8.1 Virtual Host extension",
1193 .dependencies = featureSet(&[_]Feature{}),
1194 };
1195 result[@enumToInt(Feature.zcm)] = .{
1196 .llvm_name = "zcm",
1197 .description = "Has zero-cycle register moves",
1198 .dependencies = featureSet(&[_]Feature{}),
1199 };
1200 result[@enumToInt(Feature.zcz)] = .{
1201 .llvm_name = "zcz",
1202 .description = "Has zero-cycle zeroing instructions",
1203 .dependencies = featureSet(&[_]Feature{
1204 .zcz_fp,
1205 .zcz_gp,
1206 }),
1207 };
1208 result[@enumToInt(Feature.zcz_fp)] = .{
1209 .llvm_name = "zcz-fp",
1210 .description = "Has zero-cycle zeroing instructions for FP registers",
1211 .dependencies = featureSet(&[_]Feature{}),
1212 };
1213 result[@enumToInt(Feature.zcz_fp_workaround)] = .{
1214 .llvm_name = "zcz-fp-workaround",
1215 .description = "The zero-cycle floating-point zeroing instruction has a bug",
1216 .dependencies = featureSet(&[_]Feature{}),
1217 };
1218 result[@enumToInt(Feature.zcz_gp)] = .{
1219 .llvm_name = "zcz-gp",
1220 .description = "Has zero-cycle zeroing instructions for generic registers",
1221 .dependencies = featureSet(&[_]Feature{}),
1222 };
1223 const ti = @typeInfo(Feature);
1224 for (result) |*elem, i| {
1225 elem.index = i;
1226 elem.name = ti.Enum.fields[i].name;
1227 }
1228 break :blk result;
1229};
1230
1231pub const cpu = struct {
1232 pub const apple_latest = Cpu{
1233 .name = "apple_latest",
1234 .llvm_name = "apple-latest",
1235 .features = featureSet(&[_]Feature{
1236 .cyclone,
1237 }),
1238 };
1239 pub const cortex_a35 = Cpu{
1240 .name = "cortex_a35",
1241 .llvm_name = "cortex-a35",
1242 .features = featureSet(&[_]Feature{
1243 .a35,
1244 }),
1245 };
1246 pub const cortex_a53 = Cpu{
1247 .name = "cortex_a53",
1248 .llvm_name = "cortex-a53",
1249 .features = featureSet(&[_]Feature{
1250 .a53,
1251 }),
1252 };
1253 pub const cortex_a55 = Cpu{
1254 .name = "cortex_a55",
1255 .llvm_name = "cortex-a55",
1256 .features = featureSet(&[_]Feature{
1257 .a55,
1258 }),
1259 };
1260 pub const cortex_a57 = Cpu{
1261 .name = "cortex_a57",
1262 .llvm_name = "cortex-a57",
1263 .features = featureSet(&[_]Feature{
1264 .a57,
1265 }),
1266 };
1267 pub const cortex_a72 = Cpu{
1268 .name = "cortex_a72",
1269 .llvm_name = "cortex-a72",
1270 .features = featureSet(&[_]Feature{
1271 .a72,
1272 }),
1273 };
1274 pub const cortex_a73 = Cpu{
1275 .name = "cortex_a73",
1276 .llvm_name = "cortex-a73",
1277 .features = featureSet(&[_]Feature{
1278 .a73,
1279 }),
1280 };
1281 pub const cortex_a75 = Cpu{
1282 .name = "cortex_a75",
1283 .llvm_name = "cortex-a75",
1284 .features = featureSet(&[_]Feature{
1285 .a75,
1286 }),
1287 };
1288 pub const cortex_a76 = Cpu{
1289 .name = "cortex_a76",
1290 .llvm_name = "cortex-a76",
1291 .features = featureSet(&[_]Feature{
1292 .a76,
1293 }),
1294 };
1295 pub const cortex_a76ae = Cpu{
1296 .name = "cortex_a76ae",
1297 .llvm_name = "cortex-a76ae",
1298 .features = featureSet(&[_]Feature{
1299 .a76,
1300 }),
1301 };
1302 pub const cyclone = Cpu{
1303 .name = "cyclone",
1304 .llvm_name = "cyclone",
1305 .features = featureSet(&[_]Feature{
1306 .cyclone,
1307 }),
1308 };
1309 pub const exynos_m1 = Cpu{
1310 .name = "exynos_m1",
1311 .llvm_name = "exynos-m1",
1312 .features = featureSet(&[_]Feature{
1313 .exynosm1,
1314 }),
1315 };
1316 pub const exynos_m2 = Cpu{
1317 .name = "exynos_m2",
1318 .llvm_name = "exynos-m2",
1319 .features = featureSet(&[_]Feature{
1320 .exynosm2,
1321 }),
1322 };
1323 pub const exynos_m3 = Cpu{
1324 .name = "exynos_m3",
1325 .llvm_name = "exynos-m3",
1326 .features = featureSet(&[_]Feature{
1327 .exynosm3,
1328 }),
1329 };
1330 pub const exynos_m4 = Cpu{
1331 .name = "exynos_m4",
1332 .llvm_name = "exynos-m4",
1333 .features = featureSet(&[_]Feature{
1334 .exynosm4,
1335 }),
1336 };
1337 pub const exynos_m5 = Cpu{
1338 .name = "exynos_m5",
1339 .llvm_name = "exynos-m5",
1340 .features = featureSet(&[_]Feature{
1341 .exynosm4,
1342 }),
1343 };
1344 pub const falkor = Cpu{
1345 .name = "falkor",
1346 .llvm_name = "falkor",
1347 .features = featureSet(&[_]Feature{
1348 .falkor,
1349 }),
1350 };
1351 pub const generic = Cpu{
1352 .name = "generic",
1353 .llvm_name = "generic",
1354 .features = featureSet(&[_]Feature{
1355 .fp_armv8,
1356 .fuse_aes,
1357 .neon,
1358 .perfmon,
1359 .use_postra_scheduler,
1360 }),
1361 };
1362 pub const kryo = Cpu{
1363 .name = "kryo",
1364 .llvm_name = "kryo",
1365 .features = featureSet(&[_]Feature{
1366 .kryo,
1367 }),
1368 };
1369 pub const saphira = Cpu{
1370 .name = "saphira",
1371 .llvm_name = "saphira",
1372 .features = featureSet(&[_]Feature{
1373 .saphira,
1374 }),
1375 };
1376 pub const thunderx = Cpu{
1377 .name = "thunderx",
1378 .llvm_name = "thunderx",
1379 .features = featureSet(&[_]Feature{
1380 .thunderx,
1381 }),
1382 };
1383 pub const thunderx2t99 = Cpu{
1384 .name = "thunderx2t99",
1385 .llvm_name = "thunderx2t99",
1386 .features = featureSet(&[_]Feature{
1387 .thunderx2t99,
1388 }),
1389 };
1390 pub const thunderxt81 = Cpu{
1391 .name = "thunderxt81",
1392 .llvm_name = "thunderxt81",
1393 .features = featureSet(&[_]Feature{
1394 .thunderxt81,
1395 }),
1396 };
1397 pub const thunderxt83 = Cpu{
1398 .name = "thunderxt83",
1399 .llvm_name = "thunderxt83",
1400 .features = featureSet(&[_]Feature{
1401 .thunderxt83,
1402 }),
1403 };
1404 pub const thunderxt88 = Cpu{
1405 .name = "thunderxt88",
1406 .llvm_name = "thunderxt88",
1407 .features = featureSet(&[_]Feature{
1408 .thunderxt88,
1409 }),
1410 };
1411 pub const tsv110 = Cpu{
1412 .name = "tsv110",
1413 .llvm_name = "tsv110",
1414 .features = featureSet(&[_]Feature{
1415 .tsv110,
1416 }),
1417 };
1418};
1419
1420/// All aarch64 CPUs, sorted alphabetically by name.
1421/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
1422/// compiler has inefficient memory and CPU usage, affecting build times.
1423pub const all_cpus = &[_]*const Cpu{
1424 &cpu.apple_latest,
1425 &cpu.cortex_a35,
1426 &cpu.cortex_a53,
1427 &cpu.cortex_a55,
1428 &cpu.cortex_a57,
1429 &cpu.cortex_a72,
1430 &cpu.cortex_a73,
1431 &cpu.cortex_a75,
1432 &cpu.cortex_a76,
1433 &cpu.cortex_a76ae,
1434 &cpu.cyclone,
1435 &cpu.exynos_m1,
1436 &cpu.exynos_m2,
1437 &cpu.exynos_m3,
1438 &cpu.exynos_m4,
1439 &cpu.exynos_m5,
1440 &cpu.falkor,
1441 &cpu.generic,
1442 &cpu.kryo,
1443 &cpu.saphira,
1444 &cpu.thunderx,
1445 &cpu.thunderx2t99,
1446 &cpu.thunderxt81,
1447 &cpu.thunderxt83,
1448 &cpu.thunderxt88,
1449 &cpu.tsv110,
1450};
lib/std/target/amdgpu.zig created+1315
......@@ -0,0 +1,1315 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 @"16_bit_insts",
6 DumpCode,
7 add_no_carry_insts,
8 aperture_regs,
9 atomic_fadd_insts,
10 auto_waitcnt_before_barrier,
11 ci_insts,
12 code_object_v3,
13 cumode,
14 dl_insts,
15 dot1_insts,
16 dot2_insts,
17 dot3_insts,
18 dot4_insts,
19 dot5_insts,
20 dot6_insts,
21 dpp,
22 dpp8,
23 dumpcode,
24 enable_ds128,
25 enable_prt_strict_null,
26 fast_fmaf,
27 flat_address_space,
28 flat_for_global,
29 flat_global_insts,
30 flat_inst_offsets,
31 flat_scratch_insts,
32 flat_segment_offset_bug,
33 fma_mix_insts,
34 fmaf,
35 fp_exceptions,
36 fp16_denormals,
37 fp32_denormals,
38 fp64,
39 fp64_denormals,
40 fp64_fp16_denormals,
41 gcn3_encoding,
42 gfx10,
43 gfx10_insts,
44 gfx7_gfx8_gfx9_insts,
45 gfx8_insts,
46 gfx9,
47 gfx9_insts,
48 half_rate_64_ops,
49 inst_fwd_prefetch_bug,
50 int_clamp_insts,
51 inv_2pi_inline_imm,
52 lds_branch_vmem_war_hazard,
53 lds_misaligned_bug,
54 ldsbankcount16,
55 ldsbankcount32,
56 load_store_opt,
57 localmemorysize0,
58 localmemorysize32768,
59 localmemorysize65536,
60 mad_mix_insts,
61 mai_insts,
62 max_private_element_size_16,
63 max_private_element_size_4,
64 max_private_element_size_8,
65 mimg_r128,
66 movrel,
67 no_data_dep_hazard,
68 no_sdst_cmpx,
69 no_sram_ecc_support,
70 no_xnack_support,
71 nsa_encoding,
72 nsa_to_vmem_bug,
73 offset_3f_bug,
74 pk_fmac_f16_inst,
75 promote_alloca,
76 r128_a16,
77 register_banking,
78 s_memrealtime,
79 scalar_atomics,
80 scalar_flat_scratch_insts,
81 scalar_stores,
82 sdwa,
83 sdwa_mav,
84 sdwa_omod,
85 sdwa_out_mods_vopc,
86 sdwa_scalar,
87 sdwa_sdst,
88 sea_islands,
89 sgpr_init_bug,
90 si_scheduler,
91 smem_to_vector_write_hazard,
92 southern_islands,
93 sram_ecc,
94 trap_handler,
95 trig_reduced_range,
96 unaligned_buffer_access,
97 unaligned_scratch_access,
98 unpacked_d16_vmem,
99 unsafe_ds_offset_folding,
100 vcmpx_exec_war_hazard,
101 vcmpx_permlane_hazard,
102 vgpr_index_mode,
103 vmem_to_scalar_write_hazard,
104 volcanic_islands,
105 vop3_literal,
106 vop3p,
107 vscnt,
108 wavefrontsize16,
109 wavefrontsize32,
110 wavefrontsize64,
111 xnack,
112};
113
114pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
115
116pub const all_features = blk: {
117 const len = @typeInfo(Feature).Enum.fields.len;
118 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
119 var result: [len]Cpu.Feature = undefined;
120 result[@enumToInt(Feature.@"16_bit_insts")] = .{
121 .llvm_name = "16-bit-insts",
122 .description = "Has i16/f16 instructions",
123 .dependencies = featureSet(&[_]Feature{}),
124 };
125 result[@enumToInt(Feature.DumpCode)] = .{
126 .llvm_name = "DumpCode",
127 .description = "Dump MachineInstrs in the CodeEmitter",
128 .dependencies = featureSet(&[_]Feature{}),
129 };
130 result[@enumToInt(Feature.add_no_carry_insts)] = .{
131 .llvm_name = "add-no-carry-insts",
132 .description = "Have VALU add/sub instructions without carry out",
133 .dependencies = featureSet(&[_]Feature{}),
134 };
135 result[@enumToInt(Feature.aperture_regs)] = .{
136 .llvm_name = "aperture-regs",
137 .description = "Has Memory Aperture Base and Size Registers",
138 .dependencies = featureSet(&[_]Feature{}),
139 };
140 result[@enumToInt(Feature.atomic_fadd_insts)] = .{
141 .llvm_name = "atomic-fadd-insts",
142 .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions",
143 .dependencies = featureSet(&[_]Feature{}),
144 };
145 result[@enumToInt(Feature.auto_waitcnt_before_barrier)] = .{
146 .llvm_name = "auto-waitcnt-before-barrier",
147 .description = "Hardware automatically inserts waitcnt before barrier",
148 .dependencies = featureSet(&[_]Feature{}),
149 };
150 result[@enumToInt(Feature.ci_insts)] = .{
151 .llvm_name = "ci-insts",
152 .description = "Additional instructions for CI+",
153 .dependencies = featureSet(&[_]Feature{}),
154 };
155 result[@enumToInt(Feature.code_object_v3)] = .{
156 .llvm_name = "code-object-v3",
157 .description = "Generate code object version 3",
158 .dependencies = featureSet(&[_]Feature{}),
159 };
160 result[@enumToInt(Feature.cumode)] = .{
161 .llvm_name = "cumode",
162 .description = "Enable CU wavefront execution mode",
163 .dependencies = featureSet(&[_]Feature{}),
164 };
165 result[@enumToInt(Feature.dl_insts)] = .{
166 .llvm_name = "dl-insts",
167 .description = "Has v_fmac_f32 and v_xnor_b32 instructions",
168 .dependencies = featureSet(&[_]Feature{}),
169 };
170 result[@enumToInt(Feature.dot1_insts)] = .{
171 .llvm_name = "dot1-insts",
172 .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions",
173 .dependencies = featureSet(&[_]Feature{}),
174 };
175 result[@enumToInt(Feature.dot2_insts)] = .{
176 .llvm_name = "dot2-insts",
177 .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions",
178 .dependencies = featureSet(&[_]Feature{}),
179 };
180 result[@enumToInt(Feature.dot3_insts)] = .{
181 .llvm_name = "dot3-insts",
182 .description = "Has v_dot8c_i32_i4 instruction",
183 .dependencies = featureSet(&[_]Feature{}),
184 };
185 result[@enumToInt(Feature.dot4_insts)] = .{
186 .llvm_name = "dot4-insts",
187 .description = "Has v_dot2c_i32_i16 instruction",
188 .dependencies = featureSet(&[_]Feature{}),
189 };
190 result[@enumToInt(Feature.dot5_insts)] = .{
191 .llvm_name = "dot5-insts",
192 .description = "Has v_dot2c_f32_f16 instruction",
193 .dependencies = featureSet(&[_]Feature{}),
194 };
195 result[@enumToInt(Feature.dot6_insts)] = .{
196 .llvm_name = "dot6-insts",
197 .description = "Has v_dot4c_i32_i8 instruction",
198 .dependencies = featureSet(&[_]Feature{}),
199 };
200 result[@enumToInt(Feature.dpp)] = .{
201 .llvm_name = "dpp",
202 .description = "Support DPP (Data Parallel Primitives) extension",
203 .dependencies = featureSet(&[_]Feature{}),
204 };
205 result[@enumToInt(Feature.dpp8)] = .{
206 .llvm_name = "dpp8",
207 .description = "Support DPP8 (Data Parallel Primitives) extension",
208 .dependencies = featureSet(&[_]Feature{}),
209 };
210 result[@enumToInt(Feature.dumpcode)] = .{
211 .llvm_name = "dumpcode",
212 .description = "Dump MachineInstrs in the CodeEmitter",
213 .dependencies = featureSet(&[_]Feature{}),
214 };
215 result[@enumToInt(Feature.enable_ds128)] = .{
216 .llvm_name = "enable-ds128",
217 .description = "Use ds_read|write_b128",
218 .dependencies = featureSet(&[_]Feature{}),
219 };
220 result[@enumToInt(Feature.enable_prt_strict_null)] = .{
221 .llvm_name = "enable-prt-strict-null",
222 .description = "Enable zeroing of result registers for sparse texture fetches",
223 .dependencies = featureSet(&[_]Feature{}),
224 };
225 result[@enumToInt(Feature.fast_fmaf)] = .{
226 .llvm_name = "fast-fmaf",
227 .description = "Assuming f32 fma is at least as fast as mul + add",
228 .dependencies = featureSet(&[_]Feature{}),
229 };
230 result[@enumToInt(Feature.flat_address_space)] = .{
231 .llvm_name = "flat-address-space",
232 .description = "Support flat address space",
233 .dependencies = featureSet(&[_]Feature{}),
234 };
235 result[@enumToInt(Feature.flat_for_global)] = .{
236 .llvm_name = "flat-for-global",
237 .description = "Force to generate flat instruction for global",
238 .dependencies = featureSet(&[_]Feature{}),
239 };
240 result[@enumToInt(Feature.flat_global_insts)] = .{
241 .llvm_name = "flat-global-insts",
242 .description = "Have global_* flat memory instructions",
243 .dependencies = featureSet(&[_]Feature{}),
244 };
245 result[@enumToInt(Feature.flat_inst_offsets)] = .{
246 .llvm_name = "flat-inst-offsets",
247 .description = "Flat instructions have immediate offset addressing mode",
248 .dependencies = featureSet(&[_]Feature{}),
249 };
250 result[@enumToInt(Feature.flat_scratch_insts)] = .{
251 .llvm_name = "flat-scratch-insts",
252 .description = "Have scratch_* flat memory instructions",
253 .dependencies = featureSet(&[_]Feature{}),
254 };
255 result[@enumToInt(Feature.flat_segment_offset_bug)] = .{
256 .llvm_name = "flat-segment-offset-bug",
257 .description = "GFX10 bug, inst_offset ignored in flat segment",
258 .dependencies = featureSet(&[_]Feature{}),
259 };
260 result[@enumToInt(Feature.fma_mix_insts)] = .{
261 .llvm_name = "fma-mix-insts",
262 .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions",
263 .dependencies = featureSet(&[_]Feature{}),
264 };
265 result[@enumToInt(Feature.fmaf)] = .{
266 .llvm_name = "fmaf",
267 .description = "Enable single precision FMA (not as fast as mul+add, but fused)",
268 .dependencies = featureSet(&[_]Feature{}),
269 };
270 result[@enumToInt(Feature.fp_exceptions)] = .{
271 .llvm_name = "fp-exceptions",
272 .description = "Enable floating point exceptions",
273 .dependencies = featureSet(&[_]Feature{}),
274 };
275 result[@enumToInt(Feature.fp16_denormals)] = .{
276 .llvm_name = "fp16-denormals",
277 .description = "Enable half precision denormal handling",
278 .dependencies = featureSet(&[_]Feature{
279 .fp64_fp16_denormals,
280 }),
281 };
282 result[@enumToInt(Feature.fp32_denormals)] = .{
283 .llvm_name = "fp32-denormals",
284 .description = "Enable single precision denormal handling",
285 .dependencies = featureSet(&[_]Feature{}),
286 };
287 result[@enumToInt(Feature.fp64)] = .{
288 .llvm_name = "fp64",
289 .description = "Enable double precision operations",
290 .dependencies = featureSet(&[_]Feature{}),
291 };
292 result[@enumToInt(Feature.fp64_denormals)] = .{
293 .llvm_name = "fp64-denormals",
294 .description = "Enable double and half precision denormal handling",
295 .dependencies = featureSet(&[_]Feature{
296 .fp64,
297 .fp64_fp16_denormals,
298 }),
299 };
300 result[@enumToInt(Feature.fp64_fp16_denormals)] = .{
301 .llvm_name = "fp64-fp16-denormals",
302 .description = "Enable double and half precision denormal handling",
303 .dependencies = featureSet(&[_]Feature{
304 .fp64,
305 }),
306 };
307 result[@enumToInt(Feature.gcn3_encoding)] = .{
308 .llvm_name = "gcn3-encoding",
309 .description = "Encoding format for VI",
310 .dependencies = featureSet(&[_]Feature{}),
311 };
312 result[@enumToInt(Feature.gfx10)] = .{
313 .llvm_name = "gfx10",
314 .description = "GFX10 GPU generation",
315 .dependencies = featureSet(&[_]Feature{
316 .@"16_bit_insts",
317 .add_no_carry_insts,
318 .aperture_regs,
319 .ci_insts,
320 .dpp,
321 .dpp8,
322 .fast_fmaf,
323 .flat_address_space,
324 .flat_global_insts,
325 .flat_inst_offsets,
326 .flat_scratch_insts,
327 .fma_mix_insts,
328 .fp64,
329 .gfx10_insts,
330 .gfx8_insts,
331 .gfx9_insts,
332 .int_clamp_insts,
333 .inv_2pi_inline_imm,
334 .localmemorysize65536,
335 .mimg_r128,
336 .movrel,
337 .no_data_dep_hazard,
338 .no_sdst_cmpx,
339 .no_sram_ecc_support,
340 .pk_fmac_f16_inst,
341 .register_banking,
342 .s_memrealtime,
343 .sdwa,
344 .sdwa_omod,
345 .sdwa_scalar,
346 .sdwa_sdst,
347 .vop3_literal,
348 .vop3p,
349 .vscnt,
350 }),
351 };
352 result[@enumToInt(Feature.gfx10_insts)] = .{
353 .llvm_name = "gfx10-insts",
354 .description = "Additional instructions for GFX10+",
355 .dependencies = featureSet(&[_]Feature{}),
356 };
357 result[@enumToInt(Feature.gfx7_gfx8_gfx9_insts)] = .{
358 .llvm_name = "gfx7-gfx8-gfx9-insts",
359 .description = "Instructions shared in GFX7, GFX8, GFX9",
360 .dependencies = featureSet(&[_]Feature{}),
361 };
362 result[@enumToInt(Feature.gfx8_insts)] = .{
363 .llvm_name = "gfx8-insts",
364 .description = "Additional instructions for GFX8+",
365 .dependencies = featureSet(&[_]Feature{}),
366 };
367 result[@enumToInt(Feature.gfx9)] = .{
368 .llvm_name = "gfx9",
369 .description = "GFX9 GPU generation",
370 .dependencies = featureSet(&[_]Feature{
371 .@"16_bit_insts",
372 .add_no_carry_insts,
373 .aperture_regs,
374 .ci_insts,
375 .dpp,
376 .fast_fmaf,
377 .flat_address_space,
378 .flat_global_insts,
379 .flat_inst_offsets,
380 .flat_scratch_insts,
381 .fp64,
382 .gcn3_encoding,
383 .gfx7_gfx8_gfx9_insts,
384 .gfx8_insts,
385 .gfx9_insts,
386 .int_clamp_insts,
387 .inv_2pi_inline_imm,
388 .localmemorysize65536,
389 .r128_a16,
390 .s_memrealtime,
391 .scalar_atomics,
392 .scalar_flat_scratch_insts,
393 .scalar_stores,
394 .sdwa,
395 .sdwa_omod,
396 .sdwa_scalar,
397 .sdwa_sdst,
398 .vgpr_index_mode,
399 .vop3p,
400 .wavefrontsize64,
401 }),
402 };
403 result[@enumToInt(Feature.gfx9_insts)] = .{
404 .llvm_name = "gfx9-insts",
405 .description = "Additional instructions for GFX9+",
406 .dependencies = featureSet(&[_]Feature{}),
407 };
408 result[@enumToInt(Feature.half_rate_64_ops)] = .{
409 .llvm_name = "half-rate-64-ops",
410 .description = "Most fp64 instructions are half rate instead of quarter",
411 .dependencies = featureSet(&[_]Feature{}),
412 };
413 result[@enumToInt(Feature.inst_fwd_prefetch_bug)] = .{
414 .llvm_name = "inst-fwd-prefetch-bug",
415 .description = "S_INST_PREFETCH instruction causes shader to hang",
416 .dependencies = featureSet(&[_]Feature{}),
417 };
418 result[@enumToInt(Feature.int_clamp_insts)] = .{
419 .llvm_name = "int-clamp-insts",
420 .description = "Support clamp for integer destination",
421 .dependencies = featureSet(&[_]Feature{}),
422 };
423 result[@enumToInt(Feature.inv_2pi_inline_imm)] = .{
424 .llvm_name = "inv-2pi-inline-imm",
425 .description = "Has 1 / (2 * pi) as inline immediate",
426 .dependencies = featureSet(&[_]Feature{}),
427 };
428 result[@enumToInt(Feature.lds_branch_vmem_war_hazard)] = .{
429 .llvm_name = "lds-branch-vmem-war-hazard",
430 .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0",
431 .dependencies = featureSet(&[_]Feature{}),
432 };
433 result[@enumToInt(Feature.lds_misaligned_bug)] = .{
434 .llvm_name = "lds-misaligned-bug",
435 .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode",
436 .dependencies = featureSet(&[_]Feature{}),
437 };
438 result[@enumToInt(Feature.ldsbankcount16)] = .{
439 .llvm_name = "ldsbankcount16",
440 .description = "The number of LDS banks per compute unit.",
441 .dependencies = featureSet(&[_]Feature{}),
442 };
443 result[@enumToInt(Feature.ldsbankcount32)] = .{
444 .llvm_name = "ldsbankcount32",
445 .description = "The number of LDS banks per compute unit.",
446 .dependencies = featureSet(&[_]Feature{}),
447 };
448 result[@enumToInt(Feature.load_store_opt)] = .{
449 .llvm_name = "load-store-opt",
450 .description = "Enable SI load/store optimizer pass",
451 .dependencies = featureSet(&[_]Feature{}),
452 };
453 result[@enumToInt(Feature.localmemorysize0)] = .{
454 .llvm_name = "localmemorysize0",
455 .description = "The size of local memory in bytes",
456 .dependencies = featureSet(&[_]Feature{}),
457 };
458 result[@enumToInt(Feature.localmemorysize32768)] = .{
459 .llvm_name = "localmemorysize32768",
460 .description = "The size of local memory in bytes",
461 .dependencies = featureSet(&[_]Feature{}),
462 };
463 result[@enumToInt(Feature.localmemorysize65536)] = .{
464 .llvm_name = "localmemorysize65536",
465 .description = "The size of local memory in bytes",
466 .dependencies = featureSet(&[_]Feature{}),
467 };
468 result[@enumToInt(Feature.mad_mix_insts)] = .{
469 .llvm_name = "mad-mix-insts",
470 .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions",
471 .dependencies = featureSet(&[_]Feature{}),
472 };
473 result[@enumToInt(Feature.mai_insts)] = .{
474 .llvm_name = "mai-insts",
475 .description = "Has mAI instructions",
476 .dependencies = featureSet(&[_]Feature{}),
477 };
478 result[@enumToInt(Feature.max_private_element_size_16)] = .{
479 .llvm_name = "max-private-element-size-16",
480 .description = "Maximum private access size may be 16",
481 .dependencies = featureSet(&[_]Feature{}),
482 };
483 result[@enumToInt(Feature.max_private_element_size_4)] = .{
484 .llvm_name = "max-private-element-size-4",
485 .description = "Maximum private access size may be 4",
486 .dependencies = featureSet(&[_]Feature{}),
487 };
488 result[@enumToInt(Feature.max_private_element_size_8)] = .{
489 .llvm_name = "max-private-element-size-8",
490 .description = "Maximum private access size may be 8",
491 .dependencies = featureSet(&[_]Feature{}),
492 };
493 result[@enumToInt(Feature.mimg_r128)] = .{
494 .llvm_name = "mimg-r128",
495 .description = "Support 128-bit texture resources",
496 .dependencies = featureSet(&[_]Feature{}),
497 };
498 result[@enumToInt(Feature.movrel)] = .{
499 .llvm_name = "movrel",
500 .description = "Has v_movrel*_b32 instructions",
501 .dependencies = featureSet(&[_]Feature{}),
502 };
503 result[@enumToInt(Feature.no_data_dep_hazard)] = .{
504 .llvm_name = "no-data-dep-hazard",
505 .description = "Does not need SW waitstates",
506 .dependencies = featureSet(&[_]Feature{}),
507 };
508 result[@enumToInt(Feature.no_sdst_cmpx)] = .{
509 .llvm_name = "no-sdst-cmpx",
510 .description = "V_CMPX does not write VCC/SGPR in addition to EXEC",
511 .dependencies = featureSet(&[_]Feature{}),
512 };
513 result[@enumToInt(Feature.no_sram_ecc_support)] = .{
514 .llvm_name = "no-sram-ecc-support",
515 .description = "Hardware does not support SRAM ECC",
516 .dependencies = featureSet(&[_]Feature{}),
517 };
518 result[@enumToInt(Feature.no_xnack_support)] = .{
519 .llvm_name = "no-xnack-support",
520 .description = "Hardware does not support XNACK",
521 .dependencies = featureSet(&[_]Feature{}),
522 };
523 result[@enumToInt(Feature.nsa_encoding)] = .{
524 .llvm_name = "nsa-encoding",
525 .description = "Support NSA encoding for image instructions",
526 .dependencies = featureSet(&[_]Feature{}),
527 };
528 result[@enumToInt(Feature.nsa_to_vmem_bug)] = .{
529 .llvm_name = "nsa-to-vmem-bug",
530 .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero",
531 .dependencies = featureSet(&[_]Feature{}),
532 };
533 result[@enumToInt(Feature.offset_3f_bug)] = .{
534 .llvm_name = "offset-3f-bug",
535 .description = "Branch offset of 3f hardware bug",
536 .dependencies = featureSet(&[_]Feature{}),
537 };
538 result[@enumToInt(Feature.pk_fmac_f16_inst)] = .{
539 .llvm_name = "pk-fmac-f16-inst",
540 .description = "Has v_pk_fmac_f16 instruction",
541 .dependencies = featureSet(&[_]Feature{}),
542 };
543 result[@enumToInt(Feature.promote_alloca)] = .{
544 .llvm_name = "promote-alloca",
545 .description = "Enable promote alloca pass",
546 .dependencies = featureSet(&[_]Feature{}),
547 };
548 result[@enumToInt(Feature.r128_a16)] = .{
549 .llvm_name = "r128-a16",
550 .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9",
551 .dependencies = featureSet(&[_]Feature{}),
552 };
553 result[@enumToInt(Feature.register_banking)] = .{
554 .llvm_name = "register-banking",
555 .description = "Has register banking",
556 .dependencies = featureSet(&[_]Feature{}),
557 };
558 result[@enumToInt(Feature.s_memrealtime)] = .{
559 .llvm_name = "s-memrealtime",
560 .description = "Has s_memrealtime instruction",
561 .dependencies = featureSet(&[_]Feature{}),
562 };
563 result[@enumToInt(Feature.scalar_atomics)] = .{
564 .llvm_name = "scalar-atomics",
565 .description = "Has atomic scalar memory instructions",
566 .dependencies = featureSet(&[_]Feature{}),
567 };
568 result[@enumToInt(Feature.scalar_flat_scratch_insts)] = .{
569 .llvm_name = "scalar-flat-scratch-insts",
570 .description = "Have s_scratch_* flat memory instructions",
571 .dependencies = featureSet(&[_]Feature{}),
572 };
573 result[@enumToInt(Feature.scalar_stores)] = .{
574 .llvm_name = "scalar-stores",
575 .description = "Has store scalar memory instructions",
576 .dependencies = featureSet(&[_]Feature{}),
577 };
578 result[@enumToInt(Feature.sdwa)] = .{
579 .llvm_name = "sdwa",
580 .description = "Support SDWA (Sub-DWORD Addressing) extension",
581 .dependencies = featureSet(&[_]Feature{}),
582 };
583 result[@enumToInt(Feature.sdwa_mav)] = .{
584 .llvm_name = "sdwa-mav",
585 .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension",
586 .dependencies = featureSet(&[_]Feature{}),
587 };
588 result[@enumToInt(Feature.sdwa_omod)] = .{
589 .llvm_name = "sdwa-omod",
590 .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension",
591 .dependencies = featureSet(&[_]Feature{}),
592 };
593 result[@enumToInt(Feature.sdwa_out_mods_vopc)] = .{
594 .llvm_name = "sdwa-out-mods-vopc",
595 .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension",
596 .dependencies = featureSet(&[_]Feature{}),
597 };
598 result[@enumToInt(Feature.sdwa_scalar)] = .{
599 .llvm_name = "sdwa-scalar",
600 .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension",
601 .dependencies = featureSet(&[_]Feature{}),
602 };
603 result[@enumToInt(Feature.sdwa_sdst)] = .{
604 .llvm_name = "sdwa-sdst",
605 .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension",
606 .dependencies = featureSet(&[_]Feature{}),
607 };
608 result[@enumToInt(Feature.sea_islands)] = .{
609 .llvm_name = "sea-islands",
610 .description = "SEA_ISLANDS GPU generation",
611 .dependencies = featureSet(&[_]Feature{
612 .ci_insts,
613 .flat_address_space,
614 .fp64,
615 .gfx7_gfx8_gfx9_insts,
616 .localmemorysize65536,
617 .mimg_r128,
618 .movrel,
619 .no_sram_ecc_support,
620 .trig_reduced_range,
621 .wavefrontsize64,
622 }),
623 };
624 result[@enumToInt(Feature.sgpr_init_bug)] = .{
625 .llvm_name = "sgpr-init-bug",
626 .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size",
627 .dependencies = featureSet(&[_]Feature{}),
628 };
629 result[@enumToInt(Feature.si_scheduler)] = .{
630 .llvm_name = "si-scheduler",
631 .description = "Enable SI Machine Scheduler",
632 .dependencies = featureSet(&[_]Feature{}),
633 };
634 result[@enumToInt(Feature.smem_to_vector_write_hazard)] = .{
635 .llvm_name = "smem-to-vector-write-hazard",
636 .description = "s_load_dword followed by v_cmp page faults",
637 .dependencies = featureSet(&[_]Feature{}),
638 };
639 result[@enumToInt(Feature.southern_islands)] = .{
640 .llvm_name = "southern-islands",
641 .description = "SOUTHERN_ISLANDS GPU generation",
642 .dependencies = featureSet(&[_]Feature{
643 .fp64,
644 .ldsbankcount32,
645 .localmemorysize32768,
646 .mimg_r128,
647 .movrel,
648 .no_sram_ecc_support,
649 .no_xnack_support,
650 .trig_reduced_range,
651 .wavefrontsize64,
652 }),
653 };
654 result[@enumToInt(Feature.sram_ecc)] = .{
655 .llvm_name = "sram-ecc",
656 .description = "Enable SRAM ECC",
657 .dependencies = featureSet(&[_]Feature{}),
658 };
659 result[@enumToInt(Feature.trap_handler)] = .{
660 .llvm_name = "trap-handler",
661 .description = "Trap handler support",
662 .dependencies = featureSet(&[_]Feature{}),
663 };
664 result[@enumToInt(Feature.trig_reduced_range)] = .{
665 .llvm_name = "trig-reduced-range",
666 .description = "Requires use of fract on arguments to trig instructions",
667 .dependencies = featureSet(&[_]Feature{}),
668 };
669 result[@enumToInt(Feature.unaligned_buffer_access)] = .{
670 .llvm_name = "unaligned-buffer-access",
671 .description = "Support unaligned global loads and stores",
672 .dependencies = featureSet(&[_]Feature{}),
673 };
674 result[@enumToInt(Feature.unaligned_scratch_access)] = .{
675 .llvm_name = "unaligned-scratch-access",
676 .description = "Support unaligned scratch loads and stores",
677 .dependencies = featureSet(&[_]Feature{}),
678 };
679 result[@enumToInt(Feature.unpacked_d16_vmem)] = .{
680 .llvm_name = "unpacked-d16-vmem",
681 .description = "Has unpacked d16 vmem instructions",
682 .dependencies = featureSet(&[_]Feature{}),
683 };
684 result[@enumToInt(Feature.unsafe_ds_offset_folding)] = .{
685 .llvm_name = "unsafe-ds-offset-folding",
686 .description = "Force using DS instruction immediate offsets on SI",
687 .dependencies = featureSet(&[_]Feature{}),
688 };
689 result[@enumToInt(Feature.vcmpx_exec_war_hazard)] = .{
690 .llvm_name = "vcmpx-exec-war-hazard",
691 .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)",
692 .dependencies = featureSet(&[_]Feature{}),
693 };
694 result[@enumToInt(Feature.vcmpx_permlane_hazard)] = .{
695 .llvm_name = "vcmpx-permlane-hazard",
696 .description = "TODO: describe me",
697 .dependencies = featureSet(&[_]Feature{}),
698 };
699 result[@enumToInt(Feature.vgpr_index_mode)] = .{
700 .llvm_name = "vgpr-index-mode",
701 .description = "Has VGPR mode register indexing",
702 .dependencies = featureSet(&[_]Feature{}),
703 };
704 result[@enumToInt(Feature.vmem_to_scalar_write_hazard)] = .{
705 .llvm_name = "vmem-to-scalar-write-hazard",
706 .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.",
707 .dependencies = featureSet(&[_]Feature{}),
708 };
709 result[@enumToInt(Feature.volcanic_islands)] = .{
710 .llvm_name = "volcanic-islands",
711 .description = "VOLCANIC_ISLANDS GPU generation",
712 .dependencies = featureSet(&[_]Feature{
713 .@"16_bit_insts",
714 .ci_insts,
715 .dpp,
716 .flat_address_space,
717 .fp64,
718 .gcn3_encoding,
719 .gfx7_gfx8_gfx9_insts,
720 .gfx8_insts,
721 .int_clamp_insts,
722 .inv_2pi_inline_imm,
723 .localmemorysize65536,
724 .mimg_r128,
725 .movrel,
726 .no_sram_ecc_support,
727 .s_memrealtime,
728 .scalar_stores,
729 .sdwa,
730 .sdwa_mav,
731 .sdwa_out_mods_vopc,
732 .trig_reduced_range,
733 .vgpr_index_mode,
734 .wavefrontsize64,
735 }),
736 };
737 result[@enumToInt(Feature.vop3_literal)] = .{
738 .llvm_name = "vop3-literal",
739 .description = "Can use one literal in VOP3",
740 .dependencies = featureSet(&[_]Feature{}),
741 };
742 result[@enumToInt(Feature.vop3p)] = .{
743 .llvm_name = "vop3p",
744 .description = "Has VOP3P packed instructions",
745 .dependencies = featureSet(&[_]Feature{}),
746 };
747 result[@enumToInt(Feature.vscnt)] = .{
748 .llvm_name = "vscnt",
749 .description = "Has separate store vscnt counter",
750 .dependencies = featureSet(&[_]Feature{}),
751 };
752 result[@enumToInt(Feature.wavefrontsize16)] = .{
753 .llvm_name = "wavefrontsize16",
754 .description = "The number of threads per wavefront",
755 .dependencies = featureSet(&[_]Feature{}),
756 };
757 result[@enumToInt(Feature.wavefrontsize32)] = .{
758 .llvm_name = "wavefrontsize32",
759 .description = "The number of threads per wavefront",
760 .dependencies = featureSet(&[_]Feature{}),
761 };
762 result[@enumToInt(Feature.wavefrontsize64)] = .{
763 .llvm_name = "wavefrontsize64",
764 .description = "The number of threads per wavefront",
765 .dependencies = featureSet(&[_]Feature{}),
766 };
767 result[@enumToInt(Feature.xnack)] = .{
768 .llvm_name = "xnack",
769 .description = "Enable XNACK support",
770 .dependencies = featureSet(&[_]Feature{}),
771 };
772 const ti = @typeInfo(Feature);
773 for (result) |*elem, i| {
774 elem.index = i;
775 elem.name = ti.Enum.fields[i].name;
776 }
777 break :blk result;
778};
779
780pub const cpu = struct {
781 pub const bonaire = Cpu{
782 .name = "bonaire",
783 .llvm_name = "bonaire",
784 .features = featureSet(&[_]Feature{
785 .code_object_v3,
786 .ldsbankcount32,
787 .no_xnack_support,
788 .sea_islands,
789 }),
790 };
791 pub const carrizo = Cpu{
792 .name = "carrizo",
793 .llvm_name = "carrizo",
794 .features = featureSet(&[_]Feature{
795 .code_object_v3,
796 .fast_fmaf,
797 .half_rate_64_ops,
798 .ldsbankcount32,
799 .unpacked_d16_vmem,
800 .volcanic_islands,
801 .xnack,
802 }),
803 };
804 pub const fiji = Cpu{
805 .name = "fiji",
806 .llvm_name = "fiji",
807 .features = featureSet(&[_]Feature{
808 .code_object_v3,
809 .ldsbankcount32,
810 .no_xnack_support,
811 .unpacked_d16_vmem,
812 .volcanic_islands,
813 }),
814 };
815 pub const generic = Cpu{
816 .name = "generic",
817 .llvm_name = "generic",
818 .features = featureSet(&[_]Feature{
819 .wavefrontsize64,
820 }),
821 };
822 pub const generic_hsa = Cpu{
823 .name = "generic_hsa",
824 .llvm_name = "generic-hsa",
825 .features = featureSet(&[_]Feature{
826 .flat_address_space,
827 .wavefrontsize64,
828 }),
829 };
830 pub const gfx1010 = Cpu{
831 .name = "gfx1010",
832 .llvm_name = "gfx1010",
833 .features = featureSet(&[_]Feature{
834 .code_object_v3,
835 .dl_insts,
836 .flat_segment_offset_bug,
837 .gfx10,
838 .inst_fwd_prefetch_bug,
839 .lds_branch_vmem_war_hazard,
840 .lds_misaligned_bug,
841 .ldsbankcount32,
842 .no_xnack_support,
843 .nsa_encoding,
844 .nsa_to_vmem_bug,
845 .offset_3f_bug,
846 .scalar_atomics,
847 .scalar_flat_scratch_insts,
848 .scalar_stores,
849 .smem_to_vector_write_hazard,
850 .vcmpx_exec_war_hazard,
851 .vcmpx_permlane_hazard,
852 .vmem_to_scalar_write_hazard,
853 .wavefrontsize32,
854 }),
855 };
856 pub const gfx1011 = Cpu{
857 .name = "gfx1011",
858 .llvm_name = "gfx1011",
859 .features = featureSet(&[_]Feature{
860 .code_object_v3,
861 .dl_insts,
862 .dot1_insts,
863 .dot2_insts,
864 .dot5_insts,
865 .dot6_insts,
866 .flat_segment_offset_bug,
867 .gfx10,
868 .inst_fwd_prefetch_bug,
869 .lds_branch_vmem_war_hazard,
870 .ldsbankcount32,
871 .no_xnack_support,
872 .nsa_encoding,
873 .nsa_to_vmem_bug,
874 .offset_3f_bug,
875 .scalar_atomics,
876 .scalar_flat_scratch_insts,
877 .scalar_stores,
878 .smem_to_vector_write_hazard,
879 .vcmpx_exec_war_hazard,
880 .vcmpx_permlane_hazard,
881 .vmem_to_scalar_write_hazard,
882 .wavefrontsize32,
883 }),
884 };
885 pub const gfx1012 = Cpu{
886 .name = "gfx1012",
887 .llvm_name = "gfx1012",
888 .features = featureSet(&[_]Feature{
889 .code_object_v3,
890 .dl_insts,
891 .dot1_insts,
892 .dot2_insts,
893 .dot5_insts,
894 .dot6_insts,
895 .flat_segment_offset_bug,
896 .gfx10,
897 .inst_fwd_prefetch_bug,
898 .lds_branch_vmem_war_hazard,
899 .lds_misaligned_bug,
900 .ldsbankcount32,
901 .no_xnack_support,
902 .nsa_encoding,
903 .nsa_to_vmem_bug,
904 .offset_3f_bug,
905 .scalar_atomics,
906 .scalar_flat_scratch_insts,
907 .scalar_stores,
908 .smem_to_vector_write_hazard,
909 .vcmpx_exec_war_hazard,
910 .vcmpx_permlane_hazard,
911 .vmem_to_scalar_write_hazard,
912 .wavefrontsize32,
913 }),
914 };
915 pub const gfx600 = Cpu{
916 .name = "gfx600",
917 .llvm_name = "gfx600",
918 .features = featureSet(&[_]Feature{
919 .code_object_v3,
920 .fast_fmaf,
921 .half_rate_64_ops,
922 .ldsbankcount32,
923 .no_xnack_support,
924 .southern_islands,
925 }),
926 };
927 pub const gfx601 = Cpu{
928 .name = "gfx601",
929 .llvm_name = "gfx601",
930 .features = featureSet(&[_]Feature{
931 .code_object_v3,
932 .ldsbankcount32,
933 .no_xnack_support,
934 .southern_islands,
935 }),
936 };
937 pub const gfx700 = Cpu{
938 .name = "gfx700",
939 .llvm_name = "gfx700",
940 .features = featureSet(&[_]Feature{
941 .code_object_v3,
942 .ldsbankcount32,
943 .no_xnack_support,
944 .sea_islands,
945 }),
946 };
947 pub const gfx701 = Cpu{
948 .name = "gfx701",
949 .llvm_name = "gfx701",
950 .features = featureSet(&[_]Feature{
951 .code_object_v3,
952 .fast_fmaf,
953 .half_rate_64_ops,
954 .ldsbankcount32,
955 .no_xnack_support,
956 .sea_islands,
957 }),
958 };
959 pub const gfx702 = Cpu{
960 .name = "gfx702",
961 .llvm_name = "gfx702",
962 .features = featureSet(&[_]Feature{
963 .code_object_v3,
964 .fast_fmaf,
965 .ldsbankcount16,
966 .no_xnack_support,
967 .sea_islands,
968 }),
969 };
970 pub const gfx703 = Cpu{
971 .name = "gfx703",
972 .llvm_name = "gfx703",
973 .features = featureSet(&[_]Feature{
974 .code_object_v3,
975 .ldsbankcount16,
976 .no_xnack_support,
977 .sea_islands,
978 }),
979 };
980 pub const gfx704 = Cpu{
981 .name = "gfx704",
982 .llvm_name = "gfx704",
983 .features = featureSet(&[_]Feature{
984 .code_object_v3,
985 .ldsbankcount32,
986 .no_xnack_support,
987 .sea_islands,
988 }),
989 };
990 pub const gfx801 = Cpu{
991 .name = "gfx801",
992 .llvm_name = "gfx801",
993 .features = featureSet(&[_]Feature{
994 .code_object_v3,
995 .fast_fmaf,
996 .half_rate_64_ops,
997 .ldsbankcount32,
998 .unpacked_d16_vmem,
999 .volcanic_islands,
1000 .xnack,
1001 }),
1002 };
1003 pub const gfx802 = Cpu{
1004 .name = "gfx802",
1005 .llvm_name = "gfx802",
1006 .features = featureSet(&[_]Feature{
1007 .code_object_v3,
1008 .ldsbankcount32,
1009 .no_xnack_support,
1010 .sgpr_init_bug,
1011 .unpacked_d16_vmem,
1012 .volcanic_islands,
1013 }),
1014 };
1015 pub const gfx803 = Cpu{
1016 .name = "gfx803",
1017 .llvm_name = "gfx803",
1018 .features = featureSet(&[_]Feature{
1019 .code_object_v3,
1020 .ldsbankcount32,
1021 .no_xnack_support,
1022 .unpacked_d16_vmem,
1023 .volcanic_islands,
1024 }),
1025 };
1026 pub const gfx810 = Cpu{
1027 .name = "gfx810",
1028 .llvm_name = "gfx810",
1029 .features = featureSet(&[_]Feature{
1030 .code_object_v3,
1031 .ldsbankcount16,
1032 .volcanic_islands,
1033 .xnack,
1034 }),
1035 };
1036 pub const gfx900 = Cpu{
1037 .name = "gfx900",
1038 .llvm_name = "gfx900",
1039 .features = featureSet(&[_]Feature{
1040 .code_object_v3,
1041 .gfx9,
1042 .ldsbankcount32,
1043 .mad_mix_insts,
1044 .no_sram_ecc_support,
1045 .no_xnack_support,
1046 }),
1047 };
1048 pub const gfx902 = Cpu{
1049 .name = "gfx902",
1050 .llvm_name = "gfx902",
1051 .features = featureSet(&[_]Feature{
1052 .code_object_v3,
1053 .gfx9,
1054 .ldsbankcount32,
1055 .mad_mix_insts,
1056 .no_sram_ecc_support,
1057 .xnack,
1058 }),
1059 };
1060 pub const gfx904 = Cpu{
1061 .name = "gfx904",
1062 .llvm_name = "gfx904",
1063 .features = featureSet(&[_]Feature{
1064 .code_object_v3,
1065 .fma_mix_insts,
1066 .gfx9,
1067 .ldsbankcount32,
1068 .no_sram_ecc_support,
1069 .no_xnack_support,
1070 }),
1071 };
1072 pub const gfx906 = Cpu{
1073 .name = "gfx906",
1074 .llvm_name = "gfx906",
1075 .features = featureSet(&[_]Feature{
1076 .code_object_v3,
1077 .dl_insts,
1078 .dot1_insts,
1079 .dot2_insts,
1080 .fma_mix_insts,
1081 .gfx9,
1082 .half_rate_64_ops,
1083 .ldsbankcount32,
1084 .no_xnack_support,
1085 }),
1086 };
1087 pub const gfx908 = Cpu{
1088 .name = "gfx908",
1089 .llvm_name = "gfx908",
1090 .features = featureSet(&[_]Feature{
1091 .atomic_fadd_insts,
1092 .code_object_v3,
1093 .dl_insts,
1094 .dot1_insts,
1095 .dot2_insts,
1096 .dot3_insts,
1097 .dot4_insts,
1098 .dot5_insts,
1099 .dot6_insts,
1100 .fma_mix_insts,
1101 .gfx9,
1102 .half_rate_64_ops,
1103 .ldsbankcount32,
1104 .mai_insts,
1105 .pk_fmac_f16_inst,
1106 .sram_ecc,
1107 }),
1108 };
1109 pub const gfx909 = Cpu{
1110 .name = "gfx909",
1111 .llvm_name = "gfx909",
1112 .features = featureSet(&[_]Feature{
1113 .code_object_v3,
1114 .gfx9,
1115 .ldsbankcount32,
1116 .mad_mix_insts,
1117 .xnack,
1118 }),
1119 };
1120 pub const hainan = Cpu{
1121 .name = "hainan",
1122 .llvm_name = "hainan",
1123 .features = featureSet(&[_]Feature{
1124 .code_object_v3,
1125 .ldsbankcount32,
1126 .no_xnack_support,
1127 .southern_islands,
1128 }),
1129 };
1130 pub const hawaii = Cpu{
1131 .name = "hawaii",
1132 .llvm_name = "hawaii",
1133 .features = featureSet(&[_]Feature{
1134 .code_object_v3,
1135 .fast_fmaf,
1136 .half_rate_64_ops,
1137 .ldsbankcount32,
1138 .no_xnack_support,
1139 .sea_islands,
1140 }),
1141 };
1142 pub const iceland = Cpu{
1143 .name = "iceland",
1144 .llvm_name = "iceland",
1145 .features = featureSet(&[_]Feature{
1146 .code_object_v3,
1147 .ldsbankcount32,
1148 .no_xnack_support,
1149 .sgpr_init_bug,
1150 .unpacked_d16_vmem,
1151 .volcanic_islands,
1152 }),
1153 };
1154 pub const kabini = Cpu{
1155 .name = "kabini",
1156 .llvm_name = "kabini",
1157 .features = featureSet(&[_]Feature{
1158 .code_object_v3,
1159 .ldsbankcount16,
1160 .no_xnack_support,
1161 .sea_islands,
1162 }),
1163 };
1164 pub const kaveri = Cpu{
1165 .name = "kaveri",
1166 .llvm_name = "kaveri",
1167 .features = featureSet(&[_]Feature{
1168 .code_object_v3,
1169 .ldsbankcount32,
1170 .no_xnack_support,
1171 .sea_islands,
1172 }),
1173 };
1174 pub const mullins = Cpu{
1175 .name = "mullins",
1176 .llvm_name = "mullins",
1177 .features = featureSet(&[_]Feature{
1178 .code_object_v3,
1179 .ldsbankcount16,
1180 .no_xnack_support,
1181 .sea_islands,
1182 }),
1183 };
1184 pub const oland = Cpu{
1185 .name = "oland",
1186 .llvm_name = "oland",
1187 .features = featureSet(&[_]Feature{
1188 .code_object_v3,
1189 .ldsbankcount32,
1190 .no_xnack_support,
1191 .southern_islands,
1192 }),
1193 };
1194 pub const pitcairn = Cpu{
1195 .name = "pitcairn",
1196 .llvm_name = "pitcairn",
1197 .features = featureSet(&[_]Feature{
1198 .code_object_v3,
1199 .ldsbankcount32,
1200 .no_xnack_support,
1201 .southern_islands,
1202 }),
1203 };
1204 pub const polaris10 = Cpu{
1205 .name = "polaris10",
1206 .llvm_name = "polaris10",
1207 .features = featureSet(&[_]Feature{
1208 .code_object_v3,
1209 .ldsbankcount32,
1210 .no_xnack_support,
1211 .unpacked_d16_vmem,
1212 .volcanic_islands,
1213 }),
1214 };
1215 pub const polaris11 = Cpu{
1216 .name = "polaris11",
1217 .llvm_name = "polaris11",
1218 .features = featureSet(&[_]Feature{
1219 .code_object_v3,
1220 .ldsbankcount32,
1221 .no_xnack_support,
1222 .unpacked_d16_vmem,
1223 .volcanic_islands,
1224 }),
1225 };
1226 pub const stoney = Cpu{
1227 .name = "stoney",
1228 .llvm_name = "stoney",
1229 .features = featureSet(&[_]Feature{
1230 .code_object_v3,
1231 .ldsbankcount16,
1232 .volcanic_islands,
1233 .xnack,
1234 }),
1235 };
1236 pub const tahiti = Cpu{
1237 .name = "tahiti",
1238 .llvm_name = "tahiti",
1239 .features = featureSet(&[_]Feature{
1240 .code_object_v3,
1241 .fast_fmaf,
1242 .half_rate_64_ops,
1243 .ldsbankcount32,
1244 .no_xnack_support,
1245 .southern_islands,
1246 }),
1247 };
1248 pub const tonga = Cpu{
1249 .name = "tonga",
1250 .llvm_name = "tonga",
1251 .features = featureSet(&[_]Feature{
1252 .code_object_v3,
1253 .ldsbankcount32,
1254 .no_xnack_support,
1255 .sgpr_init_bug,
1256 .unpacked_d16_vmem,
1257 .volcanic_islands,
1258 }),
1259 };
1260 pub const verde = Cpu{
1261 .name = "verde",
1262 .llvm_name = "verde",
1263 .features = featureSet(&[_]Feature{
1264 .code_object_v3,
1265 .ldsbankcount32,
1266 .no_xnack_support,
1267 .southern_islands,
1268 }),
1269 };
1270};
1271
1272/// All amdgpu CPUs, sorted alphabetically by name.
1273/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
1274/// compiler has inefficient memory and CPU usage, affecting build times.
1275pub const all_cpus = &[_]*const Cpu{
1276 &cpu.bonaire,
1277 &cpu.carrizo,
1278 &cpu.fiji,
1279 &cpu.generic,
1280 &cpu.generic_hsa,
1281 &cpu.gfx1010,
1282 &cpu.gfx1011,
1283 &cpu.gfx1012,
1284 &cpu.gfx600,
1285 &cpu.gfx601,
1286 &cpu.gfx700,
1287 &cpu.gfx701,
1288 &cpu.gfx702,
1289 &cpu.gfx703,
1290 &cpu.gfx704,
1291 &cpu.gfx801,
1292 &cpu.gfx802,
1293 &cpu.gfx803,
1294 &cpu.gfx810,
1295 &cpu.gfx900,
1296 &cpu.gfx902,
1297 &cpu.gfx904,
1298 &cpu.gfx906,
1299 &cpu.gfx908,
1300 &cpu.gfx909,
1301 &cpu.hainan,
1302 &cpu.hawaii,
1303 &cpu.iceland,
1304 &cpu.kabini,
1305 &cpu.kaveri,
1306 &cpu.mullins,
1307 &cpu.oland,
1308 &cpu.pitcairn,
1309 &cpu.polaris10,
1310 &cpu.polaris11,
1311 &cpu.stoney,
1312 &cpu.tahiti,
1313 &cpu.tonga,
1314 &cpu.verde,
1315};
lib/std/target/arm.zig created+2333
......@@ -0,0 +1,2333 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 @"32bit",
6 @"8msecext",
7 a12,
8 a15,
9 a17,
10 a32,
11 a35,
12 a5,
13 a53,
14 a55,
15 a57,
16 a7,
17 a72,
18 a73,
19 a75,
20 a76,
21 a8,
22 a9,
23 aclass,
24 acquire_release,
25 aes,
26 armv2,
27 armv2a,
28 armv3,
29 armv3m,
30 armv4,
31 armv4t,
32 armv5t,
33 armv5te,
34 armv5tej,
35 armv6,
36 armv6_m,
37 armv6j,
38 armv6k,
39 armv6kz,
40 armv6s_m,
41 armv6t2,
42 armv7_a,
43 armv7_m,
44 armv7_r,
45 armv7e_m,
46 armv7k,
47 armv7s,
48 armv7ve,
49 armv8_a,
50 armv8_m_base,
51 armv8_m_main,
52 armv8_r,
53 armv8_1_a,
54 armv8_1_m_main,
55 armv8_2_a,
56 armv8_3_a,
57 armv8_4_a,
58 armv8_5_a,
59 avoid_movs_shop,
60 avoid_partial_cpsr,
61 cheap_predicable_cpsr,
62 crc,
63 crypto,
64 d32,
65 db,
66 dfb,
67 disable_postra_scheduler,
68 dont_widen_vmovs,
69 dotprod,
70 dsp,
71 execute_only,
72 expand_fp_mlx,
73 exynos,
74 fp_armv8,
75 fp_armv8d16,
76 fp_armv8d16sp,
77 fp_armv8sp,
78 fp16,
79 fp16fml,
80 fp64,
81 fpao,
82 fpregs,
83 fpregs16,
84 fpregs64,
85 fullfp16,
86 fuse_aes,
87 fuse_literals,
88 hwdiv,
89 hwdiv_arm,
90 iwmmxt,
91 iwmmxt2,
92 krait,
93 kryo,
94 lob,
95 long_calls,
96 loop_align,
97 m3,
98 mclass,
99 mp,
100 muxed_units,
101 mve,
102 mve_fp,
103 nacl_trap,
104 neon,
105 neon_fpmovs,
106 neonfp,
107 no_branch_predictor,
108 no_movt,
109 no_neg_immediates,
110 noarm,
111 nonpipelined_vfp,
112 perfmon,
113 prefer_ishst,
114 prefer_vmovsr,
115 prof_unpr,
116 r4,
117 r5,
118 r52,
119 r7,
120 ras,
121 rclass,
122 read_tp_hard,
123 reserve_r9,
124 ret_addr_stack,
125 sb,
126 sha2,
127 slow_fp_brcc,
128 slow_load_D_subreg,
129 slow_odd_reg,
130 slow_vdup32,
131 slow_vgetlni32,
132 slowfpvmlx,
133 soft_float,
134 splat_vfp_neon,
135 strict_align,
136 swift,
137 thumb_mode,
138 thumb2,
139 trustzone,
140 use_aa,
141 use_misched,
142 v4t,
143 v5t,
144 v5te,
145 v6,
146 v6k,
147 v6m,
148 v6t2,
149 v7,
150 v7clrex,
151 v8,
152 v8_1a,
153 v8_1m_main,
154 v8_2a,
155 v8_3a,
156 v8_4a,
157 v8_5a,
158 v8m,
159 v8m_main,
160 vfp2,
161 vfp2d16,
162 vfp2d16sp,
163 vfp2sp,
164 vfp3,
165 vfp3d16,
166 vfp3d16sp,
167 vfp3sp,
168 vfp4,
169 vfp4d16,
170 vfp4d16sp,
171 vfp4sp,
172 virtualization,
173 vldn_align,
174 vmlx_forwarding,
175 vmlx_hazards,
176 wide_stride_vfp,
177 xscale,
178 zcz,
179};
180
181pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
182
183pub const all_features = blk: {
184 @setEvalBranchQuota(10000);
185 const len = @typeInfo(Feature).Enum.fields.len;
186 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
187 var result: [len]Cpu.Feature = undefined;
188 result[@enumToInt(Feature.@"32bit")] = .{
189 .llvm_name = "32bit",
190 .description = "Prefer 32-bit Thumb instrs",
191 .dependencies = featureSet(&[_]Feature{}),
192 };
193 result[@enumToInt(Feature.@"8msecext")] = .{
194 .llvm_name = "8msecext",
195 .description = "Enable support for ARMv8-M Security Extensions",
196 .dependencies = featureSet(&[_]Feature{}),
197 };
198 result[@enumToInt(Feature.a12)] = .{
199 .llvm_name = "a12",
200 .description = "Cortex-A12 ARM processors",
201 .dependencies = featureSet(&[_]Feature{}),
202 };
203 result[@enumToInt(Feature.a15)] = .{
204 .llvm_name = "a15",
205 .description = "Cortex-A15 ARM processors",
206 .dependencies = featureSet(&[_]Feature{}),
207 };
208 result[@enumToInt(Feature.a17)] = .{
209 .llvm_name = "a17",
210 .description = "Cortex-A17 ARM processors",
211 .dependencies = featureSet(&[_]Feature{}),
212 };
213 result[@enumToInt(Feature.a32)] = .{
214 .llvm_name = "a32",
215 .description = "Cortex-A32 ARM processors",
216 .dependencies = featureSet(&[_]Feature{}),
217 };
218 result[@enumToInt(Feature.a35)] = .{
219 .llvm_name = "a35",
220 .description = "Cortex-A35 ARM processors",
221 .dependencies = featureSet(&[_]Feature{}),
222 };
223 result[@enumToInt(Feature.a5)] = .{
224 .llvm_name = "a5",
225 .description = "Cortex-A5 ARM processors",
226 .dependencies = featureSet(&[_]Feature{}),
227 };
228 result[@enumToInt(Feature.a53)] = .{
229 .llvm_name = "a53",
230 .description = "Cortex-A53 ARM processors",
231 .dependencies = featureSet(&[_]Feature{}),
232 };
233 result[@enumToInt(Feature.a55)] = .{
234 .llvm_name = "a55",
235 .description = "Cortex-A55 ARM processors",
236 .dependencies = featureSet(&[_]Feature{}),
237 };
238 result[@enumToInt(Feature.a57)] = .{
239 .llvm_name = "a57",
240 .description = "Cortex-A57 ARM processors",
241 .dependencies = featureSet(&[_]Feature{}),
242 };
243 result[@enumToInt(Feature.a7)] = .{
244 .llvm_name = "a7",
245 .description = "Cortex-A7 ARM processors",
246 .dependencies = featureSet(&[_]Feature{}),
247 };
248 result[@enumToInt(Feature.a72)] = .{
249 .llvm_name = "a72",
250 .description = "Cortex-A72 ARM processors",
251 .dependencies = featureSet(&[_]Feature{}),
252 };
253 result[@enumToInt(Feature.a73)] = .{
254 .llvm_name = "a73",
255 .description = "Cortex-A73 ARM processors",
256 .dependencies = featureSet(&[_]Feature{}),
257 };
258 result[@enumToInt(Feature.a75)] = .{
259 .llvm_name = "a75",
260 .description = "Cortex-A75 ARM processors",
261 .dependencies = featureSet(&[_]Feature{}),
262 };
263 result[@enumToInt(Feature.a76)] = .{
264 .llvm_name = "a76",
265 .description = "Cortex-A76 ARM processors",
266 .dependencies = featureSet(&[_]Feature{}),
267 };
268 result[@enumToInt(Feature.a8)] = .{
269 .llvm_name = "a8",
270 .description = "Cortex-A8 ARM processors",
271 .dependencies = featureSet(&[_]Feature{}),
272 };
273 result[@enumToInt(Feature.a9)] = .{
274 .llvm_name = "a9",
275 .description = "Cortex-A9 ARM processors",
276 .dependencies = featureSet(&[_]Feature{}),
277 };
278 result[@enumToInt(Feature.aclass)] = .{
279 .llvm_name = "aclass",
280 .description = "Is application profile ('A' series)",
281 .dependencies = featureSet(&[_]Feature{}),
282 };
283 result[@enumToInt(Feature.acquire_release)] = .{
284 .llvm_name = "acquire-release",
285 .description = "Has v8 acquire/release (lda/ldaex etc) instructions",
286 .dependencies = featureSet(&[_]Feature{}),
287 };
288 result[@enumToInt(Feature.aes)] = .{
289 .llvm_name = "aes",
290 .description = "Enable AES support",
291 .dependencies = featureSet(&[_]Feature{
292 .neon,
293 }),
294 };
295 result[@enumToInt(Feature.armv2)] = .{
296 .llvm_name = "armv2",
297 .description = "ARMv2 architecture",
298 .dependencies = featureSet(&[_]Feature{}),
299 };
300 result[@enumToInt(Feature.armv2a)] = .{
301 .llvm_name = "armv2a",
302 .description = "ARMv2a architecture",
303 .dependencies = featureSet(&[_]Feature{}),
304 };
305 result[@enumToInt(Feature.armv3)] = .{
306 .llvm_name = "armv3",
307 .description = "ARMv3 architecture",
308 .dependencies = featureSet(&[_]Feature{}),
309 };
310 result[@enumToInt(Feature.armv3m)] = .{
311 .llvm_name = "armv3m",
312 .description = "ARMv3m architecture",
313 .dependencies = featureSet(&[_]Feature{}),
314 };
315 result[@enumToInt(Feature.armv4)] = .{
316 .llvm_name = "armv4",
317 .description = "ARMv4 architecture",
318 .dependencies = featureSet(&[_]Feature{}),
319 };
320 result[@enumToInt(Feature.armv4t)] = .{
321 .llvm_name = "armv4t",
322 .description = "ARMv4t architecture",
323 .dependencies = featureSet(&[_]Feature{
324 .v4t,
325 }),
326 };
327 result[@enumToInt(Feature.armv5t)] = .{
328 .llvm_name = "armv5t",
329 .description = "ARMv5t architecture",
330 .dependencies = featureSet(&[_]Feature{
331 .v5t,
332 }),
333 };
334 result[@enumToInt(Feature.armv5te)] = .{
335 .llvm_name = "armv5te",
336 .description = "ARMv5te architecture",
337 .dependencies = featureSet(&[_]Feature{
338 .v5te,
339 }),
340 };
341 result[@enumToInt(Feature.armv5tej)] = .{
342 .llvm_name = "armv5tej",
343 .description = "ARMv5tej architecture",
344 .dependencies = featureSet(&[_]Feature{
345 .v5te,
346 }),
347 };
348 result[@enumToInt(Feature.armv6)] = .{
349 .llvm_name = "armv6",
350 .description = "ARMv6 architecture",
351 .dependencies = featureSet(&[_]Feature{
352 .dsp,
353 .v6,
354 }),
355 };
356 result[@enumToInt(Feature.armv6_m)] = .{
357 .llvm_name = "armv6-m",
358 .description = "ARMv6m architecture",
359 .dependencies = featureSet(&[_]Feature{
360 .db,
361 .mclass,
362 .noarm,
363 .strict_align,
364 .thumb_mode,
365 .v6m,
366 }),
367 };
368 result[@enumToInt(Feature.armv6j)] = .{
369 .llvm_name = "armv6j",
370 .description = "ARMv7a architecture",
371 .dependencies = featureSet(&[_]Feature{
372 .armv6,
373 }),
374 };
375 result[@enumToInt(Feature.armv6k)] = .{
376 .llvm_name = "armv6k",
377 .description = "ARMv6k architecture",
378 .dependencies = featureSet(&[_]Feature{
379 .v6k,
380 }),
381 };
382 result[@enumToInt(Feature.armv6kz)] = .{
383 .llvm_name = "armv6kz",
384 .description = "ARMv6kz architecture",
385 .dependencies = featureSet(&[_]Feature{
386 .trustzone,
387 .v6k,
388 }),
389 };
390 result[@enumToInt(Feature.armv6s_m)] = .{
391 .llvm_name = "armv6s-m",
392 .description = "ARMv6sm architecture",
393 .dependencies = featureSet(&[_]Feature{
394 .db,
395 .mclass,
396 .noarm,
397 .strict_align,
398 .thumb_mode,
399 .v6m,
400 }),
401 };
402 result[@enumToInt(Feature.armv6t2)] = .{
403 .llvm_name = "armv6t2",
404 .description = "ARMv6t2 architecture",
405 .dependencies = featureSet(&[_]Feature{
406 .dsp,
407 .v6t2,
408 }),
409 };
410 result[@enumToInt(Feature.armv7_a)] = .{
411 .llvm_name = "armv7-a",
412 .description = "ARMv7a architecture",
413 .dependencies = featureSet(&[_]Feature{
414 .aclass,
415 .db,
416 .dsp,
417 .neon,
418 .v7,
419 }),
420 };
421 result[@enumToInt(Feature.armv7_m)] = .{
422 .llvm_name = "armv7-m",
423 .description = "ARMv7m architecture",
424 .dependencies = featureSet(&[_]Feature{
425 .db,
426 .hwdiv,
427 .mclass,
428 .noarm,
429 .thumb_mode,
430 .thumb2,
431 .v7,
432 }),
433 };
434 result[@enumToInt(Feature.armv7_r)] = .{
435 .llvm_name = "armv7-r",
436 .description = "ARMv7r architecture",
437 .dependencies = featureSet(&[_]Feature{
438 .db,
439 .dsp,
440 .hwdiv,
441 .rclass,
442 .v7,
443 }),
444 };
445 result[@enumToInt(Feature.armv7e_m)] = .{
446 .llvm_name = "armv7e-m",
447 .description = "ARMv7em architecture",
448 .dependencies = featureSet(&[_]Feature{
449 .db,
450 .dsp,
451 .hwdiv,
452 .mclass,
453 .noarm,
454 .thumb_mode,
455 .thumb2,
456 .v7,
457 }),
458 };
459 result[@enumToInt(Feature.armv7k)] = .{
460 .llvm_name = "armv7k",
461 .description = "ARMv7a architecture",
462 .dependencies = featureSet(&[_]Feature{
463 .armv7_a,
464 }),
465 };
466 result[@enumToInt(Feature.armv7s)] = .{
467 .llvm_name = "armv7s",
468 .description = "ARMv7a architecture",
469 .dependencies = featureSet(&[_]Feature{
470 .armv7_a,
471 }),
472 };
473 result[@enumToInt(Feature.armv7ve)] = .{
474 .llvm_name = "armv7ve",
475 .description = "ARMv7ve architecture",
476 .dependencies = featureSet(&[_]Feature{
477 .aclass,
478 .db,
479 .dsp,
480 .mp,
481 .neon,
482 .trustzone,
483 .v7,
484 .virtualization,
485 }),
486 };
487 result[@enumToInt(Feature.armv8_a)] = .{
488 .llvm_name = "armv8-a",
489 .description = "ARMv8a architecture",
490 .dependencies = featureSet(&[_]Feature{
491 .aclass,
492 .crc,
493 .crypto,
494 .db,
495 .dsp,
496 .fp_armv8,
497 .mp,
498 .neon,
499 .trustzone,
500 .v8,
501 .virtualization,
502 }),
503 };
504 result[@enumToInt(Feature.armv8_m_base)] = .{
505 .llvm_name = "armv8-m.base",
506 .description = "ARMv8mBaseline architecture",
507 .dependencies = featureSet(&[_]Feature{
508 .@"8msecext",
509 .acquire_release,
510 .db,
511 .hwdiv,
512 .mclass,
513 .noarm,
514 .strict_align,
515 .thumb_mode,
516 .v7clrex,
517 .v8m,
518 }),
519 };
520 result[@enumToInt(Feature.armv8_m_main)] = .{
521 .llvm_name = "armv8-m.main",
522 .description = "ARMv8mMainline architecture",
523 .dependencies = featureSet(&[_]Feature{
524 .@"8msecext",
525 .acquire_release,
526 .db,
527 .hwdiv,
528 .mclass,
529 .noarm,
530 .thumb_mode,
531 .v8m_main,
532 }),
533 };
534 result[@enumToInt(Feature.armv8_r)] = .{
535 .llvm_name = "armv8-r",
536 .description = "ARMv8r architecture",
537 .dependencies = featureSet(&[_]Feature{
538 .crc,
539 .db,
540 .dfb,
541 .dsp,
542 .fp_armv8,
543 .mp,
544 .neon,
545 .rclass,
546 .v8,
547 .virtualization,
548 }),
549 };
550 result[@enumToInt(Feature.armv8_1_a)] = .{
551 .llvm_name = "armv8.1-a",
552 .description = "ARMv81a architecture",
553 .dependencies = featureSet(&[_]Feature{
554 .aclass,
555 .crc,
556 .crypto,
557 .db,
558 .dsp,
559 .fp_armv8,
560 .mp,
561 .neon,
562 .trustzone,
563 .v8_1a,
564 .virtualization,
565 }),
566 };
567 result[@enumToInt(Feature.armv8_1_m_main)] = .{
568 .llvm_name = "armv8.1-m.main",
569 .description = "ARMv81mMainline architecture",
570 .dependencies = featureSet(&[_]Feature{
571 .@"8msecext",
572 .acquire_release,
573 .db,
574 .hwdiv,
575 .lob,
576 .mclass,
577 .noarm,
578 .ras,
579 .thumb_mode,
580 .v8_1m_main,
581 }),
582 };
583 result[@enumToInt(Feature.armv8_2_a)] = .{
584 .llvm_name = "armv8.2-a",
585 .description = "ARMv82a architecture",
586 .dependencies = featureSet(&[_]Feature{
587 .aclass,
588 .crc,
589 .crypto,
590 .db,
591 .dsp,
592 .fp_armv8,
593 .mp,
594 .neon,
595 .ras,
596 .trustzone,
597 .v8_2a,
598 .virtualization,
599 }),
600 };
601 result[@enumToInt(Feature.armv8_3_a)] = .{
602 .llvm_name = "armv8.3-a",
603 .description = "ARMv83a architecture",
604 .dependencies = featureSet(&[_]Feature{
605 .aclass,
606 .crc,
607 .crypto,
608 .db,
609 .dsp,
610 .fp_armv8,
611 .mp,
612 .neon,
613 .ras,
614 .trustzone,
615 .v8_3a,
616 .virtualization,
617 }),
618 };
619 result[@enumToInt(Feature.armv8_4_a)] = .{
620 .llvm_name = "armv8.4-a",
621 .description = "ARMv84a architecture",
622 .dependencies = featureSet(&[_]Feature{
623 .aclass,
624 .crc,
625 .crypto,
626 .db,
627 .dotprod,
628 .dsp,
629 .fp_armv8,
630 .mp,
631 .neon,
632 .ras,
633 .trustzone,
634 .v8_4a,
635 .virtualization,
636 }),
637 };
638 result[@enumToInt(Feature.armv8_5_a)] = .{
639 .llvm_name = "armv8.5-a",
640 .description = "ARMv85a architecture",
641 .dependencies = featureSet(&[_]Feature{
642 .aclass,
643 .crc,
644 .crypto,
645 .db,
646 .dotprod,
647 .dsp,
648 .fp_armv8,
649 .mp,
650 .neon,
651 .ras,
652 .trustzone,
653 .v8_5a,
654 .virtualization,
655 }),
656 };
657 result[@enumToInt(Feature.avoid_movs_shop)] = .{
658 .llvm_name = "avoid-movs-shop",
659 .description = "Avoid movs instructions with shifter operand",
660 .dependencies = featureSet(&[_]Feature{}),
661 };
662 result[@enumToInt(Feature.avoid_partial_cpsr)] = .{
663 .llvm_name = "avoid-partial-cpsr",
664 .description = "Avoid CPSR partial update for OOO execution",
665 .dependencies = featureSet(&[_]Feature{}),
666 };
667 result[@enumToInt(Feature.cheap_predicable_cpsr)] = .{
668 .llvm_name = "cheap-predicable-cpsr",
669 .description = "Disable +1 predication cost for instructions updating CPSR",
670 .dependencies = featureSet(&[_]Feature{}),
671 };
672 result[@enumToInt(Feature.crc)] = .{
673 .llvm_name = "crc",
674 .description = "Enable support for CRC instructions",
675 .dependencies = featureSet(&[_]Feature{}),
676 };
677 result[@enumToInt(Feature.crypto)] = .{
678 .llvm_name = "crypto",
679 .description = "Enable support for Cryptography extensions",
680 .dependencies = featureSet(&[_]Feature{
681 .aes,
682 .neon,
683 .sha2,
684 }),
685 };
686 result[@enumToInt(Feature.d32)] = .{
687 .llvm_name = "d32",
688 .description = "Extend FP to 32 double registers",
689 .dependencies = featureSet(&[_]Feature{}),
690 };
691 result[@enumToInt(Feature.db)] = .{
692 .llvm_name = "db",
693 .description = "Has data barrier (dmb/dsb) instructions",
694 .dependencies = featureSet(&[_]Feature{}),
695 };
696 result[@enumToInt(Feature.dfb)] = .{
697 .llvm_name = "dfb",
698 .description = "Has full data barrier (dfb) instruction",
699 .dependencies = featureSet(&[_]Feature{}),
700 };
701 result[@enumToInt(Feature.disable_postra_scheduler)] = .{
702 .llvm_name = "disable-postra-scheduler",
703 .description = "Don't schedule again after register allocation",
704 .dependencies = featureSet(&[_]Feature{}),
705 };
706 result[@enumToInt(Feature.dont_widen_vmovs)] = .{
707 .llvm_name = "dont-widen-vmovs",
708 .description = "Don't widen VMOVS to VMOVD",
709 .dependencies = featureSet(&[_]Feature{}),
710 };
711 result[@enumToInt(Feature.dotprod)] = .{
712 .llvm_name = "dotprod",
713 .description = "Enable support for dot product instructions",
714 .dependencies = featureSet(&[_]Feature{
715 .neon,
716 }),
717 };
718 result[@enumToInt(Feature.dsp)] = .{
719 .llvm_name = "dsp",
720 .description = "Supports DSP instructions in ARM and/or Thumb2",
721 .dependencies = featureSet(&[_]Feature{}),
722 };
723 result[@enumToInt(Feature.execute_only)] = .{
724 .llvm_name = "execute-only",
725 .description = "Enable the generation of execute only code.",
726 .dependencies = featureSet(&[_]Feature{}),
727 };
728 result[@enumToInt(Feature.expand_fp_mlx)] = .{
729 .llvm_name = "expand-fp-mlx",
730 .description = "Expand VFP/NEON MLA/MLS instructions",
731 .dependencies = featureSet(&[_]Feature{}),
732 };
733 result[@enumToInt(Feature.exynos)] = .{
734 .llvm_name = "exynos",
735 .description = "Samsung Exynos processors",
736 .dependencies = featureSet(&[_]Feature{
737 .crc,
738 .crypto,
739 .expand_fp_mlx,
740 .fuse_aes,
741 .fuse_literals,
742 .hwdiv,
743 .hwdiv_arm,
744 .prof_unpr,
745 .ret_addr_stack,
746 .slow_fp_brcc,
747 .slow_vdup32,
748 .slow_vgetlni32,
749 .slowfpvmlx,
750 .splat_vfp_neon,
751 .use_aa,
752 .wide_stride_vfp,
753 .zcz,
754 }),
755 };
756 result[@enumToInt(Feature.fp_armv8)] = .{
757 .llvm_name = "fp-armv8",
758 .description = "Enable ARMv8 FP",
759 .dependencies = featureSet(&[_]Feature{
760 .fp_armv8d16,
761 .fp_armv8sp,
762 .vfp4,
763 }),
764 };
765 result[@enumToInt(Feature.fp_armv8d16)] = .{
766 .llvm_name = "fp-armv8d16",
767 .description = "Enable ARMv8 FP with only 16 d-registers",
768 .dependencies = featureSet(&[_]Feature{
769 .fp_armv8d16sp,
770 .fp64,
771 .vfp4d16,
772 }),
773 };
774 result[@enumToInt(Feature.fp_armv8d16sp)] = .{
775 .llvm_name = "fp-armv8d16sp",
776 .description = "Enable ARMv8 FP with only 16 d-registers and no double precision",
777 .dependencies = featureSet(&[_]Feature{
778 .vfp4d16sp,
779 }),
780 };
781 result[@enumToInt(Feature.fp_armv8sp)] = .{
782 .llvm_name = "fp-armv8sp",
783 .description = "Enable ARMv8 FP with no double precision",
784 .dependencies = featureSet(&[_]Feature{
785 .d32,
786 .fp_armv8d16sp,
787 .vfp4sp,
788 }),
789 };
790 result[@enumToInt(Feature.fp16)] = .{
791 .llvm_name = "fp16",
792 .description = "Enable half-precision floating point",
793 .dependencies = featureSet(&[_]Feature{}),
794 };
795 result[@enumToInt(Feature.fp16fml)] = .{
796 .llvm_name = "fp16fml",
797 .description = "Enable full half-precision floating point fml instructions",
798 .dependencies = featureSet(&[_]Feature{
799 .fullfp16,
800 }),
801 };
802 result[@enumToInt(Feature.fp64)] = .{
803 .llvm_name = "fp64",
804 .description = "Floating point unit supports double precision",
805 .dependencies = featureSet(&[_]Feature{
806 .fpregs64,
807 }),
808 };
809 result[@enumToInt(Feature.fpao)] = .{
810 .llvm_name = "fpao",
811 .description = "Enable fast computation of positive address offsets",
812 .dependencies = featureSet(&[_]Feature{}),
813 };
814 result[@enumToInt(Feature.fpregs)] = .{
815 .llvm_name = "fpregs",
816 .description = "Enable FP registers",
817 .dependencies = featureSet(&[_]Feature{}),
818 };
819 result[@enumToInt(Feature.fpregs16)] = .{
820 .llvm_name = "fpregs16",
821 .description = "Enable 16-bit FP registers",
822 .dependencies = featureSet(&[_]Feature{
823 .fpregs,
824 }),
825 };
826 result[@enumToInt(Feature.fpregs64)] = .{
827 .llvm_name = "fpregs64",
828 .description = "Enable 64-bit FP registers",
829 .dependencies = featureSet(&[_]Feature{
830 .fpregs,
831 }),
832 };
833 result[@enumToInt(Feature.fullfp16)] = .{
834 .llvm_name = "fullfp16",
835 .description = "Enable full half-precision floating point",
836 .dependencies = featureSet(&[_]Feature{
837 .fp_armv8d16sp,
838 .fpregs16,
839 }),
840 };
841 result[@enumToInt(Feature.fuse_aes)] = .{
842 .llvm_name = "fuse-aes",
843 .description = "CPU fuses AES crypto operations",
844 .dependencies = featureSet(&[_]Feature{}),
845 };
846 result[@enumToInt(Feature.fuse_literals)] = .{
847 .llvm_name = "fuse-literals",
848 .description = "CPU fuses literal generation operations",
849 .dependencies = featureSet(&[_]Feature{}),
850 };
851 result[@enumToInt(Feature.hwdiv)] = .{
852 .llvm_name = "hwdiv",
853 .description = "Enable divide instructions in Thumb",
854 .dependencies = featureSet(&[_]Feature{}),
855 };
856 result[@enumToInt(Feature.hwdiv_arm)] = .{
857 .llvm_name = "hwdiv-arm",
858 .description = "Enable divide instructions in ARM mode",
859 .dependencies = featureSet(&[_]Feature{}),
860 };
861 result[@enumToInt(Feature.iwmmxt)] = .{
862 .llvm_name = "iwmmxt",
863 .description = "ARMv5te architecture",
864 .dependencies = featureSet(&[_]Feature{
865 .armv5te,
866 }),
867 };
868 result[@enumToInt(Feature.iwmmxt2)] = .{
869 .llvm_name = "iwmmxt2",
870 .description = "ARMv5te architecture",
871 .dependencies = featureSet(&[_]Feature{
872 .armv5te,
873 }),
874 };
875 result[@enumToInt(Feature.krait)] = .{
876 .llvm_name = "krait",
877 .description = "Qualcomm Krait processors",
878 .dependencies = featureSet(&[_]Feature{}),
879 };
880 result[@enumToInt(Feature.kryo)] = .{
881 .llvm_name = "kryo",
882 .description = "Qualcomm Kryo processors",
883 .dependencies = featureSet(&[_]Feature{}),
884 };
885 result[@enumToInt(Feature.lob)] = .{
886 .llvm_name = "lob",
887 .description = "Enable Low Overhead Branch extensions",
888 .dependencies = featureSet(&[_]Feature{}),
889 };
890 result[@enumToInt(Feature.long_calls)] = .{
891 .llvm_name = "long-calls",
892 .description = "Generate calls via indirect call instructions",
893 .dependencies = featureSet(&[_]Feature{}),
894 };
895 result[@enumToInt(Feature.loop_align)] = .{
896 .llvm_name = "loop-align",
897 .description = "Prefer 32-bit alignment for loops",
898 .dependencies = featureSet(&[_]Feature{}),
899 };
900 result[@enumToInt(Feature.m3)] = .{
901 .llvm_name = "m3",
902 .description = "Cortex-M3 ARM processors",
903 .dependencies = featureSet(&[_]Feature{}),
904 };
905 result[@enumToInt(Feature.mclass)] = .{
906 .llvm_name = "mclass",
907 .description = "Is microcontroller profile ('M' series)",
908 .dependencies = featureSet(&[_]Feature{}),
909 };
910 result[@enumToInt(Feature.mp)] = .{
911 .llvm_name = "mp",
912 .description = "Supports Multiprocessing extension",
913 .dependencies = featureSet(&[_]Feature{}),
914 };
915 result[@enumToInt(Feature.muxed_units)] = .{
916 .llvm_name = "muxed-units",
917 .description = "Has muxed AGU and NEON/FPU",
918 .dependencies = featureSet(&[_]Feature{}),
919 };
920 result[@enumToInt(Feature.mve)] = .{
921 .llvm_name = "mve",
922 .description = "Support M-Class Vector Extension with integer ops",
923 .dependencies = featureSet(&[_]Feature{
924 .dsp,
925 .fpregs16,
926 .fpregs64,
927 .v8_1m_main,
928 }),
929 };
930 result[@enumToInt(Feature.mve_fp)] = .{
931 .llvm_name = "mve.fp",
932 .description = "Support M-Class Vector Extension with integer and floating ops",
933 .dependencies = featureSet(&[_]Feature{
934 .fp_armv8d16sp,
935 .fullfp16,
936 .mve,
937 }),
938 };
939 result[@enumToInt(Feature.nacl_trap)] = .{
940 .llvm_name = "nacl-trap",
941 .description = "NaCl trap",
942 .dependencies = featureSet(&[_]Feature{}),
943 };
944 result[@enumToInt(Feature.neon)] = .{
945 .llvm_name = "neon",
946 .description = "Enable NEON instructions",
947 .dependencies = featureSet(&[_]Feature{
948 .vfp3,
949 }),
950 };
951 result[@enumToInt(Feature.neon_fpmovs)] = .{
952 .llvm_name = "neon-fpmovs",
953 .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON",
954 .dependencies = featureSet(&[_]Feature{}),
955 };
956 result[@enumToInt(Feature.neonfp)] = .{
957 .llvm_name = "neonfp",
958 .description = "Use NEON for single precision FP",
959 .dependencies = featureSet(&[_]Feature{}),
960 };
961 result[@enumToInt(Feature.no_branch_predictor)] = .{
962 .llvm_name = "no-branch-predictor",
963 .description = "Has no branch predictor",
964 .dependencies = featureSet(&[_]Feature{}),
965 };
966 result[@enumToInt(Feature.no_movt)] = .{
967 .llvm_name = "no-movt",
968 .description = "Don't use movt/movw pairs for 32-bit imms",
969 .dependencies = featureSet(&[_]Feature{}),
970 };
971 result[@enumToInt(Feature.no_neg_immediates)] = .{
972 .llvm_name = "no-neg-immediates",
973 .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
974 .dependencies = featureSet(&[_]Feature{}),
975 };
976 result[@enumToInt(Feature.noarm)] = .{
977 .llvm_name = "noarm",
978 .description = "Does not support ARM mode execution",
979 .dependencies = featureSet(&[_]Feature{}),
980 };
981 result[@enumToInt(Feature.nonpipelined_vfp)] = .{
982 .llvm_name = "nonpipelined-vfp",
983 .description = "VFP instructions are not pipelined",
984 .dependencies = featureSet(&[_]Feature{}),
985 };
986 result[@enumToInt(Feature.perfmon)] = .{
987 .llvm_name = "perfmon",
988 .description = "Enable support for Performance Monitor extensions",
989 .dependencies = featureSet(&[_]Feature{}),
990 };
991 result[@enumToInt(Feature.prefer_ishst)] = .{
992 .llvm_name = "prefer-ishst",
993 .description = "Prefer ISHST barriers",
994 .dependencies = featureSet(&[_]Feature{}),
995 };
996 result[@enumToInt(Feature.prefer_vmovsr)] = .{
997 .llvm_name = "prefer-vmovsr",
998 .description = "Prefer VMOVSR",
999 .dependencies = featureSet(&[_]Feature{}),
1000 };
1001 result[@enumToInt(Feature.prof_unpr)] = .{
1002 .llvm_name = "prof-unpr",
1003 .description = "Is profitable to unpredicate",
1004 .dependencies = featureSet(&[_]Feature{}),
1005 };
1006 result[@enumToInt(Feature.r4)] = .{
1007 .llvm_name = "r4",
1008 .description = "Cortex-R4 ARM processors",
1009 .dependencies = featureSet(&[_]Feature{}),
1010 };
1011 result[@enumToInt(Feature.r5)] = .{
1012 .llvm_name = "r5",
1013 .description = "Cortex-R5 ARM processors",
1014 .dependencies = featureSet(&[_]Feature{}),
1015 };
1016 result[@enumToInt(Feature.r52)] = .{
1017 .llvm_name = "r52",
1018 .description = "Cortex-R52 ARM processors",
1019 .dependencies = featureSet(&[_]Feature{}),
1020 };
1021 result[@enumToInt(Feature.r7)] = .{
1022 .llvm_name = "r7",
1023 .description = "Cortex-R7 ARM processors",
1024 .dependencies = featureSet(&[_]Feature{}),
1025 };
1026 result[@enumToInt(Feature.ras)] = .{
1027 .llvm_name = "ras",
1028 .description = "Enable Reliability, Availability and Serviceability extensions",
1029 .dependencies = featureSet(&[_]Feature{}),
1030 };
1031 result[@enumToInt(Feature.rclass)] = .{
1032 .llvm_name = "rclass",
1033 .description = "Is realtime profile ('R' series)",
1034 .dependencies = featureSet(&[_]Feature{}),
1035 };
1036 result[@enumToInt(Feature.read_tp_hard)] = .{
1037 .llvm_name = "read-tp-hard",
1038 .description = "Reading thread pointer from register",
1039 .dependencies = featureSet(&[_]Feature{}),
1040 };
1041 result[@enumToInt(Feature.reserve_r9)] = .{
1042 .llvm_name = "reserve-r9",
1043 .description = "Reserve R9, making it unavailable as GPR",
1044 .dependencies = featureSet(&[_]Feature{}),
1045 };
1046 result[@enumToInt(Feature.ret_addr_stack)] = .{
1047 .llvm_name = "ret-addr-stack",
1048 .description = "Has return address stack",
1049 .dependencies = featureSet(&[_]Feature{}),
1050 };
1051 result[@enumToInt(Feature.sb)] = .{
1052 .llvm_name = "sb",
1053 .description = "Enable v8.5a Speculation Barrier",
1054 .dependencies = featureSet(&[_]Feature{}),
1055 };
1056 result[@enumToInt(Feature.sha2)] = .{
1057 .llvm_name = "sha2",
1058 .description = "Enable SHA1 and SHA256 support",
1059 .dependencies = featureSet(&[_]Feature{
1060 .neon,
1061 }),
1062 };
1063 result[@enumToInt(Feature.slow_fp_brcc)] = .{
1064 .llvm_name = "slow-fp-brcc",
1065 .description = "FP compare + branch is slow",
1066 .dependencies = featureSet(&[_]Feature{}),
1067 };
1068 result[@enumToInt(Feature.slow_load_D_subreg)] = .{
1069 .llvm_name = "slow-load-D-subreg",
1070 .description = "Loading into D subregs is slow",
1071 .dependencies = featureSet(&[_]Feature{}),
1072 };
1073 result[@enumToInt(Feature.slow_odd_reg)] = .{
1074 .llvm_name = "slow-odd-reg",
1075 .description = "VLDM/VSTM starting with an odd register is slow",
1076 .dependencies = featureSet(&[_]Feature{}),
1077 };
1078 result[@enumToInt(Feature.slow_vdup32)] = .{
1079 .llvm_name = "slow-vdup32",
1080 .description = "Has slow VDUP32 - prefer VMOV",
1081 .dependencies = featureSet(&[_]Feature{}),
1082 };
1083 result[@enumToInt(Feature.slow_vgetlni32)] = .{
1084 .llvm_name = "slow-vgetlni32",
1085 .description = "Has slow VGETLNi32 - prefer VMOV",
1086 .dependencies = featureSet(&[_]Feature{}),
1087 };
1088 result[@enumToInt(Feature.slowfpvmlx)] = .{
1089 .llvm_name = "slowfpvmlx",
1090 .description = "Disable VFP / NEON MAC instructions",
1091 .dependencies = featureSet(&[_]Feature{}),
1092 };
1093 result[@enumToInt(Feature.soft_float)] = .{
1094 .llvm_name = "soft-float",
1095 .description = "Use software floating point features.",
1096 .dependencies = featureSet(&[_]Feature{}),
1097 };
1098 result[@enumToInt(Feature.splat_vfp_neon)] = .{
1099 .llvm_name = "splat-vfp-neon",
1100 .description = "Splat register from VFP to NEON",
1101 .dependencies = featureSet(&[_]Feature{
1102 .dont_widen_vmovs,
1103 }),
1104 };
1105 result[@enumToInt(Feature.strict_align)] = .{
1106 .llvm_name = "strict-align",
1107 .description = "Disallow all unaligned memory access",
1108 .dependencies = featureSet(&[_]Feature{}),
1109 };
1110 result[@enumToInt(Feature.swift)] = .{
1111 .llvm_name = "swift",
1112 .description = "Swift ARM processors",
1113 .dependencies = featureSet(&[_]Feature{}),
1114 };
1115 result[@enumToInt(Feature.thumb_mode)] = .{
1116 .llvm_name = "thumb-mode",
1117 .description = "Thumb mode",
1118 .dependencies = featureSet(&[_]Feature{}),
1119 };
1120 result[@enumToInt(Feature.thumb2)] = .{
1121 .llvm_name = "thumb2",
1122 .description = "Enable Thumb2 instructions",
1123 .dependencies = featureSet(&[_]Feature{}),
1124 };
1125 result[@enumToInt(Feature.trustzone)] = .{
1126 .llvm_name = "trustzone",
1127 .description = "Enable support for TrustZone security extensions",
1128 .dependencies = featureSet(&[_]Feature{}),
1129 };
1130 result[@enumToInt(Feature.use_aa)] = .{
1131 .llvm_name = "use-aa",
1132 .description = "Use alias analysis during codegen",
1133 .dependencies = featureSet(&[_]Feature{}),
1134 };
1135 result[@enumToInt(Feature.use_misched)] = .{
1136 .llvm_name = "use-misched",
1137 .description = "Use the MachineScheduler",
1138 .dependencies = featureSet(&[_]Feature{}),
1139 };
1140 result[@enumToInt(Feature.v4t)] = .{
1141 .llvm_name = "v4t",
1142 .description = "Support ARM v4T instructions",
1143 .dependencies = featureSet(&[_]Feature{}),
1144 };
1145 result[@enumToInt(Feature.v5t)] = .{
1146 .llvm_name = "v5t",
1147 .description = "Support ARM v5T instructions",
1148 .dependencies = featureSet(&[_]Feature{
1149 .v4t,
1150 }),
1151 };
1152 result[@enumToInt(Feature.v5te)] = .{
1153 .llvm_name = "v5te",
1154 .description = "Support ARM v5TE, v5TEj, and v5TExp instructions",
1155 .dependencies = featureSet(&[_]Feature{
1156 .v5t,
1157 }),
1158 };
1159 result[@enumToInt(Feature.v6)] = .{
1160 .llvm_name = "v6",
1161 .description = "Support ARM v6 instructions",
1162 .dependencies = featureSet(&[_]Feature{
1163 .v5te,
1164 }),
1165 };
1166 result[@enumToInt(Feature.v6k)] = .{
1167 .llvm_name = "v6k",
1168 .description = "Support ARM v6k instructions",
1169 .dependencies = featureSet(&[_]Feature{
1170 .v6,
1171 }),
1172 };
1173 result[@enumToInt(Feature.v6m)] = .{
1174 .llvm_name = "v6m",
1175 .description = "Support ARM v6M instructions",
1176 .dependencies = featureSet(&[_]Feature{
1177 .v6,
1178 }),
1179 };
1180 result[@enumToInt(Feature.v6t2)] = .{
1181 .llvm_name = "v6t2",
1182 .description = "Support ARM v6t2 instructions",
1183 .dependencies = featureSet(&[_]Feature{
1184 .thumb2,
1185 .v6k,
1186 .v8m,
1187 }),
1188 };
1189 result[@enumToInt(Feature.v7)] = .{
1190 .llvm_name = "v7",
1191 .description = "Support ARM v7 instructions",
1192 .dependencies = featureSet(&[_]Feature{
1193 .perfmon,
1194 .v6t2,
1195 .v7clrex,
1196 }),
1197 };
1198 result[@enumToInt(Feature.v7clrex)] = .{
1199 .llvm_name = "v7clrex",
1200 .description = "Has v7 clrex instruction",
1201 .dependencies = featureSet(&[_]Feature{}),
1202 };
1203 result[@enumToInt(Feature.v8)] = .{
1204 .llvm_name = "v8",
1205 .description = "Support ARM v8 instructions",
1206 .dependencies = featureSet(&[_]Feature{
1207 .acquire_release,
1208 .v7,
1209 }),
1210 };
1211 result[@enumToInt(Feature.v8_1a)] = .{
1212 .llvm_name = "v8.1a",
1213 .description = "Support ARM v8.1a instructions",
1214 .dependencies = featureSet(&[_]Feature{
1215 .v8,
1216 }),
1217 };
1218 result[@enumToInt(Feature.v8_1m_main)] = .{
1219 .llvm_name = "v8.1m.main",
1220 .description = "Support ARM v8-1M Mainline instructions",
1221 .dependencies = featureSet(&[_]Feature{
1222 .v8m_main,
1223 }),
1224 };
1225 result[@enumToInt(Feature.v8_2a)] = .{
1226 .llvm_name = "v8.2a",
1227 .description = "Support ARM v8.2a instructions",
1228 .dependencies = featureSet(&[_]Feature{
1229 .v8_1a,
1230 }),
1231 };
1232 result[@enumToInt(Feature.v8_3a)] = .{
1233 .llvm_name = "v8.3a",
1234 .description = "Support ARM v8.3a instructions",
1235 .dependencies = featureSet(&[_]Feature{
1236 .v8_2a,
1237 }),
1238 };
1239 result[@enumToInt(Feature.v8_4a)] = .{
1240 .llvm_name = "v8.4a",
1241 .description = "Support ARM v8.4a instructions",
1242 .dependencies = featureSet(&[_]Feature{
1243 .dotprod,
1244 .v8_3a,
1245 }),
1246 };
1247 result[@enumToInt(Feature.v8_5a)] = .{
1248 .llvm_name = "v8.5a",
1249 .description = "Support ARM v8.5a instructions",
1250 .dependencies = featureSet(&[_]Feature{
1251 .sb,
1252 .v8_4a,
1253 }),
1254 };
1255 result[@enumToInt(Feature.v8m)] = .{
1256 .llvm_name = "v8m",
1257 .description = "Support ARM v8M Baseline instructions",
1258 .dependencies = featureSet(&[_]Feature{
1259 .v6m,
1260 }),
1261 };
1262 result[@enumToInt(Feature.v8m_main)] = .{
1263 .llvm_name = "v8m.main",
1264 .description = "Support ARM v8M Mainline instructions",
1265 .dependencies = featureSet(&[_]Feature{
1266 .v7,
1267 }),
1268 };
1269 result[@enumToInt(Feature.vfp2)] = .{
1270 .llvm_name = "vfp2",
1271 .description = "Enable VFP2 instructions",
1272 .dependencies = featureSet(&[_]Feature{
1273 .vfp2d16,
1274 .vfp2sp,
1275 }),
1276 };
1277 result[@enumToInt(Feature.vfp2d16)] = .{
1278 .llvm_name = "vfp2d16",
1279 .description = "Enable VFP2 instructions",
1280 .dependencies = featureSet(&[_]Feature{
1281 .fp64,
1282 .vfp2d16sp,
1283 }),
1284 };
1285 result[@enumToInt(Feature.vfp2d16sp)] = .{
1286 .llvm_name = "vfp2d16sp",
1287 .description = "Enable VFP2 instructions with no double precision",
1288 .dependencies = featureSet(&[_]Feature{
1289 .fpregs,
1290 }),
1291 };
1292 result[@enumToInt(Feature.vfp2sp)] = .{
1293 .llvm_name = "vfp2sp",
1294 .description = "Enable VFP2 instructions with no double precision",
1295 .dependencies = featureSet(&[_]Feature{
1296 .vfp2d16sp,
1297 }),
1298 };
1299 result[@enumToInt(Feature.vfp3)] = .{
1300 .llvm_name = "vfp3",
1301 .description = "Enable VFP3 instructions",
1302 .dependencies = featureSet(&[_]Feature{
1303 .vfp3d16,
1304 .vfp3sp,
1305 }),
1306 };
1307 result[@enumToInt(Feature.vfp3d16)] = .{
1308 .llvm_name = "vfp3d16",
1309 .description = "Enable VFP3 instructions with only 16 d-registers",
1310 .dependencies = featureSet(&[_]Feature{
1311 .fp64,
1312 .vfp2,
1313 .vfp3d16sp,
1314 }),
1315 };
1316 result[@enumToInt(Feature.vfp3d16sp)] = .{
1317 .llvm_name = "vfp3d16sp",
1318 .description = "Enable VFP3 instructions with only 16 d-registers and no double precision",
1319 .dependencies = featureSet(&[_]Feature{
1320 .vfp2sp,
1321 }),
1322 };
1323 result[@enumToInt(Feature.vfp3sp)] = .{
1324 .llvm_name = "vfp3sp",
1325 .description = "Enable VFP3 instructions with no double precision",
1326 .dependencies = featureSet(&[_]Feature{
1327 .d32,
1328 .vfp3d16sp,
1329 }),
1330 };
1331 result[@enumToInt(Feature.vfp4)] = .{
1332 .llvm_name = "vfp4",
1333 .description = "Enable VFP4 instructions",
1334 .dependencies = featureSet(&[_]Feature{
1335 .fp16,
1336 .vfp3,
1337 .vfp4d16,
1338 .vfp4sp,
1339 }),
1340 };
1341 result[@enumToInt(Feature.vfp4d16)] = .{
1342 .llvm_name = "vfp4d16",
1343 .description = "Enable VFP4 instructions with only 16 d-registers",
1344 .dependencies = featureSet(&[_]Feature{
1345 .fp16,
1346 .fp64,
1347 .vfp3d16,
1348 .vfp4d16sp,
1349 }),
1350 };
1351 result[@enumToInt(Feature.vfp4d16sp)] = .{
1352 .llvm_name = "vfp4d16sp",
1353 .description = "Enable VFP4 instructions with only 16 d-registers and no double precision",
1354 .dependencies = featureSet(&[_]Feature{
1355 .fp16,
1356 .vfp3d16sp,
1357 }),
1358 };
1359 result[@enumToInt(Feature.vfp4sp)] = .{
1360 .llvm_name = "vfp4sp",
1361 .description = "Enable VFP4 instructions with no double precision",
1362 .dependencies = featureSet(&[_]Feature{
1363 .d32,
1364 .fp16,
1365 .vfp3sp,
1366 .vfp4d16sp,
1367 }),
1368 };
1369 result[@enumToInt(Feature.virtualization)] = .{
1370 .llvm_name = "virtualization",
1371 .description = "Supports Virtualization extension",
1372 .dependencies = featureSet(&[_]Feature{
1373 .hwdiv,
1374 .hwdiv_arm,
1375 }),
1376 };
1377 result[@enumToInt(Feature.vldn_align)] = .{
1378 .llvm_name = "vldn-align",
1379 .description = "Check for VLDn unaligned access",
1380 .dependencies = featureSet(&[_]Feature{}),
1381 };
1382 result[@enumToInt(Feature.vmlx_forwarding)] = .{
1383 .llvm_name = "vmlx-forwarding",
1384 .description = "Has multiplier accumulator forwarding",
1385 .dependencies = featureSet(&[_]Feature{}),
1386 };
1387 result[@enumToInt(Feature.vmlx_hazards)] = .{
1388 .llvm_name = "vmlx-hazards",
1389 .description = "Has VMLx hazards",
1390 .dependencies = featureSet(&[_]Feature{}),
1391 };
1392 result[@enumToInt(Feature.wide_stride_vfp)] = .{
1393 .llvm_name = "wide-stride-vfp",
1394 .description = "Use a wide stride when allocating VFP registers",
1395 .dependencies = featureSet(&[_]Feature{}),
1396 };
1397 result[@enumToInt(Feature.xscale)] = .{
1398 .llvm_name = "xscale",
1399 .description = "ARMv5te architecture",
1400 .dependencies = featureSet(&[_]Feature{
1401 .armv5te,
1402 }),
1403 };
1404 result[@enumToInt(Feature.zcz)] = .{
1405 .llvm_name = "zcz",
1406 .description = "Has zero-cycle zeroing instructions",
1407 .dependencies = featureSet(&[_]Feature{}),
1408 };
1409 const ti = @typeInfo(Feature);
1410 for (result) |*elem, i| {
1411 elem.index = i;
1412 elem.name = ti.Enum.fields[i].name;
1413 }
1414 break :blk result;
1415};
1416
1417pub const cpu = struct {
1418 pub const arm1020e = Cpu{
1419 .name = "arm1020e",
1420 .llvm_name = "arm1020e",
1421 .features = featureSet(&[_]Feature{
1422 .armv5te,
1423 }),
1424 };
1425 pub const arm1020t = Cpu{
1426 .name = "arm1020t",
1427 .llvm_name = "arm1020t",
1428 .features = featureSet(&[_]Feature{
1429 .armv5t,
1430 }),
1431 };
1432 pub const arm1022e = Cpu{
1433 .name = "arm1022e",
1434 .llvm_name = "arm1022e",
1435 .features = featureSet(&[_]Feature{
1436 .armv5te,
1437 }),
1438 };
1439 pub const arm10e = Cpu{
1440 .name = "arm10e",
1441 .llvm_name = "arm10e",
1442 .features = featureSet(&[_]Feature{
1443 .armv5te,
1444 }),
1445 };
1446 pub const arm10tdmi = Cpu{
1447 .name = "arm10tdmi",
1448 .llvm_name = "arm10tdmi",
1449 .features = featureSet(&[_]Feature{
1450 .armv5t,
1451 }),
1452 };
1453 pub const arm1136j_s = Cpu{
1454 .name = "arm1136j_s",
1455 .llvm_name = "arm1136j-s",
1456 .features = featureSet(&[_]Feature{
1457 .armv6,
1458 }),
1459 };
1460 pub const arm1136jf_s = Cpu{
1461 .name = "arm1136jf_s",
1462 .llvm_name = "arm1136jf-s",
1463 .features = featureSet(&[_]Feature{
1464 .armv6,
1465 .slowfpvmlx,
1466 .vfp2,
1467 }),
1468 };
1469 pub const arm1156t2_s = Cpu{
1470 .name = "arm1156t2_s",
1471 .llvm_name = "arm1156t2-s",
1472 .features = featureSet(&[_]Feature{
1473 .armv6t2,
1474 }),
1475 };
1476 pub const arm1156t2f_s = Cpu{
1477 .name = "arm1156t2f_s",
1478 .llvm_name = "arm1156t2f-s",
1479 .features = featureSet(&[_]Feature{
1480 .armv6t2,
1481 .slowfpvmlx,
1482 .vfp2,
1483 }),
1484 };
1485 pub const arm1176j_s = Cpu{
1486 .name = "arm1176j_s",
1487 .llvm_name = "arm1176j-s",
1488 .features = featureSet(&[_]Feature{
1489 .armv6kz,
1490 }),
1491 };
1492 pub const arm1176jz_s = Cpu{
1493 .name = "arm1176jz_s",
1494 .llvm_name = "arm1176jz-s",
1495 .features = featureSet(&[_]Feature{
1496 .armv6kz,
1497 }),
1498 };
1499 pub const arm1176jzf_s = Cpu{
1500 .name = "arm1176jzf_s",
1501 .llvm_name = "arm1176jzf-s",
1502 .features = featureSet(&[_]Feature{
1503 .armv6kz,
1504 .slowfpvmlx,
1505 .vfp2,
1506 }),
1507 };
1508 pub const arm710t = Cpu{
1509 .name = "arm710t",
1510 .llvm_name = "arm710t",
1511 .features = featureSet(&[_]Feature{
1512 .armv4t,
1513 }),
1514 };
1515 pub const arm720t = Cpu{
1516 .name = "arm720t",
1517 .llvm_name = "arm720t",
1518 .features = featureSet(&[_]Feature{
1519 .armv4t,
1520 }),
1521 };
1522 pub const arm7tdmi = Cpu{
1523 .name = "arm7tdmi",
1524 .llvm_name = "arm7tdmi",
1525 .features = featureSet(&[_]Feature{
1526 .armv4t,
1527 }),
1528 };
1529 pub const arm7tdmi_s = Cpu{
1530 .name = "arm7tdmi_s",
1531 .llvm_name = "arm7tdmi-s",
1532 .features = featureSet(&[_]Feature{
1533 .armv4t,
1534 }),
1535 };
1536 pub const arm8 = Cpu{
1537 .name = "arm8",
1538 .llvm_name = "arm8",
1539 .features = featureSet(&[_]Feature{
1540 .armv4,
1541 }),
1542 };
1543 pub const arm810 = Cpu{
1544 .name = "arm810",
1545 .llvm_name = "arm810",
1546 .features = featureSet(&[_]Feature{
1547 .armv4,
1548 }),
1549 };
1550 pub const arm9 = Cpu{
1551 .name = "arm9",
1552 .llvm_name = "arm9",
1553 .features = featureSet(&[_]Feature{
1554 .armv4t,
1555 }),
1556 };
1557 pub const arm920 = Cpu{
1558 .name = "arm920",
1559 .llvm_name = "arm920",
1560 .features = featureSet(&[_]Feature{
1561 .armv4t,
1562 }),
1563 };
1564 pub const arm920t = Cpu{
1565 .name = "arm920t",
1566 .llvm_name = "arm920t",
1567 .features = featureSet(&[_]Feature{
1568 .armv4t,
1569 }),
1570 };
1571 pub const arm922t = Cpu{
1572 .name = "arm922t",
1573 .llvm_name = "arm922t",
1574 .features = featureSet(&[_]Feature{
1575 .armv4t,
1576 }),
1577 };
1578 pub const arm926ej_s = Cpu{
1579 .name = "arm926ej_s",
1580 .llvm_name = "arm926ej-s",
1581 .features = featureSet(&[_]Feature{
1582 .armv5te,
1583 }),
1584 };
1585 pub const arm940t = Cpu{
1586 .name = "arm940t",
1587 .llvm_name = "arm940t",
1588 .features = featureSet(&[_]Feature{
1589 .armv4t,
1590 }),
1591 };
1592 pub const arm946e_s = Cpu{
1593 .name = "arm946e_s",
1594 .llvm_name = "arm946e-s",
1595 .features = featureSet(&[_]Feature{
1596 .armv5te,
1597 }),
1598 };
1599 pub const arm966e_s = Cpu{
1600 .name = "arm966e_s",
1601 .llvm_name = "arm966e-s",
1602 .features = featureSet(&[_]Feature{
1603 .armv5te,
1604 }),
1605 };
1606 pub const arm968e_s = Cpu{
1607 .name = "arm968e_s",
1608 .llvm_name = "arm968e-s",
1609 .features = featureSet(&[_]Feature{
1610 .armv5te,
1611 }),
1612 };
1613 pub const arm9e = Cpu{
1614 .name = "arm9e",
1615 .llvm_name = "arm9e",
1616 .features = featureSet(&[_]Feature{
1617 .armv5te,
1618 }),
1619 };
1620 pub const arm9tdmi = Cpu{
1621 .name = "arm9tdmi",
1622 .llvm_name = "arm9tdmi",
1623 .features = featureSet(&[_]Feature{
1624 .armv4t,
1625 }),
1626 };
1627 pub const cortex_a12 = Cpu{
1628 .name = "cortex_a12",
1629 .llvm_name = "cortex-a12",
1630 .features = featureSet(&[_]Feature{
1631 .a12,
1632 .armv7_a,
1633 .avoid_partial_cpsr,
1634 .mp,
1635 .ret_addr_stack,
1636 .trustzone,
1637 .vfp4,
1638 .virtualization,
1639 .vmlx_forwarding,
1640 }),
1641 };
1642 pub const cortex_a15 = Cpu{
1643 .name = "cortex_a15",
1644 .llvm_name = "cortex-a15",
1645 .features = featureSet(&[_]Feature{
1646 .a15,
1647 .armv7_a,
1648 .avoid_partial_cpsr,
1649 .dont_widen_vmovs,
1650 .mp,
1651 .muxed_units,
1652 .ret_addr_stack,
1653 .splat_vfp_neon,
1654 .trustzone,
1655 .vfp4,
1656 .virtualization,
1657 .vldn_align,
1658 }),
1659 };
1660 pub const cortex_a17 = Cpu{
1661 .name = "cortex_a17",
1662 .llvm_name = "cortex-a17",
1663 .features = featureSet(&[_]Feature{
1664 .a17,
1665 .armv7_a,
1666 .avoid_partial_cpsr,
1667 .mp,
1668 .ret_addr_stack,
1669 .trustzone,
1670 .vfp4,
1671 .virtualization,
1672 .vmlx_forwarding,
1673 }),
1674 };
1675 pub const cortex_a32 = Cpu{
1676 .name = "cortex_a32",
1677 .llvm_name = "cortex-a32",
1678 .features = featureSet(&[_]Feature{
1679 .armv8_a,
1680 .crc,
1681 .crypto,
1682 .hwdiv,
1683 .hwdiv_arm,
1684 }),
1685 };
1686 pub const cortex_a35 = Cpu{
1687 .name = "cortex_a35",
1688 .llvm_name = "cortex-a35",
1689 .features = featureSet(&[_]Feature{
1690 .a35,
1691 .armv8_a,
1692 .crc,
1693 .crypto,
1694 .hwdiv,
1695 .hwdiv_arm,
1696 }),
1697 };
1698 pub const cortex_a5 = Cpu{
1699 .name = "cortex_a5",
1700 .llvm_name = "cortex-a5",
1701 .features = featureSet(&[_]Feature{
1702 .a5,
1703 .armv7_a,
1704 .mp,
1705 .ret_addr_stack,
1706 .slow_fp_brcc,
1707 .slowfpvmlx,
1708 .trustzone,
1709 .vfp4,
1710 .vmlx_forwarding,
1711 }),
1712 };
1713 pub const cortex_a53 = Cpu{
1714 .name = "cortex_a53",
1715 .llvm_name = "cortex-a53",
1716 .features = featureSet(&[_]Feature{
1717 .a53,
1718 .armv8_a,
1719 .crc,
1720 .crypto,
1721 .fpao,
1722 .hwdiv,
1723 .hwdiv_arm,
1724 }),
1725 };
1726 pub const cortex_a55 = Cpu{
1727 .name = "cortex_a55",
1728 .llvm_name = "cortex-a55",
1729 .features = featureSet(&[_]Feature{
1730 .a55,
1731 .armv8_2_a,
1732 .dotprod,
1733 .hwdiv,
1734 .hwdiv_arm,
1735 }),
1736 };
1737 pub const cortex_a57 = Cpu{
1738 .name = "cortex_a57",
1739 .llvm_name = "cortex-a57",
1740 .features = featureSet(&[_]Feature{
1741 .a57,
1742 .armv8_a,
1743 .avoid_partial_cpsr,
1744 .cheap_predicable_cpsr,
1745 .crc,
1746 .crypto,
1747 .fpao,
1748 .hwdiv,
1749 .hwdiv_arm,
1750 }),
1751 };
1752 pub const cortex_a7 = Cpu{
1753 .name = "cortex_a7",
1754 .llvm_name = "cortex-a7",
1755 .features = featureSet(&[_]Feature{
1756 .a7,
1757 .armv7_a,
1758 .mp,
1759 .ret_addr_stack,
1760 .slow_fp_brcc,
1761 .slowfpvmlx,
1762 .trustzone,
1763 .vfp4,
1764 .virtualization,
1765 .vmlx_forwarding,
1766 .vmlx_hazards,
1767 }),
1768 };
1769 pub const cortex_a72 = Cpu{
1770 .name = "cortex_a72",
1771 .llvm_name = "cortex-a72",
1772 .features = featureSet(&[_]Feature{
1773 .a72,
1774 .armv8_a,
1775 .crc,
1776 .crypto,
1777 .hwdiv,
1778 .hwdiv_arm,
1779 }),
1780 };
1781 pub const cortex_a73 = Cpu{
1782 .name = "cortex_a73",
1783 .llvm_name = "cortex-a73",
1784 .features = featureSet(&[_]Feature{
1785 .a73,
1786 .armv8_a,
1787 .crc,
1788 .crypto,
1789 .hwdiv,
1790 .hwdiv_arm,
1791 }),
1792 };
1793 pub const cortex_a75 = Cpu{
1794 .name = "cortex_a75",
1795 .llvm_name = "cortex-a75",
1796 .features = featureSet(&[_]Feature{
1797 .a75,
1798 .armv8_2_a,
1799 .dotprod,
1800 .hwdiv,
1801 .hwdiv_arm,
1802 }),
1803 };
1804 pub const cortex_a76 = Cpu{
1805 .name = "cortex_a76",
1806 .llvm_name = "cortex-a76",
1807 .features = featureSet(&[_]Feature{
1808 .a76,
1809 .armv8_2_a,
1810 .crc,
1811 .crypto,
1812 .dotprod,
1813 .fullfp16,
1814 .hwdiv,
1815 .hwdiv_arm,
1816 }),
1817 };
1818 pub const cortex_a76ae = Cpu{
1819 .name = "cortex_a76ae",
1820 .llvm_name = "cortex-a76ae",
1821 .features = featureSet(&[_]Feature{
1822 .a76,
1823 .armv8_2_a,
1824 .crc,
1825 .crypto,
1826 .dotprod,
1827 .fullfp16,
1828 .hwdiv,
1829 .hwdiv_arm,
1830 }),
1831 };
1832 pub const cortex_a8 = Cpu{
1833 .name = "cortex_a8",
1834 .llvm_name = "cortex-a8",
1835 .features = featureSet(&[_]Feature{
1836 .a8,
1837 .armv7_a,
1838 .nonpipelined_vfp,
1839 .ret_addr_stack,
1840 .slow_fp_brcc,
1841 .slowfpvmlx,
1842 .trustzone,
1843 .vmlx_forwarding,
1844 .vmlx_hazards,
1845 }),
1846 };
1847 pub const cortex_a9 = Cpu{
1848 .name = "cortex_a9",
1849 .llvm_name = "cortex-a9",
1850 .features = featureSet(&[_]Feature{
1851 .a9,
1852 .armv7_a,
1853 .avoid_partial_cpsr,
1854 .expand_fp_mlx,
1855 .fp16,
1856 .mp,
1857 .muxed_units,
1858 .neon_fpmovs,
1859 .prefer_vmovsr,
1860 .ret_addr_stack,
1861 .trustzone,
1862 .vldn_align,
1863 .vmlx_forwarding,
1864 .vmlx_hazards,
1865 }),
1866 };
1867 pub const cortex_m0 = Cpu{
1868 .name = "cortex_m0",
1869 .llvm_name = "cortex-m0",
1870 .features = featureSet(&[_]Feature{
1871 .armv6_m,
1872 }),
1873 };
1874 pub const cortex_m0plus = Cpu{
1875 .name = "cortex_m0plus",
1876 .llvm_name = "cortex-m0plus",
1877 .features = featureSet(&[_]Feature{
1878 .armv6_m,
1879 }),
1880 };
1881 pub const cortex_m1 = Cpu{
1882 .name = "cortex_m1",
1883 .llvm_name = "cortex-m1",
1884 .features = featureSet(&[_]Feature{
1885 .armv6_m,
1886 }),
1887 };
1888 pub const cortex_m23 = Cpu{
1889 .name = "cortex_m23",
1890 .llvm_name = "cortex-m23",
1891 .features = featureSet(&[_]Feature{
1892 .armv8_m_base,
1893 .no_movt,
1894 }),
1895 };
1896 pub const cortex_m3 = Cpu{
1897 .name = "cortex_m3",
1898 .llvm_name = "cortex-m3",
1899 .features = featureSet(&[_]Feature{
1900 .armv7_m,
1901 .loop_align,
1902 .m3,
1903 .no_branch_predictor,
1904 .use_aa,
1905 .use_misched,
1906 }),
1907 };
1908 pub const cortex_m33 = Cpu{
1909 .name = "cortex_m33",
1910 .llvm_name = "cortex-m33",
1911 .features = featureSet(&[_]Feature{
1912 .armv8_m_main,
1913 .dsp,
1914 .fp_armv8d16sp,
1915 .loop_align,
1916 .no_branch_predictor,
1917 .slowfpvmlx,
1918 .use_aa,
1919 .use_misched,
1920 }),
1921 };
1922 pub const cortex_m35p = Cpu{
1923 .name = "cortex_m35p",
1924 .llvm_name = "cortex-m35p",
1925 .features = featureSet(&[_]Feature{
1926 .armv8_m_main,
1927 .dsp,
1928 .fp_armv8d16sp,
1929 .loop_align,
1930 .no_branch_predictor,
1931 .slowfpvmlx,
1932 .use_aa,
1933 .use_misched,
1934 }),
1935 };
1936 pub const cortex_m4 = Cpu{
1937 .name = "cortex_m4",
1938 .llvm_name = "cortex-m4",
1939 .features = featureSet(&[_]Feature{
1940 .armv7e_m,
1941 .loop_align,
1942 .no_branch_predictor,
1943 .slowfpvmlx,
1944 .use_aa,
1945 .use_misched,
1946 .vfp4d16sp,
1947 }),
1948 };
1949 pub const cortex_m7 = Cpu{
1950 .name = "cortex_m7",
1951 .llvm_name = "cortex-m7",
1952 .features = featureSet(&[_]Feature{
1953 .armv7e_m,
1954 .fp_armv8d16,
1955 }),
1956 };
1957 pub const cortex_r4 = Cpu{
1958 .name = "cortex_r4",
1959 .llvm_name = "cortex-r4",
1960 .features = featureSet(&[_]Feature{
1961 .armv7_r,
1962 .avoid_partial_cpsr,
1963 .r4,
1964 .ret_addr_stack,
1965 }),
1966 };
1967 pub const cortex_r4f = Cpu{
1968 .name = "cortex_r4f",
1969 .llvm_name = "cortex-r4f",
1970 .features = featureSet(&[_]Feature{
1971 .armv7_r,
1972 .avoid_partial_cpsr,
1973 .r4,
1974 .ret_addr_stack,
1975 .slow_fp_brcc,
1976 .slowfpvmlx,
1977 .vfp3d16,
1978 }),
1979 };
1980 pub const cortex_r5 = Cpu{
1981 .name = "cortex_r5",
1982 .llvm_name = "cortex-r5",
1983 .features = featureSet(&[_]Feature{
1984 .armv7_r,
1985 .avoid_partial_cpsr,
1986 .hwdiv_arm,
1987 .r5,
1988 .ret_addr_stack,
1989 .slow_fp_brcc,
1990 .slowfpvmlx,
1991 .vfp3d16,
1992 }),
1993 };
1994 pub const cortex_r52 = Cpu{
1995 .name = "cortex_r52",
1996 .llvm_name = "cortex-r52",
1997 .features = featureSet(&[_]Feature{
1998 .armv8_r,
1999 .fpao,
2000 .r52,
2001 .use_aa,
2002 .use_misched,
2003 }),
2004 };
2005 pub const cortex_r7 = Cpu{
2006 .name = "cortex_r7",
2007 .llvm_name = "cortex-r7",
2008 .features = featureSet(&[_]Feature{
2009 .armv7_r,
2010 .avoid_partial_cpsr,
2011 .fp16,
2012 .hwdiv_arm,
2013 .mp,
2014 .r7,
2015 .ret_addr_stack,
2016 .slow_fp_brcc,
2017 .slowfpvmlx,
2018 .vfp3d16,
2019 }),
2020 };
2021 pub const cortex_r8 = Cpu{
2022 .name = "cortex_r8",
2023 .llvm_name = "cortex-r8",
2024 .features = featureSet(&[_]Feature{
2025 .armv7_r,
2026 .avoid_partial_cpsr,
2027 .fp16,
2028 .hwdiv_arm,
2029 .mp,
2030 .ret_addr_stack,
2031 .slow_fp_brcc,
2032 .slowfpvmlx,
2033 .vfp3d16,
2034 }),
2035 };
2036 pub const cyclone = Cpu{
2037 .name = "cyclone",
2038 .llvm_name = "cyclone",
2039 .features = featureSet(&[_]Feature{
2040 .armv8_a,
2041 .avoid_movs_shop,
2042 .avoid_partial_cpsr,
2043 .crypto,
2044 .disable_postra_scheduler,
2045 .hwdiv,
2046 .hwdiv_arm,
2047 .mp,
2048 .neonfp,
2049 .ret_addr_stack,
2050 .slowfpvmlx,
2051 .swift,
2052 .use_misched,
2053 .vfp4,
2054 .zcz,
2055 }),
2056 };
2057 pub const ep9312 = Cpu{
2058 .name = "ep9312",
2059 .llvm_name = "ep9312",
2060 .features = featureSet(&[_]Feature{
2061 .armv4t,
2062 }),
2063 };
2064 pub const exynos_m1 = Cpu{
2065 .name = "exynos_m1",
2066 .llvm_name = "exynos-m1",
2067 .features = featureSet(&[_]Feature{
2068 .armv8_a,
2069 .exynos,
2070 }),
2071 };
2072 pub const exynos_m2 = Cpu{
2073 .name = "exynos_m2",
2074 .llvm_name = "exynos-m2",
2075 .features = featureSet(&[_]Feature{
2076 .armv8_a,
2077 .exynos,
2078 }),
2079 };
2080 pub const exynos_m3 = Cpu{
2081 .name = "exynos_m3",
2082 .llvm_name = "exynos-m3",
2083 .features = featureSet(&[_]Feature{
2084 .armv8_a,
2085 .exynos,
2086 }),
2087 };
2088 pub const exynos_m4 = Cpu{
2089 .name = "exynos_m4",
2090 .llvm_name = "exynos-m4",
2091 .features = featureSet(&[_]Feature{
2092 .armv8_2_a,
2093 .dotprod,
2094 .exynos,
2095 .fullfp16,
2096 }),
2097 };
2098 pub const exynos_m5 = Cpu{
2099 .name = "exynos_m5",
2100 .llvm_name = "exynos-m5",
2101 .features = featureSet(&[_]Feature{
2102 .armv8_2_a,
2103 .dotprod,
2104 .exynos,
2105 .fullfp16,
2106 }),
2107 };
2108 pub const generic = Cpu{
2109 .name = "generic",
2110 .llvm_name = "generic",
2111 .features = featureSet(&[_]Feature{}),
2112 };
2113 pub const iwmmxt = Cpu{
2114 .name = "iwmmxt",
2115 .llvm_name = "iwmmxt",
2116 .features = featureSet(&[_]Feature{
2117 .armv5te,
2118 }),
2119 };
2120 pub const krait = Cpu{
2121 .name = "krait",
2122 .llvm_name = "krait",
2123 .features = featureSet(&[_]Feature{
2124 .armv7_a,
2125 .avoid_partial_cpsr,
2126 .fp16,
2127 .hwdiv,
2128 .hwdiv_arm,
2129 .krait,
2130 .muxed_units,
2131 .ret_addr_stack,
2132 .vfp4,
2133 .vldn_align,
2134 .vmlx_forwarding,
2135 }),
2136 };
2137 pub const kryo = Cpu{
2138 .name = "kryo",
2139 .llvm_name = "kryo",
2140 .features = featureSet(&[_]Feature{
2141 .armv8_a,
2142 .crc,
2143 .crypto,
2144 .hwdiv,
2145 .hwdiv_arm,
2146 .kryo,
2147 }),
2148 };
2149 pub const mpcore = Cpu{
2150 .name = "mpcore",
2151 .llvm_name = "mpcore",
2152 .features = featureSet(&[_]Feature{
2153 .armv6k,
2154 .slowfpvmlx,
2155 .vfp2,
2156 }),
2157 };
2158 pub const mpcorenovfp = Cpu{
2159 .name = "mpcorenovfp",
2160 .llvm_name = "mpcorenovfp",
2161 .features = featureSet(&[_]Feature{
2162 .armv6k,
2163 }),
2164 };
2165 pub const sc000 = Cpu{
2166 .name = "sc000",
2167 .llvm_name = "sc000",
2168 .features = featureSet(&[_]Feature{
2169 .armv6_m,
2170 }),
2171 };
2172 pub const sc300 = Cpu{
2173 .name = "sc300",
2174 .llvm_name = "sc300",
2175 .features = featureSet(&[_]Feature{
2176 .armv7_m,
2177 .m3,
2178 .no_branch_predictor,
2179 .use_aa,
2180 .use_misched,
2181 }),
2182 };
2183 pub const strongarm = Cpu{
2184 .name = "strongarm",
2185 .llvm_name = "strongarm",
2186 .features = featureSet(&[_]Feature{
2187 .armv4,
2188 }),
2189 };
2190 pub const strongarm110 = Cpu{
2191 .name = "strongarm110",
2192 .llvm_name = "strongarm110",
2193 .features = featureSet(&[_]Feature{
2194 .armv4,
2195 }),
2196 };
2197 pub const strongarm1100 = Cpu{
2198 .name = "strongarm1100",
2199 .llvm_name = "strongarm1100",
2200 .features = featureSet(&[_]Feature{
2201 .armv4,
2202 }),
2203 };
2204 pub const strongarm1110 = Cpu{
2205 .name = "strongarm1110",
2206 .llvm_name = "strongarm1110",
2207 .features = featureSet(&[_]Feature{
2208 .armv4,
2209 }),
2210 };
2211 pub const swift = Cpu{
2212 .name = "swift",
2213 .llvm_name = "swift",
2214 .features = featureSet(&[_]Feature{
2215 .armv7_a,
2216 .avoid_movs_shop,
2217 .avoid_partial_cpsr,
2218 .disable_postra_scheduler,
2219 .hwdiv,
2220 .hwdiv_arm,
2221 .mp,
2222 .neonfp,
2223 .prefer_ishst,
2224 .prof_unpr,
2225 .ret_addr_stack,
2226 .slow_load_D_subreg,
2227 .slow_odd_reg,
2228 .slow_vdup32,
2229 .slow_vgetlni32,
2230 .slowfpvmlx,
2231 .swift,
2232 .use_misched,
2233 .vfp4,
2234 .vmlx_hazards,
2235 .wide_stride_vfp,
2236 }),
2237 };
2238 pub const xscale = Cpu{
2239 .name = "xscale",
2240 .llvm_name = "xscale",
2241 .features = featureSet(&[_]Feature{
2242 .armv5te,
2243 }),
2244 };
2245};
2246
2247/// All arm CPUs, sorted alphabetically by name.
2248/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
2249/// compiler has inefficient memory and CPU usage, affecting build times.
2250pub const all_cpus = &[_]*const Cpu{
2251 &cpu.arm1020e,
2252 &cpu.arm1020t,
2253 &cpu.arm1022e,
2254 &cpu.arm10e,
2255 &cpu.arm10tdmi,
2256 &cpu.arm1136j_s,
2257 &cpu.arm1136jf_s,
2258 &cpu.arm1156t2_s,
2259 &cpu.arm1156t2f_s,
2260 &cpu.arm1176j_s,
2261 &cpu.arm1176jz_s,
2262 &cpu.arm1176jzf_s,
2263 &cpu.arm710t,
2264 &cpu.arm720t,
2265 &cpu.arm7tdmi,
2266 &cpu.arm7tdmi_s,
2267 &cpu.arm8,
2268 &cpu.arm810,
2269 &cpu.arm9,
2270 &cpu.arm920,
2271 &cpu.arm920t,
2272 &cpu.arm922t,
2273 &cpu.arm926ej_s,
2274 &cpu.arm940t,
2275 &cpu.arm946e_s,
2276 &cpu.arm966e_s,
2277 &cpu.arm968e_s,
2278 &cpu.arm9e,
2279 &cpu.arm9tdmi,
2280 &cpu.cortex_a12,
2281 &cpu.cortex_a15,
2282 &cpu.cortex_a17,
2283 &cpu.cortex_a32,
2284 &cpu.cortex_a35,
2285 &cpu.cortex_a5,
2286 &cpu.cortex_a53,
2287 &cpu.cortex_a55,
2288 &cpu.cortex_a57,
2289 &cpu.cortex_a7,
2290 &cpu.cortex_a72,
2291 &cpu.cortex_a73,
2292 &cpu.cortex_a75,
2293 &cpu.cortex_a76,
2294 &cpu.cortex_a76ae,
2295 &cpu.cortex_a8,
2296 &cpu.cortex_a9,
2297 &cpu.cortex_m0,
2298 &cpu.cortex_m0plus,
2299 &cpu.cortex_m1,
2300 &cpu.cortex_m23,
2301 &cpu.cortex_m3,
2302 &cpu.cortex_m33,
2303 &cpu.cortex_m35p,
2304 &cpu.cortex_m4,
2305 &cpu.cortex_m7,
2306 &cpu.cortex_r4,
2307 &cpu.cortex_r4f,
2308 &cpu.cortex_r5,
2309 &cpu.cortex_r52,
2310 &cpu.cortex_r7,
2311 &cpu.cortex_r8,
2312 &cpu.cyclone,
2313 &cpu.ep9312,
2314 &cpu.exynos_m1,
2315 &cpu.exynos_m2,
2316 &cpu.exynos_m3,
2317 &cpu.exynos_m4,
2318 &cpu.exynos_m5,
2319 &cpu.generic,
2320 &cpu.iwmmxt,
2321 &cpu.krait,
2322 &cpu.kryo,
2323 &cpu.mpcore,
2324 &cpu.mpcorenovfp,
2325 &cpu.sc000,
2326 &cpu.sc300,
2327 &cpu.strongarm,
2328 &cpu.strongarm110,
2329 &cpu.strongarm1100,
2330 &cpu.strongarm1110,
2331 &cpu.swift,
2332 &cpu.xscale,
2333};
lib/std/target/avr.zig created+2380
......@@ -0,0 +1,2380 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 addsubiw,
6 avr0,
7 avr1,
8 avr2,
9 avr25,
10 avr3,
11 avr31,
12 avr35,
13 avr4,
14 avr5,
15 avr51,
16 avr6,
17 avrtiny,
18 @"break",
19 des,
20 eijmpcall,
21 elpm,
22 elpmx,
23 ijmpcall,
24 jmpcall,
25 lpm,
26 lpmx,
27 movw,
28 mul,
29 rmw,
30 smallstack,
31 special,
32 spm,
33 spmx,
34 sram,
35 tinyencoding,
36 xmega,
37 xmegau,
38};
39
40pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
41
42pub const all_features = blk: {
43 const len = @typeInfo(Feature).Enum.fields.len;
44 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
45 var result: [len]Cpu.Feature = undefined;
46 result[@enumToInt(Feature.addsubiw)] = .{
47 .llvm_name = "addsubiw",
48 .description = "Enable 16-bit register-immediate addition and subtraction instructions",
49 .dependencies = featureSet(&[_]Feature{}),
50 };
51 result[@enumToInt(Feature.avr0)] = .{
52 .llvm_name = "avr0",
53 .description = "The device is a part of the avr0 family",
54 .dependencies = featureSet(&[_]Feature{}),
55 };
56 result[@enumToInt(Feature.avr1)] = .{
57 .llvm_name = "avr1",
58 .description = "The device is a part of the avr1 family",
59 .dependencies = featureSet(&[_]Feature{
60 .avr0,
61 .lpm,
62 }),
63 };
64 result[@enumToInt(Feature.avr2)] = .{
65 .llvm_name = "avr2",
66 .description = "The device is a part of the avr2 family",
67 .dependencies = featureSet(&[_]Feature{
68 .addsubiw,
69 .avr1,
70 .ijmpcall,
71 .sram,
72 }),
73 };
74 result[@enumToInt(Feature.avr25)] = .{
75 .llvm_name = "avr25",
76 .description = "The device is a part of the avr25 family",
77 .dependencies = featureSet(&[_]Feature{
78 .avr2,
79 .@"break",
80 .lpmx,
81 .movw,
82 .spm,
83 }),
84 };
85 result[@enumToInt(Feature.avr3)] = .{
86 .llvm_name = "avr3",
87 .description = "The device is a part of the avr3 family",
88 .dependencies = featureSet(&[_]Feature{
89 .avr2,
90 .jmpcall,
91 }),
92 };
93 result[@enumToInt(Feature.avr31)] = .{
94 .llvm_name = "avr31",
95 .description = "The device is a part of the avr31 family",
96 .dependencies = featureSet(&[_]Feature{
97 .avr3,
98 .elpm,
99 }),
100 };
101 result[@enumToInt(Feature.avr35)] = .{
102 .llvm_name = "avr35",
103 .description = "The device is a part of the avr35 family",
104 .dependencies = featureSet(&[_]Feature{
105 .avr3,
106 .@"break",
107 .lpmx,
108 .movw,
109 .spm,
110 }),
111 };
112 result[@enumToInt(Feature.avr4)] = .{
113 .llvm_name = "avr4",
114 .description = "The device is a part of the avr4 family",
115 .dependencies = featureSet(&[_]Feature{
116 .avr2,
117 .@"break",
118 .lpmx,
119 .movw,
120 .mul,
121 .spm,
122 }),
123 };
124 result[@enumToInt(Feature.avr5)] = .{
125 .llvm_name = "avr5",
126 .description = "The device is a part of the avr5 family",
127 .dependencies = featureSet(&[_]Feature{
128 .avr3,
129 .@"break",
130 .lpmx,
131 .movw,
132 .mul,
133 .spm,
134 }),
135 };
136 result[@enumToInt(Feature.avr51)] = .{
137 .llvm_name = "avr51",
138 .description = "The device is a part of the avr51 family",
139 .dependencies = featureSet(&[_]Feature{
140 .avr5,
141 .elpm,
142 .elpmx,
143 }),
144 };
145 result[@enumToInt(Feature.avr6)] = .{
146 .llvm_name = "avr6",
147 .description = "The device is a part of the avr6 family",
148 .dependencies = featureSet(&[_]Feature{
149 .avr51,
150 }),
151 };
152 result[@enumToInt(Feature.avrtiny)] = .{
153 .llvm_name = "avrtiny",
154 .description = "The device is a part of the avrtiny family",
155 .dependencies = featureSet(&[_]Feature{
156 .avr0,
157 .@"break",
158 .sram,
159 .tinyencoding,
160 }),
161 };
162 result[@enumToInt(Feature.@"break")] = .{
163 .llvm_name = "break",
164 .description = "The device supports the `BREAK` debugging instruction",
165 .dependencies = featureSet(&[_]Feature{}),
166 };
167 result[@enumToInt(Feature.des)] = .{
168 .llvm_name = "des",
169 .description = "The device supports the `DES k` encryption instruction",
170 .dependencies = featureSet(&[_]Feature{}),
171 };
172 result[@enumToInt(Feature.eijmpcall)] = .{
173 .llvm_name = "eijmpcall",
174 .description = "The device supports the `EIJMP`/`EICALL` instructions",
175 .dependencies = featureSet(&[_]Feature{}),
176 };
177 result[@enumToInt(Feature.elpm)] = .{
178 .llvm_name = "elpm",
179 .description = "The device supports the ELPM instruction",
180 .dependencies = featureSet(&[_]Feature{}),
181 };
182 result[@enumToInt(Feature.elpmx)] = .{
183 .llvm_name = "elpmx",
184 .description = "The device supports the `ELPM Rd, Z[+]` instructions",
185 .dependencies = featureSet(&[_]Feature{}),
186 };
187 result[@enumToInt(Feature.ijmpcall)] = .{
188 .llvm_name = "ijmpcall",
189 .description = "The device supports `IJMP`/`ICALL`instructions",
190 .dependencies = featureSet(&[_]Feature{}),
191 };
192 result[@enumToInt(Feature.jmpcall)] = .{
193 .llvm_name = "jmpcall",
194 .description = "The device supports the `JMP` and `CALL` instructions",
195 .dependencies = featureSet(&[_]Feature{}),
196 };
197 result[@enumToInt(Feature.lpm)] = .{
198 .llvm_name = "lpm",
199 .description = "The device supports the `LPM` instruction",
200 .dependencies = featureSet(&[_]Feature{}),
201 };
202 result[@enumToInt(Feature.lpmx)] = .{
203 .llvm_name = "lpmx",
204 .description = "The device supports the `LPM Rd, Z[+]` instruction",
205 .dependencies = featureSet(&[_]Feature{}),
206 };
207 result[@enumToInt(Feature.movw)] = .{
208 .llvm_name = "movw",
209 .description = "The device supports the 16-bit MOVW instruction",
210 .dependencies = featureSet(&[_]Feature{}),
211 };
212 result[@enumToInt(Feature.mul)] = .{
213 .llvm_name = "mul",
214 .description = "The device supports the multiplication instructions",
215 .dependencies = featureSet(&[_]Feature{}),
216 };
217 result[@enumToInt(Feature.rmw)] = .{
218 .llvm_name = "rmw",
219 .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT",
220 .dependencies = featureSet(&[_]Feature{}),
221 };
222 result[@enumToInt(Feature.smallstack)] = .{
223 .llvm_name = "smallstack",
224 .description = "The device has an 8-bit stack pointer",
225 .dependencies = featureSet(&[_]Feature{}),
226 };
227 result[@enumToInt(Feature.special)] = .{
228 .llvm_name = "special",
229 .description = "Enable use of the entire instruction set - used for debugging",
230 .dependencies = featureSet(&[_]Feature{
231 .addsubiw,
232 .@"break",
233 .des,
234 .eijmpcall,
235 .elpm,
236 .elpmx,
237 .ijmpcall,
238 .jmpcall,
239 .lpm,
240 .lpmx,
241 .movw,
242 .mul,
243 .rmw,
244 .spm,
245 .spmx,
246 .sram,
247 }),
248 };
249 result[@enumToInt(Feature.spm)] = .{
250 .llvm_name = "spm",
251 .description = "The device supports the `SPM` instruction",
252 .dependencies = featureSet(&[_]Feature{}),
253 };
254 result[@enumToInt(Feature.spmx)] = .{
255 .llvm_name = "spmx",
256 .description = "The device supports the `SPM Z+` instruction",
257 .dependencies = featureSet(&[_]Feature{}),
258 };
259 result[@enumToInt(Feature.sram)] = .{
260 .llvm_name = "sram",
261 .description = "The device has random access memory",
262 .dependencies = featureSet(&[_]Feature{}),
263 };
264 result[@enumToInt(Feature.tinyencoding)] = .{
265 .llvm_name = "tinyencoding",
266 .description = "The device has Tiny core specific instruction encodings",
267 .dependencies = featureSet(&[_]Feature{}),
268 };
269 result[@enumToInt(Feature.xmega)] = .{
270 .llvm_name = "xmega",
271 .description = "The device is a part of the xmega family",
272 .dependencies = featureSet(&[_]Feature{
273 .avr51,
274 .des,
275 .eijmpcall,
276 .spmx,
277 }),
278 };
279 result[@enumToInt(Feature.xmegau)] = .{
280 .llvm_name = "xmegau",
281 .description = "The device is a part of the xmegau family",
282 .dependencies = featureSet(&[_]Feature{
283 .rmw,
284 .xmega,
285 }),
286 };
287 const ti = @typeInfo(Feature);
288 for (result) |*elem, i| {
289 elem.index = i;
290 elem.name = ti.Enum.fields[i].name;
291 }
292 break :blk result;
293};
294
295pub const cpu = struct {
296 pub const at43usb320 = Cpu{
297 .name = "at43usb320",
298 .llvm_name = "at43usb320",
299 .features = featureSet(&[_]Feature{
300 .avr31,
301 }),
302 };
303 pub const at43usb355 = Cpu{
304 .name = "at43usb355",
305 .llvm_name = "at43usb355",
306 .features = featureSet(&[_]Feature{
307 .avr3,
308 }),
309 };
310 pub const at76c711 = Cpu{
311 .name = "at76c711",
312 .llvm_name = "at76c711",
313 .features = featureSet(&[_]Feature{
314 .avr3,
315 }),
316 };
317 pub const at86rf401 = Cpu{
318 .name = "at86rf401",
319 .llvm_name = "at86rf401",
320 .features = featureSet(&[_]Feature{
321 .avr2,
322 .lpmx,
323 .movw,
324 }),
325 };
326 pub const at90c8534 = Cpu{
327 .name = "at90c8534",
328 .llvm_name = "at90c8534",
329 .features = featureSet(&[_]Feature{
330 .avr2,
331 }),
332 };
333 pub const at90can128 = Cpu{
334 .name = "at90can128",
335 .llvm_name = "at90can128",
336 .features = featureSet(&[_]Feature{
337 .avr51,
338 }),
339 };
340 pub const at90can32 = Cpu{
341 .name = "at90can32",
342 .llvm_name = "at90can32",
343 .features = featureSet(&[_]Feature{
344 .avr5,
345 }),
346 };
347 pub const at90can64 = Cpu{
348 .name = "at90can64",
349 .llvm_name = "at90can64",
350 .features = featureSet(&[_]Feature{
351 .avr5,
352 }),
353 };
354 pub const at90pwm1 = Cpu{
355 .name = "at90pwm1",
356 .llvm_name = "at90pwm1",
357 .features = featureSet(&[_]Feature{
358 .avr4,
359 }),
360 };
361 pub const at90pwm161 = Cpu{
362 .name = "at90pwm161",
363 .llvm_name = "at90pwm161",
364 .features = featureSet(&[_]Feature{
365 .avr5,
366 }),
367 };
368 pub const at90pwm2 = Cpu{
369 .name = "at90pwm2",
370 .llvm_name = "at90pwm2",
371 .features = featureSet(&[_]Feature{
372 .avr4,
373 }),
374 };
375 pub const at90pwm216 = Cpu{
376 .name = "at90pwm216",
377 .llvm_name = "at90pwm216",
378 .features = featureSet(&[_]Feature{
379 .avr5,
380 }),
381 };
382 pub const at90pwm2b = Cpu{
383 .name = "at90pwm2b",
384 .llvm_name = "at90pwm2b",
385 .features = featureSet(&[_]Feature{
386 .avr4,
387 }),
388 };
389 pub const at90pwm3 = Cpu{
390 .name = "at90pwm3",
391 .llvm_name = "at90pwm3",
392 .features = featureSet(&[_]Feature{
393 .avr4,
394 }),
395 };
396 pub const at90pwm316 = Cpu{
397 .name = "at90pwm316",
398 .llvm_name = "at90pwm316",
399 .features = featureSet(&[_]Feature{
400 .avr5,
401 }),
402 };
403 pub const at90pwm3b = Cpu{
404 .name = "at90pwm3b",
405 .llvm_name = "at90pwm3b",
406 .features = featureSet(&[_]Feature{
407 .avr4,
408 }),
409 };
410 pub const at90pwm81 = Cpu{
411 .name = "at90pwm81",
412 .llvm_name = "at90pwm81",
413 .features = featureSet(&[_]Feature{
414 .avr4,
415 }),
416 };
417 pub const at90s1200 = Cpu{
418 .name = "at90s1200",
419 .llvm_name = "at90s1200",
420 .features = featureSet(&[_]Feature{
421 .avr0,
422 }),
423 };
424 pub const at90s2313 = Cpu{
425 .name = "at90s2313",
426 .llvm_name = "at90s2313",
427 .features = featureSet(&[_]Feature{
428 .avr2,
429 }),
430 };
431 pub const at90s2323 = Cpu{
432 .name = "at90s2323",
433 .llvm_name = "at90s2323",
434 .features = featureSet(&[_]Feature{
435 .avr2,
436 }),
437 };
438 pub const at90s2333 = Cpu{
439 .name = "at90s2333",
440 .llvm_name = "at90s2333",
441 .features = featureSet(&[_]Feature{
442 .avr2,
443 }),
444 };
445 pub const at90s2343 = Cpu{
446 .name = "at90s2343",
447 .llvm_name = "at90s2343",
448 .features = featureSet(&[_]Feature{
449 .avr2,
450 }),
451 };
452 pub const at90s4414 = Cpu{
453 .name = "at90s4414",
454 .llvm_name = "at90s4414",
455 .features = featureSet(&[_]Feature{
456 .avr2,
457 }),
458 };
459 pub const at90s4433 = Cpu{
460 .name = "at90s4433",
461 .llvm_name = "at90s4433",
462 .features = featureSet(&[_]Feature{
463 .avr2,
464 }),
465 };
466 pub const at90s4434 = Cpu{
467 .name = "at90s4434",
468 .llvm_name = "at90s4434",
469 .features = featureSet(&[_]Feature{
470 .avr2,
471 }),
472 };
473 pub const at90s8515 = Cpu{
474 .name = "at90s8515",
475 .llvm_name = "at90s8515",
476 .features = featureSet(&[_]Feature{
477 .avr2,
478 }),
479 };
480 pub const at90s8535 = Cpu{
481 .name = "at90s8535",
482 .llvm_name = "at90s8535",
483 .features = featureSet(&[_]Feature{
484 .avr2,
485 }),
486 };
487 pub const at90scr100 = Cpu{
488 .name = "at90scr100",
489 .llvm_name = "at90scr100",
490 .features = featureSet(&[_]Feature{
491 .avr5,
492 }),
493 };
494 pub const at90usb1286 = Cpu{
495 .name = "at90usb1286",
496 .llvm_name = "at90usb1286",
497 .features = featureSet(&[_]Feature{
498 .avr51,
499 }),
500 };
501 pub const at90usb1287 = Cpu{
502 .name = "at90usb1287",
503 .llvm_name = "at90usb1287",
504 .features = featureSet(&[_]Feature{
505 .avr51,
506 }),
507 };
508 pub const at90usb162 = Cpu{
509 .name = "at90usb162",
510 .llvm_name = "at90usb162",
511 .features = featureSet(&[_]Feature{
512 .avr35,
513 }),
514 };
515 pub const at90usb646 = Cpu{
516 .name = "at90usb646",
517 .llvm_name = "at90usb646",
518 .features = featureSet(&[_]Feature{
519 .avr5,
520 }),
521 };
522 pub const at90usb647 = Cpu{
523 .name = "at90usb647",
524 .llvm_name = "at90usb647",
525 .features = featureSet(&[_]Feature{
526 .avr5,
527 }),
528 };
529 pub const at90usb82 = Cpu{
530 .name = "at90usb82",
531 .llvm_name = "at90usb82",
532 .features = featureSet(&[_]Feature{
533 .avr35,
534 }),
535 };
536 pub const at94k = Cpu{
537 .name = "at94k",
538 .llvm_name = "at94k",
539 .features = featureSet(&[_]Feature{
540 .avr3,
541 .lpmx,
542 .movw,
543 .mul,
544 }),
545 };
546 pub const ata5272 = Cpu{
547 .name = "ata5272",
548 .llvm_name = "ata5272",
549 .features = featureSet(&[_]Feature{
550 .avr25,
551 }),
552 };
553 pub const ata5505 = Cpu{
554 .name = "ata5505",
555 .llvm_name = "ata5505",
556 .features = featureSet(&[_]Feature{
557 .avr35,
558 }),
559 };
560 pub const ata5790 = Cpu{
561 .name = "ata5790",
562 .llvm_name = "ata5790",
563 .features = featureSet(&[_]Feature{
564 .avr5,
565 }),
566 };
567 pub const ata5795 = Cpu{
568 .name = "ata5795",
569 .llvm_name = "ata5795",
570 .features = featureSet(&[_]Feature{
571 .avr5,
572 }),
573 };
574 pub const ata6285 = Cpu{
575 .name = "ata6285",
576 .llvm_name = "ata6285",
577 .features = featureSet(&[_]Feature{
578 .avr4,
579 }),
580 };
581 pub const ata6286 = Cpu{
582 .name = "ata6286",
583 .llvm_name = "ata6286",
584 .features = featureSet(&[_]Feature{
585 .avr4,
586 }),
587 };
588 pub const ata6289 = Cpu{
589 .name = "ata6289",
590 .llvm_name = "ata6289",
591 .features = featureSet(&[_]Feature{
592 .avr4,
593 }),
594 };
595 pub const atmega103 = Cpu{
596 .name = "atmega103",
597 .llvm_name = "atmega103",
598 .features = featureSet(&[_]Feature{
599 .avr31,
600 }),
601 };
602 pub const atmega128 = Cpu{
603 .name = "atmega128",
604 .llvm_name = "atmega128",
605 .features = featureSet(&[_]Feature{
606 .avr51,
607 }),
608 };
609 pub const atmega1280 = Cpu{
610 .name = "atmega1280",
611 .llvm_name = "atmega1280",
612 .features = featureSet(&[_]Feature{
613 .avr51,
614 }),
615 };
616 pub const atmega1281 = Cpu{
617 .name = "atmega1281",
618 .llvm_name = "atmega1281",
619 .features = featureSet(&[_]Feature{
620 .avr51,
621 }),
622 };
623 pub const atmega1284 = Cpu{
624 .name = "atmega1284",
625 .llvm_name = "atmega1284",
626 .features = featureSet(&[_]Feature{
627 .avr51,
628 }),
629 };
630 pub const atmega1284p = Cpu{
631 .name = "atmega1284p",
632 .llvm_name = "atmega1284p",
633 .features = featureSet(&[_]Feature{
634 .avr51,
635 }),
636 };
637 pub const atmega1284rfr2 = Cpu{
638 .name = "atmega1284rfr2",
639 .llvm_name = "atmega1284rfr2",
640 .features = featureSet(&[_]Feature{
641 .avr51,
642 }),
643 };
644 pub const atmega128a = Cpu{
645 .name = "atmega128a",
646 .llvm_name = "atmega128a",
647 .features = featureSet(&[_]Feature{
648 .avr51,
649 }),
650 };
651 pub const atmega128rfa1 = Cpu{
652 .name = "atmega128rfa1",
653 .llvm_name = "atmega128rfa1",
654 .features = featureSet(&[_]Feature{
655 .avr51,
656 }),
657 };
658 pub const atmega128rfr2 = Cpu{
659 .name = "atmega128rfr2",
660 .llvm_name = "atmega128rfr2",
661 .features = featureSet(&[_]Feature{
662 .avr51,
663 }),
664 };
665 pub const atmega16 = Cpu{
666 .name = "atmega16",
667 .llvm_name = "atmega16",
668 .features = featureSet(&[_]Feature{
669 .avr5,
670 }),
671 };
672 pub const atmega161 = Cpu{
673 .name = "atmega161",
674 .llvm_name = "atmega161",
675 .features = featureSet(&[_]Feature{
676 .avr3,
677 .lpmx,
678 .movw,
679 .mul,
680 .spm,
681 }),
682 };
683 pub const atmega162 = Cpu{
684 .name = "atmega162",
685 .llvm_name = "atmega162",
686 .features = featureSet(&[_]Feature{
687 .avr5,
688 }),
689 };
690 pub const atmega163 = Cpu{
691 .name = "atmega163",
692 .llvm_name = "atmega163",
693 .features = featureSet(&[_]Feature{
694 .avr3,
695 .lpmx,
696 .movw,
697 .mul,
698 .spm,
699 }),
700 };
701 pub const atmega164a = Cpu{
702 .name = "atmega164a",
703 .llvm_name = "atmega164a",
704 .features = featureSet(&[_]Feature{
705 .avr5,
706 }),
707 };
708 pub const atmega164p = Cpu{
709 .name = "atmega164p",
710 .llvm_name = "atmega164p",
711 .features = featureSet(&[_]Feature{
712 .avr5,
713 }),
714 };
715 pub const atmega164pa = Cpu{
716 .name = "atmega164pa",
717 .llvm_name = "atmega164pa",
718 .features = featureSet(&[_]Feature{
719 .avr5,
720 }),
721 };
722 pub const atmega165 = Cpu{
723 .name = "atmega165",
724 .llvm_name = "atmega165",
725 .features = featureSet(&[_]Feature{
726 .avr5,
727 }),
728 };
729 pub const atmega165a = Cpu{
730 .name = "atmega165a",
731 .llvm_name = "atmega165a",
732 .features = featureSet(&[_]Feature{
733 .avr5,
734 }),
735 };
736 pub const atmega165p = Cpu{
737 .name = "atmega165p",
738 .llvm_name = "atmega165p",
739 .features = featureSet(&[_]Feature{
740 .avr5,
741 }),
742 };
743 pub const atmega165pa = Cpu{
744 .name = "atmega165pa",
745 .llvm_name = "atmega165pa",
746 .features = featureSet(&[_]Feature{
747 .avr5,
748 }),
749 };
750 pub const atmega168 = Cpu{
751 .name = "atmega168",
752 .llvm_name = "atmega168",
753 .features = featureSet(&[_]Feature{
754 .avr5,
755 }),
756 };
757 pub const atmega168a = Cpu{
758 .name = "atmega168a",
759 .llvm_name = "atmega168a",
760 .features = featureSet(&[_]Feature{
761 .avr5,
762 }),
763 };
764 pub const atmega168p = Cpu{
765 .name = "atmega168p",
766 .llvm_name = "atmega168p",
767 .features = featureSet(&[_]Feature{
768 .avr5,
769 }),
770 };
771 pub const atmega168pa = Cpu{
772 .name = "atmega168pa",
773 .llvm_name = "atmega168pa",
774 .features = featureSet(&[_]Feature{
775 .avr5,
776 }),
777 };
778 pub const atmega169 = Cpu{
779 .name = "atmega169",
780 .llvm_name = "atmega169",
781 .features = featureSet(&[_]Feature{
782 .avr5,
783 }),
784 };
785 pub const atmega169a = Cpu{
786 .name = "atmega169a",
787 .llvm_name = "atmega169a",
788 .features = featureSet(&[_]Feature{
789 .avr5,
790 }),
791 };
792 pub const atmega169p = Cpu{
793 .name = "atmega169p",
794 .llvm_name = "atmega169p",
795 .features = featureSet(&[_]Feature{
796 .avr5,
797 }),
798 };
799 pub const atmega169pa = Cpu{
800 .name = "atmega169pa",
801 .llvm_name = "atmega169pa",
802 .features = featureSet(&[_]Feature{
803 .avr5,
804 }),
805 };
806 pub const atmega16a = Cpu{
807 .name = "atmega16a",
808 .llvm_name = "atmega16a",
809 .features = featureSet(&[_]Feature{
810 .avr5,
811 }),
812 };
813 pub const atmega16hva = Cpu{
814 .name = "atmega16hva",
815 .llvm_name = "atmega16hva",
816 .features = featureSet(&[_]Feature{
817 .avr5,
818 }),
819 };
820 pub const atmega16hva2 = Cpu{
821 .name = "atmega16hva2",
822 .llvm_name = "atmega16hva2",
823 .features = featureSet(&[_]Feature{
824 .avr5,
825 }),
826 };
827 pub const atmega16hvb = Cpu{
828 .name = "atmega16hvb",
829 .llvm_name = "atmega16hvb",
830 .features = featureSet(&[_]Feature{
831 .avr5,
832 }),
833 };
834 pub const atmega16hvbrevb = Cpu{
835 .name = "atmega16hvbrevb",
836 .llvm_name = "atmega16hvbrevb",
837 .features = featureSet(&[_]Feature{
838 .avr5,
839 }),
840 };
841 pub const atmega16m1 = Cpu{
842 .name = "atmega16m1",
843 .llvm_name = "atmega16m1",
844 .features = featureSet(&[_]Feature{
845 .avr5,
846 }),
847 };
848 pub const atmega16u2 = Cpu{
849 .name = "atmega16u2",
850 .llvm_name = "atmega16u2",
851 .features = featureSet(&[_]Feature{
852 .avr35,
853 }),
854 };
855 pub const atmega16u4 = Cpu{
856 .name = "atmega16u4",
857 .llvm_name = "atmega16u4",
858 .features = featureSet(&[_]Feature{
859 .avr5,
860 }),
861 };
862 pub const atmega2560 = Cpu{
863 .name = "atmega2560",
864 .llvm_name = "atmega2560",
865 .features = featureSet(&[_]Feature{
866 .avr6,
867 }),
868 };
869 pub const atmega2561 = Cpu{
870 .name = "atmega2561",
871 .llvm_name = "atmega2561",
872 .features = featureSet(&[_]Feature{
873 .avr6,
874 }),
875 };
876 pub const atmega2564rfr2 = Cpu{
877 .name = "atmega2564rfr2",
878 .llvm_name = "atmega2564rfr2",
879 .features = featureSet(&[_]Feature{
880 .avr6,
881 }),
882 };
883 pub const atmega256rfr2 = Cpu{
884 .name = "atmega256rfr2",
885 .llvm_name = "atmega256rfr2",
886 .features = featureSet(&[_]Feature{
887 .avr6,
888 }),
889 };
890 pub const atmega32 = Cpu{
891 .name = "atmega32",
892 .llvm_name = "atmega32",
893 .features = featureSet(&[_]Feature{
894 .avr5,
895 }),
896 };
897 pub const atmega323 = Cpu{
898 .name = "atmega323",
899 .llvm_name = "atmega323",
900 .features = featureSet(&[_]Feature{
901 .avr5,
902 }),
903 };
904 pub const atmega324a = Cpu{
905 .name = "atmega324a",
906 .llvm_name = "atmega324a",
907 .features = featureSet(&[_]Feature{
908 .avr5,
909 }),
910 };
911 pub const atmega324p = Cpu{
912 .name = "atmega324p",
913 .llvm_name = "atmega324p",
914 .features = featureSet(&[_]Feature{
915 .avr5,
916 }),
917 };
918 pub const atmega324pa = Cpu{
919 .name = "atmega324pa",
920 .llvm_name = "atmega324pa",
921 .features = featureSet(&[_]Feature{
922 .avr5,
923 }),
924 };
925 pub const atmega325 = Cpu{
926 .name = "atmega325",
927 .llvm_name = "atmega325",
928 .features = featureSet(&[_]Feature{
929 .avr5,
930 }),
931 };
932 pub const atmega3250 = Cpu{
933 .name = "atmega3250",
934 .llvm_name = "atmega3250",
935 .features = featureSet(&[_]Feature{
936 .avr5,
937 }),
938 };
939 pub const atmega3250a = Cpu{
940 .name = "atmega3250a",
941 .llvm_name = "atmega3250a",
942 .features = featureSet(&[_]Feature{
943 .avr5,
944 }),
945 };
946 pub const atmega3250p = Cpu{
947 .name = "atmega3250p",
948 .llvm_name = "atmega3250p",
949 .features = featureSet(&[_]Feature{
950 .avr5,
951 }),
952 };
953 pub const atmega3250pa = Cpu{
954 .name = "atmega3250pa",
955 .llvm_name = "atmega3250pa",
956 .features = featureSet(&[_]Feature{
957 .avr5,
958 }),
959 };
960 pub const atmega325a = Cpu{
961 .name = "atmega325a",
962 .llvm_name = "atmega325a",
963 .features = featureSet(&[_]Feature{
964 .avr5,
965 }),
966 };
967 pub const atmega325p = Cpu{
968 .name = "atmega325p",
969 .llvm_name = "atmega325p",
970 .features = featureSet(&[_]Feature{
971 .avr5,
972 }),
973 };
974 pub const atmega325pa = Cpu{
975 .name = "atmega325pa",
976 .llvm_name = "atmega325pa",
977 .features = featureSet(&[_]Feature{
978 .avr5,
979 }),
980 };
981 pub const atmega328 = Cpu{
982 .name = "atmega328",
983 .llvm_name = "atmega328",
984 .features = featureSet(&[_]Feature{
985 .avr5,
986 }),
987 };
988 pub const atmega328p = Cpu{
989 .name = "atmega328p",
990 .llvm_name = "atmega328p",
991 .features = featureSet(&[_]Feature{
992 .avr5,
993 }),
994 };
995 pub const atmega329 = Cpu{
996 .name = "atmega329",
997 .llvm_name = "atmega329",
998 .features = featureSet(&[_]Feature{
999 .avr5,
1000 }),
1001 };
1002 pub const atmega3290 = Cpu{
1003 .name = "atmega3290",
1004 .llvm_name = "atmega3290",
1005 .features = featureSet(&[_]Feature{
1006 .avr5,
1007 }),
1008 };
1009 pub const atmega3290a = Cpu{
1010 .name = "atmega3290a",
1011 .llvm_name = "atmega3290a",
1012 .features = featureSet(&[_]Feature{
1013 .avr5,
1014 }),
1015 };
1016 pub const atmega3290p = Cpu{
1017 .name = "atmega3290p",
1018 .llvm_name = "atmega3290p",
1019 .features = featureSet(&[_]Feature{
1020 .avr5,
1021 }),
1022 };
1023 pub const atmega3290pa = Cpu{
1024 .name = "atmega3290pa",
1025 .llvm_name = "atmega3290pa",
1026 .features = featureSet(&[_]Feature{
1027 .avr5,
1028 }),
1029 };
1030 pub const atmega329a = Cpu{
1031 .name = "atmega329a",
1032 .llvm_name = "atmega329a",
1033 .features = featureSet(&[_]Feature{
1034 .avr5,
1035 }),
1036 };
1037 pub const atmega329p = Cpu{
1038 .name = "atmega329p",
1039 .llvm_name = "atmega329p",
1040 .features = featureSet(&[_]Feature{
1041 .avr5,
1042 }),
1043 };
1044 pub const atmega329pa = Cpu{
1045 .name = "atmega329pa",
1046 .llvm_name = "atmega329pa",
1047 .features = featureSet(&[_]Feature{
1048 .avr5,
1049 }),
1050 };
1051 pub const atmega32a = Cpu{
1052 .name = "atmega32a",
1053 .llvm_name = "atmega32a",
1054 .features = featureSet(&[_]Feature{
1055 .avr5,
1056 }),
1057 };
1058 pub const atmega32c1 = Cpu{
1059 .name = "atmega32c1",
1060 .llvm_name = "atmega32c1",
1061 .features = featureSet(&[_]Feature{
1062 .avr5,
1063 }),
1064 };
1065 pub const atmega32hvb = Cpu{
1066 .name = "atmega32hvb",
1067 .llvm_name = "atmega32hvb",
1068 .features = featureSet(&[_]Feature{
1069 .avr5,
1070 }),
1071 };
1072 pub const atmega32hvbrevb = Cpu{
1073 .name = "atmega32hvbrevb",
1074 .llvm_name = "atmega32hvbrevb",
1075 .features = featureSet(&[_]Feature{
1076 .avr5,
1077 }),
1078 };
1079 pub const atmega32m1 = Cpu{
1080 .name = "atmega32m1",
1081 .llvm_name = "atmega32m1",
1082 .features = featureSet(&[_]Feature{
1083 .avr5,
1084 }),
1085 };
1086 pub const atmega32u2 = Cpu{
1087 .name = "atmega32u2",
1088 .llvm_name = "atmega32u2",
1089 .features = featureSet(&[_]Feature{
1090 .avr35,
1091 }),
1092 };
1093 pub const atmega32u4 = Cpu{
1094 .name = "atmega32u4",
1095 .llvm_name = "atmega32u4",
1096 .features = featureSet(&[_]Feature{
1097 .avr5,
1098 }),
1099 };
1100 pub const atmega32u6 = Cpu{
1101 .name = "atmega32u6",
1102 .llvm_name = "atmega32u6",
1103 .features = featureSet(&[_]Feature{
1104 .avr5,
1105 }),
1106 };
1107 pub const atmega406 = Cpu{
1108 .name = "atmega406",
1109 .llvm_name = "atmega406",
1110 .features = featureSet(&[_]Feature{
1111 .avr5,
1112 }),
1113 };
1114 pub const atmega48 = Cpu{
1115 .name = "atmega48",
1116 .llvm_name = "atmega48",
1117 .features = featureSet(&[_]Feature{
1118 .avr4,
1119 }),
1120 };
1121 pub const atmega48a = Cpu{
1122 .name = "atmega48a",
1123 .llvm_name = "atmega48a",
1124 .features = featureSet(&[_]Feature{
1125 .avr4,
1126 }),
1127 };
1128 pub const atmega48p = Cpu{
1129 .name = "atmega48p",
1130 .llvm_name = "atmega48p",
1131 .features = featureSet(&[_]Feature{
1132 .avr4,
1133 }),
1134 };
1135 pub const atmega48pa = Cpu{
1136 .name = "atmega48pa",
1137 .llvm_name = "atmega48pa",
1138 .features = featureSet(&[_]Feature{
1139 .avr4,
1140 }),
1141 };
1142 pub const atmega64 = Cpu{
1143 .name = "atmega64",
1144 .llvm_name = "atmega64",
1145 .features = featureSet(&[_]Feature{
1146 .avr5,
1147 }),
1148 };
1149 pub const atmega640 = Cpu{
1150 .name = "atmega640",
1151 .llvm_name = "atmega640",
1152 .features = featureSet(&[_]Feature{
1153 .avr5,
1154 }),
1155 };
1156 pub const atmega644 = Cpu{
1157 .name = "atmega644",
1158 .llvm_name = "atmega644",
1159 .features = featureSet(&[_]Feature{
1160 .avr5,
1161 }),
1162 };
1163 pub const atmega644a = Cpu{
1164 .name = "atmega644a",
1165 .llvm_name = "atmega644a",
1166 .features = featureSet(&[_]Feature{
1167 .avr5,
1168 }),
1169 };
1170 pub const atmega644p = Cpu{
1171 .name = "atmega644p",
1172 .llvm_name = "atmega644p",
1173 .features = featureSet(&[_]Feature{
1174 .avr5,
1175 }),
1176 };
1177 pub const atmega644pa = Cpu{
1178 .name = "atmega644pa",
1179 .llvm_name = "atmega644pa",
1180 .features = featureSet(&[_]Feature{
1181 .avr5,
1182 }),
1183 };
1184 pub const atmega644rfr2 = Cpu{
1185 .name = "atmega644rfr2",
1186 .llvm_name = "atmega644rfr2",
1187 .features = featureSet(&[_]Feature{
1188 .avr5,
1189 }),
1190 };
1191 pub const atmega645 = Cpu{
1192 .name = "atmega645",
1193 .llvm_name = "atmega645",
1194 .features = featureSet(&[_]Feature{
1195 .avr5,
1196 }),
1197 };
1198 pub const atmega6450 = Cpu{
1199 .name = "atmega6450",
1200 .llvm_name = "atmega6450",
1201 .features = featureSet(&[_]Feature{
1202 .avr5,
1203 }),
1204 };
1205 pub const atmega6450a = Cpu{
1206 .name = "atmega6450a",
1207 .llvm_name = "atmega6450a",
1208 .features = featureSet(&[_]Feature{
1209 .avr5,
1210 }),
1211 };
1212 pub const atmega6450p = Cpu{
1213 .name = "atmega6450p",
1214 .llvm_name = "atmega6450p",
1215 .features = featureSet(&[_]Feature{
1216 .avr5,
1217 }),
1218 };
1219 pub const atmega645a = Cpu{
1220 .name = "atmega645a",
1221 .llvm_name = "atmega645a",
1222 .features = featureSet(&[_]Feature{
1223 .avr5,
1224 }),
1225 };
1226 pub const atmega645p = Cpu{
1227 .name = "atmega645p",
1228 .llvm_name = "atmega645p",
1229 .features = featureSet(&[_]Feature{
1230 .avr5,
1231 }),
1232 };
1233 pub const atmega649 = Cpu{
1234 .name = "atmega649",
1235 .llvm_name = "atmega649",
1236 .features = featureSet(&[_]Feature{
1237 .avr5,
1238 }),
1239 };
1240 pub const atmega6490 = Cpu{
1241 .name = "atmega6490",
1242 .llvm_name = "atmega6490",
1243 .features = featureSet(&[_]Feature{
1244 .avr5,
1245 }),
1246 };
1247 pub const atmega6490a = Cpu{
1248 .name = "atmega6490a",
1249 .llvm_name = "atmega6490a",
1250 .features = featureSet(&[_]Feature{
1251 .avr5,
1252 }),
1253 };
1254 pub const atmega6490p = Cpu{
1255 .name = "atmega6490p",
1256 .llvm_name = "atmega6490p",
1257 .features = featureSet(&[_]Feature{
1258 .avr5,
1259 }),
1260 };
1261 pub const atmega649a = Cpu{
1262 .name = "atmega649a",
1263 .llvm_name = "atmega649a",
1264 .features = featureSet(&[_]Feature{
1265 .avr5,
1266 }),
1267 };
1268 pub const atmega649p = Cpu{
1269 .name = "atmega649p",
1270 .llvm_name = "atmega649p",
1271 .features = featureSet(&[_]Feature{
1272 .avr5,
1273 }),
1274 };
1275 pub const atmega64a = Cpu{
1276 .name = "atmega64a",
1277 .llvm_name = "atmega64a",
1278 .features = featureSet(&[_]Feature{
1279 .avr5,
1280 }),
1281 };
1282 pub const atmega64c1 = Cpu{
1283 .name = "atmega64c1",
1284 .llvm_name = "atmega64c1",
1285 .features = featureSet(&[_]Feature{
1286 .avr5,
1287 }),
1288 };
1289 pub const atmega64hve = Cpu{
1290 .name = "atmega64hve",
1291 .llvm_name = "atmega64hve",
1292 .features = featureSet(&[_]Feature{
1293 .avr5,
1294 }),
1295 };
1296 pub const atmega64m1 = Cpu{
1297 .name = "atmega64m1",
1298 .llvm_name = "atmega64m1",
1299 .features = featureSet(&[_]Feature{
1300 .avr5,
1301 }),
1302 };
1303 pub const atmega64rfr2 = Cpu{
1304 .name = "atmega64rfr2",
1305 .llvm_name = "atmega64rfr2",
1306 .features = featureSet(&[_]Feature{
1307 .avr5,
1308 }),
1309 };
1310 pub const atmega8 = Cpu{
1311 .name = "atmega8",
1312 .llvm_name = "atmega8",
1313 .features = featureSet(&[_]Feature{
1314 .avr4,
1315 }),
1316 };
1317 pub const atmega8515 = Cpu{
1318 .name = "atmega8515",
1319 .llvm_name = "atmega8515",
1320 .features = featureSet(&[_]Feature{
1321 .avr2,
1322 .lpmx,
1323 .movw,
1324 .mul,
1325 .spm,
1326 }),
1327 };
1328 pub const atmega8535 = Cpu{
1329 .name = "atmega8535",
1330 .llvm_name = "atmega8535",
1331 .features = featureSet(&[_]Feature{
1332 .avr2,
1333 .lpmx,
1334 .movw,
1335 .mul,
1336 .spm,
1337 }),
1338 };
1339 pub const atmega88 = Cpu{
1340 .name = "atmega88",
1341 .llvm_name = "atmega88",
1342 .features = featureSet(&[_]Feature{
1343 .avr4,
1344 }),
1345 };
1346 pub const atmega88a = Cpu{
1347 .name = "atmega88a",
1348 .llvm_name = "atmega88a",
1349 .features = featureSet(&[_]Feature{
1350 .avr4,
1351 }),
1352 };
1353 pub const atmega88p = Cpu{
1354 .name = "atmega88p",
1355 .llvm_name = "atmega88p",
1356 .features = featureSet(&[_]Feature{
1357 .avr4,
1358 }),
1359 };
1360 pub const atmega88pa = Cpu{
1361 .name = "atmega88pa",
1362 .llvm_name = "atmega88pa",
1363 .features = featureSet(&[_]Feature{
1364 .avr4,
1365 }),
1366 };
1367 pub const atmega8a = Cpu{
1368 .name = "atmega8a",
1369 .llvm_name = "atmega8a",
1370 .features = featureSet(&[_]Feature{
1371 .avr4,
1372 }),
1373 };
1374 pub const atmega8hva = Cpu{
1375 .name = "atmega8hva",
1376 .llvm_name = "atmega8hva",
1377 .features = featureSet(&[_]Feature{
1378 .avr4,
1379 }),
1380 };
1381 pub const atmega8u2 = Cpu{
1382 .name = "atmega8u2",
1383 .llvm_name = "atmega8u2",
1384 .features = featureSet(&[_]Feature{
1385 .avr35,
1386 }),
1387 };
1388 pub const attiny10 = Cpu{
1389 .name = "attiny10",
1390 .llvm_name = "attiny10",
1391 .features = featureSet(&[_]Feature{
1392 .avrtiny,
1393 }),
1394 };
1395 pub const attiny102 = Cpu{
1396 .name = "attiny102",
1397 .llvm_name = "attiny102",
1398 .features = featureSet(&[_]Feature{
1399 .avrtiny,
1400 }),
1401 };
1402 pub const attiny104 = Cpu{
1403 .name = "attiny104",
1404 .llvm_name = "attiny104",
1405 .features = featureSet(&[_]Feature{
1406 .avrtiny,
1407 }),
1408 };
1409 pub const attiny11 = Cpu{
1410 .name = "attiny11",
1411 .llvm_name = "attiny11",
1412 .features = featureSet(&[_]Feature{
1413 .avr1,
1414 }),
1415 };
1416 pub const attiny12 = Cpu{
1417 .name = "attiny12",
1418 .llvm_name = "attiny12",
1419 .features = featureSet(&[_]Feature{
1420 .avr1,
1421 }),
1422 };
1423 pub const attiny13 = Cpu{
1424 .name = "attiny13",
1425 .llvm_name = "attiny13",
1426 .features = featureSet(&[_]Feature{
1427 .avr25,
1428 }),
1429 };
1430 pub const attiny13a = Cpu{
1431 .name = "attiny13a",
1432 .llvm_name = "attiny13a",
1433 .features = featureSet(&[_]Feature{
1434 .avr25,
1435 }),
1436 };
1437 pub const attiny15 = Cpu{
1438 .name = "attiny15",
1439 .llvm_name = "attiny15",
1440 .features = featureSet(&[_]Feature{
1441 .avr1,
1442 }),
1443 };
1444 pub const attiny1634 = Cpu{
1445 .name = "attiny1634",
1446 .llvm_name = "attiny1634",
1447 .features = featureSet(&[_]Feature{
1448 .avr35,
1449 }),
1450 };
1451 pub const attiny167 = Cpu{
1452 .name = "attiny167",
1453 .llvm_name = "attiny167",
1454 .features = featureSet(&[_]Feature{
1455 .avr35,
1456 }),
1457 };
1458 pub const attiny20 = Cpu{
1459 .name = "attiny20",
1460 .llvm_name = "attiny20",
1461 .features = featureSet(&[_]Feature{
1462 .avrtiny,
1463 }),
1464 };
1465 pub const attiny22 = Cpu{
1466 .name = "attiny22",
1467 .llvm_name = "attiny22",
1468 .features = featureSet(&[_]Feature{
1469 .avr2,
1470 }),
1471 };
1472 pub const attiny2313 = Cpu{
1473 .name = "attiny2313",
1474 .llvm_name = "attiny2313",
1475 .features = featureSet(&[_]Feature{
1476 .avr25,
1477 }),
1478 };
1479 pub const attiny2313a = Cpu{
1480 .name = "attiny2313a",
1481 .llvm_name = "attiny2313a",
1482 .features = featureSet(&[_]Feature{
1483 .avr25,
1484 }),
1485 };
1486 pub const attiny24 = Cpu{
1487 .name = "attiny24",
1488 .llvm_name = "attiny24",
1489 .features = featureSet(&[_]Feature{
1490 .avr25,
1491 }),
1492 };
1493 pub const attiny24a = Cpu{
1494 .name = "attiny24a",
1495 .llvm_name = "attiny24a",
1496 .features = featureSet(&[_]Feature{
1497 .avr25,
1498 }),
1499 };
1500 pub const attiny25 = Cpu{
1501 .name = "attiny25",
1502 .llvm_name = "attiny25",
1503 .features = featureSet(&[_]Feature{
1504 .avr25,
1505 }),
1506 };
1507 pub const attiny26 = Cpu{
1508 .name = "attiny26",
1509 .llvm_name = "attiny26",
1510 .features = featureSet(&[_]Feature{
1511 .avr2,
1512 .lpmx,
1513 }),
1514 };
1515 pub const attiny261 = Cpu{
1516 .name = "attiny261",
1517 .llvm_name = "attiny261",
1518 .features = featureSet(&[_]Feature{
1519 .avr25,
1520 }),
1521 };
1522 pub const attiny261a = Cpu{
1523 .name = "attiny261a",
1524 .llvm_name = "attiny261a",
1525 .features = featureSet(&[_]Feature{
1526 .avr25,
1527 }),
1528 };
1529 pub const attiny28 = Cpu{
1530 .name = "attiny28",
1531 .llvm_name = "attiny28",
1532 .features = featureSet(&[_]Feature{
1533 .avr1,
1534 }),
1535 };
1536 pub const attiny4 = Cpu{
1537 .name = "attiny4",
1538 .llvm_name = "attiny4",
1539 .features = featureSet(&[_]Feature{
1540 .avrtiny,
1541 }),
1542 };
1543 pub const attiny40 = Cpu{
1544 .name = "attiny40",
1545 .llvm_name = "attiny40",
1546 .features = featureSet(&[_]Feature{
1547 .avrtiny,
1548 }),
1549 };
1550 pub const attiny4313 = Cpu{
1551 .name = "attiny4313",
1552 .llvm_name = "attiny4313",
1553 .features = featureSet(&[_]Feature{
1554 .avr25,
1555 }),
1556 };
1557 pub const attiny43u = Cpu{
1558 .name = "attiny43u",
1559 .llvm_name = "attiny43u",
1560 .features = featureSet(&[_]Feature{
1561 .avr25,
1562 }),
1563 };
1564 pub const attiny44 = Cpu{
1565 .name = "attiny44",
1566 .llvm_name = "attiny44",
1567 .features = featureSet(&[_]Feature{
1568 .avr25,
1569 }),
1570 };
1571 pub const attiny44a = Cpu{
1572 .name = "attiny44a",
1573 .llvm_name = "attiny44a",
1574 .features = featureSet(&[_]Feature{
1575 .avr25,
1576 }),
1577 };
1578 pub const attiny45 = Cpu{
1579 .name = "attiny45",
1580 .llvm_name = "attiny45",
1581 .features = featureSet(&[_]Feature{
1582 .avr25,
1583 }),
1584 };
1585 pub const attiny461 = Cpu{
1586 .name = "attiny461",
1587 .llvm_name = "attiny461",
1588 .features = featureSet(&[_]Feature{
1589 .avr25,
1590 }),
1591 };
1592 pub const attiny461a = Cpu{
1593 .name = "attiny461a",
1594 .llvm_name = "attiny461a",
1595 .features = featureSet(&[_]Feature{
1596 .avr25,
1597 }),
1598 };
1599 pub const attiny48 = Cpu{
1600 .name = "attiny48",
1601 .llvm_name = "attiny48",
1602 .features = featureSet(&[_]Feature{
1603 .avr25,
1604 }),
1605 };
1606 pub const attiny5 = Cpu{
1607 .name = "attiny5",
1608 .llvm_name = "attiny5",
1609 .features = featureSet(&[_]Feature{
1610 .avrtiny,
1611 }),
1612 };
1613 pub const attiny828 = Cpu{
1614 .name = "attiny828",
1615 .llvm_name = "attiny828",
1616 .features = featureSet(&[_]Feature{
1617 .avr25,
1618 }),
1619 };
1620 pub const attiny84 = Cpu{
1621 .name = "attiny84",
1622 .llvm_name = "attiny84",
1623 .features = featureSet(&[_]Feature{
1624 .avr25,
1625 }),
1626 };
1627 pub const attiny84a = Cpu{
1628 .name = "attiny84a",
1629 .llvm_name = "attiny84a",
1630 .features = featureSet(&[_]Feature{
1631 .avr25,
1632 }),
1633 };
1634 pub const attiny85 = Cpu{
1635 .name = "attiny85",
1636 .llvm_name = "attiny85",
1637 .features = featureSet(&[_]Feature{
1638 .avr25,
1639 }),
1640 };
1641 pub const attiny861 = Cpu{
1642 .name = "attiny861",
1643 .llvm_name = "attiny861",
1644 .features = featureSet(&[_]Feature{
1645 .avr25,
1646 }),
1647 };
1648 pub const attiny861a = Cpu{
1649 .name = "attiny861a",
1650 .llvm_name = "attiny861a",
1651 .features = featureSet(&[_]Feature{
1652 .avr25,
1653 }),
1654 };
1655 pub const attiny87 = Cpu{
1656 .name = "attiny87",
1657 .llvm_name = "attiny87",
1658 .features = featureSet(&[_]Feature{
1659 .avr25,
1660 }),
1661 };
1662 pub const attiny88 = Cpu{
1663 .name = "attiny88",
1664 .llvm_name = "attiny88",
1665 .features = featureSet(&[_]Feature{
1666 .avr25,
1667 }),
1668 };
1669 pub const attiny9 = Cpu{
1670 .name = "attiny9",
1671 .llvm_name = "attiny9",
1672 .features = featureSet(&[_]Feature{
1673 .avrtiny,
1674 }),
1675 };
1676 pub const atxmega128a1 = Cpu{
1677 .name = "atxmega128a1",
1678 .llvm_name = "atxmega128a1",
1679 .features = featureSet(&[_]Feature{
1680 .xmega,
1681 }),
1682 };
1683 pub const atxmega128a1u = Cpu{
1684 .name = "atxmega128a1u",
1685 .llvm_name = "atxmega128a1u",
1686 .features = featureSet(&[_]Feature{
1687 .xmegau,
1688 }),
1689 };
1690 pub const atxmega128a3 = Cpu{
1691 .name = "atxmega128a3",
1692 .llvm_name = "atxmega128a3",
1693 .features = featureSet(&[_]Feature{
1694 .xmega,
1695 }),
1696 };
1697 pub const atxmega128a3u = Cpu{
1698 .name = "atxmega128a3u",
1699 .llvm_name = "atxmega128a3u",
1700 .features = featureSet(&[_]Feature{
1701 .xmegau,
1702 }),
1703 };
1704 pub const atxmega128a4u = Cpu{
1705 .name = "atxmega128a4u",
1706 .llvm_name = "atxmega128a4u",
1707 .features = featureSet(&[_]Feature{
1708 .xmegau,
1709 }),
1710 };
1711 pub const atxmega128b1 = Cpu{
1712 .name = "atxmega128b1",
1713 .llvm_name = "atxmega128b1",
1714 .features = featureSet(&[_]Feature{
1715 .xmegau,
1716 }),
1717 };
1718 pub const atxmega128b3 = Cpu{
1719 .name = "atxmega128b3",
1720 .llvm_name = "atxmega128b3",
1721 .features = featureSet(&[_]Feature{
1722 .xmegau,
1723 }),
1724 };
1725 pub const atxmega128c3 = Cpu{
1726 .name = "atxmega128c3",
1727 .llvm_name = "atxmega128c3",
1728 .features = featureSet(&[_]Feature{
1729 .xmegau,
1730 }),
1731 };
1732 pub const atxmega128d3 = Cpu{
1733 .name = "atxmega128d3",
1734 .llvm_name = "atxmega128d3",
1735 .features = featureSet(&[_]Feature{
1736 .xmega,
1737 }),
1738 };
1739 pub const atxmega128d4 = Cpu{
1740 .name = "atxmega128d4",
1741 .llvm_name = "atxmega128d4",
1742 .features = featureSet(&[_]Feature{
1743 .xmega,
1744 }),
1745 };
1746 pub const atxmega16a4 = Cpu{
1747 .name = "atxmega16a4",
1748 .llvm_name = "atxmega16a4",
1749 .features = featureSet(&[_]Feature{
1750 .xmega,
1751 }),
1752 };
1753 pub const atxmega16a4u = Cpu{
1754 .name = "atxmega16a4u",
1755 .llvm_name = "atxmega16a4u",
1756 .features = featureSet(&[_]Feature{
1757 .xmegau,
1758 }),
1759 };
1760 pub const atxmega16c4 = Cpu{
1761 .name = "atxmega16c4",
1762 .llvm_name = "atxmega16c4",
1763 .features = featureSet(&[_]Feature{
1764 .xmegau,
1765 }),
1766 };
1767 pub const atxmega16d4 = Cpu{
1768 .name = "atxmega16d4",
1769 .llvm_name = "atxmega16d4",
1770 .features = featureSet(&[_]Feature{
1771 .xmega,
1772 }),
1773 };
1774 pub const atxmega16e5 = Cpu{
1775 .name = "atxmega16e5",
1776 .llvm_name = "atxmega16e5",
1777 .features = featureSet(&[_]Feature{
1778 .xmega,
1779 }),
1780 };
1781 pub const atxmega192a3 = Cpu{
1782 .name = "atxmega192a3",
1783 .llvm_name = "atxmega192a3",
1784 .features = featureSet(&[_]Feature{
1785 .xmega,
1786 }),
1787 };
1788 pub const atxmega192a3u = Cpu{
1789 .name = "atxmega192a3u",
1790 .llvm_name = "atxmega192a3u",
1791 .features = featureSet(&[_]Feature{
1792 .xmegau,
1793 }),
1794 };
1795 pub const atxmega192c3 = Cpu{
1796 .name = "atxmega192c3",
1797 .llvm_name = "atxmega192c3",
1798 .features = featureSet(&[_]Feature{
1799 .xmegau,
1800 }),
1801 };
1802 pub const atxmega192d3 = Cpu{
1803 .name = "atxmega192d3",
1804 .llvm_name = "atxmega192d3",
1805 .features = featureSet(&[_]Feature{
1806 .xmega,
1807 }),
1808 };
1809 pub const atxmega256a3 = Cpu{
1810 .name = "atxmega256a3",
1811 .llvm_name = "atxmega256a3",
1812 .features = featureSet(&[_]Feature{
1813 .xmega,
1814 }),
1815 };
1816 pub const atxmega256a3b = Cpu{
1817 .name = "atxmega256a3b",
1818 .llvm_name = "atxmega256a3b",
1819 .features = featureSet(&[_]Feature{
1820 .xmega,
1821 }),
1822 };
1823 pub const atxmega256a3bu = Cpu{
1824 .name = "atxmega256a3bu",
1825 .llvm_name = "atxmega256a3bu",
1826 .features = featureSet(&[_]Feature{
1827 .xmegau,
1828 }),
1829 };
1830 pub const atxmega256a3u = Cpu{
1831 .name = "atxmega256a3u",
1832 .llvm_name = "atxmega256a3u",
1833 .features = featureSet(&[_]Feature{
1834 .xmegau,
1835 }),
1836 };
1837 pub const atxmega256c3 = Cpu{
1838 .name = "atxmega256c3",
1839 .llvm_name = "atxmega256c3",
1840 .features = featureSet(&[_]Feature{
1841 .xmegau,
1842 }),
1843 };
1844 pub const atxmega256d3 = Cpu{
1845 .name = "atxmega256d3",
1846 .llvm_name = "atxmega256d3",
1847 .features = featureSet(&[_]Feature{
1848 .xmega,
1849 }),
1850 };
1851 pub const atxmega32a4 = Cpu{
1852 .name = "atxmega32a4",
1853 .llvm_name = "atxmega32a4",
1854 .features = featureSet(&[_]Feature{
1855 .xmega,
1856 }),
1857 };
1858 pub const atxmega32a4u = Cpu{
1859 .name = "atxmega32a4u",
1860 .llvm_name = "atxmega32a4u",
1861 .features = featureSet(&[_]Feature{
1862 .xmegau,
1863 }),
1864 };
1865 pub const atxmega32c4 = Cpu{
1866 .name = "atxmega32c4",
1867 .llvm_name = "atxmega32c4",
1868 .features = featureSet(&[_]Feature{
1869 .xmegau,
1870 }),
1871 };
1872 pub const atxmega32d4 = Cpu{
1873 .name = "atxmega32d4",
1874 .llvm_name = "atxmega32d4",
1875 .features = featureSet(&[_]Feature{
1876 .xmega,
1877 }),
1878 };
1879 pub const atxmega32e5 = Cpu{
1880 .name = "atxmega32e5",
1881 .llvm_name = "atxmega32e5",
1882 .features = featureSet(&[_]Feature{
1883 .xmega,
1884 }),
1885 };
1886 pub const atxmega32x1 = Cpu{
1887 .name = "atxmega32x1",
1888 .llvm_name = "atxmega32x1",
1889 .features = featureSet(&[_]Feature{
1890 .xmega,
1891 }),
1892 };
1893 pub const atxmega384c3 = Cpu{
1894 .name = "atxmega384c3",
1895 .llvm_name = "atxmega384c3",
1896 .features = featureSet(&[_]Feature{
1897 .xmegau,
1898 }),
1899 };
1900 pub const atxmega384d3 = Cpu{
1901 .name = "atxmega384d3",
1902 .llvm_name = "atxmega384d3",
1903 .features = featureSet(&[_]Feature{
1904 .xmega,
1905 }),
1906 };
1907 pub const atxmega64a1 = Cpu{
1908 .name = "atxmega64a1",
1909 .llvm_name = "atxmega64a1",
1910 .features = featureSet(&[_]Feature{
1911 .xmega,
1912 }),
1913 };
1914 pub const atxmega64a1u = Cpu{
1915 .name = "atxmega64a1u",
1916 .llvm_name = "atxmega64a1u",
1917 .features = featureSet(&[_]Feature{
1918 .xmegau,
1919 }),
1920 };
1921 pub const atxmega64a3 = Cpu{
1922 .name = "atxmega64a3",
1923 .llvm_name = "atxmega64a3",
1924 .features = featureSet(&[_]Feature{
1925 .xmega,
1926 }),
1927 };
1928 pub const atxmega64a3u = Cpu{
1929 .name = "atxmega64a3u",
1930 .llvm_name = "atxmega64a3u",
1931 .features = featureSet(&[_]Feature{
1932 .xmegau,
1933 }),
1934 };
1935 pub const atxmega64a4u = Cpu{
1936 .name = "atxmega64a4u",
1937 .llvm_name = "atxmega64a4u",
1938 .features = featureSet(&[_]Feature{
1939 .xmegau,
1940 }),
1941 };
1942 pub const atxmega64b1 = Cpu{
1943 .name = "atxmega64b1",
1944 .llvm_name = "atxmega64b1",
1945 .features = featureSet(&[_]Feature{
1946 .xmegau,
1947 }),
1948 };
1949 pub const atxmega64b3 = Cpu{
1950 .name = "atxmega64b3",
1951 .llvm_name = "atxmega64b3",
1952 .features = featureSet(&[_]Feature{
1953 .xmegau,
1954 }),
1955 };
1956 pub const atxmega64c3 = Cpu{
1957 .name = "atxmega64c3",
1958 .llvm_name = "atxmega64c3",
1959 .features = featureSet(&[_]Feature{
1960 .xmegau,
1961 }),
1962 };
1963 pub const atxmega64d3 = Cpu{
1964 .name = "atxmega64d3",
1965 .llvm_name = "atxmega64d3",
1966 .features = featureSet(&[_]Feature{
1967 .xmega,
1968 }),
1969 };
1970 pub const atxmega64d4 = Cpu{
1971 .name = "atxmega64d4",
1972 .llvm_name = "atxmega64d4",
1973 .features = featureSet(&[_]Feature{
1974 .xmega,
1975 }),
1976 };
1977 pub const atxmega8e5 = Cpu{
1978 .name = "atxmega8e5",
1979 .llvm_name = "atxmega8e5",
1980 .features = featureSet(&[_]Feature{
1981 .xmega,
1982 }),
1983 };
1984 pub const avr1 = Cpu{
1985 .name = "avr1",
1986 .llvm_name = "avr1",
1987 .features = featureSet(&[_]Feature{
1988 .avr1,
1989 }),
1990 };
1991 pub const avr2 = Cpu{
1992 .name = "avr2",
1993 .llvm_name = "avr2",
1994 .features = featureSet(&[_]Feature{
1995 .avr2,
1996 }),
1997 };
1998 pub const avr25 = Cpu{
1999 .name = "avr25",
2000 .llvm_name = "avr25",
2001 .features = featureSet(&[_]Feature{
2002 .avr25,
2003 }),
2004 };
2005 pub const avr3 = Cpu{
2006 .name = "avr3",
2007 .llvm_name = "avr3",
2008 .features = featureSet(&[_]Feature{
2009 .avr3,
2010 }),
2011 };
2012 pub const avr31 = Cpu{
2013 .name = "avr31",
2014 .llvm_name = "avr31",
2015 .features = featureSet(&[_]Feature{
2016 .avr31,
2017 }),
2018 };
2019 pub const avr35 = Cpu{
2020 .name = "avr35",
2021 .llvm_name = "avr35",
2022 .features = featureSet(&[_]Feature{
2023 .avr35,
2024 }),
2025 };
2026 pub const avr4 = Cpu{
2027 .name = "avr4",
2028 .llvm_name = "avr4",
2029 .features = featureSet(&[_]Feature{
2030 .avr4,
2031 }),
2032 };
2033 pub const avr5 = Cpu{
2034 .name = "avr5",
2035 .llvm_name = "avr5",
2036 .features = featureSet(&[_]Feature{
2037 .avr5,
2038 }),
2039 };
2040 pub const avr51 = Cpu{
2041 .name = "avr51",
2042 .llvm_name = "avr51",
2043 .features = featureSet(&[_]Feature{
2044 .avr51,
2045 }),
2046 };
2047 pub const avr6 = Cpu{
2048 .name = "avr6",
2049 .llvm_name = "avr6",
2050 .features = featureSet(&[_]Feature{
2051 .avr6,
2052 }),
2053 };
2054 pub const avrtiny = Cpu{
2055 .name = "avrtiny",
2056 .llvm_name = "avrtiny",
2057 .features = featureSet(&[_]Feature{
2058 .avrtiny,
2059 }),
2060 };
2061 pub const avrxmega1 = Cpu{
2062 .name = "avrxmega1",
2063 .llvm_name = "avrxmega1",
2064 .features = featureSet(&[_]Feature{
2065 .xmega,
2066 }),
2067 };
2068 pub const avrxmega2 = Cpu{
2069 .name = "avrxmega2",
2070 .llvm_name = "avrxmega2",
2071 .features = featureSet(&[_]Feature{
2072 .xmega,
2073 }),
2074 };
2075 pub const avrxmega3 = Cpu{
2076 .name = "avrxmega3",
2077 .llvm_name = "avrxmega3",
2078 .features = featureSet(&[_]Feature{
2079 .xmega,
2080 }),
2081 };
2082 pub const avrxmega4 = Cpu{
2083 .name = "avrxmega4",
2084 .llvm_name = "avrxmega4",
2085 .features = featureSet(&[_]Feature{
2086 .xmega,
2087 }),
2088 };
2089 pub const avrxmega5 = Cpu{
2090 .name = "avrxmega5",
2091 .llvm_name = "avrxmega5",
2092 .features = featureSet(&[_]Feature{
2093 .xmega,
2094 }),
2095 };
2096 pub const avrxmega6 = Cpu{
2097 .name = "avrxmega6",
2098 .llvm_name = "avrxmega6",
2099 .features = featureSet(&[_]Feature{
2100 .xmega,
2101 }),
2102 };
2103 pub const avrxmega7 = Cpu{
2104 .name = "avrxmega7",
2105 .llvm_name = "avrxmega7",
2106 .features = featureSet(&[_]Feature{
2107 .xmega,
2108 }),
2109 };
2110 pub const m3000 = Cpu{
2111 .name = "m3000",
2112 .llvm_name = "m3000",
2113 .features = featureSet(&[_]Feature{
2114 .avr5,
2115 }),
2116 };
2117};
2118
2119/// All avr CPUs, sorted alphabetically by name.
2120/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
2121/// compiler has inefficient memory and CPU usage, affecting build times.
2122pub const all_cpus = &[_]*const Cpu{
2123 &cpu.at43usb320,
2124 &cpu.at43usb355,
2125 &cpu.at76c711,
2126 &cpu.at86rf401,
2127 &cpu.at90c8534,
2128 &cpu.at90can128,
2129 &cpu.at90can32,
2130 &cpu.at90can64,
2131 &cpu.at90pwm1,
2132 &cpu.at90pwm161,
2133 &cpu.at90pwm2,
2134 &cpu.at90pwm216,
2135 &cpu.at90pwm2b,
2136 &cpu.at90pwm3,
2137 &cpu.at90pwm316,
2138 &cpu.at90pwm3b,
2139 &cpu.at90pwm81,
2140 &cpu.at90s1200,
2141 &cpu.at90s2313,
2142 &cpu.at90s2323,
2143 &cpu.at90s2333,
2144 &cpu.at90s2343,
2145 &cpu.at90s4414,
2146 &cpu.at90s4433,
2147 &cpu.at90s4434,
2148 &cpu.at90s8515,
2149 &cpu.at90s8535,
2150 &cpu.at90scr100,
2151 &cpu.at90usb1286,
2152 &cpu.at90usb1287,
2153 &cpu.at90usb162,
2154 &cpu.at90usb646,
2155 &cpu.at90usb647,
2156 &cpu.at90usb82,
2157 &cpu.at94k,
2158 &cpu.ata5272,
2159 &cpu.ata5505,
2160 &cpu.ata5790,
2161 &cpu.ata5795,
2162 &cpu.ata6285,
2163 &cpu.ata6286,
2164 &cpu.ata6289,
2165 &cpu.atmega103,
2166 &cpu.atmega128,
2167 &cpu.atmega1280,
2168 &cpu.atmega1281,
2169 &cpu.atmega1284,
2170 &cpu.atmega1284p,
2171 &cpu.atmega1284rfr2,
2172 &cpu.atmega128a,
2173 &cpu.atmega128rfa1,
2174 &cpu.atmega128rfr2,
2175 &cpu.atmega16,
2176 &cpu.atmega161,
2177 &cpu.atmega162,
2178 &cpu.atmega163,
2179 &cpu.atmega164a,
2180 &cpu.atmega164p,
2181 &cpu.atmega164pa,
2182 &cpu.atmega165,
2183 &cpu.atmega165a,
2184 &cpu.atmega165p,
2185 &cpu.atmega165pa,
2186 &cpu.atmega168,
2187 &cpu.atmega168a,
2188 &cpu.atmega168p,
2189 &cpu.atmega168pa,
2190 &cpu.atmega169,
2191 &cpu.atmega169a,
2192 &cpu.atmega169p,
2193 &cpu.atmega169pa,
2194 &cpu.atmega16a,
2195 &cpu.atmega16hva,
2196 &cpu.atmega16hva2,
2197 &cpu.atmega16hvb,
2198 &cpu.atmega16hvbrevb,
2199 &cpu.atmega16m1,
2200 &cpu.atmega16u2,
2201 &cpu.atmega16u4,
2202 &cpu.atmega2560,
2203 &cpu.atmega2561,
2204 &cpu.atmega2564rfr2,
2205 &cpu.atmega256rfr2,
2206 &cpu.atmega32,
2207 &cpu.atmega323,
2208 &cpu.atmega324a,
2209 &cpu.atmega324p,
2210 &cpu.atmega324pa,
2211 &cpu.atmega325,
2212 &cpu.atmega3250,
2213 &cpu.atmega3250a,
2214 &cpu.atmega3250p,
2215 &cpu.atmega3250pa,
2216 &cpu.atmega325a,
2217 &cpu.atmega325p,
2218 &cpu.atmega325pa,
2219 &cpu.atmega328,
2220 &cpu.atmega328p,
2221 &cpu.atmega329,
2222 &cpu.atmega3290,
2223 &cpu.atmega3290a,
2224 &cpu.atmega3290p,
2225 &cpu.atmega3290pa,
2226 &cpu.atmega329a,
2227 &cpu.atmega329p,
2228 &cpu.atmega329pa,
2229 &cpu.atmega32a,
2230 &cpu.atmega32c1,
2231 &cpu.atmega32hvb,
2232 &cpu.atmega32hvbrevb,
2233 &cpu.atmega32m1,
2234 &cpu.atmega32u2,
2235 &cpu.atmega32u4,
2236 &cpu.atmega32u6,
2237 &cpu.atmega406,
2238 &cpu.atmega48,
2239 &cpu.atmega48a,
2240 &cpu.atmega48p,
2241 &cpu.atmega48pa,
2242 &cpu.atmega64,
2243 &cpu.atmega640,
2244 &cpu.atmega644,
2245 &cpu.atmega644a,
2246 &cpu.atmega644p,
2247 &cpu.atmega644pa,
2248 &cpu.atmega644rfr2,
2249 &cpu.atmega645,
2250 &cpu.atmega6450,
2251 &cpu.atmega6450a,
2252 &cpu.atmega6450p,
2253 &cpu.atmega645a,
2254 &cpu.atmega645p,
2255 &cpu.atmega649,
2256 &cpu.atmega6490,
2257 &cpu.atmega6490a,
2258 &cpu.atmega6490p,
2259 &cpu.atmega649a,
2260 &cpu.atmega649p,
2261 &cpu.atmega64a,
2262 &cpu.atmega64c1,
2263 &cpu.atmega64hve,
2264 &cpu.atmega64m1,
2265 &cpu.atmega64rfr2,
2266 &cpu.atmega8,
2267 &cpu.atmega8515,
2268 &cpu.atmega8535,
2269 &cpu.atmega88,
2270 &cpu.atmega88a,
2271 &cpu.atmega88p,
2272 &cpu.atmega88pa,
2273 &cpu.atmega8a,
2274 &cpu.atmega8hva,
2275 &cpu.atmega8u2,
2276 &cpu.attiny10,
2277 &cpu.attiny102,
2278 &cpu.attiny104,
2279 &cpu.attiny11,
2280 &cpu.attiny12,
2281 &cpu.attiny13,
2282 &cpu.attiny13a,
2283 &cpu.attiny15,
2284 &cpu.attiny1634,
2285 &cpu.attiny167,
2286 &cpu.attiny20,
2287 &cpu.attiny22,
2288 &cpu.attiny2313,
2289 &cpu.attiny2313a,
2290 &cpu.attiny24,
2291 &cpu.attiny24a,
2292 &cpu.attiny25,
2293 &cpu.attiny26,
2294 &cpu.attiny261,
2295 &cpu.attiny261a,
2296 &cpu.attiny28,
2297 &cpu.attiny4,
2298 &cpu.attiny40,
2299 &cpu.attiny4313,
2300 &cpu.attiny43u,
2301 &cpu.attiny44,
2302 &cpu.attiny44a,
2303 &cpu.attiny45,
2304 &cpu.attiny461,
2305 &cpu.attiny461a,
2306 &cpu.attiny48,
2307 &cpu.attiny5,
2308 &cpu.attiny828,
2309 &cpu.attiny84,
2310 &cpu.attiny84a,
2311 &cpu.attiny85,
2312 &cpu.attiny861,
2313 &cpu.attiny861a,
2314 &cpu.attiny87,
2315 &cpu.attiny88,
2316 &cpu.attiny9,
2317 &cpu.atxmega128a1,
2318 &cpu.atxmega128a1u,
2319 &cpu.atxmega128a3,
2320 &cpu.atxmega128a3u,
2321 &cpu.atxmega128a4u,
2322 &cpu.atxmega128b1,
2323 &cpu.atxmega128b3,
2324 &cpu.atxmega128c3,
2325 &cpu.atxmega128d3,
2326 &cpu.atxmega128d4,
2327 &cpu.atxmega16a4,
2328 &cpu.atxmega16a4u,
2329 &cpu.atxmega16c4,
2330 &cpu.atxmega16d4,
2331 &cpu.atxmega16e5,
2332 &cpu.atxmega192a3,
2333 &cpu.atxmega192a3u,
2334 &cpu.atxmega192c3,
2335 &cpu.atxmega192d3,
2336 &cpu.atxmega256a3,
2337 &cpu.atxmega256a3b,
2338 &cpu.atxmega256a3bu,
2339 &cpu.atxmega256a3u,
2340 &cpu.atxmega256c3,
2341 &cpu.atxmega256d3,
2342 &cpu.atxmega32a4,
2343 &cpu.atxmega32a4u,
2344 &cpu.atxmega32c4,
2345 &cpu.atxmega32d4,
2346 &cpu.atxmega32e5,
2347 &cpu.atxmega32x1,
2348 &cpu.atxmega384c3,
2349 &cpu.atxmega384d3,
2350 &cpu.atxmega64a1,
2351 &cpu.atxmega64a1u,
2352 &cpu.atxmega64a3,
2353 &cpu.atxmega64a3u,
2354 &cpu.atxmega64a4u,
2355 &cpu.atxmega64b1,
2356 &cpu.atxmega64b3,
2357 &cpu.atxmega64c3,
2358 &cpu.atxmega64d3,
2359 &cpu.atxmega64d4,
2360 &cpu.atxmega8e5,
2361 &cpu.avr1,
2362 &cpu.avr2,
2363 &cpu.avr25,
2364 &cpu.avr3,
2365 &cpu.avr31,
2366 &cpu.avr35,
2367 &cpu.avr4,
2368 &cpu.avr5,
2369 &cpu.avr51,
2370 &cpu.avr6,
2371 &cpu.avrtiny,
2372 &cpu.avrxmega1,
2373 &cpu.avrxmega2,
2374 &cpu.avrxmega3,
2375 &cpu.avrxmega4,
2376 &cpu.avrxmega5,
2377 &cpu.avrxmega6,
2378 &cpu.avrxmega7,
2379 &cpu.m3000,
2380};
lib/std/target/bpf.zig created+76
......@@ -0,0 +1,76 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 alu32,
6 dummy,
7 dwarfris,
8};
9
10pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
11
12pub const all_features = blk: {
13 const len = @typeInfo(Feature).Enum.fields.len;
14 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
15 var result: [len]Cpu.Feature = undefined;
16 result[@enumToInt(Feature.alu32)] = .{
17 .llvm_name = "alu32",
18 .description = "Enable ALU32 instructions",
19 .dependencies = featureSet(&[_]Feature{}),
20 };
21 result[@enumToInt(Feature.dummy)] = .{
22 .llvm_name = "dummy",
23 .description = "unused feature",
24 .dependencies = featureSet(&[_]Feature{}),
25 };
26 result[@enumToInt(Feature.dwarfris)] = .{
27 .llvm_name = "dwarfris",
28 .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections",
29 .dependencies = featureSet(&[_]Feature{}),
30 };
31 const ti = @typeInfo(Feature);
32 for (result) |*elem, i| {
33 elem.index = i;
34 elem.name = ti.Enum.fields[i].name;
35 }
36 break :blk result;
37};
38
39pub const cpu = struct {
40 pub const generic = Cpu{
41 .name = "generic",
42 .llvm_name = "generic",
43 .features = featureSet(&[_]Feature{}),
44 };
45 pub const probe = Cpu{
46 .name = "probe",
47 .llvm_name = "probe",
48 .features = featureSet(&[_]Feature{}),
49 };
50 pub const v1 = Cpu{
51 .name = "v1",
52 .llvm_name = "v1",
53 .features = featureSet(&[_]Feature{}),
54 };
55 pub const v2 = Cpu{
56 .name = "v2",
57 .llvm_name = "v2",
58 .features = featureSet(&[_]Feature{}),
59 };
60 pub const v3 = Cpu{
61 .name = "v3",
62 .llvm_name = "v3",
63 .features = featureSet(&[_]Feature{}),
64 };
65};
66
67/// All bpf CPUs, sorted alphabetically by name.
68/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
69/// compiler has inefficient memory and CPU usage, affecting build times.
70pub const all_cpus = &[_]*const Cpu{
71 &cpu.generic,
72 &cpu.probe,
73 &cpu.v1,
74 &cpu.v2,
75 &cpu.v3,
76};
lib/std/target/hexagon.zig created+312
......@@ -0,0 +1,312 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 duplex,
6 hvx,
7 hvx_length128b,
8 hvx_length64b,
9 hvxv60,
10 hvxv62,
11 hvxv65,
12 hvxv66,
13 long_calls,
14 mem_noshuf,
15 memops,
16 noreturn_stack_elim,
17 nvj,
18 nvs,
19 packets,
20 reserved_r19,
21 small_data,
22 v5,
23 v55,
24 v60,
25 v62,
26 v65,
27 v66,
28 zreg,
29};
30
31pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
32
33pub const all_features = blk: {
34 const len = @typeInfo(Feature).Enum.fields.len;
35 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
36 var result: [len]Cpu.Feature = undefined;
37 result[@enumToInt(Feature.duplex)] = .{
38 .llvm_name = "duplex",
39 .description = "Enable generation of duplex instruction",
40 .dependencies = featureSet(&[_]Feature{}),
41 };
42 result[@enumToInt(Feature.hvx)] = .{
43 .llvm_name = "hvx",
44 .description = "Hexagon HVX instructions",
45 .dependencies = featureSet(&[_]Feature{}),
46 };
47 result[@enumToInt(Feature.hvx_length128b)] = .{
48 .llvm_name = "hvx-length128b",
49 .description = "Hexagon HVX 128B instructions",
50 .dependencies = featureSet(&[_]Feature{
51 .hvx,
52 }),
53 };
54 result[@enumToInt(Feature.hvx_length64b)] = .{
55 .llvm_name = "hvx-length64b",
56 .description = "Hexagon HVX 64B instructions",
57 .dependencies = featureSet(&[_]Feature{
58 .hvx,
59 }),
60 };
61 result[@enumToInt(Feature.hvxv60)] = .{
62 .llvm_name = "hvxv60",
63 .description = "Hexagon HVX instructions",
64 .dependencies = featureSet(&[_]Feature{
65 .hvx,
66 }),
67 };
68 result[@enumToInt(Feature.hvxv62)] = .{
69 .llvm_name = "hvxv62",
70 .description = "Hexagon HVX instructions",
71 .dependencies = featureSet(&[_]Feature{
72 .hvx,
73 .hvxv60,
74 }),
75 };
76 result[@enumToInt(Feature.hvxv65)] = .{
77 .llvm_name = "hvxv65",
78 .description = "Hexagon HVX instructions",
79 .dependencies = featureSet(&[_]Feature{
80 .hvx,
81 .hvxv60,
82 .hvxv62,
83 }),
84 };
85 result[@enumToInt(Feature.hvxv66)] = .{
86 .llvm_name = "hvxv66",
87 .description = "Hexagon HVX instructions",
88 .dependencies = featureSet(&[_]Feature{
89 .hvx,
90 .hvxv60,
91 .hvxv62,
92 .hvxv65,
93 .zreg,
94 }),
95 };
96 result[@enumToInt(Feature.long_calls)] = .{
97 .llvm_name = "long-calls",
98 .description = "Use constant-extended calls",
99 .dependencies = featureSet(&[_]Feature{}),
100 };
101 result[@enumToInt(Feature.mem_noshuf)] = .{
102 .llvm_name = "mem_noshuf",
103 .description = "Supports mem_noshuf feature",
104 .dependencies = featureSet(&[_]Feature{}),
105 };
106 result[@enumToInt(Feature.memops)] = .{
107 .llvm_name = "memops",
108 .description = "Use memop instructions",
109 .dependencies = featureSet(&[_]Feature{}),
110 };
111 result[@enumToInt(Feature.noreturn_stack_elim)] = .{
112 .llvm_name = "noreturn-stack-elim",
113 .description = "Eliminate stack allocation in a noreturn function when possible",
114 .dependencies = featureSet(&[_]Feature{}),
115 };
116 result[@enumToInt(Feature.nvj)] = .{
117 .llvm_name = "nvj",
118 .description = "Support for new-value jumps",
119 .dependencies = featureSet(&[_]Feature{
120 .packets,
121 }),
122 };
123 result[@enumToInt(Feature.nvs)] = .{
124 .llvm_name = "nvs",
125 .description = "Support for new-value stores",
126 .dependencies = featureSet(&[_]Feature{
127 .packets,
128 }),
129 };
130 result[@enumToInt(Feature.packets)] = .{
131 .llvm_name = "packets",
132 .description = "Support for instruction packets",
133 .dependencies = featureSet(&[_]Feature{}),
134 };
135 result[@enumToInt(Feature.reserved_r19)] = .{
136 .llvm_name = "reserved-r19",
137 .description = "Reserve register R19",
138 .dependencies = featureSet(&[_]Feature{}),
139 };
140 result[@enumToInt(Feature.small_data)] = .{
141 .llvm_name = "small-data",
142 .description = "Allow GP-relative addressing of global variables",
143 .dependencies = featureSet(&[_]Feature{}),
144 };
145 result[@enumToInt(Feature.v5)] = .{
146 .llvm_name = "v5",
147 .description = "Enable Hexagon V5 architecture",
148 .dependencies = featureSet(&[_]Feature{}),
149 };
150 result[@enumToInt(Feature.v55)] = .{
151 .llvm_name = "v55",
152 .description = "Enable Hexagon V55 architecture",
153 .dependencies = featureSet(&[_]Feature{}),
154 };
155 result[@enumToInt(Feature.v60)] = .{
156 .llvm_name = "v60",
157 .description = "Enable Hexagon V60 architecture",
158 .dependencies = featureSet(&[_]Feature{}),
159 };
160 result[@enumToInt(Feature.v62)] = .{
161 .llvm_name = "v62",
162 .description = "Enable Hexagon V62 architecture",
163 .dependencies = featureSet(&[_]Feature{}),
164 };
165 result[@enumToInt(Feature.v65)] = .{
166 .llvm_name = "v65",
167 .description = "Enable Hexagon V65 architecture",
168 .dependencies = featureSet(&[_]Feature{}),
169 };
170 result[@enumToInt(Feature.v66)] = .{
171 .llvm_name = "v66",
172 .description = "Enable Hexagon V66 architecture",
173 .dependencies = featureSet(&[_]Feature{}),
174 };
175 result[@enumToInt(Feature.zreg)] = .{
176 .llvm_name = "zreg",
177 .description = "Hexagon ZReg extension instructions",
178 .dependencies = featureSet(&[_]Feature{}),
179 };
180 const ti = @typeInfo(Feature);
181 for (result) |*elem, i| {
182 elem.index = i;
183 elem.name = ti.Enum.fields[i].name;
184 }
185 break :blk result;
186};
187
188pub const cpu = struct {
189 pub const generic = Cpu{
190 .name = "generic",
191 .llvm_name = "generic",
192 .features = featureSet(&[_]Feature{
193 .duplex,
194 .memops,
195 .nvj,
196 .nvs,
197 .packets,
198 .small_data,
199 .v5,
200 .v55,
201 .v60,
202 }),
203 };
204 pub const hexagonv5 = Cpu{
205 .name = "hexagonv5",
206 .llvm_name = "hexagonv5",
207 .features = featureSet(&[_]Feature{
208 .duplex,
209 .memops,
210 .nvj,
211 .nvs,
212 .packets,
213 .small_data,
214 .v5,
215 }),
216 };
217 pub const hexagonv55 = Cpu{
218 .name = "hexagonv55",
219 .llvm_name = "hexagonv55",
220 .features = featureSet(&[_]Feature{
221 .duplex,
222 .memops,
223 .nvj,
224 .nvs,
225 .packets,
226 .small_data,
227 .v5,
228 .v55,
229 }),
230 };
231 pub const hexagonv60 = Cpu{
232 .name = "hexagonv60",
233 .llvm_name = "hexagonv60",
234 .features = featureSet(&[_]Feature{
235 .duplex,
236 .memops,
237 .nvj,
238 .nvs,
239 .packets,
240 .small_data,
241 .v5,
242 .v55,
243 .v60,
244 }),
245 };
246 pub const hexagonv62 = Cpu{
247 .name = "hexagonv62",
248 .llvm_name = "hexagonv62",
249 .features = featureSet(&[_]Feature{
250 .duplex,
251 .memops,
252 .nvj,
253 .nvs,
254 .packets,
255 .small_data,
256 .v5,
257 .v55,
258 .v60,
259 .v62,
260 }),
261 };
262 pub const hexagonv65 = Cpu{
263 .name = "hexagonv65",
264 .llvm_name = "hexagonv65",
265 .features = featureSet(&[_]Feature{
266 .duplex,
267 .mem_noshuf,
268 .memops,
269 .nvj,
270 .nvs,
271 .packets,
272 .small_data,
273 .v5,
274 .v55,
275 .v60,
276 .v62,
277 .v65,
278 }),
279 };
280 pub const hexagonv66 = Cpu{
281 .name = "hexagonv66",
282 .llvm_name = "hexagonv66",
283 .features = featureSet(&[_]Feature{
284 .duplex,
285 .mem_noshuf,
286 .memops,
287 .nvj,
288 .nvs,
289 .packets,
290 .small_data,
291 .v5,
292 .v55,
293 .v60,
294 .v62,
295 .v65,
296 .v66,
297 }),
298 };
299};
300
301/// All hexagon CPUs, sorted alphabetically by name.
302/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
303/// compiler has inefficient memory and CPU usage, affecting build times.
304pub const all_cpus = &[_]*const Cpu{
305 &cpu.generic,
306 &cpu.hexagonv5,
307 &cpu.hexagonv55,
308 &cpu.hexagonv60,
309 &cpu.hexagonv62,
310 &cpu.hexagonv65,
311 &cpu.hexagonv66,
312};
lib/std/target/mips.zig created+518
......@@ -0,0 +1,518 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 abs2008,
6 cnmips,
7 crc,
8 dsp,
9 dspr2,
10 dspr3,
11 eva,
12 fp64,
13 fpxx,
14 ginv,
15 gp64,
16 long_calls,
17 micromips,
18 mips1,
19 mips16,
20 mips2,
21 mips3,
22 mips32,
23 mips32r2,
24 mips32r3,
25 mips32r5,
26 mips32r6,
27 mips3_32,
28 mips3_32r2,
29 mips4,
30 mips4_32,
31 mips4_32r2,
32 mips5,
33 mips5_32r2,
34 mips64,
35 mips64r2,
36 mips64r3,
37 mips64r5,
38 mips64r6,
39 msa,
40 mt,
41 nan2008,
42 noabicalls,
43 nomadd4,
44 nooddspreg,
45 p5600,
46 ptr64,
47 single_float,
48 soft_float,
49 sym32,
50 use_indirect_jump_hazard,
51 use_tcc_in_div,
52 vfpu,
53 virt,
54};
55
56pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
57
58pub const all_features = blk: {
59 const len = @typeInfo(Feature).Enum.fields.len;
60 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
61 var result: [len]Cpu.Feature = undefined;
62 result[@enumToInt(Feature.abs2008)] = .{
63 .llvm_name = "abs2008",
64 .description = "Disable IEEE 754-2008 abs.fmt mode",
65 .dependencies = featureSet(&[_]Feature{}),
66 };
67 result[@enumToInt(Feature.cnmips)] = .{
68 .llvm_name = "cnmips",
69 .description = "Octeon cnMIPS Support",
70 .dependencies = featureSet(&[_]Feature{
71 .mips64r2,
72 }),
73 };
74 result[@enumToInt(Feature.crc)] = .{
75 .llvm_name = "crc",
76 .description = "Mips R6 CRC ASE",
77 .dependencies = featureSet(&[_]Feature{}),
78 };
79 result[@enumToInt(Feature.dsp)] = .{
80 .llvm_name = "dsp",
81 .description = "Mips DSP ASE",
82 .dependencies = featureSet(&[_]Feature{}),
83 };
84 result[@enumToInt(Feature.dspr2)] = .{
85 .llvm_name = "dspr2",
86 .description = "Mips DSP-R2 ASE",
87 .dependencies = featureSet(&[_]Feature{
88 .dsp,
89 }),
90 };
91 result[@enumToInt(Feature.dspr3)] = .{
92 .llvm_name = "dspr3",
93 .description = "Mips DSP-R3 ASE",
94 .dependencies = featureSet(&[_]Feature{
95 .dsp,
96 .dspr2,
97 }),
98 };
99 result[@enumToInt(Feature.eva)] = .{
100 .llvm_name = "eva",
101 .description = "Mips EVA ASE",
102 .dependencies = featureSet(&[_]Feature{}),
103 };
104 result[@enumToInt(Feature.fp64)] = .{
105 .llvm_name = "fp64",
106 .description = "Support 64-bit FP registers",
107 .dependencies = featureSet(&[_]Feature{}),
108 };
109 result[@enumToInt(Feature.fpxx)] = .{
110 .llvm_name = "fpxx",
111 .description = "Support for FPXX",
112 .dependencies = featureSet(&[_]Feature{}),
113 };
114 result[@enumToInt(Feature.ginv)] = .{
115 .llvm_name = "ginv",
116 .description = "Mips Global Invalidate ASE",
117 .dependencies = featureSet(&[_]Feature{}),
118 };
119 result[@enumToInt(Feature.gp64)] = .{
120 .llvm_name = "gp64",
121 .description = "General Purpose Registers are 64-bit wide",
122 .dependencies = featureSet(&[_]Feature{}),
123 };
124 result[@enumToInt(Feature.long_calls)] = .{
125 .llvm_name = "long-calls",
126 .description = "Disable use of the jal instruction",
127 .dependencies = featureSet(&[_]Feature{}),
128 };
129 result[@enumToInt(Feature.micromips)] = .{
130 .llvm_name = "micromips",
131 .description = "microMips mode",
132 .dependencies = featureSet(&[_]Feature{}),
133 };
134 result[@enumToInt(Feature.mips1)] = .{
135 .llvm_name = "mips1",
136 .description = "Mips I ISA Support [highly experimental]",
137 .dependencies = featureSet(&[_]Feature{}),
138 };
139 result[@enumToInt(Feature.mips16)] = .{
140 .llvm_name = "mips16",
141 .description = "Mips16 mode",
142 .dependencies = featureSet(&[_]Feature{}),
143 };
144 result[@enumToInt(Feature.mips2)] = .{
145 .llvm_name = "mips2",
146 .description = "Mips II ISA Support [highly experimental]",
147 .dependencies = featureSet(&[_]Feature{
148 .mips1,
149 }),
150 };
151 result[@enumToInt(Feature.mips3)] = .{
152 .llvm_name = "mips3",
153 .description = "MIPS III ISA Support [highly experimental]",
154 .dependencies = featureSet(&[_]Feature{
155 .fp64,
156 .gp64,
157 .mips2,
158 .mips3_32,
159 .mips3_32r2,
160 }),
161 };
162 result[@enumToInt(Feature.mips32)] = .{
163 .llvm_name = "mips32",
164 .description = "Mips32 ISA Support",
165 .dependencies = featureSet(&[_]Feature{
166 .mips2,
167 .mips3_32,
168 .mips4_32,
169 }),
170 };
171 result[@enumToInt(Feature.mips32r2)] = .{
172 .llvm_name = "mips32r2",
173 .description = "Mips32r2 ISA Support",
174 .dependencies = featureSet(&[_]Feature{
175 .mips32,
176 .mips3_32r2,
177 .mips4_32r2,
178 .mips5_32r2,
179 }),
180 };
181 result[@enumToInt(Feature.mips32r3)] = .{
182 .llvm_name = "mips32r3",
183 .description = "Mips32r3 ISA Support",
184 .dependencies = featureSet(&[_]Feature{
185 .mips32r2,
186 }),
187 };
188 result[@enumToInt(Feature.mips32r5)] = .{
189 .llvm_name = "mips32r5",
190 .description = "Mips32r5 ISA Support",
191 .dependencies = featureSet(&[_]Feature{
192 .mips32r3,
193 }),
194 };
195 result[@enumToInt(Feature.mips32r6)] = .{
196 .llvm_name = "mips32r6",
197 .description = "Mips32r6 ISA Support [experimental]",
198 .dependencies = featureSet(&[_]Feature{
199 .abs2008,
200 .fp64,
201 .mips32r5,
202 .nan2008,
203 }),
204 };
205 result[@enumToInt(Feature.mips3_32)] = .{
206 .llvm_name = "mips3_32",
207 .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]",
208 .dependencies = featureSet(&[_]Feature{}),
209 };
210 result[@enumToInt(Feature.mips3_32r2)] = .{
211 .llvm_name = "mips3_32r2",
212 .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]",
213 .dependencies = featureSet(&[_]Feature{}),
214 };
215 result[@enumToInt(Feature.mips4)] = .{
216 .llvm_name = "mips4",
217 .description = "MIPS IV ISA Support",
218 .dependencies = featureSet(&[_]Feature{
219 .mips3,
220 .mips4_32,
221 .mips4_32r2,
222 }),
223 };
224 result[@enumToInt(Feature.mips4_32)] = .{
225 .llvm_name = "mips4_32",
226 .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]",
227 .dependencies = featureSet(&[_]Feature{}),
228 };
229 result[@enumToInt(Feature.mips4_32r2)] = .{
230 .llvm_name = "mips4_32r2",
231 .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]",
232 .dependencies = featureSet(&[_]Feature{}),
233 };
234 result[@enumToInt(Feature.mips5)] = .{
235 .llvm_name = "mips5",
236 .description = "MIPS V ISA Support [highly experimental]",
237 .dependencies = featureSet(&[_]Feature{
238 .mips4,
239 .mips5_32r2,
240 }),
241 };
242 result[@enumToInt(Feature.mips5_32r2)] = .{
243 .llvm_name = "mips5_32r2",
244 .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]",
245 .dependencies = featureSet(&[_]Feature{}),
246 };
247 result[@enumToInt(Feature.mips64)] = .{
248 .llvm_name = "mips64",
249 .description = "Mips64 ISA Support",
250 .dependencies = featureSet(&[_]Feature{
251 .mips32,
252 .mips5,
253 }),
254 };
255 result[@enumToInt(Feature.mips64r2)] = .{
256 .llvm_name = "mips64r2",
257 .description = "Mips64r2 ISA Support",
258 .dependencies = featureSet(&[_]Feature{
259 .mips32r2,
260 .mips64,
261 }),
262 };
263 result[@enumToInt(Feature.mips64r3)] = .{
264 .llvm_name = "mips64r3",
265 .description = "Mips64r3 ISA Support",
266 .dependencies = featureSet(&[_]Feature{
267 .mips32r3,
268 .mips64r2,
269 }),
270 };
271 result[@enumToInt(Feature.mips64r5)] = .{
272 .llvm_name = "mips64r5",
273 .description = "Mips64r5 ISA Support",
274 .dependencies = featureSet(&[_]Feature{
275 .mips32r5,
276 .mips64r3,
277 }),
278 };
279 result[@enumToInt(Feature.mips64r6)] = .{
280 .llvm_name = "mips64r6",
281 .description = "Mips64r6 ISA Support [experimental]",
282 .dependencies = featureSet(&[_]Feature{
283 .abs2008,
284 .mips32r6,
285 .mips64r5,
286 .nan2008,
287 }),
288 };
289 result[@enumToInt(Feature.msa)] = .{
290 .llvm_name = "msa",
291 .description = "Mips MSA ASE",
292 .dependencies = featureSet(&[_]Feature{}),
293 };
294 result[@enumToInt(Feature.mt)] = .{
295 .llvm_name = "mt",
296 .description = "Mips MT ASE",
297 .dependencies = featureSet(&[_]Feature{}),
298 };
299 result[@enumToInt(Feature.nan2008)] = .{
300 .llvm_name = "nan2008",
301 .description = "IEEE 754-2008 NaN encoding",
302 .dependencies = featureSet(&[_]Feature{}),
303 };
304 result[@enumToInt(Feature.noabicalls)] = .{
305 .llvm_name = "noabicalls",
306 .description = "Disable SVR4-style position-independent code",
307 .dependencies = featureSet(&[_]Feature{}),
308 };
309 result[@enumToInt(Feature.nomadd4)] = .{
310 .llvm_name = "nomadd4",
311 .description = "Disable 4-operand madd.fmt and related instructions",
312 .dependencies = featureSet(&[_]Feature{}),
313 };
314 result[@enumToInt(Feature.nooddspreg)] = .{
315 .llvm_name = "nooddspreg",
316 .description = "Disable odd numbered single-precision registers",
317 .dependencies = featureSet(&[_]Feature{}),
318 };
319 result[@enumToInt(Feature.p5600)] = .{
320 .llvm_name = "p5600",
321 .description = "The P5600 Processor",
322 .dependencies = featureSet(&[_]Feature{
323 .mips32r5,
324 }),
325 };
326 result[@enumToInt(Feature.ptr64)] = .{
327 .llvm_name = "ptr64",
328 .description = "Pointers are 64-bit wide",
329 .dependencies = featureSet(&[_]Feature{}),
330 };
331 result[@enumToInt(Feature.single_float)] = .{
332 .llvm_name = "single-float",
333 .description = "Only supports single precision float",
334 .dependencies = featureSet(&[_]Feature{}),
335 };
336 result[@enumToInt(Feature.soft_float)] = .{
337 .llvm_name = "soft-float",
338 .description = "Does not support floating point instructions",
339 .dependencies = featureSet(&[_]Feature{}),
340 };
341 result[@enumToInt(Feature.sym32)] = .{
342 .llvm_name = "sym32",
343 .description = "Symbols are 32 bit on Mips64",
344 .dependencies = featureSet(&[_]Feature{}),
345 };
346 result[@enumToInt(Feature.use_indirect_jump_hazard)] = .{
347 .llvm_name = "use-indirect-jump-hazard",
348 .description = "Use indirect jump guards to prevent certain speculation based attacks",
349 .dependencies = featureSet(&[_]Feature{}),
350 };
351 result[@enumToInt(Feature.use_tcc_in_div)] = .{
352 .llvm_name = "use-tcc-in-div",
353 .description = "Force the assembler to use trapping",
354 .dependencies = featureSet(&[_]Feature{}),
355 };
356 result[@enumToInt(Feature.vfpu)] = .{
357 .llvm_name = "vfpu",
358 .description = "Enable vector FPU instructions",
359 .dependencies = featureSet(&[_]Feature{}),
360 };
361 result[@enumToInt(Feature.virt)] = .{
362 .llvm_name = "virt",
363 .description = "Mips Virtualization ASE",
364 .dependencies = featureSet(&[_]Feature{}),
365 };
366 const ti = @typeInfo(Feature);
367 for (result) |*elem, i| {
368 elem.index = i;
369 elem.name = ti.Enum.fields[i].name;
370 }
371 break :blk result;
372};
373
374pub const cpu = struct {
375 pub const mips1 = Cpu{
376 .name = "mips1",
377 .llvm_name = "mips1",
378 .features = featureSet(&[_]Feature{
379 .mips1,
380 }),
381 };
382 pub const mips2 = Cpu{
383 .name = "mips2",
384 .llvm_name = "mips2",
385 .features = featureSet(&[_]Feature{
386 .mips2,
387 }),
388 };
389 pub const mips3 = Cpu{
390 .name = "mips3",
391 .llvm_name = "mips3",
392 .features = featureSet(&[_]Feature{
393 .mips3,
394 }),
395 };
396 pub const mips32 = Cpu{
397 .name = "mips32",
398 .llvm_name = "mips32",
399 .features = featureSet(&[_]Feature{
400 .mips32,
401 }),
402 };
403 pub const mips32r2 = Cpu{
404 .name = "mips32r2",
405 .llvm_name = "mips32r2",
406 .features = featureSet(&[_]Feature{
407 .mips32r2,
408 }),
409 };
410 pub const mips32r3 = Cpu{
411 .name = "mips32r3",
412 .llvm_name = "mips32r3",
413 .features = featureSet(&[_]Feature{
414 .mips32r3,
415 }),
416 };
417 pub const mips32r5 = Cpu{
418 .name = "mips32r5",
419 .llvm_name = "mips32r5",
420 .features = featureSet(&[_]Feature{
421 .mips32r5,
422 }),
423 };
424 pub const mips32r6 = Cpu{
425 .name = "mips32r6",
426 .llvm_name = "mips32r6",
427 .features = featureSet(&[_]Feature{
428 .mips32r6,
429 }),
430 };
431 pub const mips4 = Cpu{
432 .name = "mips4",
433 .llvm_name = "mips4",
434 .features = featureSet(&[_]Feature{
435 .mips4,
436 }),
437 };
438 pub const mips5 = Cpu{
439 .name = "mips5",
440 .llvm_name = "mips5",
441 .features = featureSet(&[_]Feature{
442 .mips5,
443 }),
444 };
445 pub const mips64 = Cpu{
446 .name = "mips64",
447 .llvm_name = "mips64",
448 .features = featureSet(&[_]Feature{
449 .mips64,
450 }),
451 };
452 pub const mips64r2 = Cpu{
453 .name = "mips64r2",
454 .llvm_name = "mips64r2",
455 .features = featureSet(&[_]Feature{
456 .mips64r2,
457 }),
458 };
459 pub const mips64r3 = Cpu{
460 .name = "mips64r3",
461 .llvm_name = "mips64r3",
462 .features = featureSet(&[_]Feature{
463 .mips64r3,
464 }),
465 };
466 pub const mips64r5 = Cpu{
467 .name = "mips64r5",
468 .llvm_name = "mips64r5",
469 .features = featureSet(&[_]Feature{
470 .mips64r5,
471 }),
472 };
473 pub const mips64r6 = Cpu{
474 .name = "mips64r6",
475 .llvm_name = "mips64r6",
476 .features = featureSet(&[_]Feature{
477 .mips64r6,
478 }),
479 };
480 pub const octeon = Cpu{
481 .name = "octeon",
482 .llvm_name = "octeon",
483 .features = featureSet(&[_]Feature{
484 .cnmips,
485 .mips64r2,
486 }),
487 };
488 pub const p5600 = Cpu{
489 .name = "p5600",
490 .llvm_name = "p5600",
491 .features = featureSet(&[_]Feature{
492 .p5600,
493 }),
494 };
495};
496
497/// All mips CPUs, sorted alphabetically by name.
498/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
499/// compiler has inefficient memory and CPU usage, affecting build times.
500pub const all_cpus = &[_]*const Cpu{
501 &cpu.mips1,
502 &cpu.mips2,
503 &cpu.mips3,
504 &cpu.mips32,
505 &cpu.mips32r2,
506 &cpu.mips32r3,
507 &cpu.mips32r5,
508 &cpu.mips32r6,
509 &cpu.mips4,
510 &cpu.mips5,
511 &cpu.mips64,
512 &cpu.mips64r2,
513 &cpu.mips64r3,
514 &cpu.mips64r5,
515 &cpu.mips64r6,
516 &cpu.octeon,
517 &cpu.p5600,
518};
lib/std/target/msp430.zig created+72
......@@ -0,0 +1,72 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 ext,
6 hwmult16,
7 hwmult32,
8 hwmultf5,
9};
10
11pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
12
13pub const all_features = blk: {
14 const len = @typeInfo(Feature).Enum.fields.len;
15 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
16 var result: [len]Cpu.Feature = undefined;
17 result[@enumToInt(Feature.ext)] = .{
18 .llvm_name = "ext",
19 .description = "Enable MSP430-X extensions",
20 .dependencies = featureSet(&[_]Feature{}),
21 };
22 result[@enumToInt(Feature.hwmult16)] = .{
23 .llvm_name = "hwmult16",
24 .description = "Enable 16-bit hardware multiplier",
25 .dependencies = featureSet(&[_]Feature{}),
26 };
27 result[@enumToInt(Feature.hwmult32)] = .{
28 .llvm_name = "hwmult32",
29 .description = "Enable 32-bit hardware multiplier",
30 .dependencies = featureSet(&[_]Feature{}),
31 };
32 result[@enumToInt(Feature.hwmultf5)] = .{
33 .llvm_name = "hwmultf5",
34 .description = "Enable F5 series hardware multiplier",
35 .dependencies = featureSet(&[_]Feature{}),
36 };
37 const ti = @typeInfo(Feature);
38 for (result) |*elem, i| {
39 elem.index = i;
40 elem.name = ti.Enum.fields[i].name;
41 }
42 break :blk result;
43};
44
45pub const cpu = struct {
46 pub const generic = Cpu{
47 .name = "generic",
48 .llvm_name = "generic",
49 .features = featureSet(&[_]Feature{}),
50 };
51 pub const msp430 = Cpu{
52 .name = "msp430",
53 .llvm_name = "msp430",
54 .features = featureSet(&[_]Feature{}),
55 };
56 pub const msp430x = Cpu{
57 .name = "msp430x",
58 .llvm_name = "msp430x",
59 .features = featureSet(&[_]Feature{
60 .ext,
61 }),
62 };
63};
64
65/// All msp430 CPUs, sorted alphabetically by name.
66/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
67/// compiler has inefficient memory and CPU usage, affecting build times.
68pub const all_cpus = &[_]*const Cpu{
69 &cpu.generic,
70 &cpu.msp430,
71 &cpu.msp430x,
72};
lib/std/target/nvptx.zig created+309
......@@ -0,0 +1,309 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 ptx32,
6 ptx40,
7 ptx41,
8 ptx42,
9 ptx43,
10 ptx50,
11 ptx60,
12 ptx61,
13 ptx63,
14 ptx64,
15 sm_20,
16 sm_21,
17 sm_30,
18 sm_32,
19 sm_35,
20 sm_37,
21 sm_50,
22 sm_52,
23 sm_53,
24 sm_60,
25 sm_61,
26 sm_62,
27 sm_70,
28 sm_72,
29 sm_75,
30};
31
32pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
33
34pub const all_features = blk: {
35 const len = @typeInfo(Feature).Enum.fields.len;
36 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
37 var result: [len]Cpu.Feature = undefined;
38 result[@enumToInt(Feature.ptx32)] = .{
39 .llvm_name = "ptx32",
40 .description = "Use PTX version 3.2",
41 .dependencies = featureSet(&[_]Feature{}),
42 };
43 result[@enumToInt(Feature.ptx40)] = .{
44 .llvm_name = "ptx40",
45 .description = "Use PTX version 4.0",
46 .dependencies = featureSet(&[_]Feature{}),
47 };
48 result[@enumToInt(Feature.ptx41)] = .{
49 .llvm_name = "ptx41",
50 .description = "Use PTX version 4.1",
51 .dependencies = featureSet(&[_]Feature{}),
52 };
53 result[@enumToInt(Feature.ptx42)] = .{
54 .llvm_name = "ptx42",
55 .description = "Use PTX version 4.2",
56 .dependencies = featureSet(&[_]Feature{}),
57 };
58 result[@enumToInt(Feature.ptx43)] = .{
59 .llvm_name = "ptx43",
60 .description = "Use PTX version 4.3",
61 .dependencies = featureSet(&[_]Feature{}),
62 };
63 result[@enumToInt(Feature.ptx50)] = .{
64 .llvm_name = "ptx50",
65 .description = "Use PTX version 5.0",
66 .dependencies = featureSet(&[_]Feature{}),
67 };
68 result[@enumToInt(Feature.ptx60)] = .{
69 .llvm_name = "ptx60",
70 .description = "Use PTX version 6.0",
71 .dependencies = featureSet(&[_]Feature{}),
72 };
73 result[@enumToInt(Feature.ptx61)] = .{
74 .llvm_name = "ptx61",
75 .description = "Use PTX version 6.1",
76 .dependencies = featureSet(&[_]Feature{}),
77 };
78 result[@enumToInt(Feature.ptx63)] = .{
79 .llvm_name = "ptx63",
80 .description = "Use PTX version 6.3",
81 .dependencies = featureSet(&[_]Feature{}),
82 };
83 result[@enumToInt(Feature.ptx64)] = .{
84 .llvm_name = "ptx64",
85 .description = "Use PTX version 6.4",
86 .dependencies = featureSet(&[_]Feature{}),
87 };
88 result[@enumToInt(Feature.sm_20)] = .{
89 .llvm_name = "sm_20",
90 .description = "Target SM 2.0",
91 .dependencies = featureSet(&[_]Feature{}),
92 };
93 result[@enumToInt(Feature.sm_21)] = .{
94 .llvm_name = "sm_21",
95 .description = "Target SM 2.1",
96 .dependencies = featureSet(&[_]Feature{}),
97 };
98 result[@enumToInt(Feature.sm_30)] = .{
99 .llvm_name = "sm_30",
100 .description = "Target SM 3.0",
101 .dependencies = featureSet(&[_]Feature{}),
102 };
103 result[@enumToInt(Feature.sm_32)] = .{
104 .llvm_name = "sm_32",
105 .description = "Target SM 3.2",
106 .dependencies = featureSet(&[_]Feature{}),
107 };
108 result[@enumToInt(Feature.sm_35)] = .{
109 .llvm_name = "sm_35",
110 .description = "Target SM 3.5",
111 .dependencies = featureSet(&[_]Feature{}),
112 };
113 result[@enumToInt(Feature.sm_37)] = .{
114 .llvm_name = "sm_37",
115 .description = "Target SM 3.7",
116 .dependencies = featureSet(&[_]Feature{}),
117 };
118 result[@enumToInt(Feature.sm_50)] = .{
119 .llvm_name = "sm_50",
120 .description = "Target SM 5.0",
121 .dependencies = featureSet(&[_]Feature{}),
122 };
123 result[@enumToInt(Feature.sm_52)] = .{
124 .llvm_name = "sm_52",
125 .description = "Target SM 5.2",
126 .dependencies = featureSet(&[_]Feature{}),
127 };
128 result[@enumToInt(Feature.sm_53)] = .{
129 .llvm_name = "sm_53",
130 .description = "Target SM 5.3",
131 .dependencies = featureSet(&[_]Feature{}),
132 };
133 result[@enumToInt(Feature.sm_60)] = .{
134 .llvm_name = "sm_60",
135 .description = "Target SM 6.0",
136 .dependencies = featureSet(&[_]Feature{}),
137 };
138 result[@enumToInt(Feature.sm_61)] = .{
139 .llvm_name = "sm_61",
140 .description = "Target SM 6.1",
141 .dependencies = featureSet(&[_]Feature{}),
142 };
143 result[@enumToInt(Feature.sm_62)] = .{
144 .llvm_name = "sm_62",
145 .description = "Target SM 6.2",
146 .dependencies = featureSet(&[_]Feature{}),
147 };
148 result[@enumToInt(Feature.sm_70)] = .{
149 .llvm_name = "sm_70",
150 .description = "Target SM 7.0",
151 .dependencies = featureSet(&[_]Feature{}),
152 };
153 result[@enumToInt(Feature.sm_72)] = .{
154 .llvm_name = "sm_72",
155 .description = "Target SM 7.2",
156 .dependencies = featureSet(&[_]Feature{}),
157 };
158 result[@enumToInt(Feature.sm_75)] = .{
159 .llvm_name = "sm_75",
160 .description = "Target SM 7.5",
161 .dependencies = featureSet(&[_]Feature{}),
162 };
163 const ti = @typeInfo(Feature);
164 for (result) |*elem, i| {
165 elem.index = i;
166 elem.name = ti.Enum.fields[i].name;
167 }
168 break :blk result;
169};
170
171pub const cpu = struct {
172 pub const sm_20 = Cpu{
173 .name = "sm_20",
174 .llvm_name = "sm_20",
175 .features = featureSet(&[_]Feature{
176 .sm_20,
177 }),
178 };
179 pub const sm_21 = Cpu{
180 .name = "sm_21",
181 .llvm_name = "sm_21",
182 .features = featureSet(&[_]Feature{
183 .sm_21,
184 }),
185 };
186 pub const sm_30 = Cpu{
187 .name = "sm_30",
188 .llvm_name = "sm_30",
189 .features = featureSet(&[_]Feature{
190 .sm_30,
191 }),
192 };
193 pub const sm_32 = Cpu{
194 .name = "sm_32",
195 .llvm_name = "sm_32",
196 .features = featureSet(&[_]Feature{
197 .ptx40,
198 .sm_32,
199 }),
200 };
201 pub const sm_35 = Cpu{
202 .name = "sm_35",
203 .llvm_name = "sm_35",
204 .features = featureSet(&[_]Feature{
205 .sm_35,
206 }),
207 };
208 pub const sm_37 = Cpu{
209 .name = "sm_37",
210 .llvm_name = "sm_37",
211 .features = featureSet(&[_]Feature{
212 .ptx41,
213 .sm_37,
214 }),
215 };
216 pub const sm_50 = Cpu{
217 .name = "sm_50",
218 .llvm_name = "sm_50",
219 .features = featureSet(&[_]Feature{
220 .ptx40,
221 .sm_50,
222 }),
223 };
224 pub const sm_52 = Cpu{
225 .name = "sm_52",
226 .llvm_name = "sm_52",
227 .features = featureSet(&[_]Feature{
228 .ptx41,
229 .sm_52,
230 }),
231 };
232 pub const sm_53 = Cpu{
233 .name = "sm_53",
234 .llvm_name = "sm_53",
235 .features = featureSet(&[_]Feature{
236 .ptx42,
237 .sm_53,
238 }),
239 };
240 pub const sm_60 = Cpu{
241 .name = "sm_60",
242 .llvm_name = "sm_60",
243 .features = featureSet(&[_]Feature{
244 .ptx50,
245 .sm_60,
246 }),
247 };
248 pub const sm_61 = Cpu{
249 .name = "sm_61",
250 .llvm_name = "sm_61",
251 .features = featureSet(&[_]Feature{
252 .ptx50,
253 .sm_61,
254 }),
255 };
256 pub const sm_62 = Cpu{
257 .name = "sm_62",
258 .llvm_name = "sm_62",
259 .features = featureSet(&[_]Feature{
260 .ptx50,
261 .sm_62,
262 }),
263 };
264 pub const sm_70 = Cpu{
265 .name = "sm_70",
266 .llvm_name = "sm_70",
267 .features = featureSet(&[_]Feature{
268 .ptx60,
269 .sm_70,
270 }),
271 };
272 pub const sm_72 = Cpu{
273 .name = "sm_72",
274 .llvm_name = "sm_72",
275 .features = featureSet(&[_]Feature{
276 .ptx61,
277 .sm_72,
278 }),
279 };
280 pub const sm_75 = Cpu{
281 .name = "sm_75",
282 .llvm_name = "sm_75",
283 .features = featureSet(&[_]Feature{
284 .ptx63,
285 .sm_75,
286 }),
287 };
288};
289
290/// All nvptx CPUs, sorted alphabetically by name.
291/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
292/// compiler has inefficient memory and CPU usage, affecting build times.
293pub const all_cpus = &[_]*const Cpu{
294 &cpu.sm_20,
295 &cpu.sm_21,
296 &cpu.sm_30,
297 &cpu.sm_32,
298 &cpu.sm_35,
299 &cpu.sm_37,
300 &cpu.sm_50,
301 &cpu.sm_52,
302 &cpu.sm_53,
303 &cpu.sm_60,
304 &cpu.sm_61,
305 &cpu.sm_62,
306 &cpu.sm_70,
307 &cpu.sm_72,
308 &cpu.sm_75,
309};
lib/std/target/powerpc.zig created+938
......@@ -0,0 +1,938 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 @"64bit",
6 @"64bitregs",
7 altivec,
8 booke,
9 bpermd,
10 cmpb,
11 crbits,
12 crypto,
13 direct_move,
14 e500,
15 extdiv,
16 fcpsgn,
17 float128,
18 fpcvt,
19 fprnd,
20 fpu,
21 fre,
22 fres,
23 frsqrte,
24 frsqrtes,
25 fsqrt,
26 hard_float,
27 htm,
28 icbt,
29 invariant_function_descriptors,
30 isa_v30_instructions,
31 isel,
32 ldbrx,
33 lfiwax,
34 longcall,
35 mfocrf,
36 msync,
37 partword_atomics,
38 popcntd,
39 power8_altivec,
40 power8_vector,
41 power9_altivec,
42 power9_vector,
43 ppc_postra_sched,
44 ppc_prera_sched,
45 ppc4xx,
46 ppc6xx,
47 qpx,
48 recipprec,
49 secure_plt,
50 slow_popcntd,
51 spe,
52 stfiwx,
53 two_const_nr,
54 vectors_use_two_units,
55 vsx,
56};
57
58pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
59
60pub const all_features = blk: {
61 const len = @typeInfo(Feature).Enum.fields.len;
62 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
63 var result: [len]Cpu.Feature = undefined;
64 result[@enumToInt(Feature.@"64bit")] = .{
65 .llvm_name = "64bit",
66 .description = "Enable 64-bit instructions",
67 .dependencies = featureSet(&[_]Feature{}),
68 };
69 result[@enumToInt(Feature.@"64bitregs")] = .{
70 .llvm_name = "64bitregs",
71 .description = "Enable 64-bit registers usage for ppc32 [beta]",
72 .dependencies = featureSet(&[_]Feature{}),
73 };
74 result[@enumToInt(Feature.altivec)] = .{
75 .llvm_name = "altivec",
76 .description = "Enable Altivec instructions",
77 .dependencies = featureSet(&[_]Feature{
78 .fpu,
79 }),
80 };
81 result[@enumToInt(Feature.booke)] = .{
82 .llvm_name = "booke",
83 .description = "Enable Book E instructions",
84 .dependencies = featureSet(&[_]Feature{
85 .icbt,
86 }),
87 };
88 result[@enumToInt(Feature.bpermd)] = .{
89 .llvm_name = "bpermd",
90 .description = "Enable the bpermd instruction",
91 .dependencies = featureSet(&[_]Feature{}),
92 };
93 result[@enumToInt(Feature.cmpb)] = .{
94 .llvm_name = "cmpb",
95 .description = "Enable the cmpb instruction",
96 .dependencies = featureSet(&[_]Feature{}),
97 };
98 result[@enumToInt(Feature.crbits)] = .{
99 .llvm_name = "crbits",
100 .description = "Use condition-register bits individually",
101 .dependencies = featureSet(&[_]Feature{}),
102 };
103 result[@enumToInt(Feature.crypto)] = .{
104 .llvm_name = "crypto",
105 .description = "Enable POWER8 Crypto instructions",
106 .dependencies = featureSet(&[_]Feature{
107 .power8_altivec,
108 }),
109 };
110 result[@enumToInt(Feature.direct_move)] = .{
111 .llvm_name = "direct-move",
112 .description = "Enable Power8 direct move instructions",
113 .dependencies = featureSet(&[_]Feature{
114 .vsx,
115 }),
116 };
117 result[@enumToInt(Feature.e500)] = .{
118 .llvm_name = "e500",
119 .description = "Enable E500/E500mc instructions",
120 .dependencies = featureSet(&[_]Feature{}),
121 };
122 result[@enumToInt(Feature.extdiv)] = .{
123 .llvm_name = "extdiv",
124 .description = "Enable extended divide instructions",
125 .dependencies = featureSet(&[_]Feature{}),
126 };
127 result[@enumToInt(Feature.fcpsgn)] = .{
128 .llvm_name = "fcpsgn",
129 .description = "Enable the fcpsgn instruction",
130 .dependencies = featureSet(&[_]Feature{
131 .fpu,
132 }),
133 };
134 result[@enumToInt(Feature.float128)] = .{
135 .llvm_name = "float128",
136 .description = "Enable the __float128 data type for IEEE-754R Binary128.",
137 .dependencies = featureSet(&[_]Feature{
138 .vsx,
139 }),
140 };
141 result[@enumToInt(Feature.fpcvt)] = .{
142 .llvm_name = "fpcvt",
143 .description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions",
144 .dependencies = featureSet(&[_]Feature{
145 .fpu,
146 }),
147 };
148 result[@enumToInt(Feature.fprnd)] = .{
149 .llvm_name = "fprnd",
150 .description = "Enable the fri[mnpz] instructions",
151 .dependencies = featureSet(&[_]Feature{
152 .fpu,
153 }),
154 };
155 result[@enumToInt(Feature.fpu)] = .{
156 .llvm_name = "fpu",
157 .description = "Enable classic FPU instructions",
158 .dependencies = featureSet(&[_]Feature{
159 .hard_float,
160 }),
161 };
162 result[@enumToInt(Feature.fre)] = .{
163 .llvm_name = "fre",
164 .description = "Enable the fre instruction",
165 .dependencies = featureSet(&[_]Feature{
166 .fpu,
167 }),
168 };
169 result[@enumToInt(Feature.fres)] = .{
170 .llvm_name = "fres",
171 .description = "Enable the fres instruction",
172 .dependencies = featureSet(&[_]Feature{
173 .fpu,
174 }),
175 };
176 result[@enumToInt(Feature.frsqrte)] = .{
177 .llvm_name = "frsqrte",
178 .description = "Enable the frsqrte instruction",
179 .dependencies = featureSet(&[_]Feature{
180 .fpu,
181 }),
182 };
183 result[@enumToInt(Feature.frsqrtes)] = .{
184 .llvm_name = "frsqrtes",
185 .description = "Enable the frsqrtes instruction",
186 .dependencies = featureSet(&[_]Feature{
187 .fpu,
188 }),
189 };
190 result[@enumToInt(Feature.fsqrt)] = .{
191 .llvm_name = "fsqrt",
192 .description = "Enable the fsqrt instruction",
193 .dependencies = featureSet(&[_]Feature{
194 .fpu,
195 }),
196 };
197 result[@enumToInt(Feature.hard_float)] = .{
198 .llvm_name = "hard-float",
199 .description = "Enable floating-point instructions",
200 .dependencies = featureSet(&[_]Feature{}),
201 };
202 result[@enumToInt(Feature.htm)] = .{
203 .llvm_name = "htm",
204 .description = "Enable Hardware Transactional Memory instructions",
205 .dependencies = featureSet(&[_]Feature{}),
206 };
207 result[@enumToInt(Feature.icbt)] = .{
208 .llvm_name = "icbt",
209 .description = "Enable icbt instruction",
210 .dependencies = featureSet(&[_]Feature{}),
211 };
212 result[@enumToInt(Feature.invariant_function_descriptors)] = .{
213 .llvm_name = "invariant-function-descriptors",
214 .description = "Assume function descriptors are invariant",
215 .dependencies = featureSet(&[_]Feature{}),
216 };
217 result[@enumToInt(Feature.isa_v30_instructions)] = .{
218 .llvm_name = "isa-v30-instructions",
219 .description = "Enable instructions added in ISA 3.0.",
220 .dependencies = featureSet(&[_]Feature{}),
221 };
222 result[@enumToInt(Feature.isel)] = .{
223 .llvm_name = "isel",
224 .description = "Enable the isel instruction",
225 .dependencies = featureSet(&[_]Feature{}),
226 };
227 result[@enumToInt(Feature.ldbrx)] = .{
228 .llvm_name = "ldbrx",
229 .description = "Enable the ldbrx instruction",
230 .dependencies = featureSet(&[_]Feature{}),
231 };
232 result[@enumToInt(Feature.lfiwax)] = .{
233 .llvm_name = "lfiwax",
234 .description = "Enable the lfiwax instruction",
235 .dependencies = featureSet(&[_]Feature{
236 .fpu,
237 }),
238 };
239 result[@enumToInt(Feature.longcall)] = .{
240 .llvm_name = "longcall",
241 .description = "Always use indirect calls",
242 .dependencies = featureSet(&[_]Feature{}),
243 };
244 result[@enumToInt(Feature.mfocrf)] = .{
245 .llvm_name = "mfocrf",
246 .description = "Enable the MFOCRF instruction",
247 .dependencies = featureSet(&[_]Feature{}),
248 };
249 result[@enumToInt(Feature.msync)] = .{
250 .llvm_name = "msync",
251 .description = "Has only the msync instruction instead of sync",
252 .dependencies = featureSet(&[_]Feature{
253 .booke,
254 }),
255 };
256 result[@enumToInt(Feature.partword_atomics)] = .{
257 .llvm_name = "partword-atomics",
258 .description = "Enable l[bh]arx and st[bh]cx.",
259 .dependencies = featureSet(&[_]Feature{}),
260 };
261 result[@enumToInt(Feature.popcntd)] = .{
262 .llvm_name = "popcntd",
263 .description = "Enable the popcnt[dw] instructions",
264 .dependencies = featureSet(&[_]Feature{}),
265 };
266 result[@enumToInt(Feature.power8_altivec)] = .{
267 .llvm_name = "power8-altivec",
268 .description = "Enable POWER8 Altivec instructions",
269 .dependencies = featureSet(&[_]Feature{
270 .altivec,
271 }),
272 };
273 result[@enumToInt(Feature.power8_vector)] = .{
274 .llvm_name = "power8-vector",
275 .description = "Enable POWER8 vector instructions",
276 .dependencies = featureSet(&[_]Feature{
277 .power8_altivec,
278 .vsx,
279 }),
280 };
281 result[@enumToInt(Feature.power9_altivec)] = .{
282 .llvm_name = "power9-altivec",
283 .description = "Enable POWER9 Altivec instructions",
284 .dependencies = featureSet(&[_]Feature{
285 .isa_v30_instructions,
286 .power8_altivec,
287 }),
288 };
289 result[@enumToInt(Feature.power9_vector)] = .{
290 .llvm_name = "power9-vector",
291 .description = "Enable POWER9 vector instructions",
292 .dependencies = featureSet(&[_]Feature{
293 .isa_v30_instructions,
294 .power8_vector,
295 .power9_altivec,
296 }),
297 };
298 result[@enumToInt(Feature.ppc_postra_sched)] = .{
299 .llvm_name = "ppc-postra-sched",
300 .description = "Use PowerPC post-RA scheduling strategy",
301 .dependencies = featureSet(&[_]Feature{}),
302 };
303 result[@enumToInt(Feature.ppc_prera_sched)] = .{
304 .llvm_name = "ppc-prera-sched",
305 .description = "Use PowerPC pre-RA scheduling strategy",
306 .dependencies = featureSet(&[_]Feature{}),
307 };
308 result[@enumToInt(Feature.ppc4xx)] = .{
309 .llvm_name = "ppc4xx",
310 .description = "Enable PPC 4xx instructions",
311 .dependencies = featureSet(&[_]Feature{}),
312 };
313 result[@enumToInt(Feature.ppc6xx)] = .{
314 .llvm_name = "ppc6xx",
315 .description = "Enable PPC 6xx instructions",
316 .dependencies = featureSet(&[_]Feature{}),
317 };
318 result[@enumToInt(Feature.qpx)] = .{
319 .llvm_name = "qpx",
320 .description = "Enable QPX instructions",
321 .dependencies = featureSet(&[_]Feature{
322 .fpu,
323 }),
324 };
325 result[@enumToInt(Feature.recipprec)] = .{
326 .llvm_name = "recipprec",
327 .description = "Assume higher precision reciprocal estimates",
328 .dependencies = featureSet(&[_]Feature{}),
329 };
330 result[@enumToInt(Feature.secure_plt)] = .{
331 .llvm_name = "secure-plt",
332 .description = "Enable secure plt mode",
333 .dependencies = featureSet(&[_]Feature{}),
334 };
335 result[@enumToInt(Feature.slow_popcntd)] = .{
336 .llvm_name = "slow-popcntd",
337 .description = "Has slow popcnt[dw] instructions",
338 .dependencies = featureSet(&[_]Feature{}),
339 };
340 result[@enumToInt(Feature.spe)] = .{
341 .llvm_name = "spe",
342 .description = "Enable SPE instructions",
343 .dependencies = featureSet(&[_]Feature{
344 .hard_float,
345 }),
346 };
347 result[@enumToInt(Feature.stfiwx)] = .{
348 .llvm_name = "stfiwx",
349 .description = "Enable the stfiwx instruction",
350 .dependencies = featureSet(&[_]Feature{
351 .fpu,
352 }),
353 };
354 result[@enumToInt(Feature.two_const_nr)] = .{
355 .llvm_name = "two-const-nr",
356 .description = "Requires two constant Newton-Raphson computation",
357 .dependencies = featureSet(&[_]Feature{}),
358 };
359 result[@enumToInt(Feature.vectors_use_two_units)] = .{
360 .llvm_name = "vectors-use-two-units",
361 .description = "Vectors use two units",
362 .dependencies = featureSet(&[_]Feature{}),
363 };
364 result[@enumToInt(Feature.vsx)] = .{
365 .llvm_name = "vsx",
366 .description = "Enable VSX instructions",
367 .dependencies = featureSet(&[_]Feature{
368 .altivec,
369 }),
370 };
371 const ti = @typeInfo(Feature);
372 for (result) |*elem, i| {
373 elem.index = i;
374 elem.name = ti.Enum.fields[i].name;
375 }
376 break :blk result;
377};
378
379pub const cpu = struct {
380 pub const @"440" = Cpu{
381 .name = "440",
382 .llvm_name = "440",
383 .features = featureSet(&[_]Feature{
384 .booke,
385 .fres,
386 .frsqrte,
387 .icbt,
388 .isel,
389 .msync,
390 }),
391 };
392 pub const @"450" = Cpu{
393 .name = "450",
394 .llvm_name = "450",
395 .features = featureSet(&[_]Feature{
396 .booke,
397 .fres,
398 .frsqrte,
399 .icbt,
400 .isel,
401 .msync,
402 }),
403 };
404 pub const @"601" = Cpu{
405 .name = "601",
406 .llvm_name = "601",
407 .features = featureSet(&[_]Feature{
408 .fpu,
409 }),
410 };
411 pub const @"602" = Cpu{
412 .name = "602",
413 .llvm_name = "602",
414 .features = featureSet(&[_]Feature{
415 .fpu,
416 }),
417 };
418 pub const @"603" = Cpu{
419 .name = "603",
420 .llvm_name = "603",
421 .features = featureSet(&[_]Feature{
422 .fres,
423 .frsqrte,
424 }),
425 };
426 pub const @"603e" = Cpu{
427 .name = "603e",
428 .llvm_name = "603e",
429 .features = featureSet(&[_]Feature{
430 .fres,
431 .frsqrte,
432 }),
433 };
434 pub const @"603ev" = Cpu{
435 .name = "603ev",
436 .llvm_name = "603ev",
437 .features = featureSet(&[_]Feature{
438 .fres,
439 .frsqrte,
440 }),
441 };
442 pub const @"604" = Cpu{
443 .name = "604",
444 .llvm_name = "604",
445 .features = featureSet(&[_]Feature{
446 .fres,
447 .frsqrte,
448 }),
449 };
450 pub const @"604e" = Cpu{
451 .name = "604e",
452 .llvm_name = "604e",
453 .features = featureSet(&[_]Feature{
454 .fres,
455 .frsqrte,
456 }),
457 };
458 pub const @"620" = Cpu{
459 .name = "620",
460 .llvm_name = "620",
461 .features = featureSet(&[_]Feature{
462 .fres,
463 .frsqrte,
464 }),
465 };
466 pub const @"7400" = Cpu{
467 .name = "7400",
468 .llvm_name = "7400",
469 .features = featureSet(&[_]Feature{
470 .altivec,
471 .fres,
472 .frsqrte,
473 }),
474 };
475 pub const @"7450" = Cpu{
476 .name = "7450",
477 .llvm_name = "7450",
478 .features = featureSet(&[_]Feature{
479 .altivec,
480 .fres,
481 .frsqrte,
482 }),
483 };
484 pub const @"750" = Cpu{
485 .name = "750",
486 .llvm_name = "750",
487 .features = featureSet(&[_]Feature{
488 .fres,
489 .frsqrte,
490 }),
491 };
492 pub const @"970" = Cpu{
493 .name = "970",
494 .llvm_name = "970",
495 .features = featureSet(&[_]Feature{
496 .@"64bit",
497 .altivec,
498 .fres,
499 .frsqrte,
500 .fsqrt,
501 .mfocrf,
502 .stfiwx,
503 }),
504 };
505 pub const a2 = Cpu{
506 .name = "a2",
507 .llvm_name = "a2",
508 .features = featureSet(&[_]Feature{
509 .@"64bit",
510 .booke,
511 .cmpb,
512 .fcpsgn,
513 .fpcvt,
514 .fprnd,
515 .fre,
516 .fres,
517 .frsqrte,
518 .frsqrtes,
519 .fsqrt,
520 .icbt,
521 .isel,
522 .ldbrx,
523 .lfiwax,
524 .mfocrf,
525 .recipprec,
526 .slow_popcntd,
527 .stfiwx,
528 }),
529 };
530 pub const a2q = Cpu{
531 .name = "a2q",
532 .llvm_name = "a2q",
533 .features = featureSet(&[_]Feature{
534 .@"64bit",
535 .booke,
536 .cmpb,
537 .fcpsgn,
538 .fpcvt,
539 .fprnd,
540 .fre,
541 .fres,
542 .frsqrte,
543 .frsqrtes,
544 .fsqrt,
545 .icbt,
546 .isel,
547 .ldbrx,
548 .lfiwax,
549 .mfocrf,
550 .qpx,
551 .recipprec,
552 .slow_popcntd,
553 .stfiwx,
554 }),
555 };
556 pub const e500 = Cpu{
557 .name = "e500",
558 .llvm_name = "e500",
559 .features = featureSet(&[_]Feature{
560 .booke,
561 .icbt,
562 .isel,
563 }),
564 };
565 pub const e500mc = Cpu{
566 .name = "e500mc",
567 .llvm_name = "e500mc",
568 .features = featureSet(&[_]Feature{
569 .booke,
570 .icbt,
571 .isel,
572 .stfiwx,
573 }),
574 };
575 pub const e5500 = Cpu{
576 .name = "e5500",
577 .llvm_name = "e5500",
578 .features = featureSet(&[_]Feature{
579 .@"64bit",
580 .booke,
581 .icbt,
582 .isel,
583 .mfocrf,
584 .stfiwx,
585 }),
586 };
587 pub const g3 = Cpu{
588 .name = "g3",
589 .llvm_name = "g3",
590 .features = featureSet(&[_]Feature{
591 .fres,
592 .frsqrte,
593 }),
594 };
595 pub const g4 = Cpu{
596 .name = "g4",
597 .llvm_name = "g4",
598 .features = featureSet(&[_]Feature{
599 .altivec,
600 .fres,
601 .frsqrte,
602 }),
603 };
604 pub const @"g4+" = Cpu{
605 .name = "g4+",
606 .llvm_name = "g4+",
607 .features = featureSet(&[_]Feature{
608 .altivec,
609 .fres,
610 .frsqrte,
611 }),
612 };
613 pub const g5 = Cpu{
614 .name = "g5",
615 .llvm_name = "g5",
616 .features = featureSet(&[_]Feature{
617 .@"64bit",
618 .altivec,
619 .fres,
620 .frsqrte,
621 .fsqrt,
622 .mfocrf,
623 .stfiwx,
624 }),
625 };
626 pub const generic = Cpu{
627 .name = "generic",
628 .llvm_name = "generic",
629 .features = featureSet(&[_]Feature{
630 .hard_float,
631 }),
632 };
633 pub const ppc = Cpu{
634 .name = "ppc",
635 .llvm_name = "ppc",
636 .features = featureSet(&[_]Feature{
637 .hard_float,
638 }),
639 };
640 pub const ppc32 = Cpu{
641 .name = "ppc32",
642 .llvm_name = "ppc32",
643 .features = featureSet(&[_]Feature{
644 .hard_float,
645 }),
646 };
647 pub const ppc64 = Cpu{
648 .name = "ppc64",
649 .llvm_name = "ppc64",
650 .features = featureSet(&[_]Feature{
651 .@"64bit",
652 .altivec,
653 .fres,
654 .frsqrte,
655 .fsqrt,
656 .mfocrf,
657 .stfiwx,
658 }),
659 };
660 pub const ppc64le = Cpu{
661 .name = "ppc64le",
662 .llvm_name = "ppc64le",
663 .features = featureSet(&[_]Feature{
664 .@"64bit",
665 .altivec,
666 .bpermd,
667 .cmpb,
668 .crypto,
669 .direct_move,
670 .extdiv,
671 .fcpsgn,
672 .fpcvt,
673 .fprnd,
674 .fre,
675 .fres,
676 .frsqrte,
677 .frsqrtes,
678 .fsqrt,
679 .htm,
680 .icbt,
681 .isel,
682 .ldbrx,
683 .lfiwax,
684 .mfocrf,
685 .partword_atomics,
686 .popcntd,
687 .power8_altivec,
688 .power8_vector,
689 .recipprec,
690 .stfiwx,
691 .two_const_nr,
692 .vsx,
693 }),
694 };
695 pub const pwr3 = Cpu{
696 .name = "pwr3",
697 .llvm_name = "pwr3",
698 .features = featureSet(&[_]Feature{
699 .@"64bit",
700 .altivec,
701 .fres,
702 .frsqrte,
703 .mfocrf,
704 .stfiwx,
705 }),
706 };
707 pub const pwr4 = Cpu{
708 .name = "pwr4",
709 .llvm_name = "pwr4",
710 .features = featureSet(&[_]Feature{
711 .@"64bit",
712 .altivec,
713 .fres,
714 .frsqrte,
715 .fsqrt,
716 .mfocrf,
717 .stfiwx,
718 }),
719 };
720 pub const pwr5 = Cpu{
721 .name = "pwr5",
722 .llvm_name = "pwr5",
723 .features = featureSet(&[_]Feature{
724 .@"64bit",
725 .altivec,
726 .fre,
727 .fres,
728 .frsqrte,
729 .frsqrtes,
730 .fsqrt,
731 .mfocrf,
732 .stfiwx,
733 }),
734 };
735 pub const pwr5x = Cpu{
736 .name = "pwr5x",
737 .llvm_name = "pwr5x",
738 .features = featureSet(&[_]Feature{
739 .@"64bit",
740 .altivec,
741 .fprnd,
742 .fre,
743 .fres,
744 .frsqrte,
745 .frsqrtes,
746 .fsqrt,
747 .mfocrf,
748 .stfiwx,
749 }),
750 };
751 pub const pwr6 = Cpu{
752 .name = "pwr6",
753 .llvm_name = "pwr6",
754 .features = featureSet(&[_]Feature{
755 .@"64bit",
756 .altivec,
757 .cmpb,
758 .fcpsgn,
759 .fprnd,
760 .fre,
761 .fres,
762 .frsqrte,
763 .frsqrtes,
764 .fsqrt,
765 .lfiwax,
766 .mfocrf,
767 .recipprec,
768 .stfiwx,
769 }),
770 };
771 pub const pwr6x = Cpu{
772 .name = "pwr6x",
773 .llvm_name = "pwr6x",
774 .features = featureSet(&[_]Feature{
775 .@"64bit",
776 .altivec,
777 .cmpb,
778 .fcpsgn,
779 .fprnd,
780 .fre,
781 .fres,
782 .frsqrte,
783 .frsqrtes,
784 .fsqrt,
785 .lfiwax,
786 .mfocrf,
787 .recipprec,
788 .stfiwx,
789 }),
790 };
791 pub const pwr7 = Cpu{
792 .name = "pwr7",
793 .llvm_name = "pwr7",
794 .features = featureSet(&[_]Feature{
795 .@"64bit",
796 .altivec,
797 .bpermd,
798 .cmpb,
799 .extdiv,
800 .fcpsgn,
801 .fpcvt,
802 .fprnd,
803 .fre,
804 .fres,
805 .frsqrte,
806 .frsqrtes,
807 .fsqrt,
808 .isel,
809 .ldbrx,
810 .lfiwax,
811 .mfocrf,
812 .popcntd,
813 .recipprec,
814 .stfiwx,
815 .two_const_nr,
816 .vsx,
817 }),
818 };
819 pub const pwr8 = Cpu{
820 .name = "pwr8",
821 .llvm_name = "pwr8",
822 .features = featureSet(&[_]Feature{
823 .@"64bit",
824 .altivec,
825 .bpermd,
826 .cmpb,
827 .crypto,
828 .direct_move,
829 .extdiv,
830 .fcpsgn,
831 .fpcvt,
832 .fprnd,
833 .fre,
834 .fres,
835 .frsqrte,
836 .frsqrtes,
837 .fsqrt,
838 .htm,
839 .icbt,
840 .isel,
841 .ldbrx,
842 .lfiwax,
843 .mfocrf,
844 .partword_atomics,
845 .popcntd,
846 .power8_altivec,
847 .power8_vector,
848 .recipprec,
849 .stfiwx,
850 .two_const_nr,
851 .vsx,
852 }),
853 };
854 pub const pwr9 = Cpu{
855 .name = "pwr9",
856 .llvm_name = "pwr9",
857 .features = featureSet(&[_]Feature{
858 .@"64bit",
859 .altivec,
860 .bpermd,
861 .cmpb,
862 .crypto,
863 .direct_move,
864 .extdiv,
865 .fcpsgn,
866 .fpcvt,
867 .fprnd,
868 .fre,
869 .fres,
870 .frsqrte,
871 .frsqrtes,
872 .fsqrt,
873 .htm,
874 .icbt,
875 .isa_v30_instructions,
876 .isel,
877 .ldbrx,
878 .lfiwax,
879 .mfocrf,
880 .partword_atomics,
881 .popcntd,
882 .power8_altivec,
883 .power8_vector,
884 .power9_altivec,
885 .power9_vector,
886 .ppc_postra_sched,
887 .ppc_prera_sched,
888 .recipprec,
889 .stfiwx,
890 .two_const_nr,
891 .vectors_use_two_units,
892 .vsx,
893 }),
894 };
895};
896
897/// All powerpc CPUs, sorted alphabetically by name.
898/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
899/// compiler has inefficient memory and CPU usage, affecting build times.
900pub const all_cpus = &[_]*const Cpu{
901 &cpu.@"440",
902 &cpu.@"450",
903 &cpu.@"601",
904 &cpu.@"602",
905 &cpu.@"603",
906 &cpu.@"603e",
907 &cpu.@"603ev",
908 &cpu.@"604",
909 &cpu.@"604e",
910 &cpu.@"620",
911 &cpu.@"7400",
912 &cpu.@"7450",
913 &cpu.@"750",
914 &cpu.@"970",
915 &cpu.a2,
916 &cpu.a2q,
917 &cpu.e500,
918 &cpu.e500mc,
919 &cpu.e5500,
920 &cpu.g3,
921 &cpu.g4,
922 &cpu.@"g4+",
923 &cpu.g5,
924 &cpu.generic,
925 &cpu.ppc,
926 &cpu.ppc32,
927 &cpu.ppc64,
928 &cpu.ppc64le,
929 &cpu.pwr3,
930 &cpu.pwr4,
931 &cpu.pwr5,
932 &cpu.pwr5x,
933 &cpu.pwr6,
934 &cpu.pwr6x,
935 &cpu.pwr7,
936 &cpu.pwr8,
937 &cpu.pwr9,
938};
lib/std/target/riscv.zig created+122
......@@ -0,0 +1,122 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 @"64bit",
6 a,
7 c,
8 d,
9 e,
10 f,
11 m,
12 relax,
13};
14
15pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
16
17pub const all_features = blk: {
18 const len = @typeInfo(Feature).Enum.fields.len;
19 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
20 var result: [len]Cpu.Feature = undefined;
21 result[@enumToInt(Feature.@"64bit")] = .{
22 .llvm_name = "64bit",
23 .description = "Implements RV64",
24 .dependencies = featureSet(&[_]Feature{}),
25 };
26 result[@enumToInt(Feature.a)] = .{
27 .llvm_name = "a",
28 .description = "'A' (Atomic Instructions)",
29 .dependencies = featureSet(&[_]Feature{}),
30 };
31 result[@enumToInt(Feature.c)] = .{
32 .llvm_name = "c",
33 .description = "'C' (Compressed Instructions)",
34 .dependencies = featureSet(&[_]Feature{}),
35 };
36 result[@enumToInt(Feature.d)] = .{
37 .llvm_name = "d",
38 .description = "'D' (Double-Precision Floating-Point)",
39 .dependencies = featureSet(&[_]Feature{
40 .f,
41 }),
42 };
43 result[@enumToInt(Feature.e)] = .{
44 .llvm_name = "e",
45 .description = "Implements RV32E (provides 16 rather than 32 GPRs)",
46 .dependencies = featureSet(&[_]Feature{}),
47 };
48 result[@enumToInt(Feature.f)] = .{
49 .llvm_name = "f",
50 .description = "'F' (Single-Precision Floating-Point)",
51 .dependencies = featureSet(&[_]Feature{}),
52 };
53 result[@enumToInt(Feature.m)] = .{
54 .llvm_name = "m",
55 .description = "'M' (Integer Multiplication and Division)",
56 .dependencies = featureSet(&[_]Feature{}),
57 };
58 result[@enumToInt(Feature.relax)] = .{
59 .llvm_name = "relax",
60 .description = "Enable Linker relaxation.",
61 .dependencies = featureSet(&[_]Feature{}),
62 };
63 const ti = @typeInfo(Feature);
64 for (result) |*elem, i| {
65 elem.index = i;
66 elem.name = ti.Enum.fields[i].name;
67 }
68 break :blk result;
69};
70
71pub const cpu = struct {
72 pub const baseline_rv32 = Cpu{
73 .name = "baseline_rv32",
74 .llvm_name = "generic-rv32",
75 .features = featureSet(&[_]Feature{
76 .a,
77 .c,
78 .d,
79 .f,
80 .m,
81 .relax,
82 }),
83 };
84
85 pub const baseline_rv64 = Cpu{
86 .name = "baseline_rv64",
87 .llvm_name = "generic-rv64",
88 .features = featureSet(&[_]Feature{
89 .@"64bit",
90 .a,
91 .c,
92 .d,
93 .f,
94 .m,
95 .relax,
96 }),
97 };
98
99 pub const generic_rv32 = Cpu{
100 .name = "generic_rv32",
101 .llvm_name = "generic-rv32",
102 .features = featureSet(&[_]Feature{}),
103 };
104
105 pub const generic_rv64 = Cpu{
106 .name = "generic_rv64",
107 .llvm_name = "generic-rv64",
108 .features = featureSet(&[_]Feature{
109 .@"64bit",
110 }),
111 };
112};
113
114/// All riscv CPUs, sorted alphabetically by name.
115/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
116/// compiler has inefficient memory and CPU usage, affecting build times.
117pub const all_cpus = &[_]*const Cpu{
118 &cpu.baseline_rv32,
119 &cpu.baseline_rv64,
120 &cpu.generic_rv32,
121 &cpu.generic_rv64,
122};
lib/std/target/sparc.zig created+495
......@@ -0,0 +1,495 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 deprecated_v8,
6 detectroundchange,
7 fixallfdivsqrt,
8 hard_quad_float,
9 hasleoncasa,
10 hasumacsmac,
11 insertnopload,
12 leon,
13 leoncyclecounter,
14 leonpwrpsr,
15 no_fmuls,
16 no_fsmuld,
17 popc,
18 soft_float,
19 soft_mul_div,
20 v9,
21 vis,
22 vis2,
23 vis3,
24};
25
26pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
27
28pub const all_features = blk: {
29 const len = @typeInfo(Feature).Enum.fields.len;
30 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
31 var result: [len]Cpu.Feature = undefined;
32 result[@enumToInt(Feature.deprecated_v8)] = .{
33 .llvm_name = "deprecated-v8",
34 .description = "Enable deprecated V8 instructions in V9 mode",
35 .dependencies = featureSet(&[_]Feature{}),
36 };
37 result[@enumToInt(Feature.detectroundchange)] = .{
38 .llvm_name = "detectroundchange",
39 .description = "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode",
40 .dependencies = featureSet(&[_]Feature{}),
41 };
42 result[@enumToInt(Feature.fixallfdivsqrt)] = .{
43 .llvm_name = "fixallfdivsqrt",
44 .description = "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store",
45 .dependencies = featureSet(&[_]Feature{}),
46 };
47 result[@enumToInt(Feature.hard_quad_float)] = .{
48 .llvm_name = "hard-quad-float",
49 .description = "Enable quad-word floating point instructions",
50 .dependencies = featureSet(&[_]Feature{}),
51 };
52 result[@enumToInt(Feature.hasleoncasa)] = .{
53 .llvm_name = "hasleoncasa",
54 .description = "Enable CASA instruction for LEON3 and LEON4 processors",
55 .dependencies = featureSet(&[_]Feature{}),
56 };
57 result[@enumToInt(Feature.hasumacsmac)] = .{
58 .llvm_name = "hasumacsmac",
59 .description = "Enable UMAC and SMAC for LEON3 and LEON4 processors",
60 .dependencies = featureSet(&[_]Feature{}),
61 };
62 result[@enumToInt(Feature.insertnopload)] = .{
63 .llvm_name = "insertnopload",
64 .description = "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction",
65 .dependencies = featureSet(&[_]Feature{}),
66 };
67 result[@enumToInt(Feature.leon)] = .{
68 .llvm_name = "leon",
69 .description = "Enable LEON extensions",
70 .dependencies = featureSet(&[_]Feature{}),
71 };
72 result[@enumToInt(Feature.leoncyclecounter)] = .{
73 .llvm_name = "leoncyclecounter",
74 .description = "Use the Leon cycle counter register",
75 .dependencies = featureSet(&[_]Feature{}),
76 };
77 result[@enumToInt(Feature.leonpwrpsr)] = .{
78 .llvm_name = "leonpwrpsr",
79 .description = "Enable the PWRPSR instruction",
80 .dependencies = featureSet(&[_]Feature{}),
81 };
82 result[@enumToInt(Feature.no_fmuls)] = .{
83 .llvm_name = "no-fmuls",
84 .description = "Disable the fmuls instruction.",
85 .dependencies = featureSet(&[_]Feature{}),
86 };
87 result[@enumToInt(Feature.no_fsmuld)] = .{
88 .llvm_name = "no-fsmuld",
89 .description = "Disable the fsmuld instruction.",
90 .dependencies = featureSet(&[_]Feature{}),
91 };
92 result[@enumToInt(Feature.popc)] = .{
93 .llvm_name = "popc",
94 .description = "Use the popc (population count) instruction",
95 .dependencies = featureSet(&[_]Feature{}),
96 };
97 result[@enumToInt(Feature.soft_float)] = .{
98 .llvm_name = "soft-float",
99 .description = "Use software emulation for floating point",
100 .dependencies = featureSet(&[_]Feature{}),
101 };
102 result[@enumToInt(Feature.soft_mul_div)] = .{
103 .llvm_name = "soft-mul-div",
104 .description = "Use software emulation for integer multiply and divide",
105 .dependencies = featureSet(&[_]Feature{}),
106 };
107 result[@enumToInt(Feature.v9)] = .{
108 .llvm_name = "v9",
109 .description = "Enable SPARC-V9 instructions",
110 .dependencies = featureSet(&[_]Feature{}),
111 };
112 result[@enumToInt(Feature.vis)] = .{
113 .llvm_name = "vis",
114 .description = "Enable UltraSPARC Visual Instruction Set extensions",
115 .dependencies = featureSet(&[_]Feature{}),
116 };
117 result[@enumToInt(Feature.vis2)] = .{
118 .llvm_name = "vis2",
119 .description = "Enable Visual Instruction Set extensions II",
120 .dependencies = featureSet(&[_]Feature{}),
121 };
122 result[@enumToInt(Feature.vis3)] = .{
123 .llvm_name = "vis3",
124 .description = "Enable Visual Instruction Set extensions III",
125 .dependencies = featureSet(&[_]Feature{}),
126 };
127 const ti = @typeInfo(Feature);
128 for (result) |*elem, i| {
129 elem.index = i;
130 elem.name = ti.Enum.fields[i].name;
131 }
132 break :blk result;
133};
134
135pub const cpu = struct {
136 pub const at697e = Cpu{
137 .name = "at697e",
138 .llvm_name = "at697e",
139 .features = featureSet(&[_]Feature{
140 .insertnopload,
141 .leon,
142 }),
143 };
144 pub const at697f = Cpu{
145 .name = "at697f",
146 .llvm_name = "at697f",
147 .features = featureSet(&[_]Feature{
148 .insertnopload,
149 .leon,
150 }),
151 };
152 pub const f934 = Cpu{
153 .name = "f934",
154 .llvm_name = "f934",
155 .features = featureSet(&[_]Feature{}),
156 };
157 pub const generic = Cpu{
158 .name = "generic",
159 .llvm_name = "generic",
160 .features = featureSet(&[_]Feature{}),
161 };
162 pub const gr712rc = Cpu{
163 .name = "gr712rc",
164 .llvm_name = "gr712rc",
165 .features = featureSet(&[_]Feature{
166 .hasleoncasa,
167 .leon,
168 }),
169 };
170 pub const gr740 = Cpu{
171 .name = "gr740",
172 .llvm_name = "gr740",
173 .features = featureSet(&[_]Feature{
174 .hasleoncasa,
175 .hasumacsmac,
176 .leon,
177 .leoncyclecounter,
178 .leonpwrpsr,
179 }),
180 };
181 pub const hypersparc = Cpu{
182 .name = "hypersparc",
183 .llvm_name = "hypersparc",
184 .features = featureSet(&[_]Feature{}),
185 };
186 pub const leon2 = Cpu{
187 .name = "leon2",
188 .llvm_name = "leon2",
189 .features = featureSet(&[_]Feature{
190 .leon,
191 }),
192 };
193 pub const leon3 = Cpu{
194 .name = "leon3",
195 .llvm_name = "leon3",
196 .features = featureSet(&[_]Feature{
197 .hasumacsmac,
198 .leon,
199 }),
200 };
201 pub const leon4 = Cpu{
202 .name = "leon4",
203 .llvm_name = "leon4",
204 .features = featureSet(&[_]Feature{
205 .hasleoncasa,
206 .hasumacsmac,
207 .leon,
208 }),
209 };
210 pub const ma2080 = Cpu{
211 .name = "ma2080",
212 .llvm_name = "ma2080",
213 .features = featureSet(&[_]Feature{
214 .hasleoncasa,
215 .leon,
216 }),
217 };
218 pub const ma2085 = Cpu{
219 .name = "ma2085",
220 .llvm_name = "ma2085",
221 .features = featureSet(&[_]Feature{
222 .hasleoncasa,
223 .leon,
224 }),
225 };
226 pub const ma2100 = Cpu{
227 .name = "ma2100",
228 .llvm_name = "ma2100",
229 .features = featureSet(&[_]Feature{
230 .hasleoncasa,
231 .leon,
232 }),
233 };
234 pub const ma2150 = Cpu{
235 .name = "ma2150",
236 .llvm_name = "ma2150",
237 .features = featureSet(&[_]Feature{
238 .hasleoncasa,
239 .leon,
240 }),
241 };
242 pub const ma2155 = Cpu{
243 .name = "ma2155",
244 .llvm_name = "ma2155",
245 .features = featureSet(&[_]Feature{
246 .hasleoncasa,
247 .leon,
248 }),
249 };
250 pub const ma2450 = Cpu{
251 .name = "ma2450",
252 .llvm_name = "ma2450",
253 .features = featureSet(&[_]Feature{
254 .hasleoncasa,
255 .leon,
256 }),
257 };
258 pub const ma2455 = Cpu{
259 .name = "ma2455",
260 .llvm_name = "ma2455",
261 .features = featureSet(&[_]Feature{
262 .hasleoncasa,
263 .leon,
264 }),
265 };
266 pub const ma2480 = Cpu{
267 .name = "ma2480",
268 .llvm_name = "ma2480",
269 .features = featureSet(&[_]Feature{
270 .hasleoncasa,
271 .leon,
272 }),
273 };
274 pub const ma2485 = Cpu{
275 .name = "ma2485",
276 .llvm_name = "ma2485",
277 .features = featureSet(&[_]Feature{
278 .hasleoncasa,
279 .leon,
280 }),
281 };
282 pub const ma2x5x = Cpu{
283 .name = "ma2x5x",
284 .llvm_name = "ma2x5x",
285 .features = featureSet(&[_]Feature{
286 .hasleoncasa,
287 .leon,
288 }),
289 };
290 pub const ma2x8x = Cpu{
291 .name = "ma2x8x",
292 .llvm_name = "ma2x8x",
293 .features = featureSet(&[_]Feature{
294 .hasleoncasa,
295 .leon,
296 }),
297 };
298 pub const myriad2 = Cpu{
299 .name = "myriad2",
300 .llvm_name = "myriad2",
301 .features = featureSet(&[_]Feature{
302 .hasleoncasa,
303 .leon,
304 }),
305 };
306 pub const myriad2_1 = Cpu{
307 .name = "myriad2_1",
308 .llvm_name = "myriad2.1",
309 .features = featureSet(&[_]Feature{
310 .hasleoncasa,
311 .leon,
312 }),
313 };
314 pub const myriad2_2 = Cpu{
315 .name = "myriad2_2",
316 .llvm_name = "myriad2.2",
317 .features = featureSet(&[_]Feature{
318 .hasleoncasa,
319 .leon,
320 }),
321 };
322 pub const myriad2_3 = Cpu{
323 .name = "myriad2_3",
324 .llvm_name = "myriad2.3",
325 .features = featureSet(&[_]Feature{
326 .hasleoncasa,
327 .leon,
328 }),
329 };
330 pub const niagara = Cpu{
331 .name = "niagara",
332 .llvm_name = "niagara",
333 .features = featureSet(&[_]Feature{
334 .deprecated_v8,
335 .v9,
336 .vis,
337 .vis2,
338 }),
339 };
340 pub const niagara2 = Cpu{
341 .name = "niagara2",
342 .llvm_name = "niagara2",
343 .features = featureSet(&[_]Feature{
344 .deprecated_v8,
345 .popc,
346 .v9,
347 .vis,
348 .vis2,
349 }),
350 };
351 pub const niagara3 = Cpu{
352 .name = "niagara3",
353 .llvm_name = "niagara3",
354 .features = featureSet(&[_]Feature{
355 .deprecated_v8,
356 .popc,
357 .v9,
358 .vis,
359 .vis2,
360 }),
361 };
362 pub const niagara4 = Cpu{
363 .name = "niagara4",
364 .llvm_name = "niagara4",
365 .features = featureSet(&[_]Feature{
366 .deprecated_v8,
367 .popc,
368 .v9,
369 .vis,
370 .vis2,
371 .vis3,
372 }),
373 };
374 pub const sparclet = Cpu{
375 .name = "sparclet",
376 .llvm_name = "sparclet",
377 .features = featureSet(&[_]Feature{}),
378 };
379 pub const sparclite = Cpu{
380 .name = "sparclite",
381 .llvm_name = "sparclite",
382 .features = featureSet(&[_]Feature{}),
383 };
384 pub const sparclite86x = Cpu{
385 .name = "sparclite86x",
386 .llvm_name = "sparclite86x",
387 .features = featureSet(&[_]Feature{}),
388 };
389 pub const supersparc = Cpu{
390 .name = "supersparc",
391 .llvm_name = "supersparc",
392 .features = featureSet(&[_]Feature{}),
393 };
394 pub const tsc701 = Cpu{
395 .name = "tsc701",
396 .llvm_name = "tsc701",
397 .features = featureSet(&[_]Feature{}),
398 };
399 pub const ultrasparc = Cpu{
400 .name = "ultrasparc",
401 .llvm_name = "ultrasparc",
402 .features = featureSet(&[_]Feature{
403 .deprecated_v8,
404 .v9,
405 .vis,
406 }),
407 };
408 pub const ultrasparc3 = Cpu{
409 .name = "ultrasparc3",
410 .llvm_name = "ultrasparc3",
411 .features = featureSet(&[_]Feature{
412 .deprecated_v8,
413 .v9,
414 .vis,
415 .vis2,
416 }),
417 };
418 pub const ut699 = Cpu{
419 .name = "ut699",
420 .llvm_name = "ut699",
421 .features = featureSet(&[_]Feature{
422 .fixallfdivsqrt,
423 .insertnopload,
424 .leon,
425 .no_fmuls,
426 .no_fsmuld,
427 }),
428 };
429 pub const v7 = Cpu{
430 .name = "v7",
431 .llvm_name = "v7",
432 .features = featureSet(&[_]Feature{
433 .no_fsmuld,
434 .soft_mul_div,
435 }),
436 };
437 pub const v8 = Cpu{
438 .name = "v8",
439 .llvm_name = "v8",
440 .features = featureSet(&[_]Feature{}),
441 };
442 pub const v9 = Cpu{
443 .name = "v9",
444 .llvm_name = "v9",
445 .features = featureSet(&[_]Feature{
446 .v9,
447 }),
448 };
449};
450
451/// All sparc CPUs, sorted alphabetically by name.
452/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
453/// compiler has inefficient memory and CPU usage, affecting build times.
454pub const all_cpus = &[_]*const Cpu{
455 &cpu.at697e,
456 &cpu.at697f,
457 &cpu.f934,
458 &cpu.generic,
459 &cpu.gr712rc,
460 &cpu.gr740,
461 &cpu.hypersparc,
462 &cpu.leon2,
463 &cpu.leon3,
464 &cpu.leon4,
465 &cpu.ma2080,
466 &cpu.ma2085,
467 &cpu.ma2100,
468 &cpu.ma2150,
469 &cpu.ma2155,
470 &cpu.ma2450,
471 &cpu.ma2455,
472 &cpu.ma2480,
473 &cpu.ma2485,
474 &cpu.ma2x5x,
475 &cpu.ma2x8x,
476 &cpu.myriad2,
477 &cpu.myriad2_1,
478 &cpu.myriad2_2,
479 &cpu.myriad2_3,
480 &cpu.niagara,
481 &cpu.niagara2,
482 &cpu.niagara3,
483 &cpu.niagara4,
484 &cpu.sparclet,
485 &cpu.sparclite,
486 &cpu.sparclite86x,
487 &cpu.supersparc,
488 &cpu.tsc701,
489 &cpu.ultrasparc,
490 &cpu.ultrasparc3,
491 &cpu.ut699,
492 &cpu.v7,
493 &cpu.v8,
494 &cpu.v9,
495};
lib/std/target/systemz.zig created+510
......@@ -0,0 +1,510 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 deflate_conversion,
6 dfp_packed_conversion,
7 dfp_zoned_conversion,
8 distinct_ops,
9 enhanced_dat_2,
10 enhanced_sort,
11 execution_hint,
12 fast_serialization,
13 fp_extension,
14 guarded_storage,
15 high_word,
16 insert_reference_bits_multiple,
17 interlocked_access1,
18 load_and_trap,
19 load_and_zero_rightmost_byte,
20 load_store_on_cond,
21 load_store_on_cond_2,
22 message_security_assist_extension3,
23 message_security_assist_extension4,
24 message_security_assist_extension5,
25 message_security_assist_extension7,
26 message_security_assist_extension8,
27 message_security_assist_extension9,
28 miscellaneous_extensions,
29 miscellaneous_extensions_2,
30 miscellaneous_extensions_3,
31 population_count,
32 processor_assist,
33 reset_reference_bits_multiple,
34 transactional_execution,
35 vector,
36 vector_enhancements_1,
37 vector_enhancements_2,
38 vector_packed_decimal,
39 vector_packed_decimal_enhancement,
40};
41
42pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
43
44pub const all_features = blk: {
45 const len = @typeInfo(Feature).Enum.fields.len;
46 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
47 var result: [len]Cpu.Feature = undefined;
48 result[@enumToInt(Feature.deflate_conversion)] = .{
49 .llvm_name = "deflate-conversion",
50 .description = "Assume that the deflate-conversion facility is installed",
51 .dependencies = featureSet(&[_]Feature{}),
52 };
53 result[@enumToInt(Feature.dfp_packed_conversion)] = .{
54 .llvm_name = "dfp-packed-conversion",
55 .description = "Assume that the DFP packed-conversion facility is installed",
56 .dependencies = featureSet(&[_]Feature{}),
57 };
58 result[@enumToInt(Feature.dfp_zoned_conversion)] = .{
59 .llvm_name = "dfp-zoned-conversion",
60 .description = "Assume that the DFP zoned-conversion facility is installed",
61 .dependencies = featureSet(&[_]Feature{}),
62 };
63 result[@enumToInt(Feature.distinct_ops)] = .{
64 .llvm_name = "distinct-ops",
65 .description = "Assume that the distinct-operands facility is installed",
66 .dependencies = featureSet(&[_]Feature{}),
67 };
68 result[@enumToInt(Feature.enhanced_dat_2)] = .{
69 .llvm_name = "enhanced-dat-2",
70 .description = "Assume that the enhanced-DAT facility 2 is installed",
71 .dependencies = featureSet(&[_]Feature{}),
72 };
73 result[@enumToInt(Feature.enhanced_sort)] = .{
74 .llvm_name = "enhanced-sort",
75 .description = "Assume that the enhanced-sort facility is installed",
76 .dependencies = featureSet(&[_]Feature{}),
77 };
78 result[@enumToInt(Feature.execution_hint)] = .{
79 .llvm_name = "execution-hint",
80 .description = "Assume that the execution-hint facility is installed",
81 .dependencies = featureSet(&[_]Feature{}),
82 };
83 result[@enumToInt(Feature.fast_serialization)] = .{
84 .llvm_name = "fast-serialization",
85 .description = "Assume that the fast-serialization facility is installed",
86 .dependencies = featureSet(&[_]Feature{}),
87 };
88 result[@enumToInt(Feature.fp_extension)] = .{
89 .llvm_name = "fp-extension",
90 .description = "Assume that the floating-point extension facility is installed",
91 .dependencies = featureSet(&[_]Feature{}),
92 };
93 result[@enumToInt(Feature.guarded_storage)] = .{
94 .llvm_name = "guarded-storage",
95 .description = "Assume that the guarded-storage facility is installed",
96 .dependencies = featureSet(&[_]Feature{}),
97 };
98 result[@enumToInt(Feature.high_word)] = .{
99 .llvm_name = "high-word",
100 .description = "Assume that the high-word facility is installed",
101 .dependencies = featureSet(&[_]Feature{}),
102 };
103 result[@enumToInt(Feature.insert_reference_bits_multiple)] = .{
104 .llvm_name = "insert-reference-bits-multiple",
105 .description = "Assume that the insert-reference-bits-multiple facility is installed",
106 .dependencies = featureSet(&[_]Feature{}),
107 };
108 result[@enumToInt(Feature.interlocked_access1)] = .{
109 .llvm_name = "interlocked-access1",
110 .description = "Assume that interlocked-access facility 1 is installed",
111 .dependencies = featureSet(&[_]Feature{}),
112 };
113 result[@enumToInt(Feature.load_and_trap)] = .{
114 .llvm_name = "load-and-trap",
115 .description = "Assume that the load-and-trap facility is installed",
116 .dependencies = featureSet(&[_]Feature{}),
117 };
118 result[@enumToInt(Feature.load_and_zero_rightmost_byte)] = .{
119 .llvm_name = "load-and-zero-rightmost-byte",
120 .description = "Assume that the load-and-zero-rightmost-byte facility is installed",
121 .dependencies = featureSet(&[_]Feature{}),
122 };
123 result[@enumToInt(Feature.load_store_on_cond)] = .{
124 .llvm_name = "load-store-on-cond",
125 .description = "Assume that the load/store-on-condition facility is installed",
126 .dependencies = featureSet(&[_]Feature{}),
127 };
128 result[@enumToInt(Feature.load_store_on_cond_2)] = .{
129 .llvm_name = "load-store-on-cond-2",
130 .description = "Assume that the load/store-on-condition facility 2 is installed",
131 .dependencies = featureSet(&[_]Feature{}),
132 };
133 result[@enumToInt(Feature.message_security_assist_extension3)] = .{
134 .llvm_name = "message-security-assist-extension3",
135 .description = "Assume that the message-security-assist extension facility 3 is installed",
136 .dependencies = featureSet(&[_]Feature{}),
137 };
138 result[@enumToInt(Feature.message_security_assist_extension4)] = .{
139 .llvm_name = "message-security-assist-extension4",
140 .description = "Assume that the message-security-assist extension facility 4 is installed",
141 .dependencies = featureSet(&[_]Feature{}),
142 };
143 result[@enumToInt(Feature.message_security_assist_extension5)] = .{
144 .llvm_name = "message-security-assist-extension5",
145 .description = "Assume that the message-security-assist extension facility 5 is installed",
146 .dependencies = featureSet(&[_]Feature{}),
147 };
148 result[@enumToInt(Feature.message_security_assist_extension7)] = .{
149 .llvm_name = "message-security-assist-extension7",
150 .description = "Assume that the message-security-assist extension facility 7 is installed",
151 .dependencies = featureSet(&[_]Feature{}),
152 };
153 result[@enumToInt(Feature.message_security_assist_extension8)] = .{
154 .llvm_name = "message-security-assist-extension8",
155 .description = "Assume that the message-security-assist extension facility 8 is installed",
156 .dependencies = featureSet(&[_]Feature{}),
157 };
158 result[@enumToInt(Feature.message_security_assist_extension9)] = .{
159 .llvm_name = "message-security-assist-extension9",
160 .description = "Assume that the message-security-assist extension facility 9 is installed",
161 .dependencies = featureSet(&[_]Feature{}),
162 };
163 result[@enumToInt(Feature.miscellaneous_extensions)] = .{
164 .llvm_name = "miscellaneous-extensions",
165 .description = "Assume that the miscellaneous-extensions facility is installed",
166 .dependencies = featureSet(&[_]Feature{}),
167 };
168 result[@enumToInt(Feature.miscellaneous_extensions_2)] = .{
169 .llvm_name = "miscellaneous-extensions-2",
170 .description = "Assume that the miscellaneous-extensions facility 2 is installed",
171 .dependencies = featureSet(&[_]Feature{}),
172 };
173 result[@enumToInt(Feature.miscellaneous_extensions_3)] = .{
174 .llvm_name = "miscellaneous-extensions-3",
175 .description = "Assume that the miscellaneous-extensions facility 3 is installed",
176 .dependencies = featureSet(&[_]Feature{}),
177 };
178 result[@enumToInt(Feature.population_count)] = .{
179 .llvm_name = "population-count",
180 .description = "Assume that the population-count facility is installed",
181 .dependencies = featureSet(&[_]Feature{}),
182 };
183 result[@enumToInt(Feature.processor_assist)] = .{
184 .llvm_name = "processor-assist",
185 .description = "Assume that the processor-assist facility is installed",
186 .dependencies = featureSet(&[_]Feature{}),
187 };
188 result[@enumToInt(Feature.reset_reference_bits_multiple)] = .{
189 .llvm_name = "reset-reference-bits-multiple",
190 .description = "Assume that the reset-reference-bits-multiple facility is installed",
191 .dependencies = featureSet(&[_]Feature{}),
192 };
193 result[@enumToInt(Feature.transactional_execution)] = .{
194 .llvm_name = "transactional-execution",
195 .description = "Assume that the transactional-execution facility is installed",
196 .dependencies = featureSet(&[_]Feature{}),
197 };
198 result[@enumToInt(Feature.vector)] = .{
199 .llvm_name = "vector",
200 .description = "Assume that the vectory facility is installed",
201 .dependencies = featureSet(&[_]Feature{}),
202 };
203 result[@enumToInt(Feature.vector_enhancements_1)] = .{
204 .llvm_name = "vector-enhancements-1",
205 .description = "Assume that the vector enhancements facility 1 is installed",
206 .dependencies = featureSet(&[_]Feature{}),
207 };
208 result[@enumToInt(Feature.vector_enhancements_2)] = .{
209 .llvm_name = "vector-enhancements-2",
210 .description = "Assume that the vector enhancements facility 2 is installed",
211 .dependencies = featureSet(&[_]Feature{}),
212 };
213 result[@enumToInt(Feature.vector_packed_decimal)] = .{
214 .llvm_name = "vector-packed-decimal",
215 .description = "Assume that the vector packed decimal facility is installed",
216 .dependencies = featureSet(&[_]Feature{}),
217 };
218 result[@enumToInt(Feature.vector_packed_decimal_enhancement)] = .{
219 .llvm_name = "vector-packed-decimal-enhancement",
220 .description = "Assume that the vector packed decimal enhancement facility is installed",
221 .dependencies = featureSet(&[_]Feature{}),
222 };
223 const ti = @typeInfo(Feature);
224 for (result) |*elem, i| {
225 elem.index = i;
226 elem.name = ti.Enum.fields[i].name;
227 }
228 break :blk result;
229};
230
231pub const cpu = struct {
232 pub const arch10 = Cpu{
233 .name = "arch10",
234 .llvm_name = "arch10",
235 .features = featureSet(&[_]Feature{
236 .dfp_zoned_conversion,
237 .distinct_ops,
238 .enhanced_dat_2,
239 .execution_hint,
240 .fast_serialization,
241 .fp_extension,
242 .high_word,
243 .interlocked_access1,
244 .load_and_trap,
245 .load_store_on_cond,
246 .message_security_assist_extension3,
247 .message_security_assist_extension4,
248 .miscellaneous_extensions,
249 .population_count,
250 .processor_assist,
251 .reset_reference_bits_multiple,
252 .transactional_execution,
253 }),
254 };
255 pub const arch11 = Cpu{
256 .name = "arch11",
257 .llvm_name = "arch11",
258 .features = featureSet(&[_]Feature{
259 .dfp_packed_conversion,
260 .dfp_zoned_conversion,
261 .distinct_ops,
262 .enhanced_dat_2,
263 .execution_hint,
264 .fast_serialization,
265 .fp_extension,
266 .high_word,
267 .interlocked_access1,
268 .load_and_trap,
269 .load_and_zero_rightmost_byte,
270 .load_store_on_cond,
271 .load_store_on_cond_2,
272 .message_security_assist_extension3,
273 .message_security_assist_extension4,
274 .message_security_assist_extension5,
275 .miscellaneous_extensions,
276 .population_count,
277 .processor_assist,
278 .reset_reference_bits_multiple,
279 .transactional_execution,
280 .vector,
281 }),
282 };
283 pub const arch12 = Cpu{
284 .name = "arch12",
285 .llvm_name = "arch12",
286 .features = featureSet(&[_]Feature{
287 .dfp_packed_conversion,
288 .dfp_zoned_conversion,
289 .distinct_ops,
290 .enhanced_dat_2,
291 .execution_hint,
292 .fast_serialization,
293 .fp_extension,
294 .guarded_storage,
295 .high_word,
296 .insert_reference_bits_multiple,
297 .interlocked_access1,
298 .load_and_trap,
299 .load_and_zero_rightmost_byte,
300 .load_store_on_cond,
301 .load_store_on_cond_2,
302 .message_security_assist_extension3,
303 .message_security_assist_extension4,
304 .message_security_assist_extension5,
305 .message_security_assist_extension7,
306 .message_security_assist_extension8,
307 .miscellaneous_extensions,
308 .miscellaneous_extensions_2,
309 .population_count,
310 .processor_assist,
311 .reset_reference_bits_multiple,
312 .transactional_execution,
313 .vector,
314 .vector_enhancements_1,
315 .vector_packed_decimal,
316 }),
317 };
318 pub const arch13 = Cpu{
319 .name = "arch13",
320 .llvm_name = "arch13",
321 .features = featureSet(&[_]Feature{
322 .deflate_conversion,
323 .dfp_packed_conversion,
324 .dfp_zoned_conversion,
325 .distinct_ops,
326 .enhanced_dat_2,
327 .enhanced_sort,
328 .execution_hint,
329 .fast_serialization,
330 .fp_extension,
331 .guarded_storage,
332 .high_word,
333 .insert_reference_bits_multiple,
334 .interlocked_access1,
335 .load_and_trap,
336 .load_and_zero_rightmost_byte,
337 .load_store_on_cond,
338 .load_store_on_cond_2,
339 .message_security_assist_extension3,
340 .message_security_assist_extension4,
341 .message_security_assist_extension5,
342 .message_security_assist_extension7,
343 .message_security_assist_extension8,
344 .message_security_assist_extension9,
345 .miscellaneous_extensions,
346 .miscellaneous_extensions_2,
347 .miscellaneous_extensions_3,
348 .population_count,
349 .processor_assist,
350 .reset_reference_bits_multiple,
351 .transactional_execution,
352 .vector,
353 .vector_enhancements_1,
354 .vector_enhancements_2,
355 .vector_packed_decimal,
356 .vector_packed_decimal_enhancement,
357 }),
358 };
359 pub const arch8 = Cpu{
360 .name = "arch8",
361 .llvm_name = "arch8",
362 .features = featureSet(&[_]Feature{}),
363 };
364 pub const arch9 = Cpu{
365 .name = "arch9",
366 .llvm_name = "arch9",
367 .features = featureSet(&[_]Feature{
368 .distinct_ops,
369 .fast_serialization,
370 .fp_extension,
371 .high_word,
372 .interlocked_access1,
373 .load_store_on_cond,
374 .message_security_assist_extension3,
375 .message_security_assist_extension4,
376 .population_count,
377 .reset_reference_bits_multiple,
378 }),
379 };
380 pub const generic = Cpu{
381 .name = "generic",
382 .llvm_name = "generic",
383 .features = featureSet(&[_]Feature{}),
384 };
385 pub const z10 = Cpu{
386 .name = "z10",
387 .llvm_name = "z10",
388 .features = featureSet(&[_]Feature{}),
389 };
390 pub const z13 = Cpu{
391 .name = "z13",
392 .llvm_name = "z13",
393 .features = featureSet(&[_]Feature{
394 .dfp_packed_conversion,
395 .dfp_zoned_conversion,
396 .distinct_ops,
397 .enhanced_dat_2,
398 .execution_hint,
399 .fast_serialization,
400 .fp_extension,
401 .high_word,
402 .interlocked_access1,
403 .load_and_trap,
404 .load_and_zero_rightmost_byte,
405 .load_store_on_cond,
406 .load_store_on_cond_2,
407 .message_security_assist_extension3,
408 .message_security_assist_extension4,
409 .message_security_assist_extension5,
410 .miscellaneous_extensions,
411 .population_count,
412 .processor_assist,
413 .reset_reference_bits_multiple,
414 .transactional_execution,
415 .vector,
416 }),
417 };
418 pub const z14 = Cpu{
419 .name = "z14",
420 .llvm_name = "z14",
421 .features = featureSet(&[_]Feature{
422 .dfp_packed_conversion,
423 .dfp_zoned_conversion,
424 .distinct_ops,
425 .enhanced_dat_2,
426 .execution_hint,
427 .fast_serialization,
428 .fp_extension,
429 .guarded_storage,
430 .high_word,
431 .insert_reference_bits_multiple,
432 .interlocked_access1,
433 .load_and_trap,
434 .load_and_zero_rightmost_byte,
435 .load_store_on_cond,
436 .load_store_on_cond_2,
437 .message_security_assist_extension3,
438 .message_security_assist_extension4,
439 .message_security_assist_extension5,
440 .message_security_assist_extension7,
441 .message_security_assist_extension8,
442 .miscellaneous_extensions,
443 .miscellaneous_extensions_2,
444 .population_count,
445 .processor_assist,
446 .reset_reference_bits_multiple,
447 .transactional_execution,
448 .vector,
449 .vector_enhancements_1,
450 .vector_packed_decimal,
451 }),
452 };
453 pub const z196 = Cpu{
454 .name = "z196",
455 .llvm_name = "z196",
456 .features = featureSet(&[_]Feature{
457 .distinct_ops,
458 .fast_serialization,
459 .fp_extension,
460 .high_word,
461 .interlocked_access1,
462 .load_store_on_cond,
463 .message_security_assist_extension3,
464 .message_security_assist_extension4,
465 .population_count,
466 .reset_reference_bits_multiple,
467 }),
468 };
469 pub const zEC12 = Cpu{
470 .name = "zEC12",
471 .llvm_name = "zEC12",
472 .features = featureSet(&[_]Feature{
473 .dfp_zoned_conversion,
474 .distinct_ops,
475 .enhanced_dat_2,
476 .execution_hint,
477 .fast_serialization,
478 .fp_extension,
479 .high_word,
480 .interlocked_access1,
481 .load_and_trap,
482 .load_store_on_cond,
483 .message_security_assist_extension3,
484 .message_security_assist_extension4,
485 .miscellaneous_extensions,
486 .population_count,
487 .processor_assist,
488 .reset_reference_bits_multiple,
489 .transactional_execution,
490 }),
491 };
492};
493
494/// All systemz CPUs, sorted alphabetically by name.
495/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
496/// compiler has inefficient memory and CPU usage, affecting build times.
497pub const all_cpus = &[_]*const Cpu{
498 &cpu.arch10,
499 &cpu.arch11,
500 &cpu.arch12,
501 &cpu.arch13,
502 &cpu.arch8,
503 &cpu.arch9,
504 &cpu.generic,
505 &cpu.z10,
506 &cpu.z13,
507 &cpu.z14,
508 &cpu.z196,
509 &cpu.zEC12,
510};
lib/std/target/wasm.zig created+114
......@@ -0,0 +1,114 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 atomics,
6 bulk_memory,
7 exception_handling,
8 multivalue,
9 mutable_globals,
10 nontrapping_fptoint,
11 sign_ext,
12 simd128,
13 tail_call,
14 unimplemented_simd128,
15};
16
17pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
18
19pub const all_features = blk: {
20 const len = @typeInfo(Feature).Enum.fields.len;
21 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
22 var result: [len]Cpu.Feature = undefined;
23 result[@enumToInt(Feature.atomics)] = .{
24 .llvm_name = "atomics",
25 .description = "Enable Atomics",
26 .dependencies = featureSet(&[_]Feature{}),
27 };
28 result[@enumToInt(Feature.bulk_memory)] = .{
29 .llvm_name = "bulk-memory",
30 .description = "Enable bulk memory operations",
31 .dependencies = featureSet(&[_]Feature{}),
32 };
33 result[@enumToInt(Feature.exception_handling)] = .{
34 .llvm_name = "exception-handling",
35 .description = "Enable Wasm exception handling",
36 .dependencies = featureSet(&[_]Feature{}),
37 };
38 result[@enumToInt(Feature.multivalue)] = .{
39 .llvm_name = "multivalue",
40 .description = "Enable multivalue blocks, instructions, and functions",
41 .dependencies = featureSet(&[_]Feature{}),
42 };
43 result[@enumToInt(Feature.mutable_globals)] = .{
44 .llvm_name = "mutable-globals",
45 .description = "Enable mutable globals",
46 .dependencies = featureSet(&[_]Feature{}),
47 };
48 result[@enumToInt(Feature.nontrapping_fptoint)] = .{
49 .llvm_name = "nontrapping-fptoint",
50 .description = "Enable non-trapping float-to-int conversion operators",
51 .dependencies = featureSet(&[_]Feature{}),
52 };
53 result[@enumToInt(Feature.sign_ext)] = .{
54 .llvm_name = "sign-ext",
55 .description = "Enable sign extension operators",
56 .dependencies = featureSet(&[_]Feature{}),
57 };
58 result[@enumToInt(Feature.simd128)] = .{
59 .llvm_name = "simd128",
60 .description = "Enable 128-bit SIMD",
61 .dependencies = featureSet(&[_]Feature{}),
62 };
63 result[@enumToInt(Feature.tail_call)] = .{
64 .llvm_name = "tail-call",
65 .description = "Enable tail call instructions",
66 .dependencies = featureSet(&[_]Feature{}),
67 };
68 result[@enumToInt(Feature.unimplemented_simd128)] = .{
69 .llvm_name = "unimplemented-simd128",
70 .description = "Enable 128-bit SIMD not yet implemented in engines",
71 .dependencies = featureSet(&[_]Feature{
72 .simd128,
73 }),
74 };
75 const ti = @typeInfo(Feature);
76 for (result) |*elem, i| {
77 elem.index = i;
78 elem.name = ti.Enum.fields[i].name;
79 }
80 break :blk result;
81};
82
83pub const cpu = struct {
84 pub const bleeding_edge = Cpu{
85 .name = "bleeding_edge",
86 .llvm_name = "bleeding-edge",
87 .features = featureSet(&[_]Feature{
88 .atomics,
89 .mutable_globals,
90 .nontrapping_fptoint,
91 .sign_ext,
92 .simd128,
93 }),
94 };
95 pub const generic = Cpu{
96 .name = "generic",
97 .llvm_name = "generic",
98 .features = featureSet(&[_]Feature{}),
99 };
100 pub const mvp = Cpu{
101 .name = "mvp",
102 .llvm_name = "mvp",
103 .features = featureSet(&[_]Feature{}),
104 };
105};
106
107/// All wasm CPUs, sorted alphabetically by name.
108/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
109/// compiler has inefficient memory and CPU usage, affecting build times.
110pub const all_cpus = &[_]*const Cpu{
111 &cpu.bleeding_edge,
112 &cpu.generic,
113 &cpu.mvp,
114};
lib/std/target/x86.zig created+2859
......@@ -0,0 +1,2859 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 @"3dnow",
6 @"3dnowa",
7 @"64bit",
8 adx,
9 aes,
10 avx,
11 avx2,
12 avx512bf16,
13 avx512bitalg,
14 avx512bw,
15 avx512cd,
16 avx512dq,
17 avx512er,
18 avx512f,
19 avx512ifma,
20 avx512pf,
21 avx512vbmi,
22 avx512vbmi2,
23 avx512vl,
24 avx512vnni,
25 avx512vp2intersect,
26 avx512vpopcntdq,
27 bmi,
28 bmi2,
29 branchfusion,
30 cldemote,
31 clflushopt,
32 clwb,
33 clzero,
34 cmov,
35 cx16,
36 cx8,
37 enqcmd,
38 ermsb,
39 f16c,
40 false_deps_lzcnt_tzcnt,
41 false_deps_popcnt,
42 fast_11bytenop,
43 fast_15bytenop,
44 fast_bextr,
45 fast_gather,
46 fast_hops,
47 fast_lzcnt,
48 fast_partial_ymm_or_zmm_write,
49 fast_scalar_fsqrt,
50 fast_scalar_shift_masks,
51 fast_shld_rotate,
52 fast_variable_shuffle,
53 fast_vector_fsqrt,
54 fast_vector_shift_masks,
55 fma,
56 fma4,
57 fsgsbase,
58 fxsr,
59 gfni,
60 idivl_to_divb,
61 idivq_to_divl,
62 invpcid,
63 lea_sp,
64 lea_uses_ag,
65 lwp,
66 lzcnt,
67 macrofusion,
68 merge_to_threeway_branch,
69 mmx,
70 movbe,
71 movdir64b,
72 movdiri,
73 mpx,
74 mwaitx,
75 nopl,
76 pad_short_functions,
77 pclmul,
78 pconfig,
79 pku,
80 popcnt,
81 prefer_256_bit,
82 prefetchwt1,
83 prfchw,
84 ptwrite,
85 rdpid,
86 rdrnd,
87 rdseed,
88 retpoline,
89 retpoline_external_thunk,
90 retpoline_indirect_branches,
91 retpoline_indirect_calls,
92 rtm,
93 sahf,
94 sgx,
95 sha,
96 shstk,
97 slow_3ops_lea,
98 slow_incdec,
99 slow_lea,
100 slow_pmaddwd,
101 slow_pmulld,
102 slow_shld,
103 slow_two_mem_ops,
104 slow_unaligned_mem_16,
105 slow_unaligned_mem_32,
106 soft_float,
107 sse,
108 sse_unaligned_mem,
109 sse2,
110 sse3,
111 sse4_1,
112 sse4_2,
113 sse4a,
114 ssse3,
115 tbm,
116 vaes,
117 vpclmulqdq,
118 waitpkg,
119 wbnoinvd,
120 x87,
121 xop,
122 xsave,
123 xsavec,
124 xsaveopt,
125 xsaves,
126};
127
128pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
129
130pub const all_features = blk: {
131 const len = @typeInfo(Feature).Enum.fields.len;
132 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
133 var result: [len]Cpu.Feature = undefined;
134 result[@enumToInt(Feature.@"3dnow")] = .{
135 .llvm_name = "3dnow",
136 .description = "Enable 3DNow! instructions",
137 .dependencies = featureSet(&[_]Feature{
138 .mmx,
139 }),
140 };
141 result[@enumToInt(Feature.@"3dnowa")] = .{
142 .llvm_name = "3dnowa",
143 .description = "Enable 3DNow! Athlon instructions",
144 .dependencies = featureSet(&[_]Feature{
145 .@"3dnow",
146 }),
147 };
148 result[@enumToInt(Feature.@"64bit")] = .{
149 .llvm_name = "64bit",
150 .description = "Support 64-bit instructions",
151 .dependencies = featureSet(&[_]Feature{}),
152 };
153 result[@enumToInt(Feature.adx)] = .{
154 .llvm_name = "adx",
155 .description = "Support ADX instructions",
156 .dependencies = featureSet(&[_]Feature{}),
157 };
158 result[@enumToInt(Feature.aes)] = .{
159 .llvm_name = "aes",
160 .description = "Enable AES instructions",
161 .dependencies = featureSet(&[_]Feature{
162 .sse2,
163 }),
164 };
165 result[@enumToInt(Feature.avx)] = .{
166 .llvm_name = "avx",
167 .description = "Enable AVX instructions",
168 .dependencies = featureSet(&[_]Feature{
169 .sse4_2,
170 }),
171 };
172 result[@enumToInt(Feature.avx2)] = .{
173 .llvm_name = "avx2",
174 .description = "Enable AVX2 instructions",
175 .dependencies = featureSet(&[_]Feature{
176 .avx,
177 }),
178 };
179 result[@enumToInt(Feature.avx512bf16)] = .{
180 .llvm_name = "avx512bf16",
181 .description = "Support bfloat16 floating point",
182 .dependencies = featureSet(&[_]Feature{
183 .avx512bw,
184 }),
185 };
186 result[@enumToInt(Feature.avx512bitalg)] = .{
187 .llvm_name = "avx512bitalg",
188 .description = "Enable AVX-512 Bit Algorithms",
189 .dependencies = featureSet(&[_]Feature{
190 .avx512bw,
191 }),
192 };
193 result[@enumToInt(Feature.avx512bw)] = .{
194 .llvm_name = "avx512bw",
195 .description = "Enable AVX-512 Byte and Word Instructions",
196 .dependencies = featureSet(&[_]Feature{
197 .avx512f,
198 }),
199 };
200 result[@enumToInt(Feature.avx512cd)] = .{
201 .llvm_name = "avx512cd",
202 .description = "Enable AVX-512 Conflict Detection Instructions",
203 .dependencies = featureSet(&[_]Feature{
204 .avx512f,
205 }),
206 };
207 result[@enumToInt(Feature.avx512dq)] = .{
208 .llvm_name = "avx512dq",
209 .description = "Enable AVX-512 Doubleword and Quadword Instructions",
210 .dependencies = featureSet(&[_]Feature{
211 .avx512f,
212 }),
213 };
214 result[@enumToInt(Feature.avx512er)] = .{
215 .llvm_name = "avx512er",
216 .description = "Enable AVX-512 Exponential and Reciprocal Instructions",
217 .dependencies = featureSet(&[_]Feature{
218 .avx512f,
219 }),
220 };
221 result[@enumToInt(Feature.avx512f)] = .{
222 .llvm_name = "avx512f",
223 .description = "Enable AVX-512 instructions",
224 .dependencies = featureSet(&[_]Feature{
225 .avx2,
226 .f16c,
227 .fma,
228 }),
229 };
230 result[@enumToInt(Feature.avx512ifma)] = .{
231 .llvm_name = "avx512ifma",
232 .description = "Enable AVX-512 Integer Fused Multiple-Add",
233 .dependencies = featureSet(&[_]Feature{
234 .avx512f,
235 }),
236 };
237 result[@enumToInt(Feature.avx512pf)] = .{
238 .llvm_name = "avx512pf",
239 .description = "Enable AVX-512 PreFetch Instructions",
240 .dependencies = featureSet(&[_]Feature{
241 .avx512f,
242 }),
243 };
244 result[@enumToInt(Feature.avx512vbmi)] = .{
245 .llvm_name = "avx512vbmi",
246 .description = "Enable AVX-512 Vector Byte Manipulation Instructions",
247 .dependencies = featureSet(&[_]Feature{
248 .avx512bw,
249 }),
250 };
251 result[@enumToInt(Feature.avx512vbmi2)] = .{
252 .llvm_name = "avx512vbmi2",
253 .description = "Enable AVX-512 further Vector Byte Manipulation Instructions",
254 .dependencies = featureSet(&[_]Feature{
255 .avx512bw,
256 }),
257 };
258 result[@enumToInt(Feature.avx512vl)] = .{
259 .llvm_name = "avx512vl",
260 .description = "Enable AVX-512 Vector Length eXtensions",
261 .dependencies = featureSet(&[_]Feature{
262 .avx512f,
263 }),
264 };
265 result[@enumToInt(Feature.avx512vnni)] = .{
266 .llvm_name = "avx512vnni",
267 .description = "Enable AVX-512 Vector Neural Network Instructions",
268 .dependencies = featureSet(&[_]Feature{
269 .avx512f,
270 }),
271 };
272 result[@enumToInt(Feature.avx512vp2intersect)] = .{
273 .llvm_name = "avx512vp2intersect",
274 .description = "Enable AVX-512 vp2intersect",
275 .dependencies = featureSet(&[_]Feature{
276 .avx512f,
277 }),
278 };
279 result[@enumToInt(Feature.avx512vpopcntdq)] = .{
280 .llvm_name = "avx512vpopcntdq",
281 .description = "Enable AVX-512 Population Count Instructions",
282 .dependencies = featureSet(&[_]Feature{
283 .avx512f,
284 }),
285 };
286 result[@enumToInt(Feature.bmi)] = .{
287 .llvm_name = "bmi",
288 .description = "Support BMI instructions",
289 .dependencies = featureSet(&[_]Feature{}),
290 };
291 result[@enumToInt(Feature.bmi2)] = .{
292 .llvm_name = "bmi2",
293 .description = "Support BMI2 instructions",
294 .dependencies = featureSet(&[_]Feature{}),
295 };
296 result[@enumToInt(Feature.branchfusion)] = .{
297 .llvm_name = "branchfusion",
298 .description = "CMP/TEST can be fused with conditional branches",
299 .dependencies = featureSet(&[_]Feature{}),
300 };
301 result[@enumToInt(Feature.cldemote)] = .{
302 .llvm_name = "cldemote",
303 .description = "Enable Cache Demote",
304 .dependencies = featureSet(&[_]Feature{}),
305 };
306 result[@enumToInt(Feature.clflushopt)] = .{
307 .llvm_name = "clflushopt",
308 .description = "Flush A Cache Line Optimized",
309 .dependencies = featureSet(&[_]Feature{}),
310 };
311 result[@enumToInt(Feature.clwb)] = .{
312 .llvm_name = "clwb",
313 .description = "Cache Line Write Back",
314 .dependencies = featureSet(&[_]Feature{}),
315 };
316 result[@enumToInt(Feature.clzero)] = .{
317 .llvm_name = "clzero",
318 .description = "Enable Cache Line Zero",
319 .dependencies = featureSet(&[_]Feature{}),
320 };
321 result[@enumToInt(Feature.cmov)] = .{
322 .llvm_name = "cmov",
323 .description = "Enable conditional move instructions",
324 .dependencies = featureSet(&[_]Feature{}),
325 };
326 result[@enumToInt(Feature.cx16)] = .{
327 .llvm_name = "cx16",
328 .description = "64-bit with cmpxchg16b",
329 .dependencies = featureSet(&[_]Feature{
330 .cx8,
331 }),
332 };
333 result[@enumToInt(Feature.cx8)] = .{
334 .llvm_name = "cx8",
335 .description = "Support CMPXCHG8B instructions",
336 .dependencies = featureSet(&[_]Feature{}),
337 };
338 result[@enumToInt(Feature.enqcmd)] = .{
339 .llvm_name = "enqcmd",
340 .description = "Has ENQCMD instructions",
341 .dependencies = featureSet(&[_]Feature{}),
342 };
343 result[@enumToInt(Feature.ermsb)] = .{
344 .llvm_name = "ermsb",
345 .description = "REP MOVS/STOS are fast",
346 .dependencies = featureSet(&[_]Feature{}),
347 };
348 result[@enumToInt(Feature.f16c)] = .{
349 .llvm_name = "f16c",
350 .description = "Support 16-bit floating point conversion instructions",
351 .dependencies = featureSet(&[_]Feature{
352 .avx,
353 }),
354 };
355 result[@enumToInt(Feature.false_deps_lzcnt_tzcnt)] = .{
356 .llvm_name = "false-deps-lzcnt-tzcnt",
357 .description = "LZCNT/TZCNT have a false dependency on dest register",
358 .dependencies = featureSet(&[_]Feature{}),
359 };
360 result[@enumToInt(Feature.false_deps_popcnt)] = .{
361 .llvm_name = "false-deps-popcnt",
362 .description = "POPCNT has a false dependency on dest register",
363 .dependencies = featureSet(&[_]Feature{}),
364 };
365 result[@enumToInt(Feature.fast_11bytenop)] = .{
366 .llvm_name = "fast-11bytenop",
367 .description = "Target can quickly decode up to 11 byte NOPs",
368 .dependencies = featureSet(&[_]Feature{}),
369 };
370 result[@enumToInt(Feature.fast_15bytenop)] = .{
371 .llvm_name = "fast-15bytenop",
372 .description = "Target can quickly decode up to 15 byte NOPs",
373 .dependencies = featureSet(&[_]Feature{}),
374 };
375 result[@enumToInt(Feature.fast_bextr)] = .{
376 .llvm_name = "fast-bextr",
377 .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",
378 .dependencies = featureSet(&[_]Feature{}),
379 };
380 result[@enumToInt(Feature.fast_gather)] = .{
381 .llvm_name = "fast-gather",
382 .description = "Indicates if gather is reasonably fast",
383 .dependencies = featureSet(&[_]Feature{}),
384 };
385 result[@enumToInt(Feature.fast_hops)] = .{
386 .llvm_name = "fast-hops",
387 .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",
388 .dependencies = featureSet(&[_]Feature{
389 .sse3,
390 }),
391 };
392 result[@enumToInt(Feature.fast_lzcnt)] = .{
393 .llvm_name = "fast-lzcnt",
394 .description = "LZCNT instructions are as fast as most simple integer ops",
395 .dependencies = featureSet(&[_]Feature{}),
396 };
397 result[@enumToInt(Feature.fast_partial_ymm_or_zmm_write)] = .{
398 .llvm_name = "fast-partial-ymm-or-zmm-write",
399 .description = "Partial writes to YMM/ZMM registers are fast",
400 .dependencies = featureSet(&[_]Feature{}),
401 };
402 result[@enumToInt(Feature.fast_scalar_fsqrt)] = .{
403 .llvm_name = "fast-scalar-fsqrt",
404 .description = "Scalar SQRT is fast (disable Newton-Raphson)",
405 .dependencies = featureSet(&[_]Feature{}),
406 };
407 result[@enumToInt(Feature.fast_scalar_shift_masks)] = .{
408 .llvm_name = "fast-scalar-shift-masks",
409 .description = "Prefer a left/right scalar logical shift pair over a shift+and pair",
410 .dependencies = featureSet(&[_]Feature{}),
411 };
412 result[@enumToInt(Feature.fast_shld_rotate)] = .{
413 .llvm_name = "fast-shld-rotate",
414 .description = "SHLD can be used as a faster rotate",
415 .dependencies = featureSet(&[_]Feature{}),
416 };
417 result[@enumToInt(Feature.fast_variable_shuffle)] = .{
418 .llvm_name = "fast-variable-shuffle",
419 .description = "Shuffles with variable masks are fast",
420 .dependencies = featureSet(&[_]Feature{}),
421 };
422 result[@enumToInt(Feature.fast_vector_fsqrt)] = .{
423 .llvm_name = "fast-vector-fsqrt",
424 .description = "Vector SQRT is fast (disable Newton-Raphson)",
425 .dependencies = featureSet(&[_]Feature{}),
426 };
427 result[@enumToInt(Feature.fast_vector_shift_masks)] = .{
428 .llvm_name = "fast-vector-shift-masks",
429 .description = "Prefer a left/right vector logical shift pair over a shift+and pair",
430 .dependencies = featureSet(&[_]Feature{}),
431 };
432 result[@enumToInt(Feature.fma)] = .{
433 .llvm_name = "fma",
434 .description = "Enable three-operand fused multiple-add",
435 .dependencies = featureSet(&[_]Feature{
436 .avx,
437 }),
438 };
439 result[@enumToInt(Feature.fma4)] = .{
440 .llvm_name = "fma4",
441 .description = "Enable four-operand fused multiple-add",
442 .dependencies = featureSet(&[_]Feature{
443 .avx,
444 .sse4a,
445 }),
446 };
447 result[@enumToInt(Feature.fsgsbase)] = .{
448 .llvm_name = "fsgsbase",
449 .description = "Support FS/GS Base instructions",
450 .dependencies = featureSet(&[_]Feature{}),
451 };
452 result[@enumToInt(Feature.fxsr)] = .{
453 .llvm_name = "fxsr",
454 .description = "Support fxsave/fxrestore instructions",
455 .dependencies = featureSet(&[_]Feature{}),
456 };
457 result[@enumToInt(Feature.gfni)] = .{
458 .llvm_name = "gfni",
459 .description = "Enable Galois Field Arithmetic Instructions",
460 .dependencies = featureSet(&[_]Feature{
461 .sse2,
462 }),
463 };
464 result[@enumToInt(Feature.idivl_to_divb)] = .{
465 .llvm_name = "idivl-to-divb",
466 .description = "Use 8-bit divide for positive values less than 256",
467 .dependencies = featureSet(&[_]Feature{}),
468 };
469 result[@enumToInt(Feature.idivq_to_divl)] = .{
470 .llvm_name = "idivq-to-divl",
471 .description = "Use 32-bit divide for positive values less than 2^32",
472 .dependencies = featureSet(&[_]Feature{}),
473 };
474 result[@enumToInt(Feature.invpcid)] = .{
475 .llvm_name = "invpcid",
476 .description = "Invalidate Process-Context Identifier",
477 .dependencies = featureSet(&[_]Feature{}),
478 };
479 result[@enumToInt(Feature.lea_sp)] = .{
480 .llvm_name = "lea-sp",
481 .description = "Use LEA for adjusting the stack pointer",
482 .dependencies = featureSet(&[_]Feature{}),
483 };
484 result[@enumToInt(Feature.lea_uses_ag)] = .{
485 .llvm_name = "lea-uses-ag",
486 .description = "LEA instruction needs inputs at AG stage",
487 .dependencies = featureSet(&[_]Feature{}),
488 };
489 result[@enumToInt(Feature.lwp)] = .{
490 .llvm_name = "lwp",
491 .description = "Enable LWP instructions",
492 .dependencies = featureSet(&[_]Feature{}),
493 };
494 result[@enumToInt(Feature.lzcnt)] = .{
495 .llvm_name = "lzcnt",
496 .description = "Support LZCNT instruction",
497 .dependencies = featureSet(&[_]Feature{}),
498 };
499 result[@enumToInt(Feature.macrofusion)] = .{
500 .llvm_name = "macrofusion",
501 .description = "Various instructions can be fused with conditional branches",
502 .dependencies = featureSet(&[_]Feature{}),
503 };
504 result[@enumToInt(Feature.merge_to_threeway_branch)] = .{
505 .llvm_name = "merge-to-threeway-branch",
506 .description = "Merge branches to a three-way conditional branch",
507 .dependencies = featureSet(&[_]Feature{}),
508 };
509 result[@enumToInt(Feature.mmx)] = .{
510 .llvm_name = "mmx",
511 .description = "Enable MMX instructions",
512 .dependencies = featureSet(&[_]Feature{}),
513 };
514 result[@enumToInt(Feature.movbe)] = .{
515 .llvm_name = "movbe",
516 .description = "Support MOVBE instruction",
517 .dependencies = featureSet(&[_]Feature{}),
518 };
519 result[@enumToInt(Feature.movdir64b)] = .{
520 .llvm_name = "movdir64b",
521 .description = "Support movdir64b instruction",
522 .dependencies = featureSet(&[_]Feature{}),
523 };
524 result[@enumToInt(Feature.movdiri)] = .{
525 .llvm_name = "movdiri",
526 .description = "Support movdiri instruction",
527 .dependencies = featureSet(&[_]Feature{}),
528 };
529 result[@enumToInt(Feature.mpx)] = .{
530 .llvm_name = "mpx",
531 .description = "Support MPX instructions",
532 .dependencies = featureSet(&[_]Feature{}),
533 };
534 result[@enumToInt(Feature.mwaitx)] = .{
535 .llvm_name = "mwaitx",
536 .description = "Enable MONITORX/MWAITX timer functionality",
537 .dependencies = featureSet(&[_]Feature{}),
538 };
539 result[@enumToInt(Feature.nopl)] = .{
540 .llvm_name = "nopl",
541 .description = "Enable NOPL instruction",
542 .dependencies = featureSet(&[_]Feature{}),
543 };
544 result[@enumToInt(Feature.pad_short_functions)] = .{
545 .llvm_name = "pad-short-functions",
546 .description = "Pad short functions",
547 .dependencies = featureSet(&[_]Feature{}),
548 };
549 result[@enumToInt(Feature.pclmul)] = .{
550 .llvm_name = "pclmul",
551 .description = "Enable packed carry-less multiplication instructions",
552 .dependencies = featureSet(&[_]Feature{
553 .sse2,
554 }),
555 };
556 result[@enumToInt(Feature.pconfig)] = .{
557 .llvm_name = "pconfig",
558 .description = "platform configuration instruction",
559 .dependencies = featureSet(&[_]Feature{}),
560 };
561 result[@enumToInt(Feature.pku)] = .{
562 .llvm_name = "pku",
563 .description = "Enable protection keys",
564 .dependencies = featureSet(&[_]Feature{}),
565 };
566 result[@enumToInt(Feature.popcnt)] = .{
567 .llvm_name = "popcnt",
568 .description = "Support POPCNT instruction",
569 .dependencies = featureSet(&[_]Feature{}),
570 };
571 result[@enumToInt(Feature.prefer_256_bit)] = .{
572 .llvm_name = "prefer-256-bit",
573 .description = "Prefer 256-bit AVX instructions",
574 .dependencies = featureSet(&[_]Feature{}),
575 };
576 result[@enumToInt(Feature.prefetchwt1)] = .{
577 .llvm_name = "prefetchwt1",
578 .description = "Prefetch with Intent to Write and T1 Hint",
579 .dependencies = featureSet(&[_]Feature{}),
580 };
581 result[@enumToInt(Feature.prfchw)] = .{
582 .llvm_name = "prfchw",
583 .description = "Support PRFCHW instructions",
584 .dependencies = featureSet(&[_]Feature{}),
585 };
586 result[@enumToInt(Feature.ptwrite)] = .{
587 .llvm_name = "ptwrite",
588 .description = "Support ptwrite instruction",
589 .dependencies = featureSet(&[_]Feature{}),
590 };
591 result[@enumToInt(Feature.rdpid)] = .{
592 .llvm_name = "rdpid",
593 .description = "Support RDPID instructions",
594 .dependencies = featureSet(&[_]Feature{}),
595 };
596 result[@enumToInt(Feature.rdrnd)] = .{
597 .llvm_name = "rdrnd",
598 .description = "Support RDRAND instruction",
599 .dependencies = featureSet(&[_]Feature{}),
600 };
601 result[@enumToInt(Feature.rdseed)] = .{
602 .llvm_name = "rdseed",
603 .description = "Support RDSEED instruction",
604 .dependencies = featureSet(&[_]Feature{}),
605 };
606 result[@enumToInt(Feature.retpoline)] = .{
607 .llvm_name = "retpoline",
608 .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct",
609 .dependencies = featureSet(&[_]Feature{
610 .retpoline_indirect_branches,
611 .retpoline_indirect_calls,
612 }),
613 };
614 result[@enumToInt(Feature.retpoline_external_thunk)] = .{
615 .llvm_name = "retpoline-external-thunk",
616 .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature",
617 .dependencies = featureSet(&[_]Feature{
618 .retpoline_indirect_calls,
619 }),
620 };
621 result[@enumToInt(Feature.retpoline_indirect_branches)] = .{
622 .llvm_name = "retpoline-indirect-branches",
623 .description = "Remove speculation of indirect branches from the generated code",
624 .dependencies = featureSet(&[_]Feature{}),
625 };
626 result[@enumToInt(Feature.retpoline_indirect_calls)] = .{
627 .llvm_name = "retpoline-indirect-calls",
628 .description = "Remove speculation of indirect calls from the generated code",
629 .dependencies = featureSet(&[_]Feature{}),
630 };
631 result[@enumToInt(Feature.rtm)] = .{
632 .llvm_name = "rtm",
633 .description = "Support RTM instructions",
634 .dependencies = featureSet(&[_]Feature{}),
635 };
636 result[@enumToInt(Feature.sahf)] = .{
637 .llvm_name = "sahf",
638 .description = "Support LAHF and SAHF instructions",
639 .dependencies = featureSet(&[_]Feature{}),
640 };
641 result[@enumToInt(Feature.sgx)] = .{
642 .llvm_name = "sgx",
643 .description = "Enable Software Guard Extensions",
644 .dependencies = featureSet(&[_]Feature{}),
645 };
646 result[@enumToInt(Feature.sha)] = .{
647 .llvm_name = "sha",
648 .description = "Enable SHA instructions",
649 .dependencies = featureSet(&[_]Feature{
650 .sse2,
651 }),
652 };
653 result[@enumToInt(Feature.shstk)] = .{
654 .llvm_name = "shstk",
655 .description = "Support CET Shadow-Stack instructions",
656 .dependencies = featureSet(&[_]Feature{}),
657 };
658 result[@enumToInt(Feature.slow_3ops_lea)] = .{
659 .llvm_name = "slow-3ops-lea",
660 .description = "LEA instruction with 3 ops or certain registers is slow",
661 .dependencies = featureSet(&[_]Feature{}),
662 };
663 result[@enumToInt(Feature.slow_incdec)] = .{
664 .llvm_name = "slow-incdec",
665 .description = "INC and DEC instructions are slower than ADD and SUB",
666 .dependencies = featureSet(&[_]Feature{}),
667 };
668 result[@enumToInt(Feature.slow_lea)] = .{
669 .llvm_name = "slow-lea",
670 .description = "LEA instruction with certain arguments is slow",
671 .dependencies = featureSet(&[_]Feature{}),
672 };
673 result[@enumToInt(Feature.slow_pmaddwd)] = .{
674 .llvm_name = "slow-pmaddwd",
675 .description = "PMADDWD is slower than PMULLD",
676 .dependencies = featureSet(&[_]Feature{}),
677 };
678 result[@enumToInt(Feature.slow_pmulld)] = .{
679 .llvm_name = "slow-pmulld",
680 .description = "PMULLD instruction is slow",
681 .dependencies = featureSet(&[_]Feature{}),
682 };
683 result[@enumToInt(Feature.slow_shld)] = .{
684 .llvm_name = "slow-shld",
685 .description = "SHLD instruction is slow",
686 .dependencies = featureSet(&[_]Feature{}),
687 };
688 result[@enumToInt(Feature.slow_two_mem_ops)] = .{
689 .llvm_name = "slow-two-mem-ops",
690 .description = "Two memory operand instructions are slow",
691 .dependencies = featureSet(&[_]Feature{}),
692 };
693 result[@enumToInt(Feature.slow_unaligned_mem_16)] = .{
694 .llvm_name = "slow-unaligned-mem-16",
695 .description = "Slow unaligned 16-byte memory access",
696 .dependencies = featureSet(&[_]Feature{}),
697 };
698 result[@enumToInt(Feature.slow_unaligned_mem_32)] = .{
699 .llvm_name = "slow-unaligned-mem-32",
700 .description = "Slow unaligned 32-byte memory access",
701 .dependencies = featureSet(&[_]Feature{}),
702 };
703 result[@enumToInt(Feature.soft_float)] = .{
704 .llvm_name = "soft-float",
705 .description = "Use software floating point features",
706 .dependencies = featureSet(&[_]Feature{}),
707 };
708 result[@enumToInt(Feature.sse)] = .{
709 .llvm_name = "sse",
710 .description = "Enable SSE instructions",
711 .dependencies = featureSet(&[_]Feature{}),
712 };
713 result[@enumToInt(Feature.sse_unaligned_mem)] = .{
714 .llvm_name = "sse-unaligned-mem",
715 .description = "Allow unaligned memory operands with SSE instructions",
716 .dependencies = featureSet(&[_]Feature{}),
717 };
718 result[@enumToInt(Feature.sse2)] = .{
719 .llvm_name = "sse2",
720 .description = "Enable SSE2 instructions",
721 .dependencies = featureSet(&[_]Feature{
722 .sse,
723 }),
724 };
725 result[@enumToInt(Feature.sse3)] = .{
726 .llvm_name = "sse3",
727 .description = "Enable SSE3 instructions",
728 .dependencies = featureSet(&[_]Feature{
729 .sse2,
730 }),
731 };
732 result[@enumToInt(Feature.sse4_1)] = .{
733 .llvm_name = "sse4.1",
734 .description = "Enable SSE 4.1 instructions",
735 .dependencies = featureSet(&[_]Feature{
736 .ssse3,
737 }),
738 };
739 result[@enumToInt(Feature.sse4_2)] = .{
740 .llvm_name = "sse4.2",
741 .description = "Enable SSE 4.2 instructions",
742 .dependencies = featureSet(&[_]Feature{
743 .sse4_1,
744 }),
745 };
746 result[@enumToInt(Feature.sse4a)] = .{
747 .llvm_name = "sse4a",
748 .description = "Support SSE 4a instructions",
749 .dependencies = featureSet(&[_]Feature{
750 .sse3,
751 }),
752 };
753 result[@enumToInt(Feature.ssse3)] = .{
754 .llvm_name = "ssse3",
755 .description = "Enable SSSE3 instructions",
756 .dependencies = featureSet(&[_]Feature{
757 .sse3,
758 }),
759 };
760 result[@enumToInt(Feature.tbm)] = .{
761 .llvm_name = "tbm",
762 .description = "Enable TBM instructions",
763 .dependencies = featureSet(&[_]Feature{}),
764 };
765 result[@enumToInt(Feature.vaes)] = .{
766 .llvm_name = "vaes",
767 .description = "Promote selected AES instructions to AVX512/AVX registers",
768 .dependencies = featureSet(&[_]Feature{
769 .aes,
770 .avx,
771 }),
772 };
773 result[@enumToInt(Feature.vpclmulqdq)] = .{
774 .llvm_name = "vpclmulqdq",
775 .description = "Enable vpclmulqdq instructions",
776 .dependencies = featureSet(&[_]Feature{
777 .avx,
778 .pclmul,
779 }),
780 };
781 result[@enumToInt(Feature.waitpkg)] = .{
782 .llvm_name = "waitpkg",
783 .description = "Wait and pause enhancements",
784 .dependencies = featureSet(&[_]Feature{}),
785 };
786 result[@enumToInt(Feature.wbnoinvd)] = .{
787 .llvm_name = "wbnoinvd",
788 .description = "Write Back No Invalidate",
789 .dependencies = featureSet(&[_]Feature{}),
790 };
791 result[@enumToInt(Feature.x87)] = .{
792 .llvm_name = "x87",
793 .description = "Enable X87 float instructions",
794 .dependencies = featureSet(&[_]Feature{}),
795 };
796 result[@enumToInt(Feature.xop)] = .{
797 .llvm_name = "xop",
798 .description = "Enable XOP instructions",
799 .dependencies = featureSet(&[_]Feature{
800 .fma4,
801 }),
802 };
803 result[@enumToInt(Feature.xsave)] = .{
804 .llvm_name = "xsave",
805 .description = "Support xsave instructions",
806 .dependencies = featureSet(&[_]Feature{}),
807 };
808 result[@enumToInt(Feature.xsavec)] = .{
809 .llvm_name = "xsavec",
810 .description = "Support xsavec instructions",
811 .dependencies = featureSet(&[_]Feature{}),
812 };
813 result[@enumToInt(Feature.xsaveopt)] = .{
814 .llvm_name = "xsaveopt",
815 .description = "Support xsaveopt instructions",
816 .dependencies = featureSet(&[_]Feature{}),
817 };
818 result[@enumToInt(Feature.xsaves)] = .{
819 .llvm_name = "xsaves",
820 .description = "Support xsaves instructions",
821 .dependencies = featureSet(&[_]Feature{}),
822 };
823 const ti = @typeInfo(Feature);
824 for (result) |*elem, i| {
825 elem.index = i;
826 elem.name = ti.Enum.fields[i].name;
827 }
828 break :blk result;
829};
830
831pub const cpu = struct {
832 pub const amdfam10 = Cpu{
833 .name = "amdfam10",
834 .llvm_name = "amdfam10",
835 .features = featureSet(&[_]Feature{
836 .@"3dnowa",
837 .@"64bit",
838 .cmov,
839 .cx16,
840 .cx8,
841 .fast_scalar_shift_masks,
842 .fxsr,
843 .lzcnt,
844 .nopl,
845 .popcnt,
846 .sahf,
847 .slow_shld,
848 .sse4a,
849 .x87,
850 }),
851 };
852 pub const athlon = Cpu{
853 .name = "athlon",
854 .llvm_name = "athlon",
855 .features = featureSet(&[_]Feature{
856 .@"3dnowa",
857 .cmov,
858 .cx8,
859 .nopl,
860 .slow_shld,
861 .slow_unaligned_mem_16,
862 .x87,
863 }),
864 };
865 pub const athlon_4 = Cpu{
866 .name = "athlon_4",
867 .llvm_name = "athlon-4",
868 .features = featureSet(&[_]Feature{
869 .@"3dnowa",
870 .cmov,
871 .cx8,
872 .fxsr,
873 .nopl,
874 .slow_shld,
875 .slow_unaligned_mem_16,
876 .sse,
877 .x87,
878 }),
879 };
880 pub const athlon_fx = Cpu{
881 .name = "athlon_fx",
882 .llvm_name = "athlon-fx",
883 .features = featureSet(&[_]Feature{
884 .@"3dnowa",
885 .@"64bit",
886 .cmov,
887 .cx8,
888 .fast_scalar_shift_masks,
889 .fxsr,
890 .nopl,
891 .slow_shld,
892 .slow_unaligned_mem_16,
893 .sse2,
894 .x87,
895 }),
896 };
897 pub const athlon_mp = Cpu{
898 .name = "athlon_mp",
899 .llvm_name = "athlon-mp",
900 .features = featureSet(&[_]Feature{
901 .@"3dnowa",
902 .cmov,
903 .cx8,
904 .fxsr,
905 .nopl,
906 .slow_shld,
907 .slow_unaligned_mem_16,
908 .sse,
909 .x87,
910 }),
911 };
912 pub const athlon_tbird = Cpu{
913 .name = "athlon_tbird",
914 .llvm_name = "athlon-tbird",
915 .features = featureSet(&[_]Feature{
916 .@"3dnowa",
917 .cmov,
918 .cx8,
919 .nopl,
920 .slow_shld,
921 .slow_unaligned_mem_16,
922 .x87,
923 }),
924 };
925 pub const athlon_xp = Cpu{
926 .name = "athlon_xp",
927 .llvm_name = "athlon-xp",
928 .features = featureSet(&[_]Feature{
929 .@"3dnowa",
930 .cmov,
931 .cx8,
932 .fxsr,
933 .nopl,
934 .slow_shld,
935 .slow_unaligned_mem_16,
936 .sse,
937 .x87,
938 }),
939 };
940 pub const athlon64 = Cpu{
941 .name = "athlon64",
942 .llvm_name = "athlon64",
943 .features = featureSet(&[_]Feature{
944 .@"3dnowa",
945 .@"64bit",
946 .cmov,
947 .cx8,
948 .fast_scalar_shift_masks,
949 .fxsr,
950 .nopl,
951 .slow_shld,
952 .slow_unaligned_mem_16,
953 .sse2,
954 .x87,
955 }),
956 };
957 pub const athlon64_sse3 = Cpu{
958 .name = "athlon64_sse3",
959 .llvm_name = "athlon64-sse3",
960 .features = featureSet(&[_]Feature{
961 .@"3dnowa",
962 .@"64bit",
963 .cmov,
964 .cx16,
965 .cx8,
966 .fast_scalar_shift_masks,
967 .fxsr,
968 .nopl,
969 .slow_shld,
970 .slow_unaligned_mem_16,
971 .sse3,
972 .x87,
973 }),
974 };
975 pub const atom = Cpu{
976 .name = "atom",
977 .llvm_name = "atom",
978 .features = featureSet(&[_]Feature{
979 .@"64bit",
980 .cmov,
981 .cx16,
982 .cx8,
983 .fxsr,
984 .idivl_to_divb,
985 .idivq_to_divl,
986 .lea_sp,
987 .lea_uses_ag,
988 .mmx,
989 .movbe,
990 .nopl,
991 .pad_short_functions,
992 .sahf,
993 .slow_two_mem_ops,
994 .slow_unaligned_mem_16,
995 .ssse3,
996 .x87,
997 }),
998 };
999 pub const barcelona = Cpu{
1000 .name = "barcelona",
1001 .llvm_name = "barcelona",
1002 .features = featureSet(&[_]Feature{
1003 .@"3dnowa",
1004 .@"64bit",
1005 .cmov,
1006 .cx16,
1007 .cx8,
1008 .fast_scalar_shift_masks,
1009 .fxsr,
1010 .lzcnt,
1011 .nopl,
1012 .popcnt,
1013 .sahf,
1014 .slow_shld,
1015 .sse4a,
1016 .x87,
1017 }),
1018 };
1019 pub const bdver1 = Cpu{
1020 .name = "bdver1",
1021 .llvm_name = "bdver1",
1022 .features = featureSet(&[_]Feature{
1023 .@"64bit",
1024 .aes,
1025 .branchfusion,
1026 .cmov,
1027 .cx16,
1028 .cx8,
1029 .fast_11bytenop,
1030 .fast_scalar_shift_masks,
1031 .fxsr,
1032 .lwp,
1033 .lzcnt,
1034 .mmx,
1035 .nopl,
1036 .pclmul,
1037 .popcnt,
1038 .prfchw,
1039 .sahf,
1040 .slow_shld,
1041 .x87,
1042 .xop,
1043 .xsave,
1044 }),
1045 };
1046 pub const bdver2 = Cpu{
1047 .name = "bdver2",
1048 .llvm_name = "bdver2",
1049 .features = featureSet(&[_]Feature{
1050 .@"64bit",
1051 .aes,
1052 .bmi,
1053 .branchfusion,
1054 .cmov,
1055 .cx16,
1056 .cx8,
1057 .f16c,
1058 .fast_11bytenop,
1059 .fast_bextr,
1060 .fast_scalar_shift_masks,
1061 .fma,
1062 .fxsr,
1063 .lwp,
1064 .lzcnt,
1065 .mmx,
1066 .nopl,
1067 .pclmul,
1068 .popcnt,
1069 .prfchw,
1070 .sahf,
1071 .slow_shld,
1072 .tbm,
1073 .x87,
1074 .xop,
1075 .xsave,
1076 }),
1077 };
1078 pub const bdver3 = Cpu{
1079 .name = "bdver3",
1080 .llvm_name = "bdver3",
1081 .features = featureSet(&[_]Feature{
1082 .@"64bit",
1083 .aes,
1084 .bmi,
1085 .branchfusion,
1086 .cmov,
1087 .cx16,
1088 .cx8,
1089 .f16c,
1090 .fast_11bytenop,
1091 .fast_bextr,
1092 .fast_scalar_shift_masks,
1093 .fma,
1094 .fsgsbase,
1095 .fxsr,
1096 .lwp,
1097 .lzcnt,
1098 .mmx,
1099 .nopl,
1100 .pclmul,
1101 .popcnt,
1102 .prfchw,
1103 .sahf,
1104 .slow_shld,
1105 .tbm,
1106 .x87,
1107 .xop,
1108 .xsave,
1109 .xsaveopt,
1110 }),
1111 };
1112 pub const bdver4 = Cpu{
1113 .name = "bdver4",
1114 .llvm_name = "bdver4",
1115 .features = featureSet(&[_]Feature{
1116 .@"64bit",
1117 .aes,
1118 .avx2,
1119 .bmi,
1120 .bmi2,
1121 .branchfusion,
1122 .cmov,
1123 .cx16,
1124 .cx8,
1125 .f16c,
1126 .fast_11bytenop,
1127 .fast_bextr,
1128 .fast_scalar_shift_masks,
1129 .fma,
1130 .fsgsbase,
1131 .fxsr,
1132 .lwp,
1133 .lzcnt,
1134 .mmx,
1135 .mwaitx,
1136 .nopl,
1137 .pclmul,
1138 .popcnt,
1139 .prfchw,
1140 .sahf,
1141 .slow_shld,
1142 .tbm,
1143 .x87,
1144 .xop,
1145 .xsave,
1146 .xsaveopt,
1147 }),
1148 };
1149 pub const bonnell = Cpu{
1150 .name = "bonnell",
1151 .llvm_name = "bonnell",
1152 .features = featureSet(&[_]Feature{
1153 .@"64bit",
1154 .cmov,
1155 .cx16,
1156 .cx8,
1157 .fxsr,
1158 .idivl_to_divb,
1159 .idivq_to_divl,
1160 .lea_sp,
1161 .lea_uses_ag,
1162 .mmx,
1163 .movbe,
1164 .nopl,
1165 .pad_short_functions,
1166 .sahf,
1167 .slow_two_mem_ops,
1168 .slow_unaligned_mem_16,
1169 .ssse3,
1170 .x87,
1171 }),
1172 };
1173 pub const broadwell = Cpu{
1174 .name = "broadwell",
1175 .llvm_name = "broadwell",
1176 .features = featureSet(&[_]Feature{
1177 .@"64bit",
1178 .adx,
1179 .avx,
1180 .avx2,
1181 .bmi,
1182 .bmi2,
1183 .cmov,
1184 .cx16,
1185 .cx8,
1186 .ermsb,
1187 .f16c,
1188 .false_deps_lzcnt_tzcnt,
1189 .false_deps_popcnt,
1190 .fast_scalar_fsqrt,
1191 .fast_shld_rotate,
1192 .fast_variable_shuffle,
1193 .fma,
1194 .fsgsbase,
1195 .fxsr,
1196 .idivq_to_divl,
1197 .invpcid,
1198 .lzcnt,
1199 .macrofusion,
1200 .merge_to_threeway_branch,
1201 .mmx,
1202 .movbe,
1203 .nopl,
1204 .pclmul,
1205 .popcnt,
1206 .prfchw,
1207 .rdrnd,
1208 .rdseed,
1209 .sahf,
1210 .slow_3ops_lea,
1211 .sse4_2,
1212 .x87,
1213 .xsave,
1214 .xsaveopt,
1215 }),
1216 };
1217 pub const btver1 = Cpu{
1218 .name = "btver1",
1219 .llvm_name = "btver1",
1220 .features = featureSet(&[_]Feature{
1221 .@"64bit",
1222 .cmov,
1223 .cx16,
1224 .cx8,
1225 .fast_15bytenop,
1226 .fast_scalar_shift_masks,
1227 .fast_vector_shift_masks,
1228 .fxsr,
1229 .lzcnt,
1230 .mmx,
1231 .nopl,
1232 .popcnt,
1233 .prfchw,
1234 .sahf,
1235 .slow_shld,
1236 .sse4a,
1237 .ssse3,
1238 .x87,
1239 }),
1240 };
1241 pub const btver2 = Cpu{
1242 .name = "btver2",
1243 .llvm_name = "btver2",
1244 .features = featureSet(&[_]Feature{
1245 .@"64bit",
1246 .aes,
1247 .avx,
1248 .bmi,
1249 .cmov,
1250 .cx16,
1251 .cx8,
1252 .f16c,
1253 .fast_15bytenop,
1254 .fast_bextr,
1255 .fast_hops,
1256 .fast_lzcnt,
1257 .fast_partial_ymm_or_zmm_write,
1258 .fast_scalar_shift_masks,
1259 .fast_vector_shift_masks,
1260 .fxsr,
1261 .lzcnt,
1262 .mmx,
1263 .movbe,
1264 .nopl,
1265 .pclmul,
1266 .popcnt,
1267 .prfchw,
1268 .sahf,
1269 .slow_shld,
1270 .sse4a,
1271 .ssse3,
1272 .x87,
1273 .xsave,
1274 .xsaveopt,
1275 }),
1276 };
1277 pub const c3 = Cpu{
1278 .name = "c3",
1279 .llvm_name = "c3",
1280 .features = featureSet(&[_]Feature{
1281 .@"3dnow",
1282 .slow_unaligned_mem_16,
1283 .x87,
1284 }),
1285 };
1286 pub const c3_2 = Cpu{
1287 .name = "c3_2",
1288 .llvm_name = "c3-2",
1289 .features = featureSet(&[_]Feature{
1290 .cmov,
1291 .cx8,
1292 .fxsr,
1293 .mmx,
1294 .slow_unaligned_mem_16,
1295 .sse,
1296 .x87,
1297 }),
1298 };
1299 pub const cannonlake = Cpu{
1300 .name = "cannonlake",
1301 .llvm_name = "cannonlake",
1302 .features = featureSet(&[_]Feature{
1303 .@"64bit",
1304 .adx,
1305 .aes,
1306 .avx,
1307 .avx2,
1308 .avx512bw,
1309 .avx512cd,
1310 .avx512dq,
1311 .avx512f,
1312 .avx512ifma,
1313 .avx512vbmi,
1314 .avx512vl,
1315 .bmi,
1316 .bmi2,
1317 .clflushopt,
1318 .cmov,
1319 .cx16,
1320 .cx8,
1321 .ermsb,
1322 .f16c,
1323 .fast_gather,
1324 .fast_scalar_fsqrt,
1325 .fast_shld_rotate,
1326 .fast_variable_shuffle,
1327 .fast_vector_fsqrt,
1328 .fma,
1329 .fsgsbase,
1330 .fxsr,
1331 .idivq_to_divl,
1332 .invpcid,
1333 .lzcnt,
1334 .macrofusion,
1335 .merge_to_threeway_branch,
1336 .mmx,
1337 .movbe,
1338 .mpx,
1339 .nopl,
1340 .pclmul,
1341 .pku,
1342 .popcnt,
1343 .prfchw,
1344 .rdrnd,
1345 .rdseed,
1346 .sahf,
1347 .sgx,
1348 .sha,
1349 .slow_3ops_lea,
1350 .sse4_2,
1351 .x87,
1352 .xsave,
1353 .xsavec,
1354 .xsaveopt,
1355 .xsaves,
1356 }),
1357 };
1358 pub const cascadelake = Cpu{
1359 .name = "cascadelake",
1360 .llvm_name = "cascadelake",
1361 .features = featureSet(&[_]Feature{
1362 .@"64bit",
1363 .adx,
1364 .aes,
1365 .avx,
1366 .avx2,
1367 .avx512bw,
1368 .avx512cd,
1369 .avx512dq,
1370 .avx512f,
1371 .avx512vl,
1372 .avx512vnni,
1373 .bmi,
1374 .bmi2,
1375 .clflushopt,
1376 .clwb,
1377 .cmov,
1378 .cx16,
1379 .cx8,
1380 .ermsb,
1381 .f16c,
1382 .false_deps_popcnt,
1383 .fast_gather,
1384 .fast_scalar_fsqrt,
1385 .fast_shld_rotate,
1386 .fast_variable_shuffle,
1387 .fast_vector_fsqrt,
1388 .fma,
1389 .fsgsbase,
1390 .fxsr,
1391 .idivq_to_divl,
1392 .invpcid,
1393 .lzcnt,
1394 .macrofusion,
1395 .merge_to_threeway_branch,
1396 .mmx,
1397 .movbe,
1398 .mpx,
1399 .nopl,
1400 .pclmul,
1401 .pku,
1402 .popcnt,
1403 .prfchw,
1404 .rdrnd,
1405 .rdseed,
1406 .sahf,
1407 .slow_3ops_lea,
1408 .sse4_2,
1409 .x87,
1410 .xsave,
1411 .xsavec,
1412 .xsaveopt,
1413 .xsaves,
1414 }),
1415 };
1416 pub const cooperlake = Cpu{
1417 .name = "cooperlake",
1418 .llvm_name = "cooperlake",
1419 .features = featureSet(&[_]Feature{
1420 .@"64bit",
1421 .adx,
1422 .aes,
1423 .avx,
1424 .avx2,
1425 .avx512bf16,
1426 .avx512bw,
1427 .avx512cd,
1428 .avx512dq,
1429 .avx512f,
1430 .avx512vl,
1431 .avx512vnni,
1432 .bmi,
1433 .bmi2,
1434 .clflushopt,
1435 .clwb,
1436 .cmov,
1437 .cx16,
1438 .cx8,
1439 .ermsb,
1440 .f16c,
1441 .false_deps_popcnt,
1442 .fast_gather,
1443 .fast_scalar_fsqrt,
1444 .fast_shld_rotate,
1445 .fast_variable_shuffle,
1446 .fast_vector_fsqrt,
1447 .fma,
1448 .fsgsbase,
1449 .fxsr,
1450 .idivq_to_divl,
1451 .invpcid,
1452 .lzcnt,
1453 .macrofusion,
1454 .merge_to_threeway_branch,
1455 .mmx,
1456 .movbe,
1457 .mpx,
1458 .nopl,
1459 .pclmul,
1460 .pku,
1461 .popcnt,
1462 .prfchw,
1463 .rdrnd,
1464 .rdseed,
1465 .sahf,
1466 .slow_3ops_lea,
1467 .sse4_2,
1468 .x87,
1469 .xsave,
1470 .xsavec,
1471 .xsaveopt,
1472 .xsaves,
1473 }),
1474 };
1475 pub const core_avx_i = Cpu{
1476 .name = "core_avx_i",
1477 .llvm_name = "core-avx-i",
1478 .features = featureSet(&[_]Feature{
1479 .@"64bit",
1480 .avx,
1481 .cmov,
1482 .cx16,
1483 .cx8,
1484 .f16c,
1485 .false_deps_popcnt,
1486 .fast_scalar_fsqrt,
1487 .fast_shld_rotate,
1488 .fsgsbase,
1489 .fxsr,
1490 .idivq_to_divl,
1491 .macrofusion,
1492 .merge_to_threeway_branch,
1493 .mmx,
1494 .nopl,
1495 .pclmul,
1496 .popcnt,
1497 .rdrnd,
1498 .sahf,
1499 .slow_3ops_lea,
1500 .slow_unaligned_mem_32,
1501 .sse4_2,
1502 .x87,
1503 .xsave,
1504 .xsaveopt,
1505 }),
1506 };
1507 pub const core_avx2 = Cpu{
1508 .name = "core_avx2",
1509 .llvm_name = "core-avx2",
1510 .features = featureSet(&[_]Feature{
1511 .@"64bit",
1512 .avx,
1513 .avx2,
1514 .bmi,
1515 .bmi2,
1516 .cmov,
1517 .cx16,
1518 .cx8,
1519 .ermsb,
1520 .f16c,
1521 .false_deps_lzcnt_tzcnt,
1522 .false_deps_popcnt,
1523 .fast_scalar_fsqrt,
1524 .fast_shld_rotate,
1525 .fast_variable_shuffle,
1526 .fma,
1527 .fsgsbase,
1528 .fxsr,
1529 .idivq_to_divl,
1530 .invpcid,
1531 .lzcnt,
1532 .macrofusion,
1533 .merge_to_threeway_branch,
1534 .mmx,
1535 .movbe,
1536 .nopl,
1537 .pclmul,
1538 .popcnt,
1539 .rdrnd,
1540 .sahf,
1541 .slow_3ops_lea,
1542 .sse4_2,
1543 .x87,
1544 .xsave,
1545 .xsaveopt,
1546 }),
1547 };
1548 pub const core2 = Cpu{
1549 .name = "core2",
1550 .llvm_name = "core2",
1551 .features = featureSet(&[_]Feature{
1552 .@"64bit",
1553 .cmov,
1554 .cx16,
1555 .cx8,
1556 .fxsr,
1557 .macrofusion,
1558 .mmx,
1559 .nopl,
1560 .sahf,
1561 .slow_unaligned_mem_16,
1562 .ssse3,
1563 .x87,
1564 }),
1565 };
1566 pub const corei7 = Cpu{
1567 .name = "corei7",
1568 .llvm_name = "corei7",
1569 .features = featureSet(&[_]Feature{
1570 .@"64bit",
1571 .cmov,
1572 .cx16,
1573 .cx8,
1574 .fxsr,
1575 .macrofusion,
1576 .mmx,
1577 .nopl,
1578 .popcnt,
1579 .sahf,
1580 .sse4_2,
1581 .x87,
1582 }),
1583 };
1584 pub const corei7_avx = Cpu{
1585 .name = "corei7_avx",
1586 .llvm_name = "corei7-avx",
1587 .features = featureSet(&[_]Feature{
1588 .@"64bit",
1589 .avx,
1590 .cmov,
1591 .cx16,
1592 .cx8,
1593 .false_deps_popcnt,
1594 .fast_scalar_fsqrt,
1595 .fast_shld_rotate,
1596 .fxsr,
1597 .idivq_to_divl,
1598 .macrofusion,
1599 .merge_to_threeway_branch,
1600 .mmx,
1601 .nopl,
1602 .pclmul,
1603 .popcnt,
1604 .sahf,
1605 .slow_3ops_lea,
1606 .slow_unaligned_mem_32,
1607 .sse4_2,
1608 .x87,
1609 .xsave,
1610 .xsaveopt,
1611 }),
1612 };
1613 pub const generic = Cpu{
1614 .name = "generic",
1615 .llvm_name = "generic",
1616 .features = featureSet(&[_]Feature{
1617 .cx8,
1618 .slow_unaligned_mem_16,
1619 .x87,
1620 }),
1621 };
1622 pub const geode = Cpu{
1623 .name = "geode",
1624 .llvm_name = "geode",
1625 .features = featureSet(&[_]Feature{
1626 .@"3dnowa",
1627 .cx8,
1628 .slow_unaligned_mem_16,
1629 .x87,
1630 }),
1631 };
1632 pub const goldmont = Cpu{
1633 .name = "goldmont",
1634 .llvm_name = "goldmont",
1635 .features = featureSet(&[_]Feature{
1636 .@"64bit",
1637 .aes,
1638 .clflushopt,
1639 .cmov,
1640 .cx16,
1641 .cx8,
1642 .false_deps_popcnt,
1643 .fsgsbase,
1644 .fxsr,
1645 .mmx,
1646 .movbe,
1647 .mpx,
1648 .nopl,
1649 .pclmul,
1650 .popcnt,
1651 .prfchw,
1652 .rdrnd,
1653 .rdseed,
1654 .sahf,
1655 .sha,
1656 .slow_incdec,
1657 .slow_lea,
1658 .slow_two_mem_ops,
1659 .sse4_2,
1660 .ssse3,
1661 .x87,
1662 .xsave,
1663 .xsavec,
1664 .xsaveopt,
1665 .xsaves,
1666 }),
1667 };
1668 pub const goldmont_plus = Cpu{
1669 .name = "goldmont_plus",
1670 .llvm_name = "goldmont-plus",
1671 .features = featureSet(&[_]Feature{
1672 .@"64bit",
1673 .aes,
1674 .clflushopt,
1675 .cmov,
1676 .cx16,
1677 .cx8,
1678 .fsgsbase,
1679 .fxsr,
1680 .mmx,
1681 .movbe,
1682 .mpx,
1683 .nopl,
1684 .pclmul,
1685 .popcnt,
1686 .prfchw,
1687 .ptwrite,
1688 .rdpid,
1689 .rdrnd,
1690 .rdseed,
1691 .sahf,
1692 .sgx,
1693 .sha,
1694 .slow_incdec,
1695 .slow_lea,
1696 .slow_two_mem_ops,
1697 .sse4_2,
1698 .ssse3,
1699 .x87,
1700 .xsave,
1701 .xsavec,
1702 .xsaveopt,
1703 .xsaves,
1704 }),
1705 };
1706 pub const haswell = Cpu{
1707 .name = "haswell",
1708 .llvm_name = "haswell",
1709 .features = featureSet(&[_]Feature{
1710 .@"64bit",
1711 .avx,
1712 .avx2,
1713 .bmi,
1714 .bmi2,
1715 .cmov,
1716 .cx16,
1717 .cx8,
1718 .ermsb,
1719 .f16c,
1720 .false_deps_lzcnt_tzcnt,
1721 .false_deps_popcnt,
1722 .fast_scalar_fsqrt,
1723 .fast_shld_rotate,
1724 .fast_variable_shuffle,
1725 .fma,
1726 .fsgsbase,
1727 .fxsr,
1728 .idivq_to_divl,
1729 .invpcid,
1730 .lzcnt,
1731 .macrofusion,
1732 .merge_to_threeway_branch,
1733 .mmx,
1734 .movbe,
1735 .nopl,
1736 .pclmul,
1737 .popcnt,
1738 .rdrnd,
1739 .sahf,
1740 .slow_3ops_lea,
1741 .sse4_2,
1742 .x87,
1743 .xsave,
1744 .xsaveopt,
1745 }),
1746 };
1747 pub const _i386 = Cpu{
1748 .name = "_i386",
1749 .llvm_name = "i386",
1750 .features = featureSet(&[_]Feature{
1751 .slow_unaligned_mem_16,
1752 .x87,
1753 }),
1754 };
1755 pub const _i486 = Cpu{
1756 .name = "_i486",
1757 .llvm_name = "i486",
1758 .features = featureSet(&[_]Feature{
1759 .slow_unaligned_mem_16,
1760 .x87,
1761 }),
1762 };
1763 pub const _i586 = Cpu{
1764 .name = "_i586",
1765 .llvm_name = "i586",
1766 .features = featureSet(&[_]Feature{
1767 .cx8,
1768 .slow_unaligned_mem_16,
1769 .x87,
1770 }),
1771 };
1772 pub const _i686 = Cpu{
1773 .name = "_i686",
1774 .llvm_name = "i686",
1775 .features = featureSet(&[_]Feature{
1776 .cmov,
1777 .cx8,
1778 .slow_unaligned_mem_16,
1779 .x87,
1780 }),
1781 };
1782 pub const icelake_client = Cpu{
1783 .name = "icelake_client",
1784 .llvm_name = "icelake-client",
1785 .features = featureSet(&[_]Feature{
1786 .@"64bit",
1787 .adx,
1788 .aes,
1789 .avx,
1790 .avx2,
1791 .avx512bitalg,
1792 .avx512bw,
1793 .avx512cd,
1794 .avx512dq,
1795 .avx512f,
1796 .avx512ifma,
1797 .avx512vbmi,
1798 .avx512vbmi2,
1799 .avx512vl,
1800 .avx512vnni,
1801 .avx512vpopcntdq,
1802 .bmi,
1803 .bmi2,
1804 .clflushopt,
1805 .clwb,
1806 .cmov,
1807 .cx16,
1808 .cx8,
1809 .ermsb,
1810 .f16c,
1811 .fast_gather,
1812 .fast_scalar_fsqrt,
1813 .fast_shld_rotate,
1814 .fast_variable_shuffle,
1815 .fast_vector_fsqrt,
1816 .fma,
1817 .fsgsbase,
1818 .fxsr,
1819 .gfni,
1820 .idivq_to_divl,
1821 .invpcid,
1822 .lzcnt,
1823 .macrofusion,
1824 .merge_to_threeway_branch,
1825 .mmx,
1826 .movbe,
1827 .mpx,
1828 .nopl,
1829 .pclmul,
1830 .pku,
1831 .popcnt,
1832 .prfchw,
1833 .rdpid,
1834 .rdrnd,
1835 .rdseed,
1836 .sahf,
1837 .sgx,
1838 .sha,
1839 .slow_3ops_lea,
1840 .sse4_2,
1841 .vaes,
1842 .vpclmulqdq,
1843 .x87,
1844 .xsave,
1845 .xsavec,
1846 .xsaveopt,
1847 .xsaves,
1848 }),
1849 };
1850 pub const icelake_server = Cpu{
1851 .name = "icelake_server",
1852 .llvm_name = "icelake-server",
1853 .features = featureSet(&[_]Feature{
1854 .@"64bit",
1855 .adx,
1856 .aes,
1857 .avx,
1858 .avx2,
1859 .avx512bitalg,
1860 .avx512bw,
1861 .avx512cd,
1862 .avx512dq,
1863 .avx512f,
1864 .avx512ifma,
1865 .avx512vbmi,
1866 .avx512vbmi2,
1867 .avx512vl,
1868 .avx512vnni,
1869 .avx512vpopcntdq,
1870 .bmi,
1871 .bmi2,
1872 .clflushopt,
1873 .clwb,
1874 .cmov,
1875 .cx16,
1876 .cx8,
1877 .ermsb,
1878 .f16c,
1879 .fast_gather,
1880 .fast_scalar_fsqrt,
1881 .fast_shld_rotate,
1882 .fast_variable_shuffle,
1883 .fast_vector_fsqrt,
1884 .fma,
1885 .fsgsbase,
1886 .fxsr,
1887 .gfni,
1888 .idivq_to_divl,
1889 .invpcid,
1890 .lzcnt,
1891 .macrofusion,
1892 .merge_to_threeway_branch,
1893 .mmx,
1894 .movbe,
1895 .mpx,
1896 .nopl,
1897 .pclmul,
1898 .pconfig,
1899 .pku,
1900 .popcnt,
1901 .prfchw,
1902 .rdpid,
1903 .rdrnd,
1904 .rdseed,
1905 .sahf,
1906 .sgx,
1907 .sha,
1908 .slow_3ops_lea,
1909 .sse4_2,
1910 .vaes,
1911 .vpclmulqdq,
1912 .wbnoinvd,
1913 .x87,
1914 .xsave,
1915 .xsavec,
1916 .xsaveopt,
1917 .xsaves,
1918 }),
1919 };
1920 pub const ivybridge = Cpu{
1921 .name = "ivybridge",
1922 .llvm_name = "ivybridge",
1923 .features = featureSet(&[_]Feature{
1924 .@"64bit",
1925 .avx,
1926 .cmov,
1927 .cx16,
1928 .cx8,
1929 .f16c,
1930 .false_deps_popcnt,
1931 .fast_scalar_fsqrt,
1932 .fast_shld_rotate,
1933 .fsgsbase,
1934 .fxsr,
1935 .idivq_to_divl,
1936 .macrofusion,
1937 .merge_to_threeway_branch,
1938 .mmx,
1939 .nopl,
1940 .pclmul,
1941 .popcnt,
1942 .rdrnd,
1943 .sahf,
1944 .slow_3ops_lea,
1945 .slow_unaligned_mem_32,
1946 .sse4_2,
1947 .x87,
1948 .xsave,
1949 .xsaveopt,
1950 }),
1951 };
1952 pub const k6 = Cpu{
1953 .name = "k6",
1954 .llvm_name = "k6",
1955 .features = featureSet(&[_]Feature{
1956 .cx8,
1957 .mmx,
1958 .slow_unaligned_mem_16,
1959 .x87,
1960 }),
1961 };
1962 pub const k6_2 = Cpu{
1963 .name = "k6_2",
1964 .llvm_name = "k6-2",
1965 .features = featureSet(&[_]Feature{
1966 .@"3dnow",
1967 .cx8,
1968 .slow_unaligned_mem_16,
1969 .x87,
1970 }),
1971 };
1972 pub const k6_3 = Cpu{
1973 .name = "k6_3",
1974 .llvm_name = "k6-3",
1975 .features = featureSet(&[_]Feature{
1976 .@"3dnow",
1977 .cx8,
1978 .slow_unaligned_mem_16,
1979 .x87,
1980 }),
1981 };
1982 pub const k8 = Cpu{
1983 .name = "k8",
1984 .llvm_name = "k8",
1985 .features = featureSet(&[_]Feature{
1986 .@"3dnowa",
1987 .@"64bit",
1988 .cmov,
1989 .cx8,
1990 .fast_scalar_shift_masks,
1991 .fxsr,
1992 .nopl,
1993 .slow_shld,
1994 .slow_unaligned_mem_16,
1995 .sse2,
1996 .x87,
1997 }),
1998 };
1999 pub const k8_sse3 = Cpu{
2000 .name = "k8_sse3",
2001 .llvm_name = "k8-sse3",
2002 .features = featureSet(&[_]Feature{
2003 .@"3dnowa",
2004 .@"64bit",
2005 .cmov,
2006 .cx16,
2007 .cx8,
2008 .fast_scalar_shift_masks,
2009 .fxsr,
2010 .nopl,
2011 .slow_shld,
2012 .slow_unaligned_mem_16,
2013 .sse3,
2014 .x87,
2015 }),
2016 };
2017 pub const knl = Cpu{
2018 .name = "knl",
2019 .llvm_name = "knl",
2020 .features = featureSet(&[_]Feature{
2021 .@"64bit",
2022 .adx,
2023 .aes,
2024 .avx512cd,
2025 .avx512er,
2026 .avx512f,
2027 .avx512pf,
2028 .bmi,
2029 .bmi2,
2030 .cmov,
2031 .cx16,
2032 .cx8,
2033 .f16c,
2034 .fast_gather,
2035 .fast_partial_ymm_or_zmm_write,
2036 .fma,
2037 .fsgsbase,
2038 .fxsr,
2039 .idivq_to_divl,
2040 .lzcnt,
2041 .mmx,
2042 .movbe,
2043 .nopl,
2044 .pclmul,
2045 .popcnt,
2046 .prefetchwt1,
2047 .prfchw,
2048 .rdrnd,
2049 .rdseed,
2050 .sahf,
2051 .slow_3ops_lea,
2052 .slow_incdec,
2053 .slow_pmaddwd,
2054 .slow_two_mem_ops,
2055 .x87,
2056 .xsave,
2057 .xsaveopt,
2058 }),
2059 };
2060 pub const knm = Cpu{
2061 .name = "knm",
2062 .llvm_name = "knm",
2063 .features = featureSet(&[_]Feature{
2064 .@"64bit",
2065 .adx,
2066 .aes,
2067 .avx512cd,
2068 .avx512er,
2069 .avx512f,
2070 .avx512pf,
2071 .avx512vpopcntdq,
2072 .bmi,
2073 .bmi2,
2074 .cmov,
2075 .cx16,
2076 .cx8,
2077 .f16c,
2078 .fast_gather,
2079 .fast_partial_ymm_or_zmm_write,
2080 .fma,
2081 .fsgsbase,
2082 .fxsr,
2083 .idivq_to_divl,
2084 .lzcnt,
2085 .mmx,
2086 .movbe,
2087 .nopl,
2088 .pclmul,
2089 .popcnt,
2090 .prefetchwt1,
2091 .prfchw,
2092 .rdrnd,
2093 .rdseed,
2094 .sahf,
2095 .slow_3ops_lea,
2096 .slow_incdec,
2097 .slow_pmaddwd,
2098 .slow_two_mem_ops,
2099 .x87,
2100 .xsave,
2101 .xsaveopt,
2102 }),
2103 };
2104 pub const lakemont = Cpu{
2105 .name = "lakemont",
2106 .llvm_name = "lakemont",
2107 .features = featureSet(&[_]Feature{}),
2108 };
2109 pub const nehalem = Cpu{
2110 .name = "nehalem",
2111 .llvm_name = "nehalem",
2112 .features = featureSet(&[_]Feature{
2113 .@"64bit",
2114 .cmov,
2115 .cx16,
2116 .cx8,
2117 .fxsr,
2118 .macrofusion,
2119 .mmx,
2120 .nopl,
2121 .popcnt,
2122 .sahf,
2123 .sse4_2,
2124 .x87,
2125 }),
2126 };
2127 pub const nocona = Cpu{
2128 .name = "nocona",
2129 .llvm_name = "nocona",
2130 .features = featureSet(&[_]Feature{
2131 .@"64bit",
2132 .cmov,
2133 .cx16,
2134 .cx8,
2135 .fxsr,
2136 .mmx,
2137 .nopl,
2138 .slow_unaligned_mem_16,
2139 .sse3,
2140 .x87,
2141 }),
2142 };
2143 pub const opteron = Cpu{
2144 .name = "opteron",
2145 .llvm_name = "opteron",
2146 .features = featureSet(&[_]Feature{
2147 .@"3dnowa",
2148 .@"64bit",
2149 .cmov,
2150 .cx8,
2151 .fast_scalar_shift_masks,
2152 .fxsr,
2153 .nopl,
2154 .slow_shld,
2155 .slow_unaligned_mem_16,
2156 .sse2,
2157 .x87,
2158 }),
2159 };
2160 pub const opteron_sse3 = Cpu{
2161 .name = "opteron_sse3",
2162 .llvm_name = "opteron-sse3",
2163 .features = featureSet(&[_]Feature{
2164 .@"3dnowa",
2165 .@"64bit",
2166 .cmov,
2167 .cx16,
2168 .cx8,
2169 .fast_scalar_shift_masks,
2170 .fxsr,
2171 .nopl,
2172 .slow_shld,
2173 .slow_unaligned_mem_16,
2174 .sse3,
2175 .x87,
2176 }),
2177 };
2178 pub const penryn = Cpu{
2179 .name = "penryn",
2180 .llvm_name = "penryn",
2181 .features = featureSet(&[_]Feature{
2182 .@"64bit",
2183 .cmov,
2184 .cx16,
2185 .cx8,
2186 .fxsr,
2187 .macrofusion,
2188 .mmx,
2189 .nopl,
2190 .sahf,
2191 .slow_unaligned_mem_16,
2192 .sse4_1,
2193 .x87,
2194 }),
2195 };
2196 pub const pentium = Cpu{
2197 .name = "pentium",
2198 .llvm_name = "pentium",
2199 .features = featureSet(&[_]Feature{
2200 .cx8,
2201 .slow_unaligned_mem_16,
2202 .x87,
2203 }),
2204 };
2205 pub const pentium_m = Cpu{
2206 .name = "pentium_m",
2207 .llvm_name = "pentium-m",
2208 .features = featureSet(&[_]Feature{
2209 .cmov,
2210 .cx8,
2211 .fxsr,
2212 .mmx,
2213 .nopl,
2214 .slow_unaligned_mem_16,
2215 .sse2,
2216 .x87,
2217 }),
2218 };
2219 pub const pentium_mmx = Cpu{
2220 .name = "pentium_mmx",
2221 .llvm_name = "pentium-mmx",
2222 .features = featureSet(&[_]Feature{
2223 .cx8,
2224 .mmx,
2225 .slow_unaligned_mem_16,
2226 .x87,
2227 }),
2228 };
2229 pub const pentium2 = Cpu{
2230 .name = "pentium2",
2231 .llvm_name = "pentium2",
2232 .features = featureSet(&[_]Feature{
2233 .cmov,
2234 .cx8,
2235 .fxsr,
2236 .mmx,
2237 .nopl,
2238 .slow_unaligned_mem_16,
2239 .x87,
2240 }),
2241 };
2242 pub const pentium3 = Cpu{
2243 .name = "pentium3",
2244 .llvm_name = "pentium3",
2245 .features = featureSet(&[_]Feature{
2246 .cmov,
2247 .cx8,
2248 .fxsr,
2249 .mmx,
2250 .nopl,
2251 .slow_unaligned_mem_16,
2252 .sse,
2253 .x87,
2254 }),
2255 };
2256 pub const pentium3m = Cpu{
2257 .name = "pentium3m",
2258 .llvm_name = "pentium3m",
2259 .features = featureSet(&[_]Feature{
2260 .cmov,
2261 .cx8,
2262 .fxsr,
2263 .mmx,
2264 .nopl,
2265 .slow_unaligned_mem_16,
2266 .sse,
2267 .x87,
2268 }),
2269 };
2270 pub const pentium4 = Cpu{
2271 .name = "pentium4",
2272 .llvm_name = "pentium4",
2273 .features = featureSet(&[_]Feature{
2274 .cmov,
2275 .cx8,
2276 .fxsr,
2277 .mmx,
2278 .nopl,
2279 .slow_unaligned_mem_16,
2280 .sse2,
2281 .x87,
2282 }),
2283 };
2284 pub const pentium4m = Cpu{
2285 .name = "pentium4m",
2286 .llvm_name = "pentium4m",
2287 .features = featureSet(&[_]Feature{
2288 .cmov,
2289 .cx8,
2290 .fxsr,
2291 .mmx,
2292 .nopl,
2293 .slow_unaligned_mem_16,
2294 .sse2,
2295 .x87,
2296 }),
2297 };
2298 pub const pentiumpro = Cpu{
2299 .name = "pentiumpro",
2300 .llvm_name = "pentiumpro",
2301 .features = featureSet(&[_]Feature{
2302 .cmov,
2303 .cx8,
2304 .nopl,
2305 .slow_unaligned_mem_16,
2306 .x87,
2307 }),
2308 };
2309 pub const prescott = Cpu{
2310 .name = "prescott",
2311 .llvm_name = "prescott",
2312 .features = featureSet(&[_]Feature{
2313 .cmov,
2314 .cx8,
2315 .fxsr,
2316 .mmx,
2317 .nopl,
2318 .slow_unaligned_mem_16,
2319 .sse3,
2320 .x87,
2321 }),
2322 };
2323 pub const sandybridge = Cpu{
2324 .name = "sandybridge",
2325 .llvm_name = "sandybridge",
2326 .features = featureSet(&[_]Feature{
2327 .@"64bit",
2328 .avx,
2329 .cmov,
2330 .cx16,
2331 .cx8,
2332 .false_deps_popcnt,
2333 .fast_scalar_fsqrt,
2334 .fast_shld_rotate,
2335 .fxsr,
2336 .idivq_to_divl,
2337 .macrofusion,
2338 .merge_to_threeway_branch,
2339 .mmx,
2340 .nopl,
2341 .pclmul,
2342 .popcnt,
2343 .sahf,
2344 .slow_3ops_lea,
2345 .slow_unaligned_mem_32,
2346 .sse4_2,
2347 .x87,
2348 .xsave,
2349 .xsaveopt,
2350 }),
2351 };
2352 pub const silvermont = Cpu{
2353 .name = "silvermont",
2354 .llvm_name = "silvermont",
2355 .features = featureSet(&[_]Feature{
2356 .@"64bit",
2357 .cmov,
2358 .cx16,
2359 .cx8,
2360 .false_deps_popcnt,
2361 .fxsr,
2362 .idivq_to_divl,
2363 .mmx,
2364 .movbe,
2365 .nopl,
2366 .pclmul,
2367 .popcnt,
2368 .prfchw,
2369 .rdrnd,
2370 .sahf,
2371 .slow_incdec,
2372 .slow_lea,
2373 .slow_pmulld,
2374 .slow_two_mem_ops,
2375 .sse4_2,
2376 .ssse3,
2377 .x87,
2378 }),
2379 };
2380 pub const skx = Cpu{
2381 .name = "skx",
2382 .llvm_name = "skx",
2383 .features = featureSet(&[_]Feature{
2384 .@"64bit",
2385 .adx,
2386 .aes,
2387 .avx,
2388 .avx2,
2389 .avx512bw,
2390 .avx512cd,
2391 .avx512dq,
2392 .avx512f,
2393 .avx512vl,
2394 .bmi,
2395 .bmi2,
2396 .clflushopt,
2397 .clwb,
2398 .cmov,
2399 .cx16,
2400 .cx8,
2401 .ermsb,
2402 .f16c,
2403 .false_deps_popcnt,
2404 .fast_gather,
2405 .fast_scalar_fsqrt,
2406 .fast_shld_rotate,
2407 .fast_variable_shuffle,
2408 .fast_vector_fsqrt,
2409 .fma,
2410 .fsgsbase,
2411 .fxsr,
2412 .idivq_to_divl,
2413 .invpcid,
2414 .lzcnt,
2415 .macrofusion,
2416 .merge_to_threeway_branch,
2417 .mmx,
2418 .movbe,
2419 .mpx,
2420 .nopl,
2421 .pclmul,
2422 .pku,
2423 .popcnt,
2424 .prfchw,
2425 .rdrnd,
2426 .rdseed,
2427 .sahf,
2428 .slow_3ops_lea,
2429 .sse4_2,
2430 .x87,
2431 .xsave,
2432 .xsavec,
2433 .xsaveopt,
2434 .xsaves,
2435 }),
2436 };
2437 pub const skylake = Cpu{
2438 .name = "skylake",
2439 .llvm_name = "skylake",
2440 .features = featureSet(&[_]Feature{
2441 .@"64bit",
2442 .adx,
2443 .aes,
2444 .avx,
2445 .avx2,
2446 .bmi,
2447 .bmi2,
2448 .clflushopt,
2449 .cmov,
2450 .cx16,
2451 .cx8,
2452 .ermsb,
2453 .f16c,
2454 .false_deps_popcnt,
2455 .fast_gather,
2456 .fast_scalar_fsqrt,
2457 .fast_shld_rotate,
2458 .fast_variable_shuffle,
2459 .fast_vector_fsqrt,
2460 .fma,
2461 .fsgsbase,
2462 .fxsr,
2463 .idivq_to_divl,
2464 .invpcid,
2465 .lzcnt,
2466 .macrofusion,
2467 .merge_to_threeway_branch,
2468 .mmx,
2469 .movbe,
2470 .mpx,
2471 .nopl,
2472 .pclmul,
2473 .popcnt,
2474 .prfchw,
2475 .rdrnd,
2476 .rdseed,
2477 .sahf,
2478 .sgx,
2479 .slow_3ops_lea,
2480 .sse4_2,
2481 .x87,
2482 .xsave,
2483 .xsavec,
2484 .xsaveopt,
2485 .xsaves,
2486 }),
2487 };
2488 pub const skylake_avx512 = Cpu{
2489 .name = "skylake_avx512",
2490 .llvm_name = "skylake-avx512",
2491 .features = featureSet(&[_]Feature{
2492 .@"64bit",
2493 .adx,
2494 .aes,
2495 .avx,
2496 .avx2,
2497 .avx512bw,
2498 .avx512cd,
2499 .avx512dq,
2500 .avx512f,
2501 .avx512vl,
2502 .bmi,
2503 .bmi2,
2504 .clflushopt,
2505 .clwb,
2506 .cmov,
2507 .cx16,
2508 .cx8,
2509 .ermsb,
2510 .f16c,
2511 .false_deps_popcnt,
2512 .fast_gather,
2513 .fast_scalar_fsqrt,
2514 .fast_shld_rotate,
2515 .fast_variable_shuffle,
2516 .fast_vector_fsqrt,
2517 .fma,
2518 .fsgsbase,
2519 .fxsr,
2520 .idivq_to_divl,
2521 .invpcid,
2522 .lzcnt,
2523 .macrofusion,
2524 .merge_to_threeway_branch,
2525 .mmx,
2526 .movbe,
2527 .mpx,
2528 .nopl,
2529 .pclmul,
2530 .pku,
2531 .popcnt,
2532 .prfchw,
2533 .rdrnd,
2534 .rdseed,
2535 .sahf,
2536 .slow_3ops_lea,
2537 .sse4_2,
2538 .x87,
2539 .xsave,
2540 .xsavec,
2541 .xsaveopt,
2542 .xsaves,
2543 }),
2544 };
2545 pub const slm = Cpu{
2546 .name = "slm",
2547 .llvm_name = "slm",
2548 .features = featureSet(&[_]Feature{
2549 .@"64bit",
2550 .cmov,
2551 .cx16,
2552 .cx8,
2553 .false_deps_popcnt,
2554 .fxsr,
2555 .idivq_to_divl,
2556 .mmx,
2557 .movbe,
2558 .nopl,
2559 .pclmul,
2560 .popcnt,
2561 .prfchw,
2562 .rdrnd,
2563 .sahf,
2564 .slow_incdec,
2565 .slow_lea,
2566 .slow_pmulld,
2567 .slow_two_mem_ops,
2568 .sse4_2,
2569 .ssse3,
2570 .x87,
2571 }),
2572 };
2573 pub const tremont = Cpu{
2574 .name = "tremont",
2575 .llvm_name = "tremont",
2576 .features = featureSet(&[_]Feature{
2577 .@"64bit",
2578 .aes,
2579 .cldemote,
2580 .clflushopt,
2581 .cmov,
2582 .cx16,
2583 .cx8,
2584 .fsgsbase,
2585 .fxsr,
2586 .gfni,
2587 .mmx,
2588 .movbe,
2589 .movdir64b,
2590 .movdiri,
2591 .mpx,
2592 .nopl,
2593 .pclmul,
2594 .popcnt,
2595 .prfchw,
2596 .ptwrite,
2597 .rdpid,
2598 .rdrnd,
2599 .rdseed,
2600 .sahf,
2601 .sgx,
2602 .sha,
2603 .slow_incdec,
2604 .slow_lea,
2605 .slow_two_mem_ops,
2606 .sse4_2,
2607 .ssse3,
2608 .waitpkg,
2609 .x87,
2610 .xsave,
2611 .xsavec,
2612 .xsaveopt,
2613 .xsaves,
2614 }),
2615 };
2616 pub const westmere = Cpu{
2617 .name = "westmere",
2618 .llvm_name = "westmere",
2619 .features = featureSet(&[_]Feature{
2620 .@"64bit",
2621 .cmov,
2622 .cx16,
2623 .cx8,
2624 .fxsr,
2625 .macrofusion,
2626 .mmx,
2627 .nopl,
2628 .pclmul,
2629 .popcnt,
2630 .sahf,
2631 .sse4_2,
2632 .x87,
2633 }),
2634 };
2635 pub const winchip_c6 = Cpu{
2636 .name = "winchip_c6",
2637 .llvm_name = "winchip-c6",
2638 .features = featureSet(&[_]Feature{
2639 .mmx,
2640 .slow_unaligned_mem_16,
2641 .x87,
2642 }),
2643 };
2644 pub const winchip2 = Cpu{
2645 .name = "winchip2",
2646 .llvm_name = "winchip2",
2647 .features = featureSet(&[_]Feature{
2648 .@"3dnow",
2649 .slow_unaligned_mem_16,
2650 .x87,
2651 }),
2652 };
2653 pub const x86_64 = Cpu{
2654 .name = "x86_64",
2655 .llvm_name = "x86-64",
2656 .features = featureSet(&[_]Feature{
2657 .@"64bit",
2658 .cmov,
2659 .cx8,
2660 .fxsr,
2661 .macrofusion,
2662 .mmx,
2663 .nopl,
2664 .slow_3ops_lea,
2665 .slow_incdec,
2666 .sse2,
2667 .x87,
2668 }),
2669 };
2670 pub const yonah = Cpu{
2671 .name = "yonah",
2672 .llvm_name = "yonah",
2673 .features = featureSet(&[_]Feature{
2674 .cmov,
2675 .cx8,
2676 .fxsr,
2677 .mmx,
2678 .nopl,
2679 .slow_unaligned_mem_16,
2680 .sse3,
2681 .x87,
2682 }),
2683 };
2684 pub const znver1 = Cpu{
2685 .name = "znver1",
2686 .llvm_name = "znver1",
2687 .features = featureSet(&[_]Feature{
2688 .@"64bit",
2689 .adx,
2690 .aes,
2691 .avx2,
2692 .bmi,
2693 .bmi2,
2694 .branchfusion,
2695 .clflushopt,
2696 .clzero,
2697 .cmov,
2698 .cx16,
2699 .f16c,
2700 .fast_15bytenop,
2701 .fast_bextr,
2702 .fast_lzcnt,
2703 .fast_scalar_shift_masks,
2704 .fma,
2705 .fsgsbase,
2706 .fxsr,
2707 .lzcnt,
2708 .mmx,
2709 .movbe,
2710 .mwaitx,
2711 .nopl,
2712 .pclmul,
2713 .popcnt,
2714 .prfchw,
2715 .rdrnd,
2716 .rdseed,
2717 .sahf,
2718 .sha,
2719 .slow_shld,
2720 .sse4a,
2721 .x87,
2722 .xsave,
2723 .xsavec,
2724 .xsaveopt,
2725 .xsaves,
2726 }),
2727 };
2728 pub const znver2 = Cpu{
2729 .name = "znver2",
2730 .llvm_name = "znver2",
2731 .features = featureSet(&[_]Feature{
2732 .@"64bit",
2733 .adx,
2734 .aes,
2735 .avx2,
2736 .bmi,
2737 .bmi2,
2738 .branchfusion,
2739 .clflushopt,
2740 .clwb,
2741 .clzero,
2742 .cmov,
2743 .cx16,
2744 .f16c,
2745 .fast_15bytenop,
2746 .fast_bextr,
2747 .fast_lzcnt,
2748 .fast_scalar_shift_masks,
2749 .fma,
2750 .fsgsbase,
2751 .fxsr,
2752 .lzcnt,
2753 .mmx,
2754 .movbe,
2755 .mwaitx,
2756 .nopl,
2757 .pclmul,
2758 .popcnt,
2759 .prfchw,
2760 .rdpid,
2761 .rdrnd,
2762 .rdseed,
2763 .sahf,
2764 .sha,
2765 .slow_shld,
2766 .sse4a,
2767 .wbnoinvd,
2768 .x87,
2769 .xsave,
2770 .xsavec,
2771 .xsaveopt,
2772 .xsaves,
2773 }),
2774 };
2775};
2776
2777/// All x86 CPUs, sorted alphabetically by name.
2778/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
2779/// compiler has inefficient memory and CPU usage, affecting build times.
2780pub const all_cpus = &[_]*const Cpu{
2781 &cpu.amdfam10,
2782 &cpu.athlon,
2783 &cpu.athlon_4,
2784 &cpu.athlon_fx,
2785 &cpu.athlon_mp,
2786 &cpu.athlon_tbird,
2787 &cpu.athlon_xp,
2788 &cpu.athlon64,
2789 &cpu.athlon64_sse3,
2790 &cpu.atom,
2791 &cpu.barcelona,
2792 &cpu.bdver1,
2793 &cpu.bdver2,
2794 &cpu.bdver3,
2795 &cpu.bdver4,
2796 &cpu.bonnell,
2797 &cpu.broadwell,
2798 &cpu.btver1,
2799 &cpu.btver2,
2800 &cpu.c3,
2801 &cpu.c3_2,
2802 &cpu.cannonlake,
2803 &cpu.cascadelake,
2804 &cpu.cooperlake,
2805 &cpu.core_avx_i,
2806 &cpu.core_avx2,
2807 &cpu.core2,
2808 &cpu.corei7,
2809 &cpu.corei7_avx,
2810 &cpu.generic,
2811 &cpu.geode,
2812 &cpu.goldmont,
2813 &cpu.goldmont_plus,
2814 &cpu.haswell,
2815 &cpu._i386,
2816 &cpu._i486,
2817 &cpu._i586,
2818 &cpu._i686,
2819 &cpu.icelake_client,
2820 &cpu.icelake_server,
2821 &cpu.ivybridge,
2822 &cpu.k6,
2823 &cpu.k6_2,
2824 &cpu.k6_3,
2825 &cpu.k8,
2826 &cpu.k8_sse3,
2827 &cpu.knl,
2828 &cpu.knm,
2829 &cpu.lakemont,
2830 &cpu.nehalem,
2831 &cpu.nocona,
2832 &cpu.opteron,
2833 &cpu.opteron_sse3,
2834 &cpu.penryn,
2835 &cpu.pentium,
2836 &cpu.pentium_m,
2837 &cpu.pentium_mmx,
2838 &cpu.pentium2,
2839 &cpu.pentium3,
2840 &cpu.pentium3m,
2841 &cpu.pentium4,
2842 &cpu.pentium4m,
2843 &cpu.pentiumpro,
2844 &cpu.prescott,
2845 &cpu.sandybridge,
2846 &cpu.silvermont,
2847 &cpu.skx,
2848 &cpu.skylake,
2849 &cpu.skylake_avx512,
2850 &cpu.slm,
2851 &cpu.tremont,
2852 &cpu.westmere,
2853 &cpu.winchip_c6,
2854 &cpu.winchip2,
2855 &cpu.x86_64,
2856 &cpu.yonah,
2857 &cpu.znver1,
2858 &cpu.znver2,
2859};
src-self-hosted/clang.zig+2
......@@ -776,6 +776,7 @@ pub extern fn ZigClangFieldDecl_getCanonicalDecl(field_decl: ?*const struct_ZigC
776776pub extern fn ZigClangEnumDecl_getCanonicalDecl(self: ?*const struct_ZigClangEnumDecl) ?*const struct_ZigClangTagDecl;
777777pub extern fn ZigClangTypedefNameDecl_getCanonicalDecl(self: ?*const struct_ZigClangTypedefNameDecl) ?*const struct_ZigClangTypedefNameDecl;
778778pub extern fn ZigClangFunctionDecl_getCanonicalDecl(self: ?*const struct_ZigClangFunctionDecl) ?*const struct_ZigClangFunctionDecl;
779pub extern fn ZigClangParmVarDecl_getOriginalType(self: ?*const struct_ZigClangParmVarDecl) struct_ZigClangQualType;
779780pub extern fn ZigClangVarDecl_getCanonicalDecl(self: ?*const struct_ZigClangVarDecl) ?*const struct_ZigClangVarDecl;
780781pub extern fn ZigClangVarDecl_getSectionAttribute(self: *const ZigClangVarDecl, len: *usize) ?[*]const u8;
781782pub extern fn ZigClangFunctionDecl_getAlignedAttribute(self: *const ZigClangFunctionDecl, *const ZigClangASTContext) c_uint;
......@@ -817,6 +818,7 @@ pub extern fn ZigClangQualType_isRestrictQualified(self: struct_ZigClangQualType
817818pub extern fn ZigClangType_getTypeClass(self: ?*const struct_ZigClangType) ZigClangTypeClass;
818819pub extern fn ZigClangType_getPointeeType(self: ?*const struct_ZigClangType) struct_ZigClangQualType;
819820pub extern fn ZigClangType_isVoidType(self: ?*const struct_ZigClangType) bool;
821pub extern fn ZigClangType_isConstantArrayType(self: ?*const struct_ZigClangType) bool;
820822pub extern fn ZigClangType_isRecordType(self: ?*const struct_ZigClangType) bool;
821823pub extern fn ZigClangType_isArrayType(self: ?*const struct_ZigClangType) bool;
822824pub extern fn ZigClangType_isBooleanType(self: ?*const struct_ZigClangType) bool;
src-self-hosted/main.zig+3-43
......@@ -79,7 +79,9 @@ pub fn main() !void {
7979 } else if (mem.eql(u8, cmd, "libc")) {
8080 return cmdLibC(allocator, cmd_args);
8181 } else if (mem.eql(u8, cmd, "targets")) {
82 return cmdTargets(allocator, cmd_args);
82 // TODO figure out the current target rather than using the target that was specified when
83 // compiling the compiler
84 return @import("print_targets.zig").cmdTargets(allocator, cmd_args, stdout, Target.current);
8385 } else if (mem.eql(u8, cmd, "version")) {
8486 return cmdVersion(allocator, cmd_args);
8587 } else if (mem.eql(u8, cmd, "zen")) {
......@@ -789,48 +791,6 @@ async fn fmtPath(fmt: *Fmt, file_path_ref: []const u8, check_mode: bool) FmtErro
789791 }
790792}
791793
792// cmd:targets /////////////////////////////////////////////////////////////////////////////////////
793
794fn cmdTargets(allocator: *Allocator, args: []const []const u8) !void {
795 try stdout.write("Architectures:\n");
796 {
797 comptime var i: usize = 0;
798 inline while (i < @memberCount(builtin.Arch)) : (i += 1) {
799 comptime const arch_tag = @memberName(builtin.Arch, i);
800 // NOTE: Cannot use empty string, see #918.
801 comptime const native_str = if (comptime mem.eql(u8, arch_tag, @tagName(builtin.arch))) " (native)\n" else "\n";
802
803 try stdout.print(" {}{}", .{ arch_tag, native_str });
804 }
805 }
806 try stdout.write("\n");
807
808 try stdout.write("Operating Systems:\n");
809 {
810 comptime var i: usize = 0;
811 inline while (i < @memberCount(Target.Os)) : (i += 1) {
812 comptime const os_tag = @memberName(Target.Os, i);
813 // NOTE: Cannot use empty string, see #918.
814 comptime const native_str = if (comptime mem.eql(u8, os_tag, @tagName(builtin.os))) " (native)\n" else "\n";
815
816 try stdout.print(" {}{}", .{ os_tag, native_str });
817 }
818 }
819 try stdout.write("\n");
820
821 try stdout.write("C ABIs:\n");
822 {
823 comptime var i: usize = 0;
824 inline while (i < @memberCount(Target.Abi)) : (i += 1) {
825 comptime const abi_tag = @memberName(Target.Abi, i);
826 // NOTE: Cannot use empty string, see #918.
827 comptime const native_str = if (comptime mem.eql(u8, abi_tag, @tagName(builtin.abi))) " (native)\n" else "\n";
828
829 try stdout.print(" {}{}", .{ abi_tag, native_str });
830 }
831 }
832}
833
834794fn cmdVersion(allocator: *Allocator, args: []const []const u8) !void {
835795 try stdout.print("{}\n", .{std.mem.toSliceConst(u8, c.ZIG_VERSION_STRING)});
836796}
src-self-hosted/print_targets.zig created+251
......@@ -0,0 +1,251 @@
1const std = @import("std");
2const fs = std.fs;
3const io = std.io;
4const mem = std.mem;
5const Allocator = mem.Allocator;
6const Target = std.Target;
7
8// TODO this is hard-coded until self-hosted gains this information canonically
9const available_libcs = [_][]const u8{
10 "aarch64_be-linux-gnu",
11 "aarch64_be-linux-musl",
12 "aarch64_be-windows-gnu",
13 "aarch64-linux-gnu",
14 "aarch64-linux-musl",
15 "aarch64-windows-gnu",
16 "armeb-linux-gnueabi",
17 "armeb-linux-gnueabihf",
18 "armeb-linux-musleabi",
19 "armeb-linux-musleabihf",
20 "armeb-windows-gnu",
21 "arm-linux-gnueabi",
22 "arm-linux-gnueabihf",
23 "arm-linux-musleabi",
24 "arm-linux-musleabihf",
25 "arm-windows-gnu",
26 "i386-linux-gnu",
27 "i386-linux-musl",
28 "i386-windows-gnu",
29 "mips64el-linux-gnuabi64",
30 "mips64el-linux-gnuabin32",
31 "mips64el-linux-musl",
32 "mips64-linux-gnuabi64",
33 "mips64-linux-gnuabin32",
34 "mips64-linux-musl",
35 "mipsel-linux-gnu",
36 "mipsel-linux-musl",
37 "mips-linux-gnu",
38 "mips-linux-musl",
39 "powerpc64le-linux-gnu",
40 "powerpc64le-linux-musl",
41 "powerpc64-linux-gnu",
42 "powerpc64-linux-musl",
43 "powerpc-linux-gnu",
44 "powerpc-linux-musl",
45 "riscv64-linux-gnu",
46 "riscv64-linux-musl",
47 "s390x-linux-gnu",
48 "s390x-linux-musl",
49 "sparc-linux-gnu",
50 "sparcv9-linux-gnu",
51 "wasm32-freestanding-musl",
52 "x86_64-linux-gnu (native)",
53 "x86_64-linux-gnux32",
54 "x86_64-linux-musl",
55 "x86_64-windows-gnu",
56};
57
58// TODO this is hard-coded until self-hosted gains this information canonically
59const available_glibcs = [_][]const u8{
60 "2.0",
61 "2.1",
62 "2.1.1",
63 "2.1.2",
64 "2.1.3",
65 "2.2",
66 "2.2.1",
67 "2.2.2",
68 "2.2.3",
69 "2.2.4",
70 "2.2.5",
71 "2.2.6",
72 "2.3",
73 "2.3.2",
74 "2.3.3",
75 "2.3.4",
76 "2.4",
77 "2.5",
78 "2.6",
79 "2.7",
80 "2.8",
81 "2.9",
82 "2.10",
83 "2.11",
84 "2.12",
85 "2.13",
86 "2.14",
87 "2.15",
88 "2.16",
89 "2.17",
90 "2.18",
91 "2.19",
92 "2.22",
93 "2.23",
94 "2.24",
95 "2.25",
96 "2.26",
97 "2.27",
98 "2.28",
99 "2.29",
100 "2.30",
101};
102
103pub fn cmdTargets(
104 allocator: *Allocator,
105 args: []const []const u8,
106 stdout: *io.OutStream(fs.File.WriteError),
107 native_target: Target,
108) !void {
109 const BOS = io.BufferedOutStream(fs.File.WriteError);
110 var bos = BOS.init(stdout);
111 var jws = std.json.WriteStream(BOS.Stream, 6).init(&bos.stream);
112
113 try jws.beginObject();
114
115 try jws.objectField("arch");
116 try jws.beginObject();
117 {
118 inline for (@typeInfo(Target.Arch).Union.fields) |field| {
119 try jws.objectField(field.name);
120 if (field.field_type == void) {
121 try jws.emitNull();
122 } else {
123 try jws.emitString(@typeName(field.field_type));
124 }
125 }
126 }
127 try jws.endObject();
128
129 try jws.objectField("subArch");
130 try jws.beginObject();
131 const sub_arch_list = [_]type{
132 Target.Arch.Arm32,
133 Target.Arch.Arm64,
134 Target.Arch.Kalimba,
135 Target.Arch.Mips,
136 };
137 inline for (sub_arch_list) |SubArch| {
138 try jws.objectField(@typeName(SubArch));
139 try jws.beginArray();
140 inline for (@typeInfo(SubArch).Enum.fields) |field| {
141 try jws.arrayElem();
142 try jws.emitString(field.name);
143 }
144 try jws.endArray();
145 }
146 try jws.endObject();
147
148 try jws.objectField("os");
149 try jws.beginArray();
150 inline for (@typeInfo(Target.Os).Enum.fields) |field| {
151 try jws.arrayElem();
152 try jws.emitString(field.name);
153 }
154 try jws.endArray();
155
156 try jws.objectField("abi");
157 try jws.beginArray();
158 inline for (@typeInfo(Target.Abi).Enum.fields) |field| {
159 try jws.arrayElem();
160 try jws.emitString(field.name);
161 }
162 try jws.endArray();
163
164 try jws.objectField("libc");
165 try jws.beginArray();
166 for (available_libcs) |libc| {
167 try jws.arrayElem();
168 try jws.emitString(libc);
169 }
170 try jws.endArray();
171
172 try jws.objectField("glibc");
173 try jws.beginArray();
174 for (available_glibcs) |glibc| {
175 try jws.arrayElem();
176 try jws.emitString(glibc);
177 }
178 try jws.endArray();
179
180 try jws.objectField("cpus");
181 try jws.beginObject();
182 inline for (@typeInfo(Target.Arch).Union.fields) |field| {
183 try jws.objectField(field.name);
184 try jws.beginObject();
185 const arch = @unionInit(Target.Arch, field.name, undefined);
186 for (arch.allCpus()) |cpu| {
187 try jws.objectField(cpu.name);
188 try jws.beginArray();
189 for (arch.allFeaturesList()) |feature, i| {
190 if (cpu.features.isEnabled(@intCast(u8, i))) {
191 try jws.arrayElem();
192 try jws.emitString(feature.name);
193 }
194 }
195 try jws.endArray();
196 }
197 try jws.endObject();
198 }
199 try jws.endObject();
200
201 try jws.objectField("cpuFeatures");
202 try jws.beginObject();
203 inline for (@typeInfo(Target.Arch).Union.fields) |field| {
204 try jws.objectField(field.name);
205 try jws.beginArray();
206 const arch = @unionInit(Target.Arch, field.name, undefined);
207 for (arch.allFeaturesList()) |feature| {
208 try jws.arrayElem();
209 try jws.emitString(feature.name);
210 }
211 try jws.endArray();
212 }
213 try jws.endObject();
214
215 try jws.objectField("native");
216 try jws.beginObject();
217 {
218 const triple = try native_target.zigTriple(allocator);
219 defer allocator.free(triple);
220 try jws.objectField("triple");
221 try jws.emitString(triple);
222 }
223 try jws.objectField("arch");
224 try jws.emitString(@tagName(native_target.getArch()));
225 try jws.objectField("os");
226 try jws.emitString(@tagName(native_target.getOs()));
227 try jws.objectField("abi");
228 try jws.emitString(@tagName(native_target.getAbi()));
229 try jws.objectField("cpuName");
230 const cpu_features = native_target.getCpuFeatures();
231 try jws.emitString(cpu_features.cpu.name);
232 {
233 try jws.objectField("cpuFeatures");
234 try jws.beginArray();
235 for (native_target.getArch().allFeaturesList()) |feature, i_usize| {
236 const index = @intCast(Target.Cpu.Feature.Set.Index, i_usize);
237 if (cpu_features.features.isEnabled(index)) {
238 try jws.arrayElem();
239 try jws.emitString(feature.name);
240 }
241 }
242 try jws.endArray();
243 }
244 // TODO implement native glibc version detection in self-hosted
245 try jws.endObject();
246
247 try jws.endObject();
248
249 try bos.stream.writeByte('\n');
250 return bos.flush();
251}
src-self-hosted/stage1.zig+304-1
......@@ -9,9 +9,11 @@ const process = std.process;
99const Allocator = mem.Allocator;
1010const ArrayList = std.ArrayList;
1111const Buffer = std.Buffer;
12const Target = std.Target;
1213const self_hosted_main = @import("main.zig");
1314const errmsg = @import("errmsg.zig");
1415const DepTokenizer = @import("dep_tokenizer.zig").Tokenizer;
16const assert = std.debug.assert;
1517
1618var stderr_file: fs.File = undefined;
1719var stderr: *io.OutStream(fs.File.WriteError) = undefined;
......@@ -63,6 +65,7 @@ const Error = extern enum {
6365 CacheUnavailable,
6466 PathTooLong,
6567 CCompilerCannotFindFile,
68 NoCCompilerInstalled,
6669 ReadingDepFile,
6770 InvalidDepFile,
6871 MissingArchitecture,
......@@ -80,6 +83,15 @@ const Error = extern enum {
8083 OperationAborted,
8184 BrokenPipe,
8285 NoSpaceLeft,
86 NotLazy,
87 IsAsync,
88 ImportOutsidePkgPath,
89 UnknownCpu,
90 UnknownSubArchitecture,
91 UnknownCpuFeature,
92 InvalidCpuFeatures,
93 InvalidLlvmCpuFeaturesFormat,
94 UnknownApplicationBinaryInterface,
8395};
8496
8597const FILE = std.c.FILE;
......@@ -149,7 +161,7 @@ fn fmtMain(argc: c_int, argv: [*]const [*:0]const u8) !void {
149161 const argc_usize = @intCast(usize, argc);
150162 var arg_i: usize = 0;
151163 while (arg_i < argc_usize) : (arg_i += 1) {
152 try args_list.append(std.mem.toSliceConst(u8, argv[arg_i]));
164 try args_list.append(mem.toSliceConst(u8, argv[arg_i]));
153165 }
154166
155167 stdout = &std.io.getStdOut().outStream().stream;
......@@ -527,3 +539,294 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz
527539 node.activate();
528540 node.context.maybeRefresh();
529541}
542
543fn cpuFeaturesFromLLVM(
544 arch: Target.Arch,
545 llvm_cpu_name_z: ?[*:0]const u8,
546 llvm_cpu_features_opt: ?[*:0]const u8,
547) !Target.CpuFeatures {
548 var result = arch.getBaselineCpuFeatures();
549
550 if (llvm_cpu_name_z) |cpu_name_z| {
551 const llvm_cpu_name = mem.toSliceConst(u8, cpu_name_z);
552
553 for (arch.allCpus()) |cpu| {
554 const this_llvm_name = cpu.llvm_name orelse continue;
555 if (mem.eql(u8, this_llvm_name, llvm_cpu_name)) {
556 // Here we use the non-dependencies-populated set,
557 // so that subtracting features later in this function
558 // affect the prepopulated set.
559 result = Target.CpuFeatures{
560 .cpu = cpu,
561 .features = cpu.features,
562 };
563 break;
564 }
565 }
566 }
567
568 const all_features = arch.allFeaturesList();
569
570 if (llvm_cpu_features_opt) |llvm_cpu_features| {
571 var it = mem.tokenize(mem.toSliceConst(u8, llvm_cpu_features), ",");
572 while (it.next()) |decorated_llvm_feat| {
573 var op: enum {
574 add,
575 sub,
576 } = undefined;
577 var llvm_feat: []const u8 = undefined;
578 if (mem.startsWith(u8, decorated_llvm_feat, "+")) {
579 op = .add;
580 llvm_feat = decorated_llvm_feat[1..];
581 } else if (mem.startsWith(u8, decorated_llvm_feat, "-")) {
582 op = .sub;
583 llvm_feat = decorated_llvm_feat[1..];
584 } else {
585 return error.InvalidLlvmCpuFeaturesFormat;
586 }
587 for (all_features) |feature, index_usize| {
588 const this_llvm_name = feature.llvm_name orelse continue;
589 if (mem.eql(u8, llvm_feat, this_llvm_name)) {
590 const index = @intCast(Target.Cpu.Feature.Set.Index, index_usize);
591 switch (op) {
592 .add => result.features.addFeature(index),
593 .sub => result.features.removeFeature(index),
594 }
595 break;
596 }
597 }
598 }
599 }
600
601 result.features.populateDependencies(all_features);
602 return result;
603}
604
605// ABI warning
606export fn stage2_cmd_targets(zig_triple: [*:0]const u8) c_int {
607 cmdTargets(zig_triple) catch |err| {
608 std.debug.warn("unable to list targets: {}\n", .{@errorName(err)});
609 return -1;
610 };
611 return 0;
612}
613
614fn cmdTargets(zig_triple: [*:0]const u8) !void {
615 var target = try Target.parse(mem.toSliceConst(u8, zig_triple));
616 target.Cross.cpu_features = blk: {
617 const llvm = @import("llvm.zig");
618 const llvm_cpu_name = llvm.GetHostCPUName();
619 const llvm_cpu_features = llvm.GetNativeFeatures();
620 break :blk try cpuFeaturesFromLLVM(target.Cross.arch, llvm_cpu_name, llvm_cpu_features);
621 };
622 return @import("print_targets.zig").cmdTargets(
623 std.heap.c_allocator,
624 &[0][]u8{},
625 &std.io.getStdOut().outStream().stream,
626 target,
627 );
628}
629
630const Stage2CpuFeatures = struct {
631 allocator: *mem.Allocator,
632 cpu_features: Target.CpuFeatures,
633
634 llvm_features_str: ?[*:0]const u8,
635
636 builtin_str: [:0]const u8,
637 cache_hash: [:0]const u8,
638
639 const Self = @This();
640
641 fn createFromNative(allocator: *mem.Allocator) !*Self {
642 const arch = Target.current.getArch();
643 const llvm = @import("llvm.zig");
644 const llvm_cpu_name = llvm.GetHostCPUName();
645 const llvm_cpu_features = llvm.GetNativeFeatures();
646 const cpu_features = try cpuFeaturesFromLLVM(arch, llvm_cpu_name, llvm_cpu_features);
647 return createFromCpuFeatures(allocator, arch, cpu_features);
648 }
649
650 fn createFromCpuFeatures(
651 allocator: *mem.Allocator,
652 arch: Target.Arch,
653 cpu_features: Target.CpuFeatures,
654 ) !*Self {
655 const self = try allocator.create(Self);
656 errdefer allocator.destroy(self);
657
658 const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{}", .{
659 cpu_features.cpu.name,
660 cpu_features.features.asBytes(),
661 });
662 errdefer allocator.free(cache_hash);
663
664 const generic_arch_name = arch.genericName();
665 var builtin_str_buffer = try std.Buffer.allocPrint(allocator,
666 \\CpuFeatures{{
667 \\ .cpu = &Target.{}.cpu.{},
668 \\ .features = Target.{}.featureSet(&[_]Target.{}.Feature{{
669 \\
670 , .{
671 generic_arch_name,
672 cpu_features.cpu.name,
673 generic_arch_name,
674 generic_arch_name,
675 });
676 defer builtin_str_buffer.deinit();
677
678 var llvm_features_buffer = try std.Buffer.initSize(allocator, 0);
679 defer llvm_features_buffer.deinit();
680
681 for (arch.allFeaturesList()) |feature, index_usize| {
682 const index = @intCast(Target.Cpu.Feature.Set.Index, index_usize);
683 const is_enabled = cpu_features.features.isEnabled(index);
684
685 if (feature.llvm_name) |llvm_name| {
686 const plus_or_minus = "-+"[@boolToInt(is_enabled)];
687 try llvm_features_buffer.appendByte(plus_or_minus);
688 try llvm_features_buffer.append(llvm_name);
689 try llvm_features_buffer.append(",");
690 }
691
692 if (is_enabled) {
693 // TODO some kind of "zig identifier escape" function rather than
694 // unconditionally using @"" syntax
695 try builtin_str_buffer.append(" .@\"");
696 try builtin_str_buffer.append(feature.name);
697 try builtin_str_buffer.append("\",\n");
698 }
699 }
700
701 try builtin_str_buffer.append(
702 \\ }),
703 \\};
704 \\
705 );
706
707 assert(mem.endsWith(u8, llvm_features_buffer.toSliceConst(), ","));
708 llvm_features_buffer.shrink(llvm_features_buffer.len() - 1);
709
710 self.* = Self{
711 .allocator = allocator,
712 .cpu_features = cpu_features,
713 .llvm_features_str = llvm_features_buffer.toOwnedSlice().ptr,
714 .builtin_str = builtin_str_buffer.toOwnedSlice(),
715 .cache_hash = cache_hash,
716 };
717 return self;
718 }
719
720 fn destroy(self: *Self) void {
721 self.allocator.free(self.cache_hash);
722 self.allocator.free(self.builtin_str);
723 // TODO if (self.llvm_features_str) |llvm_features_str| self.allocator.free(llvm_features_str);
724 self.allocator.destroy(self);
725 }
726};
727
728// ABI warning
729export fn stage2_cpu_features_parse(
730 result: **Stage2CpuFeatures,
731 zig_triple: ?[*:0]const u8,
732 cpu_name: ?[*:0]const u8,
733 cpu_features: ?[*:0]const u8,
734) Error {
735 result.* = stage2ParseCpuFeatures(zig_triple, cpu_name, cpu_features) catch |err| switch (err) {
736 error.OutOfMemory => return .OutOfMemory,
737 error.UnknownArchitecture => return .UnknownArchitecture,
738 error.UnknownSubArchitecture => return .UnknownSubArchitecture,
739 error.UnknownOperatingSystem => return .UnknownOperatingSystem,
740 error.UnknownApplicationBinaryInterface => return .UnknownApplicationBinaryInterface,
741 error.MissingOperatingSystem => return .MissingOperatingSystem,
742 error.MissingArchitecture => return .MissingArchitecture,
743 error.InvalidLlvmCpuFeaturesFormat => return .InvalidLlvmCpuFeaturesFormat,
744 error.InvalidCpuFeatures => return .InvalidCpuFeatures,
745 };
746 return .None;
747}
748
749fn stage2ParseCpuFeatures(
750 zig_triple_oz: ?[*:0]const u8,
751 cpu_name_oz: ?[*:0]const u8,
752 cpu_features_oz: ?[*:0]const u8,
753) !*Stage2CpuFeatures {
754 const zig_triple_z = zig_triple_oz orelse return Stage2CpuFeatures.createFromNative(std.heap.c_allocator);
755 const target = try Target.parse(mem.toSliceConst(u8, zig_triple_z));
756 const arch = target.Cross.arch;
757
758 const cpu = if (cpu_name_oz) |cpu_name_z| blk: {
759 const cpu_name = mem.toSliceConst(u8, cpu_name_z);
760 break :blk arch.parseCpu(cpu_name) catch |err| switch (err) {
761 error.UnknownCpu => {
762 std.debug.warn("Unknown CPU: '{}'\nAvailable CPUs for architecture '{}':\n", .{
763 cpu_name,
764 @tagName(arch),
765 });
766 for (arch.allCpus()) |cpu| {
767 std.debug.warn(" {}\n", .{cpu.name});
768 }
769 process.exit(1);
770 },
771 else => |e| return e,
772 };
773 } else target.Cross.cpu_features.cpu;
774
775 var set = if (cpu_features_oz) |cpu_features_z| blk: {
776 const cpu_features = mem.toSliceConst(u8, cpu_features_z);
777 break :blk arch.parseCpuFeatureSet(cpu, cpu_features) catch |err| switch (err) {
778 error.UnknownCpuFeature => {
779 std.debug.warn(
780 \\Unknown CPU features specified.
781 \\Available CPU features for architecture '{}':
782 \\
783 , .{@tagName(arch)});
784 for (arch.allFeaturesList()) |feature| {
785 std.debug.warn(" {}\n", .{feature.name});
786 }
787 process.exit(1);
788 },
789 else => |e| return e,
790 };
791 } else cpu.features;
792
793 if (arch.subArchFeature()) |index| {
794 set.addFeature(index);
795 }
796 set.populateDependencies(arch.allFeaturesList());
797
798 return Stage2CpuFeatures.createFromCpuFeatures(std.heap.c_allocator, arch, .{
799 .cpu = cpu,
800 .features = set,
801 });
802}
803
804// ABI warning
805export fn stage2_cpu_features_get_cache_hash(
806 cpu_features: *const Stage2CpuFeatures,
807 ptr: *[*:0]const u8,
808 len: *usize,
809) void {
810 ptr.* = cpu_features.cache_hash.ptr;
811 len.* = cpu_features.cache_hash.len;
812}
813
814// ABI warning
815export fn stage2_cpu_features_get_builtin_str(
816 cpu_features: *const Stage2CpuFeatures,
817 ptr: *[*:0]const u8,
818 len: *usize,
819) void {
820 ptr.* = cpu_features.builtin_str.ptr;
821 len.* = cpu_features.builtin_str.len;
822}
823
824// ABI warning
825export fn stage2_cpu_features_get_llvm_cpu(cpu_features: *const Stage2CpuFeatures) ?[*:0]const u8 {
826 return if (cpu_features.cpu_features.cpu.llvm_name) |s| s.ptr else null;
827}
828
829// ABI warning
830export fn stage2_cpu_features_get_llvm_features(cpu_features: *const Stage2CpuFeatures) ?[*:0]const u8 {
831 return cpu_features.llvm_features_str;
832}
src-self-hosted/translate_c.zig+36-15
......@@ -443,12 +443,22 @@ fn visitFnDecl(c: *Context, fn_decl: *const ZigClangFunctionDecl) Error!void {
443443 };
444444
445445 var fn_qt = ZigClangFunctionDecl_getType(fn_decl);
446 var fn_type = ZigClangQualType_getTypePtr(fn_qt);
447 if (ZigClangType_getTypeClass(fn_type) == .Attributed) {
448 const attr_type = @ptrCast(*const ZigClangAttributedType, fn_type);
449 fn_qt = ZigClangAttributedType_getEquivalentType(attr_type);
450 fn_type = ZigClangQualType_getTypePtr(fn_qt);
451 }
446
447 const fn_type = while (true) {
448 const fn_type = ZigClangQualType_getTypePtr(fn_qt);
449
450 switch (ZigClangType_getTypeClass(fn_type)) {
451 .Attributed => {
452 const attr_type = @ptrCast(*const ZigClangAttributedType, fn_type);
453 fn_qt = ZigClangAttributedType_getEquivalentType(attr_type);
454 },
455 .Paren => {
456 const paren_type = @ptrCast(*const ZigClangParenType, fn_type);
457 fn_qt = ZigClangParenType_getInnerType(paren_type);
458 },
459 else => break fn_type,
460 }
461 } else unreachable;
452462
453463 const proto_node = switch (ZigClangType_getTypeClass(fn_type)) {
454464 .FunctionProto => blk: {
......@@ -485,6 +495,7 @@ fn visitFnDecl(c: *Context, fn_decl: *const ZigClangFunctionDecl) Error!void {
485495 block_scope.block_node = block_node;
486496
487497 var it = proto_node.params.iterator(0);
498 var param_id: c_uint = 0;
488499 while (it.next()) |p| {
489500 const param = @fieldParentPtr(ast.Node.ParamDecl, "base", p.*);
490501 const param_name = if (param.name_token) |name_tok|
......@@ -498,18 +509,27 @@ fn visitFnDecl(c: *Context, fn_decl: *const ZigClangFunctionDecl) Error!void {
498509
499510 const mangled_param_name = try block_scope.makeMangledName(c, param_name);
500511
512 const c_param = ZigClangFunctionDecl_getParamDecl(fn_decl, param_id);
513 const qual_type = ZigClangParmVarDecl_getOriginalType(c_param);
514 const is_const = ZigClangQualType_isConstQualified(qual_type);
515
501516 const arg_name = blk: {
502 const bare_arg_name = try std.fmt.allocPrint(c.a(), "arg_{}", .{mangled_param_name});
517 const param_prefix = if (is_const) "" else "arg_";
518 const bare_arg_name = try std.fmt.allocPrint(c.a(), "{}{}", .{ param_prefix, mangled_param_name });
503519 break :blk try block_scope.makeMangledName(c, bare_arg_name);
504520 };
505521
506 const node = try transCreateNodeVarDecl(c, false, false, mangled_param_name);
507 node.eq_token = try appendToken(c, .Equal, "=");
508 node.init_node = try transCreateNodeIdentifier(c, arg_name);
509 node.semicolon_token = try appendToken(c, .Semicolon, ";");
510 try block_node.statements.push(&node.base);
511 param.name_token = try appendIdentifier(c, arg_name);
512 _ = try appendToken(c, .Colon, ":");
522 if (!is_const) {
523 const node = try transCreateNodeVarDecl(c, false, false, mangled_param_name);
524 node.eq_token = try appendToken(c, .Equal, "=");
525 node.init_node = try transCreateNodeIdentifier(c, arg_name);
526 node.semicolon_token = try appendToken(c, .Semicolon, ";");
527 try block_node.statements.push(&node.base);
528 param.name_token = try appendIdentifier(c, arg_name);
529 _ = try appendToken(c, .Colon, ":");
530 }
531
532 param_id += 1;
513533 }
514534
515535 transCompoundStmtInline(rp, &block_scope.base, @ptrCast(*const ZigClangCompoundStmt, body_stmt), block_node) catch |err| switch (err) {
......@@ -1982,7 +2002,8 @@ fn transInitListExprArray(
19822002 const arr_type = ZigClangType_getAsArrayTypeUnsafe(ty);
19832003 const child_qt = ZigClangArrayType_getElementType(arr_type);
19842004 const init_count = ZigClangInitListExpr_getNumInits(expr);
1985 const const_arr_ty = @ptrCast(*const ZigClangConstantArrayType, ty);
2005 assert(ZigClangType_isConstantArrayType(@ptrCast(*const ZigClangType, arr_type)));
2006 const const_arr_ty = @ptrCast(*const ZigClangConstantArrayType, arr_type);
19862007 const size_ap_int = ZigClangConstantArrayType_getSize(const_arr_ty);
19872008 const all_count = ZigClangAPInt_getLimitedValue(size_ap_int, math.maxInt(usize));
19882009 const leftover_count = all_count - init_count;
src/all_types.hpp+1397-909
......@@ -33,12 +33,15 @@ struct BuiltinFnEntry;
3333struct TypeStructField;
3434struct CodeGen;
3535struct ZigValue;
36struct IrInstruction;
37struct IrInstructionCast;
38struct IrInstructionAllocaGen;
39struct IrInstructionCallGen;
40struct IrInstructionAwaitGen;
41struct IrBasicBlock;
36struct IrInst;
37struct IrInstSrc;
38struct IrInstGen;
39struct IrInstGenCast;
40struct IrInstGenAlloca;
41struct IrInstGenCall;
42struct IrInstGenAwait;
43struct IrBasicBlockSrc;
44struct IrBasicBlockGen;
4245struct ScopeDecls;
4346struct ZigWindowsSDK;
4447struct Tld;
......@@ -50,6 +53,7 @@ struct ResultLocPeerParent;
5053struct ResultLocBitCast;
5154struct ResultLocCast;
5255struct ResultLocReturn;
56struct IrExecutableGen;
5357
5458enum PtrLen {
5559 PtrLenUnknown,
......@@ -97,8 +101,8 @@ enum X64CABIClass {
97101 X64CABIClass_SSE,
98102};
99103
100struct IrExecutable {
101 ZigList<IrBasicBlock *> basic_block_list;
104struct IrExecutableSrc {
105 ZigList<IrBasicBlockSrc *> basic_block_list;
102106 Buf *name;
103107 ZigFn *name_fn;
104108 size_t mem_slot_count;
......@@ -108,8 +112,7 @@ struct IrExecutable {
108112 ZigFn *fn_entry;
109113 Buf *c_import_buf;
110114 AstNode *source_node;
111 IrExecutable *parent_exec;
112 IrExecutable *source_exec;
115 IrExecutableGen *parent_exec;
113116 IrAnalyze *analysis;
114117 Scope *begin_scope;
115118 ErrorMsg *first_err_trace_msg;
......@@ -124,6 +127,32 @@ struct IrExecutable {
124127 void src();
125128};
126129
130struct IrExecutableGen {
131 ZigList<IrBasicBlockGen *> basic_block_list;
132 Buf *name;
133 ZigFn *name_fn;
134 size_t mem_slot_count;
135 size_t next_debug_id;
136 size_t *backward_branch_count;
137 size_t *backward_branch_quota;
138 ZigFn *fn_entry;
139 Buf *c_import_buf;
140 AstNode *source_node;
141 IrExecutableGen *parent_exec;
142 IrExecutableSrc *source_exec;
143 Scope *begin_scope;
144 ErrorMsg *first_err_trace_msg;
145 ZigList<Tld *> tld_list;
146
147 bool is_inline;
148 bool is_generic_instantiation;
149 bool need_err_code_spill;
150
151 // This is a function for use in the debugger to print
152 // the source location.
153 void src();
154};
155
127156enum OutType {
128157 OutTypeUnknown,
129158 OutTypeExe,
......@@ -287,7 +316,8 @@ struct ConstErrValue {
287316
288317struct ConstBoundFnValue {
289318 ZigFn *fn;
290 IrInstruction *first_arg;
319 IrInstGen *first_arg;
320 IrInst *first_arg_src;
291321};
292322
293323struct ConstArgTuple {
......@@ -350,14 +380,14 @@ struct LazyValueAlignOf {
350380 LazyValue base;
351381
352382 IrAnalyze *ira;
353 IrInstruction *target_type;
383 IrInstGen *target_type;
354384};
355385
356386struct LazyValueSizeOf {
357387 LazyValue base;
358388
359389 IrAnalyze *ira;
360 IrInstruction *target_type;
390 IrInstGen *target_type;
361391
362392 bool bit_size;
363393};
......@@ -366,9 +396,9 @@ struct LazyValueSliceType {
366396 LazyValue base;
367397
368398 IrAnalyze *ira;
369 IrInstruction *sentinel; // can be null
370 IrInstruction *elem_type;
371 IrInstruction *align_inst; // can be null
399 IrInstGen *sentinel; // can be null
400 IrInstGen *elem_type;
401 IrInstGen *align_inst; // can be null
372402
373403 bool is_const;
374404 bool is_volatile;
......@@ -379,8 +409,8 @@ struct LazyValueArrayType {
379409 LazyValue base;
380410
381411 IrAnalyze *ira;
382 IrInstruction *sentinel; // can be null
383 IrInstruction *elem_type;
412 IrInstGen *sentinel; // can be null
413 IrInstGen *elem_type;
384414 uint64_t length;
385415};
386416
......@@ -388,9 +418,9 @@ struct LazyValuePtrType {
388418 LazyValue base;
389419
390420 IrAnalyze *ira;
391 IrInstruction *sentinel; // can be null
392 IrInstruction *elem_type;
393 IrInstruction *align_inst; // can be null
421 IrInstGen *sentinel; // can be null
422 IrInstGen *elem_type;
423 IrInstGen *align_inst; // can be null
394424
395425 PtrLen ptr_len;
396426 uint32_t bit_offset_in_host;
......@@ -405,7 +435,7 @@ struct LazyValueOptType {
405435 LazyValue base;
406436
407437 IrAnalyze *ira;
408 IrInstruction *payload_type;
438 IrInstGen *payload_type;
409439};
410440
411441struct LazyValueFnType {
......@@ -413,9 +443,9 @@ struct LazyValueFnType {
413443
414444 IrAnalyze *ira;
415445 AstNode *proto_node;
416 IrInstruction **param_types;
417 IrInstruction *align_inst; // can be null
418 IrInstruction *return_type;
446 IrInstGen **param_types;
447 IrInstGen *align_inst; // can be null
448 IrInstGen *return_type;
419449
420450 CallingConvention cc;
421451 bool is_generic;
......@@ -425,8 +455,8 @@ struct LazyValueErrUnionType {
425455 LazyValue base;
426456
427457 IrAnalyze *ira;
428 IrInstruction *err_set_type;
429 IrInstruction *payload_type;
458 IrInstGen *err_set_type;
459 IrInstGen *payload_type;
430460 Buf *type_name;
431461};
432462
......@@ -473,6 +503,9 @@ struct ZigValue {
473503 // uncomment these to find bugs. can't leave them uncommented because of a gcc-9 warning
474504 //ZigValue(const ZigValue &other) = delete; // plz zero initialize with {}
475505 //ZigValue& operator= (const ZigValue &other) = delete; // use copy_const_val
506
507 // for use in debuggers
508 void dump();
476509};
477510
478511enum ReturnKnowledge {
......@@ -1227,6 +1260,7 @@ static const uint32_t VECTOR_INDEX_RUNTIME = UINT32_MAX - 1;
12271260struct InferredStructField {
12281261 ZigType *inferred_struct_type;
12291262 Buf *field_name;
1263 bool already_resolved;
12301264};
12311265
12321266struct ZigTypePointer {
......@@ -1602,19 +1636,19 @@ struct ZigFn {
16021636 // in the case of async functions this is the implicit return type according to the
16031637 // zig source code, not according to zig ir
16041638 ZigType *src_implicit_return_type;
1605 IrExecutable *ir_executable;
1606 IrExecutable analyzed_executable;
1639 IrExecutableSrc *ir_executable;
1640 IrExecutableGen analyzed_executable;
16071641 size_t prealloc_bbc;
16081642 size_t prealloc_backward_branch_quota;
16091643 AstNode **param_source_nodes;
16101644 Buf **param_names;
1611 IrInstruction *err_code_spill;
1645 IrInstGen *err_code_spill;
16121646 AstNode *assumed_non_async;
16131647
16141648 AstNode *fn_no_inline_set_node;
16151649 AstNode *fn_static_eval_set_node;
16161650
1617 ZigList<IrInstructionAllocaGen *> alloca_gen_list;
1651 ZigList<IrInstGenAlloca *> alloca_gen_list;
16181652 ZigList<ZigVar *> variable_list;
16191653
16201654 Buf *section_name;
......@@ -1626,8 +1660,8 @@ struct ZigFn {
16261660 AstNode *non_async_node;
16271661
16281662 ZigList<GlobalExport> export_list;
1629 ZigList<IrInstructionCallGen *> call_list;
1630 ZigList<IrInstructionAwaitGen *> await_list;
1663 ZigList<IrInstGenCall *> call_list;
1664 ZigList<IrInstGenAwait *> await_list;
16311665
16321666 LLVMValueRef valgrind_client_request_array;
16331667
......@@ -1913,6 +1947,15 @@ enum BuildMode {
19131947 BuildModeSmallRelease,
19141948};
19151949
1950enum CodeModel {
1951 CodeModelDefault,
1952 CodeModelTiny,
1953 CodeModelSmall,
1954 CodeModelKernel,
1955 CodeModelMedium,
1956 CodeModelLarge,
1957};
1958
19161959enum EmitFileType {
19171960 EmitFileTypeBinary,
19181961 EmitFileTypeAssembly,
......@@ -2098,8 +2141,9 @@ struct CodeGen {
20982141 Buf *zig_c_headers_dir; // Cannot be overridden; derived from zig_lib_dir.
20992142 Buf *zig_std_special_dir; // Cannot be overridden; derived from zig_lib_dir.
21002143
2101 IrInstruction *invalid_instruction;
2102 IrInstruction *unreach_instruction;
2144 IrInstSrc *invalid_inst_src;
2145 IrInstGen *invalid_inst_gen;
2146 IrInstGen *unreach_instruction;
21032147
21042148 ZigValue panic_msg_vals[PanicMsgIdCount];
21052149
......@@ -2144,6 +2188,7 @@ struct CodeGen {
21442188 bool verbose_llvm_ir;
21452189 bool verbose_cimport;
21462190 bool verbose_cc;
2191 bool verbose_llvm_cpu_features;
21472192 bool error_during_imports;
21482193 bool generate_error_name_table;
21492194 bool enable_cache; // mutually exclusive with output_dir
......@@ -2199,6 +2244,7 @@ struct CodeGen {
21992244 bool enable_dump_analysis;
22002245 bool enable_doc_generation;
22012246 bool disable_bin_generation;
2247 CodeModel code_model;
22022248
22032249 Buf *mmacosx_version_min;
22042250 Buf *mios_version_min;
......@@ -2222,8 +2268,8 @@ struct ZigVar {
22222268 ZigValue *const_value;
22232269 ZigType *var_type;
22242270 LLVMValueRef value_ref;
2225 IrInstruction *is_comptime;
2226 IrInstruction *ptr_instruction;
2271 IrInstSrc *is_comptime;
2272 IrInstGen *ptr_instruction;
22272273 // which node is the declaration of the variable
22282274 AstNode *decl_node;
22292275 ZigLLVMDILocalVariable *di_loc_var;
......@@ -2231,8 +2277,7 @@ struct ZigVar {
22312277 Scope *parent_scope;
22322278 Scope *child_scope;
22332279 LLVMValueRef param_value_ref;
2234 size_t mem_slot_index;
2235 IrExecutable *owner_exec;
2280 IrExecutableSrc *owner_exec;
22362281
22372282 Buf *section_name;
22382283
......@@ -2252,6 +2297,7 @@ struct ZigVar {
22522297 bool is_thread_local;
22532298 bool is_comptime_memoized;
22542299 bool is_comptime_memoized_value;
2300 bool did_the_decl_codegen;
22552301};
22562302
22572303struct ErrorTableEntry {
......@@ -2323,11 +2369,11 @@ struct ScopeBlock {
23232369 Scope base;
23242370
23252371 Buf *name;
2326 IrBasicBlock *end_block;
2327 IrInstruction *is_comptime;
2372 IrBasicBlockSrc *end_block;
2373 IrInstSrc *is_comptime;
23282374 ResultLocPeerParent *peer_parent;
2329 ZigList<IrInstruction *> *incoming_values;
2330 ZigList<IrBasicBlock *> *incoming_blocks;
2375 ZigList<IrInstSrc *> *incoming_values;
2376 ZigList<IrBasicBlockSrc *> *incoming_blocks;
23312377
23322378 AstNode *safety_set_node;
23332379 AstNode *fast_math_set_node;
......@@ -2378,11 +2424,11 @@ struct ScopeLoop {
23782424
23792425 LVal lval;
23802426 Buf *name;
2381 IrBasicBlock *break_block;
2382 IrBasicBlock *continue_block;
2383 IrInstruction *is_comptime;
2384 ZigList<IrInstruction *> *incoming_values;
2385 ZigList<IrBasicBlock *> *incoming_blocks;
2427 IrBasicBlockSrc *break_block;
2428 IrBasicBlockSrc *continue_block;
2429 IrInstSrc *is_comptime;
2430 ZigList<IrInstSrc *> *incoming_values;
2431 ZigList<IrBasicBlockSrc *> *incoming_blocks;
23862432 ResultLocPeerParent *peer_parent;
23872433 ScopeExpr *spill_scope;
23882434};
......@@ -2393,7 +2439,7 @@ struct ScopeLoop {
23932439struct ScopeRuntime {
23942440 Scope base;
23952441
2396 IrInstruction *is_comptime;
2442 IrInstSrc *is_comptime;
23972443};
23982444
23992445// This scope is created for a suspend block in order to have labeled
......@@ -2472,319 +2518,450 @@ enum AtomicRmwOp {
24722518// to another basic block.
24732519// Phi instructions must be first in a basic block.
24742520// The last instruction in a basic block must be of type unreachable.
2475struct IrBasicBlock {
2476 ZigList<IrInstruction *> instruction_list;
2477 IrBasicBlock *other;
2521struct IrBasicBlockSrc {
2522 ZigList<IrInstSrc *> instruction_list;
2523 IrBasicBlockGen *child;
24782524 Scope *scope;
24792525 const char *name_hint;
2480 size_t debug_id;
2481 size_t ref_count;
2482 // index into the basic block list
2483 size_t index;
2526 IrInst *suspend_instruction_ref;
2527
2528 uint32_t ref_count;
2529 uint32_t index; // index into the basic block list
2530
2531 uint32_t debug_id;
2532 bool suspended;
2533 bool in_resume_stack;
2534};
2535
2536struct IrBasicBlockGen {
2537 ZigList<IrInstGen *> instruction_list;
2538 IrBasicBlockSrc *parent;
2539 Scope *scope;
2540 const char *name_hint;
2541 uint32_t index; // index into the basic block list
2542 uint32_t ref_count;
24842543 LLVMBasicBlockRef llvm_block;
24852544 LLVMBasicBlockRef llvm_exit_block;
24862545 // The instruction that referenced this basic block and caused us to
24872546 // analyze the basic block. If the same instruction wants us to emit
24882547 // the same basic block, then we re-generate it instead of saving it.
2489 IrInstruction *ref_instruction;
2548 IrInst *ref_instruction;
24902549 // When this is non-null, a branch to this basic block is only allowed
24912550 // if the branch is comptime. The instruction points to the reason
24922551 // the basic block must be comptime.
2493 IrInstruction *must_be_comptime_source_instr;
2494 IrInstruction *suspend_instruction_ref;
2552 IrInst *must_be_comptime_source_instr;
2553
2554 uint32_t debug_id;
24952555 bool already_appended;
2496 bool suspended;
2497 bool in_resume_stack;
24982556};
24992557
2500// These instructions are in transition to having "pass 1" instructions
2501// and "pass 2" instructions. The pass 1 instructions are suffixed with Src
2502// and pass 2 are suffixed with Gen.
2503// Once all instructions are separated in this way, they'll have different
2504// base types for better type safety.
25052558// Src instructions are generated by ir_gen_* functions in ir.cpp from AST.
25062559// ir_analyze_* functions consume Src instructions and produce Gen instructions.
2560// Src instructions do not have type information; Gen instructions do.
2561enum IrInstSrcId {
2562 IrInstSrcIdInvalid,
2563 IrInstSrcIdDeclVar,
2564 IrInstSrcIdBr,
2565 IrInstSrcIdCondBr,
2566 IrInstSrcIdSwitchBr,
2567 IrInstSrcIdSwitchVar,
2568 IrInstSrcIdSwitchElseVar,
2569 IrInstSrcIdSwitchTarget,
2570 IrInstSrcIdPhi,
2571 IrInstSrcIdUnOp,
2572 IrInstSrcIdBinOp,
2573 IrInstSrcIdMergeErrSets,
2574 IrInstSrcIdLoadPtr,
2575 IrInstSrcIdStorePtr,
2576 IrInstSrcIdFieldPtr,
2577 IrInstSrcIdElemPtr,
2578 IrInstSrcIdVarPtr,
2579 IrInstSrcIdCall,
2580 IrInstSrcIdCallArgs,
2581 IrInstSrcIdCallExtra,
2582 IrInstSrcIdConst,
2583 IrInstSrcIdReturn,
2584 IrInstSrcIdContainerInitList,
2585 IrInstSrcIdContainerInitFields,
2586 IrInstSrcIdUnreachable,
2587 IrInstSrcIdTypeOf,
2588 IrInstSrcIdSetCold,
2589 IrInstSrcIdSetRuntimeSafety,
2590 IrInstSrcIdSetFloatMode,
2591 IrInstSrcIdArrayType,
2592 IrInstSrcIdAnyFrameType,
2593 IrInstSrcIdSliceType,
2594 IrInstSrcIdAsm,
2595 IrInstSrcIdSizeOf,
2596 IrInstSrcIdTestNonNull,
2597 IrInstSrcIdOptionalUnwrapPtr,
2598 IrInstSrcIdClz,
2599 IrInstSrcIdCtz,
2600 IrInstSrcIdPopCount,
2601 IrInstSrcIdBswap,
2602 IrInstSrcIdBitReverse,
2603 IrInstSrcIdImport,
2604 IrInstSrcIdCImport,
2605 IrInstSrcIdCInclude,
2606 IrInstSrcIdCDefine,
2607 IrInstSrcIdCUndef,
2608 IrInstSrcIdRef,
2609 IrInstSrcIdCompileErr,
2610 IrInstSrcIdCompileLog,
2611 IrInstSrcIdErrName,
2612 IrInstSrcIdEmbedFile,
2613 IrInstSrcIdCmpxchg,
2614 IrInstSrcIdFence,
2615 IrInstSrcIdTruncate,
2616 IrInstSrcIdIntCast,
2617 IrInstSrcIdFloatCast,
2618 IrInstSrcIdIntToFloat,
2619 IrInstSrcIdFloatToInt,
2620 IrInstSrcIdBoolToInt,
2621 IrInstSrcIdIntType,
2622 IrInstSrcIdVectorType,
2623 IrInstSrcIdShuffleVector,
2624 IrInstSrcIdSplat,
2625 IrInstSrcIdBoolNot,
2626 IrInstSrcIdMemset,
2627 IrInstSrcIdMemcpy,
2628 IrInstSrcIdSlice,
2629 IrInstSrcIdMemberCount,
2630 IrInstSrcIdMemberType,
2631 IrInstSrcIdMemberName,
2632 IrInstSrcIdBreakpoint,
2633 IrInstSrcIdReturnAddress,
2634 IrInstSrcIdFrameAddress,
2635 IrInstSrcIdFrameHandle,
2636 IrInstSrcIdFrameType,
2637 IrInstSrcIdFrameSize,
2638 IrInstSrcIdAlignOf,
2639 IrInstSrcIdOverflowOp,
2640 IrInstSrcIdTestErr,
2641 IrInstSrcIdMulAdd,
2642 IrInstSrcIdFloatOp,
2643 IrInstSrcIdUnwrapErrCode,
2644 IrInstSrcIdUnwrapErrPayload,
2645 IrInstSrcIdFnProto,
2646 IrInstSrcIdTestComptime,
2647 IrInstSrcIdPtrCast,
2648 IrInstSrcIdBitCast,
2649 IrInstSrcIdIntToPtr,
2650 IrInstSrcIdPtrToInt,
2651 IrInstSrcIdIntToEnum,
2652 IrInstSrcIdEnumToInt,
2653 IrInstSrcIdIntToErr,
2654 IrInstSrcIdErrToInt,
2655 IrInstSrcIdCheckSwitchProngs,
2656 IrInstSrcIdCheckStatementIsVoid,
2657 IrInstSrcIdTypeName,
2658 IrInstSrcIdDeclRef,
2659 IrInstSrcIdPanic,
2660 IrInstSrcIdTagName,
2661 IrInstSrcIdTagType,
2662 IrInstSrcIdFieldParentPtr,
2663 IrInstSrcIdByteOffsetOf,
2664 IrInstSrcIdBitOffsetOf,
2665 IrInstSrcIdTypeInfo,
2666 IrInstSrcIdType,
2667 IrInstSrcIdHasField,
2668 IrInstSrcIdTypeId,
2669 IrInstSrcIdSetEvalBranchQuota,
2670 IrInstSrcIdPtrType,
2671 IrInstSrcIdAlignCast,
2672 IrInstSrcIdImplicitCast,
2673 IrInstSrcIdResolveResult,
2674 IrInstSrcIdResetResult,
2675 IrInstSrcIdOpaqueType,
2676 IrInstSrcIdSetAlignStack,
2677 IrInstSrcIdArgType,
2678 IrInstSrcIdExport,
2679 IrInstSrcIdErrorReturnTrace,
2680 IrInstSrcIdErrorUnion,
2681 IrInstSrcIdAtomicRmw,
2682 IrInstSrcIdAtomicLoad,
2683 IrInstSrcIdAtomicStore,
2684 IrInstSrcIdSaveErrRetAddr,
2685 IrInstSrcIdAddImplicitReturnType,
2686 IrInstSrcIdErrSetCast,
2687 IrInstSrcIdToBytes,
2688 IrInstSrcIdFromBytes,
2689 IrInstSrcIdCheckRuntimeScope,
2690 IrInstSrcIdHasDecl,
2691 IrInstSrcIdUndeclaredIdent,
2692 IrInstSrcIdAlloca,
2693 IrInstSrcIdEndExpr,
2694 IrInstSrcIdUnionInitNamedField,
2695 IrInstSrcIdSuspendBegin,
2696 IrInstSrcIdSuspendFinish,
2697 IrInstSrcIdAwait,
2698 IrInstSrcIdResume,
2699 IrInstSrcIdSpillBegin,
2700 IrInstSrcIdSpillEnd,
2701};
2702
25072703// ir_render_* functions in codegen.cpp consume Gen instructions and produce LLVM IR.
25082704// Src instructions do not have type information; Gen instructions do.
2509enum IrInstructionId {
2510 IrInstructionIdInvalid,
2511 IrInstructionIdDeclVarSrc,
2512 IrInstructionIdDeclVarGen,
2513 IrInstructionIdBr,
2514 IrInstructionIdCondBr,
2515 IrInstructionIdSwitchBr,
2516 IrInstructionIdSwitchVar,
2517 IrInstructionIdSwitchElseVar,
2518 IrInstructionIdSwitchTarget,
2519 IrInstructionIdPhi,
2520 IrInstructionIdUnOp,
2521 IrInstructionIdBinOp,
2522 IrInstructionIdMergeErrSets,
2523 IrInstructionIdLoadPtr,
2524 IrInstructionIdLoadPtrGen,
2525 IrInstructionIdStorePtr,
2526 IrInstructionIdVectorStoreElem,
2527 IrInstructionIdFieldPtr,
2528 IrInstructionIdStructFieldPtr,
2529 IrInstructionIdUnionFieldPtr,
2530 IrInstructionIdElemPtr,
2531 IrInstructionIdVarPtr,
2532 IrInstructionIdReturnPtr,
2533 IrInstructionIdCallSrc,
2534 IrInstructionIdCallSrcArgs,
2535 IrInstructionIdCallExtra,
2536 IrInstructionIdCallGen,
2537 IrInstructionIdConst,
2538 IrInstructionIdReturn,
2539 IrInstructionIdCast,
2540 IrInstructionIdResizeSlice,
2541 IrInstructionIdContainerInitList,
2542 IrInstructionIdContainerInitFields,
2543 IrInstructionIdUnreachable,
2544 IrInstructionIdTypeOf,
2545 IrInstructionIdSetCold,
2546 IrInstructionIdSetRuntimeSafety,
2547 IrInstructionIdSetFloatMode,
2548 IrInstructionIdArrayType,
2549 IrInstructionIdAnyFrameType,
2550 IrInstructionIdSliceType,
2551 IrInstructionIdAsmSrc,
2552 IrInstructionIdAsmGen,
2553 IrInstructionIdSizeOf,
2554 IrInstructionIdTestNonNull,
2555 IrInstructionIdOptionalUnwrapPtr,
2556 IrInstructionIdOptionalWrap,
2557 IrInstructionIdUnionTag,
2558 IrInstructionIdClz,
2559 IrInstructionIdCtz,
2560 IrInstructionIdPopCount,
2561 IrInstructionIdBswap,
2562 IrInstructionIdBitReverse,
2563 IrInstructionIdImport,
2564 IrInstructionIdCImport,
2565 IrInstructionIdCInclude,
2566 IrInstructionIdCDefine,
2567 IrInstructionIdCUndef,
2568 IrInstructionIdRef,
2569 IrInstructionIdRefGen,
2570 IrInstructionIdCompileErr,
2571 IrInstructionIdCompileLog,
2572 IrInstructionIdErrName,
2573 IrInstructionIdEmbedFile,
2574 IrInstructionIdCmpxchgSrc,
2575 IrInstructionIdCmpxchgGen,
2576 IrInstructionIdFence,
2577 IrInstructionIdTruncate,
2578 IrInstructionIdIntCast,
2579 IrInstructionIdFloatCast,
2580 IrInstructionIdIntToFloat,
2581 IrInstructionIdFloatToInt,
2582 IrInstructionIdBoolToInt,
2583 IrInstructionIdIntType,
2584 IrInstructionIdVectorType,
2585 IrInstructionIdShuffleVector,
2586 IrInstructionIdSplatSrc,
2587 IrInstructionIdSplatGen,
2588 IrInstructionIdBoolNot,
2589 IrInstructionIdMemset,
2590 IrInstructionIdMemcpy,
2591 IrInstructionIdSliceSrc,
2592 IrInstructionIdSliceGen,
2593 IrInstructionIdMemberCount,
2594 IrInstructionIdMemberType,
2595 IrInstructionIdMemberName,
2596 IrInstructionIdBreakpoint,
2597 IrInstructionIdReturnAddress,
2598 IrInstructionIdFrameAddress,
2599 IrInstructionIdFrameHandle,
2600 IrInstructionIdFrameType,
2601 IrInstructionIdFrameSizeSrc,
2602 IrInstructionIdFrameSizeGen,
2603 IrInstructionIdAlignOf,
2604 IrInstructionIdOverflowOp,
2605 IrInstructionIdTestErrSrc,
2606 IrInstructionIdTestErrGen,
2607 IrInstructionIdMulAdd,
2608 IrInstructionIdFloatOp,
2609 IrInstructionIdUnwrapErrCode,
2610 IrInstructionIdUnwrapErrPayload,
2611 IrInstructionIdErrWrapCode,
2612 IrInstructionIdErrWrapPayload,
2613 IrInstructionIdFnProto,
2614 IrInstructionIdTestComptime,
2615 IrInstructionIdPtrCastSrc,
2616 IrInstructionIdPtrCastGen,
2617 IrInstructionIdBitCastSrc,
2618 IrInstructionIdBitCastGen,
2619 IrInstructionIdWidenOrShorten,
2620 IrInstructionIdIntToPtr,
2621 IrInstructionIdPtrToInt,
2622 IrInstructionIdIntToEnum,
2623 IrInstructionIdEnumToInt,
2624 IrInstructionIdIntToErr,
2625 IrInstructionIdErrToInt,
2626 IrInstructionIdCheckSwitchProngs,
2627 IrInstructionIdCheckStatementIsVoid,
2628 IrInstructionIdTypeName,
2629 IrInstructionIdDeclRef,
2630 IrInstructionIdPanic,
2631 IrInstructionIdTagName,
2632 IrInstructionIdTagType,
2633 IrInstructionIdFieldParentPtr,
2634 IrInstructionIdByteOffsetOf,
2635 IrInstructionIdBitOffsetOf,
2636 IrInstructionIdTypeInfo,
2637 IrInstructionIdType,
2638 IrInstructionIdHasField,
2639 IrInstructionIdTypeId,
2640 IrInstructionIdSetEvalBranchQuota,
2641 IrInstructionIdPtrType,
2642 IrInstructionIdAlignCast,
2643 IrInstructionIdImplicitCast,
2644 IrInstructionIdResolveResult,
2645 IrInstructionIdResetResult,
2646 IrInstructionIdOpaqueType,
2647 IrInstructionIdSetAlignStack,
2648 IrInstructionIdArgType,
2649 IrInstructionIdExport,
2650 IrInstructionIdErrorReturnTrace,
2651 IrInstructionIdErrorUnion,
2652 IrInstructionIdAtomicRmw,
2653 IrInstructionIdAtomicLoad,
2654 IrInstructionIdAtomicStore,
2655 IrInstructionIdSaveErrRetAddr,
2656 IrInstructionIdAddImplicitReturnType,
2657 IrInstructionIdErrSetCast,
2658 IrInstructionIdToBytes,
2659 IrInstructionIdFromBytes,
2660 IrInstructionIdCheckRuntimeScope,
2661 IrInstructionIdVectorToArray,
2662 IrInstructionIdArrayToVector,
2663 IrInstructionIdAssertZero,
2664 IrInstructionIdAssertNonNull,
2665 IrInstructionIdHasDecl,
2666 IrInstructionIdUndeclaredIdent,
2667 IrInstructionIdAllocaSrc,
2668 IrInstructionIdAllocaGen,
2669 IrInstructionIdEndExpr,
2670 IrInstructionIdPtrOfArrayToSlice,
2671 IrInstructionIdUnionInitNamedField,
2672 IrInstructionIdSuspendBegin,
2673 IrInstructionIdSuspendFinish,
2674 IrInstructionIdAwaitSrc,
2675 IrInstructionIdAwaitGen,
2676 IrInstructionIdResume,
2677 IrInstructionIdSpillBegin,
2678 IrInstructionIdSpillEnd,
2679 IrInstructionIdVectorExtractElem,
2680};
2681
2682struct IrInstruction {
2683 Scope *scope;
2684 AstNode *source_node;
2685 LLVMValueRef llvm_value;
2686 ZigValue *value;
2687 uint32_t debug_id;
2705enum IrInstGenId {
2706 IrInstGenIdInvalid,
2707 IrInstGenIdDeclVar,
2708 IrInstGenIdBr,
2709 IrInstGenIdCondBr,
2710 IrInstGenIdSwitchBr,
2711 IrInstGenIdPhi,
2712 IrInstGenIdBinaryNot,
2713 IrInstGenIdNegation,
2714 IrInstGenIdNegationWrapping,
2715 IrInstGenIdBinOp,
2716 IrInstGenIdLoadPtr,
2717 IrInstGenIdStorePtr,
2718 IrInstGenIdVectorStoreElem,
2719 IrInstGenIdStructFieldPtr,
2720 IrInstGenIdUnionFieldPtr,
2721 IrInstGenIdElemPtr,
2722 IrInstGenIdVarPtr,
2723 IrInstGenIdReturnPtr,
2724 IrInstGenIdCall,
2725 IrInstGenIdReturn,
2726 IrInstGenIdCast,
2727 IrInstGenIdResizeSlice,
2728 IrInstGenIdUnreachable,
2729 IrInstGenIdAsm,
2730 IrInstGenIdTestNonNull,
2731 IrInstGenIdOptionalUnwrapPtr,
2732 IrInstGenIdOptionalWrap,
2733 IrInstGenIdUnionTag,
2734 IrInstGenIdClz,
2735 IrInstGenIdCtz,
2736 IrInstGenIdPopCount,
2737 IrInstGenIdBswap,
2738 IrInstGenIdBitReverse,
2739 IrInstGenIdRef,
2740 IrInstGenIdErrName,
2741 IrInstGenIdCmpxchg,
2742 IrInstGenIdFence,
2743 IrInstGenIdTruncate,
2744 IrInstGenIdShuffleVector,
2745 IrInstGenIdSplat,
2746 IrInstGenIdBoolNot,
2747 IrInstGenIdMemset,
2748 IrInstGenIdMemcpy,
2749 IrInstGenIdSlice,
2750 IrInstGenIdBreakpoint,
2751 IrInstGenIdReturnAddress,
2752 IrInstGenIdFrameAddress,
2753 IrInstGenIdFrameHandle,
2754 IrInstGenIdFrameSize,
2755 IrInstGenIdOverflowOp,
2756 IrInstGenIdTestErr,
2757 IrInstGenIdMulAdd,
2758 IrInstGenIdFloatOp,
2759 IrInstGenIdUnwrapErrCode,
2760 IrInstGenIdUnwrapErrPayload,
2761 IrInstGenIdErrWrapCode,
2762 IrInstGenIdErrWrapPayload,
2763 IrInstGenIdPtrCast,
2764 IrInstGenIdBitCast,
2765 IrInstGenIdWidenOrShorten,
2766 IrInstGenIdIntToPtr,
2767 IrInstGenIdPtrToInt,
2768 IrInstGenIdIntToEnum,
2769 IrInstGenIdIntToErr,
2770 IrInstGenIdErrToInt,
2771 IrInstGenIdPanic,
2772 IrInstGenIdTagName,
2773 IrInstGenIdFieldParentPtr,
2774 IrInstGenIdAlignCast,
2775 IrInstGenIdErrorReturnTrace,
2776 IrInstGenIdAtomicRmw,
2777 IrInstGenIdAtomicLoad,
2778 IrInstGenIdAtomicStore,
2779 IrInstGenIdSaveErrRetAddr,
2780 IrInstGenIdVectorToArray,
2781 IrInstGenIdArrayToVector,
2782 IrInstGenIdAssertZero,
2783 IrInstGenIdAssertNonNull,
2784 IrInstGenIdPtrOfArrayToSlice,
2785 IrInstGenIdSuspendBegin,
2786 IrInstGenIdSuspendFinish,
2787 IrInstGenIdAwait,
2788 IrInstGenIdResume,
2789 IrInstGenIdSpillBegin,
2790 IrInstGenIdSpillEnd,
2791 IrInstGenIdVectorExtractElem,
2792 IrInstGenIdAlloca,
2793 IrInstGenIdConst,
2794};
2795
2796// Common fields between IrInstSrc and IrInstGen. This allows future passes
2797// after pass2 to be added to zig.
2798struct IrInst {
26882799 // if ref_count is zero and the instruction has no side effects,
26892800 // the instruction can be omitted in codegen
26902801 uint32_t ref_count;
2802 uint32_t debug_id;
2803
2804 Scope *scope;
2805 AstNode *source_node;
2806
2807 // for debugging purposes, these are useful to call to inspect the instruction
2808 void dump();
2809 void src();
2810};
2811
2812struct IrInstSrc {
2813 IrInst base;
2814
2815 IrInstSrcId id;
2816 // true if this instruction was generated by zig and not from user code
2817 // this matters for the "unreachable code" compile error
2818 bool is_gen;
2819 bool is_noreturn;
2820
26912821 // When analyzing IR, instructions that point to this instruction in the "old ir"
26922822 // can find the instruction that corresponds to this value in the "new ir"
26932823 // with this child field.
2694 IrInstruction *child;
2695 IrBasicBlock *owner_bb;
2824 IrInstGen *child;
2825 IrBasicBlockSrc *owner_bb;
2826
2827 // for debugging purposes, these are useful to call to inspect the instruction
2828 void dump();
2829 void src();
2830};
2831
2832struct IrInstGen {
2833 IrInst base;
2834
2835 IrInstGenId id;
2836
2837 LLVMValueRef llvm_value;
2838 ZigValue *value;
2839 IrBasicBlockGen *owner_bb;
26962840 // Nearly any instruction can have to be stored as a local variable before suspending
26972841 // and then loaded after resuming, in case there is an expression with a suspend point
26982842 // in it, such as: x + await y
2699 IrInstruction *spill;
2700 IrInstructionId id;
2701 // true if this instruction was generated by zig and not from user code
2702 bool is_gen;
2843 IrInstGen *spill;
27032844
27042845 // for debugging purposes, these are useful to call to inspect the instruction
27052846 void dump();
27062847 void src();
27072848};
27082849
2709struct IrInstructionDeclVarSrc {
2710 IrInstruction base;
2850struct IrInstSrcDeclVar {
2851 IrInstSrc base;
27112852
27122853 ZigVar *var;
2713 IrInstruction *var_type;
2714 IrInstruction *align_value;
2715 IrInstruction *ptr;
2854 IrInstSrc *var_type;
2855 IrInstSrc *align_value;
2856 IrInstSrc *ptr;
27162857};
27172858
2718struct IrInstructionDeclVarGen {
2719 IrInstruction base;
2859struct IrInstGenDeclVar {
2860 IrInstGen base;
27202861
27212862 ZigVar *var;
2722 IrInstruction *var_ptr;
2863 IrInstGen *var_ptr;
27232864};
27242865
2725struct IrInstructionCondBr {
2726 IrInstruction base;
2866struct IrInstSrcCondBr {
2867 IrInstSrc base;
27272868
2728 IrInstruction *condition;
2729 IrBasicBlock *then_block;
2730 IrBasicBlock *else_block;
2731 IrInstruction *is_comptime;
2869 IrInstSrc *condition;
2870 IrBasicBlockSrc *then_block;
2871 IrBasicBlockSrc *else_block;
2872 IrInstSrc *is_comptime;
27322873 ResultLoc *result_loc;
27332874};
27342875
2735struct IrInstructionBr {
2736 IrInstruction base;
2876struct IrInstGenCondBr {
2877 IrInstGen base;
2878
2879 IrInstGen *condition;
2880 IrBasicBlockGen *then_block;
2881 IrBasicBlockGen *else_block;
2882};
2883
2884struct IrInstSrcBr {
2885 IrInstSrc base;
27372886
2738 IrBasicBlock *dest_block;
2739 IrInstruction *is_comptime;
2887 IrBasicBlockSrc *dest_block;
2888 IrInstSrc *is_comptime;
27402889};
27412890
2742struct IrInstructionSwitchBrCase {
2743 IrInstruction *value;
2744 IrBasicBlock *block;
2891struct IrInstGenBr {
2892 IrInstGen base;
2893
2894 IrBasicBlockGen *dest_block;
2895};
2896
2897struct IrInstSrcSwitchBrCase {
2898 IrInstSrc *value;
2899 IrBasicBlockSrc *block;
27452900};
27462901
2747struct IrInstructionSwitchBr {
2748 IrInstruction base;
2902struct IrInstSrcSwitchBr {
2903 IrInstSrc base;
27492904
2750 IrInstruction *target_value;
2751 IrBasicBlock *else_block;
2905 IrInstSrc *target_value;
2906 IrBasicBlockSrc *else_block;
27522907 size_t case_count;
2753 IrInstructionSwitchBrCase *cases;
2754 IrInstruction *is_comptime;
2755 IrInstruction *switch_prongs_void;
2908 IrInstSrcSwitchBrCase *cases;
2909 IrInstSrc *is_comptime;
2910 IrInstSrc *switch_prongs_void;
27562911};
27572912
2758struct IrInstructionSwitchVar {
2759 IrInstruction base;
2913struct IrInstGenSwitchBrCase {
2914 IrInstGen *value;
2915 IrBasicBlockGen *block;
2916};
27602917
2761 IrInstruction *target_value_ptr;
2762 IrInstruction **prongs_ptr;
2918struct IrInstGenSwitchBr {
2919 IrInstGen base;
2920
2921 IrInstGen *target_value;
2922 IrBasicBlockGen *else_block;
2923 size_t case_count;
2924 IrInstGenSwitchBrCase *cases;
2925};
2926
2927struct IrInstSrcSwitchVar {
2928 IrInstSrc base;
2929
2930 IrInstSrc *target_value_ptr;
2931 IrInstSrc **prongs_ptr;
27632932 size_t prongs_len;
27642933};
27652934
2766struct IrInstructionSwitchElseVar {
2767 IrInstruction base;
2935struct IrInstSrcSwitchElseVar {
2936 IrInstSrc base;
27682937
2769 IrInstruction *target_value_ptr;
2770 IrInstructionSwitchBr *switch_br;
2938 IrInstSrc *target_value_ptr;
2939 IrInstSrcSwitchBr *switch_br;
27712940};
27722941
2773struct IrInstructionSwitchTarget {
2774 IrInstruction base;
2942struct IrInstSrcSwitchTarget {
2943 IrInstSrc base;
27752944
2776 IrInstruction *target_value_ptr;
2945 IrInstSrc *target_value_ptr;
27772946};
27782947
2779struct IrInstructionPhi {
2780 IrInstruction base;
2948struct IrInstSrcPhi {
2949 IrInstSrc base;
27812950
27822951 size_t incoming_count;
2783 IrBasicBlock **incoming_blocks;
2784 IrInstruction **incoming_values;
2952 IrBasicBlockSrc **incoming_blocks;
2953 IrInstSrc **incoming_values;
27852954 ResultLocPeerParent *peer_parent;
27862955};
27872956
2957struct IrInstGenPhi {
2958 IrInstGen base;
2959
2960 size_t incoming_count;
2961 IrBasicBlockGen **incoming_blocks;
2962 IrInstGen **incoming_values;
2963};
2964
27882965enum IrUnOp {
27892966 IrUnOpInvalid,
27902967 IrUnOpBinNot,
......@@ -2794,15 +2971,30 @@ enum IrUnOp {
27942971 IrUnOpOptional,
27952972};
27962973
2797struct IrInstructionUnOp {
2798 IrInstruction base;
2974struct IrInstSrcUnOp {
2975 IrInstSrc base;
27992976
28002977 IrUnOp op_id;
28012978 LVal lval;
2802 IrInstruction *value;
2979 IrInstSrc *value;
28032980 ResultLoc *result_loc;
28042981};
28052982
2983struct IrInstGenBinaryNot {
2984 IrInstGen base;
2985 IrInstGen *operand;
2986};
2987
2988struct IrInstGenNegation {
2989 IrInstGen base;
2990 IrInstGen *operand;
2991};
2992
2993struct IrInstGenNegationWrapping {
2994 IrInstGen base;
2995 IrInstGen *operand;
2996};
2997
28062998enum IrBinOp {
28072999 IrBinOpInvalid,
28083000 IrBinOpBoolOr,
......@@ -2837,113 +3029,144 @@ enum IrBinOp {
28373029 IrBinOpArrayMult,
28383030};
28393031
2840struct IrInstructionBinOp {
2841 IrInstruction base;
3032struct IrInstSrcBinOp {
3033 IrInstSrc base;
28423034
2843 IrInstruction *op1;
2844 IrInstruction *op2;
3035 IrInstSrc *op1;
3036 IrInstSrc *op2;
28453037 IrBinOp op_id;
28463038 bool safety_check_on;
28473039};
28483040
2849struct IrInstructionMergeErrSets {
2850 IrInstruction base;
3041struct IrInstGenBinOp {
3042 IrInstGen base;
28513043
2852 IrInstruction *op1;
2853 IrInstruction *op2;
3044 IrInstGen *op1;
3045 IrInstGen *op2;
3046 IrBinOp op_id;
3047 bool safety_check_on;
3048};
3049
3050struct IrInstSrcMergeErrSets {
3051 IrInstSrc base;
3052
3053 IrInstSrc *op1;
3054 IrInstSrc *op2;
28543055 Buf *type_name;
28553056};
28563057
2857struct IrInstructionLoadPtr {
2858 IrInstruction base;
3058struct IrInstSrcLoadPtr {
3059 IrInstSrc base;
28593060
2860 IrInstruction *ptr;
3061 IrInstSrc *ptr;
28613062};
28623063
2863struct IrInstructionLoadPtrGen {
2864 IrInstruction base;
3064struct IrInstGenLoadPtr {
3065 IrInstGen base;
28653066
2866 IrInstruction *ptr;
2867 IrInstruction *result_loc;
3067 IrInstGen *ptr;
3068 IrInstGen *result_loc;
28683069};
28693070
2870struct IrInstructionStorePtr {
2871 IrInstruction base;
3071struct IrInstSrcStorePtr {
3072 IrInstSrc base;
3073
3074 IrInstSrc *ptr;
3075 IrInstSrc *value;
28723076
28733077 bool allow_write_through_const;
2874 IrInstruction *ptr;
2875 IrInstruction *value;
28763078};
28773079
2878struct IrInstructionVectorStoreElem {
2879 IrInstruction base;
3080struct IrInstGenStorePtr {
3081 IrInstGen base;
28803082
2881 IrInstruction *vector_ptr;
2882 IrInstruction *index;
2883 IrInstruction *value;
3083 IrInstGen *ptr;
3084 IrInstGen *value;
28843085};
28853086
2886struct IrInstructionFieldPtr {
2887 IrInstruction base;
3087struct IrInstGenVectorStoreElem {
3088 IrInstGen base;
28883089
2889 bool initializing;
2890 IrInstruction *container_ptr;
3090 IrInstGen *vector_ptr;
3091 IrInstGen *index;
3092 IrInstGen *value;
3093};
3094
3095struct IrInstSrcFieldPtr {
3096 IrInstSrc base;
3097
3098 IrInstSrc *container_ptr;
28913099 Buf *field_name_buffer;
2892 IrInstruction *field_name_expr;
3100 IrInstSrc *field_name_expr;
3101 bool initializing;
28933102};
28943103
2895struct IrInstructionStructFieldPtr {
2896 IrInstruction base;
3104struct IrInstGenStructFieldPtr {
3105 IrInstGen base;
28973106
2898 IrInstruction *struct_ptr;
3107 IrInstGen *struct_ptr;
28993108 TypeStructField *field;
29003109 bool is_const;
29013110};
29023111
2903struct IrInstructionUnionFieldPtr {
2904 IrInstruction base;
3112struct IrInstGenUnionFieldPtr {
3113 IrInstGen base;
29053114
3115 IrInstGen *union_ptr;
3116 TypeUnionField *field;
29063117 bool safety_check_on;
29073118 bool initializing;
2908 IrInstruction *union_ptr;
2909 TypeUnionField *field;
29103119};
29113120
2912struct IrInstructionElemPtr {
2913 IrInstruction base;
3121struct IrInstSrcElemPtr {
3122 IrInstSrc base;
29143123
2915 IrInstruction *array_ptr;
2916 IrInstruction *elem_index;
3124 IrInstSrc *array_ptr;
3125 IrInstSrc *elem_index;
29173126 AstNode *init_array_type_source_node;
29183127 PtrLen ptr_len;
29193128 bool safety_check_on;
29203129};
29213130
2922struct IrInstructionVarPtr {
2923 IrInstruction base;
3131struct IrInstGenElemPtr {
3132 IrInstGen base;
3133
3134 IrInstGen *array_ptr;
3135 IrInstGen *elem_index;
3136 bool safety_check_on;
3137};
3138
3139struct IrInstSrcVarPtr {
3140 IrInstSrc base;
29243141
29253142 ZigVar *var;
29263143 ScopeFnDef *crossed_fndef_scope;
29273144};
29283145
3146struct IrInstGenVarPtr {
3147 IrInstGen base;
3148
3149 ZigVar *var;
3150};
3151
29293152// For functions that have a return type for which handle_is_ptr is true, a
29303153// result location pointer is the secret first parameter ("sret"). This
29313154// instruction returns that pointer.
2932struct IrInstructionReturnPtr {
2933 IrInstruction base;
3155struct IrInstGenReturnPtr {
3156 IrInstGen base;
29343157};
29353158
2936struct IrInstructionCallSrc {
2937 IrInstruction base;
3159struct IrInstSrcCall {
3160 IrInstSrc base;
29383161
2939 IrInstruction *fn_ref;
3162 IrInstSrc *fn_ref;
29403163 ZigFn *fn_entry;
29413164 size_t arg_count;
2942 IrInstruction **args;
2943 IrInstruction *ret_ptr;
3165 IrInstSrc **args;
3166 IrInstSrc *ret_ptr;
29443167 ResultLoc *result_loc;
29453168
2946 IrInstruction *new_stack;
3169 IrInstSrc *new_stack;
29473170
29483171 CallModifier modifier;
29493172 bool is_async_call_builtin;
......@@ -2951,12 +3174,12 @@ struct IrInstructionCallSrc {
29513174
29523175// This is a pass1 instruction, used by @call when the args node is
29533176// a tuple or struct literal.
2954struct IrInstructionCallSrcArgs {
2955 IrInstruction base;
3177struct IrInstSrcCallArgs {
3178 IrInstSrc base;
29563179
2957 IrInstruction *options;
2958 IrInstruction *fn_ref;
2959 IrInstruction **args_ptr;
3180 IrInstSrc *options;
3181 IrInstSrc *fn_ref;
3182 IrInstSrc **args_ptr;
29603183 size_t args_len;
29613184 ResultLoc *result_loc;
29623185};
......@@ -2964,42 +3187,54 @@ struct IrInstructionCallSrcArgs {
29643187// This is a pass1 instruction, used by @call, when the args node
29653188// is not a literal.
29663189// `args` is expected to be either a struct or a tuple.
2967struct IrInstructionCallExtra {
2968 IrInstruction base;
3190struct IrInstSrcCallExtra {
3191 IrInstSrc base;
29693192
2970 IrInstruction *options;
2971 IrInstruction *fn_ref;
2972 IrInstruction *args;
3193 IrInstSrc *options;
3194 IrInstSrc *fn_ref;
3195 IrInstSrc *args;
29733196 ResultLoc *result_loc;
29743197};
29753198
2976struct IrInstructionCallGen {
2977 IrInstruction base;
3199struct IrInstGenCall {
3200 IrInstGen base;
29783201
2979 IrInstruction *fn_ref;
3202 IrInstGen *fn_ref;
29803203 ZigFn *fn_entry;
29813204 size_t arg_count;
2982 IrInstruction **args;
2983 IrInstruction *result_loc;
2984 IrInstruction *frame_result_loc;
2985 IrInstruction *new_stack;
3205 IrInstGen **args;
3206 IrInstGen *result_loc;
3207 IrInstGen *frame_result_loc;
3208 IrInstGen *new_stack;
29863209
29873210 CallModifier modifier;
29883211
29893212 bool is_async_call_builtin;
29903213};
29913214
2992struct IrInstructionConst {
2993 IrInstruction base;
3215struct IrInstSrcConst {
3216 IrInstSrc base;
3217
3218 ZigValue *value;
3219};
3220
3221struct IrInstGenConst {
3222 IrInstGen base;
3223};
3224
3225struct IrInstSrcReturn {
3226 IrInstSrc base;
3227
3228 IrInstSrc *operand;
29943229};
29953230
29963231// When an IrExecutable is not in a function, a return instruction means that
29973232// the expression returns with that value, even though a return statement from
29983233// an AST perspective is invalid.
2999struct IrInstructionReturn {
3000 IrInstruction base;
3234struct IrInstGenReturn {
3235 IrInstGen base;
30013236
3002 IrInstruction *operand;
3237 IrInstGen *operand;
30033238};
30043239
30053240enum CastOp {
......@@ -3014,89 +3249,92 @@ enum CastOp {
30143249};
30153250
30163251// TODO get rid of this instruction, replace with instructions for each op code
3017struct IrInstructionCast {
3018 IrInstruction base;
3252struct IrInstGenCast {
3253 IrInstGen base;
30193254
3020 IrInstruction *value;
3021 ZigType *dest_type;
3255 IrInstGen *value;
30223256 CastOp cast_op;
30233257};
30243258
3025struct IrInstructionResizeSlice {
3026 IrInstruction base;
3259struct IrInstGenResizeSlice {
3260 IrInstGen base;
30273261
3028 IrInstruction *operand;
3029 IrInstruction *result_loc;
3262 IrInstGen *operand;
3263 IrInstGen *result_loc;
30303264};
30313265
3032struct IrInstructionContainerInitList {
3033 IrInstruction base;
3266struct IrInstSrcContainerInitList {
3267 IrInstSrc base;
30343268
3035 IrInstruction *elem_type;
3269 IrInstSrc *elem_type;
30363270 size_t item_count;
3037 IrInstruction **elem_result_loc_list;
3038 IrInstruction *result_loc;
3271 IrInstSrc **elem_result_loc_list;
3272 IrInstSrc *result_loc;
30393273 AstNode *init_array_type_source_node;
30403274};
30413275
3042struct IrInstructionContainerInitFieldsField {
3276struct IrInstSrcContainerInitFieldsField {
30433277 Buf *name;
30443278 AstNode *source_node;
30453279 TypeStructField *type_struct_field;
3046 IrInstruction *result_loc;
3280 IrInstSrc *result_loc;
30473281};
30483282
3049struct IrInstructionContainerInitFields {
3050 IrInstruction base;
3283struct IrInstSrcContainerInitFields {
3284 IrInstSrc base;
30513285
30523286 size_t field_count;
3053 IrInstructionContainerInitFieldsField *fields;
3054 IrInstruction *result_loc;
3287 IrInstSrcContainerInitFieldsField *fields;
3288 IrInstSrc *result_loc;
3289};
3290
3291struct IrInstSrcUnreachable {
3292 IrInstSrc base;
30553293};
30563294
3057struct IrInstructionUnreachable {
3058 IrInstruction base;
3295struct IrInstGenUnreachable {
3296 IrInstGen base;
30593297};
30603298
3061struct IrInstructionTypeOf {
3062 IrInstruction base;
3299struct IrInstSrcTypeOf {
3300 IrInstSrc base;
30633301
3064 IrInstruction *value;
3302 IrInstSrc *value;
30653303};
30663304
3067struct IrInstructionSetCold {
3068 IrInstruction base;
3305struct IrInstSrcSetCold {
3306 IrInstSrc base;
30693307
3070 IrInstruction *is_cold;
3308 IrInstSrc *is_cold;
30713309};
30723310
3073struct IrInstructionSetRuntimeSafety {
3074 IrInstruction base;
3311struct IrInstSrcSetRuntimeSafety {
3312 IrInstSrc base;
30753313
3076 IrInstruction *safety_on;
3314 IrInstSrc *safety_on;
30773315};
30783316
3079struct IrInstructionSetFloatMode {
3080 IrInstruction base;
3317struct IrInstSrcSetFloatMode {
3318 IrInstSrc base;
30813319
3082 IrInstruction *scope_value;
3083 IrInstruction *mode_value;
3320 IrInstSrc *scope_value;
3321 IrInstSrc *mode_value;
30843322};
30853323
3086struct IrInstructionArrayType {
3087 IrInstruction base;
3324struct IrInstSrcArrayType {
3325 IrInstSrc base;
30883326
3089 IrInstruction *size;
3090 IrInstruction *sentinel;
3091 IrInstruction *child_type;
3327 IrInstSrc *size;
3328 IrInstSrc *sentinel;
3329 IrInstSrc *child_type;
30923330};
30933331
3094struct IrInstructionPtrType {
3095 IrInstruction base;
3332struct IrInstSrcPtrType {
3333 IrInstSrc base;
30963334
3097 IrInstruction *sentinel;
3098 IrInstruction *align_value;
3099 IrInstruction *child_type;
3335 IrInstSrc *sentinel;
3336 IrInstSrc *align_value;
3337 IrInstSrc *child_type;
31003338 uint32_t bit_offset_start;
31013339 uint32_t host_int_bytes;
31023340 PtrLen ptr_len;
......@@ -3105,375 +3343,459 @@ struct IrInstructionPtrType {
31053343 bool is_allow_zero;
31063344};
31073345
3108struct IrInstructionAnyFrameType {
3109 IrInstruction base;
3346struct IrInstSrcAnyFrameType {
3347 IrInstSrc base;
31103348
3111 IrInstruction *payload_type;
3349 IrInstSrc *payload_type;
31123350};
31133351
3114struct IrInstructionSliceType {
3115 IrInstruction base;
3352struct IrInstSrcSliceType {
3353 IrInstSrc base;
31163354
3117 IrInstruction *sentinel;
3118 IrInstruction *align_value;
3119 IrInstruction *child_type;
3355 IrInstSrc *sentinel;
3356 IrInstSrc *align_value;
3357 IrInstSrc *child_type;
31203358 bool is_const;
31213359 bool is_volatile;
31223360 bool is_allow_zero;
31233361};
31243362
3125struct IrInstructionAsmSrc {
3126 IrInstruction base;
3363struct IrInstSrcAsm {
3364 IrInstSrc base;
31273365
3128 IrInstruction *asm_template;
3129 IrInstruction **input_list;
3130 IrInstruction **output_types;
3366 IrInstSrc *asm_template;
3367 IrInstSrc **input_list;
3368 IrInstSrc **output_types;
31313369 ZigVar **output_vars;
31323370 size_t return_count;
31333371 bool has_side_effects;
31343372 bool is_global;
31353373};
31363374
3137struct IrInstructionAsmGen {
3138 IrInstruction base;
3375struct IrInstGenAsm {
3376 IrInstGen base;
31393377
31403378 Buf *asm_template;
31413379 AsmToken *token_list;
31423380 size_t token_list_len;
3143 IrInstruction **input_list;
3144 IrInstruction **output_types;
3381 IrInstGen **input_list;
3382 IrInstGen **output_types;
31453383 ZigVar **output_vars;
31463384 size_t return_count;
31473385 bool has_side_effects;
31483386};
31493387
3150struct IrInstructionSizeOf {
3151 IrInstruction base;
3388struct IrInstSrcSizeOf {
3389 IrInstSrc base;
31523390
3391 IrInstSrc *type_value;
31533392 bool bit_size;
3154 IrInstruction *type_value;
31553393};
31563394
31573395// returns true if nonnull, returns false if null
3158// this is so that `zeroes` sets maybe values to null
3159struct IrInstructionTestNonNull {
3160 IrInstruction base;
3396struct IrInstSrcTestNonNull {
3397 IrInstSrc base;
3398
3399 IrInstSrc *value;
3400};
3401
3402struct IrInstGenTestNonNull {
3403 IrInstGen base;
31613404
3162 IrInstruction *value;
3405 IrInstGen *value;
31633406};
31643407
31653408// Takes a pointer to an optional value, returns a pointer
31663409// to the payload.
3167struct IrInstructionOptionalUnwrapPtr {
3168 IrInstruction base;
3410struct IrInstSrcOptionalUnwrapPtr {
3411 IrInstSrc base;
31693412
3413 IrInstSrc *base_ptr;
31703414 bool safety_check_on;
31713415 bool initializing;
3172 IrInstruction *base_ptr;
31733416};
31743417
3175struct IrInstructionCtz {
3176 IrInstruction base;
3418struct IrInstGenOptionalUnwrapPtr {
3419 IrInstGen base;
31773420
3178 IrInstruction *type;
3179 IrInstruction *op;
3421 IrInstGen *base_ptr;
3422 bool safety_check_on;
3423 bool initializing;
3424};
3425
3426struct IrInstSrcCtz {
3427 IrInstSrc base;
3428
3429 IrInstSrc *type;
3430 IrInstSrc *op;
31803431};
31813432
3182struct IrInstructionClz {
3183 IrInstruction base;
3433struct IrInstGenCtz {
3434 IrInstGen base;
31843435
3185 IrInstruction *type;
3186 IrInstruction *op;
3436 IrInstGen *op;
31873437};
31883438
3189struct IrInstructionPopCount {
3190 IrInstruction base;
3439struct IrInstSrcClz {
3440 IrInstSrc base;
31913441
3192 IrInstruction *type;
3193 IrInstruction *op;
3442 IrInstSrc *type;
3443 IrInstSrc *op;
31943444};
31953445
3196struct IrInstructionUnionTag {
3197 IrInstruction base;
3446struct IrInstGenClz {
3447 IrInstGen base;
31983448
3199 IrInstruction *value;
3449 IrInstGen *op;
32003450};
32013451
3202struct IrInstructionImport {
3203 IrInstruction base;
3452struct IrInstSrcPopCount {
3453 IrInstSrc base;
32043454
3205 IrInstruction *name;
3455 IrInstSrc *type;
3456 IrInstSrc *op;
32063457};
32073458
3208struct IrInstructionRef {
3209 IrInstruction base;
3459struct IrInstGenPopCount {
3460 IrInstGen base;
32103461
3211 IrInstruction *value;
3462 IrInstGen *op;
3463};
3464
3465struct IrInstGenUnionTag {
3466 IrInstGen base;
3467
3468 IrInstGen *value;
3469};
3470
3471struct IrInstSrcImport {
3472 IrInstSrc base;
3473
3474 IrInstSrc *name;
3475};
3476
3477struct IrInstSrcRef {
3478 IrInstSrc base;
3479
3480 IrInstSrc *value;
32123481 bool is_const;
32133482 bool is_volatile;
32143483};
32153484
3216struct IrInstructionRefGen {
3217 IrInstruction base;
3485struct IrInstGenRef {
3486 IrInstGen base;
32183487
3219 IrInstruction *operand;
3220 IrInstruction *result_loc;
3488 IrInstGen *operand;
3489 IrInstGen *result_loc;
32213490};
32223491
3223struct IrInstructionCompileErr {
3224 IrInstruction base;
3492struct IrInstSrcCompileErr {
3493 IrInstSrc base;
32253494
3226 IrInstruction *msg;
3495 IrInstSrc *msg;
32273496};
32283497
3229struct IrInstructionCompileLog {
3230 IrInstruction base;
3498struct IrInstSrcCompileLog {
3499 IrInstSrc base;
32313500
32323501 size_t msg_count;
3233 IrInstruction **msg_list;
3502 IrInstSrc **msg_list;
3503};
3504
3505struct IrInstSrcErrName {
3506 IrInstSrc base;
3507
3508 IrInstSrc *value;
32343509};
32353510
3236struct IrInstructionErrName {
3237 IrInstruction base;
3511struct IrInstGenErrName {
3512 IrInstGen base;
32383513
3239 IrInstruction *value;
3514 IrInstGen *value;
32403515};
32413516
3242struct IrInstructionCImport {
3243 IrInstruction base;
3517struct IrInstSrcCImport {
3518 IrInstSrc base;
32443519};
32453520
3246struct IrInstructionCInclude {
3247 IrInstruction base;
3521struct IrInstSrcCInclude {
3522 IrInstSrc base;
32483523
3249 IrInstruction *name;
3524 IrInstSrc *name;
32503525};
32513526
3252struct IrInstructionCDefine {
3253 IrInstruction base;
3527struct IrInstSrcCDefine {
3528 IrInstSrc base;
32543529
3255 IrInstruction *name;
3256 IrInstruction *value;
3530 IrInstSrc *name;
3531 IrInstSrc *value;
32573532};
32583533
3259struct IrInstructionCUndef {
3260 IrInstruction base;
3534struct IrInstSrcCUndef {
3535 IrInstSrc base;
32613536
3262 IrInstruction *name;
3537 IrInstSrc *name;
32633538};
32643539
3265struct IrInstructionEmbedFile {
3266 IrInstruction base;
3540struct IrInstSrcEmbedFile {
3541 IrInstSrc base;
32673542
3268 IrInstruction *name;
3543 IrInstSrc *name;
32693544};
32703545
3271struct IrInstructionCmpxchgSrc {
3272 IrInstruction base;
3546struct IrInstSrcCmpxchg {
3547 IrInstSrc base;
32733548
32743549 bool is_weak;
3275 IrInstruction *type_value;
3276 IrInstruction *ptr;
3277 IrInstruction *cmp_value;
3278 IrInstruction *new_value;
3279 IrInstruction *success_order_value;
3280 IrInstruction *failure_order_value;
3550 IrInstSrc *type_value;
3551 IrInstSrc *ptr;
3552 IrInstSrc *cmp_value;
3553 IrInstSrc *new_value;
3554 IrInstSrc *success_order_value;
3555 IrInstSrc *failure_order_value;
32813556 ResultLoc *result_loc;
32823557};
32833558
3284struct IrInstructionCmpxchgGen {
3285 IrInstruction base;
3559struct IrInstGenCmpxchg {
3560 IrInstGen base;
32863561
3287 bool is_weak;
32883562 AtomicOrder success_order;
32893563 AtomicOrder failure_order;
3290 IrInstruction *ptr;
3291 IrInstruction *cmp_value;
3292 IrInstruction *new_value;
3293 IrInstruction *result_loc;
3564 IrInstGen *ptr;
3565 IrInstGen *cmp_value;
3566 IrInstGen *new_value;
3567 IrInstGen *result_loc;
3568 bool is_weak;
32943569};
32953570
3296struct IrInstructionFence {
3297 IrInstruction base;
3571struct IrInstSrcFence {
3572 IrInstSrc base;
3573
3574 IrInstSrc *order;
3575};
32983576
3299 IrInstruction *order_value;
3577struct IrInstGenFence {
3578 IrInstGen base;
33003579
3301 // if this instruction gets to runtime then we know these values:
33023580 AtomicOrder order;
33033581};
33043582
3305struct IrInstructionTruncate {
3306 IrInstruction base;
3583struct IrInstSrcTruncate {
3584 IrInstSrc base;
33073585
3308 IrInstruction *dest_type;
3309 IrInstruction *target;
3586 IrInstSrc *dest_type;
3587 IrInstSrc *target;
33103588};
33113589
3312struct IrInstructionIntCast {
3313 IrInstruction base;
3590struct IrInstGenTruncate {
3591 IrInstGen base;
33143592
3315 IrInstruction *dest_type;
3316 IrInstruction *target;
3593 IrInstGen *target;
33173594};
33183595
3319struct IrInstructionFloatCast {
3320 IrInstruction base;
3596struct IrInstSrcIntCast {
3597 IrInstSrc base;
33213598
3322 IrInstruction *dest_type;
3323 IrInstruction *target;
3599 IrInstSrc *dest_type;
3600 IrInstSrc *target;
33243601};
33253602
3326struct IrInstructionErrSetCast {
3327 IrInstruction base;
3603struct IrInstSrcFloatCast {
3604 IrInstSrc base;
33283605
3329 IrInstruction *dest_type;
3330 IrInstruction *target;
3606 IrInstSrc *dest_type;
3607 IrInstSrc *target;
33313608};
33323609
3333struct IrInstructionToBytes {
3334 IrInstruction base;
3610struct IrInstSrcErrSetCast {
3611 IrInstSrc base;
33353612
3336 IrInstruction *target;
3613 IrInstSrc *dest_type;
3614 IrInstSrc *target;
3615};
3616
3617struct IrInstSrcToBytes {
3618 IrInstSrc base;
3619
3620 IrInstSrc *target;
33373621 ResultLoc *result_loc;
33383622};
33393623
3340struct IrInstructionFromBytes {
3341 IrInstruction base;
3624struct IrInstSrcFromBytes {
3625 IrInstSrc base;
33423626
3343 IrInstruction *dest_child_type;
3344 IrInstruction *target;
3627 IrInstSrc *dest_child_type;
3628 IrInstSrc *target;
33453629 ResultLoc *result_loc;
33463630};
33473631
3348struct IrInstructionIntToFloat {
3349 IrInstruction base;
3632struct IrInstSrcIntToFloat {
3633 IrInstSrc base;
33503634
3351 IrInstruction *dest_type;
3352 IrInstruction *target;
3635 IrInstSrc *dest_type;
3636 IrInstSrc *target;
33533637};
33543638
3355struct IrInstructionFloatToInt {
3356 IrInstruction base;
3639struct IrInstSrcFloatToInt {
3640 IrInstSrc base;
33573641
3358 IrInstruction *dest_type;
3359 IrInstruction *target;
3642 IrInstSrc *dest_type;
3643 IrInstSrc *target;
33603644};
33613645
3362struct IrInstructionBoolToInt {
3363 IrInstruction base;
3646struct IrInstSrcBoolToInt {
3647 IrInstSrc base;
33643648
3365 IrInstruction *target;
3649 IrInstSrc *target;
33663650};
33673651
3368struct IrInstructionIntType {
3369 IrInstruction base;
3652struct IrInstSrcIntType {
3653 IrInstSrc base;
33703654
3371 IrInstruction *is_signed;
3372 IrInstruction *bit_count;
3655 IrInstSrc *is_signed;
3656 IrInstSrc *bit_count;
33733657};
33743658
3375struct IrInstructionVectorType {
3376 IrInstruction base;
3659struct IrInstSrcVectorType {
3660 IrInstSrc base;
33773661
3378 IrInstruction *len;
3379 IrInstruction *elem_type;
3662 IrInstSrc *len;
3663 IrInstSrc *elem_type;
33803664};
33813665
3382struct IrInstructionBoolNot {
3383 IrInstruction base;
3666struct IrInstSrcBoolNot {
3667 IrInstSrc base;
33843668
3385 IrInstruction *value;
3669 IrInstSrc *value;
33863670};
33873671
3388struct IrInstructionMemset {
3389 IrInstruction base;
3672struct IrInstGenBoolNot {
3673 IrInstGen base;
33903674
3391 IrInstruction *dest_ptr;
3392 IrInstruction *byte;
3393 IrInstruction *count;
3675 IrInstGen *value;
33943676};
33953677
3396struct IrInstructionMemcpy {
3397 IrInstruction base;
3678struct IrInstSrcMemset {
3679 IrInstSrc base;
33983680
3399 IrInstruction *dest_ptr;
3400 IrInstruction *src_ptr;
3401 IrInstruction *count;
3681 IrInstSrc *dest_ptr;
3682 IrInstSrc *byte;
3683 IrInstSrc *count;
34023684};
34033685
3404struct IrInstructionSliceSrc {
3405 IrInstruction base;
3686struct IrInstGenMemset {
3687 IrInstGen base;
34063688
3407 bool safety_check_on;
3408 IrInstruction *ptr;
3409 IrInstruction *start;
3410 IrInstruction *end;
3411 IrInstruction *sentinel;
3689 IrInstGen *dest_ptr;
3690 IrInstGen *byte;
3691 IrInstGen *count;
3692};
3693
3694struct IrInstSrcMemcpy {
3695 IrInstSrc base;
3696
3697 IrInstSrc *dest_ptr;
3698 IrInstSrc *src_ptr;
3699 IrInstSrc *count;
3700};
3701
3702struct IrInstGenMemcpy {
3703 IrInstGen base;
3704
3705 IrInstGen *dest_ptr;
3706 IrInstGen *src_ptr;
3707 IrInstGen *count;
3708};
3709
3710struct IrInstSrcSlice {
3711 IrInstSrc base;
3712
3713 IrInstSrc *ptr;
3714 IrInstSrc *start;
3715 IrInstSrc *end;
3716 IrInstSrc *sentinel;
34123717 ResultLoc *result_loc;
3718 bool safety_check_on;
34133719};
34143720
3415struct IrInstructionSliceGen {
3416 IrInstruction base;
3721struct IrInstGenSlice {
3722 IrInstGen base;
34173723
3724 IrInstGen *ptr;
3725 IrInstGen *start;
3726 IrInstGen *end;
3727 IrInstGen *result_loc;
34183728 bool safety_check_on;
3419 IrInstruction *ptr;
3420 IrInstruction *start;
3421 IrInstruction *end;
3422 IrInstruction *result_loc;
34233729};
34243730
3425struct IrInstructionMemberCount {
3426 IrInstruction base;
3731struct IrInstSrcMemberCount {
3732 IrInstSrc base;
3733
3734 IrInstSrc *container;
3735};
3736
3737struct IrInstSrcMemberType {
3738 IrInstSrc base;
3739
3740 IrInstSrc *container_type;
3741 IrInstSrc *member_index;
3742};
3743
3744struct IrInstSrcMemberName {
3745 IrInstSrc base;
34273746
3428 IrInstruction *container;
3747 IrInstSrc *container_type;
3748 IrInstSrc *member_index;
34293749};
34303750
3431struct IrInstructionMemberType {
3432 IrInstruction base;
3751struct IrInstSrcBreakpoint {
3752 IrInstSrc base;
3753};
34333754
3434 IrInstruction *container_type;
3435 IrInstruction *member_index;
3755struct IrInstGenBreakpoint {
3756 IrInstGen base;
34363757};
34373758
3438struct IrInstructionMemberName {
3439 IrInstruction base;
3759struct IrInstSrcReturnAddress {
3760 IrInstSrc base;
3761};
34403762
3441 IrInstruction *container_type;
3442 IrInstruction *member_index;
3763struct IrInstGenReturnAddress {
3764 IrInstGen base;
34433765};
34443766
3445struct IrInstructionBreakpoint {
3446 IrInstruction base;
3767struct IrInstSrcFrameAddress {
3768 IrInstSrc base;
34473769};
34483770
3449struct IrInstructionReturnAddress {
3450 IrInstruction base;
3771struct IrInstGenFrameAddress {
3772 IrInstGen base;
34513773};
34523774
3453struct IrInstructionFrameAddress {
3454 IrInstruction base;
3775struct IrInstSrcFrameHandle {
3776 IrInstSrc base;
34553777};
34563778
3457struct IrInstructionFrameHandle {
3458 IrInstruction base;
3779struct IrInstGenFrameHandle {
3780 IrInstGen base;
34593781};
34603782
3461struct IrInstructionFrameType {
3462 IrInstruction base;
3783struct IrInstSrcFrameType {
3784 IrInstSrc base;
34633785
3464 IrInstruction *fn;
3786 IrInstSrc *fn;
34653787};
34663788
3467struct IrInstructionFrameSizeSrc {
3468 IrInstruction base;
3789struct IrInstSrcFrameSize {
3790 IrInstSrc base;
34693791
3470 IrInstruction *fn;
3792 IrInstSrc *fn;
34713793};
34723794
3473struct IrInstructionFrameSizeGen {
3474 IrInstruction base;
3795struct IrInstGenFrameSize {
3796 IrInstGen base;
34753797
3476 IrInstruction *fn;
3798 IrInstGen *fn;
34773799};
34783800
34793801enum IrOverflowOp {
......@@ -3483,560 +3805,713 @@ enum IrOverflowOp {
34833805 IrOverflowOpShl,
34843806};
34853807
3486struct IrInstructionOverflowOp {
3487 IrInstruction base;
3808struct IrInstSrcOverflowOp {
3809 IrInstSrc base;
3810
3811 IrOverflowOp op;
3812 IrInstSrc *type_value;
3813 IrInstSrc *op1;
3814 IrInstSrc *op2;
3815 IrInstSrc *result_ptr;
3816};
3817
3818struct IrInstGenOverflowOp {
3819 IrInstGen base;
34883820
34893821 IrOverflowOp op;
3490 IrInstruction *type_value;
3491 IrInstruction *op1;
3492 IrInstruction *op2;
3493 IrInstruction *result_ptr;
3822 IrInstGen *op1;
3823 IrInstGen *op2;
3824 IrInstGen *result_ptr;
34943825
3826 // TODO can this field be removed?
34953827 ZigType *result_ptr_type;
34963828};
34973829
3498struct IrInstructionMulAdd {
3499 IrInstruction base;
3830struct IrInstSrcMulAdd {
3831 IrInstSrc base;
3832
3833 IrInstSrc *type_value;
3834 IrInstSrc *op1;
3835 IrInstSrc *op2;
3836 IrInstSrc *op3;
3837};
3838
3839struct IrInstGenMulAdd {
3840 IrInstGen base;
35003841
3501 IrInstruction *type_value;
3502 IrInstruction *op1;
3503 IrInstruction *op2;
3504 IrInstruction *op3;
3842 IrInstGen *op1;
3843 IrInstGen *op2;
3844 IrInstGen *op3;
35053845};
35063846
3507struct IrInstructionAlignOf {
3508 IrInstruction base;
3847struct IrInstSrcAlignOf {
3848 IrInstSrc base;
35093849
3510 IrInstruction *type_value;
3850 IrInstSrc *type_value;
35113851};
35123852
35133853// returns true if error, returns false if not error
3514struct IrInstructionTestErrSrc {
3515 IrInstruction base;
3854struct IrInstSrcTestErr {
3855 IrInstSrc base;
35163856
3857 IrInstSrc *base_ptr;
35173858 bool resolve_err_set;
35183859 bool base_ptr_is_payload;
3519 IrInstruction *base_ptr;
35203860};
35213861
3522struct IrInstructionTestErrGen {
3523 IrInstruction base;
3862struct IrInstGenTestErr {
3863 IrInstGen base;
35243864
3525 IrInstruction *err_union;
3865 IrInstGen *err_union;
35263866};
35273867
35283868// Takes an error union pointer, returns a pointer to the error code.
3529struct IrInstructionUnwrapErrCode {
3530 IrInstruction base;
3869struct IrInstSrcUnwrapErrCode {
3870 IrInstSrc base;
3871
3872 IrInstSrc *err_union_ptr;
3873 bool initializing;
3874};
3875
3876struct IrInstGenUnwrapErrCode {
3877 IrInstGen base;
3878
3879 IrInstGen *err_union_ptr;
3880 bool initializing;
3881};
35313882
3883struct IrInstSrcUnwrapErrPayload {
3884 IrInstSrc base;
3885
3886 IrInstSrc *value;
3887 bool safety_check_on;
35323888 bool initializing;
3533 IrInstruction *err_union_ptr;
35343889};
35353890
3536struct IrInstructionUnwrapErrPayload {
3537 IrInstruction base;
3891struct IrInstGenUnwrapErrPayload {
3892 IrInstGen base;
35383893
3894 IrInstGen *value;
35393895 bool safety_check_on;
35403896 bool initializing;
3541 IrInstruction *value;
35423897};
35433898
3544struct IrInstructionOptionalWrap {
3545 IrInstruction base;
3899struct IrInstGenOptionalWrap {
3900 IrInstGen base;
35463901
3547 IrInstruction *operand;
3548 IrInstruction *result_loc;
3902 IrInstGen *operand;
3903 IrInstGen *result_loc;
35493904};
35503905
3551struct IrInstructionErrWrapPayload {
3552 IrInstruction base;
3906struct IrInstGenErrWrapPayload {
3907 IrInstGen base;
35533908
3554 IrInstruction *operand;
3555 IrInstruction *result_loc;
3909 IrInstGen *operand;
3910 IrInstGen *result_loc;
35563911};
35573912
3558struct IrInstructionErrWrapCode {
3559 IrInstruction base;
3913struct IrInstGenErrWrapCode {
3914 IrInstGen base;
35603915
3561 IrInstruction *operand;
3562 IrInstruction *result_loc;
3916 IrInstGen *operand;
3917 IrInstGen *result_loc;
35633918};
35643919
3565struct IrInstructionFnProto {
3566 IrInstruction base;
3920struct IrInstSrcFnProto {
3921 IrInstSrc base;
35673922
3568 IrInstruction **param_types;
3569 IrInstruction *align_value;
3570 IrInstruction *callconv_value;
3571 IrInstruction *return_type;
3923 IrInstSrc **param_types;
3924 IrInstSrc *align_value;
3925 IrInstSrc *callconv_value;
3926 IrInstSrc *return_type;
35723927 bool is_var_args;
35733928};
35743929
35753930// true if the target value is compile time known, false otherwise
3576struct IrInstructionTestComptime {
3577 IrInstruction base;
3931struct IrInstSrcTestComptime {
3932 IrInstSrc base;
35783933
3579 IrInstruction *value;
3934 IrInstSrc *value;
35803935};
35813936
3582struct IrInstructionPtrCastSrc {
3583 IrInstruction base;
3937struct IrInstSrcPtrCast {
3938 IrInstSrc base;
35843939
3585 IrInstruction *dest_type;
3586 IrInstruction *ptr;
3940 IrInstSrc *dest_type;
3941 IrInstSrc *ptr;
35873942 bool safety_check_on;
35883943};
35893944
3590struct IrInstructionPtrCastGen {
3591 IrInstruction base;
3945struct IrInstGenPtrCast {
3946 IrInstGen base;
35923947
3593 IrInstruction *ptr;
3948 IrInstGen *ptr;
35943949 bool safety_check_on;
35953950};
35963951
3597struct IrInstructionImplicitCast {
3598 IrInstruction base;
3952struct IrInstSrcImplicitCast {
3953 IrInstSrc base;
35993954
3600 IrInstruction *operand;
3955 IrInstSrc *operand;
36013956 ResultLocCast *result_loc_cast;
36023957};
36033958
3604struct IrInstructionBitCastSrc {
3605 IrInstruction base;
3959struct IrInstSrcBitCast {
3960 IrInstSrc base;
36063961
3607 IrInstruction *operand;
3962 IrInstSrc *operand;
36083963 ResultLocBitCast *result_loc_bit_cast;
36093964};
36103965
3611struct IrInstructionBitCastGen {
3612 IrInstruction base;
3966struct IrInstGenBitCast {
3967 IrInstGen base;
3968
3969 IrInstGen *operand;
3970};
3971
3972struct IrInstGenWidenOrShorten {
3973 IrInstGen base;
3974
3975 IrInstGen *target;
3976};
3977
3978struct IrInstSrcPtrToInt {
3979 IrInstSrc base;
36133980
3614 IrInstruction *operand;
3981 IrInstSrc *target;
36153982};
36163983
3617struct IrInstructionWidenOrShorten {
3618 IrInstruction base;
3984struct IrInstGenPtrToInt {
3985 IrInstGen base;
36193986
3620 IrInstruction *target;
3987 IrInstGen *target;
36213988};
36223989
3623struct IrInstructionPtrToInt {
3624 IrInstruction base;
3990struct IrInstSrcIntToPtr {
3991 IrInstSrc base;
36253992
3626 IrInstruction *target;
3993 IrInstSrc *dest_type;
3994 IrInstSrc *target;
36273995};
36283996
3629struct IrInstructionIntToPtr {
3630 IrInstruction base;
3997struct IrInstGenIntToPtr {
3998 IrInstGen base;
36313999
3632 IrInstruction *dest_type;
3633 IrInstruction *target;
4000 IrInstGen *target;
36344001};
36354002
3636struct IrInstructionIntToEnum {
3637 IrInstruction base;
4003struct IrInstSrcIntToEnum {
4004 IrInstSrc base;
36384005
3639 IrInstruction *dest_type;
3640 IrInstruction *target;
4006 IrInstSrc *dest_type;
4007 IrInstSrc *target;
36414008};
36424009
3643struct IrInstructionEnumToInt {
3644 IrInstruction base;
4010struct IrInstGenIntToEnum {
4011 IrInstGen base;
36454012
3646 IrInstruction *target;
4013 IrInstGen *target;
36474014};
36484015
3649struct IrInstructionIntToErr {
3650 IrInstruction base;
4016struct IrInstSrcEnumToInt {
4017 IrInstSrc base;
36514018
3652 IrInstruction *target;
4019 IrInstSrc *target;
36534020};
36544021
3655struct IrInstructionErrToInt {
3656 IrInstruction base;
4022struct IrInstSrcIntToErr {
4023 IrInstSrc base;
36574024
3658 IrInstruction *target;
4025 IrInstSrc *target;
36594026};
36604027
3661struct IrInstructionCheckSwitchProngsRange {
3662 IrInstruction *start;
3663 IrInstruction *end;
4028struct IrInstGenIntToErr {
4029 IrInstGen base;
4030
4031 IrInstGen *target;
4032};
4033
4034struct IrInstSrcErrToInt {
4035 IrInstSrc base;
4036
4037 IrInstSrc *target;
4038};
4039
4040struct IrInstGenErrToInt {
4041 IrInstGen base;
4042
4043 IrInstGen *target;
4044};
4045
4046struct IrInstSrcCheckSwitchProngsRange {
4047 IrInstSrc *start;
4048 IrInstSrc *end;
36644049};
36654050
3666struct IrInstructionCheckSwitchProngs {
3667 IrInstruction base;
4051struct IrInstSrcCheckSwitchProngs {
4052 IrInstSrc base;
36684053
3669 IrInstruction *target_value;
3670 IrInstructionCheckSwitchProngsRange *ranges;
4054 IrInstSrc *target_value;
4055 IrInstSrcCheckSwitchProngsRange *ranges;
36714056 size_t range_count;
36724057 bool have_else_prong;
36734058 bool have_underscore_prong;
36744059};
36754060
3676struct IrInstructionCheckStatementIsVoid {
3677 IrInstruction base;
4061struct IrInstSrcCheckStatementIsVoid {
4062 IrInstSrc base;
36784063
3679 IrInstruction *statement_value;
4064 IrInstSrc *statement_value;
36804065};
36814066
3682struct IrInstructionTypeName {
3683 IrInstruction base;
4067struct IrInstSrcTypeName {
4068 IrInstSrc base;
36844069
3685 IrInstruction *type_value;
4070 IrInstSrc *type_value;
36864071};
36874072
3688struct IrInstructionDeclRef {
3689 IrInstruction base;
4073struct IrInstSrcDeclRef {
4074 IrInstSrc base;
36904075
36914076 LVal lval;
36924077 Tld *tld;
36934078};
36944079
3695struct IrInstructionPanic {
3696 IrInstruction base;
4080struct IrInstSrcPanic {
4081 IrInstSrc base;
36974082
3698 IrInstruction *msg;
4083 IrInstSrc *msg;
36994084};
37004085
3701struct IrInstructionTagName {
3702 IrInstruction base;
4086struct IrInstGenPanic {
4087 IrInstGen base;
37034088
3704 IrInstruction *target;
4089 IrInstGen *msg;
37054090};
37064091
3707struct IrInstructionTagType {
3708 IrInstruction base;
4092struct IrInstSrcTagName {
4093 IrInstSrc base;
37094094
3710 IrInstruction *target;
4095 IrInstSrc *target;
37114096};
37124097
3713struct IrInstructionFieldParentPtr {
3714 IrInstruction base;
4098struct IrInstGenTagName {
4099 IrInstGen base;
4100
4101 IrInstGen *target;
4102};
4103
4104struct IrInstSrcTagType {
4105 IrInstSrc base;
4106
4107 IrInstSrc *target;
4108};
4109
4110struct IrInstSrcFieldParentPtr {
4111 IrInstSrc base;
4112
4113 IrInstSrc *type_value;
4114 IrInstSrc *field_name;
4115 IrInstSrc *field_ptr;
4116};
37154117
3716 IrInstruction *type_value;
3717 IrInstruction *field_name;
3718 IrInstruction *field_ptr;
4118struct IrInstGenFieldParentPtr {
4119 IrInstGen base;
4120
4121 IrInstGen *field_ptr;
37194122 TypeStructField *field;
37204123};
37214124
3722struct IrInstructionByteOffsetOf {
3723 IrInstruction base;
4125struct IrInstSrcByteOffsetOf {
4126 IrInstSrc base;
4127
4128 IrInstSrc *type_value;
4129 IrInstSrc *field_name;
4130};
4131
4132struct IrInstSrcBitOffsetOf {
4133 IrInstSrc base;
37244134
3725 IrInstruction *type_value;
3726 IrInstruction *field_name;
4135 IrInstSrc *type_value;
4136 IrInstSrc *field_name;
37274137};
37284138
3729struct IrInstructionBitOffsetOf {
3730 IrInstruction base;
4139struct IrInstSrcTypeInfo {
4140 IrInstSrc base;
37314141
3732 IrInstruction *type_value;
3733 IrInstruction *field_name;
4142 IrInstSrc *type_value;
37344143};
37354144
3736struct IrInstructionTypeInfo {
3737 IrInstruction base;
4145struct IrInstSrcType {
4146 IrInstSrc base;
37384147
3739 IrInstruction *type_value;
4148 IrInstSrc *type_info;
37404149};
37414150
3742struct IrInstructionType {
3743 IrInstruction base;
4151struct IrInstSrcHasField {
4152 IrInstSrc base;
37444153
3745 IrInstruction *type_info;
4154 IrInstSrc *container_type;
4155 IrInstSrc *field_name;
37464156};
37474157
3748struct IrInstructionHasField {
3749 IrInstruction base;
4158struct IrInstSrcTypeId {
4159 IrInstSrc base;
37504160
3751 IrInstruction *container_type;
3752 IrInstruction *field_name;
4161 IrInstSrc *type_value;
37534162};
37544163
3755struct IrInstructionTypeId {
3756 IrInstruction base;
4164struct IrInstSrcSetEvalBranchQuota {
4165 IrInstSrc base;
37574166
3758 IrInstruction *type_value;
4167 IrInstSrc *new_quota;
37594168};
37604169
3761struct IrInstructionSetEvalBranchQuota {
3762 IrInstruction base;
4170struct IrInstSrcAlignCast {
4171 IrInstSrc base;
37634172
3764 IrInstruction *new_quota;
4173 IrInstSrc *align_bytes;
4174 IrInstSrc *target;
37654175};
37664176
3767struct IrInstructionAlignCast {
3768 IrInstruction base;
4177struct IrInstGenAlignCast {
4178 IrInstGen base;
37694179
3770 IrInstruction *align_bytes;
3771 IrInstruction *target;
4180 IrInstGen *target;
37724181};
37734182
3774struct IrInstructionOpaqueType {
3775 IrInstruction base;
4183struct IrInstSrcOpaqueType {
4184 IrInstSrc base;
37764185};
37774186
3778struct IrInstructionSetAlignStack {
3779 IrInstruction base;
4187struct IrInstSrcSetAlignStack {
4188 IrInstSrc base;
37804189
3781 IrInstruction *align_bytes;
4190 IrInstSrc *align_bytes;
37824191};
37834192
3784struct IrInstructionArgType {
3785 IrInstruction base;
4193struct IrInstSrcArgType {
4194 IrInstSrc base;
37864195
3787 IrInstruction *fn_type;
3788 IrInstruction *arg_index;
4196 IrInstSrc *fn_type;
4197 IrInstSrc *arg_index;
37894198 bool allow_var;
37904199};
37914200
3792struct IrInstructionExport {
3793 IrInstruction base;
4201struct IrInstSrcExport {
4202 IrInstSrc base;
4203
4204 IrInstSrc *target;
4205 IrInstSrc *options;
4206};
4207
4208enum IrInstErrorReturnTraceOptional {
4209 IrInstErrorReturnTraceNull,
4210 IrInstErrorReturnTraceNonNull,
4211};
4212
4213struct IrInstSrcErrorReturnTrace {
4214 IrInstSrc base;
37944215
3795 IrInstruction *target;
3796 IrInstruction *options;
4216 IrInstErrorReturnTraceOptional optional;
37974217};
37984218
3799struct IrInstructionErrorReturnTrace {
3800 IrInstruction base;
4219struct IrInstGenErrorReturnTrace {
4220 IrInstGen base;
38014221
3802 enum Optional {
3803 Null,
3804 NonNull,
3805 } optional;
4222 IrInstErrorReturnTraceOptional optional;
38064223};
38074224
3808struct IrInstructionErrorUnion {
3809 IrInstruction base;
4225struct IrInstSrcErrorUnion {
4226 IrInstSrc base;
38104227
3811 IrInstruction *err_set;
3812 IrInstruction *payload;
4228 IrInstSrc *err_set;
4229 IrInstSrc *payload;
38134230 Buf *type_name;
38144231};
38154232
3816struct IrInstructionAtomicRmw {
3817 IrInstruction base;
4233struct IrInstSrcAtomicRmw {
4234 IrInstSrc base;
4235
4236 IrInstSrc *operand_type;
4237 IrInstSrc *ptr;
4238 IrInstSrc *op;
4239 IrInstSrc *operand;
4240 IrInstSrc *ordering;
4241};
4242
4243struct IrInstGenAtomicRmw {
4244 IrInstGen base;
38184245
3819 IrInstruction *operand_type;
3820 IrInstruction *ptr;
3821 IrInstruction *op;
3822 AtomicRmwOp resolved_op;
3823 IrInstruction *operand;
3824 IrInstruction *ordering;
3825 AtomicOrder resolved_ordering;
4246 IrInstGen *ptr;
4247 IrInstGen *operand;
4248 AtomicRmwOp op;
4249 AtomicOrder ordering;
38264250};
38274251
3828struct IrInstructionAtomicLoad {
3829 IrInstruction base;
4252struct IrInstSrcAtomicLoad {
4253 IrInstSrc base;
38304254
3831 IrInstruction *operand_type;
3832 IrInstruction *ptr;
3833 IrInstruction *ordering;
3834 AtomicOrder resolved_ordering;
4255 IrInstSrc *operand_type;
4256 IrInstSrc *ptr;
4257 IrInstSrc *ordering;
38354258};
38364259
3837struct IrInstructionAtomicStore {
3838 IrInstruction base;
4260struct IrInstGenAtomicLoad {
4261 IrInstGen base;
38394262
3840 IrInstruction *operand_type;
3841 IrInstruction *ptr;
3842 IrInstruction *value;
3843 IrInstruction *ordering;
3844 AtomicOrder resolved_ordering;
4263 IrInstGen *ptr;
4264 AtomicOrder ordering;
38454265};
38464266
3847struct IrInstructionSaveErrRetAddr {
3848 IrInstruction base;
4267struct IrInstSrcAtomicStore {
4268 IrInstSrc base;
4269
4270 IrInstSrc *operand_type;
4271 IrInstSrc *ptr;
4272 IrInstSrc *value;
4273 IrInstSrc *ordering;
38494274};
38504275
3851struct IrInstructionAddImplicitReturnType {
3852 IrInstruction base;
4276struct IrInstGenAtomicStore {
4277 IrInstGen base;
4278
4279 IrInstGen *ptr;
4280 IrInstGen *value;
4281 AtomicOrder ordering;
4282};
38534283
3854 IrInstruction *value;
4284struct IrInstSrcSaveErrRetAddr {
4285 IrInstSrc base;
4286};
4287
4288struct IrInstGenSaveErrRetAddr {
4289 IrInstGen base;
4290};
4291
4292struct IrInstSrcAddImplicitReturnType {
4293 IrInstSrc base;
4294
4295 IrInstSrc *value;
38554296 ResultLocReturn *result_loc_ret;
38564297};
38574298
3858// For float ops which take a single argument
3859struct IrInstructionFloatOp {
3860 IrInstruction base;
4299// For float ops that take a single argument
4300struct IrInstSrcFloatOp {
4301 IrInstSrc base;
4302
4303 IrInstSrc *operand;
4304 BuiltinFnId fn_id;
4305};
4306
4307struct IrInstGenFloatOp {
4308 IrInstGen base;
38614309
4310 IrInstGen *operand;
38624311 BuiltinFnId fn_id;
3863 IrInstruction *operand;
38644312};
38654313
3866struct IrInstructionCheckRuntimeScope {
3867 IrInstruction base;
4314struct IrInstSrcCheckRuntimeScope {
4315 IrInstSrc base;
4316
4317 IrInstSrc *scope_is_comptime;
4318 IrInstSrc *is_comptime;
4319};
4320
4321struct IrInstSrcBswap {
4322 IrInstSrc base;
4323
4324 IrInstSrc *type;
4325 IrInstSrc *op;
4326};
4327
4328struct IrInstGenBswap {
4329 IrInstGen base;
4330
4331 IrInstGen *op;
4332};
4333
4334struct IrInstSrcBitReverse {
4335 IrInstSrc base;
38684336
3869 IrInstruction *scope_is_comptime;
3870 IrInstruction *is_comptime;
4337 IrInstSrc *type;
4338 IrInstSrc *op;
38714339};
38724340
3873struct IrInstructionBswap {
3874 IrInstruction base;
4341struct IrInstGenBitReverse {
4342 IrInstGen base;
38754343
3876 IrInstruction *type;
3877 IrInstruction *op;
4344 IrInstGen *op;
38784345};
38794346
3880struct IrInstructionBitReverse {
3881 IrInstruction base;
4347struct IrInstGenArrayToVector {
4348 IrInstGen base;
38824349
3883 IrInstruction *type;
3884 IrInstruction *op;
4350 IrInstGen *array;
38854351};
38864352
3887struct IrInstructionArrayToVector {
3888 IrInstruction base;
4353struct IrInstGenVectorToArray {
4354 IrInstGen base;
38894355
3890 IrInstruction *array;
4356 IrInstGen *vector;
4357 IrInstGen *result_loc;
38914358};
38924359
3893struct IrInstructionVectorToArray {
3894 IrInstruction base;
4360struct IrInstSrcShuffleVector {
4361 IrInstSrc base;
38954362
3896 IrInstruction *vector;
3897 IrInstruction *result_loc;
4363 IrInstSrc *scalar_type;
4364 IrInstSrc *a;
4365 IrInstSrc *b;
4366 IrInstSrc *mask; // This is in zig-format, not llvm format
38984367};
38994368
3900struct IrInstructionShuffleVector {
3901 IrInstruction base;
4369struct IrInstGenShuffleVector {
4370 IrInstGen base;
39024371
3903 IrInstruction *scalar_type;
3904 IrInstruction *a;
3905 IrInstruction *b;
3906 IrInstruction *mask; // This is in zig-format, not llvm format
4372 IrInstGen *a;
4373 IrInstGen *b;
4374 IrInstGen *mask; // This is in zig-format, not llvm format
39074375};
39084376
3909struct IrInstructionSplatSrc {
3910 IrInstruction base;
4377struct IrInstSrcSplat {
4378 IrInstSrc base;
39114379
3912 IrInstruction *len;
3913 IrInstruction *scalar;
4380 IrInstSrc *len;
4381 IrInstSrc *scalar;
39144382};
39154383
3916struct IrInstructionSplatGen {
3917 IrInstruction base;
4384struct IrInstGenSplat {
4385 IrInstGen base;
39184386
3919 IrInstruction *scalar;
4387 IrInstGen *scalar;
39204388};
39214389
3922struct IrInstructionAssertZero {
3923 IrInstruction base;
4390struct IrInstGenAssertZero {
4391 IrInstGen base;
39244392
3925 IrInstruction *target;
4393 IrInstGen *target;
39264394};
39274395
3928struct IrInstructionAssertNonNull {
3929 IrInstruction base;
4396struct IrInstGenAssertNonNull {
4397 IrInstGen base;
39304398
3931 IrInstruction *target;
4399 IrInstGen *target;
39324400};
39334401
3934struct IrInstructionUnionInitNamedField {
3935 IrInstruction base;
4402struct IrInstSrcUnionInitNamedField {
4403 IrInstSrc base;
39364404
3937 IrInstruction *union_type;
3938 IrInstruction *field_name;
3939 IrInstruction *field_result_loc;
3940 IrInstruction *result_loc;
4405 IrInstSrc *union_type;
4406 IrInstSrc *field_name;
4407 IrInstSrc *field_result_loc;
4408 IrInstSrc *result_loc;
39414409};
39424410
3943struct IrInstructionHasDecl {
3944 IrInstruction base;
4411struct IrInstSrcHasDecl {
4412 IrInstSrc base;
39454413
3946 IrInstruction *container;
3947 IrInstruction *name;
4414 IrInstSrc *container;
4415 IrInstSrc *name;
39484416};
39494417
3950struct IrInstructionUndeclaredIdent {
3951 IrInstruction base;
4418struct IrInstSrcUndeclaredIdent {
4419 IrInstSrc base;
39524420
39534421 Buf *name;
39544422};
39554423
3956struct IrInstructionAllocaSrc {
3957 IrInstruction base;
4424struct IrInstSrcAlloca {
4425 IrInstSrc base;
39584426
3959 IrInstruction *align;
3960 IrInstruction *is_comptime;
4427 IrInstSrc *align;
4428 IrInstSrc *is_comptime;
39614429 const char *name_hint;
39624430};
39634431
3964struct IrInstructionAllocaGen {
3965 IrInstruction base;
4432struct IrInstGenAlloca {
4433 IrInstGen base;
39664434
39674435 uint32_t align;
39684436 const char *name_hint;
39694437 size_t field_index;
39704438};
39714439
3972struct IrInstructionEndExpr {
3973 IrInstruction base;
4440struct IrInstSrcEndExpr {
4441 IrInstSrc base;
39744442
3975 IrInstruction *value;
4443 IrInstSrc *value;
39764444 ResultLoc *result_loc;
39774445};
39784446
39794447// This one is for writing through the result pointer.
3980struct IrInstructionResolveResult {
3981 IrInstruction base;
4448struct IrInstSrcResolveResult {
4449 IrInstSrc base;
39824450
39834451 ResultLoc *result_loc;
3984 IrInstruction *ty;
4452 IrInstSrc *ty;
39854453};
39864454
3987// This one is when you want to read the value of the result.
3988// You have to give the value in case it is comptime.
3989struct IrInstructionResultPtr {
3990 IrInstruction base;
4455struct IrInstSrcResetResult {
4456 IrInstSrc base;
39914457
39924458 ResultLoc *result_loc;
3993 IrInstruction *result;
39944459};
39954460
3996struct IrInstructionResetResult {
3997 IrInstruction base;
4461struct IrInstGenPtrOfArrayToSlice {
4462 IrInstGen base;
39984463
3999 ResultLoc *result_loc;
4464 IrInstGen *operand;
4465 IrInstGen *result_loc;
40004466};
40014467
4002struct IrInstructionPtrOfArrayToSlice {
4003 IrInstruction base;
4004
4005 IrInstruction *operand;
4006 IrInstruction *result_loc;
4468struct IrInstSrcSuspendBegin {
4469 IrInstSrc base;
40074470};
40084471
4009struct IrInstructionSuspendBegin {
4010 IrInstruction base;
4472struct IrInstGenSuspendBegin {
4473 IrInstGen base;
40114474
40124475 LLVMBasicBlockRef resume_bb;
40134476};
40144477
4015struct IrInstructionSuspendFinish {
4016 IrInstruction base;
4478struct IrInstSrcSuspendFinish {
4479 IrInstSrc base;
4480
4481 IrInstSrcSuspendBegin *begin;
4482};
4483
4484struct IrInstGenSuspendFinish {
4485 IrInstGen base;
40174486
4018 IrInstructionSuspendBegin *begin;
4487 IrInstGenSuspendBegin *begin;
40194488};
40204489
4021struct IrInstructionAwaitSrc {
4022 IrInstruction base;
4490struct IrInstSrcAwait {
4491 IrInstSrc base;
40234492
4024 IrInstruction *frame;
4493 IrInstSrc *frame;
40254494 ResultLoc *result_loc;
40264495};
40274496
4028struct IrInstructionAwaitGen {
4029 IrInstruction base;
4497struct IrInstGenAwait {
4498 IrInstGen base;
40304499
4031 IrInstruction *frame;
4032 IrInstruction *result_loc;
4500 IrInstGen *frame;
4501 IrInstGen *result_loc;
40334502 ZigFn *target_fn;
40344503};
40354504
4036struct IrInstructionResume {
4037 IrInstruction base;
4505struct IrInstSrcResume {
4506 IrInstSrc base;
4507
4508 IrInstSrc *frame;
4509};
4510
4511struct IrInstGenResume {
4512 IrInstGen base;
40384513
4039 IrInstruction *frame;
4514 IrInstGen *frame;
40404515};
40414516
40424517enum SpillId {
......@@ -4044,24 +4519,37 @@ enum SpillId {
40444519 SpillIdRetErrCode,
40454520};
40464521
4047struct IrInstructionSpillBegin {
4048 IrInstruction base;
4522struct IrInstSrcSpillBegin {
4523 IrInstSrc base;
4524
4525 IrInstSrc *operand;
4526 SpillId spill_id;
4527};
4528
4529struct IrInstGenSpillBegin {
4530 IrInstGen base;
40494531
40504532 SpillId spill_id;
4051 IrInstruction *operand;
4533 IrInstGen *operand;
4534};
4535
4536struct IrInstSrcSpillEnd {
4537 IrInstSrc base;
4538
4539 IrInstSrcSpillBegin *begin;
40524540};
40534541
4054struct IrInstructionSpillEnd {
4055 IrInstruction base;
4542struct IrInstGenSpillEnd {
4543 IrInstGen base;
40564544
4057 IrInstructionSpillBegin *begin;
4545 IrInstGenSpillBegin *begin;
40584546};
40594547
4060struct IrInstructionVectorExtractElem {
4061 IrInstruction base;
4548struct IrInstGenVectorExtractElem {
4549 IrInstGen base;
40624550
4063 IrInstruction *vector;
4064 IrInstruction *index;
4551 IrInstGen *vector;
4552 IrInstGen *index;
40654553};
40664554
40674555enum ResultLocId {
......@@ -4082,9 +4570,9 @@ struct ResultLoc {
40824570 ResultLocId id;
40834571 bool written;
40844572 bool allow_write_through_const;
4085 IrInstruction *resolved_loc; // result ptr
4086 IrInstruction *source_instruction;
4087 IrInstruction *gen_instruction; // value to store to the result loc
4573 IrInstGen *resolved_loc; // result ptr
4574 IrInstSrc *source_instruction;
4575 IrInstGen *gen_instruction; // value to store to the result loc
40884576 ZigType *implicit_elem_type;
40894577};
40904578
......@@ -4114,18 +4602,18 @@ struct ResultLocPeerParent {
41144602
41154603 bool skipped;
41164604 bool done_resuming;
4117 IrBasicBlock *end_bb;
4605 IrBasicBlockSrc *end_bb;
41184606 ResultLoc *parent;
41194607 ZigList<ResultLocPeer *> peers;
41204608 ZigType *resolved_type;
4121 IrInstruction *is_comptime;
4609 IrInstSrc *is_comptime;
41224610};
41234611
41244612struct ResultLocPeer {
41254613 ResultLoc base;
41264614
41274615 ResultLocPeerParent *parent;
4128 IrBasicBlock *next_bb;
4616 IrBasicBlockSrc *next_bb;
41294617 IrSuspendPosition suspend_pos;
41304618};
41314619
......@@ -4196,7 +4684,7 @@ struct FnWalkAttrs {
41964684struct FnWalkCall {
41974685 ZigList<LLVMValueRef> *gen_param_values;
41984686 ZigList<ZigType *> *gen_param_types;
4199 IrInstructionCallGen *inst;
4687 IrInstGenCall *inst;
42004688 bool is_var_args;
42014689};
42024690
src/analyze.cpp+330-71
......@@ -199,7 +199,7 @@ ScopeLoop *create_loop_scope(CodeGen *g, AstNode *node, Scope *parent) {
199199 return scope;
200200}
201201
202Scope *create_runtime_scope(CodeGen *g, AstNode *node, Scope *parent, IrInstruction *is_comptime) {
202Scope *create_runtime_scope(CodeGen *g, AstNode *node, Scope *parent, IrInstSrc *is_comptime) {
203203 ScopeRuntime *scope = allocate<ScopeRuntime>(1);
204204 scope->is_comptime = is_comptime;
205205 init_scope(g, &scope->base, ScopeIdRuntime, node, parent);
......@@ -593,9 +593,9 @@ ZigType *get_pointer_to_type_extra2(CodeGen *g, ZigType *child_type, bool is_con
593593 }
594594
595595 if (inferred_struct_field != nullptr) {
596 entry->abi_size = g->builtin_types.entry_usize->abi_size;
597 entry->size_in_bits = g->builtin_types.entry_usize->size_in_bits;
598 entry->abi_align = g->builtin_types.entry_usize->abi_align;
596 entry->abi_size = SIZE_MAX;
597 entry->size_in_bits = SIZE_MAX;
598 entry->abi_align = UINT32_MAX;
599599 } else if (type_is_resolved(child_type, ResolveStatusZeroBitsKnown)) {
600600 if (type_has_bits(child_type)) {
601601 entry->abi_size = g->builtin_types.entry_usize->abi_size;
......@@ -1102,11 +1102,28 @@ ZigType *get_partial_container_type(CodeGen *g, Scope *scope, ContainerKind kind
11021102ZigValue *analyze_const_value(CodeGen *g, Scope *scope, AstNode *node, ZigType *type_entry,
11031103 Buf *type_name, UndefAllowed undef)
11041104{
1105 Error err;
1106
1107 ZigValue *result = create_const_vals(1);
1108 ZigValue *result_ptr = create_const_vals(1);
1109 result->special = ConstValSpecialUndef;
1110 result->type = (type_entry == nullptr) ? g->builtin_types.entry_var : type_entry;
1111 result_ptr->special = ConstValSpecialStatic;
1112 result_ptr->type = get_pointer_to_type(g, result->type, false);
1113 result_ptr->data.x_ptr.mut = ConstPtrMutComptimeVar;
1114 result_ptr->data.x_ptr.special = ConstPtrSpecialRef;
1115 result_ptr->data.x_ptr.data.ref.pointee = result;
1116
11051117 size_t backward_branch_count = 0;
11061118 size_t backward_branch_quota = default_backward_branch_quota;
1107 return ir_eval_const_value(g, scope, node, type_entry,
1119 if ((err = ir_eval_const_value(g, scope, node, result_ptr,
11081120 &backward_branch_count, &backward_branch_quota,
1109 nullptr, nullptr, node, type_name, nullptr, nullptr, undef);
1121 nullptr, nullptr, node, type_name, nullptr, nullptr, undef)))
1122 {
1123 return g->invalid_inst_gen->value;
1124 }
1125 destroy(result_ptr, "ZigValue");
1126 return result;
11101127}
11111128
11121129Error type_val_resolve_zero_bits(CodeGen *g, ZigValue *type_val, ZigType *parent_type,
......@@ -3350,7 +3367,7 @@ static void get_fully_qualified_decl_name(CodeGen *g, Buf *buf, Tld *tld, bool i
33503367
33513368ZigFn *create_fn_raw(CodeGen *g, FnInline inline_value) {
33523369 ZigFn *fn_entry = allocate<ZigFn>(1, "ZigFn");
3353 fn_entry->ir_executable = allocate<IrExecutable>(1, "IrExecutablePass1");
3370 fn_entry->ir_executable = allocate<IrExecutableSrc>(1, "IrExecutableSrc");
33543371
33553372 fn_entry->prealloc_backward_branch_quota = default_backward_branch_quota;
33563373
......@@ -3829,7 +3846,6 @@ ZigVar *add_variable(CodeGen *g, AstNode *source_node, Scope *parent_scope, Buf
38293846 variable_entry->var_type = var_type;
38303847 variable_entry->parent_scope = parent_scope;
38313848 variable_entry->shadowable = false;
3832 variable_entry->mem_slot_index = SIZE_MAX;
38333849 variable_entry->src_arg_index = SIZE_MAX;
38343850
38353851 assert(name);
......@@ -3930,7 +3946,7 @@ static void resolve_decl_var(CodeGen *g, TldVar *tld_var, bool allow_lazy) {
39303946
39313947 // TODO more validation for types that can't be used for export/extern variables
39323948 ZigType *implicit_type = nullptr;
3933 if (explicit_type && explicit_type->id == ZigTypeIdInvalid) {
3949 if (explicit_type != nullptr && explicit_type->id == ZigTypeIdInvalid) {
39343950 implicit_type = explicit_type;
39353951 } else if (var_decl->expr) {
39363952 init_value = analyze_const_value(g, tld_var->base.parent_scope, var_decl->expr, explicit_type,
......@@ -4097,7 +4113,7 @@ static void preview_use_decl(CodeGen *g, TldUsingNamespace *using_namespace, Sco
40974113 if (type_is_invalid(result->type)) {
40984114 dest_decls_scope->any_imports_failed = true;
40994115 using_namespace->base.resolution = TldResolutionInvalid;
4100 using_namespace->using_namespace_value = g->invalid_instruction->value;
4116 using_namespace->using_namespace_value = g->invalid_inst_gen->value;
41014117 return;
41024118 }
41034119
......@@ -4106,7 +4122,7 @@ static void preview_use_decl(CodeGen *g, TldUsingNamespace *using_namespace, Sco
41064122 buf_sprintf("expected struct, enum, or union; found '%s'", buf_ptr(&result->data.x_type->name)));
41074123 dest_decls_scope->any_imports_failed = true;
41084124 using_namespace->base.resolution = TldResolutionInvalid;
4109 using_namespace->using_namespace_value = g->invalid_instruction->value;
4125 using_namespace->using_namespace_value = g->invalid_inst_gen->value;
41104126 return;
41114127 }
41124128}
......@@ -4667,12 +4683,12 @@ static void analyze_fn_async(CodeGen *g, ZigFn *fn, bool resolve_frame) {
46674683 }
46684684
46694685 for (size_t i = 0; i < fn->call_list.length; i += 1) {
4670 IrInstructionCallGen *call = fn->call_list.at(i);
4686 IrInstGenCall *call = fn->call_list.at(i);
46714687 if (call->fn_entry == nullptr) {
46724688 // TODO function pointer call here, could be anything
46734689 continue;
46744690 }
4675 switch (analyze_callee_async(g, fn, call->fn_entry, call->base.source_node, must_not_be_async,
4691 switch (analyze_callee_async(g, fn, call->fn_entry, call->base.base.source_node, must_not_be_async,
46764692 call->modifier))
46774693 {
46784694 case ErrorSemanticAnalyzeFail:
......@@ -4690,10 +4706,10 @@ static void analyze_fn_async(CodeGen *g, ZigFn *fn, bool resolve_frame) {
46904706 }
46914707 }
46924708 for (size_t i = 0; i < fn->await_list.length; i += 1) {
4693 IrInstructionAwaitGen *await = fn->await_list.at(i);
4709 IrInstGenAwait *await = fn->await_list.at(i);
46944710 // TODO If this is a noasync await, it doesn't count
46954711 // https://github.com/ziglang/zig/issues/3157
4696 switch (analyze_callee_async(g, fn, await->target_fn, await->base.source_node, must_not_be_async,
4712 switch (analyze_callee_async(g, fn, await->target_fn, await->base.base.source_node, must_not_be_async,
46974713 CallModifierNone))
46984714 {
46994715 case ErrorSemanticAnalyzeFail:
......@@ -4718,8 +4734,14 @@ static void analyze_fn_ir(CodeGen *g, ZigFn *fn, AstNode *return_type_node) {
47184734 assert(!fn_type->data.fn.is_generic);
47194735 FnTypeId *fn_type_id = &fn_type->data.fn.fn_type_id;
47204736
4737 if (fn->analyzed_executable.begin_scope == nullptr) {
4738 fn->analyzed_executable.begin_scope = &fn->def_scope->base;
4739 }
4740 if (fn->analyzed_executable.source_node == nullptr) {
4741 fn->analyzed_executable.source_node = fn->body_node;
4742 }
47214743 ZigType *block_return_type = ir_analyze(g, fn->ir_executable,
4722 &fn->analyzed_executable, fn_type_id->return_type, return_type_node);
4744 &fn->analyzed_executable, fn_type_id->return_type, return_type_node, nullptr);
47234745 fn->src_implicit_return_type = block_return_type;
47244746
47254747 if (type_is_invalid(block_return_type) || fn->analyzed_executable.first_err_trace_msg != nullptr) {
......@@ -4784,7 +4806,7 @@ static void analyze_fn_ir(CodeGen *g, ZigFn *fn, AstNode *return_type_node) {
47844806
47854807 if (g->verbose_ir) {
47864808 fprintf(stderr, "fn %s() { // (analyzed)\n", buf_ptr(&fn->symbol_name));
4787 ir_print(g, stderr, &fn->analyzed_executable, 4, IrPassGen);
4809 ir_print_gen(g, stderr, &fn->analyzed_executable, 4);
47884810 fprintf(stderr, "}\n");
47894811 }
47904812 fn->anal_state = FnAnalStateComplete;
......@@ -4827,7 +4849,7 @@ static void analyze_fn_body(CodeGen *g, ZigFn *fn_table_entry) {
48274849 fprintf(stderr, "\n");
48284850 ast_render(stderr, fn_table_entry->body_node, 4);
48294851 fprintf(stderr, "\nfn %s() { // (IR)\n", buf_ptr(&fn_table_entry->symbol_name));
4830 ir_print(g, stderr, fn_table_entry->ir_executable, 4, IrPassSrc);
4852 ir_print_src(g, stderr, fn_table_entry->ir_executable, 4);
48314853 fprintf(stderr, "}\n");
48324854 }
48334855
......@@ -5619,6 +5641,8 @@ OnePossibleValue type_has_one_possible_value(CodeGen *g, ZigType *type_entry) {
56195641 return OnePossibleValueYes;
56205642 return type_has_one_possible_value(g, type_entry->data.array.child_type);
56215643 case ZigTypeIdStruct:
5644 // If the recursive function call asks, then we are not one possible value.
5645 type_entry->one_possible_value = OnePossibleValueNo;
56225646 for (size_t i = 0; i < type_entry->data.structure.src_field_count; i += 1) {
56235647 TypeStructField *field = type_entry->data.structure.fields[i];
56245648 OnePossibleValue opv = (field->type_entry != nullptr) ?
......@@ -5626,6 +5650,7 @@ OnePossibleValue type_has_one_possible_value(CodeGen *g, ZigType *type_entry) {
56265650 type_val_resolve_has_one_possible_value(g, field->type_val);
56275651 switch (opv) {
56285652 case OnePossibleValueInvalid:
5653 type_entry->one_possible_value = OnePossibleValueInvalid;
56295654 return OnePossibleValueInvalid;
56305655 case OnePossibleValueNo:
56315656 return OnePossibleValueNo;
......@@ -5633,6 +5658,7 @@ OnePossibleValue type_has_one_possible_value(CodeGen *g, ZigType *type_entry) {
56335658 continue;
56345659 }
56355660 }
5661 type_entry->one_possible_value = OnePossibleValueYes;
56365662 return OnePossibleValueYes;
56375663 case ZigTypeIdErrorSet:
56385664 case ZigTypeIdEnum:
......@@ -5678,6 +5704,9 @@ ZigValue *get_the_one_possible_value(CodeGen *g, ZigType *type_entry) {
56785704 assert(field_type != nullptr);
56795705 result->data.x_struct.fields[i] = get_the_one_possible_value(g, field_type);
56805706 }
5707 } else if (result->type->id == ZigTypeIdPointer) {
5708 result->data.x_ptr.special = ConstPtrSpecialRef;
5709 result->data.x_ptr.data.ref.pointee = get_the_one_possible_value(g, result->type->data.pointer.child_type);
56815710 }
56825711 g->one_possible_values.put(type_entry, result);
56835712 return result;
......@@ -6191,13 +6220,13 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
61916220 ZigType *fn_type = get_async_fn_type(g, fn->type_entry);
61926221
61936222 if (fn->analyzed_executable.need_err_code_spill) {
6194 IrInstructionAllocaGen *alloca_gen = allocate<IrInstructionAllocaGen>(1);
6195 alloca_gen->base.id = IrInstructionIdAllocaGen;
6196 alloca_gen->base.source_node = fn->proto_node;
6197 alloca_gen->base.scope = fn->child_scope;
6223 IrInstGenAlloca *alloca_gen = allocate<IrInstGenAlloca>(1);
6224 alloca_gen->base.id = IrInstGenIdAlloca;
6225 alloca_gen->base.base.source_node = fn->proto_node;
6226 alloca_gen->base.base.scope = fn->child_scope;
61986227 alloca_gen->base.value = allocate<ZigValue>(1, "ZigValue");
61996228 alloca_gen->base.value->type = get_pointer_to_type(g, g->builtin_types.entry_global_error_set, false);
6200 alloca_gen->base.ref_count = 1;
6229 alloca_gen->base.base.ref_count = 1;
62016230 alloca_gen->name_hint = "";
62026231 fn->alloca_gen_list.append(alloca_gen);
62036232 fn->err_code_spill = &alloca_gen->base;
......@@ -6205,18 +6234,18 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
62056234
62066235 ZigType *largest_call_frame_type = nullptr;
62076236 // Later we'll change this to be largest_call_frame_type instead of void.
6208 IrInstruction *all_calls_alloca = ir_create_alloca(g, &fn->fndef_scope->base, fn->body_node,
6237 IrInstGen *all_calls_alloca = ir_create_alloca(g, &fn->fndef_scope->base, fn->body_node,
62096238 fn, g->builtin_types.entry_void, "@async_call_frame");
62106239
62116240 for (size_t i = 0; i < fn->call_list.length; i += 1) {
6212 IrInstructionCallGen *call = fn->call_list.at(i);
6241 IrInstGenCall *call = fn->call_list.at(i);
62136242 if (call->new_stack != nullptr) {
62146243 // don't need to allocate a frame for this
62156244 continue;
62166245 }
62176246 ZigFn *callee = call->fn_entry;
62186247 if (callee == nullptr) {
6219 add_node_error(g, call->base.source_node,
6248 add_node_error(g, call->base.base.source_node,
62206249 buf_sprintf("function is not comptime-known; @asyncCall required"));
62216250 return ErrorSemanticAnalyzeFail;
62226251 }
......@@ -6226,14 +6255,14 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
62266255 if (callee->anal_state == FnAnalStateProbing) {
62276256 ErrorMsg *msg = add_node_error(g, fn->proto_node,
62286257 buf_sprintf("unable to determine async function frame of '%s'", buf_ptr(&fn->symbol_name)));
6229 g->trace_err = add_error_note(g, msg, call->base.source_node,
6258 g->trace_err = add_error_note(g, msg, call->base.base.source_node,
62306259 buf_sprintf("analysis of function '%s' depends on the frame", buf_ptr(&callee->symbol_name)));
62316260 return ErrorSemanticAnalyzeFail;
62326261 }
62336262
62346263 ZigType *callee_frame_type = get_fn_frame_type(g, callee);
62356264 frame_type->data.frame.resolve_loop_type = callee_frame_type;
6236 frame_type->data.frame.resolve_loop_src_node = call->base.source_node;
6265 frame_type->data.frame.resolve_loop_src_node = call->base.base.source_node;
62376266
62386267 analyze_fn_body(g, callee);
62396268 if (callee->anal_state == FnAnalStateInvalid) {
......@@ -6249,7 +6278,7 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
62496278 if (!fn_is_async(callee))
62506279 continue;
62516280
6252 mark_suspension_point(call->base.scope);
6281 mark_suspension_point(call->base.base.scope);
62536282
62546283 if ((err = type_resolve(g, callee_frame_type, ResolveStatusSizeKnown))) {
62556284 return err;
......@@ -6271,7 +6300,7 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
62716300 // For example: foo() + await z
62726301 // The funtion call result of foo() must be spilled.
62736302 for (size_t i = 0; i < fn->await_list.length; i += 1) {
6274 IrInstructionAwaitGen *await = fn->await_list.at(i);
6303 IrInstGenAwait *await = fn->await_list.at(i);
62756304 // TODO If this is a noasync await, it doesn't suspend
62766305 // https://github.com/ziglang/zig/issues/3157
62776306 if (await->base.value->special != ConstValSpecialRuntime) {
......@@ -6293,52 +6322,51 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
62936322 }
62946323 // This await is a suspend point, but it might not need a spill.
62956324 // We do need to mark the ExprScope as having a suspend point in it.
6296 mark_suspension_point(await->base.scope);
6325 mark_suspension_point(await->base.base.scope);
62976326
62986327 if (await->result_loc != nullptr) {
62996328 // If there's a result location, that is the spill
63006329 continue;
63016330 }
6302 if (await->base.ref_count == 0)
6331 if (await->base.base.ref_count == 0)
63036332 continue;
63046333 if (!type_has_bits(await->base.value->type))
63056334 continue;
6306 await->result_loc = ir_create_alloca(g, await->base.scope, await->base.source_node, fn,
6335 await->result_loc = ir_create_alloca(g, await->base.base.scope, await->base.base.source_node, fn,
63076336 await->base.value->type, "");
63086337 }
63096338 for (size_t block_i = 0; block_i < fn->analyzed_executable.basic_block_list.length; block_i += 1) {
6310 IrBasicBlock *block = fn->analyzed_executable.basic_block_list.at(block_i);
6339 IrBasicBlockGen *block = fn->analyzed_executable.basic_block_list.at(block_i);
63116340 for (size_t instr_i = 0; instr_i < block->instruction_list.length; instr_i += 1) {
6312 IrInstruction *instruction = block->instruction_list.at(instr_i);
6313 if (instruction->id == IrInstructionIdSuspendFinish) {
6314 mark_suspension_point(instruction->scope);
6341 IrInstGen *instruction = block->instruction_list.at(instr_i);
6342 if (instruction->id == IrInstGenIdSuspendFinish) {
6343 mark_suspension_point(instruction->base.scope);
63156344 }
63166345 }
63176346 }
63186347 // Now that we've marked all the expr scopes that have to spill, we go over the instructions
63196348 // and spill the relevant ones.
63206349 for (size_t block_i = 0; block_i < fn->analyzed_executable.basic_block_list.length; block_i += 1) {
6321 IrBasicBlock *block = fn->analyzed_executable.basic_block_list.at(block_i);
6350 IrBasicBlockGen *block = fn->analyzed_executable.basic_block_list.at(block_i);
63226351 for (size_t instr_i = 0; instr_i < block->instruction_list.length; instr_i += 1) {
6323 IrInstruction *instruction = block->instruction_list.at(instr_i);
6324 if (instruction->id == IrInstructionIdAwaitGen ||
6325 instruction->id == IrInstructionIdVarPtr ||
6326 instruction->id == IrInstructionIdDeclRef ||
6327 instruction->id == IrInstructionIdAllocaGen)
6352 IrInstGen *instruction = block->instruction_list.at(instr_i);
6353 if (instruction->id == IrInstGenIdAwait ||
6354 instruction->id == IrInstGenIdVarPtr ||
6355 instruction->id == IrInstGenIdAlloca)
63286356 {
63296357 // This instruction does its own spilling specially, or otherwise doesn't need it.
63306358 continue;
63316359 }
63326360 if (instruction->value->special != ConstValSpecialRuntime)
63336361 continue;
6334 if (instruction->ref_count == 0)
6362 if (instruction->base.ref_count == 0)
63356363 continue;
63366364 if ((err = type_resolve(g, instruction->value->type, ResolveStatusZeroBitsKnown)))
63376365 return ErrorSemanticAnalyzeFail;
63386366 if (!type_has_bits(instruction->value->type))
63396367 continue;
6340 if (scope_needs_spill(instruction->scope)) {
6341 instruction->spill = ir_create_alloca(g, instruction->scope, instruction->source_node,
6368 if (scope_needs_spill(instruction->base.scope)) {
6369 instruction->spill = ir_create_alloca(g, instruction->base.scope, instruction->base.source_node,
63426370 fn, instruction->value->type, "");
63436371 }
63446372 }
......@@ -6389,14 +6417,14 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
63896417 }
63906418
63916419 for (size_t alloca_i = 0; alloca_i < fn->alloca_gen_list.length; alloca_i += 1) {
6392 IrInstructionAllocaGen *instruction = fn->alloca_gen_list.at(alloca_i);
6420 IrInstGenAlloca *instruction = fn->alloca_gen_list.at(alloca_i);
63936421 instruction->field_index = SIZE_MAX;
63946422 ZigType *ptr_type = instruction->base.value->type;
63956423 assert(ptr_type->id == ZigTypeIdPointer);
63966424 ZigType *child_type = ptr_type->data.pointer.child_type;
63976425 if (!type_has_bits(child_type))
63986426 continue;
6399 if (instruction->base.ref_count == 0)
6427 if (instruction->base.base.ref_count == 0)
64006428 continue;
64016429 if (instruction->base.value->special != ConstValSpecialRuntime) {
64026430 if (const_ptr_pointee(nullptr, g, instruction->base.value, nullptr)->special !=
......@@ -6407,7 +6435,7 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
64076435 }
64086436
64096437 frame_type->data.frame.resolve_loop_type = child_type;
6410 frame_type->data.frame.resolve_loop_src_node = instruction->base.source_node;
6438 frame_type->data.frame.resolve_loop_src_node = instruction->base.base.source_node;
64116439 if ((err = type_resolve(g, child_type, ResolveStatusSizeKnown))) {
64126440 return err;
64136441 }
......@@ -6421,7 +6449,7 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
64216449 instruction->field_index = fields.length;
64226450
64236451 src_assert(child_type->id != ZigTypeIdPointer || child_type->data.pointer.inferred_struct_field == nullptr,
6424 instruction->base.source_node);
6452 instruction->base.base.source_node);
64256453 fields.append({name, child_type, instruction->align});
64266454 }
64276455
......@@ -6453,7 +6481,21 @@ static Error resolve_pointer_zero_bits(CodeGen *g, ZigType *ty) {
64536481 }
64546482 ty->data.pointer.resolve_loop_flag_zero_bits = true;
64556483
6456 ZigType *elem_type = ty->data.pointer.child_type;
6484 ZigType *elem_type;
6485 InferredStructField *isf = ty->data.pointer.inferred_struct_field;
6486 if (isf != nullptr) {
6487 TypeStructField *field = find_struct_type_field(isf->inferred_struct_type, isf->field_name);
6488 assert(field != nullptr);
6489 if (field->is_comptime) {
6490 ty->abi_size = 0;
6491 ty->size_in_bits = 0;
6492 ty->abi_align = 0;
6493 return ErrorNone;
6494 }
6495 elem_type = field->type_entry;
6496 } else {
6497 elem_type = ty->data.pointer.child_type;
6498 }
64576499
64586500 bool has_bits;
64596501 if ((err = type_has_bits2(g, elem_type, &has_bits)))
......@@ -6554,8 +6596,10 @@ bool ir_get_var_is_comptime(ZigVar *var) {
65546596 // As an optimization, is_comptime values which are constant are allowed
65556597 // to be omitted from analysis. In this case, there is no child instruction
65566598 // and we simply look at the unanalyzed const parent instruction.
6557 assert(var->is_comptime->value->type->id == ZigTypeIdBool);
6558 var->is_comptime_memoized_value = var->is_comptime->value->data.x_bool;
6599 assert(var->is_comptime->id == IrInstSrcIdConst);
6600 IrInstSrcConst *const_inst = reinterpret_cast<IrInstSrcConst *>(var->is_comptime);
6601 assert(const_inst->value->type->id == ZigTypeIdBool);
6602 var->is_comptime_memoized_value = const_inst->value->data.x_bool;
65596603 var->is_comptime = nullptr;
65606604 return var->is_comptime_memoized_value;
65616605}
......@@ -6874,6 +6918,7 @@ static void render_const_val_array(CodeGen *g, Buf *buf, Buf *type_name, ZigValu
68746918 }
68756919 case ConstArraySpecialNone: {
68766920 ZigValue *base = &array->data.s_none.elements[start];
6921 assert(base != nullptr);
68776922 assert(start + len <= const_val->type->data.array.len);
68786923
68796924 buf_appendf(buf, "%s{", buf_ptr(type_name));
......@@ -6889,6 +6934,10 @@ static void render_const_val_array(CodeGen *g, Buf *buf, Buf *type_name, ZigValu
68896934}
68906935
68916936void render_const_value(CodeGen *g, Buf *buf, ZigValue *const_val) {
6937 if (const_val == nullptr) {
6938 buf_appendf(buf, "(invalid nullptr value)");
6939 return;
6940 }
68926941 switch (const_val->special) {
68936942 case ConstValSpecialRuntime:
68946943 buf_appendf(buf, "(runtime value)");
......@@ -9193,21 +9242,6 @@ void src_assert(bool ok, AstNode *source_node) {
91939242 stage2_panic(msg, strlen(msg));
91949243}
91959244
9196IrInstruction *ir_create_alloca(CodeGen *g, Scope *scope, AstNode *source_node, ZigFn *fn,
9197 ZigType *var_type, const char *name_hint)
9198{
9199 IrInstructionAllocaGen *alloca_gen = allocate<IrInstructionAllocaGen>(1);
9200 alloca_gen->base.id = IrInstructionIdAllocaGen;
9201 alloca_gen->base.source_node = source_node;
9202 alloca_gen->base.scope = scope;
9203 alloca_gen->base.value = allocate<ZigValue>(1, "ZigValue");
9204 alloca_gen->base.value->type = get_pointer_to_type(g, var_type, false);
9205 alloca_gen->base.ref_count = 1;
9206 alloca_gen->name_hint = name_hint;
9207 fn->alloca_gen_list.append(alloca_gen);
9208 return &alloca_gen->base;
9209}
9210
92119245Error analyze_import(CodeGen *g, ZigType *source_import, Buf *import_target_str,
92129246 ZigType **out_import, Buf **out_import_target_path, Buf *out_full_path)
92139247{
......@@ -9268,8 +9302,17 @@ Error analyze_import(CodeGen *g, ZigType *source_import, Buf *import_target_str,
92689302}
92699303
92709304
9271void IrExecutable::src() {
9272 IrExecutable *it;
9305void IrExecutableSrc::src() {
9306 if (this->source_node != nullptr) {
9307 this->source_node->src();
9308 }
9309 if (this->parent_exec != nullptr) {
9310 this->parent_exec->src();
9311 }
9312}
9313
9314void IrExecutableGen::src() {
9315 IrExecutableGen *it;
92739316 for (it = this; it != nullptr && it->source_node != nullptr; it = it->parent_exec) {
92749317 it->source_node->src();
92759318 }
......@@ -9300,10 +9343,13 @@ bool type_has_optional_repr(ZigType *ty) {
93009343}
93019344
93029345void copy_const_val(ZigValue *dest, ZigValue *src) {
9346 uint32_t prev_align = dest->llvm_align;
9347 ConstParent prev_parent = dest->parent;
93039348 memcpy(dest, src, sizeof(ZigValue));
9349 dest->llvm_align = prev_align;
93049350 if (src->special != ConstValSpecialStatic)
93059351 return;
9306 dest->parent.id = ConstParentIdNone;
9352 dest->parent = prev_parent;
93079353 if (dest->type->id == ZigTypeIdStruct) {
93089354 dest->data.x_struct.fields = alloc_const_vals_ptrs(dest->type->data.structure.src_field_count);
93099355 for (size_t i = 0; i < dest->type->data.structure.src_field_count; i += 1) {
......@@ -9312,6 +9358,16 @@ void copy_const_val(ZigValue *dest, ZigValue *src) {
93129358 dest->data.x_struct.fields[i]->parent.data.p_struct.struct_val = dest;
93139359 dest->data.x_struct.fields[i]->parent.data.p_struct.field_index = i;
93149360 }
9361 } else if (dest->type->id == ZigTypeIdArray) {
9362 if (dest->data.x_array.special == ConstArraySpecialNone) {
9363 dest->data.x_array.data.s_none.elements = create_const_vals(dest->type->data.array.len);
9364 for (uint64_t i = 0; i < dest->type->data.array.len; i += 1) {
9365 copy_const_val(&dest->data.x_array.data.s_none.elements[i], &src->data.x_array.data.s_none.elements[i]);
9366 dest->data.x_array.data.s_none.elements[i].parent.id = ConstParentIdArray;
9367 dest->data.x_array.data.s_none.elements[i].parent.data.p_array.array_val = dest;
9368 dest->data.x_array.data.s_none.elements[i].parent.data.p_array.elem_index = i;
9369 }
9370 }
93159371 } else if (type_has_optional_repr(dest->type) && dest->data.x_optional != nullptr) {
93169372 dest->data.x_optional = create_const_vals(1);
93179373 copy_const_val(dest->data.x_optional, src->data.x_optional);
......@@ -9357,3 +9413,206 @@ bool type_is_numeric(ZigType *ty) {
93579413 }
93589414 zig_unreachable();
93599415}
9416
9417static void dump_value_indent(ZigValue *val, int indent) {
9418 for (int i = 0; i < indent; i += 1) {
9419 fprintf(stderr, " ");
9420 }
9421 fprintf(stderr, "Value@%p(", val);
9422 if (val->type != nullptr) {
9423 fprintf(stderr, "%s)", buf_ptr(&val->type->name));
9424 } else {
9425 fprintf(stderr, "type=nullptr)");
9426 }
9427 switch (val->special) {
9428 case ConstValSpecialUndef:
9429 fprintf(stderr, "[undefined]\n");
9430 return;
9431 case ConstValSpecialLazy:
9432 fprintf(stderr, "[lazy]\n");
9433 return;
9434 case ConstValSpecialRuntime:
9435 fprintf(stderr, "[runtime]\n");
9436 return;
9437 case ConstValSpecialStatic:
9438 break;
9439 }
9440 if (val->type == nullptr)
9441 return;
9442 switch (val->type->id) {
9443 case ZigTypeIdInvalid:
9444 fprintf(stderr, "<invalid>\n");
9445 return;
9446 case ZigTypeIdUnreachable:
9447 fprintf(stderr, "<unreachable>\n");
9448 return;
9449 case ZigTypeIdUndefined:
9450 fprintf(stderr, "<undefined>\n");
9451 return;
9452 case ZigTypeIdVoid:
9453 fprintf(stderr, "<{}>\n");
9454 return;
9455 case ZigTypeIdMetaType:
9456 fprintf(stderr, "<%s>\n", buf_ptr(&val->data.x_type->name));
9457 return;
9458 case ZigTypeIdBool:
9459 fprintf(stderr, "<%s>\n", val->data.x_bool ? "true" : "false");
9460 return;
9461 case ZigTypeIdComptimeInt:
9462 case ZigTypeIdInt: {
9463 Buf *tmp_buf = buf_alloc();
9464 bigint_append_buf(tmp_buf, &val->data.x_bigint, 10);
9465 fprintf(stderr, "<%s>\n", buf_ptr(tmp_buf));
9466 buf_destroy(tmp_buf);
9467 return;
9468 }
9469 case ZigTypeIdComptimeFloat:
9470 case ZigTypeIdFloat:
9471 fprintf(stderr, "<TODO dump number>\n");
9472 return;
9473
9474 case ZigTypeIdStruct:
9475 fprintf(stderr, "<struct\n");
9476 for (size_t i = 0; i < val->type->data.structure.src_field_count; i += 1) {
9477 for (int j = 0; j < indent; j += 1) {
9478 fprintf(stderr, " ");
9479 }
9480 fprintf(stderr, "%s: ", buf_ptr(val->type->data.structure.fields[i]->name));
9481 if (val->data.x_struct.fields == nullptr) {
9482 fprintf(stderr, "<null>\n");
9483 } else {
9484 dump_value_indent(val->data.x_struct.fields[i], 1);
9485 }
9486 }
9487 for (int i = 0; i < indent; i += 1) {
9488 fprintf(stderr, " ");
9489 }
9490 fprintf(stderr, ">\n");
9491 return;
9492
9493 case ZigTypeIdOptional:
9494 fprintf(stderr, "<\n");
9495 dump_value_indent(val->data.x_optional, indent + 1);
9496
9497 for (int i = 0; i < indent; i += 1) {
9498 fprintf(stderr, " ");
9499 }
9500 fprintf(stderr, ">\n");
9501 return;
9502
9503 case ZigTypeIdErrorUnion:
9504 if (val->data.x_err_union.payload != nullptr) {
9505 fprintf(stderr, "<\n");
9506 dump_value_indent(val->data.x_err_union.payload, indent + 1);
9507 } else {
9508 fprintf(stderr, "<\n");
9509 dump_value_indent(val->data.x_err_union.error_set, 0);
9510 }
9511 for (int i = 0; i < indent; i += 1) {
9512 fprintf(stderr, " ");
9513 }
9514 fprintf(stderr, ">\n");
9515 return;
9516
9517 case ZigTypeIdPointer:
9518 switch (val->data.x_ptr.special) {
9519 case ConstPtrSpecialInvalid:
9520 fprintf(stderr, "<!invalid ptr!>\n");
9521 return;
9522 case ConstPtrSpecialRef:
9523 fprintf(stderr, "<ref\n");
9524 dump_value_indent(val->data.x_ptr.data.ref.pointee, indent + 1);
9525 break;
9526 case ConstPtrSpecialBaseStruct: {
9527 ZigValue *struct_val = val->data.x_ptr.data.base_struct.struct_val;
9528 size_t field_index = val->data.x_ptr.data.base_struct.field_index;
9529 fprintf(stderr, "<struct %p field %zu\n", struct_val, field_index);
9530 if (struct_val != nullptr) {
9531 ZigValue *field_val = struct_val->data.x_struct.fields[field_index];
9532 if (field_val != nullptr) {
9533 dump_value_indent(field_val, indent + 1);
9534 } else {
9535 for (int i = 0; i < indent; i += 1) {
9536 fprintf(stderr, " ");
9537 }
9538 fprintf(stderr, "(invalid null field)\n");
9539 }
9540 }
9541 break;
9542 }
9543 case ConstPtrSpecialBaseOptionalPayload: {
9544 ZigValue *optional_val = val->data.x_ptr.data.base_optional_payload.optional_val;
9545 fprintf(stderr, "<optional %p payload\n", optional_val);
9546 if (optional_val != nullptr) {
9547 dump_value_indent(optional_val, indent + 1);
9548 }
9549 break;
9550 }
9551 default:
9552 fprintf(stderr, "TODO dump more pointer things\n");
9553 }
9554 for (int i = 0; i < indent; i += 1) {
9555 fprintf(stderr, " ");
9556 }
9557 fprintf(stderr, ">\n");
9558 return;
9559
9560 case ZigTypeIdVector:
9561 case ZigTypeIdArray:
9562 case ZigTypeIdNull:
9563 case ZigTypeIdErrorSet:
9564 case ZigTypeIdEnum:
9565 case ZigTypeIdUnion:
9566 case ZigTypeIdFn:
9567 case ZigTypeIdBoundFn:
9568 case ZigTypeIdOpaque:
9569 case ZigTypeIdFnFrame:
9570 case ZigTypeIdAnyFrame:
9571 case ZigTypeIdEnumLiteral:
9572 fprintf(stderr, "<TODO dump value>\n");
9573 return;
9574 }
9575 zig_unreachable();
9576}
9577
9578void ZigValue::dump() {
9579 dump_value_indent(this, 0);
9580}
9581
9582// float ops that take a single argument
9583//TODO Powi, Pow, minnum, maxnum, maximum, minimum, copysign, lround, llround, lrint, llrint
9584const char *float_op_to_name(BuiltinFnId op) {
9585 switch (op) {
9586 case BuiltinFnIdSqrt:
9587 return "sqrt";
9588 case BuiltinFnIdSin:
9589 return "sin";
9590 case BuiltinFnIdCos:
9591 return "cos";
9592 case BuiltinFnIdExp:
9593 return "exp";
9594 case BuiltinFnIdExp2:
9595 return "exp2";
9596 case BuiltinFnIdLog:
9597 return "log";
9598 case BuiltinFnIdLog10:
9599 return "log10";
9600 case BuiltinFnIdLog2:
9601 return "log2";
9602 case BuiltinFnIdFabs:
9603 return "fabs";
9604 case BuiltinFnIdFloor:
9605 return "floor";
9606 case BuiltinFnIdCeil:
9607 return "ceil";
9608 case BuiltinFnIdTrunc:
9609 return "trunc";
9610 case BuiltinFnIdNearbyInt:
9611 return "nearbyint";
9612 case BuiltinFnIdRound:
9613 return "round";
9614 default:
9615 zig_unreachable();
9616 }
9617}
9618
src/analyze.hpp+2-3
......@@ -120,7 +120,7 @@ ScopeLoop *create_loop_scope(CodeGen *g, AstNode *node, Scope *parent);
120120ScopeSuspend *create_suspend_scope(CodeGen *g, AstNode *node, Scope *parent);
121121ScopeFnDef *create_fndef_scope(CodeGen *g, AstNode *node, Scope *parent, ZigFn *fn_entry);
122122Scope *create_comptime_scope(CodeGen *g, AstNode *node, Scope *parent);
123Scope *create_runtime_scope(CodeGen *g, AstNode *node, Scope *parent, IrInstruction *is_comptime);
123Scope *create_runtime_scope(CodeGen *g, AstNode *node, Scope *parent, IrInstSrc *is_comptime);
124124Scope *create_typeof_scope(CodeGen *g, AstNode *node, Scope *parent);
125125ScopeExpr *create_expr_scope(CodeGen *g, AstNode *node, Scope *parent);
126126
......@@ -271,8 +271,6 @@ ZigType *resolve_struct_field_type(CodeGen *g, TypeStructField *struct_field);
271271
272272void add_async_error_notes(CodeGen *g, ErrorMsg *msg, ZigFn *fn);
273273
274IrInstruction *ir_create_alloca(CodeGen *g, Scope *scope, AstNode *source_node, ZigFn *fn,
275 ZigType *var_type, const char *name_hint);
276274Error analyze_import(CodeGen *codegen, ZigType *source_import, Buf *import_target_str,
277275 ZigType **out_import, Buf **out_import_target_path, Buf *out_full_path);
278276ZigValue *get_the_one_possible_value(CodeGen *g, ZigType *type_entry);
......@@ -281,4 +279,5 @@ void copy_const_val(ZigValue *dest, ZigValue *src);
281279bool type_has_optional_repr(ZigType *ty);
282280bool is_opt_err_set(ZigType *ty);
283281bool type_is_numeric(ZigType *ty);
282const char *float_op_to_name(BuiltinFnId op);
284283#endif
src/codegen.cpp+528-520
......@@ -20,6 +20,7 @@
2020#include "zig_llvm.h"
2121#include "userland.h"
2222#include "dump_analysis.hpp"
23#include "softfloat.hpp"
2324
2425#include <stdio.h>
2526#include <errno.h>
......@@ -30,11 +31,6 @@ enum ResumeId {
3031 ResumeIdCall,
3132};
3233
33// TODO https://github.com/ziglang/zig/issues/2883
34// Until then we have this same default as Clang.
35// This avoids https://github.com/ziglang/zig/issues/3275
36static const char *riscv_default_features = "+a,+c,+d,+f,+m,+relax";
37
3834static void init_darwin_native(CodeGen *g) {
3935 char *osx_target = getenv("MACOSX_DEPLOYMENT_TARGET");
4036 char *ios_target = getenv("IPHONEOS_DEPLOYMENT_TARGET");
......@@ -191,7 +187,7 @@ static void generate_error_name_table(CodeGen *g);
191187static bool value_is_all_undef(CodeGen *g, ZigValue *const_val);
192188static void gen_undef_init(CodeGen *g, uint32_t ptr_align_bytes, ZigType *value_type, LLVMValueRef ptr);
193189static LLVMValueRef build_alloca(CodeGen *g, ZigType *type_entry, const char *name, uint32_t alignment);
194static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstruction *source_instr,
190static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstGen *source_instr,
195191 LLVMValueRef target_frame_ptr, ZigType *result_type, ZigType *ptr_result_type,
196192 LLVMValueRef result_loc, bool non_async);
197193static Error get_tmp_filename(CodeGen *g, Buf *out, Buf *suffix);
......@@ -877,14 +873,14 @@ static LLVMValueRef get_handle_value(CodeGen *g, LLVMValueRef ptr, ZigType *type
877873 }
878874}
879875
880static void ir_assert(bool ok, IrInstruction *source_instruction) {
876static void ir_assert(bool ok, IrInstGen *source_instruction) {
881877 if (ok) return;
882 src_assert(ok, source_instruction->source_node);
878 src_assert(ok, source_instruction->base.source_node);
883879}
884880
885static bool ir_want_fast_math(CodeGen *g, IrInstruction *instruction) {
881static bool ir_want_fast_math(CodeGen *g, IrInstGen *instruction) {
886882 // TODO memoize
887 Scope *scope = instruction->scope;
883 Scope *scope = instruction->base.scope;
888884 while (scope) {
889885 if (scope->id == ScopeIdBlock) {
890886 ScopeBlock *block_scope = (ScopeBlock *)scope;
......@@ -919,8 +915,8 @@ static bool ir_want_runtime_safety_scope(CodeGen *g, Scope *scope) {
919915 g->build_mode != BuildModeSmallRelease);
920916}
921917
922static bool ir_want_runtime_safety(CodeGen *g, IrInstruction *instruction) {
923 return ir_want_runtime_safety_scope(g, instruction->scope);
918static bool ir_want_runtime_safety(CodeGen *g, IrInstGen *instruction) {
919 return ir_want_runtime_safety_scope(g, instruction->base.scope);
924920}
925921
926922static Buf *panic_msg_buf(PanicMsgId msg_id) {
......@@ -1046,8 +1042,8 @@ static void gen_assertion_scope(CodeGen *g, PanicMsgId msg_id, Scope *source_sco
10461042 }
10471043}
10481044
1049static void gen_assertion(CodeGen *g, PanicMsgId msg_id, IrInstruction *source_instruction) {
1050 return gen_assertion_scope(g, msg_id, source_instruction->scope);
1045static void gen_assertion(CodeGen *g, PanicMsgId msg_id, IrInstGen *source_instruction) {
1046 return gen_assertion_scope(g, msg_id, source_instruction->base.scope);
10511047}
10521048
10531049static LLVMValueRef get_stacksave_fn_val(CodeGen *g) {
......@@ -1761,7 +1757,7 @@ static void gen_var_debug_decl(CodeGen *g, ZigVar *var) {
17611757 LLVMGetInsertBlock(g->builder));
17621758}
17631759
1764static LLVMValueRef ir_llvm_value(CodeGen *g, IrInstruction *instruction) {
1760static LLVMValueRef ir_llvm_value(CodeGen *g, IrInstGen *instruction) {
17651761 Error err;
17661762
17671763 bool value_has_bits;
......@@ -1772,8 +1768,8 @@ static LLVMValueRef ir_llvm_value(CodeGen *g, IrInstruction *instruction) {
17721768 return nullptr;
17731769
17741770 if (!instruction->llvm_value) {
1775 if (instruction->id == IrInstructionIdAwaitGen) {
1776 IrInstructionAwaitGen *await = reinterpret_cast<IrInstructionAwaitGen*>(instruction);
1771 if (instruction->id == IrInstGenIdAwait) {
1772 IrInstGenAwait *await = reinterpret_cast<IrInstGenAwait*>(instruction);
17771773 if (await->result_loc != nullptr) {
17781774 return get_handle_value(g, ir_llvm_value(g, await->result_loc),
17791775 await->result_loc->value->type->data.pointer.child_type, await->result_loc->value->type);
......@@ -1856,9 +1852,9 @@ static bool iter_function_params_c_abi(CodeGen *g, ZigType *fn_type, FnWalk *fn_
18561852 case FnWalkIdCall: {
18571853 if (src_i >= fn_walk->data.call.inst->arg_count)
18581854 return false;
1859 IrInstruction *arg = fn_walk->data.call.inst->args[src_i];
1855 IrInstGen *arg = fn_walk->data.call.inst->args[src_i];
18601856 ty = arg->value->type;
1861 source_node = arg->source_node;
1857 source_node = arg->base.source_node;
18621858 val = ir_llvm_value(g, arg);
18631859 break;
18641860 }
......@@ -2091,10 +2087,10 @@ void walk_function_params(CodeGen *g, ZigType *fn_type, FnWalk *fn_walk) {
20912087 return;
20922088 }
20932089 if (fn_walk->id == FnWalkIdCall) {
2094 IrInstructionCallGen *instruction = fn_walk->data.call.inst;
2090 IrInstGenCall *instruction = fn_walk->data.call.inst;
20952091 bool is_var_args = fn_walk->data.call.is_var_args;
20962092 for (size_t call_i = 0; call_i < instruction->arg_count; call_i += 1) {
2097 IrInstruction *param_instruction = instruction->args[call_i];
2093 IrInstGen *param_instruction = instruction->args[call_i];
20982094 ZigType *param_type = param_instruction->value->type;
20992095 if (is_var_args || type_has_bits(param_type)) {
21002096 LLVMValueRef param_value = ir_llvm_value(g, param_instruction);
......@@ -2309,14 +2305,14 @@ static LLVMValueRef get_merge_err_ret_traces_fn_val(CodeGen *g) {
23092305 return fn_val;
23102306
23112307}
2312static LLVMValueRef ir_render_save_err_ret_addr(CodeGen *g, IrExecutable *executable,
2313 IrInstructionSaveErrRetAddr *save_err_ret_addr_instruction)
2308static LLVMValueRef ir_render_save_err_ret_addr(CodeGen *g, IrExecutableGen *executable,
2309 IrInstGenSaveErrRetAddr *save_err_ret_addr_instruction)
23142310{
23152311 assert(g->have_err_ret_tracing);
23162312
23172313 LLVMValueRef return_err_fn = get_return_err_fn(g);
23182314 bool is_llvm_alloca;
2319 LLVMValueRef my_err_trace_val = get_cur_err_ret_trace_val(g, save_err_ret_addr_instruction->base.scope,
2315 LLVMValueRef my_err_trace_val = get_cur_err_ret_trace_val(g, save_err_ret_addr_instruction->base.base.scope,
23202316 &is_llvm_alloca);
23212317 ZigLLVMBuildCall(g->builder, return_err_fn, &my_err_trace_val, 1,
23222318 get_llvm_cc(g, CallingConventionUnspecified), ZigLLVM_CallAttrAuto, "");
......@@ -2331,7 +2327,7 @@ static LLVMValueRef ir_render_save_err_ret_addr(CodeGen *g, IrExecutable *execut
23312327 return nullptr;
23322328}
23332329
2334static void gen_assert_resume_id(CodeGen *g, IrInstruction *source_instr, ResumeId resume_id, PanicMsgId msg_id,
2330static void gen_assert_resume_id(CodeGen *g, IrInstGen *source_instr, ResumeId resume_id, PanicMsgId msg_id,
23352331 LLVMBasicBlockRef end_bb)
23362332{
23372333 LLVMTypeRef usize_type_ref = g->builtin_types.entry_usize->llvm_type;
......@@ -2408,7 +2404,7 @@ static LLVMValueRef gen_maybe_atomic_op(CodeGen *g, LLVMAtomicRMWBinOp op, LLVMV
24082404 }
24092405}
24102406
2411static void gen_async_return(CodeGen *g, IrInstructionReturn *instruction) {
2407static void gen_async_return(CodeGen *g, IrInstGenReturn *instruction) {
24122408 LLVMTypeRef usize_type_ref = g->builtin_types.entry_usize->llvm_type;
24132409
24142410 ZigType *operand_type = (instruction->operand != nullptr) ? instruction->operand->value->type : nullptr;
......@@ -2487,7 +2483,7 @@ static void gen_async_return(CodeGen *g, IrInstructionReturn *instruction) {
24872483 frame_index_trace_arg(g, ret_type) + 1, "");
24882484 LLVMValueRef dest_trace_ptr = LLVMBuildLoad(g->builder, awaiter_trace_ptr_ptr, "");
24892485 bool is_llvm_alloca;
2490 LLVMValueRef my_err_trace_val = get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca);
2486 LLVMValueRef my_err_trace_val = get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca);
24912487 LLVMValueRef args[] = { dest_trace_ptr, my_err_trace_val };
24922488 ZigLLVMBuildCall(g->builder, get_merge_err_ret_traces_fn_val(g), args, 2,
24932489 get_llvm_cc(g, CallingConventionUnspecified), ZigLLVM_CallAttrAuto, "");
......@@ -2502,7 +2498,7 @@ static void gen_async_return(CodeGen *g, IrInstructionReturn *instruction) {
25022498 LLVMBuildRetVoid(g->builder);
25032499}
25042500
2505static LLVMValueRef ir_render_return(CodeGen *g, IrExecutable *executable, IrInstructionReturn *instruction) {
2501static LLVMValueRef ir_render_return(CodeGen *g, IrExecutableGen *executable, IrInstGenReturn *instruction) {
25062502 if (fn_is_async(g->cur_fn)) {
25072503 gen_async_return(g, instruction);
25082504 return nullptr;
......@@ -2843,12 +2839,12 @@ static LLVMValueRef gen_rem(CodeGen *g, bool want_runtime_safety, bool want_fast
28432839
28442840}
28452841
2846static LLVMValueRef ir_render_bin_op(CodeGen *g, IrExecutable *executable,
2847 IrInstructionBinOp *bin_op_instruction)
2842static LLVMValueRef ir_render_bin_op(CodeGen *g, IrExecutableGen *executable,
2843 IrInstGenBinOp *bin_op_instruction)
28482844{
28492845 IrBinOp op_id = bin_op_instruction->op_id;
2850 IrInstruction *op1 = bin_op_instruction->op1;
2851 IrInstruction *op2 = bin_op_instruction->op2;
2846 IrInstGen *op1 = bin_op_instruction->op1;
2847 IrInstGen *op2 = bin_op_instruction->op2;
28522848
28532849 ZigType *operand_type = op1->value->type;
28542850 ZigType *scalar_type = (operand_type->id == ZigTypeIdVector) ? operand_type->data.vector.elem_type : operand_type;
......@@ -3053,8 +3049,8 @@ static void add_error_range_check(CodeGen *g, ZigType *err_set_type, ZigType *in
30533049 }
30543050}
30553051
3056static LLVMValueRef ir_render_resize_slice(CodeGen *g, IrExecutable *executable,
3057 IrInstructionResizeSlice *instruction)
3052static LLVMValueRef ir_render_resize_slice(CodeGen *g, IrExecutableGen *executable,
3053 IrInstGenResizeSlice *instruction)
30583054{
30593055 ZigType *actual_type = instruction->operand->value->type;
30603056 ZigType *wanted_type = instruction->base.value->type;
......@@ -3121,11 +3117,17 @@ static LLVMValueRef ir_render_resize_slice(CodeGen *g, IrExecutable *executable,
31213117 return result_loc;
31223118}
31233119
3124static LLVMValueRef ir_render_cast(CodeGen *g, IrExecutable *executable,
3125 IrInstructionCast *cast_instruction)
3120static LLVMValueRef ir_render_cast(CodeGen *g, IrExecutableGen *executable,
3121 IrInstGenCast *cast_instruction)
31263122{
3123 Error err;
31273124 ZigType *actual_type = cast_instruction->value->value->type;
31283125 ZigType *wanted_type = cast_instruction->base.value->type;
3126 bool wanted_type_has_bits;
3127 if ((err = type_has_bits2(g, wanted_type, &wanted_type_has_bits)))
3128 codegen_report_errors_and_exit(g);
3129 if (!wanted_type_has_bits)
3130 return nullptr;
31293131 LLVMValueRef expr_val = ir_llvm_value(g, cast_instruction->value);
31303132 ir_assert(expr_val, &cast_instruction->base);
31313133
......@@ -3199,8 +3201,8 @@ static LLVMValueRef ir_render_cast(CodeGen *g, IrExecutable *executable,
31993201 zig_unreachable();
32003202}
32013203
3202static LLVMValueRef ir_render_ptr_of_array_to_slice(CodeGen *g, IrExecutable *executable,
3203 IrInstructionPtrOfArrayToSlice *instruction)
3204static LLVMValueRef ir_render_ptr_of_array_to_slice(CodeGen *g, IrExecutableGen *executable,
3205 IrInstGenPtrOfArrayToSlice *instruction)
32043206{
32053207 ZigType *actual_type = instruction->operand->value->type;
32063208 ZigType *slice_type = instruction->base.value->type;
......@@ -3236,8 +3238,8 @@ static LLVMValueRef ir_render_ptr_of_array_to_slice(CodeGen *g, IrExecutable *ex
32363238 return result_loc;
32373239}
32383240
3239static LLVMValueRef ir_render_ptr_cast(CodeGen *g, IrExecutable *executable,
3240 IrInstructionPtrCastGen *instruction)
3241static LLVMValueRef ir_render_ptr_cast(CodeGen *g, IrExecutableGen *executable,
3242 IrInstGenPtrCast *instruction)
32413243{
32423244 ZigType *wanted_type = instruction->base.value->type;
32433245 if (!type_has_bits(wanted_type)) {
......@@ -3262,8 +3264,8 @@ static LLVMValueRef ir_render_ptr_cast(CodeGen *g, IrExecutable *executable,
32623264 return result_ptr;
32633265}
32643266
3265static LLVMValueRef ir_render_bit_cast(CodeGen *g, IrExecutable *executable,
3266 IrInstructionBitCastGen *instruction)
3267static LLVMValueRef ir_render_bit_cast(CodeGen *g, IrExecutableGen *executable,
3268 IrInstGenBitCast *instruction)
32673269{
32683270 ZigType *wanted_type = instruction->base.value->type;
32693271 ZigType *actual_type = instruction->operand->value->type;
......@@ -3286,8 +3288,8 @@ static LLVMValueRef ir_render_bit_cast(CodeGen *g, IrExecutable *executable,
32863288 }
32873289}
32883290
3289static LLVMValueRef ir_render_widen_or_shorten(CodeGen *g, IrExecutable *executable,
3290 IrInstructionWidenOrShorten *instruction)
3291static LLVMValueRef ir_render_widen_or_shorten(CodeGen *g, IrExecutableGen *executable,
3292 IrInstGenWidenOrShorten *instruction)
32913293{
32923294 ZigType *actual_type = instruction->target->value->type;
32933295 // TODO instead of this logic, use the Noop instruction to change the type from
......@@ -3303,7 +3305,7 @@ static LLVMValueRef ir_render_widen_or_shorten(CodeGen *g, IrExecutable *executa
33033305 instruction->base.value->type, target_val);
33043306}
33053307
3306static LLVMValueRef ir_render_int_to_ptr(CodeGen *g, IrExecutable *executable, IrInstructionIntToPtr *instruction) {
3308static LLVMValueRef ir_render_int_to_ptr(CodeGen *g, IrExecutableGen *executable, IrInstGenIntToPtr *instruction) {
33073309 ZigType *wanted_type = instruction->base.value->type;
33083310 LLVMValueRef target_val = ir_llvm_value(g, instruction->target);
33093311
......@@ -3341,13 +3343,13 @@ static LLVMValueRef ir_render_int_to_ptr(CodeGen *g, IrExecutable *executable, I
33413343 return LLVMBuildIntToPtr(g->builder, target_val, get_llvm_type(g, wanted_type), "");
33423344}
33433345
3344static LLVMValueRef ir_render_ptr_to_int(CodeGen *g, IrExecutable *executable, IrInstructionPtrToInt *instruction) {
3346static LLVMValueRef ir_render_ptr_to_int(CodeGen *g, IrExecutableGen *executable, IrInstGenPtrToInt *instruction) {
33453347 ZigType *wanted_type = instruction->base.value->type;
33463348 LLVMValueRef target_val = ir_llvm_value(g, instruction->target);
33473349 return LLVMBuildPtrToInt(g->builder, target_val, get_llvm_type(g, wanted_type), "");
33483350}
33493351
3350static LLVMValueRef ir_render_int_to_enum(CodeGen *g, IrExecutable *executable, IrInstructionIntToEnum *instruction) {
3352static LLVMValueRef ir_render_int_to_enum(CodeGen *g, IrExecutableGen *executable, IrInstGenIntToEnum *instruction) {
33513353 ZigType *wanted_type = instruction->base.value->type;
33523354 assert(wanted_type->id == ZigTypeIdEnum);
33533355 ZigType *tag_int_type = wanted_type->data.enumeration.tag_int_type;
......@@ -3374,7 +3376,7 @@ static LLVMValueRef ir_render_int_to_enum(CodeGen *g, IrExecutable *executable,
33743376 return tag_int_value;
33753377}
33763378
3377static LLVMValueRef ir_render_int_to_err(CodeGen *g, IrExecutable *executable, IrInstructionIntToErr *instruction) {
3379static LLVMValueRef ir_render_int_to_err(CodeGen *g, IrExecutableGen *executable, IrInstGenIntToErr *instruction) {
33783380 ZigType *wanted_type = instruction->base.value->type;
33793381 assert(wanted_type->id == ZigTypeIdErrorSet);
33803382
......@@ -3391,7 +3393,7 @@ static LLVMValueRef ir_render_int_to_err(CodeGen *g, IrExecutable *executable, I
33913393 return gen_widen_or_shorten(g, false, actual_type, g->err_tag_type, target_val);
33923394}
33933395
3394static LLVMValueRef ir_render_err_to_int(CodeGen *g, IrExecutable *executable, IrInstructionErrToInt *instruction) {
3396static LLVMValueRef ir_render_err_to_int(CodeGen *g, IrExecutableGen *executable, IrInstGenErrToInt *instruction) {
33953397 ZigType *wanted_type = instruction->base.value->type;
33963398 assert(wanted_type->id == ZigTypeIdInt);
33973399 assert(!wanted_type->data.integral.is_signed);
......@@ -3417,8 +3419,8 @@ static LLVMValueRef ir_render_err_to_int(CodeGen *g, IrExecutable *executable, I
34173419 }
34183420}
34193421
3420static LLVMValueRef ir_render_unreachable(CodeGen *g, IrExecutable *executable,
3421 IrInstructionUnreachable *unreachable_instruction)
3422static LLVMValueRef ir_render_unreachable(CodeGen *g, IrExecutableGen *executable,
3423 IrInstGenUnreachable *unreachable_instruction)
34223424{
34233425 if (ir_want_runtime_safety(g, &unreachable_instruction->base)) {
34243426 gen_safety_crash(g, PanicMsgIdUnreachable);
......@@ -3428,8 +3430,8 @@ static LLVMValueRef ir_render_unreachable(CodeGen *g, IrExecutable *executable,
34283430 return nullptr;
34293431}
34303432
3431static LLVMValueRef ir_render_cond_br(CodeGen *g, IrExecutable *executable,
3432 IrInstructionCondBr *cond_br_instruction)
3433static LLVMValueRef ir_render_cond_br(CodeGen *g, IrExecutableGen *executable,
3434 IrInstGenCondBr *cond_br_instruction)
34333435{
34343436 LLVMBuildCondBr(g->builder,
34353437 ir_llvm_value(g, cond_br_instruction->condition),
......@@ -3438,51 +3440,56 @@ static LLVMValueRef ir_render_cond_br(CodeGen *g, IrExecutable *executable,
34383440 return nullptr;
34393441}
34403442
3441static LLVMValueRef ir_render_br(CodeGen *g, IrExecutable *executable, IrInstructionBr *br_instruction) {
3443static LLVMValueRef ir_render_br(CodeGen *g, IrExecutableGen *executable, IrInstGenBr *br_instruction) {
34423444 LLVMBuildBr(g->builder, br_instruction->dest_block->llvm_block);
34433445 return nullptr;
34443446}
34453447
3446static LLVMValueRef ir_render_un_op(CodeGen *g, IrExecutable *executable, IrInstructionUnOp *un_op_instruction) {
3447 IrUnOp op_id = un_op_instruction->op_id;
3448 LLVMValueRef expr = ir_llvm_value(g, un_op_instruction->value);
3449 ZigType *operand_type = un_op_instruction->value->value->type;
3450 ZigType *scalar_type = (operand_type->id == ZigTypeIdVector) ? operand_type->data.vector.elem_type : operand_type;
3451
3452 switch (op_id) {
3453 case IrUnOpInvalid:
3454 case IrUnOpOptional:
3455 case IrUnOpDereference:
3456 zig_unreachable();
3457 case IrUnOpNegation:
3458 case IrUnOpNegationWrap:
3459 {
3460 if (scalar_type->id == ZigTypeIdFloat) {
3461 ZigLLVMSetFastMath(g->builder, ir_want_fast_math(g, &un_op_instruction->base));
3462 return LLVMBuildFNeg(g->builder, expr, "");
3463 } else if (scalar_type->id == ZigTypeIdInt) {
3464 if (op_id == IrUnOpNegationWrap) {
3465 return LLVMBuildNeg(g->builder, expr, "");
3466 } else if (ir_want_runtime_safety(g, &un_op_instruction->base)) {
3467 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(expr));
3468 return gen_overflow_op(g, operand_type, AddSubMulSub, zero, expr);
3469 } else if (scalar_type->data.integral.is_signed) {
3470 return LLVMBuildNSWNeg(g->builder, expr, "");
3471 } else {
3472 return LLVMBuildNUWNeg(g->builder, expr, "");
3473 }
3474 } else {
3475 zig_unreachable();
3476 }
3477 }
3478 case IrUnOpBinNot:
3479 return LLVMBuildNot(g->builder, expr, "");
3448static LLVMValueRef ir_render_binary_not(CodeGen *g, IrExecutableGen *executable,
3449 IrInstGenBinaryNot *inst)
3450{
3451 LLVMValueRef operand = ir_llvm_value(g, inst->operand);
3452 return LLVMBuildNot(g->builder, operand, "");
3453}
3454
3455static LLVMValueRef ir_gen_negation(CodeGen *g, IrInstGen *inst, IrInstGen *operand, bool wrapping) {
3456 LLVMValueRef llvm_operand = ir_llvm_value(g, operand);
3457 ZigType *operand_type = operand->value->type;
3458 ZigType *scalar_type = (operand_type->id == ZigTypeIdVector) ?
3459 operand_type->data.vector.elem_type : operand_type;
3460
3461 if (scalar_type->id == ZigTypeIdFloat) {
3462 ZigLLVMSetFastMath(g->builder, ir_want_fast_math(g, inst));
3463 return LLVMBuildFNeg(g->builder, llvm_operand, "");
3464 } else if (scalar_type->id == ZigTypeIdInt) {
3465 if (wrapping) {
3466 return LLVMBuildNeg(g->builder, llvm_operand, "");
3467 } else if (ir_want_runtime_safety(g, inst)) {
3468 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(llvm_operand));
3469 return gen_overflow_op(g, operand_type, AddSubMulSub, zero, llvm_operand);
3470 } else if (scalar_type->data.integral.is_signed) {
3471 return LLVMBuildNSWNeg(g->builder, llvm_operand, "");
3472 } else {
3473 return LLVMBuildNUWNeg(g->builder, llvm_operand, "");
3474 }
3475 } else {
3476 zig_unreachable();
34803477 }
3478}
34813479
3482 zig_unreachable();
3480static LLVMValueRef ir_render_negation(CodeGen *g, IrExecutableGen *executable,
3481 IrInstGenNegation *inst)
3482{
3483 return ir_gen_negation(g, &inst->base, inst->operand, false);
3484}
3485
3486static LLVMValueRef ir_render_negation_wrapping(CodeGen *g, IrExecutableGen *executable,
3487 IrInstGenNegationWrapping *inst)
3488{
3489 return ir_gen_negation(g, &inst->base, inst->operand, true);
34833490}
34843491
3485static LLVMValueRef ir_render_bool_not(CodeGen *g, IrExecutable *executable, IrInstructionBoolNot *instruction) {
3492static LLVMValueRef ir_render_bool_not(CodeGen *g, IrExecutableGen *executable, IrInstGenBoolNot *instruction) {
34863493 LLVMValueRef value = ir_llvm_value(g, instruction->value);
34873494 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(value));
34883495 return LLVMBuildICmp(g->builder, LLVMIntEQ, value, zero, "");
......@@ -3496,14 +3503,15 @@ static void render_decl_var(CodeGen *g, ZigVar *var) {
34963503 gen_var_debug_decl(g, var);
34973504}
34983505
3499static LLVMValueRef ir_render_decl_var(CodeGen *g, IrExecutable *executable, IrInstructionDeclVarGen *instruction) {
3506static LLVMValueRef ir_render_decl_var(CodeGen *g, IrExecutableGen *executable, IrInstGenDeclVar *instruction) {
35003507 instruction->var->ptr_instruction = instruction->var_ptr;
3508 instruction->var->did_the_decl_codegen = true;
35013509 render_decl_var(g, instruction->var);
35023510 return nullptr;
35033511}
35043512
3505static LLVMValueRef ir_render_load_ptr(CodeGen *g, IrExecutable *executable,
3506 IrInstructionLoadPtrGen *instruction)
3513static LLVMValueRef ir_render_load_ptr(CodeGen *g, IrExecutableGen *executable,
3514 IrInstGenLoadPtr *instruction)
35073515{
35083516 ZigType *child_type = instruction->base.value->type;
35093517 if (!type_has_bits(child_type))
......@@ -3705,7 +3713,7 @@ static void gen_undef_init(CodeGen *g, uint32_t ptr_align_bytes, ZigType *value_
37053713 }
37063714}
37073715
3708static LLVMValueRef ir_render_store_ptr(CodeGen *g, IrExecutable *executable, IrInstructionStorePtr *instruction) {
3716static LLVMValueRef ir_render_store_ptr(CodeGen *g, IrExecutableGen *executable, IrInstGenStorePtr *instruction) {
37093717 Error err;
37103718
37113719 ZigType *ptr_type = instruction->ptr->value->type;
......@@ -3715,7 +3723,7 @@ static LLVMValueRef ir_render_store_ptr(CodeGen *g, IrExecutable *executable, Ir
37153723 codegen_report_errors_and_exit(g);
37163724 if (!ptr_type_has_bits)
37173725 return nullptr;
3718 if (instruction->ptr->ref_count == 0) {
3726 if (instruction->ptr->base.ref_count == 0) {
37193727 // In this case, this StorePtr instruction should be elided. Something happened like this:
37203728 // var t = true;
37213729 // const x = if (t) Num.Two else unreachable;
......@@ -3737,8 +3745,8 @@ static LLVMValueRef ir_render_store_ptr(CodeGen *g, IrExecutable *executable, Ir
37373745 return nullptr;
37383746}
37393747
3740static LLVMValueRef ir_render_vector_store_elem(CodeGen *g, IrExecutable *executable,
3741 IrInstructionVectorStoreElem *instruction)
3748static LLVMValueRef ir_render_vector_store_elem(CodeGen *g, IrExecutableGen *executable,
3749 IrInstGenVectorStoreElem *instruction)
37423750{
37433751 LLVMValueRef vector_ptr = ir_llvm_value(g, instruction->vector_ptr);
37443752 LLVMValueRef index = ir_llvm_value(g, instruction->index);
......@@ -3750,7 +3758,7 @@ static LLVMValueRef ir_render_vector_store_elem(CodeGen *g, IrExecutable *execut
37503758 return nullptr;
37513759}
37523760
3753static LLVMValueRef ir_render_var_ptr(CodeGen *g, IrExecutable *executable, IrInstructionVarPtr *instruction) {
3761static LLVMValueRef ir_render_var_ptr(CodeGen *g, IrExecutableGen *executable, IrInstGenVarPtr *instruction) {
37543762 if (instruction->base.value->special != ConstValSpecialRuntime)
37553763 return ir_llvm_value(g, &instruction->base);
37563764 ZigVar *var = instruction->var;
......@@ -3762,8 +3770,8 @@ static LLVMValueRef ir_render_var_ptr(CodeGen *g, IrExecutable *executable, IrIn
37623770 }
37633771}
37643772
3765static LLVMValueRef ir_render_return_ptr(CodeGen *g, IrExecutable *executable,
3766 IrInstructionReturnPtr *instruction)
3773static LLVMValueRef ir_render_return_ptr(CodeGen *g, IrExecutableGen *executable,
3774 IrInstGenReturnPtr *instruction)
37673775{
37683776 if (!type_has_bits(instruction->base.value->type))
37693777 return nullptr;
......@@ -3771,7 +3779,7 @@ static LLVMValueRef ir_render_return_ptr(CodeGen *g, IrExecutable *executable,
37713779 return g->cur_ret_ptr;
37723780}
37733781
3774static LLVMValueRef ir_render_elem_ptr(CodeGen *g, IrExecutable *executable, IrInstructionElemPtr *instruction) {
3782static LLVMValueRef ir_render_elem_ptr(CodeGen *g, IrExecutableGen *executable, IrInstGenElemPtr *instruction) {
37753783 LLVMValueRef array_ptr_ptr = ir_llvm_value(g, instruction->array_ptr);
37763784 ZigType *array_ptr_type = instruction->array_ptr->value->type;
37773785 assert(array_ptr_type->id == ZigTypeIdPointer);
......@@ -3947,7 +3955,7 @@ static void render_async_spills(CodeGen *g) {
39473955 ZigType *frame_type = g->cur_fn->frame_type->data.frame.locals_struct;
39483956
39493957 for (size_t alloca_i = 0; alloca_i < g->cur_fn->alloca_gen_list.length; alloca_i += 1) {
3950 IrInstructionAllocaGen *instruction = g->cur_fn->alloca_gen_list.at(alloca_i);
3958 IrInstGenAlloca *instruction = g->cur_fn->alloca_gen_list.at(alloca_i);
39513959 if (instruction->field_index == SIZE_MAX)
39523960 continue;
39533961
......@@ -3966,7 +3974,7 @@ static void render_async_var_decls(CodeGen *g, Scope *scope) {
39663974 return;
39673975 case ScopeIdVarDecl: {
39683976 ZigVar *var = reinterpret_cast<ScopeVarDecl *>(scope)->var;
3969 if (var->ptr_instruction != nullptr) {
3977 if (var->did_the_decl_codegen) {
39703978 render_decl_var(g, var);
39713979 }
39723980 // fallthrough
......@@ -4014,7 +4022,7 @@ static void gen_init_stack_trace(CodeGen *g, LLVMValueRef trace_field_ptr, LLVMV
40144022 LLVMBuildStore(g->builder, LLVMConstInt(usize_type_ref, stack_trace_ptr_count, false), addrs_len_ptr);
40154023}
40164024
4017static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstructionCallGen *instruction) {
4025static LLVMValueRef ir_render_call(CodeGen *g, IrExecutableGen *executable, IrInstGenCall *instruction) {
40184026 LLVMTypeRef usize_type_ref = g->builtin_types.entry_usize->llvm_type;
40194027
40204028 LLVMValueRef fn_val;
......@@ -4149,7 +4157,7 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr
41494157 LLVMValueRef err_ret_trace_ptr_ptr = LLVMBuildStructGEP(g->builder, frame_result_loc,
41504158 frame_index_trace_arg(g, src_return_type) + 1, "");
41514159 bool is_llvm_alloca;
4152 LLVMValueRef my_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.scope,
4160 LLVMValueRef my_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.base.scope,
41534161 &is_llvm_alloca);
41544162 LLVMBuildStore(g->builder, my_err_ret_trace_val, err_ret_trace_ptr_ptr);
41554163 }
......@@ -4208,7 +4216,7 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr
42084216 gen_init_stack_trace(g, trace_field_ptr, addrs_field_ptr);
42094217
42104218 bool is_llvm_alloca;
4211 gen_param_values.append(get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca));
4219 gen_param_values.append(get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca));
42124220 }
42134221 }
42144222 } else {
......@@ -4217,7 +4225,7 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr
42174225 }
42184226 if (prefix_arg_err_ret_stack) {
42194227 bool is_llvm_alloca;
4220 gen_param_values.append(get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca));
4228 gen_param_values.append(get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca));
42214229 }
42224230 }
42234231 FnWalk fn_walk = {};
......@@ -4327,13 +4335,13 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr
43274335
43284336 LLVMPositionBuilderAtEnd(g->builder, call_bb);
43294337 gen_assert_resume_id(g, &instruction->base, ResumeIdReturn, PanicMsgIdResumedAnAwaitingFn, nullptr);
4330 render_async_var_decls(g, instruction->base.scope);
4338 render_async_var_decls(g, instruction->base.base.scope);
43314339
43324340 if (!type_has_bits(src_return_type))
43334341 return nullptr;
43344342
43354343 if (result_loc != nullptr) {
4336 if (instruction->result_loc->id == IrInstructionIdReturnPtr) {
4344 if (instruction->result_loc->id == IrInstGenIdReturnPtr) {
43374345 instruction->base.spill = nullptr;
43384346 return g->cur_ret_ptr;
43394347 } else {
......@@ -4393,8 +4401,8 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr
43934401 }
43944402}
43954403
4396static LLVMValueRef ir_render_struct_field_ptr(CodeGen *g, IrExecutable *executable,
4397 IrInstructionStructFieldPtr *instruction)
4404static LLVMValueRef ir_render_struct_field_ptr(CodeGen *g, IrExecutableGen *executable,
4405 IrInstGenStructFieldPtr *instruction)
43984406{
43994407 Error err;
44004408
......@@ -4444,8 +4452,8 @@ static LLVMValueRef ir_render_struct_field_ptr(CodeGen *g, IrExecutable *executa
44444452 return field_ptr_val;
44454453}
44464454
4447static LLVMValueRef ir_render_union_field_ptr(CodeGen *g, IrExecutable *executable,
4448 IrInstructionUnionFieldPtr *instruction)
4455static LLVMValueRef ir_render_union_field_ptr(CodeGen *g, IrExecutableGen *executable,
4456 IrInstGenUnionFieldPtr *instruction)
44494457{
44504458 if (instruction->base.value->special != ConstValSpecialRuntime)
44514459 return nullptr;
......@@ -4544,8 +4552,8 @@ static size_t find_asm_index(CodeGen *g, AstNode *node, AsmToken *tok, Buf *src_
45444552 return SIZE_MAX;
45454553}
45464554
4547static LLVMValueRef ir_render_asm_gen(CodeGen *g, IrExecutable *executable, IrInstructionAsmGen *instruction) {
4548 AstNode *asm_node = instruction->base.source_node;
4555static LLVMValueRef ir_render_asm_gen(CodeGen *g, IrExecutableGen *executable, IrInstGenAsm *instruction) {
4556 AstNode *asm_node = instruction->base.base.source_node;
45494557 assert(asm_node->type == NodeTypeAsmExpr);
45504558 AstNodeAsmExpr *asm_expr = &asm_node->data.asm_expr;
45514559
......@@ -4629,7 +4637,7 @@ static LLVMValueRef ir_render_asm_gen(CodeGen *g, IrExecutable *executable, IrIn
46294637 for (size_t i = 0; i < asm_expr->input_list.length; i += 1, total_index += 1, param_index += 1) {
46304638 AsmInput *asm_input = asm_expr->input_list.at(i);
46314639 buf_replace(asm_input->constraint, ',', '|');
4632 IrInstruction *ir_input = instruction->input_list[i];
4640 IrInstGen *ir_input = instruction->input_list[i];
46334641 buf_append_buf(&constraint_buf, asm_input->constraint);
46344642 if (total_index + 1 < total_constraint_count) {
46354643 buf_append_char(&constraint_buf, ',');
......@@ -4692,14 +4700,14 @@ static LLVMValueRef gen_non_null_bit(CodeGen *g, ZigType *maybe_type, LLVMValueR
46924700 return gen_load_untyped(g, maybe_field_ptr, 0, false, "");
46934701}
46944702
4695static LLVMValueRef ir_render_test_non_null(CodeGen *g, IrExecutable *executable,
4696 IrInstructionTestNonNull *instruction)
4703static LLVMValueRef ir_render_test_non_null(CodeGen *g, IrExecutableGen *executable,
4704 IrInstGenTestNonNull *instruction)
46974705{
46984706 return gen_non_null_bit(g, instruction->value->value->type, ir_llvm_value(g, instruction->value));
46994707}
47004708
4701static LLVMValueRef ir_render_optional_unwrap_ptr(CodeGen *g, IrExecutable *executable,
4702 IrInstructionOptionalUnwrapPtr *instruction)
4709static LLVMValueRef ir_render_optional_unwrap_ptr(CodeGen *g, IrExecutableGen *executable,
4710 IrInstGenOptionalUnwrapPtr *instruction)
47034711{
47044712 if (instruction->base.value->special != ConstValSpecialRuntime)
47054713 return nullptr;
......@@ -4723,6 +4731,10 @@ static LLVMValueRef ir_render_optional_unwrap_ptr(CodeGen *g, IrExecutable *exec
47234731 LLVMPositionBuilderAtEnd(g->builder, ok_block);
47244732 }
47254733 if (!type_has_bits(child_type)) {
4734 if (instruction->initializing) {
4735 LLVMValueRef non_null_bit = LLVMConstInt(LLVMInt1Type(), 1, false);
4736 gen_store_untyped(g, non_null_bit, base_ptr, 0, false);
4737 }
47264738 return nullptr;
47274739 } else {
47284740 bool is_scalar = !handle_is_ptr(maybe_type);
......@@ -4801,7 +4813,7 @@ static LLVMValueRef get_int_builtin_fn(CodeGen *g, ZigType *expr_type, BuiltinFn
48014813 return fn_val;
48024814}
48034815
4804static LLVMValueRef ir_render_clz(CodeGen *g, IrExecutable *executable, IrInstructionClz *instruction) {
4816static LLVMValueRef ir_render_clz(CodeGen *g, IrExecutableGen *executable, IrInstGenClz *instruction) {
48054817 ZigType *int_type = instruction->op->value->type;
48064818 LLVMValueRef fn_val = get_int_builtin_fn(g, int_type, BuiltinFnIdClz);
48074819 LLVMValueRef operand = ir_llvm_value(g, instruction->op);
......@@ -4813,7 +4825,7 @@ static LLVMValueRef ir_render_clz(CodeGen *g, IrExecutable *executable, IrInstru
48134825 return gen_widen_or_shorten(g, false, int_type, instruction->base.value->type, wrong_size_int);
48144826}
48154827
4816static LLVMValueRef ir_render_ctz(CodeGen *g, IrExecutable *executable, IrInstructionCtz *instruction) {
4828static LLVMValueRef ir_render_ctz(CodeGen *g, IrExecutableGen *executable, IrInstGenCtz *instruction) {
48174829 ZigType *int_type = instruction->op->value->type;
48184830 LLVMValueRef fn_val = get_int_builtin_fn(g, int_type, BuiltinFnIdCtz);
48194831 LLVMValueRef operand = ir_llvm_value(g, instruction->op);
......@@ -4825,7 +4837,7 @@ static LLVMValueRef ir_render_ctz(CodeGen *g, IrExecutable *executable, IrInstru
48254837 return gen_widen_or_shorten(g, false, int_type, instruction->base.value->type, wrong_size_int);
48264838}
48274839
4828static LLVMValueRef ir_render_shuffle_vector(CodeGen *g, IrExecutable *executable, IrInstructionShuffleVector *instruction) {
4840static LLVMValueRef ir_render_shuffle_vector(CodeGen *g, IrExecutableGen *executable, IrInstGenShuffleVector *instruction) {
48294841 uint64_t len_a = instruction->a->value->type->data.vector.len;
48304842 uint64_t len_mask = instruction->mask->value->type->data.vector.len;
48314843
......@@ -4834,7 +4846,7 @@ static LLVMValueRef ir_render_shuffle_vector(CodeGen *g, IrExecutable *executabl
48344846 // when changing code, so Zig uses negative numbers to index the
48354847 // second vector. These start at -1 and go down, and are easiest to use
48364848 // with the ~ operator. Here we convert between the two formats.
4837 IrInstruction *mask = instruction->mask;
4849 IrInstGen *mask = instruction->mask;
48384850 LLVMValueRef *values = allocate<LLVMValueRef>(len_mask);
48394851 for (uint64_t i = 0; i < len_mask; i++) {
48404852 if (mask->value->data.x_array.data.s_none.elements[i].special == ConstValSpecialUndef) {
......@@ -4855,7 +4867,7 @@ static LLVMValueRef ir_render_shuffle_vector(CodeGen *g, IrExecutable *executabl
48554867 llvm_mask_value, "");
48564868}
48574869
4858static LLVMValueRef ir_render_splat(CodeGen *g, IrExecutable *executable, IrInstructionSplatGen *instruction) {
4870static LLVMValueRef ir_render_splat(CodeGen *g, IrExecutableGen *executable, IrInstGenSplat *instruction) {
48594871 ZigType *result_type = instruction->base.value->type;
48604872 ir_assert(result_type->id == ZigTypeIdVector, &instruction->base);
48614873 uint32_t len = result_type->data.vector.len;
......@@ -4867,7 +4879,7 @@ static LLVMValueRef ir_render_splat(CodeGen *g, IrExecutable *executable, IrInst
48674879 return LLVMBuildShuffleVector(g->builder, op_vector, undef_vector, LLVMConstNull(mask_llvm_type), "");
48684880}
48694881
4870static LLVMValueRef ir_render_pop_count(CodeGen *g, IrExecutable *executable, IrInstructionPopCount *instruction) {
4882static LLVMValueRef ir_render_pop_count(CodeGen *g, IrExecutableGen *executable, IrInstGenPopCount *instruction) {
48714883 ZigType *int_type = instruction->op->value->type;
48724884 LLVMValueRef fn_val = get_int_builtin_fn(g, int_type, BuiltinFnIdPopCount);
48734885 LLVMValueRef operand = ir_llvm_value(g, instruction->op);
......@@ -4875,7 +4887,7 @@ static LLVMValueRef ir_render_pop_count(CodeGen *g, IrExecutable *executable, Ir
48754887 return gen_widen_or_shorten(g, false, int_type, instruction->base.value->type, wrong_size_int);
48764888}
48774889
4878static LLVMValueRef ir_render_switch_br(CodeGen *g, IrExecutable *executable, IrInstructionSwitchBr *instruction) {
4890static LLVMValueRef ir_render_switch_br(CodeGen *g, IrExecutableGen *executable, IrInstGenSwitchBr *instruction) {
48794891 ZigType *target_type = instruction->target_value->value->type;
48804892 LLVMBasicBlockRef else_block = instruction->else_block->llvm_block;
48814893
......@@ -4889,7 +4901,7 @@ static LLVMValueRef ir_render_switch_br(CodeGen *g, IrExecutable *executable, Ir
48894901 (unsigned)instruction->case_count);
48904902
48914903 for (size_t i = 0; i < instruction->case_count; i += 1) {
4892 IrInstructionSwitchBrCase *this_case = &instruction->cases[i];
4904 IrInstGenSwitchBrCase *this_case = &instruction->cases[i];
48934905
48944906 LLVMValueRef case_value = ir_llvm_value(g, this_case->value);
48954907 if (target_type->id == ZigTypeIdPointer) {
......@@ -4903,7 +4915,7 @@ static LLVMValueRef ir_render_switch_br(CodeGen *g, IrExecutable *executable, Ir
49034915 return nullptr;
49044916}
49054917
4906static LLVMValueRef ir_render_phi(CodeGen *g, IrExecutable *executable, IrInstructionPhi *instruction) {
4918static LLVMValueRef ir_render_phi(CodeGen *g, IrExecutableGen *executable, IrInstGenPhi *instruction) {
49074919 if (!type_has_bits(instruction->base.value->type))
49084920 return nullptr;
49094921
......@@ -4925,7 +4937,7 @@ static LLVMValueRef ir_render_phi(CodeGen *g, IrExecutable *executable, IrInstru
49254937 return phi;
49264938}
49274939
4928static LLVMValueRef ir_render_ref(CodeGen *g, IrExecutable *executable, IrInstructionRefGen *instruction) {
4940static LLVMValueRef ir_render_ref(CodeGen *g, IrExecutableGen *executable, IrInstGenRef *instruction) {
49294941 if (!type_has_bits(instruction->base.value->type)) {
49304942 return nullptr;
49314943 }
......@@ -4939,7 +4951,7 @@ static LLVMValueRef ir_render_ref(CodeGen *g, IrExecutable *executable, IrInstru
49394951 }
49404952}
49414953
4942static LLVMValueRef ir_render_err_name(CodeGen *g, IrExecutable *executable, IrInstructionErrName *instruction) {
4954static LLVMValueRef ir_render_err_name(CodeGen *g, IrExecutableGen *executable, IrInstGenErrName *instruction) {
49434955 assert(g->generate_error_name_table);
49444956
49454957 if (g->errors_by_index.length == 1) {
......@@ -5060,13 +5072,13 @@ static LLVMValueRef get_enum_tag_name_function(CodeGen *g, ZigType *enum_type) {
50605072 return fn_val;
50615073}
50625074
5063static LLVMValueRef ir_render_enum_tag_name(CodeGen *g, IrExecutable *executable,
5064 IrInstructionTagName *instruction)
5075static LLVMValueRef ir_render_enum_tag_name(CodeGen *g, IrExecutableGen *executable,
5076 IrInstGenTagName *instruction)
50655077{
50665078 ZigType *enum_type = instruction->target->value->type;
50675079 assert(enum_type->id == ZigTypeIdEnum);
50685080 if (enum_type->data.enumeration.non_exhaustive) {
5069 add_node_error(g, instruction->base.source_node,
5081 add_node_error(g, instruction->base.base.source_node,
50705082 buf_sprintf("TODO @tagName on non-exhaustive enum https://github.com/ziglang/zig/issues/3991"));
50715083 codegen_report_errors_and_exit(g);
50725084 }
......@@ -5078,8 +5090,8 @@ static LLVMValueRef ir_render_enum_tag_name(CodeGen *g, IrExecutable *executable
50785090 get_llvm_cc(g, CallingConventionUnspecified), ZigLLVM_CallAttrAuto, "");
50795091}
50805092
5081static LLVMValueRef ir_render_field_parent_ptr(CodeGen *g, IrExecutable *executable,
5082 IrInstructionFieldParentPtr *instruction)
5093static LLVMValueRef ir_render_field_parent_ptr(CodeGen *g, IrExecutableGen *executable,
5094 IrInstGenFieldParentPtr *instruction)
50835095{
50845096 ZigType *container_ptr_type = instruction->base.value->type;
50855097 assert(container_ptr_type->id == ZigTypeIdPointer);
......@@ -5105,7 +5117,7 @@ static LLVMValueRef ir_render_field_parent_ptr(CodeGen *g, IrExecutable *executa
51055117 }
51065118}
51075119
5108static LLVMValueRef ir_render_align_cast(CodeGen *g, IrExecutable *executable, IrInstructionAlignCast *instruction) {
5120static LLVMValueRef ir_render_align_cast(CodeGen *g, IrExecutableGen *executable, IrInstGenAlignCast *instruction) {
51095121 LLVMValueRef target_val = ir_llvm_value(g, instruction->target);
51105122 assert(target_val);
51115123
......@@ -5168,11 +5180,11 @@ static LLVMValueRef ir_render_align_cast(CodeGen *g, IrExecutable *executable, I
51685180 return target_val;
51695181}
51705182
5171static LLVMValueRef ir_render_error_return_trace(CodeGen *g, IrExecutable *executable,
5172 IrInstructionErrorReturnTrace *instruction)
5183static LLVMValueRef ir_render_error_return_trace(CodeGen *g, IrExecutableGen *executable,
5184 IrInstGenErrorReturnTrace *instruction)
51735185{
51745186 bool is_llvm_alloca;
5175 LLVMValueRef cur_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca);
5187 LLVMValueRef cur_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca);
51765188 if (cur_err_ret_trace_val == nullptr) {
51775189 return LLVMConstNull(get_llvm_type(g, ptr_to_stack_trace_type(g)));
51785190 }
......@@ -5210,7 +5222,7 @@ static enum ZigLLVM_AtomicRMWBinOp to_ZigLLVMAtomicRMWBinOp(AtomicRmwOp op, bool
52105222 zig_unreachable();
52115223}
52125224
5213static LLVMValueRef ir_render_cmpxchg(CodeGen *g, IrExecutable *executable, IrInstructionCmpxchgGen *instruction) {
5225static LLVMValueRef ir_render_cmpxchg(CodeGen *g, IrExecutableGen *executable, IrInstGenCmpxchg *instruction) {
52145226 LLVMValueRef ptr_val = ir_llvm_value(g, instruction->ptr);
52155227 LLVMValueRef cmp_val = ir_llvm_value(g, instruction->cmp_value);
52165228 LLVMValueRef new_val = ir_llvm_value(g, instruction->new_value);
......@@ -5251,13 +5263,13 @@ static LLVMValueRef ir_render_cmpxchg(CodeGen *g, IrExecutable *executable, IrIn
52515263 return result_loc;
52525264}
52535265
5254static LLVMValueRef ir_render_fence(CodeGen *g, IrExecutable *executable, IrInstructionFence *instruction) {
5266static LLVMValueRef ir_render_fence(CodeGen *g, IrExecutableGen *executable, IrInstGenFence *instruction) {
52555267 LLVMAtomicOrdering atomic_order = to_LLVMAtomicOrdering(instruction->order);
52565268 LLVMBuildFence(g->builder, atomic_order, false, "");
52575269 return nullptr;
52585270}
52595271
5260static LLVMValueRef ir_render_truncate(CodeGen *g, IrExecutable *executable, IrInstructionTruncate *instruction) {
5272static LLVMValueRef ir_render_truncate(CodeGen *g, IrExecutableGen *executable, IrInstGenTruncate *instruction) {
52615273 LLVMValueRef target_val = ir_llvm_value(g, instruction->target);
52625274 ZigType *dest_type = instruction->base.value->type;
52635275 ZigType *src_type = instruction->target->value->type;
......@@ -5272,7 +5284,7 @@ static LLVMValueRef ir_render_truncate(CodeGen *g, IrExecutable *executable, IrI
52725284 }
52735285}
52745286
5275static LLVMValueRef ir_render_memset(CodeGen *g, IrExecutable *executable, IrInstructionMemset *instruction) {
5287static LLVMValueRef ir_render_memset(CodeGen *g, IrExecutableGen *executable, IrInstGenMemset *instruction) {
52765288 LLVMValueRef dest_ptr = ir_llvm_value(g, instruction->dest_ptr);
52775289 LLVMValueRef len_val = ir_llvm_value(g, instruction->count);
52785290
......@@ -5284,7 +5296,7 @@ static LLVMValueRef ir_render_memset(CodeGen *g, IrExecutable *executable, IrIns
52845296
52855297 bool val_is_undef = value_is_all_undef(g, instruction->byte->value);
52865298 LLVMValueRef fill_char;
5287 if (val_is_undef && ir_want_runtime_safety_scope(g, instruction->base.scope)) {
5299 if (val_is_undef && ir_want_runtime_safety_scope(g, instruction->base.base.scope)) {
52885300 fill_char = LLVMConstInt(LLVMInt8Type(), 0xaa, false);
52895301 } else {
52905302 fill_char = ir_llvm_value(g, instruction->byte);
......@@ -5298,7 +5310,7 @@ static LLVMValueRef ir_render_memset(CodeGen *g, IrExecutable *executable, IrIns
52985310 return nullptr;
52995311}
53005312
5301static LLVMValueRef ir_render_memcpy(CodeGen *g, IrExecutable *executable, IrInstructionMemcpy *instruction) {
5313static LLVMValueRef ir_render_memcpy(CodeGen *g, IrExecutableGen *executable, IrInstGenMemcpy *instruction) {
53025314 LLVMValueRef dest_ptr = ir_llvm_value(g, instruction->dest_ptr);
53035315 LLVMValueRef src_ptr = ir_llvm_value(g, instruction->src_ptr);
53045316 LLVMValueRef len_val = ir_llvm_value(g, instruction->count);
......@@ -5320,7 +5332,7 @@ static LLVMValueRef ir_render_memcpy(CodeGen *g, IrExecutable *executable, IrIns
53205332 return nullptr;
53215333}
53225334
5323static LLVMValueRef ir_render_slice(CodeGen *g, IrExecutable *executable, IrInstructionSliceGen *instruction) {
5335static LLVMValueRef ir_render_slice(CodeGen *g, IrExecutableGen *executable, IrInstGenSlice *instruction) {
53245336 LLVMValueRef array_ptr_ptr = ir_llvm_value(g, instruction->ptr);
53255337 ZigType *array_ptr_type = instruction->ptr->value->type;
53265338 assert(array_ptr_type->id == ZigTypeIdPointer);
......@@ -5482,13 +5494,13 @@ static LLVMValueRef get_trap_fn_val(CodeGen *g) {
54825494}
54835495
54845496
5485static LLVMValueRef ir_render_breakpoint(CodeGen *g, IrExecutable *executable, IrInstructionBreakpoint *instruction) {
5497static LLVMValueRef ir_render_breakpoint(CodeGen *g, IrExecutableGen *executable, IrInstGenBreakpoint *instruction) {
54865498 LLVMBuildCall(g->builder, get_trap_fn_val(g), nullptr, 0, "");
54875499 return nullptr;
54885500}
54895501
5490static LLVMValueRef ir_render_return_address(CodeGen *g, IrExecutable *executable,
5491 IrInstructionReturnAddress *instruction)
5502static LLVMValueRef ir_render_return_address(CodeGen *g, IrExecutableGen *executable,
5503 IrInstGenReturnAddress *instruction)
54925504{
54935505 LLVMValueRef zero = LLVMConstNull(g->builtin_types.entry_i32->llvm_type);
54945506 LLVMValueRef ptr_val = LLVMBuildCall(g->builder, get_return_address_fn_val(g), &zero, 1, "");
......@@ -5509,19 +5521,19 @@ static LLVMValueRef get_frame_address_fn_val(CodeGen *g) {
55095521 return g->frame_address_fn_val;
55105522}
55115523
5512static LLVMValueRef ir_render_frame_address(CodeGen *g, IrExecutable *executable,
5513 IrInstructionFrameAddress *instruction)
5524static LLVMValueRef ir_render_frame_address(CodeGen *g, IrExecutableGen *executable,
5525 IrInstGenFrameAddress *instruction)
55145526{
55155527 LLVMValueRef zero = LLVMConstNull(g->builtin_types.entry_i32->llvm_type);
55165528 LLVMValueRef ptr_val = LLVMBuildCall(g->builder, get_frame_address_fn_val(g), &zero, 1, "");
55175529 return LLVMBuildPtrToInt(g->builder, ptr_val, g->builtin_types.entry_usize->llvm_type, "");
55185530}
55195531
5520static LLVMValueRef ir_render_handle(CodeGen *g, IrExecutable *executable, IrInstructionFrameHandle *instruction) {
5532static LLVMValueRef ir_render_handle(CodeGen *g, IrExecutableGen *executable, IrInstGenFrameHandle *instruction) {
55215533 return g->cur_frame_ptr;
55225534}
55235535
5524static LLVMValueRef render_shl_with_overflow(CodeGen *g, IrInstructionOverflowOp *instruction) {
5536static LLVMValueRef render_shl_with_overflow(CodeGen *g, IrInstGenOverflowOp *instruction) {
55255537 ZigType *int_type = instruction->result_ptr_type;
55265538 assert(int_type->id == ZigTypeIdInt);
55275539
......@@ -5546,7 +5558,7 @@ static LLVMValueRef render_shl_with_overflow(CodeGen *g, IrInstructionOverflowOp
55465558 return overflow_bit;
55475559}
55485560
5549static LLVMValueRef ir_render_overflow_op(CodeGen *g, IrExecutable *executable, IrInstructionOverflowOp *instruction) {
5561static LLVMValueRef ir_render_overflow_op(CodeGen *g, IrExecutableGen *executable, IrInstGenOverflowOp *instruction) {
55505562 AddSubMul add_sub_mul;
55515563 switch (instruction->op) {
55525564 case IrOverflowOpAdd:
......@@ -5584,7 +5596,7 @@ static LLVMValueRef ir_render_overflow_op(CodeGen *g, IrExecutable *executable,
55845596 return overflow_bit;
55855597}
55865598
5587static LLVMValueRef ir_render_test_err(CodeGen *g, IrExecutable *executable, IrInstructionTestErrGen *instruction) {
5599static LLVMValueRef ir_render_test_err(CodeGen *g, IrExecutableGen *executable, IrInstGenTestErr *instruction) {
55885600 ZigType *err_union_type = instruction->err_union->value->type;
55895601 ZigType *payload_type = err_union_type->data.error_union.payload_type;
55905602 LLVMValueRef err_union_handle = ir_llvm_value(g, instruction->err_union);
......@@ -5601,8 +5613,8 @@ static LLVMValueRef ir_render_test_err(CodeGen *g, IrExecutable *executable, IrI
56015613 return LLVMBuildICmp(g->builder, LLVMIntNE, err_val, zero, "");
56025614}
56035615
5604static LLVMValueRef ir_render_unwrap_err_code(CodeGen *g, IrExecutable *executable,
5605 IrInstructionUnwrapErrCode *instruction)
5616static LLVMValueRef ir_render_unwrap_err_code(CodeGen *g, IrExecutableGen *executable,
5617 IrInstGenUnwrapErrCode *instruction)
56065618{
56075619 if (instruction->base.value->special != ConstValSpecialRuntime)
56085620 return nullptr;
......@@ -5621,8 +5633,8 @@ static LLVMValueRef ir_render_unwrap_err_code(CodeGen *g, IrExecutable *executab
56215633 }
56225634}
56235635
5624static LLVMValueRef ir_render_unwrap_err_payload(CodeGen *g, IrExecutable *executable,
5625 IrInstructionUnwrapErrPayload *instruction)
5636static LLVMValueRef ir_render_unwrap_err_payload(CodeGen *g, IrExecutableGen *executable,
5637 IrInstGenUnwrapErrPayload *instruction)
56265638{
56275639 Error err;
56285640
......@@ -5665,7 +5677,7 @@ static LLVMValueRef ir_render_unwrap_err_payload(CodeGen *g, IrExecutable *execu
56655677 LLVMBuildCondBr(g->builder, cond_val, ok_block, err_block);
56665678
56675679 LLVMPositionBuilderAtEnd(g->builder, err_block);
5668 gen_safety_crash_for_err(g, err_val, instruction->base.scope);
5680 gen_safety_crash_for_err(g, err_val, instruction->base.base.scope);
56695681
56705682 LLVMPositionBuilderAtEnd(g->builder, ok_block);
56715683 }
......@@ -5682,7 +5694,7 @@ static LLVMValueRef ir_render_unwrap_err_payload(CodeGen *g, IrExecutable *execu
56825694 }
56835695}
56845696
5685static LLVMValueRef ir_render_optional_wrap(CodeGen *g, IrExecutable *executable, IrInstructionOptionalWrap *instruction) {
5697static LLVMValueRef ir_render_optional_wrap(CodeGen *g, IrExecutableGen *executable, IrInstGenOptionalWrap *instruction) {
56865698 ZigType *wanted_type = instruction->base.value->type;
56875699
56885700 assert(wanted_type->id == ZigTypeIdOptional);
......@@ -5718,7 +5730,7 @@ static LLVMValueRef ir_render_optional_wrap(CodeGen *g, IrExecutable *executable
57185730 return result_loc;
57195731}
57205732
5721static LLVMValueRef ir_render_err_wrap_code(CodeGen *g, IrExecutable *executable, IrInstructionErrWrapCode *instruction) {
5733static LLVMValueRef ir_render_err_wrap_code(CodeGen *g, IrExecutableGen *executable, IrInstGenErrWrapCode *instruction) {
57225734 ZigType *wanted_type = instruction->base.value->type;
57235735
57245736 assert(wanted_type->id == ZigTypeIdErrorUnion);
......@@ -5738,7 +5750,7 @@ static LLVMValueRef ir_render_err_wrap_code(CodeGen *g, IrExecutable *executable
57385750 return result_loc;
57395751}
57405752
5741static LLVMValueRef ir_render_err_wrap_payload(CodeGen *g, IrExecutable *executable, IrInstructionErrWrapPayload *instruction) {
5753static LLVMValueRef ir_render_err_wrap_payload(CodeGen *g, IrExecutableGen *executable, IrInstGenErrWrapPayload *instruction) {
57425754 ZigType *wanted_type = instruction->base.value->type;
57435755
57445756 assert(wanted_type->id == ZigTypeIdErrorUnion);
......@@ -5769,7 +5781,7 @@ static LLVMValueRef ir_render_err_wrap_payload(CodeGen *g, IrExecutable *executa
57695781 return result_loc;
57705782}
57715783
5772static LLVMValueRef ir_render_union_tag(CodeGen *g, IrExecutable *executable, IrInstructionUnionTag *instruction) {
5784static LLVMValueRef ir_render_union_tag(CodeGen *g, IrExecutableGen *executable, IrInstGenUnionTag *instruction) {
57735785 ZigType *union_type = instruction->value->value->type;
57745786
57755787 ZigType *tag_type = union_type->data.unionation.tag_type;
......@@ -5787,15 +5799,15 @@ static LLVMValueRef ir_render_union_tag(CodeGen *g, IrExecutable *executable, Ir
57875799 return get_handle_value(g, tag_field_ptr, tag_type, ptr_type);
57885800}
57895801
5790static LLVMValueRef ir_render_panic(CodeGen *g, IrExecutable *executable, IrInstructionPanic *instruction) {
5802static LLVMValueRef ir_render_panic(CodeGen *g, IrExecutableGen *executable, IrInstGenPanic *instruction) {
57915803 bool is_llvm_alloca;
5792 LLVMValueRef err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca);
5804 LLVMValueRef err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca);
57935805 gen_panic(g, ir_llvm_value(g, instruction->msg), err_ret_trace_val, is_llvm_alloca);
57945806 return nullptr;
57955807}
57965808
5797static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, IrExecutable *executable,
5798 IrInstructionAtomicRmw *instruction)
5809static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, IrExecutableGen *executable,
5810 IrInstGenAtomicRmw *instruction)
57995811{
58005812 bool is_signed;
58015813 ZigType *operand_type = instruction->operand->value->type;
......@@ -5805,8 +5817,8 @@ static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, IrExecutable *executable,
58055817 } else {
58065818 is_signed = false;
58075819 }
5808 enum ZigLLVM_AtomicRMWBinOp op = to_ZigLLVMAtomicRMWBinOp(instruction->resolved_op, is_signed, is_float);
5809 LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->resolved_ordering);
5820 enum ZigLLVM_AtomicRMWBinOp op = to_ZigLLVMAtomicRMWBinOp(instruction->op, is_signed, is_float);
5821 LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->ordering);
58105822 LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);
58115823 LLVMValueRef operand = ir_llvm_value(g, instruction->operand);
58125824
......@@ -5823,20 +5835,20 @@ static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, IrExecutable *executable,
58235835 return LLVMBuildIntToPtr(g->builder, uncasted_result, get_llvm_type(g, operand_type), "");
58245836}
58255837
5826static LLVMValueRef ir_render_atomic_load(CodeGen *g, IrExecutable *executable,
5827 IrInstructionAtomicLoad *instruction)
5838static LLVMValueRef ir_render_atomic_load(CodeGen *g, IrExecutableGen *executable,
5839 IrInstGenAtomicLoad *instruction)
58285840{
5829 LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->resolved_ordering);
5841 LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->ordering);
58305842 LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);
58315843 LLVMValueRef load_inst = gen_load(g, ptr, instruction->ptr->value->type, "");
58325844 LLVMSetOrdering(load_inst, ordering);
58335845 return load_inst;
58345846}
58355847
5836static LLVMValueRef ir_render_atomic_store(CodeGen *g, IrExecutable *executable,
5837 IrInstructionAtomicStore *instruction)
5848static LLVMValueRef ir_render_atomic_store(CodeGen *g, IrExecutableGen *executable,
5849 IrInstGenAtomicStore *instruction)
58385850{
5839 LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->resolved_ordering);
5851 LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->ordering);
58405852 LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);
58415853 LLVMValueRef value = ir_llvm_value(g, instruction->value);
58425854 LLVMValueRef store_inst = gen_store(g, value, ptr, instruction->ptr->value->type);
......@@ -5844,13 +5856,13 @@ static LLVMValueRef ir_render_atomic_store(CodeGen *g, IrExecutable *executable,
58445856 return nullptr;
58455857}
58465858
5847static LLVMValueRef ir_render_float_op(CodeGen *g, IrExecutable *executable, IrInstructionFloatOp *instruction) {
5859static LLVMValueRef ir_render_float_op(CodeGen *g, IrExecutableGen *executable, IrInstGenFloatOp *instruction) {
58485860 LLVMValueRef operand = ir_llvm_value(g, instruction->operand);
58495861 LLVMValueRef fn_val = get_float_fn(g, instruction->base.value->type, ZigLLVMFnIdFloatOp, instruction->fn_id);
58505862 return LLVMBuildCall(g->builder, fn_val, &operand, 1, "");
58515863}
58525864
5853static LLVMValueRef ir_render_mul_add(CodeGen *g, IrExecutable *executable, IrInstructionMulAdd *instruction) {
5865static LLVMValueRef ir_render_mul_add(CodeGen *g, IrExecutableGen *executable, IrInstGenMulAdd *instruction) {
58545866 LLVMValueRef op1 = ir_llvm_value(g, instruction->op1);
58555867 LLVMValueRef op2 = ir_llvm_value(g, instruction->op2);
58565868 LLVMValueRef op3 = ir_llvm_value(g, instruction->op3);
......@@ -5865,7 +5877,7 @@ static LLVMValueRef ir_render_mul_add(CodeGen *g, IrExecutable *executable, IrIn
58655877 return LLVMBuildCall(g->builder, fn_val, args, 3, "");
58665878}
58675879
5868static LLVMValueRef ir_render_bswap(CodeGen *g, IrExecutable *executable, IrInstructionBswap *instruction) {
5880static LLVMValueRef ir_render_bswap(CodeGen *g, IrExecutableGen *executable, IrInstGenBswap *instruction) {
58695881 LLVMValueRef op = ir_llvm_value(g, instruction->op);
58705882 ZigType *expr_type = instruction->base.value->type;
58715883 bool is_vector = expr_type->id == ZigTypeIdVector;
......@@ -5899,7 +5911,7 @@ static LLVMValueRef ir_render_bswap(CodeGen *g, IrExecutable *executable, IrInst
58995911 return LLVMBuildTrunc(g->builder, shifted, get_llvm_type(g, expr_type), "");
59005912}
59015913
5902static LLVMValueRef ir_render_bit_reverse(CodeGen *g, IrExecutable *executable, IrInstructionBitReverse *instruction) {
5914static LLVMValueRef ir_render_bit_reverse(CodeGen *g, IrExecutableGen *executable, IrInstGenBitReverse *instruction) {
59035915 LLVMValueRef op = ir_llvm_value(g, instruction->op);
59045916 ZigType *int_type = instruction->base.value->type;
59055917 assert(int_type->id == ZigTypeIdInt);
......@@ -5907,8 +5919,8 @@ static LLVMValueRef ir_render_bit_reverse(CodeGen *g, IrExecutable *executable,
59075919 return LLVMBuildCall(g->builder, fn_val, &op, 1, "");
59085920}
59095921
5910static LLVMValueRef ir_render_vector_to_array(CodeGen *g, IrExecutable *executable,
5911 IrInstructionVectorToArray *instruction)
5922static LLVMValueRef ir_render_vector_to_array(CodeGen *g, IrExecutableGen *executable,
5923 IrInstGenVectorToArray *instruction)
59125924{
59135925 ZigType *array_type = instruction->base.value->type;
59145926 assert(array_type->id == ZigTypeIdArray);
......@@ -5941,8 +5953,8 @@ static LLVMValueRef ir_render_vector_to_array(CodeGen *g, IrExecutable *executab
59415953 return result_loc;
59425954}
59435955
5944static LLVMValueRef ir_render_array_to_vector(CodeGen *g, IrExecutable *executable,
5945 IrInstructionArrayToVector *instruction)
5956static LLVMValueRef ir_render_array_to_vector(CodeGen *g, IrExecutableGen *executable,
5957 IrInstGenArrayToVector *instruction)
59465958{
59475959 ZigType *vector_type = instruction->base.value->type;
59485960 assert(vector_type->id == ZigTypeIdVector);
......@@ -5978,8 +5990,8 @@ static LLVMValueRef ir_render_array_to_vector(CodeGen *g, IrExecutable *executab
59785990 }
59795991}
59805992
5981static LLVMValueRef ir_render_assert_zero(CodeGen *g, IrExecutable *executable,
5982 IrInstructionAssertZero *instruction)
5993static LLVMValueRef ir_render_assert_zero(CodeGen *g, IrExecutableGen *executable,
5994 IrInstGenAssertZero *instruction)
59835995{
59845996 LLVMValueRef target = ir_llvm_value(g, instruction->target);
59855997 ZigType *int_type = instruction->target->value->type;
......@@ -5989,8 +6001,8 @@ static LLVMValueRef ir_render_assert_zero(CodeGen *g, IrExecutable *executable,
59896001 return nullptr;
59906002}
59916003
5992static LLVMValueRef ir_render_assert_non_null(CodeGen *g, IrExecutable *executable,
5993 IrInstructionAssertNonNull *instruction)
6004static LLVMValueRef ir_render_assert_non_null(CodeGen *g, IrExecutableGen *executable,
6005 IrInstGenAssertNonNull *instruction)
59946006{
59956007 LLVMValueRef target = ir_llvm_value(g, instruction->target);
59966008 ZigType *target_type = instruction->target->value->type;
......@@ -6014,8 +6026,8 @@ static LLVMValueRef ir_render_assert_non_null(CodeGen *g, IrExecutable *executab
60146026 return nullptr;
60156027}
60166028
6017static LLVMValueRef ir_render_suspend_begin(CodeGen *g, IrExecutable *executable,
6018 IrInstructionSuspendBegin *instruction)
6029static LLVMValueRef ir_render_suspend_begin(CodeGen *g, IrExecutableGen *executable,
6030 IrInstGenSuspendBegin *instruction)
60196031{
60206032 if (fn_is_async(g->cur_fn)) {
60216033 instruction->resume_bb = gen_suspend_begin(g, "SuspendResume");
......@@ -6023,8 +6035,8 @@ static LLVMValueRef ir_render_suspend_begin(CodeGen *g, IrExecutable *executable
60236035 return nullptr;
60246036}
60256037
6026static LLVMValueRef ir_render_suspend_finish(CodeGen *g, IrExecutable *executable,
6027 IrInstructionSuspendFinish *instruction)
6038static LLVMValueRef ir_render_suspend_finish(CodeGen *g, IrExecutableGen *executable,
6039 IrInstGenSuspendFinish *instruction)
60286040{
60296041 LLVMBuildRetVoid(g->builder);
60306042
......@@ -6032,11 +6044,11 @@ static LLVMValueRef ir_render_suspend_finish(CodeGen *g, IrExecutable *executabl
60326044 if (ir_want_runtime_safety(g, &instruction->base)) {
60336045 LLVMBuildStore(g->builder, g->cur_bad_not_suspended_index, g->cur_async_resume_index_ptr);
60346046 }
6035 render_async_var_decls(g, instruction->base.scope);
6047 render_async_var_decls(g, instruction->base.base.scope);
60366048 return nullptr;
60376049}
60386050
6039static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstruction *source_instr,
6051static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstGen *source_instr,
60406052 LLVMValueRef target_frame_ptr, ZigType *result_type, ZigType *ptr_result_type,
60416053 LLVMValueRef result_loc, bool non_async)
60426054{
......@@ -6062,7 +6074,7 @@ static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstruction *source_ins
60626074 frame_index_trace_arg(g, result_type), "");
60636075 LLVMValueRef src_trace_ptr = LLVMBuildLoad(g->builder, their_trace_ptr_ptr, "");
60646076 bool is_llvm_alloca;
6065 LLVMValueRef dest_trace_ptr = get_cur_err_ret_trace_val(g, source_instr->scope, &is_llvm_alloca);
6077 LLVMValueRef dest_trace_ptr = get_cur_err_ret_trace_val(g, source_instr->base.scope, &is_llvm_alloca);
60666078 LLVMValueRef args[] = { dest_trace_ptr, src_trace_ptr };
60676079 ZigLLVMBuildCall(g->builder, get_merge_err_ret_traces_fn_val(g), args, 2,
60686080 get_llvm_cc(g, CallingConventionUnspecified), ZigLLVM_CallAttrAuto, "");
......@@ -6075,7 +6087,7 @@ static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstruction *source_ins
60756087 }
60766088}
60776089
6078static LLVMValueRef ir_render_await(CodeGen *g, IrExecutable *executable, IrInstructionAwaitGen *instruction) {
6090static LLVMValueRef ir_render_await(CodeGen *g, IrExecutableGen *executable, IrInstGenAwait *instruction) {
60796091 LLVMTypeRef usize_type_ref = g->builtin_types.entry_usize->llvm_type;
60806092 LLVMValueRef zero = LLVMConstNull(usize_type_ref);
60816093 LLVMValueRef target_frame_ptr = ir_llvm_value(g, instruction->frame);
......@@ -6112,7 +6124,7 @@ static LLVMValueRef ir_render_await(CodeGen *g, IrExecutable *executable, IrInst
61126124 // supply the error return trace pointer
61136125 if (codegen_fn_has_err_ret_tracing_arg(g, result_type)) {
61146126 bool is_llvm_alloca;
6115 LLVMValueRef my_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca);
6127 LLVMValueRef my_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca);
61166128 assert(my_err_ret_trace_val != nullptr);
61176129 LLVMValueRef err_ret_trace_ptr_ptr = LLVMBuildStructGEP(g->builder, target_frame_ptr,
61186130 frame_index_trace_arg(g, result_type) + 1, "");
......@@ -6160,7 +6172,7 @@ static LLVMValueRef ir_render_await(CodeGen *g, IrExecutable *executable, IrInst
61606172 return nullptr;
61616173}
61626174
6163static LLVMValueRef ir_render_resume(CodeGen *g, IrExecutable *executable, IrInstructionResume *instruction) {
6175static LLVMValueRef ir_render_resume(CodeGen *g, IrExecutableGen *executable, IrInstGenResume *instruction) {
61646176 LLVMValueRef frame = ir_llvm_value(g, instruction->frame);
61656177 ZigType *frame_type = instruction->frame->value->type;
61666178 assert(frame_type->id == ZigTypeIdAnyFrame);
......@@ -6169,15 +6181,15 @@ static LLVMValueRef ir_render_resume(CodeGen *g, IrExecutable *executable, IrIns
61696181 return nullptr;
61706182}
61716183
6172static LLVMValueRef ir_render_frame_size(CodeGen *g, IrExecutable *executable,
6173 IrInstructionFrameSizeGen *instruction)
6184static LLVMValueRef ir_render_frame_size(CodeGen *g, IrExecutableGen *executable,
6185 IrInstGenFrameSize *instruction)
61746186{
61756187 LLVMValueRef fn_val = ir_llvm_value(g, instruction->fn);
61766188 return gen_frame_size(g, fn_val);
61776189}
61786190
6179static LLVMValueRef ir_render_spill_begin(CodeGen *g, IrExecutable *executable,
6180 IrInstructionSpillBegin *instruction)
6191static LLVMValueRef ir_render_spill_begin(CodeGen *g, IrExecutableGen *executable,
6192 IrInstGenSpillBegin *instruction)
61816193{
61826194 if (!fn_is_async(g->cur_fn))
61836195 return nullptr;
......@@ -6196,7 +6208,7 @@ static LLVMValueRef ir_render_spill_begin(CodeGen *g, IrExecutable *executable,
61966208 zig_unreachable();
61976209}
61986210
6199static LLVMValueRef ir_render_spill_end(CodeGen *g, IrExecutable *executable, IrInstructionSpillEnd *instruction) {
6211static LLVMValueRef ir_render_spill_end(CodeGen *g, IrExecutableGen *executable, IrInstGenSpillEnd *instruction) {
62006212 if (!fn_is_async(g->cur_fn))
62016213 return ir_llvm_value(g, instruction->begin->operand);
62026214
......@@ -6212,17 +6224,17 @@ static LLVMValueRef ir_render_spill_end(CodeGen *g, IrExecutable *executable, Ir
62126224 zig_unreachable();
62136225}
62146226
6215static LLVMValueRef ir_render_vector_extract_elem(CodeGen *g, IrExecutable *executable,
6216 IrInstructionVectorExtractElem *instruction)
6227static LLVMValueRef ir_render_vector_extract_elem(CodeGen *g, IrExecutableGen *executable,
6228 IrInstGenVectorExtractElem *instruction)
62176229{
62186230 LLVMValueRef vector = ir_llvm_value(g, instruction->vector);
62196231 LLVMValueRef index = ir_llvm_value(g, instruction->index);
62206232 return LLVMBuildExtractElement(g->builder, vector, index, "");
62216233}
62226234
6223static void set_debug_location(CodeGen *g, IrInstruction *instruction) {
6224 AstNode *source_node = instruction->source_node;
6225 Scope *scope = instruction->scope;
6235static void set_debug_location(CodeGen *g, IrInstGen *instruction) {
6236 AstNode *source_node = instruction->base.source_node;
6237 Scope *scope = instruction->base.scope;
62266238
62276239 assert(source_node);
62286240 assert(scope);
......@@ -6231,263 +6243,183 @@ static void set_debug_location(CodeGen *g, IrInstruction *instruction) {
62316243 (int)source_node->column + 1, get_di_scope(g, scope));
62326244}
62336245
6234static LLVMValueRef ir_render_instruction(CodeGen *g, IrExecutable *executable, IrInstruction *instruction) {
6246static LLVMValueRef ir_render_instruction(CodeGen *g, IrExecutableGen *executable, IrInstGen *instruction) {
62356247 switch (instruction->id) {
6236 case IrInstructionIdInvalid:
6237 case IrInstructionIdConst:
6238 case IrInstructionIdTypeOf:
6239 case IrInstructionIdFieldPtr:
6240 case IrInstructionIdSetCold:
6241 case IrInstructionIdSetRuntimeSafety:
6242 case IrInstructionIdSetFloatMode:
6243 case IrInstructionIdArrayType:
6244 case IrInstructionIdAnyFrameType:
6245 case IrInstructionIdSliceType:
6246 case IrInstructionIdSizeOf:
6247 case IrInstructionIdSwitchTarget:
6248 case IrInstructionIdContainerInitFields:
6249 case IrInstructionIdCompileErr:
6250 case IrInstructionIdCompileLog:
6251 case IrInstructionIdImport:
6252 case IrInstructionIdCImport:
6253 case IrInstructionIdCInclude:
6254 case IrInstructionIdCDefine:
6255 case IrInstructionIdCUndef:
6256 case IrInstructionIdEmbedFile:
6257 case IrInstructionIdIntType:
6258 case IrInstructionIdVectorType:
6259 case IrInstructionIdMemberCount:
6260 case IrInstructionIdMemberType:
6261 case IrInstructionIdMemberName:
6262 case IrInstructionIdAlignOf:
6263 case IrInstructionIdFnProto:
6264 case IrInstructionIdTestComptime:
6265 case IrInstructionIdCheckSwitchProngs:
6266 case IrInstructionIdCheckStatementIsVoid:
6267 case IrInstructionIdTypeName:
6268 case IrInstructionIdDeclRef:
6269 case IrInstructionIdSwitchVar:
6270 case IrInstructionIdSwitchElseVar:
6271 case IrInstructionIdByteOffsetOf:
6272 case IrInstructionIdBitOffsetOf:
6273 case IrInstructionIdTypeInfo:
6274 case IrInstructionIdType:
6275 case IrInstructionIdHasField:
6276 case IrInstructionIdTypeId:
6277 case IrInstructionIdSetEvalBranchQuota:
6278 case IrInstructionIdPtrType:
6279 case IrInstructionIdOpaqueType:
6280 case IrInstructionIdSetAlignStack:
6281 case IrInstructionIdArgType:
6282 case IrInstructionIdTagType:
6283 case IrInstructionIdExport:
6284 case IrInstructionIdErrorUnion:
6285 case IrInstructionIdAddImplicitReturnType:
6286 case IrInstructionIdIntCast:
6287 case IrInstructionIdFloatCast:
6288 case IrInstructionIdIntToFloat:
6289 case IrInstructionIdFloatToInt:
6290 case IrInstructionIdBoolToInt:
6291 case IrInstructionIdErrSetCast:
6292 case IrInstructionIdFromBytes:
6293 case IrInstructionIdToBytes:
6294 case IrInstructionIdEnumToInt:
6295 case IrInstructionIdCheckRuntimeScope:
6296 case IrInstructionIdDeclVarSrc:
6297 case IrInstructionIdPtrCastSrc:
6298 case IrInstructionIdCmpxchgSrc:
6299 case IrInstructionIdLoadPtr:
6300 case IrInstructionIdHasDecl:
6301 case IrInstructionIdUndeclaredIdent:
6302 case IrInstructionIdCallExtra:
6303 case IrInstructionIdCallSrc:
6304 case IrInstructionIdCallSrcArgs:
6305 case IrInstructionIdAllocaSrc:
6306 case IrInstructionIdEndExpr:
6307 case IrInstructionIdImplicitCast:
6308 case IrInstructionIdResolveResult:
6309 case IrInstructionIdResetResult:
6310 case IrInstructionIdContainerInitList:
6311 case IrInstructionIdSliceSrc:
6312 case IrInstructionIdRef:
6313 case IrInstructionIdBitCastSrc:
6314 case IrInstructionIdTestErrSrc:
6315 case IrInstructionIdUnionInitNamedField:
6316 case IrInstructionIdFrameType:
6317 case IrInstructionIdFrameSizeSrc:
6318 case IrInstructionIdAllocaGen:
6319 case IrInstructionIdAwaitSrc:
6320 case IrInstructionIdSplatSrc:
6321 case IrInstructionIdMergeErrSets:
6322 case IrInstructionIdAsmSrc:
6248 case IrInstGenIdInvalid:
6249 case IrInstGenIdConst:
6250 case IrInstGenIdAlloca:
63236251 zig_unreachable();
63246252
6325 case IrInstructionIdDeclVarGen:
6326 return ir_render_decl_var(g, executable, (IrInstructionDeclVarGen *)instruction);
6327 case IrInstructionIdReturn:
6328 return ir_render_return(g, executable, (IrInstructionReturn *)instruction);
6329 case IrInstructionIdBinOp:
6330 return ir_render_bin_op(g, executable, (IrInstructionBinOp *)instruction);
6331 case IrInstructionIdCast:
6332 return ir_render_cast(g, executable, (IrInstructionCast *)instruction);
6333 case IrInstructionIdUnreachable:
6334 return ir_render_unreachable(g, executable, (IrInstructionUnreachable *)instruction);
6335 case IrInstructionIdCondBr:
6336 return ir_render_cond_br(g, executable, (IrInstructionCondBr *)instruction);
6337 case IrInstructionIdBr:
6338 return ir_render_br(g, executable, (IrInstructionBr *)instruction);
6339 case IrInstructionIdUnOp:
6340 return ir_render_un_op(g, executable, (IrInstructionUnOp *)instruction);
6341 case IrInstructionIdLoadPtrGen:
6342 return ir_render_load_ptr(g, executable, (IrInstructionLoadPtrGen *)instruction);
6343 case IrInstructionIdStorePtr:
6344 return ir_render_store_ptr(g, executable, (IrInstructionStorePtr *)instruction);
6345 case IrInstructionIdVectorStoreElem:
6346 return ir_render_vector_store_elem(g, executable, (IrInstructionVectorStoreElem *)instruction);
6347 case IrInstructionIdVarPtr:
6348 return ir_render_var_ptr(g, executable, (IrInstructionVarPtr *)instruction);
6349 case IrInstructionIdReturnPtr:
6350 return ir_render_return_ptr(g, executable, (IrInstructionReturnPtr *)instruction);
6351 case IrInstructionIdElemPtr:
6352 return ir_render_elem_ptr(g, executable, (IrInstructionElemPtr *)instruction);
6353 case IrInstructionIdCallGen:
6354 return ir_render_call(g, executable, (IrInstructionCallGen *)instruction);
6355 case IrInstructionIdStructFieldPtr:
6356 return ir_render_struct_field_ptr(g, executable, (IrInstructionStructFieldPtr *)instruction);
6357 case IrInstructionIdUnionFieldPtr:
6358 return ir_render_union_field_ptr(g, executable, (IrInstructionUnionFieldPtr *)instruction);
6359 case IrInstructionIdAsmGen:
6360 return ir_render_asm_gen(g, executable, (IrInstructionAsmGen *)instruction);
6361 case IrInstructionIdTestNonNull:
6362 return ir_render_test_non_null(g, executable, (IrInstructionTestNonNull *)instruction);
6363 case IrInstructionIdOptionalUnwrapPtr:
6364 return ir_render_optional_unwrap_ptr(g, executable, (IrInstructionOptionalUnwrapPtr *)instruction);
6365 case IrInstructionIdClz:
6366 return ir_render_clz(g, executable, (IrInstructionClz *)instruction);
6367 case IrInstructionIdCtz:
6368 return ir_render_ctz(g, executable, (IrInstructionCtz *)instruction);
6369 case IrInstructionIdPopCount:
6370 return ir_render_pop_count(g, executable, (IrInstructionPopCount *)instruction);
6371 case IrInstructionIdSwitchBr:
6372 return ir_render_switch_br(g, executable, (IrInstructionSwitchBr *)instruction);
6373 case IrInstructionIdBswap:
6374 return ir_render_bswap(g, executable, (IrInstructionBswap *)instruction);
6375 case IrInstructionIdBitReverse:
6376 return ir_render_bit_reverse(g, executable, (IrInstructionBitReverse *)instruction);
6377 case IrInstructionIdPhi:
6378 return ir_render_phi(g, executable, (IrInstructionPhi *)instruction);
6379 case IrInstructionIdRefGen:
6380 return ir_render_ref(g, executable, (IrInstructionRefGen *)instruction);
6381 case IrInstructionIdErrName:
6382 return ir_render_err_name(g, executable, (IrInstructionErrName *)instruction);
6383 case IrInstructionIdCmpxchgGen:
6384 return ir_render_cmpxchg(g, executable, (IrInstructionCmpxchgGen *)instruction);
6385 case IrInstructionIdFence:
6386 return ir_render_fence(g, executable, (IrInstructionFence *)instruction);
6387 case IrInstructionIdTruncate:
6388 return ir_render_truncate(g, executable, (IrInstructionTruncate *)instruction);
6389 case IrInstructionIdBoolNot:
6390 return ir_render_bool_not(g, executable, (IrInstructionBoolNot *)instruction);
6391 case IrInstructionIdMemset:
6392 return ir_render_memset(g, executable, (IrInstructionMemset *)instruction);
6393 case IrInstructionIdMemcpy:
6394 return ir_render_memcpy(g, executable, (IrInstructionMemcpy *)instruction);
6395 case IrInstructionIdSliceGen:
6396 return ir_render_slice(g, executable, (IrInstructionSliceGen *)instruction);
6397 case IrInstructionIdBreakpoint:
6398 return ir_render_breakpoint(g, executable, (IrInstructionBreakpoint *)instruction);
6399 case IrInstructionIdReturnAddress:
6400 return ir_render_return_address(g, executable, (IrInstructionReturnAddress *)instruction);
6401 case IrInstructionIdFrameAddress:
6402 return ir_render_frame_address(g, executable, (IrInstructionFrameAddress *)instruction);
6403 case IrInstructionIdFrameHandle:
6404 return ir_render_handle(g, executable, (IrInstructionFrameHandle *)instruction);
6405 case IrInstructionIdOverflowOp:
6406 return ir_render_overflow_op(g, executable, (IrInstructionOverflowOp *)instruction);
6407 case IrInstructionIdTestErrGen:
6408 return ir_render_test_err(g, executable, (IrInstructionTestErrGen *)instruction);
6409 case IrInstructionIdUnwrapErrCode:
6410 return ir_render_unwrap_err_code(g, executable, (IrInstructionUnwrapErrCode *)instruction);
6411 case IrInstructionIdUnwrapErrPayload:
6412 return ir_render_unwrap_err_payload(g, executable, (IrInstructionUnwrapErrPayload *)instruction);
6413 case IrInstructionIdOptionalWrap:
6414 return ir_render_optional_wrap(g, executable, (IrInstructionOptionalWrap *)instruction);
6415 case IrInstructionIdErrWrapCode:
6416 return ir_render_err_wrap_code(g, executable, (IrInstructionErrWrapCode *)instruction);
6417 case IrInstructionIdErrWrapPayload:
6418 return ir_render_err_wrap_payload(g, executable, (IrInstructionErrWrapPayload *)instruction);
6419 case IrInstructionIdUnionTag:
6420 return ir_render_union_tag(g, executable, (IrInstructionUnionTag *)instruction);
6421 case IrInstructionIdPtrCastGen:
6422 return ir_render_ptr_cast(g, executable, (IrInstructionPtrCastGen *)instruction);
6423 case IrInstructionIdBitCastGen:
6424 return ir_render_bit_cast(g, executable, (IrInstructionBitCastGen *)instruction);
6425 case IrInstructionIdWidenOrShorten:
6426 return ir_render_widen_or_shorten(g, executable, (IrInstructionWidenOrShorten *)instruction);
6427 case IrInstructionIdPtrToInt:
6428 return ir_render_ptr_to_int(g, executable, (IrInstructionPtrToInt *)instruction);
6429 case IrInstructionIdIntToPtr:
6430 return ir_render_int_to_ptr(g, executable, (IrInstructionIntToPtr *)instruction);
6431 case IrInstructionIdIntToEnum:
6432 return ir_render_int_to_enum(g, executable, (IrInstructionIntToEnum *)instruction);
6433 case IrInstructionIdIntToErr:
6434 return ir_render_int_to_err(g, executable, (IrInstructionIntToErr *)instruction);
6435 case IrInstructionIdErrToInt:
6436 return ir_render_err_to_int(g, executable, (IrInstructionErrToInt *)instruction);
6437 case IrInstructionIdPanic:
6438 return ir_render_panic(g, executable, (IrInstructionPanic *)instruction);
6439 case IrInstructionIdTagName:
6440 return ir_render_enum_tag_name(g, executable, (IrInstructionTagName *)instruction);
6441 case IrInstructionIdFieldParentPtr:
6442 return ir_render_field_parent_ptr(g, executable, (IrInstructionFieldParentPtr *)instruction);
6443 case IrInstructionIdAlignCast:
6444 return ir_render_align_cast(g, executable, (IrInstructionAlignCast *)instruction);
6445 case IrInstructionIdErrorReturnTrace:
6446 return ir_render_error_return_trace(g, executable, (IrInstructionErrorReturnTrace *)instruction);
6447 case IrInstructionIdAtomicRmw:
6448 return ir_render_atomic_rmw(g, executable, (IrInstructionAtomicRmw *)instruction);
6449 case IrInstructionIdAtomicLoad:
6450 return ir_render_atomic_load(g, executable, (IrInstructionAtomicLoad *)instruction);
6451 case IrInstructionIdAtomicStore:
6452 return ir_render_atomic_store(g, executable, (IrInstructionAtomicStore *)instruction);
6453 case IrInstructionIdSaveErrRetAddr:
6454 return ir_render_save_err_ret_addr(g, executable, (IrInstructionSaveErrRetAddr *)instruction);
6455 case IrInstructionIdFloatOp:
6456 return ir_render_float_op(g, executable, (IrInstructionFloatOp *)instruction);
6457 case IrInstructionIdMulAdd:
6458 return ir_render_mul_add(g, executable, (IrInstructionMulAdd *)instruction);
6459 case IrInstructionIdArrayToVector:
6460 return ir_render_array_to_vector(g, executable, (IrInstructionArrayToVector *)instruction);
6461 case IrInstructionIdVectorToArray:
6462 return ir_render_vector_to_array(g, executable, (IrInstructionVectorToArray *)instruction);
6463 case IrInstructionIdAssertZero:
6464 return ir_render_assert_zero(g, executable, (IrInstructionAssertZero *)instruction);
6465 case IrInstructionIdAssertNonNull:
6466 return ir_render_assert_non_null(g, executable, (IrInstructionAssertNonNull *)instruction);
6467 case IrInstructionIdResizeSlice:
6468 return ir_render_resize_slice(g, executable, (IrInstructionResizeSlice *)instruction);
6469 case IrInstructionIdPtrOfArrayToSlice:
6470 return ir_render_ptr_of_array_to_slice(g, executable, (IrInstructionPtrOfArrayToSlice *)instruction);
6471 case IrInstructionIdSuspendBegin:
6472 return ir_render_suspend_begin(g, executable, (IrInstructionSuspendBegin *)instruction);
6473 case IrInstructionIdSuspendFinish:
6474 return ir_render_suspend_finish(g, executable, (IrInstructionSuspendFinish *)instruction);
6475 case IrInstructionIdResume:
6476 return ir_render_resume(g, executable, (IrInstructionResume *)instruction);
6477 case IrInstructionIdFrameSizeGen:
6478 return ir_render_frame_size(g, executable, (IrInstructionFrameSizeGen *)instruction);
6479 case IrInstructionIdAwaitGen:
6480 return ir_render_await(g, executable, (IrInstructionAwaitGen *)instruction);
6481 case IrInstructionIdSpillBegin:
6482 return ir_render_spill_begin(g, executable, (IrInstructionSpillBegin *)instruction);
6483 case IrInstructionIdSpillEnd:
6484 return ir_render_spill_end(g, executable, (IrInstructionSpillEnd *)instruction);
6485 case IrInstructionIdShuffleVector:
6486 return ir_render_shuffle_vector(g, executable, (IrInstructionShuffleVector *) instruction);
6487 case IrInstructionIdSplatGen:
6488 return ir_render_splat(g, executable, (IrInstructionSplatGen *) instruction);
6489 case IrInstructionIdVectorExtractElem:
6490 return ir_render_vector_extract_elem(g, executable, (IrInstructionVectorExtractElem *) instruction);
6253 case IrInstGenIdDeclVar:
6254 return ir_render_decl_var(g, executable, (IrInstGenDeclVar *)instruction);
6255 case IrInstGenIdReturn:
6256 return ir_render_return(g, executable, (IrInstGenReturn *)instruction);
6257 case IrInstGenIdBinOp:
6258 return ir_render_bin_op(g, executable, (IrInstGenBinOp *)instruction);
6259 case IrInstGenIdCast:
6260 return ir_render_cast(g, executable, (IrInstGenCast *)instruction);
6261 case IrInstGenIdUnreachable:
6262 return ir_render_unreachable(g, executable, (IrInstGenUnreachable *)instruction);
6263 case IrInstGenIdCondBr:
6264 return ir_render_cond_br(g, executable, (IrInstGenCondBr *)instruction);
6265 case IrInstGenIdBr:
6266 return ir_render_br(g, executable, (IrInstGenBr *)instruction);
6267 case IrInstGenIdBinaryNot:
6268 return ir_render_binary_not(g, executable, (IrInstGenBinaryNot *)instruction);
6269 case IrInstGenIdNegation:
6270 return ir_render_negation(g, executable, (IrInstGenNegation *)instruction);
6271 case IrInstGenIdNegationWrapping:
6272 return ir_render_negation_wrapping(g, executable, (IrInstGenNegationWrapping *)instruction);
6273 case IrInstGenIdLoadPtr:
6274 return ir_render_load_ptr(g, executable, (IrInstGenLoadPtr *)instruction);
6275 case IrInstGenIdStorePtr:
6276 return ir_render_store_ptr(g, executable, (IrInstGenStorePtr *)instruction);
6277 case IrInstGenIdVectorStoreElem:
6278 return ir_render_vector_store_elem(g, executable, (IrInstGenVectorStoreElem *)instruction);
6279 case IrInstGenIdVarPtr:
6280 return ir_render_var_ptr(g, executable, (IrInstGenVarPtr *)instruction);
6281 case IrInstGenIdReturnPtr:
6282 return ir_render_return_ptr(g, executable, (IrInstGenReturnPtr *)instruction);
6283 case IrInstGenIdElemPtr:
6284 return ir_render_elem_ptr(g, executable, (IrInstGenElemPtr *)instruction);
6285 case IrInstGenIdCall:
6286 return ir_render_call(g, executable, (IrInstGenCall *)instruction);
6287 case IrInstGenIdStructFieldPtr:
6288 return ir_render_struct_field_ptr(g, executable, (IrInstGenStructFieldPtr *)instruction);
6289 case IrInstGenIdUnionFieldPtr:
6290 return ir_render_union_field_ptr(g, executable, (IrInstGenUnionFieldPtr *)instruction);
6291 case IrInstGenIdAsm:
6292 return ir_render_asm_gen(g, executable, (IrInstGenAsm *)instruction);
6293 case IrInstGenIdTestNonNull:
6294 return ir_render_test_non_null(g, executable, (IrInstGenTestNonNull *)instruction);
6295 case IrInstGenIdOptionalUnwrapPtr:
6296 return ir_render_optional_unwrap_ptr(g, executable, (IrInstGenOptionalUnwrapPtr *)instruction);
6297 case IrInstGenIdClz:
6298 return ir_render_clz(g, executable, (IrInstGenClz *)instruction);
6299 case IrInstGenIdCtz:
6300 return ir_render_ctz(g, executable, (IrInstGenCtz *)instruction);
6301 case IrInstGenIdPopCount:
6302 return ir_render_pop_count(g, executable, (IrInstGenPopCount *)instruction);
6303 case IrInstGenIdSwitchBr:
6304 return ir_render_switch_br(g, executable, (IrInstGenSwitchBr *)instruction);
6305 case IrInstGenIdBswap:
6306 return ir_render_bswap(g, executable, (IrInstGenBswap *)instruction);
6307 case IrInstGenIdBitReverse:
6308 return ir_render_bit_reverse(g, executable, (IrInstGenBitReverse *)instruction);
6309 case IrInstGenIdPhi:
6310 return ir_render_phi(g, executable, (IrInstGenPhi *)instruction);
6311 case IrInstGenIdRef:
6312 return ir_render_ref(g, executable, (IrInstGenRef *)instruction);
6313 case IrInstGenIdErrName:
6314 return ir_render_err_name(g, executable, (IrInstGenErrName *)instruction);
6315 case IrInstGenIdCmpxchg:
6316 return ir_render_cmpxchg(g, executable, (IrInstGenCmpxchg *)instruction);
6317 case IrInstGenIdFence:
6318 return ir_render_fence(g, executable, (IrInstGenFence *)instruction);
6319 case IrInstGenIdTruncate:
6320 return ir_render_truncate(g, executable, (IrInstGenTruncate *)instruction);
6321 case IrInstGenIdBoolNot:
6322 return ir_render_bool_not(g, executable, (IrInstGenBoolNot *)instruction);
6323 case IrInstGenIdMemset:
6324 return ir_render_memset(g, executable, (IrInstGenMemset *)instruction);
6325 case IrInstGenIdMemcpy:
6326 return ir_render_memcpy(g, executable, (IrInstGenMemcpy *)instruction);
6327 case IrInstGenIdSlice:
6328 return ir_render_slice(g, executable, (IrInstGenSlice *)instruction);
6329 case IrInstGenIdBreakpoint:
6330 return ir_render_breakpoint(g, executable, (IrInstGenBreakpoint *)instruction);
6331 case IrInstGenIdReturnAddress:
6332 return ir_render_return_address(g, executable, (IrInstGenReturnAddress *)instruction);
6333 case IrInstGenIdFrameAddress:
6334 return ir_render_frame_address(g, executable, (IrInstGenFrameAddress *)instruction);
6335 case IrInstGenIdFrameHandle:
6336 return ir_render_handle(g, executable, (IrInstGenFrameHandle *)instruction);
6337 case IrInstGenIdOverflowOp:
6338 return ir_render_overflow_op(g, executable, (IrInstGenOverflowOp *)instruction);
6339 case IrInstGenIdTestErr:
6340 return ir_render_test_err(g, executable, (IrInstGenTestErr *)instruction);
6341 case IrInstGenIdUnwrapErrCode:
6342 return ir_render_unwrap_err_code(g, executable, (IrInstGenUnwrapErrCode *)instruction);
6343 case IrInstGenIdUnwrapErrPayload:
6344 return ir_render_unwrap_err_payload(g, executable, (IrInstGenUnwrapErrPayload *)instruction);
6345 case IrInstGenIdOptionalWrap:
6346 return ir_render_optional_wrap(g, executable, (IrInstGenOptionalWrap *)instruction);
6347 case IrInstGenIdErrWrapCode:
6348 return ir_render_err_wrap_code(g, executable, (IrInstGenErrWrapCode *)instruction);
6349 case IrInstGenIdErrWrapPayload:
6350 return ir_render_err_wrap_payload(g, executable, (IrInstGenErrWrapPayload *)instruction);
6351 case IrInstGenIdUnionTag:
6352 return ir_render_union_tag(g, executable, (IrInstGenUnionTag *)instruction);
6353 case IrInstGenIdPtrCast:
6354 return ir_render_ptr_cast(g, executable, (IrInstGenPtrCast *)instruction);
6355 case IrInstGenIdBitCast:
6356 return ir_render_bit_cast(g, executable, (IrInstGenBitCast *)instruction);
6357 case IrInstGenIdWidenOrShorten:
6358 return ir_render_widen_or_shorten(g, executable, (IrInstGenWidenOrShorten *)instruction);
6359 case IrInstGenIdPtrToInt:
6360 return ir_render_ptr_to_int(g, executable, (IrInstGenPtrToInt *)instruction);
6361 case IrInstGenIdIntToPtr:
6362 return ir_render_int_to_ptr(g, executable, (IrInstGenIntToPtr *)instruction);
6363 case IrInstGenIdIntToEnum:
6364 return ir_render_int_to_enum(g, executable, (IrInstGenIntToEnum *)instruction);
6365 case IrInstGenIdIntToErr:
6366 return ir_render_int_to_err(g, executable, (IrInstGenIntToErr *)instruction);
6367 case IrInstGenIdErrToInt:
6368 return ir_render_err_to_int(g, executable, (IrInstGenErrToInt *)instruction);
6369 case IrInstGenIdPanic:
6370 return ir_render_panic(g, executable, (IrInstGenPanic *)instruction);
6371 case IrInstGenIdTagName:
6372 return ir_render_enum_tag_name(g, executable, (IrInstGenTagName *)instruction);
6373 case IrInstGenIdFieldParentPtr:
6374 return ir_render_field_parent_ptr(g, executable, (IrInstGenFieldParentPtr *)instruction);
6375 case IrInstGenIdAlignCast:
6376 return ir_render_align_cast(g, executable, (IrInstGenAlignCast *)instruction);
6377 case IrInstGenIdErrorReturnTrace:
6378 return ir_render_error_return_trace(g, executable, (IrInstGenErrorReturnTrace *)instruction);
6379 case IrInstGenIdAtomicRmw:
6380 return ir_render_atomic_rmw(g, executable, (IrInstGenAtomicRmw *)instruction);
6381 case IrInstGenIdAtomicLoad:
6382 return ir_render_atomic_load(g, executable, (IrInstGenAtomicLoad *)instruction);
6383 case IrInstGenIdAtomicStore:
6384 return ir_render_atomic_store(g, executable, (IrInstGenAtomicStore *)instruction);
6385 case IrInstGenIdSaveErrRetAddr:
6386 return ir_render_save_err_ret_addr(g, executable, (IrInstGenSaveErrRetAddr *)instruction);
6387 case IrInstGenIdFloatOp:
6388 return ir_render_float_op(g, executable, (IrInstGenFloatOp *)instruction);
6389 case IrInstGenIdMulAdd:
6390 return ir_render_mul_add(g, executable, (IrInstGenMulAdd *)instruction);
6391 case IrInstGenIdArrayToVector:
6392 return ir_render_array_to_vector(g, executable, (IrInstGenArrayToVector *)instruction);
6393 case IrInstGenIdVectorToArray:
6394 return ir_render_vector_to_array(g, executable, (IrInstGenVectorToArray *)instruction);
6395 case IrInstGenIdAssertZero:
6396 return ir_render_assert_zero(g, executable, (IrInstGenAssertZero *)instruction);
6397 case IrInstGenIdAssertNonNull:
6398 return ir_render_assert_non_null(g, executable, (IrInstGenAssertNonNull *)instruction);
6399 case IrInstGenIdResizeSlice:
6400 return ir_render_resize_slice(g, executable, (IrInstGenResizeSlice *)instruction);
6401 case IrInstGenIdPtrOfArrayToSlice:
6402 return ir_render_ptr_of_array_to_slice(g, executable, (IrInstGenPtrOfArrayToSlice *)instruction);
6403 case IrInstGenIdSuspendBegin:
6404 return ir_render_suspend_begin(g, executable, (IrInstGenSuspendBegin *)instruction);
6405 case IrInstGenIdSuspendFinish:
6406 return ir_render_suspend_finish(g, executable, (IrInstGenSuspendFinish *)instruction);
6407 case IrInstGenIdResume:
6408 return ir_render_resume(g, executable, (IrInstGenResume *)instruction);
6409 case IrInstGenIdFrameSize:
6410 return ir_render_frame_size(g, executable, (IrInstGenFrameSize *)instruction);
6411 case IrInstGenIdAwait:
6412 return ir_render_await(g, executable, (IrInstGenAwait *)instruction);
6413 case IrInstGenIdSpillBegin:
6414 return ir_render_spill_begin(g, executable, (IrInstGenSpillBegin *)instruction);
6415 case IrInstGenIdSpillEnd:
6416 return ir_render_spill_end(g, executable, (IrInstGenSpillEnd *)instruction);
6417 case IrInstGenIdShuffleVector:
6418 return ir_render_shuffle_vector(g, executable, (IrInstGenShuffleVector *) instruction);
6419 case IrInstGenIdSplat:
6420 return ir_render_splat(g, executable, (IrInstGenSplat *) instruction);
6421 case IrInstGenIdVectorExtractElem:
6422 return ir_render_vector_extract_elem(g, executable, (IrInstGenVectorExtractElem *) instruction);
64916423 }
64926424 zig_unreachable();
64936425}
......@@ -6495,21 +6427,21 @@ static LLVMValueRef ir_render_instruction(CodeGen *g, IrExecutable *executable,
64956427static void ir_render(CodeGen *g, ZigFn *fn_entry) {
64966428 assert(fn_entry);
64976429
6498 IrExecutable *executable = &fn_entry->analyzed_executable;
6430 IrExecutableGen *executable = &fn_entry->analyzed_executable;
64996431 assert(executable->basic_block_list.length > 0);
65006432
65016433 for (size_t block_i = 0; block_i < executable->basic_block_list.length; block_i += 1) {
6502 IrBasicBlock *current_block = executable->basic_block_list.at(block_i);
6434 IrBasicBlockGen *current_block = executable->basic_block_list.at(block_i);
65036435 if (get_scope_typeof(current_block->scope) != nullptr) {
65046436 LLVMBuildBr(g->builder, current_block->llvm_block);
65056437 }
65066438 assert(current_block->llvm_block);
65076439 LLVMPositionBuilderAtEnd(g->builder, current_block->llvm_block);
65086440 for (size_t instr_i = 0; instr_i < current_block->instruction_list.length; instr_i += 1) {
6509 IrInstruction *instruction = current_block->instruction_list.at(instr_i);
6510 if (instruction->ref_count == 0 && !ir_has_side_effects(instruction))
6441 IrInstGen *instruction = current_block->instruction_list.at(instr_i);
6442 if (instruction->base.ref_count == 0 && !ir_inst_gen_has_side_effects(instruction))
65116443 continue;
6512 if (get_scope_typeof(instruction->scope) != nullptr)
6444 if (get_scope_typeof(instruction->base.scope) != nullptr)
65136445 continue;
65146446
65156447 if (!g->strip_debug_symbols) {
......@@ -7401,7 +7333,7 @@ static void generate_error_name_table(CodeGen *g) {
74017333}
74027334
74037335static void build_all_basic_blocks(CodeGen *g, ZigFn *fn) {
7404 IrExecutable *executable = &fn->analyzed_executable;
7336 IrExecutableGen *executable = &fn->analyzed_executable;
74057337 assert(executable->basic_block_list.length > 0);
74067338 LLVMValueRef fn_val = fn_llvm_value(g, fn);
74077339 LLVMBasicBlockRef first_bb = nullptr;
......@@ -7410,7 +7342,7 @@ static void build_all_basic_blocks(CodeGen *g, ZigFn *fn) {
74107342 g->cur_preamble_llvm_block = first_bb;
74117343 }
74127344 for (size_t block_i = 0; block_i < executable->basic_block_list.length; block_i += 1) {
7413 IrBasicBlock *bb = executable->basic_block_list.at(block_i);
7345 IrBasicBlockGen *bb = executable->basic_block_list.at(block_i);
74147346 bb->llvm_block = LLVMAppendBasicBlock(fn_val, bb->name_hint);
74157347 }
74167348 if (first_bb == nullptr) {
......@@ -7609,7 +7541,7 @@ static void do_code_gen(CodeGen *g) {
76097541 } else {
76107542 if (want_sret) {
76117543 g->cur_ret_ptr = LLVMGetParam(fn, 0);
7612 } else if (handle_is_ptr(fn_type_id->return_type)) {
7544 } else if (type_has_bits(fn_type_id->return_type)) {
76137545 g->cur_ret_ptr = build_alloca(g, fn_type_id->return_type, "result", 0);
76147546 // TODO add debug info variable for this
76157547 } else {
......@@ -7643,10 +7575,10 @@ static void do_code_gen(CodeGen *g) {
76437575 if (!is_async) {
76447576 // allocate async frames for noasync calls & awaits to async functions
76457577 ZigType *largest_call_frame_type = nullptr;
7646 IrInstruction *all_calls_alloca = ir_create_alloca(g, &fn_table_entry->fndef_scope->base,
7578 IrInstGen *all_calls_alloca = ir_create_alloca(g, &fn_table_entry->fndef_scope->base,
76477579 fn_table_entry->body_node, fn_table_entry, g->builtin_types.entry_void, "@async_call_frame");
76487580 for (size_t i = 0; i < fn_table_entry->call_list.length; i += 1) {
7649 IrInstructionCallGen *call = fn_table_entry->call_list.at(i);
7581 IrInstGenCall *call = fn_table_entry->call_list.at(i);
76507582 if (call->fn_entry == nullptr)
76517583 continue;
76527584 if (!fn_is_async(call->fn_entry))
......@@ -7668,7 +7600,7 @@ static void do_code_gen(CodeGen *g) {
76687600 }
76697601 // allocate temporary stack data
76707602 for (size_t alloca_i = 0; alloca_i < fn_table_entry->alloca_gen_list.length; alloca_i += 1) {
7671 IrInstructionAllocaGen *instruction = fn_table_entry->alloca_gen_list.at(alloca_i);
7603 IrInstGenAlloca *instruction = fn_table_entry->alloca_gen_list.at(alloca_i);
76727604 ZigType *ptr_type = instruction->base.value->type;
76737605 assert(ptr_type->id == ZigTypeIdPointer);
76747606 ZigType *child_type = ptr_type->data.pointer.child_type;
......@@ -7676,7 +7608,7 @@ static void do_code_gen(CodeGen *g) {
76767608 zig_unreachable();
76777609 if (!type_has_bits(child_type))
76787610 continue;
7679 if (instruction->base.ref_count == 0)
7611 if (instruction->base.base.ref_count == 0)
76807612 continue;
76817613 if (instruction->base.value->special != ConstValSpecialRuntime) {
76827614 if (const_ptr_pointee(nullptr, g, instruction->base.value, nullptr)->special !=
......@@ -7793,7 +7725,7 @@ static void do_code_gen(CodeGen *g) {
77937725 ZigLLVMSetCurrentDebugLocation(g->builder, (int)source_node->line + 1,
77947726 (int)source_node->column + 1, get_di_scope(g, fn_table_entry->child_scope));
77957727 }
7796 IrExecutable *executable = &fn_table_entry->analyzed_executable;
7728 IrExecutableGen *executable = &fn_table_entry->analyzed_executable;
77977729 LLVMBasicBlockRef bad_resume_block = LLVMAppendBasicBlock(g->cur_fn_val, "BadResume");
77987730 LLVMPositionBuilderAtEnd(g->builder, bad_resume_block);
77997731 gen_assertion_scope(g, PanicMsgIdBadResume, fn_table_entry->child_scope);
......@@ -7820,7 +7752,7 @@ static void do_code_gen(CodeGen *g) {
78207752 g->cur_async_switch_instr = switch_instr;
78217753
78227754 LLVMValueRef zero = LLVMConstNull(usize_type_ref);
7823 IrBasicBlock *entry_block = executable->basic_block_list.at(0);
7755 IrBasicBlockGen *entry_block = executable->basic_block_list.at(0);
78247756 LLVMAddCase(switch_instr, zero, entry_block->llvm_block);
78257757 g->cur_resume_block_count += 1;
78267758
......@@ -7852,7 +7784,7 @@ static void do_code_gen(CodeGen *g) {
78527784
78537785 gen_init_stack_trace(g, trace_field_ptr, addrs_field_ptr);
78547786 }
7855 render_async_var_decls(g, entry_block->instruction_list.at(0)->scope);
7787 render_async_var_decls(g, entry_block->instruction_list.at(0)->base.scope);
78567788 } else {
78577789 // create debug variable declarations for parameters
78587790 // rely on the first variables in the variable_list being parameters.
......@@ -7941,6 +7873,12 @@ static void zig_llvm_emit_output(CodeGen *g) {
79417873 default:
79427874 zig_unreachable();
79437875 }
7876 LLVMDisposeModule(g->module);
7877 g->module = nullptr;
7878 LLVMDisposeTargetData(g->target_data_ref);
7879 g->target_data_ref = nullptr;
7880 LLVMDisposeTargetMachine(g->target_machine);
7881 g->target_machine = nullptr;
79447882}
79457883
79467884struct CIntTypeInfo {
......@@ -8427,6 +8365,25 @@ static bool detect_err_ret_tracing(CodeGen *g) {
84278365 g->build_mode != BuildModeSmallRelease;
84288366}
84298367
8368static LLVMCodeModel to_llvm_code_model(CodeGen *g) {
8369 switch (g->code_model) {
8370 case CodeModelDefault:
8371 return LLVMCodeModelDefault;
8372 case CodeModelTiny:
8373 return LLVMCodeModelTiny;
8374 case CodeModelSmall:
8375 return LLVMCodeModelSmall;
8376 case CodeModelKernel:
8377 return LLVMCodeModelKernel;
8378 case CodeModelMedium:
8379 return LLVMCodeModelMedium;
8380 case CodeModelLarge:
8381 return LLVMCodeModelLarge;
8382 }
8383
8384 zig_unreachable();
8385}
8386
84308387Buf *codegen_generate_builtin_source(CodeGen *g) {
84318388 g->have_dynamic_link = detect_dynamic_link(g);
84328389 g->have_pic = detect_pic(g);
......@@ -8578,6 +8535,17 @@ Buf *codegen_generate_builtin_source(CodeGen *g) {
85788535 buf_appendf(contents, "pub const os = Os.%s;\n", cur_os);
85798536 buf_appendf(contents, "pub const arch = %s;\n", cur_arch);
85808537 buf_appendf(contents, "pub const abi = Abi.%s;\n", cur_abi);
8538 {
8539 buf_append_str(contents, "pub const cpu_features: CpuFeatures = ");
8540 if (g->zig_target->cpu_features != nullptr) {
8541 const char *ptr;
8542 size_t len;
8543 stage2_cpu_features_get_builtin_str(g->zig_target->cpu_features, &ptr, &len);
8544 buf_append_mem(contents, ptr, len);
8545 } else {
8546 buf_append_str(contents, "arch.getBaselineCpuFeatures();\n");
8547 }
8548 }
85818549 if (g->libc_link_lib != nullptr && g->zig_target->glibc_version != nullptr) {
85828550 buf_appendf(contents,
85838551 "pub const glibc_version: ?Version = Version{.major = %d, .minor = %d, .patch = %d};\n",
......@@ -8595,6 +8563,34 @@ Buf *codegen_generate_builtin_source(CodeGen *g) {
85958563 buf_appendf(contents, "pub const position_independent_code = %s;\n", bool_to_str(g->have_pic));
85968564 buf_appendf(contents, "pub const strip_debug_info = %s;\n", bool_to_str(g->strip_debug_symbols));
85978565
8566 {
8567 const char *code_model;
8568 switch (g->code_model) {
8569 case CodeModelDefault:
8570 code_model = "default";
8571 break;
8572 case CodeModelTiny:
8573 code_model = "tiny";
8574 break;
8575 case CodeModelSmall:
8576 code_model = "small";
8577 break;
8578 case CodeModelKernel:
8579 code_model = "kernel";
8580 break;
8581 case CodeModelMedium:
8582 code_model = "medium";
8583 break;
8584 case CodeModelLarge:
8585 code_model = "large";
8586 break;
8587 default:
8588 zig_unreachable();
8589 }
8590
8591 buf_appendf(contents, "pub const code_model = CodeModel.%s;\n", code_model);
8592 }
8593
85988594 {
85998595 TargetSubsystem detected_subsystem = detect_subsystem(g);
86008596 if (detected_subsystem != TargetSubsystemAuto) {
......@@ -8639,12 +8635,19 @@ static Error define_builtin_compile_vars(CodeGen *g) {
86398635 cache_bool(&cache_hash, g->is_dynamic);
86408636 cache_bool(&cache_hash, g->is_test_build);
86418637 cache_bool(&cache_hash, g->is_single_threaded);
8638 cache_int(&cache_hash, g->code_model);
86428639 cache_int(&cache_hash, g->zig_target->is_native);
86438640 cache_int(&cache_hash, g->zig_target->arch);
86448641 cache_int(&cache_hash, g->zig_target->sub_arch);
86458642 cache_int(&cache_hash, g->zig_target->vendor);
86468643 cache_int(&cache_hash, g->zig_target->os);
86478644 cache_int(&cache_hash, g->zig_target->abi);
8645 if (g->zig_target->cpu_features != nullptr) {
8646 const char *ptr;
8647 size_t len;
8648 stage2_cpu_features_get_cache_hash(g->zig_target->cpu_features, &ptr, &len);
8649 cache_str(&cache_hash, ptr);
8650 }
86488651 if (g->zig_target->glibc_version != nullptr) {
86498652 cache_int(&cache_hash, g->zig_target->glibc_version->major);
86508653 cache_int(&cache_hash, g->zig_target->glibc_version->minor);
......@@ -8769,40 +8772,28 @@ static void init(CodeGen *g) {
87698772 reloc_mode = LLVMRelocStatic;
87708773 }
87718774
8772 const char *target_specific_cpu_args;
8773 const char *target_specific_features;
8775 const char *target_specific_cpu_args = "";
8776 const char *target_specific_features = "";
8777
87748778 if (g->zig_target->is_native) {
8775 // LLVM creates invalid binaries on Windows sometimes.
8776 // See https://github.com/ziglang/zig/issues/508
8777 // As a workaround we do not use target native features on Windows.
8778 if (g->zig_target->os == OsWindows || g->zig_target->os == OsUefi) {
8779 target_specific_cpu_args = "";
8780 target_specific_features = "";
8781 } else {
8782 target_specific_cpu_args = ZigLLVMGetHostCPUName();
8783 target_specific_features = ZigLLVMGetNativeFeatures();
8784 }
8785 } else if (target_is_riscv(g->zig_target)) {
8786 // TODO https://github.com/ziglang/zig/issues/2883
8787 // Be aware of https://github.com/ziglang/zig/issues/3275
8788 target_specific_cpu_args = "";
8789 target_specific_features = riscv_default_features;
8790 } else if (g->zig_target->arch == ZigLLVM_x86) {
8791 // This is because we're really targeting i686 rather than i386.
8792 // It's pretty much impossible to use many of the language features
8793 // such as fp16 if you stick use the x87 only. This is also what clang
8794 // uses as base cpu.
8795 // TODO https://github.com/ziglang/zig/issues/2883
8796 target_specific_cpu_args = "pentium4";
8797 target_specific_features = (g->zig_target->os == OsFreestanding) ? "-sse": "";
8798 } else {
8799 target_specific_cpu_args = "";
8800 target_specific_features = "";
8779 target_specific_cpu_args = ZigLLVMGetHostCPUName();
8780 target_specific_features = ZigLLVMGetNativeFeatures();
88018781 }
88028782
8783 // Override CPU and features if defined by user.
8784 if (g->zig_target->cpu_features != nullptr) {
8785 target_specific_cpu_args = stage2_cpu_features_get_llvm_cpu(g->zig_target->cpu_features);
8786 target_specific_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features);
8787 }
8788 if (g->verbose_llvm_cpu_features) {
8789 fprintf(stderr, "name=%s triple=%s\n", buf_ptr(g->root_out_name), buf_ptr(&g->llvm_triple_str));
8790 fprintf(stderr, "name=%s target_specific_cpu_args=%s\n", buf_ptr(g->root_out_name), target_specific_cpu_args);
8791 fprintf(stderr, "name=%s target_specific_features=%s\n", buf_ptr(g->root_out_name), target_specific_features);
8792 }
8793
88038794 g->target_machine = ZigLLVMCreateTargetMachine(target_ref, buf_ptr(&g->llvm_triple_str),
88048795 target_specific_cpu_args, target_specific_features, opt_level, reloc_mode,
8805 LLVMCodeModelDefault, g->function_sections);
8796 to_llvm_code_model(g), g->function_sections);
88068797
88078798 g->target_data_ref = LLVMCreateTargetDataLayout(g->target_machine);
88088799
......@@ -8846,15 +8837,17 @@ static void init(CodeGen *g) {
88468837 define_builtin_types(g);
88478838 define_intern_values(g);
88488839
8849 IrInstruction *sentinel_instructions = allocate<IrInstruction>(2);
8850 g->invalid_instruction = &sentinel_instructions[0];
8851 g->invalid_instruction->value = allocate<ZigValue>(1, "ZigValue");
8852 g->invalid_instruction->value->type = g->builtin_types.entry_invalid;
8840 IrInstGen *sentinel_instructions = allocate<IrInstGen>(2);
8841 g->invalid_inst_gen = &sentinel_instructions[0];
8842 g->invalid_inst_gen->value = allocate<ZigValue>(1, "ZigValue");
8843 g->invalid_inst_gen->value->type = g->builtin_types.entry_invalid;
88538844
88548845 g->unreach_instruction = &sentinel_instructions[1];
88558846 g->unreach_instruction->value = allocate<ZigValue>(1, "ZigValue");
88568847 g->unreach_instruction->value->type = g->builtin_types.entry_unreachable;
88578848
8849 g->invalid_inst_src = allocate<IrInstSrc>(1);
8850
88588851 define_builtin_fns(g);
88598852 Error err;
88608853 if ((err = define_builtin_compile_vars(g))) {
......@@ -8996,7 +8989,10 @@ static void detect_libc(CodeGen *g) {
89968989 "See `zig libc --help` for more details.\n", err_str(err));
89978990 exit(1);
89988991 }
8999 if ((err = os_make_path(g->cache_dir))) {
8992 Buf libc_txt_dir = BUF_INIT;
8993 os_path_dirname(libc_txt, &libc_txt_dir);
8994 buf_deinit(&libc_txt_dir);
8995 if ((err = os_make_path(&libc_txt_dir))) {
90008996 fprintf(stderr, "Unable to create %s directory: %s\n",
90018997 buf_ptr(g->cache_dir), err_str(err));
90028998 exit(1);
......@@ -9125,21 +9121,22 @@ void add_cc_args(CodeGen *g, ZigList<const char *> &args, const char *out_dep_pa
91259121 args.append("-target");
91269122 args.append(buf_ptr(&g->llvm_triple_str));
91279123
9128 if (target_is_musl(g->zig_target) && target_is_riscv(g->zig_target)) {
9129 // Musl depends on atomic instructions, which are disabled by default in Clang/LLVM's
9130 // cross compilation CPU info for RISCV.
9131 // TODO: https://github.com/ziglang/zig/issues/2883
9124 const char *llvm_cpu = stage2_cpu_features_get_llvm_cpu(g->zig_target->cpu_features);
9125 if (llvm_cpu != nullptr) {
91329126 args.append("-Xclang");
9133 args.append("-target-feature");
9127 args.append("-target-cpu");
91349128 args.append("-Xclang");
9135 args.append(riscv_default_features);
9136 } else if (g->zig_target->os == OsFreestanding && g->zig_target->arch == ZigLLVM_x86) {
9129 args.append(llvm_cpu);
9130 }
9131 const char *llvm_target_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features);
9132 if (llvm_target_features != nullptr) {
91379133 args.append("-Xclang");
91389134 args.append("-target-feature");
91399135 args.append("-Xclang");
9140 args.append("-sse");
9136 args.append(llvm_target_features);
91419137 }
91429138 }
9139
91439140 if (g->zig_target->os == OsFreestanding) {
91449141 args.append("-ffreestanding");
91459142 }
......@@ -9578,6 +9575,8 @@ Error create_c_object_cache(CodeGen *g, CacheHash **out_cache_hash, bool verbose
95789575 cache_bool(cache_hash, g->have_sanitize_c);
95799576 cache_bool(cache_hash, want_valgrind_support(g));
95809577 cache_bool(cache_hash, g->function_sections);
9578 cache_int(cache_hash, g->code_model);
9579
95819580 for (size_t arg_i = 0; arg_i < g->clang_argv_len; arg_i += 1) {
95829581 cache_str(cache_hash, g->clang_argv[arg_i]);
95839582 }
......@@ -9787,6 +9786,7 @@ static void prepend_c_type_to_decl_list(CodeGen *g, GenH *gen_h, ZigType *type_e
97879786 zig_unreachable();
97889787 case ZigTypeIdVoid:
97899788 case ZigTypeIdUnreachable:
9789 return;
97909790 case ZigTypeIdBool:
97919791 g->c_want_stdbool = true;
97929792 return;
......@@ -10333,6 +10333,12 @@ static Error check_cache(CodeGen *g, Buf *manifest_dir, Buf *digest) {
1033310333 cache_int(ch, g->zig_target->vendor);
1033410334 cache_int(ch, g->zig_target->os);
1033510335 cache_int(ch, g->zig_target->abi);
10336 if (g->zig_target->cpu_features != nullptr) {
10337 const char *ptr;
10338 size_t len;
10339 stage2_cpu_features_get_cache_hash(g->zig_target->cpu_features, &ptr, &len);
10340 cache_str(ch, ptr);
10341 }
1033610342 if (g->zig_target->glibc_version != nullptr) {
1033710343 cache_int(ch, g->zig_target->glibc_version->major);
1033810344 cache_int(ch, g->zig_target->glibc_version->minor);
......@@ -10673,6 +10679,7 @@ CodeGen *create_child_codegen(CodeGen *parent_gen, Buf *root_src_path, OutType o
1067310679 child_gen->verbose_llvm_ir = parent_gen->verbose_llvm_ir;
1067410680 child_gen->verbose_cimport = parent_gen->verbose_cimport;
1067510681 child_gen->verbose_cc = parent_gen->verbose_cc;
10682 child_gen->verbose_llvm_cpu_features = parent_gen->verbose_llvm_cpu_features;
1067610683 child_gen->llvm_argv = parent_gen->llvm_argv;
1067710684 child_gen->dynamic_linker_path = parent_gen->dynamic_linker_path;
1067810685
......@@ -10739,6 +10746,7 @@ CodeGen *codegen_create(Buf *main_pkg_path, Buf *root_src_path, const ZigTarget
1073910746 g->one_possible_values.init(32);
1074010747 g->is_test_build = is_test_build;
1074110748 g->is_single_threaded = false;
10749 g->code_model = CodeModelDefault;
1074210750 buf_resize(&g->global_asm, 0);
1074310751
1074410752 for (size_t i = 0; i < array_length(symbols_that_llvm_depends_on); i += 1) {
src/error.cpp+6
......@@ -58,6 +58,12 @@ const char *err_str(Error err) {
5858 case ErrorNotLazy: return "not lazy";
5959 case ErrorIsAsync: return "is async";
6060 case ErrorImportOutsidePkgPath: return "import of file outside package path";
61 case ErrorUnknownCpu: return "unknown CPU";
62 case ErrorUnknownSubArchitecture: return "unknown sub-architecture";
63 case ErrorUnknownCpuFeature: return "unknown CPU feature";
64 case ErrorInvalidCpuFeatures: return "invalid CPU features";
65 case ErrorInvalidLlvmCpuFeaturesFormat: return "invalid LLVM CPU features format";
66 case ErrorUnknownApplicationBinaryInterface: return "unknown application binary interface";
6167 }
6268 return "(invalid error)";
6369}
src/ir.cpp+7726-6731
......@@ -17,31 +17,33 @@
1717
1818#include <errno.h>
1919
20struct IrExecContext {
21 ZigList<ZigValue *> mem_slot_list;
20struct IrBuilderSrc {
21 CodeGen *codegen;
22 IrExecutableSrc *exec;
23 IrBasicBlockSrc *current_basic_block;
24 AstNode *main_block_node;
2225};
2326
24struct IrBuilder {
27struct IrBuilderGen {
2528 CodeGen *codegen;
26 IrExecutable *exec;
27 IrBasicBlock *current_basic_block;
28 AstNode *main_block_node;
29 IrExecutableGen *exec;
30 IrBasicBlockGen *current_basic_block;
2931};
3032
3133struct IrAnalyze {
3234 CodeGen *codegen;
33 IrBuilder old_irb;
34 IrBuilder new_irb;
35 IrExecContext exec_context;
35 IrBuilderSrc old_irb;
36 IrBuilderGen new_irb;
3637 size_t old_bb_index;
3738 size_t instruction_index;
3839 ZigType *explicit_return_type;
3940 AstNode *explicit_return_type_source_node;
40 ZigList<IrInstruction *> src_implicit_return_type_list;
41 ZigList<IrInstGen *> src_implicit_return_type_list;
4142 ZigList<IrSuspendPosition> resume_stack;
42 IrBasicBlock *const_predecessor_bb;
43 IrBasicBlockSrc *const_predecessor_bb;
4344 size_t ref_count;
4445 size_t break_debug_id; // for debugging purposes
46 IrInstGen *return_ptr;
4547
4648 // For the purpose of using in a debugger
4749 void dump();
......@@ -206,412 +208,538 @@ struct DbgIrBreakPoint {
206208DbgIrBreakPoint dbg_ir_breakpoints_buf[20];
207209size_t dbg_ir_breakpoints_count = 0;
208210
209static IrInstruction *ir_gen_node(IrBuilder *irb, AstNode *node, Scope *scope);
210static IrInstruction *ir_gen_node_extra(IrBuilder *irb, AstNode *node, Scope *scope, LVal lval,
211static IrInstSrc *ir_gen_node(IrBuilderSrc *irb, AstNode *node, Scope *scope);
212static IrInstSrc *ir_gen_node_extra(IrBuilderSrc *irb, AstNode *node, Scope *scope, LVal lval,
211213 ResultLoc *result_loc);
212static IrInstruction *ir_implicit_cast(IrAnalyze *ira, IrInstruction *value, ZigType *expected_type);
213static IrInstruction *ir_implicit_cast2(IrAnalyze *ira, IrInstruction *value_source_instr,
214 IrInstruction *value, ZigType *expected_type);
215static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruction, IrInstruction *ptr,
214static IrInstGen *ir_implicit_cast(IrAnalyze *ira, IrInstGen *value, ZigType *expected_type);
215static IrInstGen *ir_implicit_cast2(IrAnalyze *ira, IrInst *value_source_instr,
216 IrInstGen *value, ZigType *expected_type);
217static IrInstGen *ir_get_deref(IrAnalyze *ira, IrInst *source_instr, IrInstGen *ptr,
216218 ResultLoc *result_loc);
217static ErrorMsg *exec_add_error_node(CodeGen *codegen, IrExecutable *exec, AstNode *source_node, Buf *msg);
218static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_name,
219 IrInstruction *source_instr, IrInstruction *container_ptr, ZigType *container_type, bool initializing);
220static void ir_assert(bool ok, IrInstruction *source_instruction);
221static IrInstruction *ir_get_var_ptr(IrAnalyze *ira, IrInstruction *instruction, ZigVar *var);
222static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstruction *op);
223static IrInstruction *ir_lval_wrap(IrBuilder *irb, Scope *scope, IrInstruction *value, LVal lval, ResultLoc *result_loc);
224static IrInstruction *ir_expr_wrap(IrBuilder *irb, Scope *scope, IrInstruction *inst, ResultLoc *result_loc);
219static ErrorMsg *exec_add_error_node(CodeGen *codegen, IrExecutableSrc *exec, AstNode *source_node, Buf *msg);
220static IrInstGen *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_name,
221 IrInst* source_instr, IrInstGen *container_ptr, IrInst *container_ptr_src,
222 ZigType *container_type, bool initializing);
223static void ir_assert(bool ok, IrInst* source_instruction);
224static void ir_assert_gen(bool ok, IrInstGen *source_instruction);
225static IrInstGen *ir_get_var_ptr(IrAnalyze *ira, IrInst *source_instr, ZigVar *var);
226static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op);
227static IrInstSrc *ir_lval_wrap(IrBuilderSrc *irb, Scope *scope, IrInstSrc *value, LVal lval, ResultLoc *result_loc);
228static IrInstSrc *ir_expr_wrap(IrBuilderSrc *irb, Scope *scope, IrInstSrc *inst, ResultLoc *result_loc);
225229static ZigType *adjust_ptr_align(CodeGen *g, ZigType *ptr_type, uint32_t new_align);
226230static ZigType *adjust_slice_align(CodeGen *g, ZigType *slice_type, uint32_t new_align);
227231static Error buf_read_value_bytes(IrAnalyze *ira, CodeGen *codegen, AstNode *source_node, uint8_t *buf, ZigValue *val);
228232static void buf_write_value_bytes(CodeGen *codegen, uint8_t *buf, ZigValue *val);
229233static Error ir_read_const_ptr(IrAnalyze *ira, CodeGen *codegen, AstNode *source_node,
230234 ZigValue *out_val, ZigValue *ptr_val);
231static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *ptr,
232 ZigType *dest_type, IrInstruction *dest_type_src, bool safety_check_on);
233static ZigValue *ir_resolve_const(IrAnalyze *ira, IrInstruction *value, UndefAllowed undef_allowed);
235static IrInstGen *ir_analyze_ptr_cast(IrAnalyze *ira, IrInst* source_instr, IrInstGen *ptr,
236 IrInst *ptr_src, ZigType *dest_type, IrInst *dest_type_src, bool safety_check_on);
237static ZigValue *ir_resolve_const(IrAnalyze *ira, IrInstGen *value, UndefAllowed undef_allowed);
234238static Error resolve_ptr_align(IrAnalyze *ira, ZigType *ty, uint32_t *result_align);
235static IrInstruction *ir_analyze_int_to_ptr(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target,
239static IrInstGen *ir_analyze_int_to_ptr(IrAnalyze *ira, IrInst* source_instr, IrInstGen *target,
236240 ZigType *ptr_type);
237static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,
241static IrInstGen *ir_analyze_bit_cast(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value,
238242 ZigType *dest_type);
239static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspend_source_instr,
240 ResultLoc *result_loc, ZigType *value_type, IrInstruction *value, bool force_runtime,
241 bool non_null_comptime, bool allow_discard);
242static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_source_instr,
243 ResultLoc *result_loc, ZigType *value_type, IrInstruction *value, bool force_runtime,
244 bool non_null_comptime, bool allow_discard);
245static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstruction *source_instr,
246 IrInstruction *base_ptr, bool safety_check_on, bool initializing);
247static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruction *source_instr,
248 IrInstruction *base_ptr, bool safety_check_on, bool initializing);
249static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *source_instr,
250 IrInstruction *base_ptr, bool initializing);
251static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source_instr,
252 IrInstruction *ptr, IrInstruction *uncasted_value, bool allow_write_through_const);
253static IrInstruction *ir_gen_union_init_expr(IrBuilder *irb, Scope *scope, AstNode *source_node,
254 IrInstruction *union_type, IrInstruction *field_name, AstNode *expr_node,
243static IrInstGen *ir_resolve_result_raw(IrAnalyze *ira, IrInst *suspend_source_instr,
244 ResultLoc *result_loc, ZigType *value_type, IrInstGen *value, bool force_runtime, bool allow_discard);
245static IrInstGen *ir_resolve_result(IrAnalyze *ira, IrInst *suspend_source_instr,
246 ResultLoc *result_loc, ZigType *value_type, IrInstGen *value, bool force_runtime, bool allow_discard);
247static IrInstGen *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInst* source_instr,
248 IrInstGen *base_ptr, bool safety_check_on, bool initializing);
249static IrInstGen *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInst* source_instr,
250 IrInstGen *base_ptr, bool safety_check_on, bool initializing);
251static IrInstGen *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInst* source_instr,
252 IrInstGen *base_ptr, bool initializing);
253static IrInstGen *ir_analyze_store_ptr(IrAnalyze *ira, IrInst* source_instr,
254 IrInstGen *ptr, IrInstGen *uncasted_value, bool allow_write_through_const);
255static IrInstSrc *ir_gen_union_init_expr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
256 IrInstSrc *union_type, IrInstSrc *field_name, AstNode *expr_node,
255257 LVal lval, ResultLoc *parent_result_loc);
256258static void ir_reset_result(ResultLoc *result_loc);
257static Buf *get_anon_type_name(CodeGen *codegen, IrExecutable *exec, const char *kind_name,
259static Buf *get_anon_type_name(CodeGen *codegen, IrExecutableSrc *exec, const char *kind_name,
258260 Scope *scope, AstNode *source_node, Buf *out_bare_name);
259static ResultLocCast *ir_build_cast_result_loc(IrBuilder *irb, IrInstruction *dest_type,
261static ResultLocCast *ir_build_cast_result_loc(IrBuilderSrc *irb, IrInstSrc *dest_type,
260262 ResultLoc *parent_result_loc);
261static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction *source_instr,
262 TypeStructField *field, IrInstruction *struct_ptr, ZigType *struct_type, bool initializing);
263static IrInstruction *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_name,
264 IrInstruction *source_instr, IrInstruction *container_ptr, ZigType *container_type);
263static IrInstGen *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInst* source_instr,
264 TypeStructField *field, IrInstGen *struct_ptr, ZigType *struct_type, bool initializing);
265static IrInstGen *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_name,
266 IrInst* source_instr, IrInstGen *container_ptr, ZigType *container_type);
265267static ResultLoc *no_result_loc(void);
266static IrInstruction *ir_analyze_test_non_null(IrAnalyze *ira, IrInstruction *source_inst, IrInstruction *value);
268static IrInstGen *ir_analyze_test_non_null(IrAnalyze *ira, IrInst *source_inst, IrInstGen *value);
269static IrInstGen *ir_error_dependency_loop(IrAnalyze *ira, IrInst *source_instr);
270
271static void destroy_instruction_src(IrInstSrc *inst) {
272#ifdef ZIG_ENABLE_MEM_PROFILE
273 const char *name = ir_inst_src_type_str(inst->id);
274#else
275 const char *name = nullptr;
276#endif
277 switch (inst->id) {
278 case IrInstSrcIdInvalid:
279 zig_unreachable();
280 case IrInstSrcIdReturn:
281 return destroy(reinterpret_cast<IrInstSrcReturn *>(inst), name);
282 case IrInstSrcIdConst:
283 return destroy(reinterpret_cast<IrInstSrcConst *>(inst), name);
284 case IrInstSrcIdBinOp:
285 return destroy(reinterpret_cast<IrInstSrcBinOp *>(inst), name);
286 case IrInstSrcIdMergeErrSets:
287 return destroy(reinterpret_cast<IrInstSrcMergeErrSets *>(inst), name);
288 case IrInstSrcIdDeclVar:
289 return destroy(reinterpret_cast<IrInstSrcDeclVar *>(inst), name);
290 case IrInstSrcIdCall:
291 return destroy(reinterpret_cast<IrInstSrcCall *>(inst), name);
292 case IrInstSrcIdCallExtra:
293 return destroy(reinterpret_cast<IrInstSrcCallExtra *>(inst), name);
294 case IrInstSrcIdUnOp:
295 return destroy(reinterpret_cast<IrInstSrcUnOp *>(inst), name);
296 case IrInstSrcIdCondBr:
297 return destroy(reinterpret_cast<IrInstSrcCondBr *>(inst), name);
298 case IrInstSrcIdBr:
299 return destroy(reinterpret_cast<IrInstSrcBr *>(inst), name);
300 case IrInstSrcIdPhi:
301 return destroy(reinterpret_cast<IrInstSrcPhi *>(inst), name);
302 case IrInstSrcIdContainerInitList:
303 return destroy(reinterpret_cast<IrInstSrcContainerInitList *>(inst), name);
304 case IrInstSrcIdContainerInitFields:
305 return destroy(reinterpret_cast<IrInstSrcContainerInitFields *>(inst), name);
306 case IrInstSrcIdUnreachable:
307 return destroy(reinterpret_cast<IrInstSrcUnreachable *>(inst), name);
308 case IrInstSrcIdElemPtr:
309 return destroy(reinterpret_cast<IrInstSrcElemPtr *>(inst), name);
310 case IrInstSrcIdVarPtr:
311 return destroy(reinterpret_cast<IrInstSrcVarPtr *>(inst), name);
312 case IrInstSrcIdLoadPtr:
313 return destroy(reinterpret_cast<IrInstSrcLoadPtr *>(inst), name);
314 case IrInstSrcIdStorePtr:
315 return destroy(reinterpret_cast<IrInstSrcStorePtr *>(inst), name);
316 case IrInstSrcIdTypeOf:
317 return destroy(reinterpret_cast<IrInstSrcTypeOf *>(inst), name);
318 case IrInstSrcIdFieldPtr:
319 return destroy(reinterpret_cast<IrInstSrcFieldPtr *>(inst), name);
320 case IrInstSrcIdSetCold:
321 return destroy(reinterpret_cast<IrInstSrcSetCold *>(inst), name);
322 case IrInstSrcIdSetRuntimeSafety:
323 return destroy(reinterpret_cast<IrInstSrcSetRuntimeSafety *>(inst), name);
324 case IrInstSrcIdSetFloatMode:
325 return destroy(reinterpret_cast<IrInstSrcSetFloatMode *>(inst), name);
326 case IrInstSrcIdArrayType:
327 return destroy(reinterpret_cast<IrInstSrcArrayType *>(inst), name);
328 case IrInstSrcIdSliceType:
329 return destroy(reinterpret_cast<IrInstSrcSliceType *>(inst), name);
330 case IrInstSrcIdAnyFrameType:
331 return destroy(reinterpret_cast<IrInstSrcAnyFrameType *>(inst), name);
332 case IrInstSrcIdAsm:
333 return destroy(reinterpret_cast<IrInstSrcAsm *>(inst), name);
334 case IrInstSrcIdSizeOf:
335 return destroy(reinterpret_cast<IrInstSrcSizeOf *>(inst), name);
336 case IrInstSrcIdTestNonNull:
337 return destroy(reinterpret_cast<IrInstSrcTestNonNull *>(inst), name);
338 case IrInstSrcIdOptionalUnwrapPtr:
339 return destroy(reinterpret_cast<IrInstSrcOptionalUnwrapPtr *>(inst), name);
340 case IrInstSrcIdPopCount:
341 return destroy(reinterpret_cast<IrInstSrcPopCount *>(inst), name);
342 case IrInstSrcIdClz:
343 return destroy(reinterpret_cast<IrInstSrcClz *>(inst), name);
344 case IrInstSrcIdCtz:
345 return destroy(reinterpret_cast<IrInstSrcCtz *>(inst), name);
346 case IrInstSrcIdBswap:
347 return destroy(reinterpret_cast<IrInstSrcBswap *>(inst), name);
348 case IrInstSrcIdBitReverse:
349 return destroy(reinterpret_cast<IrInstSrcBitReverse *>(inst), name);
350 case IrInstSrcIdSwitchBr:
351 return destroy(reinterpret_cast<IrInstSrcSwitchBr *>(inst), name);
352 case IrInstSrcIdSwitchVar:
353 return destroy(reinterpret_cast<IrInstSrcSwitchVar *>(inst), name);
354 case IrInstSrcIdSwitchElseVar:
355 return destroy(reinterpret_cast<IrInstSrcSwitchElseVar *>(inst), name);
356 case IrInstSrcIdSwitchTarget:
357 return destroy(reinterpret_cast<IrInstSrcSwitchTarget *>(inst), name);
358 case IrInstSrcIdImport:
359 return destroy(reinterpret_cast<IrInstSrcImport *>(inst), name);
360 case IrInstSrcIdRef:
361 return destroy(reinterpret_cast<IrInstSrcRef *>(inst), name);
362 case IrInstSrcIdCompileErr:
363 return destroy(reinterpret_cast<IrInstSrcCompileErr *>(inst), name);
364 case IrInstSrcIdCompileLog:
365 return destroy(reinterpret_cast<IrInstSrcCompileLog *>(inst), name);
366 case IrInstSrcIdErrName:
367 return destroy(reinterpret_cast<IrInstSrcErrName *>(inst), name);
368 case IrInstSrcIdCImport:
369 return destroy(reinterpret_cast<IrInstSrcCImport *>(inst), name);
370 case IrInstSrcIdCInclude:
371 return destroy(reinterpret_cast<IrInstSrcCInclude *>(inst), name);
372 case IrInstSrcIdCDefine:
373 return destroy(reinterpret_cast<IrInstSrcCDefine *>(inst), name);
374 case IrInstSrcIdCUndef:
375 return destroy(reinterpret_cast<IrInstSrcCUndef *>(inst), name);
376 case IrInstSrcIdEmbedFile:
377 return destroy(reinterpret_cast<IrInstSrcEmbedFile *>(inst), name);
378 case IrInstSrcIdCmpxchg:
379 return destroy(reinterpret_cast<IrInstSrcCmpxchg *>(inst), name);
380 case IrInstSrcIdFence:
381 return destroy(reinterpret_cast<IrInstSrcFence *>(inst), name);
382 case IrInstSrcIdTruncate:
383 return destroy(reinterpret_cast<IrInstSrcTruncate *>(inst), name);
384 case IrInstSrcIdIntCast:
385 return destroy(reinterpret_cast<IrInstSrcIntCast *>(inst), name);
386 case IrInstSrcIdFloatCast:
387 return destroy(reinterpret_cast<IrInstSrcFloatCast *>(inst), name);
388 case IrInstSrcIdErrSetCast:
389 return destroy(reinterpret_cast<IrInstSrcErrSetCast *>(inst), name);
390 case IrInstSrcIdFromBytes:
391 return destroy(reinterpret_cast<IrInstSrcFromBytes *>(inst), name);
392 case IrInstSrcIdToBytes:
393 return destroy(reinterpret_cast<IrInstSrcToBytes *>(inst), name);
394 case IrInstSrcIdIntToFloat:
395 return destroy(reinterpret_cast<IrInstSrcIntToFloat *>(inst), name);
396 case IrInstSrcIdFloatToInt:
397 return destroy(reinterpret_cast<IrInstSrcFloatToInt *>(inst), name);
398 case IrInstSrcIdBoolToInt:
399 return destroy(reinterpret_cast<IrInstSrcBoolToInt *>(inst), name);
400 case IrInstSrcIdIntType:
401 return destroy(reinterpret_cast<IrInstSrcIntType *>(inst), name);
402 case IrInstSrcIdVectorType:
403 return destroy(reinterpret_cast<IrInstSrcVectorType *>(inst), name);
404 case IrInstSrcIdShuffleVector:
405 return destroy(reinterpret_cast<IrInstSrcShuffleVector *>(inst), name);
406 case IrInstSrcIdSplat:
407 return destroy(reinterpret_cast<IrInstSrcSplat *>(inst), name);
408 case IrInstSrcIdBoolNot:
409 return destroy(reinterpret_cast<IrInstSrcBoolNot *>(inst), name);
410 case IrInstSrcIdMemset:
411 return destroy(reinterpret_cast<IrInstSrcMemset *>(inst), name);
412 case IrInstSrcIdMemcpy:
413 return destroy(reinterpret_cast<IrInstSrcMemcpy *>(inst), name);
414 case IrInstSrcIdSlice:
415 return destroy(reinterpret_cast<IrInstSrcSlice *>(inst), name);
416 case IrInstSrcIdMemberCount:
417 return destroy(reinterpret_cast<IrInstSrcMemberCount *>(inst), name);
418 case IrInstSrcIdMemberType:
419 return destroy(reinterpret_cast<IrInstSrcMemberType *>(inst), name);
420 case IrInstSrcIdMemberName:
421 return destroy(reinterpret_cast<IrInstSrcMemberName *>(inst), name);
422 case IrInstSrcIdBreakpoint:
423 return destroy(reinterpret_cast<IrInstSrcBreakpoint *>(inst), name);
424 case IrInstSrcIdReturnAddress:
425 return destroy(reinterpret_cast<IrInstSrcReturnAddress *>(inst), name);
426 case IrInstSrcIdFrameAddress:
427 return destroy(reinterpret_cast<IrInstSrcFrameAddress *>(inst), name);
428 case IrInstSrcIdFrameHandle:
429 return destroy(reinterpret_cast<IrInstSrcFrameHandle *>(inst), name);
430 case IrInstSrcIdFrameType:
431 return destroy(reinterpret_cast<IrInstSrcFrameType *>(inst), name);
432 case IrInstSrcIdFrameSize:
433 return destroy(reinterpret_cast<IrInstSrcFrameSize *>(inst), name);
434 case IrInstSrcIdAlignOf:
435 return destroy(reinterpret_cast<IrInstSrcAlignOf *>(inst), name);
436 case IrInstSrcIdOverflowOp:
437 return destroy(reinterpret_cast<IrInstSrcOverflowOp *>(inst), name);
438 case IrInstSrcIdTestErr:
439 return destroy(reinterpret_cast<IrInstSrcTestErr *>(inst), name);
440 case IrInstSrcIdUnwrapErrCode:
441 return destroy(reinterpret_cast<IrInstSrcUnwrapErrCode *>(inst), name);
442 case IrInstSrcIdUnwrapErrPayload:
443 return destroy(reinterpret_cast<IrInstSrcUnwrapErrPayload *>(inst), name);
444 case IrInstSrcIdFnProto:
445 return destroy(reinterpret_cast<IrInstSrcFnProto *>(inst), name);
446 case IrInstSrcIdTestComptime:
447 return destroy(reinterpret_cast<IrInstSrcTestComptime *>(inst), name);
448 case IrInstSrcIdPtrCast:
449 return destroy(reinterpret_cast<IrInstSrcPtrCast *>(inst), name);
450 case IrInstSrcIdBitCast:
451 return destroy(reinterpret_cast<IrInstSrcBitCast *>(inst), name);
452 case IrInstSrcIdPtrToInt:
453 return destroy(reinterpret_cast<IrInstSrcPtrToInt *>(inst), name);
454 case IrInstSrcIdIntToPtr:
455 return destroy(reinterpret_cast<IrInstSrcIntToPtr *>(inst), name);
456 case IrInstSrcIdIntToEnum:
457 return destroy(reinterpret_cast<IrInstSrcIntToEnum *>(inst), name);
458 case IrInstSrcIdIntToErr:
459 return destroy(reinterpret_cast<IrInstSrcIntToErr *>(inst), name);
460 case IrInstSrcIdErrToInt:
461 return destroy(reinterpret_cast<IrInstSrcErrToInt *>(inst), name);
462 case IrInstSrcIdCheckSwitchProngs:
463 return destroy(reinterpret_cast<IrInstSrcCheckSwitchProngs *>(inst), name);
464 case IrInstSrcIdCheckStatementIsVoid:
465 return destroy(reinterpret_cast<IrInstSrcCheckStatementIsVoid *>(inst), name);
466 case IrInstSrcIdTypeName:
467 return destroy(reinterpret_cast<IrInstSrcTypeName *>(inst), name);
468 case IrInstSrcIdTagName:
469 return destroy(reinterpret_cast<IrInstSrcTagName *>(inst), name);
470 case IrInstSrcIdPtrType:
471 return destroy(reinterpret_cast<IrInstSrcPtrType *>(inst), name);
472 case IrInstSrcIdDeclRef:
473 return destroy(reinterpret_cast<IrInstSrcDeclRef *>(inst), name);
474 case IrInstSrcIdPanic:
475 return destroy(reinterpret_cast<IrInstSrcPanic *>(inst), name);
476 case IrInstSrcIdFieldParentPtr:
477 return destroy(reinterpret_cast<IrInstSrcFieldParentPtr *>(inst), name);
478 case IrInstSrcIdByteOffsetOf:
479 return destroy(reinterpret_cast<IrInstSrcByteOffsetOf *>(inst), name);
480 case IrInstSrcIdBitOffsetOf:
481 return destroy(reinterpret_cast<IrInstSrcBitOffsetOf *>(inst), name);
482 case IrInstSrcIdTypeInfo:
483 return destroy(reinterpret_cast<IrInstSrcTypeInfo *>(inst), name);
484 case IrInstSrcIdType:
485 return destroy(reinterpret_cast<IrInstSrcType *>(inst), name);
486 case IrInstSrcIdHasField:
487 return destroy(reinterpret_cast<IrInstSrcHasField *>(inst), name);
488 case IrInstSrcIdTypeId:
489 return destroy(reinterpret_cast<IrInstSrcTypeId *>(inst), name);
490 case IrInstSrcIdSetEvalBranchQuota:
491 return destroy(reinterpret_cast<IrInstSrcSetEvalBranchQuota *>(inst), name);
492 case IrInstSrcIdAlignCast:
493 return destroy(reinterpret_cast<IrInstSrcAlignCast *>(inst), name);
494 case IrInstSrcIdImplicitCast:
495 return destroy(reinterpret_cast<IrInstSrcImplicitCast *>(inst), name);
496 case IrInstSrcIdResolveResult:
497 return destroy(reinterpret_cast<IrInstSrcResolveResult *>(inst), name);
498 case IrInstSrcIdResetResult:
499 return destroy(reinterpret_cast<IrInstSrcResetResult *>(inst), name);
500 case IrInstSrcIdOpaqueType:
501 return destroy(reinterpret_cast<IrInstSrcOpaqueType *>(inst), name);
502 case IrInstSrcIdSetAlignStack:
503 return destroy(reinterpret_cast<IrInstSrcSetAlignStack *>(inst), name);
504 case IrInstSrcIdArgType:
505 return destroy(reinterpret_cast<IrInstSrcArgType *>(inst), name);
506 case IrInstSrcIdTagType:
507 return destroy(reinterpret_cast<IrInstSrcTagType *>(inst), name);
508 case IrInstSrcIdExport:
509 return destroy(reinterpret_cast<IrInstSrcExport *>(inst), name);
510 case IrInstSrcIdErrorReturnTrace:
511 return destroy(reinterpret_cast<IrInstSrcErrorReturnTrace *>(inst), name);
512 case IrInstSrcIdErrorUnion:
513 return destroy(reinterpret_cast<IrInstSrcErrorUnion *>(inst), name);
514 case IrInstSrcIdAtomicRmw:
515 return destroy(reinterpret_cast<IrInstSrcAtomicRmw *>(inst), name);
516 case IrInstSrcIdSaveErrRetAddr:
517 return destroy(reinterpret_cast<IrInstSrcSaveErrRetAddr *>(inst), name);
518 case IrInstSrcIdAddImplicitReturnType:
519 return destroy(reinterpret_cast<IrInstSrcAddImplicitReturnType *>(inst), name);
520 case IrInstSrcIdFloatOp:
521 return destroy(reinterpret_cast<IrInstSrcFloatOp *>(inst), name);
522 case IrInstSrcIdMulAdd:
523 return destroy(reinterpret_cast<IrInstSrcMulAdd *>(inst), name);
524 case IrInstSrcIdAtomicLoad:
525 return destroy(reinterpret_cast<IrInstSrcAtomicLoad *>(inst), name);
526 case IrInstSrcIdAtomicStore:
527 return destroy(reinterpret_cast<IrInstSrcAtomicStore *>(inst), name);
528 case IrInstSrcIdEnumToInt:
529 return destroy(reinterpret_cast<IrInstSrcEnumToInt *>(inst), name);
530 case IrInstSrcIdCheckRuntimeScope:
531 return destroy(reinterpret_cast<IrInstSrcCheckRuntimeScope *>(inst), name);
532 case IrInstSrcIdHasDecl:
533 return destroy(reinterpret_cast<IrInstSrcHasDecl *>(inst), name);
534 case IrInstSrcIdUndeclaredIdent:
535 return destroy(reinterpret_cast<IrInstSrcUndeclaredIdent *>(inst), name);
536 case IrInstSrcIdAlloca:
537 return destroy(reinterpret_cast<IrInstSrcAlloca *>(inst), name);
538 case IrInstSrcIdEndExpr:
539 return destroy(reinterpret_cast<IrInstSrcEndExpr *>(inst), name);
540 case IrInstSrcIdUnionInitNamedField:
541 return destroy(reinterpret_cast<IrInstSrcUnionInitNamedField *>(inst), name);
542 case IrInstSrcIdSuspendBegin:
543 return destroy(reinterpret_cast<IrInstSrcSuspendBegin *>(inst), name);
544 case IrInstSrcIdSuspendFinish:
545 return destroy(reinterpret_cast<IrInstSrcSuspendFinish *>(inst), name);
546 case IrInstSrcIdResume:
547 return destroy(reinterpret_cast<IrInstSrcResume *>(inst), name);
548 case IrInstSrcIdAwait:
549 return destroy(reinterpret_cast<IrInstSrcAwait *>(inst), name);
550 case IrInstSrcIdSpillBegin:
551 return destroy(reinterpret_cast<IrInstSrcSpillBegin *>(inst), name);
552 case IrInstSrcIdSpillEnd:
553 return destroy(reinterpret_cast<IrInstSrcSpillEnd *>(inst), name);
554 case IrInstSrcIdCallArgs:
555 return destroy(reinterpret_cast<IrInstSrcCallArgs *>(inst), name);
556 }
557 zig_unreachable();
558}
267559
268static void destroy_instruction(IrInstruction *inst) {
560void destroy_instruction_gen(IrInstGen *inst) {
269561#ifdef ZIG_ENABLE_MEM_PROFILE
270 const char *name = ir_instruction_type_str(inst->id);
562 const char *name = ir_inst_gen_type_str(inst->id);
271563#else
272564 const char *name = nullptr;
273565#endif
274566 switch (inst->id) {
275 case IrInstructionIdInvalid:
567 case IrInstGenIdInvalid:
276568 zig_unreachable();
277 case IrInstructionIdReturn:
278 return destroy(reinterpret_cast<IrInstructionReturn *>(inst), name);
279 case IrInstructionIdConst:
280 return destroy(reinterpret_cast<IrInstructionConst *>(inst), name);
281 case IrInstructionIdBinOp:
282 return destroy(reinterpret_cast<IrInstructionBinOp *>(inst), name);
283 case IrInstructionIdMergeErrSets:
284 return destroy(reinterpret_cast<IrInstructionMergeErrSets *>(inst), name);
285 case IrInstructionIdDeclVarSrc:
286 return destroy(reinterpret_cast<IrInstructionDeclVarSrc *>(inst), name);
287 case IrInstructionIdCast:
288 return destroy(reinterpret_cast<IrInstructionCast *>(inst), name);
289 case IrInstructionIdCallSrc:
290 return destroy(reinterpret_cast<IrInstructionCallSrc *>(inst), name);
291 case IrInstructionIdCallSrcArgs:
292 return destroy(reinterpret_cast<IrInstructionCallSrcArgs *>(inst), name);
293 case IrInstructionIdCallExtra:
294 return destroy(reinterpret_cast<IrInstructionCallExtra *>(inst), name);
295 case IrInstructionIdCallGen:
296 return destroy(reinterpret_cast<IrInstructionCallGen *>(inst), name);
297 case IrInstructionIdUnOp:
298 return destroy(reinterpret_cast<IrInstructionUnOp *>(inst), name);
299 case IrInstructionIdCondBr:
300 return destroy(reinterpret_cast<IrInstructionCondBr *>(inst), name);
301 case IrInstructionIdBr:
302 return destroy(reinterpret_cast<IrInstructionBr *>(inst), name);
303 case IrInstructionIdPhi:
304 return destroy(reinterpret_cast<IrInstructionPhi *>(inst), name);
305 case IrInstructionIdContainerInitList:
306 return destroy(reinterpret_cast<IrInstructionContainerInitList *>(inst), name);
307 case IrInstructionIdContainerInitFields:
308 return destroy(reinterpret_cast<IrInstructionContainerInitFields *>(inst), name);
309 case IrInstructionIdUnreachable:
310 return destroy(reinterpret_cast<IrInstructionUnreachable *>(inst), name);
311 case IrInstructionIdElemPtr:
312 return destroy(reinterpret_cast<IrInstructionElemPtr *>(inst), name);
313 case IrInstructionIdVarPtr:
314 return destroy(reinterpret_cast<IrInstructionVarPtr *>(inst), name);
315 case IrInstructionIdReturnPtr:
316 return destroy(reinterpret_cast<IrInstructionReturnPtr *>(inst), name);
317 case IrInstructionIdLoadPtr:
318 return destroy(reinterpret_cast<IrInstructionLoadPtr *>(inst), name);
319 case IrInstructionIdLoadPtrGen:
320 return destroy(reinterpret_cast<IrInstructionLoadPtrGen *>(inst), name);
321 case IrInstructionIdStorePtr:
322 return destroy(reinterpret_cast<IrInstructionStorePtr *>(inst), name);
323 case IrInstructionIdVectorStoreElem:
324 return destroy(reinterpret_cast<IrInstructionVectorStoreElem *>(inst), name);
325 case IrInstructionIdTypeOf:
326 return destroy(reinterpret_cast<IrInstructionTypeOf *>(inst), name);
327 case IrInstructionIdFieldPtr:
328 return destroy(reinterpret_cast<IrInstructionFieldPtr *>(inst), name);
329 case IrInstructionIdStructFieldPtr:
330 return destroy(reinterpret_cast<IrInstructionStructFieldPtr *>(inst), name);
331 case IrInstructionIdUnionFieldPtr:
332 return destroy(reinterpret_cast<IrInstructionUnionFieldPtr *>(inst), name);
333 case IrInstructionIdSetCold:
334 return destroy(reinterpret_cast<IrInstructionSetCold *>(inst), name);
335 case IrInstructionIdSetRuntimeSafety:
336 return destroy(reinterpret_cast<IrInstructionSetRuntimeSafety *>(inst), name);
337 case IrInstructionIdSetFloatMode:
338 return destroy(reinterpret_cast<IrInstructionSetFloatMode *>(inst), name);
339 case IrInstructionIdArrayType:
340 return destroy(reinterpret_cast<IrInstructionArrayType *>(inst), name);
341 case IrInstructionIdSliceType:
342 return destroy(reinterpret_cast<IrInstructionSliceType *>(inst), name);
343 case IrInstructionIdAnyFrameType:
344 return destroy(reinterpret_cast<IrInstructionAnyFrameType *>(inst), name);
345 case IrInstructionIdAsmSrc:
346 return destroy(reinterpret_cast<IrInstructionAsmSrc *>(inst), name);
347 case IrInstructionIdAsmGen:
348 return destroy(reinterpret_cast<IrInstructionAsmGen *>(inst), name);
349 case IrInstructionIdSizeOf:
350 return destroy(reinterpret_cast<IrInstructionSizeOf *>(inst), name);
351 case IrInstructionIdTestNonNull:
352 return destroy(reinterpret_cast<IrInstructionTestNonNull *>(inst), name);
353 case IrInstructionIdOptionalUnwrapPtr:
354 return destroy(reinterpret_cast<IrInstructionOptionalUnwrapPtr *>(inst), name);
355 case IrInstructionIdPopCount:
356 return destroy(reinterpret_cast<IrInstructionPopCount *>(inst), name);
357 case IrInstructionIdClz:
358 return destroy(reinterpret_cast<IrInstructionClz *>(inst), name);
359 case IrInstructionIdCtz:
360 return destroy(reinterpret_cast<IrInstructionCtz *>(inst), name);
361 case IrInstructionIdBswap:
362 return destroy(reinterpret_cast<IrInstructionBswap *>(inst), name);
363 case IrInstructionIdBitReverse:
364 return destroy(reinterpret_cast<IrInstructionBitReverse *>(inst), name);
365 case IrInstructionIdSwitchBr:
366 return destroy(reinterpret_cast<IrInstructionSwitchBr *>(inst), name);
367 case IrInstructionIdSwitchVar:
368 return destroy(reinterpret_cast<IrInstructionSwitchVar *>(inst), name);
369 case IrInstructionIdSwitchElseVar:
370 return destroy(reinterpret_cast<IrInstructionSwitchElseVar *>(inst), name);
371 case IrInstructionIdSwitchTarget:
372 return destroy(reinterpret_cast<IrInstructionSwitchTarget *>(inst), name);
373 case IrInstructionIdUnionTag:
374 return destroy(reinterpret_cast<IrInstructionUnionTag *>(inst), name);
375 case IrInstructionIdImport:
376 return destroy(reinterpret_cast<IrInstructionImport *>(inst), name);
377 case IrInstructionIdRef:
378 return destroy(reinterpret_cast<IrInstructionRef *>(inst), name);
379 case IrInstructionIdRefGen:
380 return destroy(reinterpret_cast<IrInstructionRefGen *>(inst), name);
381 case IrInstructionIdCompileErr:
382 return destroy(reinterpret_cast<IrInstructionCompileErr *>(inst), name);
383 case IrInstructionIdCompileLog:
384 return destroy(reinterpret_cast<IrInstructionCompileLog *>(inst), name);
385 case IrInstructionIdErrName:
386 return destroy(reinterpret_cast<IrInstructionErrName *>(inst), name);
387 case IrInstructionIdCImport:
388 return destroy(reinterpret_cast<IrInstructionCImport *>(inst), name);
389 case IrInstructionIdCInclude:
390 return destroy(reinterpret_cast<IrInstructionCInclude *>(inst), name);
391 case IrInstructionIdCDefine:
392 return destroy(reinterpret_cast<IrInstructionCDefine *>(inst), name);
393 case IrInstructionIdCUndef:
394 return destroy(reinterpret_cast<IrInstructionCUndef *>(inst), name);
395 case IrInstructionIdEmbedFile:
396 return destroy(reinterpret_cast<IrInstructionEmbedFile *>(inst), name);
397 case IrInstructionIdCmpxchgSrc:
398 return destroy(reinterpret_cast<IrInstructionCmpxchgSrc *>(inst), name);
399 case IrInstructionIdCmpxchgGen:
400 return destroy(reinterpret_cast<IrInstructionCmpxchgGen *>(inst), name);
401 case IrInstructionIdFence:
402 return destroy(reinterpret_cast<IrInstructionFence *>(inst), name);
403 case IrInstructionIdTruncate:
404 return destroy(reinterpret_cast<IrInstructionTruncate *>(inst), name);
405 case IrInstructionIdIntCast:
406 return destroy(reinterpret_cast<IrInstructionIntCast *>(inst), name);
407 case IrInstructionIdFloatCast:
408 return destroy(reinterpret_cast<IrInstructionFloatCast *>(inst), name);
409 case IrInstructionIdErrSetCast:
410 return destroy(reinterpret_cast<IrInstructionErrSetCast *>(inst), name);
411 case IrInstructionIdFromBytes:
412 return destroy(reinterpret_cast<IrInstructionFromBytes *>(inst), name);
413 case IrInstructionIdToBytes:
414 return destroy(reinterpret_cast<IrInstructionToBytes *>(inst), name);
415 case IrInstructionIdIntToFloat:
416 return destroy(reinterpret_cast<IrInstructionIntToFloat *>(inst), name);
417 case IrInstructionIdFloatToInt:
418 return destroy(reinterpret_cast<IrInstructionFloatToInt *>(inst), name);
419 case IrInstructionIdBoolToInt:
420 return destroy(reinterpret_cast<IrInstructionBoolToInt *>(inst), name);
421 case IrInstructionIdIntType:
422 return destroy(reinterpret_cast<IrInstructionIntType *>(inst), name);
423 case IrInstructionIdVectorType:
424 return destroy(reinterpret_cast<IrInstructionVectorType *>(inst), name);
425 case IrInstructionIdShuffleVector:
426 return destroy(reinterpret_cast<IrInstructionShuffleVector *>(inst), name);
427 case IrInstructionIdSplatSrc:
428 return destroy(reinterpret_cast<IrInstructionSplatSrc *>(inst), name);
429 case IrInstructionIdSplatGen:
430 return destroy(reinterpret_cast<IrInstructionSplatGen *>(inst), name);
431 case IrInstructionIdBoolNot:
432 return destroy(reinterpret_cast<IrInstructionBoolNot *>(inst), name);
433 case IrInstructionIdMemset:
434 return destroy(reinterpret_cast<IrInstructionMemset *>(inst), name);
435 case IrInstructionIdMemcpy:
436 return destroy(reinterpret_cast<IrInstructionMemcpy *>(inst), name);
437 case IrInstructionIdSliceSrc:
438 return destroy(reinterpret_cast<IrInstructionSliceSrc *>(inst), name);
439 case IrInstructionIdSliceGen:
440 return destroy(reinterpret_cast<IrInstructionSliceGen *>(inst), name);
441 case IrInstructionIdMemberCount:
442 return destroy(reinterpret_cast<IrInstructionMemberCount *>(inst), name);
443 case IrInstructionIdMemberType:
444 return destroy(reinterpret_cast<IrInstructionMemberType *>(inst), name);
445 case IrInstructionIdMemberName:
446 return destroy(reinterpret_cast<IrInstructionMemberName *>(inst), name);
447 case IrInstructionIdBreakpoint:
448 return destroy(reinterpret_cast<IrInstructionBreakpoint *>(inst), name);
449 case IrInstructionIdReturnAddress:
450 return destroy(reinterpret_cast<IrInstructionReturnAddress *>(inst), name);
451 case IrInstructionIdFrameAddress:
452 return destroy(reinterpret_cast<IrInstructionFrameAddress *>(inst), name);
453 case IrInstructionIdFrameHandle:
454 return destroy(reinterpret_cast<IrInstructionFrameHandle *>(inst), name);
455 case IrInstructionIdFrameType:
456 return destroy(reinterpret_cast<IrInstructionFrameType *>(inst), name);
457 case IrInstructionIdFrameSizeSrc:
458 return destroy(reinterpret_cast<IrInstructionFrameSizeSrc *>(inst), name);
459 case IrInstructionIdFrameSizeGen:
460 return destroy(reinterpret_cast<IrInstructionFrameSizeGen *>(inst), name);
461 case IrInstructionIdAlignOf:
462 return destroy(reinterpret_cast<IrInstructionAlignOf *>(inst), name);
463 case IrInstructionIdOverflowOp:
464 return destroy(reinterpret_cast<IrInstructionOverflowOp *>(inst), name);
465 case IrInstructionIdTestErrSrc:
466 return destroy(reinterpret_cast<IrInstructionTestErrSrc *>(inst), name);
467 case IrInstructionIdTestErrGen:
468 return destroy(reinterpret_cast<IrInstructionTestErrGen *>(inst), name);
469 case IrInstructionIdUnwrapErrCode:
470 return destroy(reinterpret_cast<IrInstructionUnwrapErrCode *>(inst), name);
471 case IrInstructionIdUnwrapErrPayload:
472 return destroy(reinterpret_cast<IrInstructionUnwrapErrPayload *>(inst), name);
473 case IrInstructionIdOptionalWrap:
474 return destroy(reinterpret_cast<IrInstructionOptionalWrap *>(inst), name);
475 case IrInstructionIdErrWrapCode:
476 return destroy(reinterpret_cast<IrInstructionErrWrapCode *>(inst), name);
477 case IrInstructionIdErrWrapPayload:
478 return destroy(reinterpret_cast<IrInstructionErrWrapPayload *>(inst), name);
479 case IrInstructionIdFnProto:
480 return destroy(reinterpret_cast<IrInstructionFnProto *>(inst), name);
481 case IrInstructionIdTestComptime:
482 return destroy(reinterpret_cast<IrInstructionTestComptime *>(inst), name);
483 case IrInstructionIdPtrCastSrc:
484 return destroy(reinterpret_cast<IrInstructionPtrCastSrc *>(inst), name);
485 case IrInstructionIdPtrCastGen:
486 return destroy(reinterpret_cast<IrInstructionPtrCastGen *>(inst), name);
487 case IrInstructionIdBitCastSrc:
488 return destroy(reinterpret_cast<IrInstructionBitCastSrc *>(inst), name);
489 case IrInstructionIdBitCastGen:
490 return destroy(reinterpret_cast<IrInstructionBitCastGen *>(inst), name);
491 case IrInstructionIdWidenOrShorten:
492 return destroy(reinterpret_cast<IrInstructionWidenOrShorten *>(inst), name);
493 case IrInstructionIdPtrToInt:
494 return destroy(reinterpret_cast<IrInstructionPtrToInt *>(inst), name);
495 case IrInstructionIdIntToPtr:
496 return destroy(reinterpret_cast<IrInstructionIntToPtr *>(inst), name);
497 case IrInstructionIdIntToEnum:
498 return destroy(reinterpret_cast<IrInstructionIntToEnum *>(inst), name);
499 case IrInstructionIdIntToErr:
500 return destroy(reinterpret_cast<IrInstructionIntToErr *>(inst), name);
501 case IrInstructionIdErrToInt:
502 return destroy(reinterpret_cast<IrInstructionErrToInt *>(inst), name);
503 case IrInstructionIdCheckSwitchProngs:
504 return destroy(reinterpret_cast<IrInstructionCheckSwitchProngs *>(inst), name);
505 case IrInstructionIdCheckStatementIsVoid:
506 return destroy(reinterpret_cast<IrInstructionCheckStatementIsVoid *>(inst), name);
507 case IrInstructionIdTypeName:
508 return destroy(reinterpret_cast<IrInstructionTypeName *>(inst), name);
509 case IrInstructionIdTagName:
510 return destroy(reinterpret_cast<IrInstructionTagName *>(inst), name);
511 case IrInstructionIdPtrType:
512 return destroy(reinterpret_cast<IrInstructionPtrType *>(inst), name);
513 case IrInstructionIdDeclRef:
514 return destroy(reinterpret_cast<IrInstructionDeclRef *>(inst), name);
515 case IrInstructionIdPanic:
516 return destroy(reinterpret_cast<IrInstructionPanic *>(inst), name);
517 case IrInstructionIdFieldParentPtr:
518 return destroy(reinterpret_cast<IrInstructionFieldParentPtr *>(inst), name);
519 case IrInstructionIdByteOffsetOf:
520 return destroy(reinterpret_cast<IrInstructionByteOffsetOf *>(inst), name);
521 case IrInstructionIdBitOffsetOf:
522 return destroy(reinterpret_cast<IrInstructionBitOffsetOf *>(inst), name);
523 case IrInstructionIdTypeInfo:
524 return destroy(reinterpret_cast<IrInstructionTypeInfo *>(inst), name);
525 case IrInstructionIdType:
526 return destroy(reinterpret_cast<IrInstructionType *>(inst), name);
527 case IrInstructionIdHasField:
528 return destroy(reinterpret_cast<IrInstructionHasField *>(inst), name);
529 case IrInstructionIdTypeId:
530 return destroy(reinterpret_cast<IrInstructionTypeId *>(inst), name);
531 case IrInstructionIdSetEvalBranchQuota:
532 return destroy(reinterpret_cast<IrInstructionSetEvalBranchQuota *>(inst), name);
533 case IrInstructionIdAlignCast:
534 return destroy(reinterpret_cast<IrInstructionAlignCast *>(inst), name);
535 case IrInstructionIdImplicitCast:
536 return destroy(reinterpret_cast<IrInstructionImplicitCast *>(inst), name);
537 case IrInstructionIdResolveResult:
538 return destroy(reinterpret_cast<IrInstructionResolveResult *>(inst), name);
539 case IrInstructionIdResetResult:
540 return destroy(reinterpret_cast<IrInstructionResetResult *>(inst), name);
541 case IrInstructionIdOpaqueType:
542 return destroy(reinterpret_cast<IrInstructionOpaqueType *>(inst), name);
543 case IrInstructionIdSetAlignStack:
544 return destroy(reinterpret_cast<IrInstructionSetAlignStack *>(inst), name);
545 case IrInstructionIdArgType:
546 return destroy(reinterpret_cast<IrInstructionArgType *>(inst), name);
547 case IrInstructionIdTagType:
548 return destroy(reinterpret_cast<IrInstructionTagType *>(inst), name);
549 case IrInstructionIdExport:
550 return destroy(reinterpret_cast<IrInstructionExport *>(inst), name);
551 case IrInstructionIdErrorReturnTrace:
552 return destroy(reinterpret_cast<IrInstructionErrorReturnTrace *>(inst), name);
553 case IrInstructionIdErrorUnion:
554 return destroy(reinterpret_cast<IrInstructionErrorUnion *>(inst), name);
555 case IrInstructionIdAtomicRmw:
556 return destroy(reinterpret_cast<IrInstructionAtomicRmw *>(inst), name);
557 case IrInstructionIdSaveErrRetAddr:
558 return destroy(reinterpret_cast<IrInstructionSaveErrRetAddr *>(inst), name);
559 case IrInstructionIdAddImplicitReturnType:
560 return destroy(reinterpret_cast<IrInstructionAddImplicitReturnType *>(inst), name);
561 case IrInstructionIdFloatOp:
562 return destroy(reinterpret_cast<IrInstructionFloatOp *>(inst), name);
563 case IrInstructionIdMulAdd:
564 return destroy(reinterpret_cast<IrInstructionMulAdd *>(inst), name);
565 case IrInstructionIdAtomicLoad:
566 return destroy(reinterpret_cast<IrInstructionAtomicLoad *>(inst), name);
567 case IrInstructionIdAtomicStore:
568 return destroy(reinterpret_cast<IrInstructionAtomicStore *>(inst), name);
569 case IrInstructionIdEnumToInt:
570 return destroy(reinterpret_cast<IrInstructionEnumToInt *>(inst), name);
571 case IrInstructionIdCheckRuntimeScope:
572 return destroy(reinterpret_cast<IrInstructionCheckRuntimeScope *>(inst), name);
573 case IrInstructionIdDeclVarGen:
574 return destroy(reinterpret_cast<IrInstructionDeclVarGen *>(inst), name);
575 case IrInstructionIdArrayToVector:
576 return destroy(reinterpret_cast<IrInstructionArrayToVector *>(inst), name);
577 case IrInstructionIdVectorToArray:
578 return destroy(reinterpret_cast<IrInstructionVectorToArray *>(inst), name);
579 case IrInstructionIdPtrOfArrayToSlice:
580 return destroy(reinterpret_cast<IrInstructionPtrOfArrayToSlice *>(inst), name);
581 case IrInstructionIdAssertZero:
582 return destroy(reinterpret_cast<IrInstructionAssertZero *>(inst), name);
583 case IrInstructionIdAssertNonNull:
584 return destroy(reinterpret_cast<IrInstructionAssertNonNull *>(inst), name);
585 case IrInstructionIdResizeSlice:
586 return destroy(reinterpret_cast<IrInstructionResizeSlice *>(inst), name);
587 case IrInstructionIdHasDecl:
588 return destroy(reinterpret_cast<IrInstructionHasDecl *>(inst), name);
589 case IrInstructionIdUndeclaredIdent:
590 return destroy(reinterpret_cast<IrInstructionUndeclaredIdent *>(inst), name);
591 case IrInstructionIdAllocaSrc:
592 return destroy(reinterpret_cast<IrInstructionAllocaSrc *>(inst), name);
593 case IrInstructionIdAllocaGen:
594 return destroy(reinterpret_cast<IrInstructionAllocaGen *>(inst), name);
595 case IrInstructionIdEndExpr:
596 return destroy(reinterpret_cast<IrInstructionEndExpr *>(inst), name);
597 case IrInstructionIdUnionInitNamedField:
598 return destroy(reinterpret_cast<IrInstructionUnionInitNamedField *>(inst), name);
599 case IrInstructionIdSuspendBegin:
600 return destroy(reinterpret_cast<IrInstructionSuspendBegin *>(inst), name);
601 case IrInstructionIdSuspendFinish:
602 return destroy(reinterpret_cast<IrInstructionSuspendFinish *>(inst), name);
603 case IrInstructionIdResume:
604 return destroy(reinterpret_cast<IrInstructionResume *>(inst), name);
605 case IrInstructionIdAwaitSrc:
606 return destroy(reinterpret_cast<IrInstructionAwaitSrc *>(inst), name);
607 case IrInstructionIdAwaitGen:
608 return destroy(reinterpret_cast<IrInstructionAwaitGen *>(inst), name);
609 case IrInstructionIdSpillBegin:
610 return destroy(reinterpret_cast<IrInstructionSpillBegin *>(inst), name);
611 case IrInstructionIdSpillEnd:
612 return destroy(reinterpret_cast<IrInstructionSpillEnd *>(inst), name);
613 case IrInstructionIdVectorExtractElem:
614 return destroy(reinterpret_cast<IrInstructionVectorExtractElem *>(inst), name);
569 case IrInstGenIdReturn:
570 return destroy(reinterpret_cast<IrInstGenReturn *>(inst), name);
571 case IrInstGenIdConst:
572 return destroy(reinterpret_cast<IrInstGenConst *>(inst), name);
573 case IrInstGenIdBinOp:
574 return destroy(reinterpret_cast<IrInstGenBinOp *>(inst), name);
575 case IrInstGenIdCast:
576 return destroy(reinterpret_cast<IrInstGenCast *>(inst), name);
577 case IrInstGenIdCall:
578 return destroy(reinterpret_cast<IrInstGenCall *>(inst), name);
579 case IrInstGenIdCondBr:
580 return destroy(reinterpret_cast<IrInstGenCondBr *>(inst), name);
581 case IrInstGenIdBr:
582 return destroy(reinterpret_cast<IrInstGenBr *>(inst), name);
583 case IrInstGenIdPhi:
584 return destroy(reinterpret_cast<IrInstGenPhi *>(inst), name);
585 case IrInstGenIdUnreachable:
586 return destroy(reinterpret_cast<IrInstGenUnreachable *>(inst), name);
587 case IrInstGenIdElemPtr:
588 return destroy(reinterpret_cast<IrInstGenElemPtr *>(inst), name);
589 case IrInstGenIdVarPtr:
590 return destroy(reinterpret_cast<IrInstGenVarPtr *>(inst), name);
591 case IrInstGenIdReturnPtr:
592 return destroy(reinterpret_cast<IrInstGenReturnPtr *>(inst), name);
593 case IrInstGenIdLoadPtr:
594 return destroy(reinterpret_cast<IrInstGenLoadPtr *>(inst), name);
595 case IrInstGenIdStorePtr:
596 return destroy(reinterpret_cast<IrInstGenStorePtr *>(inst), name);
597 case IrInstGenIdVectorStoreElem:
598 return destroy(reinterpret_cast<IrInstGenVectorStoreElem *>(inst), name);
599 case IrInstGenIdStructFieldPtr:
600 return destroy(reinterpret_cast<IrInstGenStructFieldPtr *>(inst), name);
601 case IrInstGenIdUnionFieldPtr:
602 return destroy(reinterpret_cast<IrInstGenUnionFieldPtr *>(inst), name);
603 case IrInstGenIdAsm:
604 return destroy(reinterpret_cast<IrInstGenAsm *>(inst), name);
605 case IrInstGenIdTestNonNull:
606 return destroy(reinterpret_cast<IrInstGenTestNonNull *>(inst), name);
607 case IrInstGenIdOptionalUnwrapPtr:
608 return destroy(reinterpret_cast<IrInstGenOptionalUnwrapPtr *>(inst), name);
609 case IrInstGenIdPopCount:
610 return destroy(reinterpret_cast<IrInstGenPopCount *>(inst), name);
611 case IrInstGenIdClz:
612 return destroy(reinterpret_cast<IrInstGenClz *>(inst), name);
613 case IrInstGenIdCtz:
614 return destroy(reinterpret_cast<IrInstGenCtz *>(inst), name);
615 case IrInstGenIdBswap:
616 return destroy(reinterpret_cast<IrInstGenBswap *>(inst), name);
617 case IrInstGenIdBitReverse:
618 return destroy(reinterpret_cast<IrInstGenBitReverse *>(inst), name);
619 case IrInstGenIdSwitchBr:
620 return destroy(reinterpret_cast<IrInstGenSwitchBr *>(inst), name);
621 case IrInstGenIdUnionTag:
622 return destroy(reinterpret_cast<IrInstGenUnionTag *>(inst), name);
623 case IrInstGenIdRef:
624 return destroy(reinterpret_cast<IrInstGenRef *>(inst), name);
625 case IrInstGenIdErrName:
626 return destroy(reinterpret_cast<IrInstGenErrName *>(inst), name);
627 case IrInstGenIdCmpxchg:
628 return destroy(reinterpret_cast<IrInstGenCmpxchg *>(inst), name);
629 case IrInstGenIdFence:
630 return destroy(reinterpret_cast<IrInstGenFence *>(inst), name);
631 case IrInstGenIdTruncate:
632 return destroy(reinterpret_cast<IrInstGenTruncate *>(inst), name);
633 case IrInstGenIdShuffleVector:
634 return destroy(reinterpret_cast<IrInstGenShuffleVector *>(inst), name);
635 case IrInstGenIdSplat:
636 return destroy(reinterpret_cast<IrInstGenSplat *>(inst), name);
637 case IrInstGenIdBoolNot:
638 return destroy(reinterpret_cast<IrInstGenBoolNot *>(inst), name);
639 case IrInstGenIdMemset:
640 return destroy(reinterpret_cast<IrInstGenMemset *>(inst), name);
641 case IrInstGenIdMemcpy:
642 return destroy(reinterpret_cast<IrInstGenMemcpy *>(inst), name);
643 case IrInstGenIdSlice:
644 return destroy(reinterpret_cast<IrInstGenSlice *>(inst), name);
645 case IrInstGenIdBreakpoint:
646 return destroy(reinterpret_cast<IrInstGenBreakpoint *>(inst), name);
647 case IrInstGenIdReturnAddress:
648 return destroy(reinterpret_cast<IrInstGenReturnAddress *>(inst), name);
649 case IrInstGenIdFrameAddress:
650 return destroy(reinterpret_cast<IrInstGenFrameAddress *>(inst), name);
651 case IrInstGenIdFrameHandle:
652 return destroy(reinterpret_cast<IrInstGenFrameHandle *>(inst), name);
653 case IrInstGenIdFrameSize:
654 return destroy(reinterpret_cast<IrInstGenFrameSize *>(inst), name);
655 case IrInstGenIdOverflowOp:
656 return destroy(reinterpret_cast<IrInstGenOverflowOp *>(inst), name);
657 case IrInstGenIdTestErr:
658 return destroy(reinterpret_cast<IrInstGenTestErr *>(inst), name);
659 case IrInstGenIdUnwrapErrCode:
660 return destroy(reinterpret_cast<IrInstGenUnwrapErrCode *>(inst), name);
661 case IrInstGenIdUnwrapErrPayload:
662 return destroy(reinterpret_cast<IrInstGenUnwrapErrPayload *>(inst), name);
663 case IrInstGenIdOptionalWrap:
664 return destroy(reinterpret_cast<IrInstGenOptionalWrap *>(inst), name);
665 case IrInstGenIdErrWrapCode:
666 return destroy(reinterpret_cast<IrInstGenErrWrapCode *>(inst), name);
667 case IrInstGenIdErrWrapPayload:
668 return destroy(reinterpret_cast<IrInstGenErrWrapPayload *>(inst), name);
669 case IrInstGenIdPtrCast:
670 return destroy(reinterpret_cast<IrInstGenPtrCast *>(inst), name);
671 case IrInstGenIdBitCast:
672 return destroy(reinterpret_cast<IrInstGenBitCast *>(inst), name);
673 case IrInstGenIdWidenOrShorten:
674 return destroy(reinterpret_cast<IrInstGenWidenOrShorten *>(inst), name);
675 case IrInstGenIdPtrToInt:
676 return destroy(reinterpret_cast<IrInstGenPtrToInt *>(inst), name);
677 case IrInstGenIdIntToPtr:
678 return destroy(reinterpret_cast<IrInstGenIntToPtr *>(inst), name);
679 case IrInstGenIdIntToEnum:
680 return destroy(reinterpret_cast<IrInstGenIntToEnum *>(inst), name);
681 case IrInstGenIdIntToErr:
682 return destroy(reinterpret_cast<IrInstGenIntToErr *>(inst), name);
683 case IrInstGenIdErrToInt:
684 return destroy(reinterpret_cast<IrInstGenErrToInt *>(inst), name);
685 case IrInstGenIdTagName:
686 return destroy(reinterpret_cast<IrInstGenTagName *>(inst), name);
687 case IrInstGenIdPanic:
688 return destroy(reinterpret_cast<IrInstGenPanic *>(inst), name);
689 case IrInstGenIdFieldParentPtr:
690 return destroy(reinterpret_cast<IrInstGenFieldParentPtr *>(inst), name);
691 case IrInstGenIdAlignCast:
692 return destroy(reinterpret_cast<IrInstGenAlignCast *>(inst), name);
693 case IrInstGenIdErrorReturnTrace:
694 return destroy(reinterpret_cast<IrInstGenErrorReturnTrace *>(inst), name);
695 case IrInstGenIdAtomicRmw:
696 return destroy(reinterpret_cast<IrInstGenAtomicRmw *>(inst), name);
697 case IrInstGenIdSaveErrRetAddr:
698 return destroy(reinterpret_cast<IrInstGenSaveErrRetAddr *>(inst), name);
699 case IrInstGenIdFloatOp:
700 return destroy(reinterpret_cast<IrInstGenFloatOp *>(inst), name);
701 case IrInstGenIdMulAdd:
702 return destroy(reinterpret_cast<IrInstGenMulAdd *>(inst), name);
703 case IrInstGenIdAtomicLoad:
704 return destroy(reinterpret_cast<IrInstGenAtomicLoad *>(inst), name);
705 case IrInstGenIdAtomicStore:
706 return destroy(reinterpret_cast<IrInstGenAtomicStore *>(inst), name);
707 case IrInstGenIdDeclVar:
708 return destroy(reinterpret_cast<IrInstGenDeclVar *>(inst), name);
709 case IrInstGenIdArrayToVector:
710 return destroy(reinterpret_cast<IrInstGenArrayToVector *>(inst), name);
711 case IrInstGenIdVectorToArray:
712 return destroy(reinterpret_cast<IrInstGenVectorToArray *>(inst), name);
713 case IrInstGenIdPtrOfArrayToSlice:
714 return destroy(reinterpret_cast<IrInstGenPtrOfArrayToSlice *>(inst), name);
715 case IrInstGenIdAssertZero:
716 return destroy(reinterpret_cast<IrInstGenAssertZero *>(inst), name);
717 case IrInstGenIdAssertNonNull:
718 return destroy(reinterpret_cast<IrInstGenAssertNonNull *>(inst), name);
719 case IrInstGenIdResizeSlice:
720 return destroy(reinterpret_cast<IrInstGenResizeSlice *>(inst), name);
721 case IrInstGenIdAlloca:
722 return destroy(reinterpret_cast<IrInstGenAlloca *>(inst), name);
723 case IrInstGenIdSuspendBegin:
724 return destroy(reinterpret_cast<IrInstGenSuspendBegin *>(inst), name);
725 case IrInstGenIdSuspendFinish:
726 return destroy(reinterpret_cast<IrInstGenSuspendFinish *>(inst), name);
727 case IrInstGenIdResume:
728 return destroy(reinterpret_cast<IrInstGenResume *>(inst), name);
729 case IrInstGenIdAwait:
730 return destroy(reinterpret_cast<IrInstGenAwait *>(inst), name);
731 case IrInstGenIdSpillBegin:
732 return destroy(reinterpret_cast<IrInstGenSpillBegin *>(inst), name);
733 case IrInstGenIdSpillEnd:
734 return destroy(reinterpret_cast<IrInstGenSpillEnd *>(inst), name);
735 case IrInstGenIdVectorExtractElem:
736 return destroy(reinterpret_cast<IrInstGenVectorExtractElem *>(inst), name);
737 case IrInstGenIdBinaryNot:
738 return destroy(reinterpret_cast<IrInstGenBinaryNot *>(inst), name);
739 case IrInstGenIdNegation:
740 return destroy(reinterpret_cast<IrInstGenNegation *>(inst), name);
741 case IrInstGenIdNegationWrapping:
742 return destroy(reinterpret_cast<IrInstGenNegationWrapping *>(inst), name);
615743 }
616744 zig_unreachable();
617745}
......@@ -627,20 +755,19 @@ static void ira_deref(IrAnalyze *ira) {
627755 assert(ira->ref_count != 0);
628756
629757 for (size_t bb_i = 0; bb_i < ira->old_irb.exec->basic_block_list.length; bb_i += 1) {
630 IrBasicBlock *pass1_bb = ira->old_irb.exec->basic_block_list.items[bb_i];
758 IrBasicBlockSrc *pass1_bb = ira->old_irb.exec->basic_block_list.items[bb_i];
631759 for (size_t inst_i = 0; inst_i < pass1_bb->instruction_list.length; inst_i += 1) {
632 IrInstruction *pass1_inst = pass1_bb->instruction_list.items[inst_i];
633 destroy_instruction(pass1_inst);
760 IrInstSrc *pass1_inst = pass1_bb->instruction_list.items[inst_i];
761 destroy_instruction_src(pass1_inst);
634762 }
635 destroy(pass1_bb, "IrBasicBlock");
763 destroy(pass1_bb, "IrBasicBlockSrc");
636764 }
637765 ira->old_irb.exec->basic_block_list.deinit();
638766 ira->old_irb.exec->tld_list.deinit();
639767 // cannot destroy here because of var->owner_exec
640 //destroy(ira->old_irb.exec, "IrExecutablePass1");
768 //destroy(ira->old_irb.exec, "IrExecutableSrc");
641769 ira->src_implicit_return_type_list.deinit();
642770 ira->resume_stack.deinit();
643 ira->exec_context.mem_slot_list.deinit();
644771 destroy(ira, "IrAnalyze");
645772}
646773
......@@ -754,7 +881,6 @@ static bool types_have_same_zig_comptime_repr(CodeGen *codegen, ZigType *expecte
754881 case ZigTypeIdComptimeFloat:
755882 case ZigTypeIdComptimeInt:
756883 case ZigTypeIdEnumLiteral:
757 case ZigTypeIdPointer:
758884 case ZigTypeIdUndefined:
759885 case ZigTypeIdNull:
760886 case ZigTypeIdBoundFn:
......@@ -763,6 +889,8 @@ static bool types_have_same_zig_comptime_repr(CodeGen *codegen, ZigType *expecte
763889 case ZigTypeIdAnyFrame:
764890 case ZigTypeIdFn:
765891 return true;
892 case ZigTypeIdPointer:
893 return expected->data.pointer.inferred_struct_field == actual->data.pointer.inferred_struct_field;
766894 case ZigTypeIdFloat:
767895 return expected->data.floating.bit_count == actual->data.floating.bit_count;
768896 case ZigTypeIdInt:
......@@ -785,7 +913,7 @@ static bool types_have_same_zig_comptime_repr(CodeGen *codegen, ZigType *expecte
785913 zig_unreachable();
786914}
787915
788static bool ir_should_inline(IrExecutable *exec, Scope *scope) {
916static bool ir_should_inline(IrExecutableSrc *exec, Scope *scope) {
789917 if (exec->is_inline)
790918 return true;
791919
......@@ -801,29 +929,35 @@ static bool ir_should_inline(IrExecutable *exec, Scope *scope) {
801929 return false;
802930}
803931
804static void ir_instruction_append(IrBasicBlock *basic_block, IrInstruction *instruction) {
932static void ir_instruction_append(IrBasicBlockSrc *basic_block, IrInstSrc *instruction) {
933 assert(basic_block);
934 assert(instruction);
935 basic_block->instruction_list.append(instruction);
936}
937
938static void ir_inst_gen_append(IrBasicBlockGen *basic_block, IrInstGen *instruction) {
805939 assert(basic_block);
806940 assert(instruction);
807941 basic_block->instruction_list.append(instruction);
808942}
809943
810static size_t exec_next_debug_id(IrExecutable *exec) {
944static size_t exec_next_debug_id(IrExecutableSrc *exec) {
811945 size_t result = exec->next_debug_id;
812946 exec->next_debug_id += 1;
813947 return result;
814948}
815949
816static size_t exec_next_mem_slot(IrExecutable *exec) {
817 size_t result = exec->mem_slot_count;
818 exec->mem_slot_count += 1;
950static size_t exec_next_debug_id_gen(IrExecutableGen *exec) {
951 size_t result = exec->next_debug_id;
952 exec->next_debug_id += 1;
819953 return result;
820954}
821955
822static ZigFn *exec_fn_entry(IrExecutable *exec) {
956static ZigFn *exec_fn_entry(IrExecutableSrc *exec) {
823957 return exec->fn_entry;
824958}
825959
826static Buf *exec_c_import_buf(IrExecutable *exec) {
960static Buf *exec_c_import_buf(IrExecutableSrc *exec) {
827961 return exec->c_import_buf;
828962}
829963
......@@ -831,1002 +965,1343 @@ static bool value_is_comptime(ZigValue *const_val) {
831965 return const_val->special != ConstValSpecialRuntime;
832966}
833967
834static bool instr_is_comptime(IrInstruction *instruction) {
968static bool instr_is_comptime(IrInstGen *instruction) {
835969 return value_is_comptime(instruction->value);
836970}
837971
838static bool instr_is_unreachable(IrInstruction *instruction) {
839 return instruction->value->type && instruction->value->type->id == ZigTypeIdUnreachable;
972static bool instr_is_unreachable(IrInstSrc *instruction) {
973 return instruction->is_noreturn;
840974}
841975
842static void ir_link_new_bb(IrBasicBlock *new_bb, IrBasicBlock *old_bb) {
843 new_bb->other = old_bb;
844 old_bb->other = new_bb;
976static void ir_link_new_bb(IrBasicBlockGen *new_bb, IrBasicBlockSrc *old_bb) {
977 new_bb->parent = old_bb;
978 old_bb->child = new_bb;
845979}
846980
847static void ir_ref_bb(IrBasicBlock *bb) {
981static void ir_ref_bb(IrBasicBlockSrc *bb) {
848982 bb->ref_count += 1;
849983}
850984
851static void ir_ref_instruction(IrInstruction *instruction, IrBasicBlock *cur_bb) {
852 assert(instruction->id != IrInstructionIdInvalid);
853 instruction->ref_count += 1;
854 if (instruction->owner_bb != cur_bb && !instr_is_comptime(instruction))
985static void ir_ref_bb_gen(IrBasicBlockGen *bb) {
986 bb->ref_count += 1;
987}
988
989static void ir_ref_instruction(IrInstSrc *instruction, IrBasicBlockSrc *cur_bb) {
990 assert(instruction->id != IrInstSrcIdInvalid);
991 instruction->base.ref_count += 1;
992 if (instruction->owner_bb != cur_bb && !instr_is_unreachable(instruction)
993 && instruction->id != IrInstSrcIdConst)
994 {
855995 ir_ref_bb(instruction->owner_bb);
996 }
997}
998
999static void ir_ref_inst_gen(IrInstGen *instruction, IrBasicBlockGen *cur_bb) {
1000 assert(instruction->id != IrInstGenIdInvalid);
1001 instruction->base.ref_count += 1;
1002 if (instruction->owner_bb != cur_bb && !instr_is_comptime(instruction))
1003 ir_ref_bb_gen(instruction->owner_bb);
8561004}
8571005
8581006static void ir_ref_var(ZigVar *var) {
8591007 var->ref_count += 1;
8601008}
8611009
1010static void create_result_ptr(CodeGen *codegen, ZigType *expected_type,
1011 ZigValue **out_result, ZigValue **out_result_ptr)
1012{
1013 ZigValue *result = create_const_vals(1);
1014 ZigValue *result_ptr = create_const_vals(1);
1015 result->special = ConstValSpecialUndef;
1016 result->type = expected_type;
1017 result_ptr->special = ConstValSpecialStatic;
1018 result_ptr->type = get_pointer_to_type(codegen, result->type, false);
1019 result_ptr->data.x_ptr.mut = ConstPtrMutComptimeVar;
1020 result_ptr->data.x_ptr.special = ConstPtrSpecialRef;
1021 result_ptr->data.x_ptr.data.ref.pointee = result;
1022
1023 *out_result = result;
1024 *out_result_ptr = result_ptr;
1025}
1026
8621027ZigType *ir_analyze_type_expr(IrAnalyze *ira, Scope *scope, AstNode *node) {
863 ZigValue *result = ir_eval_const_value(ira->codegen, scope, node, ira->codegen->builtin_types.entry_type,
864 ira->new_irb.exec->backward_branch_count, ira->new_irb.exec->backward_branch_quota, nullptr, nullptr,
865 node, nullptr, ira->new_irb.exec, nullptr, UndefBad);
1028 Error err;
1029
1030 ZigValue *result;
1031 ZigValue *result_ptr;
1032 create_result_ptr(ira->codegen, ira->codegen->builtin_types.entry_type, &result, &result_ptr);
8661033
1034 if ((err = ir_eval_const_value(ira->codegen, scope, node, result_ptr,
1035 ira->new_irb.exec->backward_branch_count, ira->new_irb.exec->backward_branch_quota,
1036 nullptr, nullptr, node, nullptr, ira->new_irb.exec, nullptr, UndefBad)))
1037 {
1038 return ira->codegen->builtin_types.entry_invalid;
1039 }
8671040 if (type_is_invalid(result->type))
8681041 return ira->codegen->builtin_types.entry_invalid;
8691042
8701043 assert(result->special != ConstValSpecialRuntime);
871 return result->data.x_type;
1044 ZigType *res_type = result->data.x_type;
1045
1046 destroy(result_ptr, "ZigValue");
1047 destroy(result, "ZigValue");
1048
1049 return res_type;
8721050}
8731051
874static IrBasicBlock *ir_create_basic_block(IrBuilder *irb, Scope *scope, const char *name_hint) {
875 IrBasicBlock *result = allocate<IrBasicBlock>(1, "IrBasicBlock");
1052static IrBasicBlockSrc *ir_create_basic_block(IrBuilderSrc *irb, Scope *scope, const char *name_hint) {
1053 IrBasicBlockSrc *result = allocate<IrBasicBlockSrc>(1, "IrBasicBlockSrc");
8761054 result->scope = scope;
8771055 result->name_hint = name_hint;
8781056 result->debug_id = exec_next_debug_id(irb->exec);
879 result->index = SIZE_MAX; // set later
1057 result->index = UINT32_MAX; // set later
1058 return result;
1059}
1060
1061static IrBasicBlockGen *ir_create_basic_block_gen(IrAnalyze *ira, Scope *scope, const char *name_hint) {
1062 IrBasicBlockGen *result = allocate<IrBasicBlockGen>(1, "IrBasicBlockGen");
1063 result->scope = scope;
1064 result->name_hint = name_hint;
1065 result->debug_id = exec_next_debug_id_gen(ira->new_irb.exec);
1066 result->index = UINT32_MAX; // set later
8801067 return result;
8811068}
8821069
883static IrBasicBlock *ir_build_bb_from(IrBuilder *irb, IrBasicBlock *other_bb) {
884 IrBasicBlock *new_bb = ir_create_basic_block(irb, other_bb->scope, other_bb->name_hint);
1070static IrBasicBlockGen *ir_build_bb_from(IrAnalyze *ira, IrBasicBlockSrc *other_bb) {
1071 IrBasicBlockGen *new_bb = ir_create_basic_block_gen(ira, other_bb->scope, other_bb->name_hint);
8851072 ir_link_new_bb(new_bb, other_bb);
8861073 return new_bb;
8871074}
8881075
889static constexpr IrInstructionId ir_instruction_id(IrInstructionDeclVarSrc *) {
890 return IrInstructionIdDeclVarSrc;
1076static constexpr IrInstSrcId ir_inst_id(IrInstSrcDeclVar *) {
1077 return IrInstSrcIdDeclVar;
1078}
1079
1080static constexpr IrInstSrcId ir_inst_id(IrInstSrcBr *) {
1081 return IrInstSrcIdBr;
1082}
1083
1084static constexpr IrInstSrcId ir_inst_id(IrInstSrcCondBr *) {
1085 return IrInstSrcIdCondBr;
1086}
1087
1088static constexpr IrInstSrcId ir_inst_id(IrInstSrcSwitchBr *) {
1089 return IrInstSrcIdSwitchBr;
1090}
1091
1092static constexpr IrInstSrcId ir_inst_id(IrInstSrcSwitchVar *) {
1093 return IrInstSrcIdSwitchVar;
1094}
1095
1096static constexpr IrInstSrcId ir_inst_id(IrInstSrcSwitchElseVar *) {
1097 return IrInstSrcIdSwitchElseVar;
1098}
1099
1100static constexpr IrInstSrcId ir_inst_id(IrInstSrcSwitchTarget *) {
1101 return IrInstSrcIdSwitchTarget;
1102}
1103
1104static constexpr IrInstSrcId ir_inst_id(IrInstSrcPhi *) {
1105 return IrInstSrcIdPhi;
1106}
1107
1108static constexpr IrInstSrcId ir_inst_id(IrInstSrcUnOp *) {
1109 return IrInstSrcIdUnOp;
1110}
1111
1112static constexpr IrInstSrcId ir_inst_id(IrInstSrcBinOp *) {
1113 return IrInstSrcIdBinOp;
1114}
1115
1116static constexpr IrInstSrcId ir_inst_id(IrInstSrcMergeErrSets *) {
1117 return IrInstSrcIdMergeErrSets;
1118}
1119
1120static constexpr IrInstSrcId ir_inst_id(IrInstSrcLoadPtr *) {
1121 return IrInstSrcIdLoadPtr;
1122}
1123
1124static constexpr IrInstSrcId ir_inst_id(IrInstSrcStorePtr *) {
1125 return IrInstSrcIdStorePtr;
1126}
1127
1128static constexpr IrInstSrcId ir_inst_id(IrInstSrcFieldPtr *) {
1129 return IrInstSrcIdFieldPtr;
1130}
1131
1132static constexpr IrInstSrcId ir_inst_id(IrInstSrcElemPtr *) {
1133 return IrInstSrcIdElemPtr;
1134}
1135
1136static constexpr IrInstSrcId ir_inst_id(IrInstSrcVarPtr *) {
1137 return IrInstSrcIdVarPtr;
1138}
1139
1140static constexpr IrInstSrcId ir_inst_id(IrInstSrcCall *) {
1141 return IrInstSrcIdCall;
1142}
1143
1144static constexpr IrInstSrcId ir_inst_id(IrInstSrcCallArgs *) {
1145 return IrInstSrcIdCallArgs;
1146}
1147
1148static constexpr IrInstSrcId ir_inst_id(IrInstSrcCallExtra *) {
1149 return IrInstSrcIdCallExtra;
1150}
1151
1152static constexpr IrInstSrcId ir_inst_id(IrInstSrcConst *) {
1153 return IrInstSrcIdConst;
1154}
1155
1156static constexpr IrInstSrcId ir_inst_id(IrInstSrcReturn *) {
1157 return IrInstSrcIdReturn;
1158}
1159
1160static constexpr IrInstSrcId ir_inst_id(IrInstSrcContainerInitList *) {
1161 return IrInstSrcIdContainerInitList;
1162}
1163
1164static constexpr IrInstSrcId ir_inst_id(IrInstSrcContainerInitFields *) {
1165 return IrInstSrcIdContainerInitFields;
1166}
1167
1168static constexpr IrInstSrcId ir_inst_id(IrInstSrcUnreachable *) {
1169 return IrInstSrcIdUnreachable;
1170}
1171
1172static constexpr IrInstSrcId ir_inst_id(IrInstSrcTypeOf *) {
1173 return IrInstSrcIdTypeOf;
1174}
1175
1176static constexpr IrInstSrcId ir_inst_id(IrInstSrcSetCold *) {
1177 return IrInstSrcIdSetCold;
1178}
1179
1180static constexpr IrInstSrcId ir_inst_id(IrInstSrcSetRuntimeSafety *) {
1181 return IrInstSrcIdSetRuntimeSafety;
1182}
1183
1184static constexpr IrInstSrcId ir_inst_id(IrInstSrcSetFloatMode *) {
1185 return IrInstSrcIdSetFloatMode;
1186}
1187
1188static constexpr IrInstSrcId ir_inst_id(IrInstSrcArrayType *) {
1189 return IrInstSrcIdArrayType;
1190}
1191
1192static constexpr IrInstSrcId ir_inst_id(IrInstSrcAnyFrameType *) {
1193 return IrInstSrcIdAnyFrameType;
1194}
1195
1196static constexpr IrInstSrcId ir_inst_id(IrInstSrcSliceType *) {
1197 return IrInstSrcIdSliceType;
1198}
1199
1200static constexpr IrInstSrcId ir_inst_id(IrInstSrcAsm *) {
1201 return IrInstSrcIdAsm;
1202}
1203
1204static constexpr IrInstSrcId ir_inst_id(IrInstSrcSizeOf *) {
1205 return IrInstSrcIdSizeOf;
1206}
1207
1208static constexpr IrInstSrcId ir_inst_id(IrInstSrcTestNonNull *) {
1209 return IrInstSrcIdTestNonNull;
1210}
1211
1212static constexpr IrInstSrcId ir_inst_id(IrInstSrcOptionalUnwrapPtr *) {
1213 return IrInstSrcIdOptionalUnwrapPtr;
1214}
1215
1216static constexpr IrInstSrcId ir_inst_id(IrInstSrcClz *) {
1217 return IrInstSrcIdClz;
1218}
1219
1220static constexpr IrInstSrcId ir_inst_id(IrInstSrcCtz *) {
1221 return IrInstSrcIdCtz;
1222}
1223
1224static constexpr IrInstSrcId ir_inst_id(IrInstSrcPopCount *) {
1225 return IrInstSrcIdPopCount;
1226}
1227
1228static constexpr IrInstSrcId ir_inst_id(IrInstSrcBswap *) {
1229 return IrInstSrcIdBswap;
1230}
1231
1232static constexpr IrInstSrcId ir_inst_id(IrInstSrcBitReverse *) {
1233 return IrInstSrcIdBitReverse;
8911234}
8921235
893static constexpr IrInstructionId ir_instruction_id(IrInstructionDeclVarGen *) {
894 return IrInstructionIdDeclVarGen;
1236static constexpr IrInstSrcId ir_inst_id(IrInstSrcImport *) {
1237 return IrInstSrcIdImport;
8951238}
8961239
897static constexpr IrInstructionId ir_instruction_id(IrInstructionCondBr *) {
898 return IrInstructionIdCondBr;
1240static constexpr IrInstSrcId ir_inst_id(IrInstSrcCImport *) {
1241 return IrInstSrcIdCImport;
8991242}
9001243
901static constexpr IrInstructionId ir_instruction_id(IrInstructionBr *) {
902 return IrInstructionIdBr;
1244static constexpr IrInstSrcId ir_inst_id(IrInstSrcCInclude *) {
1245 return IrInstSrcIdCInclude;
9031246}
9041247
905static constexpr IrInstructionId ir_instruction_id(IrInstructionSwitchBr *) {
906 return IrInstructionIdSwitchBr;
1248static constexpr IrInstSrcId ir_inst_id(IrInstSrcCDefine *) {
1249 return IrInstSrcIdCDefine;
9071250}
9081251
909static constexpr IrInstructionId ir_instruction_id(IrInstructionSwitchVar *) {
910 return IrInstructionIdSwitchVar;
1252static constexpr IrInstSrcId ir_inst_id(IrInstSrcCUndef *) {
1253 return IrInstSrcIdCUndef;
9111254}
9121255
913static constexpr IrInstructionId ir_instruction_id(IrInstructionSwitchElseVar *) {
914 return IrInstructionIdSwitchElseVar;
1256static constexpr IrInstSrcId ir_inst_id(IrInstSrcRef *) {
1257 return IrInstSrcIdRef;
9151258}
9161259
917static constexpr IrInstructionId ir_instruction_id(IrInstructionSwitchTarget *) {
918 return IrInstructionIdSwitchTarget;
1260static constexpr IrInstSrcId ir_inst_id(IrInstSrcCompileErr *) {
1261 return IrInstSrcIdCompileErr;
9191262}
9201263
921static constexpr IrInstructionId ir_instruction_id(IrInstructionPhi *) {
922 return IrInstructionIdPhi;
1264static constexpr IrInstSrcId ir_inst_id(IrInstSrcCompileLog *) {
1265 return IrInstSrcIdCompileLog;
9231266}
9241267
925static constexpr IrInstructionId ir_instruction_id(IrInstructionUnOp *) {
926 return IrInstructionIdUnOp;
1268static constexpr IrInstSrcId ir_inst_id(IrInstSrcErrName *) {
1269 return IrInstSrcIdErrName;
9271270}
9281271
929static constexpr IrInstructionId ir_instruction_id(IrInstructionBinOp *) {
930 return IrInstructionIdBinOp;
1272static constexpr IrInstSrcId ir_inst_id(IrInstSrcEmbedFile *) {
1273 return IrInstSrcIdEmbedFile;
9311274}
9321275
933static constexpr IrInstructionId ir_instruction_id(IrInstructionMergeErrSets *) {
934 return IrInstructionIdMergeErrSets;
1276static constexpr IrInstSrcId ir_inst_id(IrInstSrcCmpxchg *) {
1277 return IrInstSrcIdCmpxchg;
9351278}
9361279
937static constexpr IrInstructionId ir_instruction_id(IrInstructionExport *) {
938 return IrInstructionIdExport;
1280static constexpr IrInstSrcId ir_inst_id(IrInstSrcFence *) {
1281 return IrInstSrcIdFence;
9391282}
9401283
941static constexpr IrInstructionId ir_instruction_id(IrInstructionLoadPtr *) {
942 return IrInstructionIdLoadPtr;
1284static constexpr IrInstSrcId ir_inst_id(IrInstSrcTruncate *) {
1285 return IrInstSrcIdTruncate;
9431286}
9441287
945static constexpr IrInstructionId ir_instruction_id(IrInstructionLoadPtrGen *) {
946 return IrInstructionIdLoadPtrGen;
1288static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntCast *) {
1289 return IrInstSrcIdIntCast;
9471290}
9481291
949static constexpr IrInstructionId ir_instruction_id(IrInstructionStorePtr *) {
950 return IrInstructionIdStorePtr;
1292static constexpr IrInstSrcId ir_inst_id(IrInstSrcFloatCast *) {
1293 return IrInstSrcIdFloatCast;
9511294}
9521295
953static constexpr IrInstructionId ir_instruction_id(IrInstructionVectorStoreElem *) {
954 return IrInstructionIdVectorStoreElem;
1296static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntToFloat *) {
1297 return IrInstSrcIdIntToFloat;
9551298}
9561299
957static constexpr IrInstructionId ir_instruction_id(IrInstructionFieldPtr *) {
958 return IrInstructionIdFieldPtr;
1300static constexpr IrInstSrcId ir_inst_id(IrInstSrcFloatToInt *) {
1301 return IrInstSrcIdFloatToInt;
9591302}
9601303
961static constexpr IrInstructionId ir_instruction_id(IrInstructionStructFieldPtr *) {
962 return IrInstructionIdStructFieldPtr;
1304static constexpr IrInstSrcId ir_inst_id(IrInstSrcBoolToInt *) {
1305 return IrInstSrcIdBoolToInt;
9631306}
9641307
965static constexpr IrInstructionId ir_instruction_id(IrInstructionUnionFieldPtr *) {
966 return IrInstructionIdUnionFieldPtr;
1308static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntType *) {
1309 return IrInstSrcIdIntType;
9671310}
9681311
969static constexpr IrInstructionId ir_instruction_id(IrInstructionElemPtr *) {
970 return IrInstructionIdElemPtr;
1312static constexpr IrInstSrcId ir_inst_id(IrInstSrcVectorType *) {
1313 return IrInstSrcIdVectorType;
9711314}
9721315
973static constexpr IrInstructionId ir_instruction_id(IrInstructionVarPtr *) {
974 return IrInstructionIdVarPtr;
1316static constexpr IrInstSrcId ir_inst_id(IrInstSrcShuffleVector *) {
1317 return IrInstSrcIdShuffleVector;
9751318}
9761319
977static constexpr IrInstructionId ir_instruction_id(IrInstructionReturnPtr *) {
978 return IrInstructionIdReturnPtr;
1320static constexpr IrInstSrcId ir_inst_id(IrInstSrcSplat *) {
1321 return IrInstSrcIdSplat;
9791322}
9801323
981static constexpr IrInstructionId ir_instruction_id(IrInstructionCallSrc *) {
982 return IrInstructionIdCallSrc;
1324static constexpr IrInstSrcId ir_inst_id(IrInstSrcBoolNot *) {
1325 return IrInstSrcIdBoolNot;
9831326}
9841327
985static constexpr IrInstructionId ir_instruction_id(IrInstructionCallSrcArgs *) {
986 return IrInstructionIdCallSrcArgs;
1328static constexpr IrInstSrcId ir_inst_id(IrInstSrcMemset *) {
1329 return IrInstSrcIdMemset;
9871330}
9881331
989static constexpr IrInstructionId ir_instruction_id(IrInstructionCallExtra *) {
990 return IrInstructionIdCallExtra;
1332static constexpr IrInstSrcId ir_inst_id(IrInstSrcMemcpy *) {
1333 return IrInstSrcIdMemcpy;
9911334}
9921335
993static constexpr IrInstructionId ir_instruction_id(IrInstructionCallGen *) {
994 return IrInstructionIdCallGen;
1336static constexpr IrInstSrcId ir_inst_id(IrInstSrcSlice *) {
1337 return IrInstSrcIdSlice;
9951338}
9961339
997static constexpr IrInstructionId ir_instruction_id(IrInstructionConst *) {
998 return IrInstructionIdConst;
1340static constexpr IrInstSrcId ir_inst_id(IrInstSrcMemberCount *) {
1341 return IrInstSrcIdMemberCount;
9991342}
10001343
1001static constexpr IrInstructionId ir_instruction_id(IrInstructionReturn *) {
1002 return IrInstructionIdReturn;
1344static constexpr IrInstSrcId ir_inst_id(IrInstSrcMemberType *) {
1345 return IrInstSrcIdMemberType;
10031346}
10041347
1005static constexpr IrInstructionId ir_instruction_id(IrInstructionCast *) {
1006 return IrInstructionIdCast;
1348static constexpr IrInstSrcId ir_inst_id(IrInstSrcMemberName *) {
1349 return IrInstSrcIdMemberName;
10071350}
10081351
1009static constexpr IrInstructionId ir_instruction_id(IrInstructionResizeSlice *) {
1010 return IrInstructionIdResizeSlice;
1352static constexpr IrInstSrcId ir_inst_id(IrInstSrcBreakpoint *) {
1353 return IrInstSrcIdBreakpoint;
10111354}
10121355
1013static constexpr IrInstructionId ir_instruction_id(IrInstructionContainerInitList *) {
1014 return IrInstructionIdContainerInitList;
1356static constexpr IrInstSrcId ir_inst_id(IrInstSrcReturnAddress *) {
1357 return IrInstSrcIdReturnAddress;
10151358}
10161359
1017static constexpr IrInstructionId ir_instruction_id(IrInstructionContainerInitFields *) {
1018 return IrInstructionIdContainerInitFields;
1360static constexpr IrInstSrcId ir_inst_id(IrInstSrcFrameAddress *) {
1361 return IrInstSrcIdFrameAddress;
10191362}
10201363
1021static constexpr IrInstructionId ir_instruction_id(IrInstructionUnreachable *) {
1022 return IrInstructionIdUnreachable;
1364static constexpr IrInstSrcId ir_inst_id(IrInstSrcFrameHandle *) {
1365 return IrInstSrcIdFrameHandle;
10231366}
10241367
1025static constexpr IrInstructionId ir_instruction_id(IrInstructionTypeOf *) {
1026 return IrInstructionIdTypeOf;
1368static constexpr IrInstSrcId ir_inst_id(IrInstSrcFrameType *) {
1369 return IrInstSrcIdFrameType;
10271370}
10281371
1029static constexpr IrInstructionId ir_instruction_id(IrInstructionSetCold *) {
1030 return IrInstructionIdSetCold;
1372static constexpr IrInstSrcId ir_inst_id(IrInstSrcFrameSize *) {
1373 return IrInstSrcIdFrameSize;
10311374}
10321375
1033static constexpr IrInstructionId ir_instruction_id(IrInstructionSetRuntimeSafety *) {
1034 return IrInstructionIdSetRuntimeSafety;
1376static constexpr IrInstSrcId ir_inst_id(IrInstSrcAlignOf *) {
1377 return IrInstSrcIdAlignOf;
10351378}
10361379
1037static constexpr IrInstructionId ir_instruction_id(IrInstructionSetFloatMode *) {
1038 return IrInstructionIdSetFloatMode;
1380static constexpr IrInstSrcId ir_inst_id(IrInstSrcOverflowOp *) {
1381 return IrInstSrcIdOverflowOp;
10391382}
10401383
1041static constexpr IrInstructionId ir_instruction_id(IrInstructionArrayType *) {
1042 return IrInstructionIdArrayType;
1384static constexpr IrInstSrcId ir_inst_id(IrInstSrcTestErr *) {
1385 return IrInstSrcIdTestErr;
10431386}
10441387
1045static constexpr IrInstructionId ir_instruction_id(IrInstructionAnyFrameType *) {
1046 return IrInstructionIdAnyFrameType;
1388static constexpr IrInstSrcId ir_inst_id(IrInstSrcMulAdd *) {
1389 return IrInstSrcIdMulAdd;
10471390}
10481391
1049static constexpr IrInstructionId ir_instruction_id(IrInstructionSliceType *) {
1050 return IrInstructionIdSliceType;
1392static constexpr IrInstSrcId ir_inst_id(IrInstSrcFloatOp *) {
1393 return IrInstSrcIdFloatOp;
10511394}
10521395
1053static constexpr IrInstructionId ir_instruction_id(IrInstructionAsmSrc *) {
1054 return IrInstructionIdAsmSrc;
1396static constexpr IrInstSrcId ir_inst_id(IrInstSrcUnwrapErrCode *) {
1397 return IrInstSrcIdUnwrapErrCode;
10551398}
10561399
1057static constexpr IrInstructionId ir_instruction_id(IrInstructionAsmGen *) {
1058 return IrInstructionIdAsmGen;
1400static constexpr IrInstSrcId ir_inst_id(IrInstSrcUnwrapErrPayload *) {
1401 return IrInstSrcIdUnwrapErrPayload;
10591402}
10601403
1061static constexpr IrInstructionId ir_instruction_id(IrInstructionSizeOf *) {
1062 return IrInstructionIdSizeOf;
1404static constexpr IrInstSrcId ir_inst_id(IrInstSrcFnProto *) {
1405 return IrInstSrcIdFnProto;
10631406}
10641407
1065static constexpr IrInstructionId ir_instruction_id(IrInstructionTestNonNull *) {
1066 return IrInstructionIdTestNonNull;
1408static constexpr IrInstSrcId ir_inst_id(IrInstSrcTestComptime *) {
1409 return IrInstSrcIdTestComptime;
10671410}
10681411
1069static constexpr IrInstructionId ir_instruction_id(IrInstructionOptionalUnwrapPtr *) {
1070 return IrInstructionIdOptionalUnwrapPtr;
1412static constexpr IrInstSrcId ir_inst_id(IrInstSrcPtrCast *) {
1413 return IrInstSrcIdPtrCast;
10711414}
10721415
1073static constexpr IrInstructionId ir_instruction_id(IrInstructionClz *) {
1074 return IrInstructionIdClz;
1416static constexpr IrInstSrcId ir_inst_id(IrInstSrcBitCast *) {
1417 return IrInstSrcIdBitCast;
10751418}
10761419
1077static constexpr IrInstructionId ir_instruction_id(IrInstructionCtz *) {
1078 return IrInstructionIdCtz;
1420static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntToPtr *) {
1421 return IrInstSrcIdIntToPtr;
10791422}
10801423
1081static constexpr IrInstructionId ir_instruction_id(IrInstructionPopCount *) {
1082 return IrInstructionIdPopCount;
1424static constexpr IrInstSrcId ir_inst_id(IrInstSrcPtrToInt *) {
1425 return IrInstSrcIdPtrToInt;
10831426}
10841427
1085static constexpr IrInstructionId ir_instruction_id(IrInstructionBswap *) {
1086 return IrInstructionIdBswap;
1428static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntToEnum *) {
1429 return IrInstSrcIdIntToEnum;
10871430}
10881431
1089static constexpr IrInstructionId ir_instruction_id(IrInstructionBitReverse *) {
1090 return IrInstructionIdBitReverse;
1432static constexpr IrInstSrcId ir_inst_id(IrInstSrcEnumToInt *) {
1433 return IrInstSrcIdEnumToInt;
10911434}
10921435
1093static constexpr IrInstructionId ir_instruction_id(IrInstructionUnionTag *) {
1094 return IrInstructionIdUnionTag;
1436static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntToErr *) {
1437 return IrInstSrcIdIntToErr;
10951438}
10961439
1097static constexpr IrInstructionId ir_instruction_id(IrInstructionImport *) {
1098 return IrInstructionIdImport;
1440static constexpr IrInstSrcId ir_inst_id(IrInstSrcErrToInt *) {
1441 return IrInstSrcIdErrToInt;
10991442}
11001443
1101static constexpr IrInstructionId ir_instruction_id(IrInstructionCImport *) {
1102 return IrInstructionIdCImport;
1444static constexpr IrInstSrcId ir_inst_id(IrInstSrcCheckSwitchProngs *) {
1445 return IrInstSrcIdCheckSwitchProngs;
11031446}
11041447
1105static constexpr IrInstructionId ir_instruction_id(IrInstructionCInclude *) {
1106 return IrInstructionIdCInclude;
1448static constexpr IrInstSrcId ir_inst_id(IrInstSrcCheckStatementIsVoid *) {
1449 return IrInstSrcIdCheckStatementIsVoid;
11071450}
11081451
1109static constexpr IrInstructionId ir_instruction_id(IrInstructionCDefine *) {
1110 return IrInstructionIdCDefine;
1452static constexpr IrInstSrcId ir_inst_id(IrInstSrcTypeName *) {
1453 return IrInstSrcIdTypeName;
11111454}
11121455
1113static constexpr IrInstructionId ir_instruction_id(IrInstructionCUndef *) {
1114 return IrInstructionIdCUndef;
1456static constexpr IrInstSrcId ir_inst_id(IrInstSrcDeclRef *) {
1457 return IrInstSrcIdDeclRef;
11151458}
11161459
1117static constexpr IrInstructionId ir_instruction_id(IrInstructionRef *) {
1118 return IrInstructionIdRef;
1460static constexpr IrInstSrcId ir_inst_id(IrInstSrcPanic *) {
1461 return IrInstSrcIdPanic;
11191462}
11201463
1121static constexpr IrInstructionId ir_instruction_id(IrInstructionRefGen *) {
1122 return IrInstructionIdRefGen;
1464static constexpr IrInstSrcId ir_inst_id(IrInstSrcTagName *) {
1465 return IrInstSrcIdTagName;
11231466}
11241467
1125static constexpr IrInstructionId ir_instruction_id(IrInstructionCompileErr *) {
1126 return IrInstructionIdCompileErr;
1468static constexpr IrInstSrcId ir_inst_id(IrInstSrcTagType *) {
1469 return IrInstSrcIdTagType;
11271470}
11281471
1129static constexpr IrInstructionId ir_instruction_id(IrInstructionCompileLog *) {
1130 return IrInstructionIdCompileLog;
1472static constexpr IrInstSrcId ir_inst_id(IrInstSrcFieldParentPtr *) {
1473 return IrInstSrcIdFieldParentPtr;
11311474}
11321475
1133static constexpr IrInstructionId ir_instruction_id(IrInstructionErrName *) {
1134 return IrInstructionIdErrName;
1476static constexpr IrInstSrcId ir_inst_id(IrInstSrcByteOffsetOf *) {
1477 return IrInstSrcIdByteOffsetOf;
11351478}
11361479
1137static constexpr IrInstructionId ir_instruction_id(IrInstructionEmbedFile *) {
1138 return IrInstructionIdEmbedFile;
1480static constexpr IrInstSrcId ir_inst_id(IrInstSrcBitOffsetOf *) {
1481 return IrInstSrcIdBitOffsetOf;
11391482}
11401483
1141static constexpr IrInstructionId ir_instruction_id(IrInstructionCmpxchgSrc *) {
1142 return IrInstructionIdCmpxchgSrc;
1484static constexpr IrInstSrcId ir_inst_id(IrInstSrcTypeInfo *) {
1485 return IrInstSrcIdTypeInfo;
11431486}
11441487
1145static constexpr IrInstructionId ir_instruction_id(IrInstructionCmpxchgGen *) {
1146 return IrInstructionIdCmpxchgGen;
1488static constexpr IrInstSrcId ir_inst_id(IrInstSrcType *) {
1489 return IrInstSrcIdType;
11471490}
11481491
1149static constexpr IrInstructionId ir_instruction_id(IrInstructionFence *) {
1150 return IrInstructionIdFence;
1492static constexpr IrInstSrcId ir_inst_id(IrInstSrcHasField *) {
1493 return IrInstSrcIdHasField;
11511494}
11521495
1153static constexpr IrInstructionId ir_instruction_id(IrInstructionTruncate *) {
1154 return IrInstructionIdTruncate;
1496static constexpr IrInstSrcId ir_inst_id(IrInstSrcTypeId *) {
1497 return IrInstSrcIdTypeId;
11551498}
11561499
1157static constexpr IrInstructionId ir_instruction_id(IrInstructionIntCast *) {
1158 return IrInstructionIdIntCast;
1500static constexpr IrInstSrcId ir_inst_id(IrInstSrcSetEvalBranchQuota *) {
1501 return IrInstSrcIdSetEvalBranchQuota;
11591502}
11601503
1161static constexpr IrInstructionId ir_instruction_id(IrInstructionFloatCast *) {
1162 return IrInstructionIdFloatCast;
1504static constexpr IrInstSrcId ir_inst_id(IrInstSrcPtrType *) {
1505 return IrInstSrcIdPtrType;
11631506}
11641507
1165static constexpr IrInstructionId ir_instruction_id(IrInstructionErrSetCast *) {
1166 return IrInstructionIdErrSetCast;
1508static constexpr IrInstSrcId ir_inst_id(IrInstSrcAlignCast *) {
1509 return IrInstSrcIdAlignCast;
11671510}
11681511
1169static constexpr IrInstructionId ir_instruction_id(IrInstructionToBytes *) {
1170 return IrInstructionIdToBytes;
1512static constexpr IrInstSrcId ir_inst_id(IrInstSrcImplicitCast *) {
1513 return IrInstSrcIdImplicitCast;
11711514}
11721515
1173static constexpr IrInstructionId ir_instruction_id(IrInstructionFromBytes *) {
1174 return IrInstructionIdFromBytes;
1516static constexpr IrInstSrcId ir_inst_id(IrInstSrcResolveResult *) {
1517 return IrInstSrcIdResolveResult;
11751518}
11761519
1177static constexpr IrInstructionId ir_instruction_id(IrInstructionIntToFloat *) {
1178 return IrInstructionIdIntToFloat;
1520static constexpr IrInstSrcId ir_inst_id(IrInstSrcResetResult *) {
1521 return IrInstSrcIdResetResult;
11791522}
11801523
1181static constexpr IrInstructionId ir_instruction_id(IrInstructionFloatToInt *) {
1182 return IrInstructionIdFloatToInt;
1524static constexpr IrInstSrcId ir_inst_id(IrInstSrcOpaqueType *) {
1525 return IrInstSrcIdOpaqueType;
11831526}
11841527
1185static constexpr IrInstructionId ir_instruction_id(IrInstructionBoolToInt *) {
1186 return IrInstructionIdBoolToInt;
1528static constexpr IrInstSrcId ir_inst_id(IrInstSrcSetAlignStack *) {
1529 return IrInstSrcIdSetAlignStack;
11871530}
11881531
1189static constexpr IrInstructionId ir_instruction_id(IrInstructionIntType *) {
1190 return IrInstructionIdIntType;
1532static constexpr IrInstSrcId ir_inst_id(IrInstSrcArgType *) {
1533 return IrInstSrcIdArgType;
11911534}
11921535
1193static constexpr IrInstructionId ir_instruction_id(IrInstructionVectorType *) {
1194 return IrInstructionIdVectorType;
1536static constexpr IrInstSrcId ir_inst_id(IrInstSrcExport *) {
1537 return IrInstSrcIdExport;
11951538}
11961539
1197static constexpr IrInstructionId ir_instruction_id(IrInstructionShuffleVector *) {
1198 return IrInstructionIdShuffleVector;
1540static constexpr IrInstSrcId ir_inst_id(IrInstSrcErrorReturnTrace *) {
1541 return IrInstSrcIdErrorReturnTrace;
11991542}
12001543
1201static constexpr IrInstructionId ir_instruction_id(IrInstructionSplatSrc *) {
1202 return IrInstructionIdSplatSrc;
1544static constexpr IrInstSrcId ir_inst_id(IrInstSrcErrorUnion *) {
1545 return IrInstSrcIdErrorUnion;
12031546}
12041547
1205static constexpr IrInstructionId ir_instruction_id(IrInstructionSplatGen *) {
1206 return IrInstructionIdSplatGen;
1548static constexpr IrInstSrcId ir_inst_id(IrInstSrcAtomicRmw *) {
1549 return IrInstSrcIdAtomicRmw;
12071550}
12081551
1209static constexpr IrInstructionId ir_instruction_id(IrInstructionBoolNot *) {
1210 return IrInstructionIdBoolNot;
1552static constexpr IrInstSrcId ir_inst_id(IrInstSrcAtomicLoad *) {
1553 return IrInstSrcIdAtomicLoad;
12111554}
12121555
1213static constexpr IrInstructionId ir_instruction_id(IrInstructionMemset *) {
1214 return IrInstructionIdMemset;
1556static constexpr IrInstSrcId ir_inst_id(IrInstSrcAtomicStore *) {
1557 return IrInstSrcIdAtomicStore;
12151558}
12161559
1217static constexpr IrInstructionId ir_instruction_id(IrInstructionMemcpy *) {
1218 return IrInstructionIdMemcpy;
1560static constexpr IrInstSrcId ir_inst_id(IrInstSrcSaveErrRetAddr *) {
1561 return IrInstSrcIdSaveErrRetAddr;
12191562}
12201563
1221static constexpr IrInstructionId ir_instruction_id(IrInstructionSliceSrc *) {
1222 return IrInstructionIdSliceSrc;
1564static constexpr IrInstSrcId ir_inst_id(IrInstSrcAddImplicitReturnType *) {
1565 return IrInstSrcIdAddImplicitReturnType;
12231566}
12241567
1225static constexpr IrInstructionId ir_instruction_id(IrInstructionSliceGen *) {
1226 return IrInstructionIdSliceGen;
1568static constexpr IrInstSrcId ir_inst_id(IrInstSrcErrSetCast *) {
1569 return IrInstSrcIdErrSetCast;
12271570}
12281571
1229static constexpr IrInstructionId ir_instruction_id(IrInstructionMemberCount *) {
1230 return IrInstructionIdMemberCount;
1572static constexpr IrInstSrcId ir_inst_id(IrInstSrcToBytes *) {
1573 return IrInstSrcIdToBytes;
12311574}
12321575
1233static constexpr IrInstructionId ir_instruction_id(IrInstructionMemberType *) {
1234 return IrInstructionIdMemberType;
1576static constexpr IrInstSrcId ir_inst_id(IrInstSrcFromBytes *) {
1577 return IrInstSrcIdFromBytes;
12351578}
12361579
1237static constexpr IrInstructionId ir_instruction_id(IrInstructionMemberName *) {
1238 return IrInstructionIdMemberName;
1580static constexpr IrInstSrcId ir_inst_id(IrInstSrcCheckRuntimeScope *) {
1581 return IrInstSrcIdCheckRuntimeScope;
12391582}
12401583
1241static constexpr IrInstructionId ir_instruction_id(IrInstructionBreakpoint *) {
1242 return IrInstructionIdBreakpoint;
1584static constexpr IrInstSrcId ir_inst_id(IrInstSrcHasDecl *) {
1585 return IrInstSrcIdHasDecl;
12431586}
12441587
1245static constexpr IrInstructionId ir_instruction_id(IrInstructionReturnAddress *) {
1246 return IrInstructionIdReturnAddress;
1588static constexpr IrInstSrcId ir_inst_id(IrInstSrcUndeclaredIdent *) {
1589 return IrInstSrcIdUndeclaredIdent;
12471590}
12481591
1249static constexpr IrInstructionId ir_instruction_id(IrInstructionFrameAddress *) {
1250 return IrInstructionIdFrameAddress;
1592static constexpr IrInstSrcId ir_inst_id(IrInstSrcAlloca *) {
1593 return IrInstSrcIdAlloca;
12511594}
12521595
1253static constexpr IrInstructionId ir_instruction_id(IrInstructionFrameHandle *) {
1254 return IrInstructionIdFrameHandle;
1596static constexpr IrInstSrcId ir_inst_id(IrInstSrcEndExpr *) {
1597 return IrInstSrcIdEndExpr;
12551598}
12561599
1257static constexpr IrInstructionId ir_instruction_id(IrInstructionFrameType *) {
1258 return IrInstructionIdFrameType;
1600static constexpr IrInstSrcId ir_inst_id(IrInstSrcUnionInitNamedField *) {
1601 return IrInstSrcIdUnionInitNamedField;
12591602}
12601603
1261static constexpr IrInstructionId ir_instruction_id(IrInstructionFrameSizeSrc *) {
1262 return IrInstructionIdFrameSizeSrc;
1604static constexpr IrInstSrcId ir_inst_id(IrInstSrcSuspendBegin *) {
1605 return IrInstSrcIdSuspendBegin;
12631606}
12641607
1265static constexpr IrInstructionId ir_instruction_id(IrInstructionFrameSizeGen *) {
1266 return IrInstructionIdFrameSizeGen;
1608static constexpr IrInstSrcId ir_inst_id(IrInstSrcSuspendFinish *) {
1609 return IrInstSrcIdSuspendFinish;
12671610}
12681611
1269static constexpr IrInstructionId ir_instruction_id(IrInstructionAlignOf *) {
1270 return IrInstructionIdAlignOf;
1612static constexpr IrInstSrcId ir_inst_id(IrInstSrcAwait *) {
1613 return IrInstSrcIdAwait;
12711614}
12721615
1273static constexpr IrInstructionId ir_instruction_id(IrInstructionOverflowOp *) {
1274 return IrInstructionIdOverflowOp;
1616static constexpr IrInstSrcId ir_inst_id(IrInstSrcResume *) {
1617 return IrInstSrcIdResume;
12751618}
12761619
1277static constexpr IrInstructionId ir_instruction_id(IrInstructionTestErrSrc *) {
1278 return IrInstructionIdTestErrSrc;
1620static constexpr IrInstSrcId ir_inst_id(IrInstSrcSpillBegin *) {
1621 return IrInstSrcIdSpillBegin;
12791622}
12801623
1281static constexpr IrInstructionId ir_instruction_id(IrInstructionTestErrGen *) {
1282 return IrInstructionIdTestErrGen;
1624static constexpr IrInstSrcId ir_inst_id(IrInstSrcSpillEnd *) {
1625 return IrInstSrcIdSpillEnd;
12831626}
12841627
1285static constexpr IrInstructionId ir_instruction_id(IrInstructionMulAdd *) {
1286 return IrInstructionIdMulAdd;
1628
1629static constexpr IrInstGenId ir_inst_id(IrInstGenDeclVar *) {
1630 return IrInstGenIdDeclVar;
1631}
1632
1633static constexpr IrInstGenId ir_inst_id(IrInstGenBr *) {
1634 return IrInstGenIdBr;
1635}
1636
1637static constexpr IrInstGenId ir_inst_id(IrInstGenCondBr *) {
1638 return IrInstGenIdCondBr;
1639}
1640
1641static constexpr IrInstGenId ir_inst_id(IrInstGenSwitchBr *) {
1642 return IrInstGenIdSwitchBr;
1643}
1644
1645static constexpr IrInstGenId ir_inst_id(IrInstGenPhi *) {
1646 return IrInstGenIdPhi;
1647}
1648
1649static constexpr IrInstGenId ir_inst_id(IrInstGenBinaryNot *) {
1650 return IrInstGenIdBinaryNot;
1651}
1652
1653static constexpr IrInstGenId ir_inst_id(IrInstGenNegation *) {
1654 return IrInstGenIdNegation;
1655}
1656
1657static constexpr IrInstGenId ir_inst_id(IrInstGenNegationWrapping *) {
1658 return IrInstGenIdNegationWrapping;
1659}
1660
1661static constexpr IrInstGenId ir_inst_id(IrInstGenBinOp *) {
1662 return IrInstGenIdBinOp;
1663}
1664
1665static constexpr IrInstGenId ir_inst_id(IrInstGenLoadPtr *) {
1666 return IrInstGenIdLoadPtr;
1667}
1668
1669static constexpr IrInstGenId ir_inst_id(IrInstGenStorePtr *) {
1670 return IrInstGenIdStorePtr;
1671}
1672
1673static constexpr IrInstGenId ir_inst_id(IrInstGenVectorStoreElem *) {
1674 return IrInstGenIdVectorStoreElem;
1675}
1676
1677static constexpr IrInstGenId ir_inst_id(IrInstGenStructFieldPtr *) {
1678 return IrInstGenIdStructFieldPtr;
1679}
1680
1681static constexpr IrInstGenId ir_inst_id(IrInstGenUnionFieldPtr *) {
1682 return IrInstGenIdUnionFieldPtr;
1683}
1684
1685static constexpr IrInstGenId ir_inst_id(IrInstGenElemPtr *) {
1686 return IrInstGenIdElemPtr;
1687}
1688
1689static constexpr IrInstGenId ir_inst_id(IrInstGenVarPtr *) {
1690 return IrInstGenIdVarPtr;
1691}
1692
1693static constexpr IrInstGenId ir_inst_id(IrInstGenReturnPtr *) {
1694 return IrInstGenIdReturnPtr;
1695}
1696
1697static constexpr IrInstGenId ir_inst_id(IrInstGenCall *) {
1698 return IrInstGenIdCall;
1699}
1700
1701static constexpr IrInstGenId ir_inst_id(IrInstGenReturn *) {
1702 return IrInstGenIdReturn;
12871703}
12881704
1289static constexpr IrInstructionId ir_instruction_id(IrInstructionUnwrapErrCode *) {
1290 return IrInstructionIdUnwrapErrCode;
1705static constexpr IrInstGenId ir_inst_id(IrInstGenCast *) {
1706 return IrInstGenIdCast;
12911707}
12921708
1293static constexpr IrInstructionId ir_instruction_id(IrInstructionUnwrapErrPayload *) {
1294 return IrInstructionIdUnwrapErrPayload;
1709static constexpr IrInstGenId ir_inst_id(IrInstGenResizeSlice *) {
1710 return IrInstGenIdResizeSlice;
12951711}
12961712
1297static constexpr IrInstructionId ir_instruction_id(IrInstructionOptionalWrap *) {
1298 return IrInstructionIdOptionalWrap;
1713static constexpr IrInstGenId ir_inst_id(IrInstGenUnreachable *) {
1714 return IrInstGenIdUnreachable;
12991715}
13001716
1301static constexpr IrInstructionId ir_instruction_id(IrInstructionErrWrapPayload *) {
1302 return IrInstructionIdErrWrapPayload;
1717static constexpr IrInstGenId ir_inst_id(IrInstGenAsm *) {
1718 return IrInstGenIdAsm;
13031719}
13041720
1305static constexpr IrInstructionId ir_instruction_id(IrInstructionErrWrapCode *) {
1306 return IrInstructionIdErrWrapCode;
1721static constexpr IrInstGenId ir_inst_id(IrInstGenTestNonNull *) {
1722 return IrInstGenIdTestNonNull;
13071723}
13081724
1309static constexpr IrInstructionId ir_instruction_id(IrInstructionFnProto *) {
1310 return IrInstructionIdFnProto;
1725static constexpr IrInstGenId ir_inst_id(IrInstGenOptionalUnwrapPtr *) {
1726 return IrInstGenIdOptionalUnwrapPtr;
13111727}
13121728
1313static constexpr IrInstructionId ir_instruction_id(IrInstructionTestComptime *) {
1314 return IrInstructionIdTestComptime;
1729static constexpr IrInstGenId ir_inst_id(IrInstGenOptionalWrap *) {
1730 return IrInstGenIdOptionalWrap;
13151731}
13161732
1317static constexpr IrInstructionId ir_instruction_id(IrInstructionPtrCastSrc *) {
1318 return IrInstructionIdPtrCastSrc;
1733static constexpr IrInstGenId ir_inst_id(IrInstGenUnionTag *) {
1734 return IrInstGenIdUnionTag;
13191735}
13201736
1321static constexpr IrInstructionId ir_instruction_id(IrInstructionPtrCastGen *) {
1322 return IrInstructionIdPtrCastGen;
1737static constexpr IrInstGenId ir_inst_id(IrInstGenClz *) {
1738 return IrInstGenIdClz;
13231739}
13241740
1325static constexpr IrInstructionId ir_instruction_id(IrInstructionBitCastSrc *) {
1326 return IrInstructionIdBitCastSrc;
1741static constexpr IrInstGenId ir_inst_id(IrInstGenCtz *) {
1742 return IrInstGenIdCtz;
13271743}
13281744
1329static constexpr IrInstructionId ir_instruction_id(IrInstructionBitCastGen *) {
1330 return IrInstructionIdBitCastGen;
1745static constexpr IrInstGenId ir_inst_id(IrInstGenPopCount *) {
1746 return IrInstGenIdPopCount;
13311747}
13321748
1333static constexpr IrInstructionId ir_instruction_id(IrInstructionWidenOrShorten *) {
1334 return IrInstructionIdWidenOrShorten;
1749static constexpr IrInstGenId ir_inst_id(IrInstGenBswap *) {
1750 return IrInstGenIdBswap;
13351751}
13361752
1337static constexpr IrInstructionId ir_instruction_id(IrInstructionPtrToInt *) {
1338 return IrInstructionIdPtrToInt;
1753static constexpr IrInstGenId ir_inst_id(IrInstGenBitReverse *) {
1754 return IrInstGenIdBitReverse;
13391755}
13401756
1341static constexpr IrInstructionId ir_instruction_id(IrInstructionIntToPtr *) {
1342 return IrInstructionIdIntToPtr;
1757static constexpr IrInstGenId ir_inst_id(IrInstGenRef *) {
1758 return IrInstGenIdRef;
13431759}
13441760
1345static constexpr IrInstructionId ir_instruction_id(IrInstructionIntToEnum *) {
1346 return IrInstructionIdIntToEnum;
1761static constexpr IrInstGenId ir_inst_id(IrInstGenErrName *) {
1762 return IrInstGenIdErrName;
13471763}
13481764
1349static constexpr IrInstructionId ir_instruction_id(IrInstructionEnumToInt *) {
1350 return IrInstructionIdEnumToInt;
1765static constexpr IrInstGenId ir_inst_id(IrInstGenCmpxchg *) {
1766 return IrInstGenIdCmpxchg;
13511767}
13521768
1353static constexpr IrInstructionId ir_instruction_id(IrInstructionIntToErr *) {
1354 return IrInstructionIdIntToErr;
1769static constexpr IrInstGenId ir_inst_id(IrInstGenFence *) {
1770 return IrInstGenIdFence;
13551771}
13561772
1357static constexpr IrInstructionId ir_instruction_id(IrInstructionErrToInt *) {
1358 return IrInstructionIdErrToInt;
1773static constexpr IrInstGenId ir_inst_id(IrInstGenTruncate *) {
1774 return IrInstGenIdTruncate;
13591775}
13601776
1361static constexpr IrInstructionId ir_instruction_id(IrInstructionCheckSwitchProngs *) {
1362 return IrInstructionIdCheckSwitchProngs;
1777static constexpr IrInstGenId ir_inst_id(IrInstGenShuffleVector *) {
1778 return IrInstGenIdShuffleVector;
13631779}
13641780
1365static constexpr IrInstructionId ir_instruction_id(IrInstructionCheckStatementIsVoid *) {
1366 return IrInstructionIdCheckStatementIsVoid;
1781static constexpr IrInstGenId ir_inst_id(IrInstGenSplat *) {
1782 return IrInstGenIdSplat;
13671783}
13681784
1369static constexpr IrInstructionId ir_instruction_id(IrInstructionTypeName *) {
1370 return IrInstructionIdTypeName;
1785static constexpr IrInstGenId ir_inst_id(IrInstGenBoolNot *) {
1786 return IrInstGenIdBoolNot;
13711787}
13721788
1373static constexpr IrInstructionId ir_instruction_id(IrInstructionDeclRef *) {
1374 return IrInstructionIdDeclRef;
1789static constexpr IrInstGenId ir_inst_id(IrInstGenMemset *) {
1790 return IrInstGenIdMemset;
13751791}
13761792
1377static constexpr IrInstructionId ir_instruction_id(IrInstructionPanic *) {
1378 return IrInstructionIdPanic;
1793static constexpr IrInstGenId ir_inst_id(IrInstGenMemcpy *) {
1794 return IrInstGenIdMemcpy;
13791795}
13801796
1381static constexpr IrInstructionId ir_instruction_id(IrInstructionTagName *) {
1382 return IrInstructionIdTagName;
1797static constexpr IrInstGenId ir_inst_id(IrInstGenSlice *) {
1798 return IrInstGenIdSlice;
13831799}
13841800
1385static constexpr IrInstructionId ir_instruction_id(IrInstructionTagType *) {
1386 return IrInstructionIdTagType;
1801static constexpr IrInstGenId ir_inst_id(IrInstGenBreakpoint *) {
1802 return IrInstGenIdBreakpoint;
13871803}
13881804
1389static constexpr IrInstructionId ir_instruction_id(IrInstructionFieldParentPtr *) {
1390 return IrInstructionIdFieldParentPtr;
1805static constexpr IrInstGenId ir_inst_id(IrInstGenReturnAddress *) {
1806 return IrInstGenIdReturnAddress;
13911807}
13921808
1393static constexpr IrInstructionId ir_instruction_id(IrInstructionByteOffsetOf *) {
1394 return IrInstructionIdByteOffsetOf;
1809static constexpr IrInstGenId ir_inst_id(IrInstGenFrameAddress *) {
1810 return IrInstGenIdFrameAddress;
13951811}
13961812
1397static constexpr IrInstructionId ir_instruction_id(IrInstructionBitOffsetOf *) {
1398 return IrInstructionIdBitOffsetOf;
1813static constexpr IrInstGenId ir_inst_id(IrInstGenFrameHandle *) {
1814 return IrInstGenIdFrameHandle;
13991815}
14001816
1401static constexpr IrInstructionId ir_instruction_id(IrInstructionTypeInfo *) {
1402 return IrInstructionIdTypeInfo;
1817static constexpr IrInstGenId ir_inst_id(IrInstGenFrameSize *) {
1818 return IrInstGenIdFrameSize;
14031819}
14041820
1405static constexpr IrInstructionId ir_instruction_id(IrInstructionType *) {
1406 return IrInstructionIdType;
1821static constexpr IrInstGenId ir_inst_id(IrInstGenOverflowOp *) {
1822 return IrInstGenIdOverflowOp;
14071823}
14081824
1409static constexpr IrInstructionId ir_instruction_id(IrInstructionHasField *) {
1410 return IrInstructionIdHasField;
1825static constexpr IrInstGenId ir_inst_id(IrInstGenTestErr *) {
1826 return IrInstGenIdTestErr;
14111827}
14121828
1413static constexpr IrInstructionId ir_instruction_id(IrInstructionTypeId *) {
1414 return IrInstructionIdTypeId;
1829static constexpr IrInstGenId ir_inst_id(IrInstGenMulAdd *) {
1830 return IrInstGenIdMulAdd;
14151831}
14161832
1417static constexpr IrInstructionId ir_instruction_id(IrInstructionSetEvalBranchQuota *) {
1418 return IrInstructionIdSetEvalBranchQuota;
1833static constexpr IrInstGenId ir_inst_id(IrInstGenFloatOp *) {
1834 return IrInstGenIdFloatOp;
14191835}
14201836
1421static constexpr IrInstructionId ir_instruction_id(IrInstructionPtrType *) {
1422 return IrInstructionIdPtrType;
1837static constexpr IrInstGenId ir_inst_id(IrInstGenUnwrapErrCode *) {
1838 return IrInstGenIdUnwrapErrCode;
14231839}
14241840
1425static constexpr IrInstructionId ir_instruction_id(IrInstructionAlignCast *) {
1426 return IrInstructionIdAlignCast;
1841static constexpr IrInstGenId ir_inst_id(IrInstGenUnwrapErrPayload *) {
1842 return IrInstGenIdUnwrapErrPayload;
14271843}
14281844
1429static constexpr IrInstructionId ir_instruction_id(IrInstructionImplicitCast *) {
1430 return IrInstructionIdImplicitCast;
1845static constexpr IrInstGenId ir_inst_id(IrInstGenErrWrapCode *) {
1846 return IrInstGenIdErrWrapCode;
14311847}
14321848
1433static constexpr IrInstructionId ir_instruction_id(IrInstructionResolveResult *) {
1434 return IrInstructionIdResolveResult;
1849static constexpr IrInstGenId ir_inst_id(IrInstGenErrWrapPayload *) {
1850 return IrInstGenIdErrWrapPayload;
14351851}
14361852
1437static constexpr IrInstructionId ir_instruction_id(IrInstructionResetResult *) {
1438 return IrInstructionIdResetResult;
1853static constexpr IrInstGenId ir_inst_id(IrInstGenPtrCast *) {
1854 return IrInstGenIdPtrCast;
14391855}
14401856
1441static constexpr IrInstructionId ir_instruction_id(IrInstructionPtrOfArrayToSlice *) {
1442 return IrInstructionIdPtrOfArrayToSlice;
1857static constexpr IrInstGenId ir_inst_id(IrInstGenBitCast *) {
1858 return IrInstGenIdBitCast;
14431859}
14441860
1445static constexpr IrInstructionId ir_instruction_id(IrInstructionOpaqueType *) {
1446 return IrInstructionIdOpaqueType;
1861static constexpr IrInstGenId ir_inst_id(IrInstGenWidenOrShorten *) {
1862 return IrInstGenIdWidenOrShorten;
14471863}
14481864
1449static constexpr IrInstructionId ir_instruction_id(IrInstructionSetAlignStack *) {
1450 return IrInstructionIdSetAlignStack;
1865static constexpr IrInstGenId ir_inst_id(IrInstGenIntToPtr *) {
1866 return IrInstGenIdIntToPtr;
14511867}
14521868
1453static constexpr IrInstructionId ir_instruction_id(IrInstructionArgType *) {
1454 return IrInstructionIdArgType;
1869static constexpr IrInstGenId ir_inst_id(IrInstGenPtrToInt *) {
1870 return IrInstGenIdPtrToInt;
14551871}
14561872
1457static constexpr IrInstructionId ir_instruction_id(IrInstructionErrorReturnTrace *) {
1458 return IrInstructionIdErrorReturnTrace;
1873static constexpr IrInstGenId ir_inst_id(IrInstGenIntToEnum *) {
1874 return IrInstGenIdIntToEnum;
14591875}
14601876
1461static constexpr IrInstructionId ir_instruction_id(IrInstructionErrorUnion *) {
1462 return IrInstructionIdErrorUnion;
1877static constexpr IrInstGenId ir_inst_id(IrInstGenIntToErr *) {
1878 return IrInstGenIdIntToErr;
14631879}
14641880
1465static constexpr IrInstructionId ir_instruction_id(IrInstructionAtomicRmw *) {
1466 return IrInstructionIdAtomicRmw;
1881static constexpr IrInstGenId ir_inst_id(IrInstGenErrToInt *) {
1882 return IrInstGenIdErrToInt;
14671883}
14681884
1469static constexpr IrInstructionId ir_instruction_id(IrInstructionAtomicLoad *) {
1470 return IrInstructionIdAtomicLoad;
1885static constexpr IrInstGenId ir_inst_id(IrInstGenPanic *) {
1886 return IrInstGenIdPanic;
14711887}
14721888
1473static constexpr IrInstructionId ir_instruction_id(IrInstructionAtomicStore *) {
1474 return IrInstructionIdAtomicStore;
1889static constexpr IrInstGenId ir_inst_id(IrInstGenTagName *) {
1890 return IrInstGenIdTagName;
14751891}
14761892
1477static constexpr IrInstructionId ir_instruction_id(IrInstructionSaveErrRetAddr *) {
1478 return IrInstructionIdSaveErrRetAddr;
1893static constexpr IrInstGenId ir_inst_id(IrInstGenFieldParentPtr *) {
1894 return IrInstGenIdFieldParentPtr;
14791895}
14801896
1481static constexpr IrInstructionId ir_instruction_id(IrInstructionAddImplicitReturnType *) {
1482 return IrInstructionIdAddImplicitReturnType;
1897static constexpr IrInstGenId ir_inst_id(IrInstGenAlignCast *) {
1898 return IrInstGenIdAlignCast;
14831899}
14841900
1485static constexpr IrInstructionId ir_instruction_id(IrInstructionFloatOp *) {
1486 return IrInstructionIdFloatOp;
1901static constexpr IrInstGenId ir_inst_id(IrInstGenErrorReturnTrace *) {
1902 return IrInstGenIdErrorReturnTrace;
14871903}
14881904
1489static constexpr IrInstructionId ir_instruction_id(IrInstructionCheckRuntimeScope *) {
1490 return IrInstructionIdCheckRuntimeScope;
1905static constexpr IrInstGenId ir_inst_id(IrInstGenAtomicRmw *) {
1906 return IrInstGenIdAtomicRmw;
14911907}
14921908
1493static constexpr IrInstructionId ir_instruction_id(IrInstructionVectorToArray *) {
1494 return IrInstructionIdVectorToArray;
1909static constexpr IrInstGenId ir_inst_id(IrInstGenAtomicLoad *) {
1910 return IrInstGenIdAtomicLoad;
14951911}
14961912
1497static constexpr IrInstructionId ir_instruction_id(IrInstructionArrayToVector *) {
1498 return IrInstructionIdArrayToVector;
1913static constexpr IrInstGenId ir_inst_id(IrInstGenAtomicStore *) {
1914 return IrInstGenIdAtomicStore;
14991915}
15001916
1501static constexpr IrInstructionId ir_instruction_id(IrInstructionAssertZero *) {
1502 return IrInstructionIdAssertZero;
1917static constexpr IrInstGenId ir_inst_id(IrInstGenSaveErrRetAddr *) {
1918 return IrInstGenIdSaveErrRetAddr;
15031919}
15041920
1505static constexpr IrInstructionId ir_instruction_id(IrInstructionAssertNonNull *) {
1506 return IrInstructionIdAssertNonNull;
1921static constexpr IrInstGenId ir_inst_id(IrInstGenVectorToArray *) {
1922 return IrInstGenIdVectorToArray;
15071923}
15081924
1509static constexpr IrInstructionId ir_instruction_id(IrInstructionHasDecl *) {
1510 return IrInstructionIdHasDecl;
1925static constexpr IrInstGenId ir_inst_id(IrInstGenArrayToVector *) {
1926 return IrInstGenIdArrayToVector;
15111927}
15121928
1513static constexpr IrInstructionId ir_instruction_id(IrInstructionUndeclaredIdent *) {
1514 return IrInstructionIdUndeclaredIdent;
1929static constexpr IrInstGenId ir_inst_id(IrInstGenAssertZero *) {
1930 return IrInstGenIdAssertZero;
15151931}
15161932
1517static constexpr IrInstructionId ir_instruction_id(IrInstructionAllocaSrc *) {
1518 return IrInstructionIdAllocaSrc;
1933static constexpr IrInstGenId ir_inst_id(IrInstGenAssertNonNull *) {
1934 return IrInstGenIdAssertNonNull;
15191935}
15201936
1521static constexpr IrInstructionId ir_instruction_id(IrInstructionAllocaGen *) {
1522 return IrInstructionIdAllocaGen;
1937static constexpr IrInstGenId ir_inst_id(IrInstGenPtrOfArrayToSlice *) {
1938 return IrInstGenIdPtrOfArrayToSlice;
15231939}
15241940
1525static constexpr IrInstructionId ir_instruction_id(IrInstructionEndExpr *) {
1526 return IrInstructionIdEndExpr;
1941static constexpr IrInstGenId ir_inst_id(IrInstGenSuspendBegin *) {
1942 return IrInstGenIdSuspendBegin;
15271943}
15281944
1529static constexpr IrInstructionId ir_instruction_id(IrInstructionUnionInitNamedField *) {
1530 return IrInstructionIdUnionInitNamedField;
1945static constexpr IrInstGenId ir_inst_id(IrInstGenSuspendFinish *) {
1946 return IrInstGenIdSuspendFinish;
15311947}
15321948
1533static constexpr IrInstructionId ir_instruction_id(IrInstructionSuspendBegin *) {
1534 return IrInstructionIdSuspendBegin;
1949static constexpr IrInstGenId ir_inst_id(IrInstGenAwait *) {
1950 return IrInstGenIdAwait;
15351951}
15361952
1537static constexpr IrInstructionId ir_instruction_id(IrInstructionSuspendFinish *) {
1538 return IrInstructionIdSuspendFinish;
1953static constexpr IrInstGenId ir_inst_id(IrInstGenResume *) {
1954 return IrInstGenIdResume;
15391955}
15401956
1541static constexpr IrInstructionId ir_instruction_id(IrInstructionAwaitSrc *) {
1542 return IrInstructionIdAwaitSrc;
1957static constexpr IrInstGenId ir_inst_id(IrInstGenSpillBegin *) {
1958 return IrInstGenIdSpillBegin;
15431959}
15441960
1545static constexpr IrInstructionId ir_instruction_id(IrInstructionAwaitGen *) {
1546 return IrInstructionIdAwaitGen;
1961static constexpr IrInstGenId ir_inst_id(IrInstGenSpillEnd *) {
1962 return IrInstGenIdSpillEnd;
15471963}
15481964
1549static constexpr IrInstructionId ir_instruction_id(IrInstructionResume *) {
1550 return IrInstructionIdResume;
1965static constexpr IrInstGenId ir_inst_id(IrInstGenVectorExtractElem *) {
1966 return IrInstGenIdVectorExtractElem;
15511967}
15521968
1553static constexpr IrInstructionId ir_instruction_id(IrInstructionSpillBegin *) {
1554 return IrInstructionIdSpillBegin;
1969static constexpr IrInstGenId ir_inst_id(IrInstGenAlloca *) {
1970 return IrInstGenIdAlloca;
15551971}
15561972
1557static constexpr IrInstructionId ir_instruction_id(IrInstructionSpillEnd *) {
1558 return IrInstructionIdSpillEnd;
1973static constexpr IrInstGenId ir_inst_id(IrInstGenConst *) {
1974 return IrInstGenIdConst;
15591975}
15601976
1561static constexpr IrInstructionId ir_instruction_id(IrInstructionVectorExtractElem *) {
1562 return IrInstructionIdVectorExtractElem;
1977template<typename T>
1978static T *ir_create_instruction(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
1979 const char *name = nullptr;
1980#ifdef ZIG_ENABLE_MEM_PROFILE
1981 T *dummy = nullptr;
1982 name = ir_inst_src_type_str(ir_inst_id(dummy));
1983#endif
1984 T *special_instruction = allocate<T>(1, name);
1985 special_instruction->base.id = ir_inst_id(special_instruction);
1986 special_instruction->base.base.scope = scope;
1987 special_instruction->base.base.source_node = source_node;
1988 special_instruction->base.base.debug_id = exec_next_debug_id(irb->exec);
1989 special_instruction->base.owner_bb = irb->current_basic_block;
1990 return special_instruction;
15631991}
15641992
15651993template<typename T>
1566static T *ir_create_instruction(IrBuilder *irb, Scope *scope, AstNode *source_node) {
1994static T *ir_create_inst_gen(IrBuilderGen *irb, Scope *scope, AstNode *source_node) {
15671995 const char *name = nullptr;
15681996#ifdef ZIG_ENABLE_MEM_PROFILE
15691997 T *dummy = nullptr;
1570 name = ir_instruction_type_str(ir_instruction_id(dummy));
1998 name = ir_inst_gen_type_str(ir_inst_id(dummy));
15711999#endif
15722000 T *special_instruction = allocate<T>(1, name);
1573 special_instruction->base.id = ir_instruction_id(special_instruction);
1574 special_instruction->base.scope = scope;
1575 special_instruction->base.source_node = source_node;
1576 special_instruction->base.debug_id = exec_next_debug_id(irb->exec);
2001 special_instruction->base.id = ir_inst_id(special_instruction);
2002 special_instruction->base.base.scope = scope;
2003 special_instruction->base.base.source_node = source_node;
2004 special_instruction->base.base.debug_id = exec_next_debug_id_gen(irb->exec);
15772005 special_instruction->base.owner_bb = irb->current_basic_block;
15782006 special_instruction->base.value = allocate<ZigValue>(1, "ZigValue");
15792007 return special_instruction;
15802008}
15812009
15822010template<typename T>
1583static T *ir_create_instruction_noval(IrBuilder *irb, Scope *scope, AstNode *source_node) {
2011static T *ir_create_inst_noval(IrBuilderGen *irb, Scope *scope, AstNode *source_node) {
15842012 const char *name = nullptr;
15852013#ifdef ZIG_ENABLE_MEM_PROFILE
15862014 T *dummy = nullptr;
1587 name = ir_instruction_type_str(ir_instruction_id(dummy));
2015 name = ir_inst_gen_type_str(ir_inst_id(dummy));
15882016#endif
15892017 T *special_instruction = allocate<T>(1, name);
1590 special_instruction->base.id = ir_instruction_id(special_instruction);
1591 special_instruction->base.scope = scope;
1592 special_instruction->base.source_node = source_node;
1593 special_instruction->base.debug_id = exec_next_debug_id(irb->exec);
2018 special_instruction->base.id = ir_inst_id(special_instruction);
2019 special_instruction->base.base.scope = scope;
2020 special_instruction->base.base.source_node = source_node;
2021 special_instruction->base.base.debug_id = exec_next_debug_id_gen(irb->exec);
15942022 special_instruction->base.owner_bb = irb->current_basic_block;
15952023 return special_instruction;
15962024}
15972025
15982026template<typename T>
1599static T *ir_build_instruction(IrBuilder *irb, Scope *scope, AstNode *source_node) {
2027static T *ir_build_instruction(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
16002028 T *special_instruction = ir_create_instruction<T>(irb, scope, source_node);
16012029 ir_instruction_append(irb->current_basic_block, &special_instruction->base);
16022030 return special_instruction;
16032031}
16042032
1605static IrInstruction *ir_build_cast(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigType *dest_type,
1606 IrInstruction *value, CastOp cast_op)
2033template<typename T>
2034static T *ir_build_inst_gen(IrBuilderGen *irb, Scope *scope, AstNode *source_node) {
2035 T *special_instruction = ir_create_inst_gen<T>(irb, scope, source_node);
2036 ir_inst_gen_append(irb->current_basic_block, &special_instruction->base);
2037 return special_instruction;
2038}
2039
2040template<typename T>
2041static T *ir_build_inst_noreturn(IrBuilderGen *irb, Scope *scope, AstNode *source_node) {
2042 T *special_instruction = ir_create_inst_noval<T>(irb, scope, source_node);
2043 special_instruction->base.value = irb->codegen->intern.for_unreachable();
2044 ir_inst_gen_append(irb->current_basic_block, &special_instruction->base);
2045 return special_instruction;
2046}
2047
2048template<typename T>
2049static T *ir_build_inst_void(IrBuilderGen *irb, Scope *scope, AstNode *source_node) {
2050 T *special_instruction = ir_create_inst_noval<T>(irb, scope, source_node);
2051 special_instruction->base.value = irb->codegen->intern.for_void();
2052 ir_inst_gen_append(irb->current_basic_block, &special_instruction->base);
2053 return special_instruction;
2054}
2055
2056IrInstGen *ir_create_alloca(CodeGen *g, Scope *scope, AstNode *source_node, ZigFn *fn,
2057 ZigType *var_type, const char *name_hint)
16072058{
1608 IrInstructionCast *cast_instruction = ir_build_instruction<IrInstructionCast>(irb, scope, source_node);
1609 cast_instruction->dest_type = dest_type;
1610 cast_instruction->value = value;
1611 cast_instruction->cast_op = cast_op;
2059 IrInstGenAlloca *alloca_gen = allocate<IrInstGenAlloca>(1);
2060 alloca_gen->base.id = IrInstGenIdAlloca;
2061 alloca_gen->base.base.source_node = source_node;
2062 alloca_gen->base.base.scope = scope;
2063 alloca_gen->base.value = allocate<ZigValue>(1, "ZigValue");
2064 alloca_gen->base.value->type = get_pointer_to_type(g, var_type, false);
2065 alloca_gen->base.base.ref_count = 1;
2066 alloca_gen->name_hint = name_hint;
2067 fn->alloca_gen_list.append(alloca_gen);
2068 return &alloca_gen->base;
2069}
16122070
1613 ir_ref_instruction(value, irb->current_basic_block);
2071static IrInstGen *ir_build_cast(IrAnalyze *ira, IrInst *source_instr,ZigType *dest_type,
2072 IrInstGen *value, CastOp cast_op)
2073{
2074 IrInstGenCast *inst = ir_build_inst_gen<IrInstGenCast>(&ira->new_irb, source_instr->scope, source_instr->source_node);
2075 inst->base.value->type = dest_type;
2076 inst->value = value;
2077 inst->cast_op = cast_op;
2078
2079 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
16142080
1615 return &cast_instruction->base;
2081 return &inst->base;
16162082}
16172083
1618static IrInstruction *ir_build_cond_br(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *condition,
1619 IrBasicBlock *then_block, IrBasicBlock *else_block, IrInstruction *is_comptime)
2084static IrInstSrc *ir_build_cond_br(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *condition,
2085 IrBasicBlockSrc *then_block, IrBasicBlockSrc *else_block, IrInstSrc *is_comptime)
16202086{
1621 IrInstructionCondBr *cond_br_instruction = ir_build_instruction<IrInstructionCondBr>(irb, scope, source_node);
1622 cond_br_instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;
1623 cond_br_instruction->base.value->special = ConstValSpecialStatic;
1624 cond_br_instruction->condition = condition;
1625 cond_br_instruction->then_block = then_block;
1626 cond_br_instruction->else_block = else_block;
1627 cond_br_instruction->is_comptime = is_comptime;
2087 IrInstSrcCondBr *inst = ir_build_instruction<IrInstSrcCondBr>(irb, scope, source_node);
2088 inst->base.is_noreturn = true;
2089 inst->condition = condition;
2090 inst->then_block = then_block;
2091 inst->else_block = else_block;
2092 inst->is_comptime = is_comptime;
16282093
16292094 ir_ref_instruction(condition, irb->current_basic_block);
16302095 ir_ref_bb(then_block);
16312096 ir_ref_bb(else_block);
16322097 if (is_comptime != nullptr) ir_ref_instruction(is_comptime, irb->current_basic_block);
16332098
1634 return &cond_br_instruction->base;
2099 return &inst->base;
16352100}
16362101
1637static IrInstruction *ir_build_return(IrBuilder *irb, Scope *scope, AstNode *source_node,
1638 IrInstruction *operand)
2102static IrInstGen *ir_build_cond_br_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *condition,
2103 IrBasicBlockGen *then_block, IrBasicBlockGen *else_block)
16392104{
1640 IrInstructionReturn *return_instruction = ir_build_instruction<IrInstructionReturn>(irb, scope, source_node);
1641 return_instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;
1642 return_instruction->base.value->special = ConstValSpecialStatic;
1643 return_instruction->operand = operand;
2105 IrInstGenCondBr *inst = ir_build_inst_noreturn<IrInstGenCondBr>(&ira->new_irb, source_instr->scope, source_instr->source_node);
2106 inst->condition = condition;
2107 inst->then_block = then_block;
2108 inst->else_block = else_block;
2109
2110 ir_ref_inst_gen(condition, ira->new_irb.current_basic_block);
2111 ir_ref_bb_gen(then_block);
2112 ir_ref_bb_gen(else_block);
2113
2114 return &inst->base;
2115}
2116
2117static IrInstSrc *ir_build_return_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *operand) {
2118 IrInstSrcReturn *inst = ir_build_instruction<IrInstSrcReturn>(irb, scope, source_node);
2119 inst->base.is_noreturn = true;
2120 inst->operand = operand;
16442121
16452122 if (operand != nullptr) ir_ref_instruction(operand, irb->current_basic_block);
16462123
1647 return &return_instruction->base;
2124 return &inst->base;
2125}
2126
2127static IrInstGen *ir_build_return_gen(IrAnalyze *ira, IrInst *source_inst, IrInstGen *operand) {
2128 IrInstGenReturn *inst = ir_build_inst_noreturn<IrInstGenReturn>(&ira->new_irb,
2129 source_inst->scope, source_inst->source_node);
2130 inst->operand = operand;
2131
2132 if (operand != nullptr) ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
2133
2134 return &inst->base;
16482135}
16492136
1650static IrInstruction *ir_build_const_void(IrBuilder *irb, Scope *scope, AstNode *source_node) {
1651 IrInstructionConst *const_instruction = ir_create_instruction_noval<IrInstructionConst>(irb, scope, source_node);
2137static IrInstSrc *ir_build_const_void(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
2138 IrInstSrcConst *const_instruction = ir_create_instruction<IrInstSrcConst>(irb, scope, source_node);
16522139 ir_instruction_append(irb->current_basic_block, &const_instruction->base);
1653 const_instruction->base.value = irb->codegen->intern.for_void();
2140 const_instruction->value = irb->codegen->intern.for_void();
16542141 return &const_instruction->base;
16552142}
16562143
1657static IrInstruction *ir_build_const_undefined(IrBuilder *irb, Scope *scope, AstNode *source_node) {
1658 IrInstructionConst *const_instruction = ir_create_instruction_noval<IrInstructionConst>(irb, scope, source_node);
2144static IrInstSrc *ir_build_const_undefined(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
2145 IrInstSrcConst *const_instruction = ir_create_instruction<IrInstSrcConst>(irb, scope, source_node);
16592146 ir_instruction_append(irb->current_basic_block, &const_instruction->base);
1660 const_instruction->base.value = irb->codegen->intern.for_undefined();
2147 const_instruction->value = irb->codegen->intern.for_undefined();
16612148 return &const_instruction->base;
16622149}
16632150
1664static IrInstruction *ir_build_const_uint(IrBuilder *irb, Scope *scope, AstNode *source_node, uint64_t value) {
1665 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
1666 const_instruction->base.value->type = irb->codegen->builtin_types.entry_num_lit_int;
1667 const_instruction->base.value->special = ConstValSpecialStatic;
1668 bigint_init_unsigned(&const_instruction->base.value->data.x_bigint, value);
2151static IrInstSrc *ir_build_const_uint(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, uint64_t value) {
2152 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
2153 const_instruction->value = create_const_vals(1);
2154 const_instruction->value->type = irb->codegen->builtin_types.entry_num_lit_int;
2155 const_instruction->value->special = ConstValSpecialStatic;
2156 bigint_init_unsigned(&const_instruction->value->data.x_bigint, value);
16692157 return &const_instruction->base;
16702158}
16712159
1672static IrInstruction *ir_build_const_bigint(IrBuilder *irb, Scope *scope, AstNode *source_node, BigInt *bigint) {
1673 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
1674 const_instruction->base.value->type = irb->codegen->builtin_types.entry_num_lit_int;
1675 const_instruction->base.value->special = ConstValSpecialStatic;
1676 bigint_init_bigint(&const_instruction->base.value->data.x_bigint, bigint);
2160static IrInstSrc *ir_build_const_bigint(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, BigInt *bigint) {
2161 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
2162 const_instruction->value = create_const_vals(1);
2163 const_instruction->value->type = irb->codegen->builtin_types.entry_num_lit_int;
2164 const_instruction->value->special = ConstValSpecialStatic;
2165 bigint_init_bigint(&const_instruction->value->data.x_bigint, bigint);
16772166 return &const_instruction->base;
16782167}
16792168
1680static IrInstruction *ir_build_const_bigfloat(IrBuilder *irb, Scope *scope, AstNode *source_node, BigFloat *bigfloat) {
1681 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
1682 const_instruction->base.value->type = irb->codegen->builtin_types.entry_num_lit_float;
1683 const_instruction->base.value->special = ConstValSpecialStatic;
1684 bigfloat_init_bigfloat(&const_instruction->base.value->data.x_bigfloat, bigfloat);
2169static IrInstSrc *ir_build_const_bigfloat(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, BigFloat *bigfloat) {
2170 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
2171 const_instruction->value = create_const_vals(1);
2172 const_instruction->value->type = irb->codegen->builtin_types.entry_num_lit_float;
2173 const_instruction->value->special = ConstValSpecialStatic;
2174 bigfloat_init_bigfloat(&const_instruction->value->data.x_bigfloat, bigfloat);
16852175 return &const_instruction->base;
16862176}
16872177
1688static IrInstruction *ir_build_const_null(IrBuilder *irb, Scope *scope, AstNode *source_node) {
1689 IrInstructionConst *const_instruction = ir_create_instruction_noval<IrInstructionConst>(irb, scope, source_node);
2178static IrInstSrc *ir_build_const_null(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
2179 IrInstSrcConst *const_instruction = ir_create_instruction<IrInstSrcConst>(irb, scope, source_node);
16902180 ir_instruction_append(irb->current_basic_block, &const_instruction->base);
1691 const_instruction->base.value = irb->codegen->intern.for_null();
2181 const_instruction->value = irb->codegen->intern.for_null();
16922182 return &const_instruction->base;
16932183}
16942184
1695static IrInstruction *ir_build_const_usize(IrBuilder *irb, Scope *scope, AstNode *source_node, uint64_t value) {
1696 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
1697 const_instruction->base.value->type = irb->codegen->builtin_types.entry_usize;
1698 const_instruction->base.value->special = ConstValSpecialStatic;
1699 bigint_init_unsigned(&const_instruction->base.value->data.x_bigint, value);
2185static IrInstSrc *ir_build_const_usize(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, uint64_t value) {
2186 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
2187 const_instruction->value = create_const_vals(1);
2188 const_instruction->value->type = irb->codegen->builtin_types.entry_usize;
2189 const_instruction->value->special = ConstValSpecialStatic;
2190 bigint_init_unsigned(&const_instruction->value->data.x_bigint, value);
17002191 return &const_instruction->base;
17012192}
17022193
1703static IrInstruction *ir_create_const_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
2194static IrInstSrc *ir_create_const_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
17042195 ZigType *type_entry)
17052196{
1706 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(irb, scope, source_node);
1707 const_instruction->base.value->type = irb->codegen->builtin_types.entry_type;
1708 const_instruction->base.value->special = ConstValSpecialStatic;
1709 const_instruction->base.value->data.x_type = type_entry;
2197 IrInstSrcConst *const_instruction = ir_create_instruction<IrInstSrcConst>(irb, scope, source_node);
2198 const_instruction->value = create_const_vals(1);
2199 const_instruction->value->type = irb->codegen->builtin_types.entry_type;
2200 const_instruction->value->special = ConstValSpecialStatic;
2201 const_instruction->value->data.x_type = type_entry;
17102202 return &const_instruction->base;
17112203}
17122204
1713static IrInstruction *ir_build_const_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
2205static IrInstSrc *ir_build_const_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
17142206 ZigType *type_entry)
17152207{
1716 IrInstruction *instruction = ir_create_const_type(irb, scope, source_node, type_entry);
2208 IrInstSrc *instruction = ir_create_const_type(irb, scope, source_node, type_entry);
17172209 ir_instruction_append(irb->current_basic_block, instruction);
17182210 return instruction;
17192211}
17202212
1721static IrInstruction *ir_create_const_fn(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigFn *fn_entry) {
1722 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(irb, scope, source_node);
1723 const_instruction->base.value->type = fn_entry->type_entry;
1724 const_instruction->base.value->special = ConstValSpecialStatic;
1725 const_instruction->base.value->data.x_ptr.data.fn.fn_entry = fn_entry;
1726 const_instruction->base.value->data.x_ptr.mut = ConstPtrMutComptimeConst;
1727 const_instruction->base.value->data.x_ptr.special = ConstPtrSpecialFunction;
1728 return &const_instruction->base;
1729}
1730
1731static IrInstruction *ir_build_const_import(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigType *import) {
1732 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
1733 const_instruction->base.value->type = irb->codegen->builtin_types.entry_type;
1734 const_instruction->base.value->special = ConstValSpecialStatic;
1735 const_instruction->base.value->data.x_type = import;
1736 return &const_instruction->base;
1737}
1738
1739static IrInstruction *ir_build_const_bool(IrBuilder *irb, Scope *scope, AstNode *source_node, bool value) {
1740 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
1741 const_instruction->base.value->type = irb->codegen->builtin_types.entry_bool;
1742 const_instruction->base.value->special = ConstValSpecialStatic;
1743 const_instruction->base.value->data.x_bool = value;
2213static IrInstSrc *ir_build_const_import(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, ZigType *import) {
2214 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
2215 const_instruction->value = create_const_vals(1);
2216 const_instruction->value->type = irb->codegen->builtin_types.entry_type;
2217 const_instruction->value->special = ConstValSpecialStatic;
2218 const_instruction->value->data.x_type = import;
17442219 return &const_instruction->base;
17452220}
17462221
1747static IrInstruction *ir_build_const_enum_literal(IrBuilder *irb, Scope *scope, AstNode *source_node, Buf *name) {
1748 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
1749 const_instruction->base.value->type = irb->codegen->builtin_types.entry_enum_literal;
1750 const_instruction->base.value->special = ConstValSpecialStatic;
1751 const_instruction->base.value->data.x_enum_literal = name;
2222static IrInstSrc *ir_build_const_bool(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, bool value) {
2223 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
2224 const_instruction->value = create_const_vals(1);
2225 const_instruction->value->type = irb->codegen->builtin_types.entry_bool;
2226 const_instruction->value->special = ConstValSpecialStatic;
2227 const_instruction->value->data.x_bool = value;
17522228 return &const_instruction->base;
17532229}
17542230
1755static IrInstruction *ir_build_const_bound_fn(IrBuilder *irb, Scope *scope, AstNode *source_node,
1756 ZigFn *fn_entry, IrInstruction *first_arg)
1757{
1758 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
1759 const_instruction->base.value->type = get_bound_fn_type(irb->codegen, fn_entry);
1760 const_instruction->base.value->special = ConstValSpecialStatic;
1761 const_instruction->base.value->data.x_bound_fn.fn = fn_entry;
1762 const_instruction->base.value->data.x_bound_fn.first_arg = first_arg;
2231static IrInstSrc *ir_build_const_enum_literal(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, Buf *name) {
2232 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
2233 const_instruction->value = create_const_vals(1);
2234 const_instruction->value->type = irb->codegen->builtin_types.entry_enum_literal;
2235 const_instruction->value->special = ConstValSpecialStatic;
2236 const_instruction->value->data.x_enum_literal = name;
17632237 return &const_instruction->base;
17642238}
17652239
1766static IrInstruction *ir_create_const_str_lit(IrBuilder *irb, Scope *scope, AstNode *source_node, Buf *str) {
1767 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(irb, scope, source_node);
1768 init_const_str_lit(irb->codegen, const_instruction->base.value, str);
2240static IrInstSrc *ir_create_const_str_lit(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, Buf *str) {
2241 IrInstSrcConst *const_instruction = ir_create_instruction<IrInstSrcConst>(irb, scope, source_node);
2242 const_instruction->value = create_const_vals(1);
2243 init_const_str_lit(irb->codegen, const_instruction->value, str);
17692244
17702245 return &const_instruction->base;
17712246}
17722247
1773static IrInstruction *ir_build_const_str_lit(IrBuilder *irb, Scope *scope, AstNode *source_node, Buf *str) {
1774 IrInstruction *instruction = ir_create_const_str_lit(irb, scope, source_node, str);
2248static IrInstSrc *ir_build_const_str_lit(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, Buf *str) {
2249 IrInstSrc *instruction = ir_create_const_str_lit(irb, scope, source_node, str);
17752250 ir_instruction_append(irb->current_basic_block, instruction);
17762251 return instruction;
17772252}
17782253
1779static IrInstruction *ir_build_bin_op(IrBuilder *irb, Scope *scope, AstNode *source_node, IrBinOp op_id,
1780 IrInstruction *op1, IrInstruction *op2, bool safety_check_on)
2254static IrInstSrc *ir_build_bin_op(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrBinOp op_id,
2255 IrInstSrc *op1, IrInstSrc *op2, bool safety_check_on)
17812256{
1782 IrInstructionBinOp *bin_op_instruction = ir_build_instruction<IrInstructionBinOp>(irb, scope, source_node);
1783 bin_op_instruction->op_id = op_id;
1784 bin_op_instruction->op1 = op1;
1785 bin_op_instruction->op2 = op2;
1786 bin_op_instruction->safety_check_on = safety_check_on;
2257 IrInstSrcBinOp *inst = ir_build_instruction<IrInstSrcBinOp>(irb, scope, source_node);
2258 inst->op_id = op_id;
2259 inst->op1 = op1;
2260 inst->op2 = op2;
2261 inst->safety_check_on = safety_check_on;
17872262
17882263 ir_ref_instruction(op1, irb->current_basic_block);
17892264 ir_ref_instruction(op2, irb->current_basic_block);
17902265
1791 return &bin_op_instruction->base;
2266 return &inst->base;
17922267}
17932268
1794static IrInstruction *ir_build_bin_op_gen(IrAnalyze *ira, IrInstruction *source_instr, ZigType *res_type,
1795 IrBinOp op_id, IrInstruction *op1, IrInstruction *op2, bool safety_check_on)
2269static IrInstGen *ir_build_bin_op_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *res_type,
2270 IrBinOp op_id, IrInstGen *op1, IrInstGen *op2, bool safety_check_on)
17962271{
1797 IrInstructionBinOp *bin_op_instruction = ir_build_instruction<IrInstructionBinOp>(&ira->new_irb,
2272 IrInstGenBinOp *inst = ir_build_inst_gen<IrInstGenBinOp>(&ira->new_irb,
17982273 source_instr->scope, source_instr->source_node);
1799 bin_op_instruction->base.value->type = res_type;
1800 bin_op_instruction->op_id = op_id;
1801 bin_op_instruction->op1 = op1;
1802 bin_op_instruction->op2 = op2;
1803 bin_op_instruction->safety_check_on = safety_check_on;
2274 inst->base.value->type = res_type;
2275 inst->op_id = op_id;
2276 inst->op1 = op1;
2277 inst->op2 = op2;
2278 inst->safety_check_on = safety_check_on;
18042279
1805 ir_ref_instruction(op1, ira->new_irb.current_basic_block);
1806 ir_ref_instruction(op2, ira->new_irb.current_basic_block);
2280 ir_ref_inst_gen(op1, ira->new_irb.current_basic_block);
2281 ir_ref_inst_gen(op2, ira->new_irb.current_basic_block);
18072282
1808 return &bin_op_instruction->base;
2283 return &inst->base;
18092284}
18102285
18112286
1812static IrInstruction *ir_build_merge_err_sets(IrBuilder *irb, Scope *scope, AstNode *source_node,
1813 IrInstruction *op1, IrInstruction *op2, Buf *type_name)
2287static IrInstSrc *ir_build_merge_err_sets(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2288 IrInstSrc *op1, IrInstSrc *op2, Buf *type_name)
18142289{
1815 IrInstructionMergeErrSets *merge_err_sets_instruction = ir_build_instruction<IrInstructionMergeErrSets>(irb, scope, source_node);
1816 merge_err_sets_instruction->op1 = op1;
1817 merge_err_sets_instruction->op2 = op2;
1818 merge_err_sets_instruction->type_name = type_name;
2290 IrInstSrcMergeErrSets *inst = ir_build_instruction<IrInstSrcMergeErrSets>(irb, scope, source_node);
2291 inst->op1 = op1;
2292 inst->op2 = op2;
2293 inst->type_name = type_name;
18192294
18202295 ir_ref_instruction(op1, irb->current_basic_block);
18212296 ir_ref_instruction(op2, irb->current_basic_block);
18222297
1823 return &merge_err_sets_instruction->base;
2298 return &inst->base;
18242299}
18252300
1826static IrInstruction *ir_build_var_ptr_x(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigVar *var,
2301static IrInstSrc *ir_build_var_ptr_x(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, ZigVar *var,
18272302 ScopeFnDef *crossed_fndef_scope)
18282303{
1829 IrInstructionVarPtr *instruction = ir_build_instruction<IrInstructionVarPtr>(irb, scope, source_node);
2304 IrInstSrcVarPtr *instruction = ir_build_instruction<IrInstSrcVarPtr>(irb, scope, source_node);
18302305 instruction->var = var;
18312306 instruction->crossed_fndef_scope = crossed_fndef_scope;
18322307
......@@ -1835,22 +2310,30 @@ static IrInstruction *ir_build_var_ptr_x(IrBuilder *irb, Scope *scope, AstNode *
18352310 return &instruction->base;
18362311}
18372312
1838static IrInstruction *ir_build_var_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigVar *var) {
2313static IrInstSrc *ir_build_var_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, ZigVar *var) {
18392314 return ir_build_var_ptr_x(irb, scope, source_node, var, nullptr);
18402315}
18412316
1842static IrInstruction *ir_build_return_ptr(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *ty) {
1843 IrInstructionReturnPtr *instruction = ir_build_instruction<IrInstructionReturnPtr>(&ira->new_irb,
1844 source_instruction->scope, source_instruction->source_node);
2317static IrInstGen *ir_build_var_ptr_gen(IrAnalyze *ira, IrInst *source_instr, ZigVar *var) {
2318 IrInstGenVarPtr *instruction = ir_build_inst_gen<IrInstGenVarPtr>(&ira->new_irb, source_instr->scope, source_instr->source_node);
2319 instruction->var = var;
2320
2321 ir_ref_var(var);
2322
2323 return &instruction->base;
2324}
2325
2326static IrInstGen *ir_build_return_ptr(IrAnalyze *ira, Scope *scope, AstNode *source_node, ZigType *ty) {
2327 IrInstGenReturnPtr *instruction = ir_build_inst_gen<IrInstGenReturnPtr>(&ira->new_irb, scope, source_node);
18452328 instruction->base.value->type = ty;
18462329 return &instruction->base;
18472330}
18482331
1849static IrInstruction *ir_build_elem_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
1850 IrInstruction *array_ptr, IrInstruction *elem_index, bool safety_check_on, PtrLen ptr_len,
2332static IrInstSrc *ir_build_elem_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2333 IrInstSrc *array_ptr, IrInstSrc *elem_index, bool safety_check_on, PtrLen ptr_len,
18512334 AstNode *init_array_type_source_node)
18522335{
1853 IrInstructionElemPtr *instruction = ir_build_instruction<IrInstructionElemPtr>(irb, scope, source_node);
2336 IrInstSrcElemPtr *instruction = ir_build_instruction<IrInstSrcElemPtr>(irb, scope, source_node);
18542337 instruction->array_ptr = array_ptr;
18552338 instruction->elem_index = elem_index;
18562339 instruction->safety_check_on = safety_check_on;
......@@ -1863,10 +2346,25 @@ static IrInstruction *ir_build_elem_ptr(IrBuilder *irb, Scope *scope, AstNode *s
18632346 return &instruction->base;
18642347}
18652348
1866static IrInstruction *ir_build_field_ptr_instruction(IrBuilder *irb, Scope *scope, AstNode *source_node,
1867 IrInstruction *container_ptr, IrInstruction *field_name_expr, bool initializing)
2349static IrInstGen *ir_build_elem_ptr_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
2350 IrInstGen *array_ptr, IrInstGen *elem_index, bool safety_check_on, ZigType *return_type)
2351{
2352 IrInstGenElemPtr *instruction = ir_build_inst_gen<IrInstGenElemPtr>(&ira->new_irb, scope, source_node);
2353 instruction->base.value->type = return_type;
2354 instruction->array_ptr = array_ptr;
2355 instruction->elem_index = elem_index;
2356 instruction->safety_check_on = safety_check_on;
2357
2358 ir_ref_inst_gen(array_ptr, ira->new_irb.current_basic_block);
2359 ir_ref_inst_gen(elem_index, ira->new_irb.current_basic_block);
2360
2361 return &instruction->base;
2362}
2363
2364static IrInstSrc *ir_build_field_ptr_instruction(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2365 IrInstSrc *container_ptr, IrInstSrc *field_name_expr, bool initializing)
18682366{
1869 IrInstructionFieldPtr *instruction = ir_build_instruction<IrInstructionFieldPtr>(irb, scope, source_node);
2367 IrInstSrcFieldPtr *instruction = ir_build_instruction<IrInstSrcFieldPtr>(irb, scope, source_node);
18702368 instruction->container_ptr = container_ptr;
18712369 instruction->field_name_buffer = nullptr;
18722370 instruction->field_name_expr = field_name_expr;
......@@ -1878,10 +2376,10 @@ static IrInstruction *ir_build_field_ptr_instruction(IrBuilder *irb, Scope *scop
18782376 return &instruction->base;
18792377}
18802378
1881static IrInstruction *ir_build_field_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
1882 IrInstruction *container_ptr, Buf *field_name, bool initializing)
2379static IrInstSrc *ir_build_field_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2380 IrInstSrc *container_ptr, Buf *field_name, bool initializing)
18832381{
1884 IrInstructionFieldPtr *instruction = ir_build_instruction<IrInstructionFieldPtr>(irb, scope, source_node);
2382 IrInstSrcFieldPtr *instruction = ir_build_instruction<IrInstSrcFieldPtr>(irb, scope, source_node);
18852383 instruction->container_ptr = container_ptr;
18862384 instruction->field_name_buffer = field_name;
18872385 instruction->field_name_expr = nullptr;
......@@ -1892,10 +2390,10 @@ static IrInstruction *ir_build_field_ptr(IrBuilder *irb, Scope *scope, AstNode *
18922390 return &instruction->base;
18932391}
18942392
1895static IrInstruction *ir_build_has_field(IrBuilder *irb, Scope *scope, AstNode *source_node,
1896 IrInstruction *container_type, IrInstruction *field_name)
2393static IrInstSrc *ir_build_has_field(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2394 IrInstSrc *container_type, IrInstSrc *field_name)
18972395{
1898 IrInstructionHasField *instruction = ir_build_instruction<IrInstructionHasField>(irb, scope, source_node);
2396 IrInstSrcHasField *instruction = ir_build_instruction<IrInstSrcHasField>(irb, scope, source_node);
18992397 instruction->container_type = container_type;
19002398 instruction->field_name = field_name;
19012399
......@@ -1905,36 +2403,39 @@ static IrInstruction *ir_build_has_field(IrBuilder *irb, Scope *scope, AstNode *
19052403 return &instruction->base;
19062404}
19072405
1908static IrInstruction *ir_build_struct_field_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
1909 IrInstruction *struct_ptr, TypeStructField *field)
2406static IrInstGen *ir_build_struct_field_ptr(IrAnalyze *ira, IrInst *source_instr,
2407 IrInstGen *struct_ptr, TypeStructField *field, ZigType *ptr_type)
19102408{
1911 IrInstructionStructFieldPtr *instruction = ir_build_instruction<IrInstructionStructFieldPtr>(irb, scope, source_node);
1912 instruction->struct_ptr = struct_ptr;
1913 instruction->field = field;
2409 IrInstGenStructFieldPtr *inst = ir_build_inst_gen<IrInstGenStructFieldPtr>(&ira->new_irb, source_instr->scope, source_instr->source_node);
2410 inst->base.value->type = ptr_type;
2411 inst->struct_ptr = struct_ptr;
2412 inst->field = field;
19142413
1915 ir_ref_instruction(struct_ptr, irb->current_basic_block);
2414 ir_ref_inst_gen(struct_ptr, ira->new_irb.current_basic_block);
19162415
1917 return &instruction->base;
2416 return &inst->base;
19182417}
19192418
1920static IrInstruction *ir_build_union_field_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
1921 IrInstruction *union_ptr, TypeUnionField *field, bool safety_check_on, bool initializing)
2419static IrInstGen *ir_build_union_field_ptr(IrAnalyze *ira, IrInst *source_instr,
2420 IrInstGen *union_ptr, TypeUnionField *field, bool safety_check_on, bool initializing, ZigType *ptr_type)
19222421{
1923 IrInstructionUnionFieldPtr *instruction = ir_build_instruction<IrInstructionUnionFieldPtr>(irb, scope, source_node);
1924 instruction->initializing = initializing;
1925 instruction->safety_check_on = safety_check_on;
1926 instruction->union_ptr = union_ptr;
1927 instruction->field = field;
2422 IrInstGenUnionFieldPtr *inst = ir_build_inst_gen<IrInstGenUnionFieldPtr>(&ira->new_irb,
2423 source_instr->scope, source_instr->source_node);
2424 inst->base.value->type = ptr_type;
2425 inst->initializing = initializing;
2426 inst->safety_check_on = safety_check_on;
2427 inst->union_ptr = union_ptr;
2428 inst->field = field;
19282429
1929 ir_ref_instruction(union_ptr, irb->current_basic_block);
2430 ir_ref_inst_gen(union_ptr, ira->new_irb.current_basic_block);
19302431
1931 return &instruction->base;
2432 return &inst->base;
19322433}
19332434
1934static IrInstruction *ir_build_call_extra(IrBuilder *irb, Scope *scope, AstNode *source_node,
1935 IrInstruction *options, IrInstruction *fn_ref, IrInstruction *args, ResultLoc *result_loc)
2435static IrInstSrc *ir_build_call_extra(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2436 IrInstSrc *options, IrInstSrc *fn_ref, IrInstSrc *args, ResultLoc *result_loc)
19362437{
1937 IrInstructionCallExtra *call_instruction = ir_build_instruction<IrInstructionCallExtra>(irb, scope, source_node);
2438 IrInstSrcCallExtra *call_instruction = ir_build_instruction<IrInstSrcCallExtra>(irb, scope, source_node);
19382439 call_instruction->options = options;
19392440 call_instruction->fn_ref = fn_ref;
19402441 call_instruction->args = args;
......@@ -1947,11 +2448,11 @@ static IrInstruction *ir_build_call_extra(IrBuilder *irb, Scope *scope, AstNode
19472448 return &call_instruction->base;
19482449}
19492450
1950static IrInstruction *ir_build_call_src_args(IrBuilder *irb, Scope *scope, AstNode *source_node,
1951 IrInstruction *options, IrInstruction *fn_ref, IrInstruction **args_ptr, size_t args_len,
2451static IrInstSrc *ir_build_call_args(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2452 IrInstSrc *options, IrInstSrc *fn_ref, IrInstSrc **args_ptr, size_t args_len,
19522453 ResultLoc *result_loc)
19532454{
1954 IrInstructionCallSrcArgs *call_instruction = ir_build_instruction<IrInstructionCallSrcArgs>(irb, scope, source_node);
2455 IrInstSrcCallArgs *call_instruction = ir_build_instruction<IrInstSrcCallArgs>(irb, scope, source_node);
19552456 call_instruction->options = options;
19562457 call_instruction->fn_ref = fn_ref;
19572458 call_instruction->args_ptr = args_ptr;
......@@ -1966,12 +2467,12 @@ static IrInstruction *ir_build_call_src_args(IrBuilder *irb, Scope *scope, AstNo
19662467 return &call_instruction->base;
19672468}
19682469
1969static IrInstruction *ir_build_call_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
1970 ZigFn *fn_entry, IrInstruction *fn_ref, size_t arg_count, IrInstruction **args,
1971 IrInstruction *ret_ptr, CallModifier modifier, bool is_async_call_builtin,
1972 IrInstruction *new_stack, ResultLoc *result_loc)
2470static IrInstSrc *ir_build_call_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2471 ZigFn *fn_entry, IrInstSrc *fn_ref, size_t arg_count, IrInstSrc **args,
2472 IrInstSrc *ret_ptr, CallModifier modifier, bool is_async_call_builtin,
2473 IrInstSrc *new_stack, ResultLoc *result_loc)
19732474{
1974 IrInstructionCallSrc *call_instruction = ir_build_instruction<IrInstructionCallSrc>(irb, scope, source_node);
2475 IrInstSrcCall *call_instruction = ir_build_instruction<IrInstSrcCall>(irb, scope, source_node);
19752476 call_instruction->fn_entry = fn_entry;
19762477 call_instruction->fn_ref = fn_ref;
19772478 call_instruction->args = args;
......@@ -1991,12 +2492,12 @@ static IrInstruction *ir_build_call_src(IrBuilder *irb, Scope *scope, AstNode *s
19912492 return &call_instruction->base;
19922493}
19932494
1994static IrInstructionCallGen *ir_build_call_gen(IrAnalyze *ira, IrInstruction *source_instruction,
1995 ZigFn *fn_entry, IrInstruction *fn_ref, size_t arg_count, IrInstruction **args,
1996 CallModifier modifier, IrInstruction *new_stack, bool is_async_call_builtin,
1997 IrInstruction *result_loc, ZigType *return_type)
2495static IrInstGenCall *ir_build_call_gen(IrAnalyze *ira, IrInst *source_instruction,
2496 ZigFn *fn_entry, IrInstGen *fn_ref, size_t arg_count, IrInstGen **args,
2497 CallModifier modifier, IrInstGen *new_stack, bool is_async_call_builtin,
2498 IrInstGen *result_loc, ZigType *return_type)
19982499{
1999 IrInstructionCallGen *call_instruction = ir_build_instruction<IrInstructionCallGen>(&ira->new_irb,
2500 IrInstGenCall *call_instruction = ir_build_inst_gen<IrInstGenCall>(&ira->new_irb,
20002501 source_instruction->scope, source_instruction->source_node);
20012502 call_instruction->base.value->type = return_type;
20022503 call_instruction->fn_entry = fn_entry;
......@@ -2008,23 +2509,23 @@ static IrInstructionCallGen *ir_build_call_gen(IrAnalyze *ira, IrInstruction *so
20082509 call_instruction->new_stack = new_stack;
20092510 call_instruction->result_loc = result_loc;
20102511
2011 if (fn_ref != nullptr) ir_ref_instruction(fn_ref, ira->new_irb.current_basic_block);
2512 if (fn_ref != nullptr) ir_ref_inst_gen(fn_ref, ira->new_irb.current_basic_block);
20122513 for (size_t i = 0; i < arg_count; i += 1)
2013 ir_ref_instruction(args[i], ira->new_irb.current_basic_block);
2014 if (new_stack != nullptr) ir_ref_instruction(new_stack, ira->new_irb.current_basic_block);
2015 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
2514 ir_ref_inst_gen(args[i], ira->new_irb.current_basic_block);
2515 if (new_stack != nullptr) ir_ref_inst_gen(new_stack, ira->new_irb.current_basic_block);
2516 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
20162517
20172518 return call_instruction;
20182519}
20192520
2020static IrInstruction *ir_build_phi(IrBuilder *irb, Scope *scope, AstNode *source_node,
2021 size_t incoming_count, IrBasicBlock **incoming_blocks, IrInstruction **incoming_values,
2521static IrInstSrc *ir_build_phi(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2522 size_t incoming_count, IrBasicBlockSrc **incoming_blocks, IrInstSrc **incoming_values,
20222523 ResultLocPeerParent *peer_parent)
20232524{
20242525 assert(incoming_count != 0);
20252526 assert(incoming_count != SIZE_MAX);
20262527
2027 IrInstructionPhi *phi_instruction = ir_build_instruction<IrInstructionPhi>(irb, scope, source_node);
2528 IrInstSrcPhi *phi_instruction = ir_build_instruction<IrInstSrcPhi>(irb, scope, source_node);
20282529 phi_instruction->incoming_count = incoming_count;
20292530 phi_instruction->incoming_blocks = incoming_blocks;
20302531 phi_instruction->incoming_values = incoming_values;
......@@ -2038,56 +2539,77 @@ static IrInstruction *ir_build_phi(IrBuilder *irb, Scope *scope, AstNode *source
20382539 return &phi_instruction->base;
20392540}
20402541
2041static IrInstruction *ir_create_br(IrBuilder *irb, Scope *scope, AstNode *source_node,
2042 IrBasicBlock *dest_block, IrInstruction *is_comptime)
2542static IrInstGen *ir_build_phi_gen(IrAnalyze *ira, IrInst *source_instr, size_t incoming_count,
2543 IrBasicBlockGen **incoming_blocks, IrInstGen **incoming_values, ZigType *result_type)
20432544{
2044 IrInstructionBr *br_instruction = ir_create_instruction<IrInstructionBr>(irb, scope, source_node);
2045 br_instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;
2046 br_instruction->base.value->special = ConstValSpecialStatic;
2047 br_instruction->dest_block = dest_block;
2048 br_instruction->is_comptime = is_comptime;
2545 assert(incoming_count != 0);
2546 assert(incoming_count != SIZE_MAX);
20492547
2050 ir_ref_bb(dest_block);
2051 if (is_comptime) ir_ref_instruction(is_comptime, irb->current_basic_block);
2548 IrInstGenPhi *phi_instruction = ir_build_inst_gen<IrInstGenPhi>(&ira->new_irb,
2549 source_instr->scope, source_instr->source_node);
2550 phi_instruction->base.value->type = result_type;
2551 phi_instruction->incoming_count = incoming_count;
2552 phi_instruction->incoming_blocks = incoming_blocks;
2553 phi_instruction->incoming_values = incoming_values;
20522554
2053 return &br_instruction->base;
2054}
2555 for (size_t i = 0; i < incoming_count; i += 1) {
2556 ir_ref_bb_gen(incoming_blocks[i]);
2557 ir_ref_inst_gen(incoming_values[i], ira->new_irb.current_basic_block);
2558 }
20552559
2056static IrInstruction *ir_build_br(IrBuilder *irb, Scope *scope, AstNode *source_node,
2057 IrBasicBlock *dest_block, IrInstruction *is_comptime)
2058{
2059 IrInstruction *instruction = ir_create_br(irb, scope, source_node, dest_block, is_comptime);
2060 ir_instruction_append(irb->current_basic_block, instruction);
2061 return instruction;
2560 return &phi_instruction->base;
20622561}
20632562
2064static IrInstruction *ir_build_ptr_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
2065 IrInstruction *child_type, bool is_const, bool is_volatile, PtrLen ptr_len,
2066 IrInstruction *sentinel, IrInstruction *align_value,
2067 uint32_t bit_offset_start, uint32_t host_int_bytes, bool is_allow_zero)
2563static IrInstSrc *ir_build_br(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2564 IrBasicBlockSrc *dest_block, IrInstSrc *is_comptime)
20682565{
2069 IrInstructionPtrType *ptr_type_of_instruction = ir_build_instruction<IrInstructionPtrType>(irb, scope, source_node);
2070 ptr_type_of_instruction->sentinel = sentinel;
2071 ptr_type_of_instruction->align_value = align_value;
2072 ptr_type_of_instruction->child_type = child_type;
2073 ptr_type_of_instruction->is_const = is_const;
2074 ptr_type_of_instruction->is_volatile = is_volatile;
2075 ptr_type_of_instruction->ptr_len = ptr_len;
2076 ptr_type_of_instruction->bit_offset_start = bit_offset_start;
2077 ptr_type_of_instruction->host_int_bytes = host_int_bytes;
2078 ptr_type_of_instruction->is_allow_zero = is_allow_zero;
2566 IrInstSrcBr *inst = ir_build_instruction<IrInstSrcBr>(irb, scope, source_node);
2567 inst->base.is_noreturn = true;
2568 inst->dest_block = dest_block;
2569 inst->is_comptime = is_comptime;
20792570
2080 if (sentinel) ir_ref_instruction(sentinel, irb->current_basic_block);
2081 if (align_value) ir_ref_instruction(align_value, irb->current_basic_block);
2082 ir_ref_instruction(child_type, irb->current_basic_block);
2571 ir_ref_bb(dest_block);
2572 if (is_comptime) ir_ref_instruction(is_comptime, irb->current_basic_block);
2573
2574 return &inst->base;
2575}
2576
2577static IrInstGen *ir_build_br_gen(IrAnalyze *ira, IrInst *source_instr, IrBasicBlockGen *dest_block) {
2578 IrInstGenBr *inst = ir_build_inst_noreturn<IrInstGenBr>(&ira->new_irb, source_instr->scope, source_instr->source_node);
2579 inst->dest_block = dest_block;
2580
2581 ir_ref_bb_gen(dest_block);
2582
2583 return &inst->base;
2584}
2585
2586static IrInstSrc *ir_build_ptr_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2587 IrInstSrc *child_type, bool is_const, bool is_volatile, PtrLen ptr_len,
2588 IrInstSrc *sentinel, IrInstSrc *align_value,
2589 uint32_t bit_offset_start, uint32_t host_int_bytes, bool is_allow_zero)
2590{
2591 IrInstSrcPtrType *inst = ir_build_instruction<IrInstSrcPtrType>(irb, scope, source_node);
2592 inst->sentinel = sentinel;
2593 inst->align_value = align_value;
2594 inst->child_type = child_type;
2595 inst->is_const = is_const;
2596 inst->is_volatile = is_volatile;
2597 inst->ptr_len = ptr_len;
2598 inst->bit_offset_start = bit_offset_start;
2599 inst->host_int_bytes = host_int_bytes;
2600 inst->is_allow_zero = is_allow_zero;
20832601
2084 return &ptr_type_of_instruction->base;
2602 if (sentinel) ir_ref_instruction(sentinel, irb->current_basic_block);
2603 if (align_value) ir_ref_instruction(align_value, irb->current_basic_block);
2604 ir_ref_instruction(child_type, irb->current_basic_block);
2605
2606 return &inst->base;
20852607}
20862608
2087static IrInstruction *ir_build_un_op_lval(IrBuilder *irb, Scope *scope, AstNode *source_node, IrUnOp op_id,
2088 IrInstruction *value, LVal lval, ResultLoc *result_loc)
2609static IrInstSrc *ir_build_un_op_lval(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrUnOp op_id,
2610 IrInstSrc *value, LVal lval, ResultLoc *result_loc)
20892611{
2090 IrInstructionUnOp *instruction = ir_build_instruction<IrInstructionUnOp>(irb, scope, source_node);
2612 IrInstSrcUnOp *instruction = ir_build_instruction<IrInstSrcUnOp>(irb, scope, source_node);
20912613 instruction->op_id = op_id;
20922614 instruction->value = value;
20932615 instruction->lval = lval;
......@@ -2098,18 +2620,55 @@ static IrInstruction *ir_build_un_op_lval(IrBuilder *irb, Scope *scope, AstNode
20982620 return &instruction->base;
20992621}
21002622
2101static IrInstruction *ir_build_un_op(IrBuilder *irb, Scope *scope, AstNode *source_node, IrUnOp op_id,
2102 IrInstruction *value)
2623static IrInstSrc *ir_build_un_op(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrUnOp op_id,
2624 IrInstSrc *value)
21032625{
21042626 return ir_build_un_op_lval(irb, scope, source_node, op_id, value, LValNone, nullptr);
21052627}
21062628
2107static IrInstruction *ir_build_container_init_list(IrBuilder *irb, Scope *scope, AstNode *source_node,
2108 size_t item_count, IrInstruction **elem_result_loc_list, IrInstruction *result_loc,
2629static IrInstGen *ir_build_negation(IrAnalyze *ira, IrInst *source_instr, IrInstGen *operand, ZigType *expr_type) {
2630 IrInstGenNegation *instruction = ir_build_inst_gen<IrInstGenNegation>(&ira->new_irb,
2631 source_instr->scope, source_instr->source_node);
2632 instruction->base.value->type = expr_type;
2633 instruction->operand = operand;
2634
2635 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
2636
2637 return &instruction->base;
2638}
2639
2640static IrInstGen *ir_build_negation_wrapping(IrAnalyze *ira, IrInst *source_instr, IrInstGen *operand,
2641 ZigType *expr_type)
2642{
2643 IrInstGenNegationWrapping *instruction = ir_build_inst_gen<IrInstGenNegationWrapping>(&ira->new_irb,
2644 source_instr->scope, source_instr->source_node);
2645 instruction->base.value->type = expr_type;
2646 instruction->operand = operand;
2647
2648 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
2649
2650 return &instruction->base;
2651}
2652
2653static IrInstGen *ir_build_binary_not(IrAnalyze *ira, IrInst *source_instr, IrInstGen *operand,
2654 ZigType *expr_type)
2655{
2656 IrInstGenBinaryNot *instruction = ir_build_inst_gen<IrInstGenBinaryNot>(&ira->new_irb,
2657 source_instr->scope, source_instr->source_node);
2658 instruction->base.value->type = expr_type;
2659 instruction->operand = operand;
2660
2661 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
2662
2663 return &instruction->base;
2664}
2665
2666static IrInstSrc *ir_build_container_init_list(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2667 size_t item_count, IrInstSrc **elem_result_loc_list, IrInstSrc *result_loc,
21092668 AstNode *init_array_type_source_node)
21102669{
2111 IrInstructionContainerInitList *container_init_list_instruction =
2112 ir_build_instruction<IrInstructionContainerInitList>(irb, scope, source_node);
2670 IrInstSrcContainerInitList *container_init_list_instruction =
2671 ir_build_instruction<IrInstSrcContainerInitList>(irb, scope, source_node);
21132672 container_init_list_instruction->item_count = item_count;
21142673 container_init_list_instruction->elem_result_loc_list = elem_result_loc_list;
21152674 container_init_list_instruction->result_loc = result_loc;
......@@ -2123,11 +2682,11 @@ static IrInstruction *ir_build_container_init_list(IrBuilder *irb, Scope *scope,
21232682 return &container_init_list_instruction->base;
21242683}
21252684
2126static IrInstruction *ir_build_container_init_fields(IrBuilder *irb, Scope *scope, AstNode *source_node,
2127 size_t field_count, IrInstructionContainerInitFieldsField *fields, IrInstruction *result_loc)
2685static IrInstSrc *ir_build_container_init_fields(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2686 size_t field_count, IrInstSrcContainerInitFieldsField *fields, IrInstSrc *result_loc)
21282687{
2129 IrInstructionContainerInitFields *container_init_fields_instruction =
2130 ir_build_instruction<IrInstructionContainerInitFields>(irb, scope, source_node);
2688 IrInstSrcContainerInitFields *container_init_fields_instruction =
2689 ir_build_instruction<IrInstSrcContainerInitFields>(irb, scope, source_node);
21312690 container_init_fields_instruction->field_count = field_count;
21322691 container_init_fields_instruction->fields = fields;
21332692 container_init_fields_instruction->result_loc = result_loc;
......@@ -2140,20 +2699,21 @@ static IrInstruction *ir_build_container_init_fields(IrBuilder *irb, Scope *scop
21402699 return &container_init_fields_instruction->base;
21412700}
21422701
2143static IrInstruction *ir_build_unreachable(IrBuilder *irb, Scope *scope, AstNode *source_node) {
2144 IrInstructionUnreachable *unreachable_instruction =
2145 ir_build_instruction<IrInstructionUnreachable>(irb, scope, source_node);
2146 unreachable_instruction->base.value->special = ConstValSpecialStatic;
2147 unreachable_instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;
2148 return &unreachable_instruction->base;
2702static IrInstSrc *ir_build_unreachable(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
2703 IrInstSrcUnreachable *inst = ir_build_instruction<IrInstSrcUnreachable>(irb, scope, source_node);
2704 inst->base.is_noreturn = true;
2705 return &inst->base;
21492706}
21502707
2151static IrInstructionStorePtr *ir_build_store_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
2152 IrInstruction *ptr, IrInstruction *value)
2708static IrInstGen *ir_build_unreachable_gen(IrAnalyze *ira, IrInst *source_instr) {
2709 IrInstGenUnreachable *inst = ir_build_inst_noreturn<IrInstGenUnreachable>(&ira->new_irb, source_instr->scope, source_instr->source_node);
2710 return &inst->base;
2711}
2712
2713static IrInstSrcStorePtr *ir_build_store_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2714 IrInstSrc *ptr, IrInstSrc *value)
21532715{
2154 IrInstructionStorePtr *instruction = ir_build_instruction<IrInstructionStorePtr>(irb, scope, source_node);
2155 instruction->base.value->special = ConstValSpecialStatic;
2156 instruction->base.value->type = irb->codegen->builtin_types.entry_void;
2716 IrInstSrcStorePtr *instruction = ir_build_instruction<IrInstSrcStorePtr>(irb, scope, source_node);
21572717 instruction->ptr = ptr;
21582718 instruction->value = value;
21592719
......@@ -2163,76 +2723,83 @@ static IrInstructionStorePtr *ir_build_store_ptr(IrBuilder *irb, Scope *scope, A
21632723 return instruction;
21642724}
21652725
2166static IrInstruction *ir_build_vector_store_elem(IrAnalyze *ira, IrInstruction *source_instruction,
2167 IrInstruction *vector_ptr, IrInstruction *index, IrInstruction *value)
2726static IrInstGen *ir_build_store_ptr_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *ptr, IrInstGen *value) {
2727 IrInstGenStorePtr *instruction = ir_build_inst_void<IrInstGenStorePtr>(&ira->new_irb,
2728 source_instr->scope, source_instr->source_node);
2729 instruction->ptr = ptr;
2730 instruction->value = value;
2731
2732 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
2733 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
2734
2735 return &instruction->base;
2736}
2737
2738static IrInstGen *ir_build_vector_store_elem(IrAnalyze *ira, IrInst *src_inst,
2739 IrInstGen *vector_ptr, IrInstGen *index, IrInstGen *value)
21682740{
2169 IrInstructionVectorStoreElem *inst = ir_build_instruction<IrInstructionVectorStoreElem>(
2170 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
2171 inst->base.value->type = ira->codegen->builtin_types.entry_void;
2741 IrInstGenVectorStoreElem *inst = ir_build_inst_void<IrInstGenVectorStoreElem>(
2742 &ira->new_irb, src_inst->scope, src_inst->source_node);
21722743 inst->vector_ptr = vector_ptr;
21732744 inst->index = index;
21742745 inst->value = value;
21752746
2176 ir_ref_instruction(vector_ptr, ira->new_irb.current_basic_block);
2177 ir_ref_instruction(index, ira->new_irb.current_basic_block);
2178 ir_ref_instruction(value, ira->new_irb.current_basic_block);
2747 ir_ref_inst_gen(vector_ptr, ira->new_irb.current_basic_block);
2748 ir_ref_inst_gen(index, ira->new_irb.current_basic_block);
2749 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
21792750
21802751 return &inst->base;
21812752}
21822753
2183static IrInstruction *ir_build_var_decl_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
2184 ZigVar *var, IrInstruction *align_value, IrInstruction *ptr)
2754static IrInstSrc *ir_build_var_decl_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2755 ZigVar *var, IrInstSrc *align_value, IrInstSrc *ptr)
21852756{
2186 IrInstructionDeclVarSrc *decl_var_instruction = ir_build_instruction<IrInstructionDeclVarSrc>(irb, scope, source_node);
2187 decl_var_instruction->base.value->special = ConstValSpecialStatic;
2188 decl_var_instruction->base.value->type = irb->codegen->builtin_types.entry_void;
2189 decl_var_instruction->var = var;
2190 decl_var_instruction->align_value = align_value;
2191 decl_var_instruction->ptr = ptr;
2757 IrInstSrcDeclVar *inst = ir_build_instruction<IrInstSrcDeclVar>(irb, scope, source_node);
2758 inst->var = var;
2759 inst->align_value = align_value;
2760 inst->ptr = ptr;
21922761
21932762 if (align_value != nullptr) ir_ref_instruction(align_value, irb->current_basic_block);
21942763 ir_ref_instruction(ptr, irb->current_basic_block);
21952764
2196 return &decl_var_instruction->base;
2765 return &inst->base;
21972766}
21982767
2199static IrInstruction *ir_build_var_decl_gen(IrAnalyze *ira, IrInstruction *source_instruction,
2200 ZigVar *var, IrInstruction *var_ptr)
2768static IrInstGen *ir_build_var_decl_gen(IrAnalyze *ira, IrInst *source_instruction,
2769 ZigVar *var, IrInstGen *var_ptr)
22012770{
2202 IrInstructionDeclVarGen *decl_var_instruction = ir_build_instruction<IrInstructionDeclVarGen>(&ira->new_irb,
2771 IrInstGenDeclVar *inst = ir_build_inst_gen<IrInstGenDeclVar>(&ira->new_irb,
22032772 source_instruction->scope, source_instruction->source_node);
2204 decl_var_instruction->base.value->special = ConstValSpecialStatic;
2205 decl_var_instruction->base.value->type = ira->codegen->builtin_types.entry_void;
2206 decl_var_instruction->var = var;
2207 decl_var_instruction->var_ptr = var_ptr;
2773 inst->base.value->special = ConstValSpecialStatic;
2774 inst->base.value->type = ira->codegen->builtin_types.entry_void;
2775 inst->var = var;
2776 inst->var_ptr = var_ptr;
22082777
2209 ir_ref_instruction(var_ptr, ira->new_irb.current_basic_block);
2778 ir_ref_inst_gen(var_ptr, ira->new_irb.current_basic_block);
22102779
2211 return &decl_var_instruction->base;
2780 return &inst->base;
22122781}
22132782
2214static IrInstruction *ir_build_resize_slice(IrAnalyze *ira, IrInstruction *source_instruction,
2215 IrInstruction *operand, ZigType *ty, IrInstruction *result_loc)
2783static IrInstGen *ir_build_resize_slice(IrAnalyze *ira, IrInst *source_instruction,
2784 IrInstGen *operand, ZigType *ty, IrInstGen *result_loc)
22162785{
2217 IrInstructionResizeSlice *instruction = ir_build_instruction<IrInstructionResizeSlice>(&ira->new_irb,
2786 IrInstGenResizeSlice *instruction = ir_build_inst_gen<IrInstGenResizeSlice>(&ira->new_irb,
22182787 source_instruction->scope, source_instruction->source_node);
22192788 instruction->base.value->type = ty;
22202789 instruction->operand = operand;
22212790 instruction->result_loc = result_loc;
22222791
2223 ir_ref_instruction(operand, ira->new_irb.current_basic_block);
2224 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
2792 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
2793 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
22252794
22262795 return &instruction->base;
22272796}
22282797
2229static IrInstruction *ir_build_export(IrBuilder *irb, Scope *scope, AstNode *source_node,
2230 IrInstruction *target, IrInstruction *options)
2798static IrInstSrc *ir_build_export(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2799 IrInstSrc *target, IrInstSrc *options)
22312800{
2232 IrInstructionExport *export_instruction = ir_build_instruction<IrInstructionExport>(
2801 IrInstSrcExport *export_instruction = ir_build_instruction<IrInstSrcExport>(
22332802 irb, scope, source_node);
2234 export_instruction->base.value->special = ConstValSpecialStatic;
2235 export_instruction->base.value->type = irb->codegen->builtin_types.entry_void;
22362803 export_instruction->target = target;
22372804 export_instruction->options = options;
22382805
......@@ -2242,8 +2809,8 @@ static IrInstruction *ir_build_export(IrBuilder *irb, Scope *scope, AstNode *sou
22422809 return &export_instruction->base;
22432810}
22442811
2245static IrInstruction *ir_build_load_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *ptr) {
2246 IrInstructionLoadPtr *instruction = ir_build_instruction<IrInstructionLoadPtr>(irb, scope, source_node);
2812static IrInstSrc *ir_build_load_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *ptr) {
2813 IrInstSrcLoadPtr *instruction = ir_build_instruction<IrInstSrcLoadPtr>(irb, scope, source_node);
22472814 instruction->ptr = ptr;
22482815
22492816 ir_ref_instruction(ptr, irb->current_basic_block);
......@@ -2251,8 +2818,23 @@ static IrInstruction *ir_build_load_ptr(IrBuilder *irb, Scope *scope, AstNode *s
22512818 return &instruction->base;
22522819}
22532820
2254static IrInstruction *ir_build_typeof(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {
2255 IrInstructionTypeOf *instruction = ir_build_instruction<IrInstructionTypeOf>(irb, scope, source_node);
2821static IrInstGen *ir_build_load_ptr_gen(IrAnalyze *ira, IrInst *source_instruction,
2822 IrInstGen *ptr, ZigType *ty, IrInstGen *result_loc)
2823{
2824 IrInstGenLoadPtr *instruction = ir_build_inst_gen<IrInstGenLoadPtr>(
2825 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
2826 instruction->base.value->type = ty;
2827 instruction->ptr = ptr;
2828 instruction->result_loc = result_loc;
2829
2830 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
2831 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
2832
2833 return &instruction->base;
2834}
2835
2836static IrInstSrc *ir_build_typeof(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *value) {
2837 IrInstSrcTypeOf *instruction = ir_build_instruction<IrInstSrcTypeOf>(irb, scope, source_node);
22562838 instruction->value = value;
22572839
22582840 ir_ref_instruction(value, irb->current_basic_block);
......@@ -2260,8 +2842,8 @@ static IrInstruction *ir_build_typeof(IrBuilder *irb, Scope *scope, AstNode *sou
22602842 return &instruction->base;
22612843}
22622844
2263static IrInstruction *ir_build_set_cold(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *is_cold) {
2264 IrInstructionSetCold *instruction = ir_build_instruction<IrInstructionSetCold>(irb, scope, source_node);
2845static IrInstSrc *ir_build_set_cold(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *is_cold) {
2846 IrInstSrcSetCold *instruction = ir_build_instruction<IrInstSrcSetCold>(irb, scope, source_node);
22652847 instruction->is_cold = is_cold;
22662848
22672849 ir_ref_instruction(is_cold, irb->current_basic_block);
......@@ -2269,21 +2851,21 @@ static IrInstruction *ir_build_set_cold(IrBuilder *irb, Scope *scope, AstNode *s
22692851 return &instruction->base;
22702852}
22712853
2272static IrInstruction *ir_build_set_runtime_safety(IrBuilder *irb, Scope *scope, AstNode *source_node,
2273 IrInstruction *safety_on)
2854static IrInstSrc *ir_build_set_runtime_safety(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2855 IrInstSrc *safety_on)
22742856{
2275 IrInstructionSetRuntimeSafety *instruction = ir_build_instruction<IrInstructionSetRuntimeSafety>(irb, scope, source_node);
2276 instruction->safety_on = safety_on;
2857 IrInstSrcSetRuntimeSafety *inst = ir_build_instruction<IrInstSrcSetRuntimeSafety>(irb, scope, source_node);
2858 inst->safety_on = safety_on;
22772859
22782860 ir_ref_instruction(safety_on, irb->current_basic_block);
22792861
2280 return &instruction->base;
2862 return &inst->base;
22812863}
22822864
2283static IrInstruction *ir_build_set_float_mode(IrBuilder *irb, Scope *scope, AstNode *source_node,
2284 IrInstruction *mode_value)
2865static IrInstSrc *ir_build_set_float_mode(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2866 IrInstSrc *mode_value)
22852867{
2286 IrInstructionSetFloatMode *instruction = ir_build_instruction<IrInstructionSetFloatMode>(irb, scope, source_node);
2868 IrInstSrcSetFloatMode *instruction = ir_build_instruction<IrInstSrcSetFloatMode>(irb, scope, source_node);
22872869 instruction->mode_value = mode_value;
22882870
22892871 ir_ref_instruction(mode_value, irb->current_basic_block);
......@@ -2291,10 +2873,10 @@ static IrInstruction *ir_build_set_float_mode(IrBuilder *irb, Scope *scope, AstN
22912873 return &instruction->base;
22922874}
22932875
2294static IrInstruction *ir_build_array_type(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *size,
2295 IrInstruction *sentinel, IrInstruction *child_type)
2876static IrInstSrc *ir_build_array_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *size,
2877 IrInstSrc *sentinel, IrInstSrc *child_type)
22962878{
2297 IrInstructionArrayType *instruction = ir_build_instruction<IrInstructionArrayType>(irb, scope, source_node);
2879 IrInstSrcArrayType *instruction = ir_build_instruction<IrInstSrcArrayType>(irb, scope, source_node);
22982880 instruction->size = size;
22992881 instruction->sentinel = sentinel;
23002882 instruction->child_type = child_type;
......@@ -2306,10 +2888,10 @@ static IrInstruction *ir_build_array_type(IrBuilder *irb, Scope *scope, AstNode
23062888 return &instruction->base;
23072889}
23082890
2309static IrInstruction *ir_build_anyframe_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
2310 IrInstruction *payload_type)
2891static IrInstSrc *ir_build_anyframe_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2892 IrInstSrc *payload_type)
23112893{
2312 IrInstructionAnyFrameType *instruction = ir_build_instruction<IrInstructionAnyFrameType>(irb, scope, source_node);
2894 IrInstSrcAnyFrameType *instruction = ir_build_instruction<IrInstSrcAnyFrameType>(irb, scope, source_node);
23132895 instruction->payload_type = payload_type;
23142896
23152897 if (payload_type != nullptr) ir_ref_instruction(payload_type, irb->current_basic_block);
......@@ -2317,11 +2899,11 @@ static IrInstruction *ir_build_anyframe_type(IrBuilder *irb, Scope *scope, AstNo
23172899 return &instruction->base;
23182900}
23192901
2320static IrInstruction *ir_build_slice_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
2321 IrInstruction *child_type, bool is_const, bool is_volatile,
2322 IrInstruction *sentinel, IrInstruction *align_value, bool is_allow_zero)
2902static IrInstSrc *ir_build_slice_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2903 IrInstSrc *child_type, bool is_const, bool is_volatile,
2904 IrInstSrc *sentinel, IrInstSrc *align_value, bool is_allow_zero)
23232905{
2324 IrInstructionSliceType *instruction = ir_build_instruction<IrInstructionSliceType>(irb, scope, source_node);
2906 IrInstSrcSliceType *instruction = ir_build_instruction<IrInstSrcSliceType>(irb, scope, source_node);
23252907 instruction->is_const = is_const;
23262908 instruction->is_volatile = is_volatile;
23272909 instruction->child_type = child_type;
......@@ -2336,11 +2918,11 @@ static IrInstruction *ir_build_slice_type(IrBuilder *irb, Scope *scope, AstNode
23362918 return &instruction->base;
23372919}
23382920
2339static IrInstruction *ir_build_asm_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
2340 IrInstruction *asm_template, IrInstruction **input_list, IrInstruction **output_types,
2921static IrInstSrc *ir_build_asm_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2922 IrInstSrc *asm_template, IrInstSrc **input_list, IrInstSrc **output_types,
23412923 ZigVar **output_vars, size_t return_count, bool has_side_effects, bool is_global)
23422924{
2343 IrInstructionAsmSrc *instruction = ir_build_instruction<IrInstructionAsmSrc>(irb, scope, source_node);
2925 IrInstSrcAsm *instruction = ir_build_instruction<IrInstSrcAsm>(irb, scope, source_node);
23442926 instruction->asm_template = asm_template;
23452927 instruction->input_list = input_list;
23462928 instruction->output_types = output_types;
......@@ -2351,24 +2933,25 @@ static IrInstruction *ir_build_asm_src(IrBuilder *irb, Scope *scope, AstNode *so
23512933
23522934 assert(source_node->type == NodeTypeAsmExpr);
23532935 for (size_t i = 0; i < source_node->data.asm_expr.output_list.length; i += 1) {
2354 IrInstruction *output_type = output_types[i];
2936 IrInstSrc *output_type = output_types[i];
23552937 if (output_type) ir_ref_instruction(output_type, irb->current_basic_block);
23562938 }
23572939
23582940 for (size_t i = 0; i < source_node->data.asm_expr.input_list.length; i += 1) {
2359 IrInstruction *input_value = input_list[i];
2941 IrInstSrc *input_value = input_list[i];
23602942 ir_ref_instruction(input_value, irb->current_basic_block);
23612943 }
23622944
23632945 return &instruction->base;
23642946}
23652947
2366static IrInstruction *ir_build_asm_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
2948static IrInstGen *ir_build_asm_gen(IrAnalyze *ira, IrInst *source_instr,
23672949 Buf *asm_template, AsmToken *token_list, size_t token_list_len,
2368 IrInstruction **input_list, IrInstruction **output_types, ZigVar **output_vars, size_t return_count,
2369 bool has_side_effects)
2950 IrInstGen **input_list, IrInstGen **output_types, ZigVar **output_vars, size_t return_count,
2951 bool has_side_effects, ZigType *return_type)
23702952{
2371 IrInstructionAsmGen *instruction = ir_build_instruction<IrInstructionAsmGen>(&ira->new_irb, scope, source_node);
2953 IrInstGenAsm *instruction = ir_build_inst_gen<IrInstGenAsm>(&ira->new_irb, source_instr->scope, source_instr->source_node);
2954 instruction->base.value->type = return_type;
23722955 instruction->asm_template = asm_template;
23732956 instruction->token_list = token_list;
23742957 instruction->token_list_len = token_list_len;
......@@ -2378,22 +2961,24 @@ static IrInstruction *ir_build_asm_gen(IrAnalyze *ira, Scope *scope, AstNode *so
23782961 instruction->return_count = return_count;
23792962 instruction->has_side_effects = has_side_effects;
23802963
2381 assert(source_node->type == NodeTypeAsmExpr);
2382 for (size_t i = 0; i < source_node->data.asm_expr.output_list.length; i += 1) {
2383 IrInstruction *output_type = output_types[i];
2384 if (output_type) ir_ref_instruction(output_type, ira->new_irb.current_basic_block);
2964 assert(source_instr->source_node->type == NodeTypeAsmExpr);
2965 for (size_t i = 0; i < source_instr->source_node->data.asm_expr.output_list.length; i += 1) {
2966 IrInstGen *output_type = output_types[i];
2967 if (output_type) ir_ref_inst_gen(output_type, ira->new_irb.current_basic_block);
23852968 }
23862969
2387 for (size_t i = 0; i < source_node->data.asm_expr.input_list.length; i += 1) {
2388 IrInstruction *input_value = input_list[i];
2389 ir_ref_instruction(input_value, ira->new_irb.current_basic_block);
2970 for (size_t i = 0; i < source_instr->source_node->data.asm_expr.input_list.length; i += 1) {
2971 IrInstGen *input_value = input_list[i];
2972 ir_ref_inst_gen(input_value, ira->new_irb.current_basic_block);
23902973 }
23912974
23922975 return &instruction->base;
23932976}
23942977
2395static IrInstruction *ir_build_size_of(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type_value, bool bit_size) {
2396 IrInstructionSizeOf *instruction = ir_build_instruction<IrInstructionSizeOf>(irb, scope, source_node);
2978static IrInstSrc *ir_build_size_of(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type_value,
2979 bool bit_size)
2980{
2981 IrInstSrcSizeOf *instruction = ir_build_instruction<IrInstSrcSizeOf>(irb, scope, source_node);
23972982 instruction->type_value = type_value;
23982983 instruction->bit_size = bit_size;
23992984
......@@ -2402,8 +2987,10 @@ static IrInstruction *ir_build_size_of(IrBuilder *irb, Scope *scope, AstNode *so
24022987 return &instruction->base;
24032988}
24042989
2405static IrInstruction *ir_build_test_nonnull(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {
2406 IrInstructionTestNonNull *instruction = ir_build_instruction<IrInstructionTestNonNull>(irb, scope, source_node);
2990static IrInstSrc *ir_build_test_non_null_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2991 IrInstSrc *value)
2992{
2993 IrInstSrcTestNonNull *instruction = ir_build_instruction<IrInstSrcTestNonNull>(irb, scope, source_node);
24072994 instruction->value = value;
24082995
24092996 ir_ref_instruction(value, irb->current_basic_block);
......@@ -2411,10 +2998,21 @@ static IrInstruction *ir_build_test_nonnull(IrBuilder *irb, Scope *scope, AstNod
24112998 return &instruction->base;
24122999}
24133000
2414static IrInstruction *ir_build_optional_unwrap_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
2415 IrInstruction *base_ptr, bool safety_check_on, bool initializing)
3001static IrInstGen *ir_build_test_non_null_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value) {
3002 IrInstGenTestNonNull *inst = ir_build_inst_gen<IrInstGenTestNonNull>(&ira->new_irb,
3003 source_instr->scope, source_instr->source_node);
3004 inst->base.value->type = ira->codegen->builtin_types.entry_bool;
3005 inst->value = value;
3006
3007 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
3008
3009 return &inst->base;
3010}
3011
3012static IrInstSrc *ir_build_optional_unwrap_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3013 IrInstSrc *base_ptr, bool safety_check_on, bool initializing)
24163014{
2417 IrInstructionOptionalUnwrapPtr *instruction = ir_build_instruction<IrInstructionOptionalUnwrapPtr>(irb, scope, source_node);
3015 IrInstSrcOptionalUnwrapPtr *instruction = ir_build_instruction<IrInstSrcOptionalUnwrapPtr>(irb, scope, source_node);
24183016 instruction->base_ptr = base_ptr;
24193017 instruction->safety_check_on = safety_check_on;
24203018 instruction->initializing = initializing;
......@@ -2424,113 +3022,198 @@ static IrInstruction *ir_build_optional_unwrap_ptr(IrBuilder *irb, Scope *scope,
24243022 return &instruction->base;
24253023}
24263024
2427static IrInstruction *ir_build_optional_wrap(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *result_ty,
2428 IrInstruction *operand, IrInstruction *result_loc)
3025static IrInstGen *ir_build_optional_unwrap_ptr_gen(IrAnalyze *ira, IrInst *source_instr,
3026 IrInstGen *base_ptr, bool safety_check_on, bool initializing, ZigType *result_type)
24293027{
2430 IrInstructionOptionalWrap *instruction = ir_build_instruction<IrInstructionOptionalWrap>(
3028 IrInstGenOptionalUnwrapPtr *inst = ir_build_inst_gen<IrInstGenOptionalUnwrapPtr>(&ira->new_irb,
3029 source_instr->scope, source_instr->source_node);
3030 inst->base.value->type = result_type;
3031 inst->base_ptr = base_ptr;
3032 inst->safety_check_on = safety_check_on;
3033 inst->initializing = initializing;
3034
3035 ir_ref_inst_gen(base_ptr, ira->new_irb.current_basic_block);
3036
3037 return &inst->base;
3038}
3039
3040static IrInstGen *ir_build_optional_wrap(IrAnalyze *ira, IrInst *source_instruction, ZigType *result_ty,
3041 IrInstGen *operand, IrInstGen *result_loc)
3042{
3043 IrInstGenOptionalWrap *instruction = ir_build_inst_gen<IrInstGenOptionalWrap>(
24313044 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
24323045 instruction->base.value->type = result_ty;
24333046 instruction->operand = operand;
24343047 instruction->result_loc = result_loc;
24353048
2436 ir_ref_instruction(operand, ira->new_irb.current_basic_block);
2437 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
3049 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
3050 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
24383051
24393052 return &instruction->base;
24403053}
24413054
2442static IrInstruction *ir_build_err_wrap_payload(IrAnalyze *ira, IrInstruction *source_instruction,
2443 ZigType *result_type, IrInstruction *operand, IrInstruction *result_loc)
3055static IrInstGen *ir_build_err_wrap_payload(IrAnalyze *ira, IrInst *source_instruction,
3056 ZigType *result_type, IrInstGen *operand, IrInstGen *result_loc)
24443057{
2445 IrInstructionErrWrapPayload *instruction = ir_build_instruction<IrInstructionErrWrapPayload>(
3058 IrInstGenErrWrapPayload *instruction = ir_build_inst_gen<IrInstGenErrWrapPayload>(
24463059 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
24473060 instruction->base.value->type = result_type;
24483061 instruction->operand = operand;
24493062 instruction->result_loc = result_loc;
24503063
2451 ir_ref_instruction(operand, ira->new_irb.current_basic_block);
2452 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
3064 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
3065 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
24533066
24543067 return &instruction->base;
24553068}
24563069
2457static IrInstruction *ir_build_err_wrap_code(IrAnalyze *ira, IrInstruction *source_instruction,
2458 ZigType *result_type, IrInstruction *operand, IrInstruction *result_loc)
3070static IrInstGen *ir_build_err_wrap_code(IrAnalyze *ira, IrInst *source_instruction,
3071 ZigType *result_type, IrInstGen *operand, IrInstGen *result_loc)
24593072{
2460 IrInstructionErrWrapCode *instruction = ir_build_instruction<IrInstructionErrWrapCode>(
3073 IrInstGenErrWrapCode *instruction = ir_build_inst_gen<IrInstGenErrWrapCode>(
24613074 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
24623075 instruction->base.value->type = result_type;
24633076 instruction->operand = operand;
24643077 instruction->result_loc = result_loc;
24653078
2466 ir_ref_instruction(operand, ira->new_irb.current_basic_block);
2467 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
3079 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
3080 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
24683081
24693082 return &instruction->base;
24703083}
24713084
2472static IrInstruction *ir_build_clz(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type, IrInstruction *op) {
2473 IrInstructionClz *instruction = ir_build_instruction<IrInstructionClz>(irb, scope, source_node);
3085static IrInstSrc *ir_build_clz(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type,
3086 IrInstSrc *op)
3087{
3088 IrInstSrcClz *instruction = ir_build_instruction<IrInstSrcClz>(irb, scope, source_node);
24743089 instruction->type = type;
24753090 instruction->op = op;
24763091
2477 if (type != nullptr) ir_ref_instruction(type, irb->current_basic_block);
3092 ir_ref_instruction(type, irb->current_basic_block);
24783093 ir_ref_instruction(op, irb->current_basic_block);
24793094
24803095 return &instruction->base;
24813096}
24823097
2483static IrInstruction *ir_build_ctz(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type, IrInstruction *op) {
2484 IrInstructionCtz *instruction = ir_build_instruction<IrInstructionCtz>(irb, scope, source_node);
3098static IrInstGen *ir_build_clz_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *result_type, IrInstGen *op) {
3099 IrInstGenClz *instruction = ir_build_inst_gen<IrInstGenClz>(&ira->new_irb,
3100 source_instr->scope, source_instr->source_node);
3101 instruction->base.value->type = result_type;
3102 instruction->op = op;
3103
3104 ir_ref_inst_gen(op, ira->new_irb.current_basic_block);
3105
3106 return &instruction->base;
3107}
3108
3109static IrInstSrc *ir_build_ctz(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type,
3110 IrInstSrc *op)
3111{
3112 IrInstSrcCtz *instruction = ir_build_instruction<IrInstSrcCtz>(irb, scope, source_node);
24853113 instruction->type = type;
24863114 instruction->op = op;
24873115
2488 if (type != nullptr) ir_ref_instruction(type, irb->current_basic_block);
3116 ir_ref_instruction(type, irb->current_basic_block);
24893117 ir_ref_instruction(op, irb->current_basic_block);
24903118
24913119 return &instruction->base;
24923120}
24933121
2494static IrInstruction *ir_build_pop_count(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type, IrInstruction *op) {
2495 IrInstructionPopCount *instruction = ir_build_instruction<IrInstructionPopCount>(irb, scope, source_node);
3122static IrInstGen *ir_build_ctz_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *result_type, IrInstGen *op) {
3123 IrInstGenCtz *instruction = ir_build_inst_gen<IrInstGenCtz>(&ira->new_irb,
3124 source_instr->scope, source_instr->source_node);
3125 instruction->base.value->type = result_type;
3126 instruction->op = op;
3127
3128 ir_ref_inst_gen(op, ira->new_irb.current_basic_block);
3129
3130 return &instruction->base;
3131}
3132
3133static IrInstSrc *ir_build_pop_count(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type,
3134 IrInstSrc *op)
3135{
3136 IrInstSrcPopCount *instruction = ir_build_instruction<IrInstSrcPopCount>(irb, scope, source_node);
24963137 instruction->type = type;
24973138 instruction->op = op;
24983139
2499 if (type != nullptr) ir_ref_instruction(type, irb->current_basic_block);
3140 ir_ref_instruction(type, irb->current_basic_block);
25003141 ir_ref_instruction(op, irb->current_basic_block);
25013142
25023143 return &instruction->base;
25033144}
25043145
2505static IrInstruction *ir_build_bswap(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type, IrInstruction *op) {
2506 IrInstructionBswap *instruction = ir_build_instruction<IrInstructionBswap>(irb, scope, source_node);
3146static IrInstGen *ir_build_pop_count_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *result_type,
3147 IrInstGen *op)
3148{
3149 IrInstGenPopCount *instruction = ir_build_inst_gen<IrInstGenPopCount>(&ira->new_irb,
3150 source_instr->scope, source_instr->source_node);
3151 instruction->base.value->type = result_type;
3152 instruction->op = op;
3153
3154 ir_ref_inst_gen(op, ira->new_irb.current_basic_block);
3155
3156 return &instruction->base;
3157}
3158
3159static IrInstSrc *ir_build_bswap(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type,
3160 IrInstSrc *op)
3161{
3162 IrInstSrcBswap *instruction = ir_build_instruction<IrInstSrcBswap>(irb, scope, source_node);
25073163 instruction->type = type;
25083164 instruction->op = op;
25093165
2510 if (type != nullptr) ir_ref_instruction(type, irb->current_basic_block);
3166 ir_ref_instruction(type, irb->current_basic_block);
25113167 ir_ref_instruction(op, irb->current_basic_block);
25123168
25133169 return &instruction->base;
25143170}
25153171
2516static IrInstruction *ir_build_bit_reverse(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type, IrInstruction *op) {
2517 IrInstructionBitReverse *instruction = ir_build_instruction<IrInstructionBitReverse>(irb, scope, source_node);
3172static IrInstGen *ir_build_bswap_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *op_type,
3173 IrInstGen *op)
3174{
3175 IrInstGenBswap *instruction = ir_build_inst_gen<IrInstGenBswap>(&ira->new_irb,
3176 source_instr->scope, source_instr->source_node);
3177 instruction->base.value->type = op_type;
3178 instruction->op = op;
3179
3180 ir_ref_inst_gen(op, ira->new_irb.current_basic_block);
3181
3182 return &instruction->base;
3183}
3184
3185static IrInstSrc *ir_build_bit_reverse(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type,
3186 IrInstSrc *op)
3187{
3188 IrInstSrcBitReverse *instruction = ir_build_instruction<IrInstSrcBitReverse>(irb, scope, source_node);
25183189 instruction->type = type;
25193190 instruction->op = op;
25203191
2521 if (type != nullptr) ir_ref_instruction(type, irb->current_basic_block);
3192 ir_ref_instruction(type, irb->current_basic_block);
25223193 ir_ref_instruction(op, irb->current_basic_block);
25233194
25243195 return &instruction->base;
25253196}
25263197
2527static IrInstructionSwitchBr *ir_build_switch_br(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *target_value,
2528 IrBasicBlock *else_block, size_t case_count, IrInstructionSwitchBrCase *cases, IrInstruction *is_comptime,
2529 IrInstruction *switch_prongs_void)
3198static IrInstGen *ir_build_bit_reverse_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *int_type,
3199 IrInstGen *op)
25303200{
2531 IrInstructionSwitchBr *instruction = ir_build_instruction<IrInstructionSwitchBr>(irb, scope, source_node);
2532 instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;
2533 instruction->base.value->special = ConstValSpecialStatic;
3201 IrInstGenBitReverse *instruction = ir_build_inst_gen<IrInstGenBitReverse>(&ira->new_irb,
3202 source_instr->scope, source_instr->source_node);
3203 instruction->base.value->type = int_type;
3204 instruction->op = op;
3205
3206 ir_ref_inst_gen(op, ira->new_irb.current_basic_block);
3207
3208 return &instruction->base;
3209}
3210
3211static IrInstSrcSwitchBr *ir_build_switch_br_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3212 IrInstSrc *target_value, IrBasicBlockSrc *else_block, size_t case_count, IrInstSrcSwitchBrCase *cases,
3213 IrInstSrc *is_comptime, IrInstSrc *switch_prongs_void)
3214{
3215 IrInstSrcSwitchBr *instruction = ir_build_instruction<IrInstSrcSwitchBr>(irb, scope, source_node);
3216 instruction->base.is_noreturn = true;
25343217 instruction->target_value = target_value;
25353218 instruction->else_block = else_block;
25363219 instruction->case_count = case_count;
......@@ -2539,9 +3222,9 @@ static IrInstructionSwitchBr *ir_build_switch_br(IrBuilder *irb, Scope *scope, A
25393222 instruction->switch_prongs_void = switch_prongs_void;
25403223
25413224 ir_ref_instruction(target_value, irb->current_basic_block);
2542 if (is_comptime) ir_ref_instruction(is_comptime, irb->current_basic_block);
3225 ir_ref_instruction(is_comptime, irb->current_basic_block);
25433226 ir_ref_bb(else_block);
2544 if (switch_prongs_void) ir_ref_instruction(switch_prongs_void, irb->current_basic_block);
3227 ir_ref_instruction(switch_prongs_void, irb->current_basic_block);
25453228
25463229 for (size_t i = 0; i < case_count; i += 1) {
25473230 ir_ref_instruction(cases[i].value, irb->current_basic_block);
......@@ -2551,10 +3234,31 @@ static IrInstructionSwitchBr *ir_build_switch_br(IrBuilder *irb, Scope *scope, A
25513234 return instruction;
25523235}
25533236
2554static IrInstruction *ir_build_switch_target(IrBuilder *irb, Scope *scope, AstNode *source_node,
2555 IrInstruction *target_value_ptr)
3237static IrInstGenSwitchBr *ir_build_switch_br_gen(IrAnalyze *ira, IrInst *source_instr,
3238 IrInstGen *target_value, IrBasicBlockGen *else_block, size_t case_count, IrInstGenSwitchBrCase *cases)
25563239{
2557 IrInstructionSwitchTarget *instruction = ir_build_instruction<IrInstructionSwitchTarget>(irb, scope, source_node);
3240 IrInstGenSwitchBr *instruction = ir_build_inst_noreturn<IrInstGenSwitchBr>(&ira->new_irb,
3241 source_instr->scope, source_instr->source_node);
3242 instruction->target_value = target_value;
3243 instruction->else_block = else_block;
3244 instruction->case_count = case_count;
3245 instruction->cases = cases;
3246
3247 ir_ref_inst_gen(target_value, ira->new_irb.current_basic_block);
3248 ir_ref_bb_gen(else_block);
3249
3250 for (size_t i = 0; i < case_count; i += 1) {
3251 ir_ref_inst_gen(cases[i].value, ira->new_irb.current_basic_block);
3252 ir_ref_bb_gen(cases[i].block);
3253 }
3254
3255 return instruction;
3256}
3257
3258static IrInstSrc *ir_build_switch_target(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3259 IrInstSrc *target_value_ptr)
3260{
3261 IrInstSrcSwitchTarget *instruction = ir_build_instruction<IrInstSrcSwitchTarget>(irb, scope, source_node);
25583262 instruction->target_value_ptr = target_value_ptr;
25593263
25603264 ir_ref_instruction(target_value_ptr, irb->current_basic_block);
......@@ -2562,10 +3266,10 @@ static IrInstruction *ir_build_switch_target(IrBuilder *irb, Scope *scope, AstNo
25623266 return &instruction->base;
25633267}
25643268
2565static IrInstruction *ir_build_switch_var(IrBuilder *irb, Scope *scope, AstNode *source_node,
2566 IrInstruction *target_value_ptr, IrInstruction **prongs_ptr, size_t prongs_len)
3269static IrInstSrc *ir_build_switch_var(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3270 IrInstSrc *target_value_ptr, IrInstSrc **prongs_ptr, size_t prongs_len)
25673271{
2568 IrInstructionSwitchVar *instruction = ir_build_instruction<IrInstructionSwitchVar>(irb, scope, source_node);
3272 IrInstSrcSwitchVar *instruction = ir_build_instruction<IrInstSrcSwitchVar>(irb, scope, source_node);
25693273 instruction->target_value_ptr = target_value_ptr;
25703274 instruction->prongs_ptr = prongs_ptr;
25713275 instruction->prongs_len = prongs_len;
......@@ -2579,10 +3283,10 @@ static IrInstruction *ir_build_switch_var(IrBuilder *irb, Scope *scope, AstNode
25793283}
25803284
25813285// For this instruction the switch_br must be set later.
2582static IrInstructionSwitchElseVar *ir_build_switch_else_var(IrBuilder *irb, Scope *scope, AstNode *source_node,
2583 IrInstruction *target_value_ptr)
3286static IrInstSrcSwitchElseVar *ir_build_switch_else_var(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3287 IrInstSrc *target_value_ptr)
25843288{
2585 IrInstructionSwitchElseVar *instruction = ir_build_instruction<IrInstructionSwitchElseVar>(irb, scope, source_node);
3289 IrInstSrcSwitchElseVar *instruction = ir_build_instruction<IrInstSrcSwitchElseVar>(irb, scope, source_node);
25863290 instruction->target_value_ptr = target_value_ptr;
25873291
25883292 ir_ref_instruction(target_value_ptr, irb->current_basic_block);
......@@ -2590,17 +3294,21 @@ static IrInstructionSwitchElseVar *ir_build_switch_else_var(IrBuilder *irb, Scop
25903294 return instruction;
25913295}
25923296
2593static IrInstruction *ir_build_union_tag(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {
2594 IrInstructionUnionTag *instruction = ir_build_instruction<IrInstructionUnionTag>(irb, scope, source_node);
3297static IrInstGen *ir_build_union_tag(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value,
3298 ZigType *tag_type)
3299{
3300 IrInstGenUnionTag *instruction = ir_build_inst_gen<IrInstGenUnionTag>(&ira->new_irb,
3301 source_instr->scope, source_instr->source_node);
25953302 instruction->value = value;
3303 instruction->base.value->type = tag_type;
25963304
2597 ir_ref_instruction(value, irb->current_basic_block);
3305 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
25983306
25993307 return &instruction->base;
26003308}
26013309
2602static IrInstruction *ir_build_import(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *name) {
2603 IrInstructionImport *instruction = ir_build_instruction<IrInstructionImport>(irb, scope, source_node);
3310static IrInstSrc *ir_build_import(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *name) {
3311 IrInstSrcImport *instruction = ir_build_instruction<IrInstSrcImport>(irb, scope, source_node);
26043312 instruction->name = name;
26053313
26063314 ir_ref_instruction(name, irb->current_basic_block);
......@@ -2608,10 +3316,10 @@ static IrInstruction *ir_build_import(IrBuilder *irb, Scope *scope, AstNode *sou
26083316 return &instruction->base;
26093317}
26103318
2611static IrInstruction *ir_build_ref(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value,
3319static IrInstSrc *ir_build_ref_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *value,
26123320 bool is_const, bool is_volatile)
26133321{
2614 IrInstructionRef *instruction = ir_build_instruction<IrInstructionRef>(irb, scope, source_node);
3322 IrInstSrcRef *instruction = ir_build_instruction<IrInstSrcRef>(irb, scope, source_node);
26153323 instruction->value = value;
26163324 instruction->is_const = is_const;
26173325 instruction->is_volatile = is_volatile;
......@@ -2621,23 +3329,23 @@ static IrInstruction *ir_build_ref(IrBuilder *irb, Scope *scope, AstNode *source
26213329 return &instruction->base;
26223330}
26233331
2624static IrInstruction *ir_build_ref_gen(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *result_type,
2625 IrInstruction *operand, IrInstruction *result_loc)
3332static IrInstGen *ir_build_ref_gen(IrAnalyze *ira, IrInst *source_instruction, ZigType *result_type,
3333 IrInstGen *operand, IrInstGen *result_loc)
26263334{
2627 IrInstructionRefGen *instruction = ir_build_instruction<IrInstructionRefGen>(&ira->new_irb,
3335 IrInstGenRef *instruction = ir_build_inst_gen<IrInstGenRef>(&ira->new_irb,
26283336 source_instruction->scope, source_instruction->source_node);
26293337 instruction->base.value->type = result_type;
26303338 instruction->operand = operand;
26313339 instruction->result_loc = result_loc;
26323340
2633 ir_ref_instruction(operand, ira->new_irb.current_basic_block);
2634 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
3341 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
3342 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
26353343
26363344 return &instruction->base;
26373345}
26383346
2639static IrInstruction *ir_build_compile_err(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *msg) {
2640 IrInstructionCompileErr *instruction = ir_build_instruction<IrInstructionCompileErr>(irb, scope, source_node);
3347static IrInstSrc *ir_build_compile_err(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *msg) {
3348 IrInstSrcCompileErr *instruction = ir_build_instruction<IrInstSrcCompileErr>(irb, scope, source_node);
26413349 instruction->msg = msg;
26423350
26433351 ir_ref_instruction(msg, irb->current_basic_block);
......@@ -2645,10 +3353,10 @@ static IrInstruction *ir_build_compile_err(IrBuilder *irb, Scope *scope, AstNode
26453353 return &instruction->base;
26463354}
26473355
2648static IrInstruction *ir_build_compile_log(IrBuilder *irb, Scope *scope, AstNode *source_node,
2649 size_t msg_count, IrInstruction **msg_list)
3356static IrInstSrc *ir_build_compile_log(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3357 size_t msg_count, IrInstSrc **msg_list)
26503358{
2651 IrInstructionCompileLog *instruction = ir_build_instruction<IrInstructionCompileLog>(irb, scope, source_node);
3359 IrInstSrcCompileLog *instruction = ir_build_instruction<IrInstSrcCompileLog>(irb, scope, source_node);
26523360 instruction->msg_count = msg_count;
26533361 instruction->msg_list = msg_list;
26543362
......@@ -2659,8 +3367,8 @@ static IrInstruction *ir_build_compile_log(IrBuilder *irb, Scope *scope, AstNode
26593367 return &instruction->base;
26603368}
26613369
2662static IrInstruction *ir_build_err_name(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {
2663 IrInstructionErrName *instruction = ir_build_instruction<IrInstructionErrName>(irb, scope, source_node);
3370static IrInstSrc *ir_build_err_name(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *value) {
3371 IrInstSrcErrName *instruction = ir_build_instruction<IrInstSrcErrName>(irb, scope, source_node);
26643372 instruction->value = value;
26653373
26663374 ir_ref_instruction(value, irb->current_basic_block);
......@@ -2668,13 +3376,26 @@ static IrInstruction *ir_build_err_name(IrBuilder *irb, Scope *scope, AstNode *s
26683376 return &instruction->base;
26693377}
26703378
2671static IrInstruction *ir_build_c_import(IrBuilder *irb, Scope *scope, AstNode *source_node) {
2672 IrInstructionCImport *instruction = ir_build_instruction<IrInstructionCImport>(irb, scope, source_node);
3379static IrInstGen *ir_build_err_name_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value,
3380 ZigType *str_type)
3381{
3382 IrInstGenErrName *instruction = ir_build_inst_gen<IrInstGenErrName>(&ira->new_irb,
3383 source_instr->scope, source_instr->source_node);
3384 instruction->base.value->type = str_type;
3385 instruction->value = value;
3386
3387 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
3388
26733389 return &instruction->base;
26743390}
26753391
2676static IrInstruction *ir_build_c_include(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *name) {
2677 IrInstructionCInclude *instruction = ir_build_instruction<IrInstructionCInclude>(irb, scope, source_node);
3392static IrInstSrc *ir_build_c_import(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
3393 IrInstSrcCImport *instruction = ir_build_instruction<IrInstSrcCImport>(irb, scope, source_node);
3394 return &instruction->base;
3395}
3396
3397static IrInstSrc *ir_build_c_include(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *name) {
3398 IrInstSrcCInclude *instruction = ir_build_instruction<IrInstSrcCInclude>(irb, scope, source_node);
26783399 instruction->name = name;
26793400
26803401 ir_ref_instruction(name, irb->current_basic_block);
......@@ -2682,8 +3403,8 @@ static IrInstruction *ir_build_c_include(IrBuilder *irb, Scope *scope, AstNode *
26823403 return &instruction->base;
26833404}
26843405
2685static IrInstruction *ir_build_c_define(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *name, IrInstruction *value) {
2686 IrInstructionCDefine *instruction = ir_build_instruction<IrInstructionCDefine>(irb, scope, source_node);
3406static IrInstSrc *ir_build_c_define(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *name, IrInstSrc *value) {
3407 IrInstSrcCDefine *instruction = ir_build_instruction<IrInstSrcCDefine>(irb, scope, source_node);
26873408 instruction->name = name;
26883409 instruction->value = value;
26893410
......@@ -2693,8 +3414,8 @@ static IrInstruction *ir_build_c_define(IrBuilder *irb, Scope *scope, AstNode *s
26933414 return &instruction->base;
26943415}
26953416
2696static IrInstruction *ir_build_c_undef(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *name) {
2697 IrInstructionCUndef *instruction = ir_build_instruction<IrInstructionCUndef>(irb, scope, source_node);
3417static IrInstSrc *ir_build_c_undef(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *name) {
3418 IrInstSrcCUndef *instruction = ir_build_instruction<IrInstSrcCUndef>(irb, scope, source_node);
26983419 instruction->name = name;
26993420
27003421 ir_ref_instruction(name, irb->current_basic_block);
......@@ -2702,8 +3423,8 @@ static IrInstruction *ir_build_c_undef(IrBuilder *irb, Scope *scope, AstNode *so
27023423 return &instruction->base;
27033424}
27043425
2705static IrInstruction *ir_build_embed_file(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *name) {
2706 IrInstructionEmbedFile *instruction = ir_build_instruction<IrInstructionEmbedFile>(irb, scope, source_node);
3426static IrInstSrc *ir_build_embed_file(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *name) {
3427 IrInstSrcEmbedFile *instruction = ir_build_instruction<IrInstSrcEmbedFile>(irb, scope, source_node);
27073428 instruction->name = name;
27083429
27093430 ir_ref_instruction(name, irb->current_basic_block);
......@@ -2711,11 +3432,11 @@ static IrInstruction *ir_build_embed_file(IrBuilder *irb, Scope *scope, AstNode
27113432 return &instruction->base;
27123433}
27133434
2714static IrInstruction *ir_build_cmpxchg_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
2715 IrInstruction *type_value, IrInstruction *ptr, IrInstruction *cmp_value, IrInstruction *new_value,
2716 IrInstruction *success_order_value, IrInstruction *failure_order_value, bool is_weak, ResultLoc *result_loc)
3435static IrInstSrc *ir_build_cmpxchg_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3436 IrInstSrc *type_value, IrInstSrc *ptr, IrInstSrc *cmp_value, IrInstSrc *new_value,
3437 IrInstSrc *success_order_value, IrInstSrc *failure_order_value, bool is_weak, ResultLoc *result_loc)
27173438{
2718 IrInstructionCmpxchgSrc *instruction = ir_build_instruction<IrInstructionCmpxchgSrc>(irb, scope, source_node);
3439 IrInstSrcCmpxchg *instruction = ir_build_instruction<IrInstSrcCmpxchg>(irb, scope, source_node);
27193440 instruction->type_value = type_value;
27203441 instruction->ptr = ptr;
27213442 instruction->cmp_value = cmp_value;
......@@ -2735,11 +3456,11 @@ static IrInstruction *ir_build_cmpxchg_src(IrBuilder *irb, Scope *scope, AstNode
27353456 return &instruction->base;
27363457}
27373458
2738static IrInstruction *ir_build_cmpxchg_gen(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *result_type,
2739 IrInstruction *ptr, IrInstruction *cmp_value, IrInstruction *new_value,
2740 AtomicOrder success_order, AtomicOrder failure_order, bool is_weak, IrInstruction *result_loc)
3459static IrInstGen *ir_build_cmpxchg_gen(IrAnalyze *ira, IrInst *source_instruction, ZigType *result_type,
3460 IrInstGen *ptr, IrInstGen *cmp_value, IrInstGen *new_value,
3461 AtomicOrder success_order, AtomicOrder failure_order, bool is_weak, IrInstGen *result_loc)
27413462{
2742 IrInstructionCmpxchgGen *instruction = ir_build_instruction<IrInstructionCmpxchgGen>(&ira->new_irb,
3463 IrInstGenCmpxchg *instruction = ir_build_inst_gen<IrInstGenCmpxchg>(&ira->new_irb,
27433464 source_instruction->scope, source_instruction->source_node);
27443465 instruction->base.value->type = result_type;
27453466 instruction->ptr = ptr;
......@@ -2750,26 +3471,35 @@ static IrInstruction *ir_build_cmpxchg_gen(IrAnalyze *ira, IrInstruction *source
27503471 instruction->is_weak = is_weak;
27513472 instruction->result_loc = result_loc;
27523473
2753 ir_ref_instruction(ptr, ira->new_irb.current_basic_block);
2754 ir_ref_instruction(cmp_value, ira->new_irb.current_basic_block);
2755 ir_ref_instruction(new_value, ira->new_irb.current_basic_block);
2756 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
3474 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
3475 ir_ref_inst_gen(cmp_value, ira->new_irb.current_basic_block);
3476 ir_ref_inst_gen(new_value, ira->new_irb.current_basic_block);
3477 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
27573478
27583479 return &instruction->base;
27593480}
27603481
2761static IrInstruction *ir_build_fence(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *order_value, AtomicOrder order) {
2762 IrInstructionFence *instruction = ir_build_instruction<IrInstructionFence>(irb, scope, source_node);
2763 instruction->order_value = order_value;
3482static IrInstSrc *ir_build_fence(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *order) {
3483 IrInstSrcFence *instruction = ir_build_instruction<IrInstSrcFence>(irb, scope, source_node);
27643484 instruction->order = order;
27653485
2766 ir_ref_instruction(order_value, irb->current_basic_block);
3486 ir_ref_instruction(order, irb->current_basic_block);
3487
3488 return &instruction->base;
3489}
3490
3491static IrInstGen *ir_build_fence_gen(IrAnalyze *ira, IrInst *source_instr, AtomicOrder order) {
3492 IrInstGenFence *instruction = ir_build_inst_void<IrInstGenFence>(&ira->new_irb,
3493 source_instr->scope, source_instr->source_node);
3494 instruction->order = order;
27673495
27683496 return &instruction->base;
27693497}
27703498
2771static IrInstruction *ir_build_truncate(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {
2772 IrInstructionTruncate *instruction = ir_build_instruction<IrInstructionTruncate>(irb, scope, source_node);
3499static IrInstSrc *ir_build_truncate(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3500 IrInstSrc *dest_type, IrInstSrc *target)
3501{
3502 IrInstSrcTruncate *instruction = ir_build_instruction<IrInstSrcTruncate>(irb, scope, source_node);
27733503 instruction->dest_type = dest_type;
27743504 instruction->target = target;
27753505
......@@ -2779,8 +3509,23 @@ static IrInstruction *ir_build_truncate(IrBuilder *irb, Scope *scope, AstNode *s
27793509 return &instruction->base;
27803510}
27813511
2782static IrInstruction *ir_build_int_cast(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {
2783 IrInstructionIntCast *instruction = ir_build_instruction<IrInstructionIntCast>(irb, scope, source_node);
3512static IrInstGen *ir_build_truncate_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *dest_type,
3513 IrInstGen *target)
3514{
3515 IrInstGenTruncate *instruction = ir_build_inst_gen<IrInstGenTruncate>(&ira->new_irb,
3516 source_instr->scope, source_instr->source_node);
3517 instruction->base.value->type = dest_type;
3518 instruction->target = target;
3519
3520 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
3521
3522 return &instruction->base;
3523}
3524
3525static IrInstSrc *ir_build_int_cast(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *dest_type,
3526 IrInstSrc *target)
3527{
3528 IrInstSrcIntCast *instruction = ir_build_instruction<IrInstSrcIntCast>(irb, scope, source_node);
27843529 instruction->dest_type = dest_type;
27853530 instruction->target = target;
27863531
......@@ -2790,8 +3535,10 @@ static IrInstruction *ir_build_int_cast(IrBuilder *irb, Scope *scope, AstNode *s
27903535 return &instruction->base;
27913536}
27923537
2793static IrInstruction *ir_build_float_cast(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {
2794 IrInstructionFloatCast *instruction = ir_build_instruction<IrInstructionFloatCast>(irb, scope, source_node);
3538static IrInstSrc *ir_build_float_cast(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *dest_type,
3539 IrInstSrc *target)
3540{
3541 IrInstSrcFloatCast *instruction = ir_build_instruction<IrInstSrcFloatCast>(irb, scope, source_node);
27953542 instruction->dest_type = dest_type;
27963543 instruction->target = target;
27973544
......@@ -2801,8 +3548,10 @@ static IrInstruction *ir_build_float_cast(IrBuilder *irb, Scope *scope, AstNode
28013548 return &instruction->base;
28023549}
28033550
2804static IrInstruction *ir_build_err_set_cast(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {
2805 IrInstructionErrSetCast *instruction = ir_build_instruction<IrInstructionErrSetCast>(irb, scope, source_node);
3551static IrInstSrc *ir_build_err_set_cast(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3552 IrInstSrc *dest_type, IrInstSrc *target)
3553{
3554 IrInstSrcErrSetCast *instruction = ir_build_instruction<IrInstSrcErrSetCast>(irb, scope, source_node);
28063555 instruction->dest_type = dest_type;
28073556 instruction->target = target;
28083557
......@@ -2812,10 +3561,10 @@ static IrInstruction *ir_build_err_set_cast(IrBuilder *irb, Scope *scope, AstNod
28123561 return &instruction->base;
28133562}
28143563
2815static IrInstruction *ir_build_to_bytes(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *target,
3564static IrInstSrc *ir_build_to_bytes(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *target,
28163565 ResultLoc *result_loc)
28173566{
2818 IrInstructionToBytes *instruction = ir_build_instruction<IrInstructionToBytes>(irb, scope, source_node);
3567 IrInstSrcToBytes *instruction = ir_build_instruction<IrInstSrcToBytes>(irb, scope, source_node);
28193568 instruction->target = target;
28203569 instruction->result_loc = result_loc;
28213570
......@@ -2824,10 +3573,10 @@ static IrInstruction *ir_build_to_bytes(IrBuilder *irb, Scope *scope, AstNode *s
28243573 return &instruction->base;
28253574}
28263575
2827static IrInstruction *ir_build_from_bytes(IrBuilder *irb, Scope *scope, AstNode *source_node,
2828 IrInstruction *dest_child_type, IrInstruction *target, ResultLoc *result_loc)
3576static IrInstSrc *ir_build_from_bytes(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3577 IrInstSrc *dest_child_type, IrInstSrc *target, ResultLoc *result_loc)
28293578{
2830 IrInstructionFromBytes *instruction = ir_build_instruction<IrInstructionFromBytes>(irb, scope, source_node);
3579 IrInstSrcFromBytes *instruction = ir_build_instruction<IrInstSrcFromBytes>(irb, scope, source_node);
28313580 instruction->dest_child_type = dest_child_type;
28323581 instruction->target = target;
28333582 instruction->result_loc = result_loc;
......@@ -2838,8 +3587,10 @@ static IrInstruction *ir_build_from_bytes(IrBuilder *irb, Scope *scope, AstNode
28383587 return &instruction->base;
28393588}
28403589
2841static IrInstruction *ir_build_int_to_float(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {
2842 IrInstructionIntToFloat *instruction = ir_build_instruction<IrInstructionIntToFloat>(irb, scope, source_node);
3590static IrInstSrc *ir_build_int_to_float(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3591 IrInstSrc *dest_type, IrInstSrc *target)
3592{
3593 IrInstSrcIntToFloat *instruction = ir_build_instruction<IrInstSrcIntToFloat>(irb, scope, source_node);
28433594 instruction->dest_type = dest_type;
28443595 instruction->target = target;
28453596
......@@ -2849,8 +3600,10 @@ static IrInstruction *ir_build_int_to_float(IrBuilder *irb, Scope *scope, AstNod
28493600 return &instruction->base;
28503601}
28513602
2852static IrInstruction *ir_build_float_to_int(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {
2853 IrInstructionFloatToInt *instruction = ir_build_instruction<IrInstructionFloatToInt>(irb, scope, source_node);
3603static IrInstSrc *ir_build_float_to_int(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3604 IrInstSrc *dest_type, IrInstSrc *target)
3605{
3606 IrInstSrcFloatToInt *instruction = ir_build_instruction<IrInstSrcFloatToInt>(irb, scope, source_node);
28543607 instruction->dest_type = dest_type;
28553608 instruction->target = target;
28563609
......@@ -2860,8 +3613,8 @@ static IrInstruction *ir_build_float_to_int(IrBuilder *irb, Scope *scope, AstNod
28603613 return &instruction->base;
28613614}
28623615
2863static IrInstruction *ir_build_bool_to_int(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *target) {
2864 IrInstructionBoolToInt *instruction = ir_build_instruction<IrInstructionBoolToInt>(irb, scope, source_node);
3616static IrInstSrc *ir_build_bool_to_int(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *target) {
3617 IrInstSrcBoolToInt *instruction = ir_build_instruction<IrInstSrcBoolToInt>(irb, scope, source_node);
28653618 instruction->target = target;
28663619
28673620 ir_ref_instruction(target, irb->current_basic_block);
......@@ -2869,8 +3622,10 @@ static IrInstruction *ir_build_bool_to_int(IrBuilder *irb, Scope *scope, AstNode
28693622 return &instruction->base;
28703623}
28713624
2872static IrInstruction *ir_build_int_type(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *is_signed, IrInstruction *bit_count) {
2873 IrInstructionIntType *instruction = ir_build_instruction<IrInstructionIntType>(irb, scope, source_node);
3625static IrInstSrc *ir_build_int_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *is_signed,
3626 IrInstSrc *bit_count)
3627{
3628 IrInstSrcIntType *instruction = ir_build_instruction<IrInstSrcIntType>(irb, scope, source_node);
28743629 instruction->is_signed = is_signed;
28753630 instruction->bit_count = bit_count;
28763631
......@@ -2880,10 +3635,10 @@ static IrInstruction *ir_build_int_type(IrBuilder *irb, Scope *scope, AstNode *s
28803635 return &instruction->base;
28813636}
28823637
2883static IrInstruction *ir_build_vector_type(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *len,
2884 IrInstruction *elem_type)
3638static IrInstSrc *ir_build_vector_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *len,
3639 IrInstSrc *elem_type)
28853640{
2886 IrInstructionVectorType *instruction = ir_build_instruction<IrInstructionVectorType>(irb, scope, source_node);
3641 IrInstSrcVectorType *instruction = ir_build_instruction<IrInstSrcVectorType>(irb, scope, source_node);
28873642 instruction->len = len;
28883643 instruction->elem_type = elem_type;
28893644
......@@ -2893,18 +3648,16 @@ static IrInstruction *ir_build_vector_type(IrBuilder *irb, Scope *scope, AstNode
28933648 return &instruction->base;
28943649}
28953650
2896static IrInstruction *ir_build_shuffle_vector(IrBuilder *irb, Scope *scope, AstNode *source_node,
2897 IrInstruction *scalar_type, IrInstruction *a, IrInstruction *b, IrInstruction *mask)
3651static IrInstSrc *ir_build_shuffle_vector(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3652 IrInstSrc *scalar_type, IrInstSrc *a, IrInstSrc *b, IrInstSrc *mask)
28983653{
2899 IrInstructionShuffleVector *instruction = ir_build_instruction<IrInstructionShuffleVector>(irb, scope, source_node);
3654 IrInstSrcShuffleVector *instruction = ir_build_instruction<IrInstSrcShuffleVector>(irb, scope, source_node);
29003655 instruction->scalar_type = scalar_type;
29013656 instruction->a = a;
29023657 instruction->b = b;
29033658 instruction->mask = mask;
29043659
2905 if (scalar_type != nullptr) {
2906 ir_ref_instruction(scalar_type, irb->current_basic_block);
2907 }
3660 if (scalar_type != nullptr) ir_ref_instruction(scalar_type, irb->current_basic_block);
29083661 ir_ref_instruction(a, irb->current_basic_block);
29093662 ir_ref_instruction(b, irb->current_basic_block);
29103663 ir_ref_instruction(mask, irb->current_basic_block);
......@@ -2912,10 +3665,26 @@ static IrInstruction *ir_build_shuffle_vector(IrBuilder *irb, Scope *scope, AstN
29123665 return &instruction->base;
29133666}
29143667
2915static IrInstruction *ir_build_splat_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
2916 IrInstruction *len, IrInstruction *scalar)
3668static IrInstGen *ir_build_shuffle_vector_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
3669 ZigType *result_type, IrInstGen *a, IrInstGen *b, IrInstGen *mask)
29173670{
2918 IrInstructionSplatSrc *instruction = ir_build_instruction<IrInstructionSplatSrc>(irb, scope, source_node);
3671 IrInstGenShuffleVector *inst = ir_build_inst_gen<IrInstGenShuffleVector>(&ira->new_irb, scope, source_node);
3672 inst->base.value->type = result_type;
3673 inst->a = a;
3674 inst->b = b;
3675 inst->mask = mask;
3676
3677 ir_ref_inst_gen(a, ira->new_irb.current_basic_block);
3678 ir_ref_inst_gen(b, ira->new_irb.current_basic_block);
3679 ir_ref_inst_gen(mask, ira->new_irb.current_basic_block);
3680
3681 return &inst->base;
3682}
3683
3684static IrInstSrc *ir_build_splat_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3685 IrInstSrc *len, IrInstSrc *scalar)
3686{
3687 IrInstSrcSplat *instruction = ir_build_instruction<IrInstSrcSplat>(irb, scope, source_node);
29193688 instruction->len = len;
29203689 instruction->scalar = scalar;
29213690
......@@ -2925,8 +3694,21 @@ static IrInstruction *ir_build_splat_src(IrBuilder *irb, Scope *scope, AstNode *
29253694 return &instruction->base;
29263695}
29273696
2928static IrInstruction *ir_build_bool_not(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {
2929 IrInstructionBoolNot *instruction = ir_build_instruction<IrInstructionBoolNot>(irb, scope, source_node);
3697static IrInstGen *ir_build_splat_gen(IrAnalyze *ira, IrInst *source_instruction, ZigType *result_type,
3698 IrInstGen *scalar)
3699{
3700 IrInstGenSplat *instruction = ir_build_inst_gen<IrInstGenSplat>(
3701 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
3702 instruction->base.value->type = result_type;
3703 instruction->scalar = scalar;
3704
3705 ir_ref_inst_gen(scalar, ira->new_irb.current_basic_block);
3706
3707 return &instruction->base;
3708}
3709
3710static IrInstSrc *ir_build_bool_not(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *value) {
3711 IrInstSrcBoolNot *instruction = ir_build_instruction<IrInstSrcBoolNot>(irb, scope, source_node);
29303712 instruction->value = value;
29313713
29323714 ir_ref_instruction(value, irb->current_basic_block);
......@@ -2934,10 +3716,21 @@ static IrInstruction *ir_build_bool_not(IrBuilder *irb, Scope *scope, AstNode *s
29343716 return &instruction->base;
29353717}
29363718
2937static IrInstruction *ir_build_memset(IrBuilder *irb, Scope *scope, AstNode *source_node,
2938 IrInstruction *dest_ptr, IrInstruction *byte, IrInstruction *count)
3719static IrInstGen *ir_build_bool_not_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value) {
3720 IrInstGenBoolNot *instruction = ir_build_inst_gen<IrInstGenBoolNot>(&ira->new_irb,
3721 source_instr->scope, source_instr->source_node);
3722 instruction->base.value->type = ira->codegen->builtin_types.entry_bool;
3723 instruction->value = value;
3724
3725 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
3726
3727 return &instruction->base;
3728}
3729
3730static IrInstSrc *ir_build_memset_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3731 IrInstSrc *dest_ptr, IrInstSrc *byte, IrInstSrc *count)
29393732{
2940 IrInstructionMemset *instruction = ir_build_instruction<IrInstructionMemset>(irb, scope, source_node);
3733 IrInstSrcMemset *instruction = ir_build_instruction<IrInstSrcMemset>(irb, scope, source_node);
29413734 instruction->dest_ptr = dest_ptr;
29423735 instruction->byte = byte;
29433736 instruction->count = count;
......@@ -2949,10 +3742,26 @@ static IrInstruction *ir_build_memset(IrBuilder *irb, Scope *scope, AstNode *sou
29493742 return &instruction->base;
29503743}
29513744
2952static IrInstruction *ir_build_memcpy(IrBuilder *irb, Scope *scope, AstNode *source_node,
2953 IrInstruction *dest_ptr, IrInstruction *src_ptr, IrInstruction *count)
3745static IrInstGen *ir_build_memset_gen(IrAnalyze *ira, IrInst *source_instr,
3746 IrInstGen *dest_ptr, IrInstGen *byte, IrInstGen *count)
29543747{
2955 IrInstructionMemcpy *instruction = ir_build_instruction<IrInstructionMemcpy>(irb, scope, source_node);
3748 IrInstGenMemset *instruction = ir_build_inst_void<IrInstGenMemset>(&ira->new_irb,
3749 source_instr->scope, source_instr->source_node);
3750 instruction->dest_ptr = dest_ptr;
3751 instruction->byte = byte;
3752 instruction->count = count;
3753
3754 ir_ref_inst_gen(dest_ptr, ira->new_irb.current_basic_block);
3755 ir_ref_inst_gen(byte, ira->new_irb.current_basic_block);
3756 ir_ref_inst_gen(count, ira->new_irb.current_basic_block);
3757
3758 return &instruction->base;
3759}
3760
3761static IrInstSrc *ir_build_memcpy_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3762 IrInstSrc *dest_ptr, IrInstSrc *src_ptr, IrInstSrc *count)
3763{
3764 IrInstSrcMemcpy *instruction = ir_build_instruction<IrInstSrcMemcpy>(irb, scope, source_node);
29563765 instruction->dest_ptr = dest_ptr;
29573766 instruction->src_ptr = src_ptr;
29583767 instruction->count = count;
......@@ -2964,11 +3773,27 @@ static IrInstruction *ir_build_memcpy(IrBuilder *irb, Scope *scope, AstNode *sou
29643773 return &instruction->base;
29653774}
29663775
2967static IrInstruction *ir_build_slice_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
2968 IrInstruction *ptr, IrInstruction *start, IrInstruction *end, IrInstruction *sentinel,
3776static IrInstGen *ir_build_memcpy_gen(IrAnalyze *ira, IrInst *source_instr,
3777 IrInstGen *dest_ptr, IrInstGen *src_ptr, IrInstGen *count)
3778{
3779 IrInstGenMemcpy *instruction = ir_build_inst_void<IrInstGenMemcpy>(&ira->new_irb,
3780 source_instr->scope, source_instr->source_node);
3781 instruction->dest_ptr = dest_ptr;
3782 instruction->src_ptr = src_ptr;
3783 instruction->count = count;
3784
3785 ir_ref_inst_gen(dest_ptr, ira->new_irb.current_basic_block);
3786 ir_ref_inst_gen(src_ptr, ira->new_irb.current_basic_block);
3787 ir_ref_inst_gen(count, ira->new_irb.current_basic_block);
3788
3789 return &instruction->base;
3790}
3791
3792static IrInstSrc *ir_build_slice_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3793 IrInstSrc *ptr, IrInstSrc *start, IrInstSrc *end, IrInstSrc *sentinel,
29693794 bool safety_check_on, ResultLoc *result_loc)
29703795{
2971 IrInstructionSliceSrc *instruction = ir_build_instruction<IrInstructionSliceSrc>(irb, scope, source_node);
3796 IrInstSrcSlice *instruction = ir_build_instruction<IrInstSrcSlice>(irb, scope, source_node);
29723797 instruction->ptr = ptr;
29733798 instruction->start = start;
29743799 instruction->end = end;
......@@ -2984,23 +3809,10 @@ static IrInstruction *ir_build_slice_src(IrBuilder *irb, Scope *scope, AstNode *
29843809 return &instruction->base;
29853810}
29863811
2987static IrInstruction *ir_build_splat_gen(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *result_type,
2988 IrInstruction *scalar)
2989{
2990 IrInstructionSplatGen *instruction = ir_build_instruction<IrInstructionSplatGen>(
2991 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
2992 instruction->base.value->type = result_type;
2993 instruction->scalar = scalar;
2994
2995 ir_ref_instruction(scalar, ira->new_irb.current_basic_block);
2996
2997 return &instruction->base;
2998}
2999
3000static IrInstruction *ir_build_slice_gen(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *slice_type,
3001 IrInstruction *ptr, IrInstruction *start, IrInstruction *end, bool safety_check_on, IrInstruction *result_loc)
3812static IrInstGen *ir_build_slice_gen(IrAnalyze *ira, IrInst *source_instruction, ZigType *slice_type,
3813 IrInstGen *ptr, IrInstGen *start, IrInstGen *end, bool safety_check_on, IrInstGen *result_loc)
30023814{
3003 IrInstructionSliceGen *instruction = ir_build_instruction<IrInstructionSliceGen>(
3815 IrInstGenSlice *instruction = ir_build_inst_gen<IrInstGenSlice>(
30043816 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
30053817 instruction->base.value->type = slice_type;
30063818 instruction->ptr = ptr;
......@@ -3009,16 +3821,16 @@ static IrInstruction *ir_build_slice_gen(IrAnalyze *ira, IrInstruction *source_i
30093821 instruction->safety_check_on = safety_check_on;
30103822 instruction->result_loc = result_loc;
30113823
3012 ir_ref_instruction(ptr, ira->new_irb.current_basic_block);
3013 ir_ref_instruction(start, ira->new_irb.current_basic_block);
3014 if (end) ir_ref_instruction(end, ira->new_irb.current_basic_block);
3015 ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
3824 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
3825 ir_ref_inst_gen(start, ira->new_irb.current_basic_block);
3826 if (end) ir_ref_inst_gen(end, ira->new_irb.current_basic_block);
3827 ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
30163828
30173829 return &instruction->base;
30183830}
30193831
3020static IrInstruction *ir_build_member_count(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *container) {
3021 IrInstructionMemberCount *instruction = ir_build_instruction<IrInstructionMemberCount>(irb, scope, source_node);
3832static IrInstSrc *ir_build_member_count(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *container) {
3833 IrInstSrcMemberCount *instruction = ir_build_instruction<IrInstSrcMemberCount>(irb, scope, source_node);
30223834 instruction->container = container;
30233835
30243836 ir_ref_instruction(container, irb->current_basic_block);
......@@ -3026,10 +3838,10 @@ static IrInstruction *ir_build_member_count(IrBuilder *irb, Scope *scope, AstNod
30263838 return &instruction->base;
30273839}
30283840
3029static IrInstruction *ir_build_member_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
3030 IrInstruction *container_type, IrInstruction *member_index)
3841static IrInstSrc *ir_build_member_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3842 IrInstSrc *container_type, IrInstSrc *member_index)
30313843{
3032 IrInstructionMemberType *instruction = ir_build_instruction<IrInstructionMemberType>(irb, scope, source_node);
3844 IrInstSrcMemberType *instruction = ir_build_instruction<IrInstSrcMemberType>(irb, scope, source_node);
30333845 instruction->container_type = container_type;
30343846 instruction->member_index = member_index;
30353847
......@@ -3039,10 +3851,10 @@ static IrInstruction *ir_build_member_type(IrBuilder *irb, Scope *scope, AstNode
30393851 return &instruction->base;
30403852}
30413853
3042static IrInstruction *ir_build_member_name(IrBuilder *irb, Scope *scope, AstNode *source_node,
3043 IrInstruction *container_type, IrInstruction *member_index)
3854static IrInstSrc *ir_build_member_name(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3855 IrInstSrc *container_type, IrInstSrc *member_index)
30443856{
3045 IrInstructionMemberName *instruction = ir_build_instruction<IrInstructionMemberName>(irb, scope, source_node);
3857 IrInstSrcMemberName *instruction = ir_build_instruction<IrInstSrcMemberName>(irb, scope, source_node);
30463858 instruction->container_type = container_type;
30473859 instruction->member_index = member_index;
30483860
......@@ -3052,65 +3864,88 @@ static IrInstruction *ir_build_member_name(IrBuilder *irb, Scope *scope, AstNode
30523864 return &instruction->base;
30533865}
30543866
3055static IrInstruction *ir_build_breakpoint(IrBuilder *irb, Scope *scope, AstNode *source_node) {
3056 IrInstructionBreakpoint *instruction = ir_build_instruction<IrInstructionBreakpoint>(irb, scope, source_node);
3867static IrInstSrc *ir_build_breakpoint(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
3868 IrInstSrcBreakpoint *instruction = ir_build_instruction<IrInstSrcBreakpoint>(irb, scope, source_node);
30573869 return &instruction->base;
30583870}
30593871
3060static IrInstruction *ir_build_return_address(IrBuilder *irb, Scope *scope, AstNode *source_node) {
3061 IrInstructionReturnAddress *instruction = ir_build_instruction<IrInstructionReturnAddress>(irb, scope, source_node);
3872static IrInstGen *ir_build_breakpoint_gen(IrAnalyze *ira, IrInst *source_instr) {
3873 IrInstGenBreakpoint *instruction = ir_build_inst_void<IrInstGenBreakpoint>(&ira->new_irb,
3874 source_instr->scope, source_instr->source_node);
30623875 return &instruction->base;
30633876}
30643877
3065static IrInstruction *ir_build_frame_address(IrBuilder *irb, Scope *scope, AstNode *source_node) {
3066 IrInstructionFrameAddress *instruction = ir_build_instruction<IrInstructionFrameAddress>(irb, scope, source_node);
3878static IrInstSrc *ir_build_return_address_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
3879 IrInstSrcReturnAddress *instruction = ir_build_instruction<IrInstSrcReturnAddress>(irb, scope, source_node);
30673880 return &instruction->base;
30683881}
30693882
3070static IrInstruction *ir_build_handle(IrBuilder *irb, Scope *scope, AstNode *source_node) {
3071 IrInstructionFrameHandle *instruction = ir_build_instruction<IrInstructionFrameHandle>(irb, scope, source_node);
3072 return &instruction->base;
3883static IrInstGen *ir_build_return_address_gen(IrAnalyze *ira, IrInst *source_instr) {
3884 IrInstGenReturnAddress *inst = ir_build_inst_gen<IrInstGenReturnAddress>(&ira->new_irb, source_instr->scope, source_instr->source_node);
3885 inst->base.value->type = ira->codegen->builtin_types.entry_usize;
3886 return &inst->base;
3887}
3888
3889static IrInstSrc *ir_build_frame_address_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
3890 IrInstSrcFrameAddress *inst = ir_build_instruction<IrInstSrcFrameAddress>(irb, scope, source_node);
3891 return &inst->base;
3892}
3893
3894static IrInstGen *ir_build_frame_address_gen(IrAnalyze *ira, IrInst *source_instr) {
3895 IrInstGenFrameAddress *inst = ir_build_inst_gen<IrInstGenFrameAddress>(&ira->new_irb, source_instr->scope, source_instr->source_node);
3896 inst->base.value->type = ira->codegen->builtin_types.entry_usize;
3897 return &inst->base;
3898}
3899
3900static IrInstSrc *ir_build_handle_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
3901 IrInstSrcFrameHandle *inst = ir_build_instruction<IrInstSrcFrameHandle>(irb, scope, source_node);
3902 return &inst->base;
3903}
3904
3905static IrInstGen *ir_build_handle_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *ty) {
3906 IrInstGenFrameHandle *inst = ir_build_inst_gen<IrInstGenFrameHandle>(&ira->new_irb, source_instr->scope, source_instr->source_node);
3907 inst->base.value->type = ty;
3908 return &inst->base;
30733909}
30743910
3075static IrInstruction *ir_build_frame_type(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *fn) {
3076 IrInstructionFrameType *instruction = ir_build_instruction<IrInstructionFrameType>(irb, scope, source_node);
3077 instruction->fn = fn;
3911static IrInstSrc *ir_build_frame_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *fn) {
3912 IrInstSrcFrameType *inst = ir_build_instruction<IrInstSrcFrameType>(irb, scope, source_node);
3913 inst->fn = fn;
30783914
30793915 ir_ref_instruction(fn, irb->current_basic_block);
30803916
3081 return &instruction->base;
3917 return &inst->base;
30823918}
30833919
3084static IrInstruction *ir_build_frame_size_src(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *fn) {
3085 IrInstructionFrameSizeSrc *instruction = ir_build_instruction<IrInstructionFrameSizeSrc>(irb, scope, source_node);
3086 instruction->fn = fn;
3920static IrInstSrc *ir_build_frame_size_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *fn) {
3921 IrInstSrcFrameSize *inst = ir_build_instruction<IrInstSrcFrameSize>(irb, scope, source_node);
3922 inst->fn = fn;
30873923
30883924 ir_ref_instruction(fn, irb->current_basic_block);
30893925
3090 return &instruction->base;
3926 return &inst->base;
30913927}
30923928
3093static IrInstruction *ir_build_frame_size_gen(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *fn)
3929static IrInstGen *ir_build_frame_size_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *fn)
30943930{
3095 IrInstructionFrameSizeGen *instruction = ir_build_instruction<IrInstructionFrameSizeGen>(irb, scope, source_node);
3096 instruction->fn = fn;
3931 IrInstGenFrameSize *inst = ir_build_inst_gen<IrInstGenFrameSize>(&ira->new_irb, source_instr->scope, source_instr->source_node);
3932 inst->base.value->type = ira->codegen->builtin_types.entry_usize;
3933 inst->fn = fn;
30973934
3098 ir_ref_instruction(fn, irb->current_basic_block);
3935 ir_ref_inst_gen(fn, ira->new_irb.current_basic_block);
30993936
3100 return &instruction->base;
3937 return &inst->base;
31013938}
31023939
3103static IrInstruction *ir_build_overflow_op(IrBuilder *irb, Scope *scope, AstNode *source_node,
3104 IrOverflowOp op, IrInstruction *type_value, IrInstruction *op1, IrInstruction *op2,
3105 IrInstruction *result_ptr, ZigType *result_ptr_type)
3940static IrInstSrc *ir_build_overflow_op_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3941 IrOverflowOp op, IrInstSrc *type_value, IrInstSrc *op1, IrInstSrc *op2, IrInstSrc *result_ptr)
31063942{
3107 IrInstructionOverflowOp *instruction = ir_build_instruction<IrInstructionOverflowOp>(irb, scope, source_node);
3943 IrInstSrcOverflowOp *instruction = ir_build_instruction<IrInstSrcOverflowOp>(irb, scope, source_node);
31083944 instruction->op = op;
31093945 instruction->type_value = type_value;
31103946 instruction->op1 = op1;
31113947 instruction->op2 = op2;
31123948 instruction->result_ptr = result_ptr;
3113 instruction->result_ptr_type = result_ptr_type;
31143949
31153950 ir_ref_instruction(type_value, irb->current_basic_block);
31163951 ir_ref_instruction(op1, irb->current_basic_block);
......@@ -3120,49 +3955,30 @@ static IrInstruction *ir_build_overflow_op(IrBuilder *irb, Scope *scope, AstNode
31203955 return &instruction->base;
31213956}
31223957
3958static IrInstGen *ir_build_overflow_op_gen(IrAnalyze *ira, IrInst *source_instr,
3959 IrOverflowOp op, IrInstGen *op1, IrInstGen *op2, IrInstGen *result_ptr,
3960 ZigType *result_ptr_type)
3961{
3962 IrInstGenOverflowOp *instruction = ir_build_inst_gen<IrInstGenOverflowOp>(&ira->new_irb,
3963 source_instr->scope, source_instr->source_node);
3964 instruction->base.value->type = ira->codegen->builtin_types.entry_bool;
3965 instruction->op = op;
3966 instruction->op1 = op1;
3967 instruction->op2 = op2;
3968 instruction->result_ptr = result_ptr;
3969 instruction->result_ptr_type = result_ptr_type;
31233970
3124//TODO Powi, Pow, minnum, maxnum, maximum, minimum, copysign,
3125// lround, llround, lrint, llrint
3126// So far this is only non-complicated type functions.
3127const char *float_op_to_name(BuiltinFnId op) {
3128 switch (op) {
3129 case BuiltinFnIdSqrt:
3130 return "sqrt";
3131 case BuiltinFnIdSin:
3132 return "sin";
3133 case BuiltinFnIdCos:
3134 return "cos";
3135 case BuiltinFnIdExp:
3136 return "exp";
3137 case BuiltinFnIdExp2:
3138 return "exp2";
3139 case BuiltinFnIdLog:
3140 return "log";
3141 case BuiltinFnIdLog10:
3142 return "log10";
3143 case BuiltinFnIdLog2:
3144 return "log2";
3145 case BuiltinFnIdFabs:
3146 return "fabs";
3147 case BuiltinFnIdFloor:
3148 return "floor";
3149 case BuiltinFnIdCeil:
3150 return "ceil";
3151 case BuiltinFnIdTrunc:
3152 return "trunc";
3153 case BuiltinFnIdNearbyInt:
3154 return "nearbyint";
3155 case BuiltinFnIdRound:
3156 return "round";
3157 default:
3158 zig_unreachable();
3159 }
3971 ir_ref_inst_gen(op1, ira->new_irb.current_basic_block);
3972 ir_ref_inst_gen(op2, ira->new_irb.current_basic_block);
3973 ir_ref_inst_gen(result_ptr, ira->new_irb.current_basic_block);
3974
3975 return &instruction->base;
31603976}
31613977
3162static IrInstruction *ir_build_float_op(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *operand,
3978static IrInstSrc *ir_build_float_op_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *operand,
31633979 BuiltinFnId fn_id)
31643980{
3165 IrInstructionFloatOp *instruction = ir_build_instruction<IrInstructionFloatOp>(irb, scope, source_node);
3981 IrInstSrcFloatOp *instruction = ir_build_instruction<IrInstSrcFloatOp>(irb, scope, source_node);
31663982 instruction->operand = operand;
31673983 instruction->fn_id = fn_id;
31683984
......@@ -3171,9 +3987,24 @@ static IrInstruction *ir_build_float_op(IrBuilder *irb, Scope *scope, AstNode *s
31713987 return &instruction->base;
31723988}
31733989
3174static IrInstruction *ir_build_mul_add(IrBuilder *irb, Scope *scope, AstNode *source_node,
3175 IrInstruction *type_value, IrInstruction *op1, IrInstruction *op2, IrInstruction *op3) {
3176 IrInstructionMulAdd *instruction = ir_build_instruction<IrInstructionMulAdd>(irb, scope, source_node);
3990static IrInstGen *ir_build_float_op_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *operand,
3991 BuiltinFnId fn_id, ZigType *operand_type)
3992{
3993 IrInstGenFloatOp *instruction = ir_build_inst_gen<IrInstGenFloatOp>(&ira->new_irb,
3994 source_instr->scope, source_instr->source_node);
3995 instruction->base.value->type = operand_type;
3996 instruction->operand = operand;
3997 instruction->fn_id = fn_id;
3998
3999 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
4000
4001 return &instruction->base;
4002}
4003
4004static IrInstSrc *ir_build_mul_add_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4005 IrInstSrc *type_value, IrInstSrc *op1, IrInstSrc *op2, IrInstSrc *op3)
4006{
4007 IrInstSrcMulAdd *instruction = ir_build_instruction<IrInstSrcMulAdd>(irb, scope, source_node);
31774008 instruction->type_value = type_value;
31784009 instruction->op1 = op1;
31794010 instruction->op2 = op2;
......@@ -3187,8 +4018,25 @@ static IrInstruction *ir_build_mul_add(IrBuilder *irb, Scope *scope, AstNode *so
31874018 return &instruction->base;
31884019}
31894020
3190static IrInstruction *ir_build_align_of(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type_value) {
3191 IrInstructionAlignOf *instruction = ir_build_instruction<IrInstructionAlignOf>(irb, scope, source_node);
4021static IrInstGen *ir_build_mul_add_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *op1, IrInstGen *op2,
4022 IrInstGen *op3, ZigType *expr_type)
4023{
4024 IrInstGenMulAdd *instruction = ir_build_inst_gen<IrInstGenMulAdd>(&ira->new_irb,
4025 source_instr->scope, source_instr->source_node);
4026 instruction->base.value->type = expr_type;
4027 instruction->op1 = op1;
4028 instruction->op2 = op2;
4029 instruction->op3 = op3;
4030
4031 ir_ref_inst_gen(op1, ira->new_irb.current_basic_block);
4032 ir_ref_inst_gen(op2, ira->new_irb.current_basic_block);
4033 ir_ref_inst_gen(op3, ira->new_irb.current_basic_block);
4034
4035 return &instruction->base;
4036}
4037
4038static IrInstSrc *ir_build_align_of(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type_value) {
4039 IrInstSrcAlignOf *instruction = ir_build_instruction<IrInstSrcAlignOf>(irb, scope, source_node);
31924040 instruction->type_value = type_value;
31934041
31944042 ir_ref_instruction(type_value, irb->current_basic_block);
......@@ -3196,10 +4044,10 @@ static IrInstruction *ir_build_align_of(IrBuilder *irb, Scope *scope, AstNode *s
31964044 return &instruction->base;
31974045}
31984046
3199static IrInstruction *ir_build_test_err_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
3200 IrInstruction *base_ptr, bool resolve_err_set, bool base_ptr_is_payload)
4047static IrInstSrc *ir_build_test_err_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4048 IrInstSrc *base_ptr, bool resolve_err_set, bool base_ptr_is_payload)
32014049{
3202 IrInstructionTestErrSrc *instruction = ir_build_instruction<IrInstructionTestErrSrc>(irb, scope, source_node);
4050 IrInstSrcTestErr *instruction = ir_build_instruction<IrInstSrcTestErr>(irb, scope, source_node);
32034051 instruction->base_ptr = base_ptr;
32044052 instruction->resolve_err_set = resolve_err_set;
32054053 instruction->base_ptr_is_payload = base_ptr_is_payload;
......@@ -3209,48 +4057,72 @@ static IrInstruction *ir_build_test_err_src(IrBuilder *irb, Scope *scope, AstNod
32094057 return &instruction->base;
32104058}
32114059
3212static IrInstruction *ir_build_test_err_gen(IrAnalyze *ira, IrInstruction *source_instruction,
3213 IrInstruction *err_union)
3214{
3215 IrInstructionTestErrGen *instruction = ir_build_instruction<IrInstructionTestErrGen>(
4060static IrInstGen *ir_build_test_err_gen(IrAnalyze *ira, IrInst *source_instruction, IrInstGen *err_union) {
4061 IrInstGenTestErr *instruction = ir_build_inst_gen<IrInstGenTestErr>(
32164062 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
32174063 instruction->base.value->type = ira->codegen->builtin_types.entry_bool;
32184064 instruction->err_union = err_union;
32194065
3220 ir_ref_instruction(err_union, ira->new_irb.current_basic_block);
4066 ir_ref_inst_gen(err_union, ira->new_irb.current_basic_block);
32214067
32224068 return &instruction->base;
32234069}
32244070
3225static IrInstruction *ir_build_unwrap_err_code(IrBuilder *irb, Scope *scope, AstNode *source_node,
3226 IrInstruction *err_union_ptr)
4071static IrInstSrc *ir_build_unwrap_err_code_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4072 IrInstSrc *err_union_ptr)
32274073{
3228 IrInstructionUnwrapErrCode *instruction = ir_build_instruction<IrInstructionUnwrapErrCode>(irb, scope, source_node);
3229 instruction->err_union_ptr = err_union_ptr;
4074 IrInstSrcUnwrapErrCode *inst = ir_build_instruction<IrInstSrcUnwrapErrCode>(irb, scope, source_node);
4075 inst->err_union_ptr = err_union_ptr;
32304076
32314077 ir_ref_instruction(err_union_ptr, irb->current_basic_block);
32324078
3233 return &instruction->base;
4079 return &inst->base;
32344080}
32354081
3236static IrInstruction *ir_build_unwrap_err_payload(IrBuilder *irb, Scope *scope, AstNode *source_node,
3237 IrInstruction *value, bool safety_check_on, bool initializing)
4082static IrInstGen *ir_build_unwrap_err_code_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
4083 IrInstGen *err_union_ptr, ZigType *result_type)
32384084{
3239 IrInstructionUnwrapErrPayload *instruction = ir_build_instruction<IrInstructionUnwrapErrPayload>(irb, scope, source_node);
3240 instruction->value = value;
3241 instruction->safety_check_on = safety_check_on;
3242 instruction->initializing = initializing;
4085 IrInstGenUnwrapErrCode *inst = ir_build_inst_gen<IrInstGenUnwrapErrCode>(&ira->new_irb, scope, source_node);
4086 inst->base.value->type = result_type;
4087 inst->err_union_ptr = err_union_ptr;
4088
4089 ir_ref_inst_gen(err_union_ptr, ira->new_irb.current_basic_block);
4090
4091 return &inst->base;
4092}
4093
4094static IrInstSrc *ir_build_unwrap_err_payload_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4095 IrInstSrc *value, bool safety_check_on, bool initializing)
4096{
4097 IrInstSrcUnwrapErrPayload *inst = ir_build_instruction<IrInstSrcUnwrapErrPayload>(irb, scope, source_node);
4098 inst->value = value;
4099 inst->safety_check_on = safety_check_on;
4100 inst->initializing = initializing;
32434101
32444102 ir_ref_instruction(value, irb->current_basic_block);
32454103
3246 return &instruction->base;
4104 return &inst->base;
32474105}
32484106
3249static IrInstruction *ir_build_fn_proto(IrBuilder *irb, Scope *scope, AstNode *source_node,
3250 IrInstruction **param_types, IrInstruction *align_value, IrInstruction *callconv_value,
3251 IrInstruction *return_type, bool is_var_args)
4107static IrInstGen *ir_build_unwrap_err_payload_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
4108 IrInstGen *value, bool safety_check_on, bool initializing, ZigType *result_type)
32524109{
3253 IrInstructionFnProto *instruction = ir_build_instruction<IrInstructionFnProto>(irb, scope, source_node);
4110 IrInstGenUnwrapErrPayload *inst = ir_build_inst_gen<IrInstGenUnwrapErrPayload>(&ira->new_irb, scope, source_node);
4111 inst->base.value->type = result_type;
4112 inst->value = value;
4113 inst->safety_check_on = safety_check_on;
4114 inst->initializing = initializing;
4115
4116 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
4117
4118 return &inst->base;
4119}
4120
4121static IrInstSrc *ir_build_fn_proto(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4122 IrInstSrc **param_types, IrInstSrc *align_value, IrInstSrc *callconv_value,
4123 IrInstSrc *return_type, bool is_var_args)
4124{
4125 IrInstSrcFnProto *instruction = ir_build_instruction<IrInstSrcFnProto>(irb, scope, source_node);
32544126 instruction->param_types = param_types;
32554127 instruction->align_value = align_value;
32564128 instruction->callconv_value = callconv_value;
......@@ -3270,8 +4142,8 @@ static IrInstruction *ir_build_fn_proto(IrBuilder *irb, Scope *scope, AstNode *s
32704142 return &instruction->base;
32714143}
32724144
3273static IrInstruction *ir_build_test_comptime(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {
3274 IrInstructionTestComptime *instruction = ir_build_instruction<IrInstructionTestComptime>(irb, scope, source_node);
4145static IrInstSrc *ir_build_test_comptime(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *value) {
4146 IrInstSrcTestComptime *instruction = ir_build_instruction<IrInstSrcTestComptime>(irb, scope, source_node);
32754147 instruction->value = value;
32764148
32774149 ir_ref_instruction(value, irb->current_basic_block);
......@@ -3279,10 +4151,10 @@ static IrInstruction *ir_build_test_comptime(IrBuilder *irb, Scope *scope, AstNo
32794151 return &instruction->base;
32804152}
32814153
3282static IrInstruction *ir_build_ptr_cast_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
3283 IrInstruction *dest_type, IrInstruction *ptr, bool safety_check_on)
4154static IrInstSrc *ir_build_ptr_cast_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4155 IrInstSrc *dest_type, IrInstSrc *ptr, bool safety_check_on)
32844156{
3285 IrInstructionPtrCastSrc *instruction = ir_build_instruction<IrInstructionPtrCastSrc>(
4157 IrInstSrcPtrCast *instruction = ir_build_instruction<IrInstSrcPtrCast>(
32864158 irb, scope, source_node);
32874159 instruction->dest_type = dest_type;
32884160 instruction->ptr = ptr;
......@@ -3294,39 +4166,24 @@ static IrInstruction *ir_build_ptr_cast_src(IrBuilder *irb, Scope *scope, AstNod
32944166 return &instruction->base;
32954167}
32964168
3297static IrInstruction *ir_build_ptr_cast_gen(IrAnalyze *ira, IrInstruction *source_instruction,
3298 ZigType *ptr_type, IrInstruction *ptr, bool safety_check_on)
4169static IrInstGen *ir_build_ptr_cast_gen(IrAnalyze *ira, IrInst *source_instruction,
4170 ZigType *ptr_type, IrInstGen *ptr, bool safety_check_on)
32994171{
3300 IrInstructionPtrCastGen *instruction = ir_build_instruction<IrInstructionPtrCastGen>(
4172 IrInstGenPtrCast *instruction = ir_build_inst_gen<IrInstGenPtrCast>(
33014173 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
33024174 instruction->base.value->type = ptr_type;
33034175 instruction->ptr = ptr;
33044176 instruction->safety_check_on = safety_check_on;
33054177
3306 ir_ref_instruction(ptr, ira->new_irb.current_basic_block);
3307
3308 return &instruction->base;
3309}
3310
3311static IrInstruction *ir_build_load_ptr_gen(IrAnalyze *ira, IrInstruction *source_instruction,
3312 IrInstruction *ptr, ZigType *ty, IrInstruction *result_loc)
3313{
3314 IrInstructionLoadPtrGen *instruction = ir_build_instruction<IrInstructionLoadPtrGen>(
3315 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
3316 instruction->base.value->type = ty;
3317 instruction->ptr = ptr;
3318 instruction->result_loc = result_loc;
3319
3320 ir_ref_instruction(ptr, ira->new_irb.current_basic_block);
3321 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
4178 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
33224179
33234180 return &instruction->base;
33244181}
33254182
3326static IrInstruction *ir_build_implicit_cast(IrBuilder *irb, Scope *scope, AstNode *source_node,
3327 IrInstruction *operand, ResultLocCast *result_loc_cast)
4183static IrInstSrc *ir_build_implicit_cast(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4184 IrInstSrc *operand, ResultLocCast *result_loc_cast)
33284185{
3329 IrInstructionImplicitCast *instruction = ir_build_instruction<IrInstructionImplicitCast>(irb, scope, source_node);
4186 IrInstSrcImplicitCast *instruction = ir_build_instruction<IrInstSrcImplicitCast>(irb, scope, source_node);
33304187 instruction->operand = operand;
33314188 instruction->result_loc_cast = result_loc_cast;
33324189
......@@ -3335,10 +4192,10 @@ static IrInstruction *ir_build_implicit_cast(IrBuilder *irb, Scope *scope, AstNo
33354192 return &instruction->base;
33364193}
33374194
3338static IrInstruction *ir_build_bit_cast_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
3339 IrInstruction *operand, ResultLocBitCast *result_loc_bit_cast)
4195static IrInstSrc *ir_build_bit_cast_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4196 IrInstSrc *operand, ResultLocBitCast *result_loc_bit_cast)
33404197{
3341 IrInstructionBitCastSrc *instruction = ir_build_instruction<IrInstructionBitCastSrc>(irb, scope, source_node);
4198 IrInstSrcBitCast *instruction = ir_build_instruction<IrInstSrcBitCast>(irb, scope, source_node);
33424199 instruction->operand = operand;
33434200 instruction->result_loc_bit_cast = result_loc_bit_cast;
33444201
......@@ -3347,62 +4204,81 @@ static IrInstruction *ir_build_bit_cast_src(IrBuilder *irb, Scope *scope, AstNod
33474204 return &instruction->base;
33484205}
33494206
3350static IrInstruction *ir_build_bit_cast_gen(IrAnalyze *ira, IrInstruction *source_instruction,
3351 IrInstruction *operand, ZigType *ty)
4207static IrInstGen *ir_build_bit_cast_gen(IrAnalyze *ira, IrInst *source_instruction,
4208 IrInstGen *operand, ZigType *ty)
33524209{
3353 IrInstructionBitCastGen *instruction = ir_build_instruction<IrInstructionBitCastGen>(
4210 IrInstGenBitCast *instruction = ir_build_inst_gen<IrInstGenBitCast>(
33544211 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
33554212 instruction->base.value->type = ty;
33564213 instruction->operand = operand;
33574214
3358 ir_ref_instruction(operand, ira->new_irb.current_basic_block);
4215 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
33594216
33604217 return &instruction->base;
33614218}
33624219
3363static IrInstruction *ir_build_widen_or_shorten(IrBuilder *irb, Scope *scope, AstNode *source_node,
3364 IrInstruction *target)
4220static IrInstGen *ir_build_widen_or_shorten(IrAnalyze *ira, Scope *scope, AstNode *source_node, IrInstGen *target,
4221 ZigType *result_type)
33654222{
3366 IrInstructionWidenOrShorten *instruction = ir_build_instruction<IrInstructionWidenOrShorten>(
3367 irb, scope, source_node);
3368 instruction->target = target;
4223 IrInstGenWidenOrShorten *inst = ir_build_inst_gen<IrInstGenWidenOrShorten>(&ira->new_irb, scope, source_node);
4224 inst->base.value->type = result_type;
4225 inst->target = target;
33694226
3370 ir_ref_instruction(target, irb->current_basic_block);
4227 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
33714228
3372 return &instruction->base;
4229 return &inst->base;
33734230}
33744231
3375static IrInstruction *ir_build_int_to_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
3376 IrInstruction *dest_type, IrInstruction *target)
4232static IrInstSrc *ir_build_int_to_ptr_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4233 IrInstSrc *dest_type, IrInstSrc *target)
33774234{
3378 IrInstructionIntToPtr *instruction = ir_build_instruction<IrInstructionIntToPtr>(
3379 irb, scope, source_node);
4235 IrInstSrcIntToPtr *instruction = ir_build_instruction<IrInstSrcIntToPtr>(irb, scope, source_node);
33804236 instruction->dest_type = dest_type;
33814237 instruction->target = target;
33824238
3383 if (dest_type) ir_ref_instruction(dest_type, irb->current_basic_block);
4239 ir_ref_instruction(dest_type, irb->current_basic_block);
33844240 ir_ref_instruction(target, irb->current_basic_block);
33854241
33864242 return &instruction->base;
33874243}
33884244
3389static IrInstruction *ir_build_ptr_to_int(IrBuilder *irb, Scope *scope, AstNode *source_node,
3390 IrInstruction *target)
4245static IrInstGen *ir_build_int_to_ptr_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
4246 IrInstGen *target, ZigType *ptr_type)
33914247{
3392 IrInstructionPtrToInt *instruction = ir_build_instruction<IrInstructionPtrToInt>(
3393 irb, scope, source_node);
4248 IrInstGenIntToPtr *instruction = ir_build_inst_gen<IrInstGenIntToPtr>(&ira->new_irb, scope, source_node);
4249 instruction->base.value->type = ptr_type;
33944250 instruction->target = target;
33954251
3396 ir_ref_instruction(target, irb->current_basic_block);
4252 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
33974253
33984254 return &instruction->base;
33994255}
34004256
3401static IrInstruction *ir_build_int_to_enum(IrBuilder *irb, Scope *scope, AstNode *source_node,
3402 IrInstruction *dest_type, IrInstruction *target)
4257static IrInstSrc *ir_build_ptr_to_int_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4258 IrInstSrc *target)
34034259{
3404 IrInstructionIntToEnum *instruction = ir_build_instruction<IrInstructionIntToEnum>(
3405 irb, scope, source_node);
4260 IrInstSrcPtrToInt *inst = ir_build_instruction<IrInstSrcPtrToInt>(irb, scope, source_node);
4261 inst->target = target;
4262
4263 ir_ref_instruction(target, irb->current_basic_block);
4264
4265 return &inst->base;
4266}
4267
4268static IrInstGen *ir_build_ptr_to_int_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *target) {
4269 IrInstGenPtrToInt *inst = ir_build_inst_gen<IrInstGenPtrToInt>(&ira->new_irb, source_instr->scope, source_instr->source_node);
4270 inst->base.value->type = ira->codegen->builtin_types.entry_usize;
4271 inst->target = target;
4272
4273 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
4274
4275 return &inst->base;
4276}
4277
4278static IrInstSrc *ir_build_int_to_enum_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4279 IrInstSrc *dest_type, IrInstSrc *target)
4280{
4281 IrInstSrcIntToEnum *instruction = ir_build_instruction<IrInstSrcIntToEnum>(irb, scope, source_node);
34064282 instruction->dest_type = dest_type;
34074283 instruction->target = target;
34084284
......@@ -3412,12 +4288,22 @@ static IrInstruction *ir_build_int_to_enum(IrBuilder *irb, Scope *scope, AstNode
34124288 return &instruction->base;
34134289}
34144290
4291static IrInstGen *ir_build_int_to_enum_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
4292 ZigType *dest_type, IrInstGen *target)
4293{
4294 IrInstGenIntToEnum *instruction = ir_build_inst_gen<IrInstGenIntToEnum>(&ira->new_irb, scope, source_node);
4295 instruction->base.value->type = dest_type;
4296 instruction->target = target;
4297
4298 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
34154299
4300 return &instruction->base;
4301}
34164302
3417static IrInstruction *ir_build_enum_to_int(IrBuilder *irb, Scope *scope, AstNode *source_node,
3418 IrInstruction *target)
4303static IrInstSrc *ir_build_enum_to_int(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4304 IrInstSrc *target)
34194305{
3420 IrInstructionEnumToInt *instruction = ir_build_instruction<IrInstructionEnumToInt>(
4306 IrInstSrcEnumToInt *instruction = ir_build_instruction<IrInstSrcEnumToInt>(
34214307 irb, scope, source_node);
34224308 instruction->target = target;
34234309
......@@ -3426,11 +4312,10 @@ static IrInstruction *ir_build_enum_to_int(IrBuilder *irb, Scope *scope, AstNode
34264312 return &instruction->base;
34274313}
34284314
3429static IrInstruction *ir_build_int_to_err(IrBuilder *irb, Scope *scope, AstNode *source_node,
3430 IrInstruction *target)
4315static IrInstSrc *ir_build_int_to_err_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4316 IrInstSrc *target)
34314317{
3432 IrInstructionIntToErr *instruction = ir_build_instruction<IrInstructionIntToErr>(
3433 irb, scope, source_node);
4318 IrInstSrcIntToErr *instruction = ir_build_instruction<IrInstSrcIntToErr>(irb, scope, source_node);
34344319 instruction->target = target;
34354320
34364321 ir_ref_instruction(target, irb->current_basic_block);
......@@ -3438,10 +4323,22 @@ static IrInstruction *ir_build_int_to_err(IrBuilder *irb, Scope *scope, AstNode
34384323 return &instruction->base;
34394324}
34404325
3441static IrInstruction *ir_build_err_to_int(IrBuilder *irb, Scope *scope, AstNode *source_node,
3442 IrInstruction *target)
4326static IrInstGen *ir_build_int_to_err_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node, IrInstGen *target,
4327 ZigType *wanted_type)
4328{
4329 IrInstGenIntToErr *instruction = ir_build_inst_gen<IrInstGenIntToErr>(&ira->new_irb, scope, source_node);
4330 instruction->base.value->type = wanted_type;
4331 instruction->target = target;
4332
4333 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
4334
4335 return &instruction->base;
4336}
4337
4338static IrInstSrc *ir_build_err_to_int_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4339 IrInstSrc *target)
34434340{
3444 IrInstructionErrToInt *instruction = ir_build_instruction<IrInstructionErrToInt>(
4341 IrInstSrcErrToInt *instruction = ir_build_instruction<IrInstSrcErrToInt>(
34454342 irb, scope, source_node);
34464343 instruction->target = target;
34474344
......@@ -3450,11 +4347,23 @@ static IrInstruction *ir_build_err_to_int(IrBuilder *irb, Scope *scope, AstNode
34504347 return &instruction->base;
34514348}
34524349
3453static IrInstruction *ir_build_check_switch_prongs(IrBuilder *irb, Scope *scope, AstNode *source_node,
3454 IrInstruction *target_value, IrInstructionCheckSwitchProngsRange *ranges, size_t range_count,
4350static IrInstGen *ir_build_err_to_int_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node, IrInstGen *target,
4351 ZigType *wanted_type)
4352{
4353 IrInstGenErrToInt *instruction = ir_build_inst_gen<IrInstGenErrToInt>(&ira->new_irb, scope, source_node);
4354 instruction->base.value->type = wanted_type;
4355 instruction->target = target;
4356
4357 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
4358
4359 return &instruction->base;
4360}
4361
4362static IrInstSrc *ir_build_check_switch_prongs(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4363 IrInstSrc *target_value, IrInstSrcCheckSwitchProngsRange *ranges, size_t range_count,
34554364 bool have_else_prong, bool have_underscore_prong)
34564365{
3457 IrInstructionCheckSwitchProngs *instruction = ir_build_instruction<IrInstructionCheckSwitchProngs>(
4366 IrInstSrcCheckSwitchProngs *instruction = ir_build_instruction<IrInstSrcCheckSwitchProngs>(
34584367 irb, scope, source_node);
34594368 instruction->target_value = target_value;
34604369 instruction->ranges = ranges;
......@@ -3471,10 +4380,10 @@ static IrInstruction *ir_build_check_switch_prongs(IrBuilder *irb, Scope *scope,
34714380 return &instruction->base;
34724381}
34734382
3474static IrInstruction *ir_build_check_statement_is_void(IrBuilder *irb, Scope *scope, AstNode *source_node,
3475 IrInstruction* statement_value)
4383static IrInstSrc *ir_build_check_statement_is_void(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4384 IrInstSrc* statement_value)
34764385{
3477 IrInstructionCheckStatementIsVoid *instruction = ir_build_instruction<IrInstructionCheckStatementIsVoid>(
4386 IrInstSrcCheckStatementIsVoid *instruction = ir_build_instruction<IrInstSrcCheckStatementIsVoid>(
34784387 irb, scope, source_node);
34794388 instruction->statement_value = statement_value;
34804389
......@@ -3483,11 +4392,10 @@ static IrInstruction *ir_build_check_statement_is_void(IrBuilder *irb, Scope *sc
34834392 return &instruction->base;
34844393}
34854394
3486static IrInstruction *ir_build_type_name(IrBuilder *irb, Scope *scope, AstNode *source_node,
3487 IrInstruction *type_value)
4395static IrInstSrc *ir_build_type_name(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4396 IrInstSrc *type_value)
34884397{
3489 IrInstructionTypeName *instruction = ir_build_instruction<IrInstructionTypeName>(
3490 irb, scope, source_node);
4398 IrInstSrcTypeName *instruction = ir_build_instruction<IrInstSrcTypeName>(irb, scope, source_node);
34914399 instruction->type_value = type_value;
34924400
34934401 ir_ref_instruction(type_value, irb->current_basic_block);
......@@ -3495,18 +4403,17 @@ static IrInstruction *ir_build_type_name(IrBuilder *irb, Scope *scope, AstNode *
34954403 return &instruction->base;
34964404}
34974405
3498static IrInstruction *ir_build_decl_ref(IrBuilder *irb, Scope *scope, AstNode *source_node, Tld *tld, LVal lval) {
3499 IrInstructionDeclRef *instruction = ir_build_instruction<IrInstructionDeclRef>(irb, scope, source_node);
4406static IrInstSrc *ir_build_decl_ref(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, Tld *tld, LVal lval) {
4407 IrInstSrcDeclRef *instruction = ir_build_instruction<IrInstSrcDeclRef>(irb, scope, source_node);
35004408 instruction->tld = tld;
35014409 instruction->lval = lval;
35024410
35034411 return &instruction->base;
35044412}
35054413
3506static IrInstruction *ir_build_panic(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *msg) {
3507 IrInstructionPanic *instruction = ir_build_instruction<IrInstructionPanic>(irb, scope, source_node);
3508 instruction->base.value->special = ConstValSpecialStatic;
3509 instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;
4414static IrInstSrc *ir_build_panic_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *msg) {
4415 IrInstSrcPanic *instruction = ir_build_instruction<IrInstSrcPanic>(irb, scope, source_node);
4416 instruction->base.is_noreturn = true;
35104417 instruction->msg = msg;
35114418
35124419 ir_ref_instruction(msg, irb->current_basic_block);
......@@ -3514,10 +4421,18 @@ static IrInstruction *ir_build_panic(IrBuilder *irb, Scope *scope, AstNode *sour
35144421 return &instruction->base;
35154422}
35164423
3517static IrInstruction *ir_build_tag_name(IrBuilder *irb, Scope *scope, AstNode *source_node,
3518 IrInstruction *target)
3519{
3520 IrInstructionTagName *instruction = ir_build_instruction<IrInstructionTagName>(irb, scope, source_node);
4424static IrInstGen *ir_build_panic_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *msg) {
4425 IrInstGenPanic *instruction = ir_build_inst_noreturn<IrInstGenPanic>(&ira->new_irb,
4426 source_instr->scope, source_instr->source_node);
4427 instruction->msg = msg;
4428
4429 ir_ref_inst_gen(msg, ira->new_irb.current_basic_block);
4430
4431 return &instruction->base;
4432}
4433
4434static IrInstSrc *ir_build_tag_name_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *target) {
4435 IrInstSrcTagName *instruction = ir_build_instruction<IrInstSrcTagName>(irb, scope, source_node);
35214436 instruction->target = target;
35224437
35234438 ir_ref_instruction(target, irb->current_basic_block);
......@@ -3525,10 +4440,23 @@ static IrInstruction *ir_build_tag_name(IrBuilder *irb, Scope *scope, AstNode *s
35254440 return &instruction->base;
35264441}
35274442
3528static IrInstruction *ir_build_tag_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
3529 IrInstruction *target)
4443static IrInstGen *ir_build_tag_name_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *target,
4444 ZigType *result_type)
35304445{
3531 IrInstructionTagType *instruction = ir_build_instruction<IrInstructionTagType>(irb, scope, source_node);
4446 IrInstGenTagName *instruction = ir_build_inst_gen<IrInstGenTagName>(&ira->new_irb,
4447 source_instr->scope, source_instr->source_node);
4448 instruction->base.value->type = result_type;
4449 instruction->target = target;
4450
4451 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
4452
4453 return &instruction->base;
4454}
4455
4456static IrInstSrc *ir_build_tag_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4457 IrInstSrc *target)
4458{
4459 IrInstSrcTagType *instruction = ir_build_instruction<IrInstSrcTagType>(irb, scope, source_node);
35324460 instruction->target = target;
35334461
35344462 ir_ref_instruction(target, irb->current_basic_block);
......@@ -3536,27 +4464,40 @@ static IrInstruction *ir_build_tag_type(IrBuilder *irb, Scope *scope, AstNode *s
35364464 return &instruction->base;
35374465}
35384466
3539static IrInstruction *ir_build_field_parent_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
3540 IrInstruction *type_value, IrInstruction *field_name, IrInstruction *field_ptr, TypeStructField *field)
4467static IrInstSrc *ir_build_field_parent_ptr_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4468 IrInstSrc *type_value, IrInstSrc *field_name, IrInstSrc *field_ptr)
35414469{
3542 IrInstructionFieldParentPtr *instruction = ir_build_instruction<IrInstructionFieldParentPtr>(
4470 IrInstSrcFieldParentPtr *inst = ir_build_instruction<IrInstSrcFieldParentPtr>(
35434471 irb, scope, source_node);
3544 instruction->type_value = type_value;
3545 instruction->field_name = field_name;
3546 instruction->field_ptr = field_ptr;
3547 instruction->field = field;
4472 inst->type_value = type_value;
4473 inst->field_name = field_name;
4474 inst->field_ptr = field_ptr;
35484475
35494476 ir_ref_instruction(type_value, irb->current_basic_block);
35504477 ir_ref_instruction(field_name, irb->current_basic_block);
35514478 ir_ref_instruction(field_ptr, irb->current_basic_block);
35524479
3553 return &instruction->base;
4480 return &inst->base;
35544481}
35554482
3556static IrInstruction *ir_build_byte_offset_of(IrBuilder *irb, Scope *scope, AstNode *source_node,
3557 IrInstruction *type_value, IrInstruction *field_name)
4483static IrInstGen *ir_build_field_parent_ptr_gen(IrAnalyze *ira, IrInst *source_instr,
4484 IrInstGen *field_ptr, TypeStructField *field, ZigType *result_type)
35584485{
3559 IrInstructionByteOffsetOf *instruction = ir_build_instruction<IrInstructionByteOffsetOf>(irb, scope, source_node);
4486 IrInstGenFieldParentPtr *inst = ir_build_inst_gen<IrInstGenFieldParentPtr>(&ira->new_irb,
4487 source_instr->scope, source_instr->source_node);
4488 inst->base.value->type = result_type;
4489 inst->field_ptr = field_ptr;
4490 inst->field = field;
4491
4492 ir_ref_inst_gen(field_ptr, ira->new_irb.current_basic_block);
4493
4494 return &inst->base;
4495}
4496
4497static IrInstSrc *ir_build_byte_offset_of(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4498 IrInstSrc *type_value, IrInstSrc *field_name)
4499{
4500 IrInstSrcByteOffsetOf *instruction = ir_build_instruction<IrInstSrcByteOffsetOf>(irb, scope, source_node);
35604501 instruction->type_value = type_value;
35614502 instruction->field_name = field_name;
35624503
......@@ -3566,10 +4507,10 @@ static IrInstruction *ir_build_byte_offset_of(IrBuilder *irb, Scope *scope, AstN
35664507 return &instruction->base;
35674508}
35684509
3569static IrInstruction *ir_build_bit_offset_of(IrBuilder *irb, Scope *scope, AstNode *source_node,
3570 IrInstruction *type_value, IrInstruction *field_name)
4510static IrInstSrc *ir_build_bit_offset_of(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4511 IrInstSrc *type_value, IrInstSrc *field_name)
35714512{
3572 IrInstructionBitOffsetOf *instruction = ir_build_instruction<IrInstructionBitOffsetOf>(irb, scope, source_node);
4513 IrInstSrcBitOffsetOf *instruction = ir_build_instruction<IrInstSrcBitOffsetOf>(irb, scope, source_node);
35734514 instruction->type_value = type_value;
35744515 instruction->field_name = field_name;
35754516
......@@ -3579,9 +4520,8 @@ static IrInstruction *ir_build_bit_offset_of(IrBuilder *irb, Scope *scope, AstNo
35794520 return &instruction->base;
35804521}
35814522
3582static IrInstruction *ir_build_type_info(IrBuilder *irb, Scope *scope, AstNode *source_node,
3583 IrInstruction *type_value) {
3584 IrInstructionTypeInfo *instruction = ir_build_instruction<IrInstructionTypeInfo>(irb, scope, source_node);
4523static IrInstSrc *ir_build_type_info(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type_value) {
4524 IrInstSrcTypeInfo *instruction = ir_build_instruction<IrInstSrcTypeInfo>(irb, scope, source_node);
35854525 instruction->type_value = type_value;
35864526
35874527 ir_ref_instruction(type_value, irb->current_basic_block);
......@@ -3589,8 +4529,8 @@ static IrInstruction *ir_build_type_info(IrBuilder *irb, Scope *scope, AstNode *
35894529 return &instruction->base;
35904530}
35914531
3592static IrInstruction *ir_build_type(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type_info) {
3593 IrInstructionType *instruction = ir_build_instruction<IrInstructionType>(irb, scope, source_node);
4532static IrInstSrc *ir_build_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type_info) {
4533 IrInstSrcType *instruction = ir_build_instruction<IrInstSrcType>(irb, scope, source_node);
35944534 instruction->type_info = type_info;
35954535
35964536 ir_ref_instruction(type_info, irb->current_basic_block);
......@@ -3598,10 +4538,8 @@ static IrInstruction *ir_build_type(IrBuilder *irb, Scope *scope, AstNode *sourc
35984538 return &instruction->base;
35994539}
36004540
3601static IrInstruction *ir_build_type_id(IrBuilder *irb, Scope *scope, AstNode *source_node,
3602 IrInstruction *type_value)
3603{
3604 IrInstructionTypeId *instruction = ir_build_instruction<IrInstructionTypeId>(irb, scope, source_node);
4541static IrInstSrc *ir_build_type_id(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type_value) {
4542 IrInstSrcTypeId *instruction = ir_build_instruction<IrInstSrcTypeId>(irb, scope, source_node);
36054543 instruction->type_value = type_value;
36064544
36074545 ir_ref_instruction(type_value, irb->current_basic_block);
......@@ -3609,10 +4547,10 @@ static IrInstruction *ir_build_type_id(IrBuilder *irb, Scope *scope, AstNode *so
36094547 return &instruction->base;
36104548}
36114549
3612static IrInstruction *ir_build_set_eval_branch_quota(IrBuilder *irb, Scope *scope, AstNode *source_node,
3613 IrInstruction *new_quota)
4550static IrInstSrc *ir_build_set_eval_branch_quota(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4551 IrInstSrc *new_quota)
36144552{
3615 IrInstructionSetEvalBranchQuota *instruction = ir_build_instruction<IrInstructionSetEvalBranchQuota>(irb, scope, source_node);
4553 IrInstSrcSetEvalBranchQuota *instruction = ir_build_instruction<IrInstSrcSetEvalBranchQuota>(irb, scope, source_node);
36164554 instruction->new_quota = new_quota;
36174555
36184556 ir_ref_instruction(new_quota, irb->current_basic_block);
......@@ -3620,23 +4558,35 @@ static IrInstruction *ir_build_set_eval_branch_quota(IrBuilder *irb, Scope *scop
36204558 return &instruction->base;
36214559}
36224560
3623static IrInstruction *ir_build_align_cast(IrBuilder *irb, Scope *scope, AstNode *source_node,
3624 IrInstruction *align_bytes, IrInstruction *target)
4561static IrInstSrc *ir_build_align_cast_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4562 IrInstSrc *align_bytes, IrInstSrc *target)
36254563{
3626 IrInstructionAlignCast *instruction = ir_build_instruction<IrInstructionAlignCast>(irb, scope, source_node);
4564 IrInstSrcAlignCast *instruction = ir_build_instruction<IrInstSrcAlignCast>(irb, scope, source_node);
36274565 instruction->align_bytes = align_bytes;
36284566 instruction->target = target;
36294567
3630 if (align_bytes) ir_ref_instruction(align_bytes, irb->current_basic_block);
4568 ir_ref_instruction(align_bytes, irb->current_basic_block);
36314569 ir_ref_instruction(target, irb->current_basic_block);
36324570
36334571 return &instruction->base;
36344572}
36354573
3636static IrInstruction *ir_build_resolve_result(IrBuilder *irb, Scope *scope, AstNode *source_node,
3637 ResultLoc *result_loc, IrInstruction *ty)
4574static IrInstGen *ir_build_align_cast_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node, IrInstGen *target,
4575 ZigType *result_type)
4576{
4577 IrInstGenAlignCast *instruction = ir_build_inst_gen<IrInstGenAlignCast>(&ira->new_irb, scope, source_node);
4578 instruction->base.value->type = result_type;
4579 instruction->target = target;
4580
4581 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
4582
4583 return &instruction->base;
4584}
4585
4586static IrInstSrc *ir_build_resolve_result(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4587 ResultLoc *result_loc, IrInstSrc *ty)
36384588{
3639 IrInstructionResolveResult *instruction = ir_build_instruction<IrInstructionResolveResult>(irb, scope, source_node);
4589 IrInstSrcResolveResult *instruction = ir_build_instruction<IrInstSrcResolveResult>(irb, scope, source_node);
36404590 instruction->result_loc = result_loc;
36414591 instruction->ty = ty;
36424592
......@@ -3645,25 +4595,26 @@ static IrInstruction *ir_build_resolve_result(IrBuilder *irb, Scope *scope, AstN
36454595 return &instruction->base;
36464596}
36474597
3648static IrInstruction *ir_build_reset_result(IrBuilder *irb, Scope *scope, AstNode *source_node,
4598static IrInstSrc *ir_build_reset_result(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
36494599 ResultLoc *result_loc)
36504600{
3651 IrInstructionResetResult *instruction = ir_build_instruction<IrInstructionResetResult>(irb, scope, source_node);
4601 IrInstSrcResetResult *instruction = ir_build_instruction<IrInstSrcResetResult>(irb, scope, source_node);
36524602 instruction->result_loc = result_loc;
4603 instruction->base.is_gen = true;
36534604
36544605 return &instruction->base;
36554606}
36564607
3657static IrInstruction *ir_build_opaque_type(IrBuilder *irb, Scope *scope, AstNode *source_node) {
3658 IrInstructionOpaqueType *instruction = ir_build_instruction<IrInstructionOpaqueType>(irb, scope, source_node);
4608static IrInstSrc *ir_build_opaque_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
4609 IrInstSrcOpaqueType *instruction = ir_build_instruction<IrInstSrcOpaqueType>(irb, scope, source_node);
36594610
36604611 return &instruction->base;
36614612}
36624613
3663static IrInstruction *ir_build_set_align_stack(IrBuilder *irb, Scope *scope, AstNode *source_node,
3664 IrInstruction *align_bytes)
4614static IrInstSrc *ir_build_set_align_stack(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4615 IrInstSrc *align_bytes)
36654616{
3666 IrInstructionSetAlignStack *instruction = ir_build_instruction<IrInstructionSetAlignStack>(irb, scope, source_node);
4617 IrInstSrcSetAlignStack *instruction = ir_build_instruction<IrInstSrcSetAlignStack>(irb, scope, source_node);
36674618 instruction->align_bytes = align_bytes;
36684619
36694620 ir_ref_instruction(align_bytes, irb->current_basic_block);
......@@ -3671,10 +4622,10 @@ static IrInstruction *ir_build_set_align_stack(IrBuilder *irb, Scope *scope, Ast
36714622 return &instruction->base;
36724623}
36734624
3674static IrInstruction *ir_build_arg_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
3675 IrInstruction *fn_type, IrInstruction *arg_index, bool allow_var)
4625static IrInstSrc *ir_build_arg_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4626 IrInstSrc *fn_type, IrInstSrc *arg_index, bool allow_var)
36764627{
3677 IrInstructionArgType *instruction = ir_build_instruction<IrInstructionArgType>(irb, scope, source_node);
4628 IrInstSrcArgType *instruction = ir_build_instruction<IrInstSrcArgType>(irb, scope, source_node);
36784629 instruction->fn_type = fn_type;
36794630 instruction->arg_index = arg_index;
36804631 instruction->allow_var = allow_var;
......@@ -3685,17 +4636,29 @@ static IrInstruction *ir_build_arg_type(IrBuilder *irb, Scope *scope, AstNode *s
36854636 return &instruction->base;
36864637}
36874638
3688static IrInstruction *ir_build_error_return_trace(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstructionErrorReturnTrace::Optional optional) {
3689 IrInstructionErrorReturnTrace *instruction = ir_build_instruction<IrInstructionErrorReturnTrace>(irb, scope, source_node);
3690 instruction->optional = optional;
4639static IrInstSrc *ir_build_error_return_trace_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4640 IrInstErrorReturnTraceOptional optional)
4641{
4642 IrInstSrcErrorReturnTrace *inst = ir_build_instruction<IrInstSrcErrorReturnTrace>(irb, scope, source_node);
4643 inst->optional = optional;
36914644
3692 return &instruction->base;
4645 return &inst->base;
4646}
4647
4648static IrInstGen *ir_build_error_return_trace_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
4649 IrInstErrorReturnTraceOptional optional, ZigType *result_type)
4650{
4651 IrInstGenErrorReturnTrace *inst = ir_build_inst_gen<IrInstGenErrorReturnTrace>(&ira->new_irb, scope, source_node);
4652 inst->base.value->type = result_type;
4653 inst->optional = optional;
4654
4655 return &inst->base;
36934656}
36944657
3695static IrInstruction *ir_build_error_union(IrBuilder *irb, Scope *scope, AstNode *source_node,
3696 IrInstruction *err_set, IrInstruction *payload)
4658static IrInstSrc *ir_build_error_union(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4659 IrInstSrc *err_set, IrInstSrc *payload)
36974660{
3698 IrInstructionErrorUnion *instruction = ir_build_instruction<IrInstructionErrorUnion>(irb, scope, source_node);
4661 IrInstSrcErrorUnion *instruction = ir_build_instruction<IrInstSrcErrorUnion>(irb, scope, source_node);
36994662 instruction->err_set = err_set;
37004663 instruction->payload = payload;
37014664
......@@ -3705,85 +4668,130 @@ static IrInstruction *ir_build_error_union(IrBuilder *irb, Scope *scope, AstNode
37054668 return &instruction->base;
37064669}
37074670
3708static IrInstruction *ir_build_atomic_rmw(IrBuilder *irb, Scope *scope, AstNode *source_node,
3709 IrInstruction *operand_type, IrInstruction *ptr, IrInstruction *op, IrInstruction *operand,
3710 IrInstruction *ordering, AtomicRmwOp resolved_op, AtomicOrder resolved_ordering)
4671static IrInstSrc *ir_build_atomic_rmw_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4672 IrInstSrc *operand_type, IrInstSrc *ptr, IrInstSrc *op, IrInstSrc *operand,
4673 IrInstSrc *ordering)
37114674{
3712 IrInstructionAtomicRmw *instruction = ir_build_instruction<IrInstructionAtomicRmw>(irb, scope, source_node);
4675 IrInstSrcAtomicRmw *instruction = ir_build_instruction<IrInstSrcAtomicRmw>(irb, scope, source_node);
37134676 instruction->operand_type = operand_type;
37144677 instruction->ptr = ptr;
37154678 instruction->op = op;
37164679 instruction->operand = operand;
37174680 instruction->ordering = ordering;
3718 instruction->resolved_op = resolved_op;
3719 instruction->resolved_ordering = resolved_ordering;
37204681
3721 if (operand_type != nullptr) ir_ref_instruction(operand_type, irb->current_basic_block);
4682 ir_ref_instruction(operand_type, irb->current_basic_block);
37224683 ir_ref_instruction(ptr, irb->current_basic_block);
3723 if (op != nullptr) ir_ref_instruction(op, irb->current_basic_block);
4684 ir_ref_instruction(op, irb->current_basic_block);
37244685 ir_ref_instruction(operand, irb->current_basic_block);
3725 if (ordering != nullptr) ir_ref_instruction(ordering, irb->current_basic_block);
4686 ir_ref_instruction(ordering, irb->current_basic_block);
4687
4688 return &instruction->base;
4689}
4690
4691static IrInstGen *ir_build_atomic_rmw_gen(IrAnalyze *ira, IrInst *source_instr,
4692 IrInstGen *ptr, IrInstGen *operand, AtomicRmwOp op, AtomicOrder ordering, ZigType *operand_type)
4693{
4694 IrInstGenAtomicRmw *instruction = ir_build_inst_gen<IrInstGenAtomicRmw>(&ira->new_irb, source_instr->scope, source_instr->source_node);
4695 instruction->base.value->type = operand_type;
4696 instruction->ptr = ptr;
4697 instruction->op = op;
4698 instruction->operand = operand;
4699 instruction->ordering = ordering;
4700
4701 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
4702 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
37264703
37274704 return &instruction->base;
37284705}
37294706
3730static IrInstruction *ir_build_atomic_load(IrBuilder *irb, Scope *scope, AstNode *source_node,
3731 IrInstruction *operand_type, IrInstruction *ptr,
3732 IrInstruction *ordering, AtomicOrder resolved_ordering)
4707static IrInstSrc *ir_build_atomic_load_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4708 IrInstSrc *operand_type, IrInstSrc *ptr, IrInstSrc *ordering)
37334709{
3734 IrInstructionAtomicLoad *instruction = ir_build_instruction<IrInstructionAtomicLoad>(irb, scope, source_node);
4710 IrInstSrcAtomicLoad *instruction = ir_build_instruction<IrInstSrcAtomicLoad>(irb, scope, source_node);
37354711 instruction->operand_type = operand_type;
37364712 instruction->ptr = ptr;
37374713 instruction->ordering = ordering;
3738 instruction->resolved_ordering = resolved_ordering;
37394714
3740 if (operand_type != nullptr) ir_ref_instruction(operand_type, irb->current_basic_block);
4715 ir_ref_instruction(operand_type, irb->current_basic_block);
37414716 ir_ref_instruction(ptr, irb->current_basic_block);
3742 if (ordering != nullptr) ir_ref_instruction(ordering, irb->current_basic_block);
4717 ir_ref_instruction(ordering, irb->current_basic_block);
4718
4719 return &instruction->base;
4720}
4721
4722static IrInstGen *ir_build_atomic_load_gen(IrAnalyze *ira, IrInst *source_instr,
4723 IrInstGen *ptr, AtomicOrder ordering, ZigType *operand_type)
4724{
4725 IrInstGenAtomicLoad *instruction = ir_build_inst_gen<IrInstGenAtomicLoad>(&ira->new_irb,
4726 source_instr->scope, source_instr->source_node);
4727 instruction->base.value->type = operand_type;
4728 instruction->ptr = ptr;
4729 instruction->ordering = ordering;
4730
4731 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
37434732
37444733 return &instruction->base;
37454734}
37464735
3747static IrInstruction *ir_build_atomic_store(IrBuilder *irb, Scope *scope, AstNode *source_node,
3748 IrInstruction *operand_type, IrInstruction *ptr, IrInstruction *value,
3749 IrInstruction *ordering, AtomicOrder resolved_ordering)
4736static IrInstSrc *ir_build_atomic_store_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4737 IrInstSrc *operand_type, IrInstSrc *ptr, IrInstSrc *value, IrInstSrc *ordering)
37504738{
3751 IrInstructionAtomicStore *instruction = ir_build_instruction<IrInstructionAtomicStore>(irb, scope, source_node);
4739 IrInstSrcAtomicStore *instruction = ir_build_instruction<IrInstSrcAtomicStore>(irb, scope, source_node);
37524740 instruction->operand_type = operand_type;
37534741 instruction->ptr = ptr;
37544742 instruction->value = value;
37554743 instruction->ordering = ordering;
3756 instruction->resolved_ordering = resolved_ordering;
37574744
3758 if (operand_type != nullptr) ir_ref_instruction(operand_type, irb->current_basic_block);
4745 ir_ref_instruction(operand_type, irb->current_basic_block);
37594746 ir_ref_instruction(ptr, irb->current_basic_block);
37604747 ir_ref_instruction(value, irb->current_basic_block);
3761 if (ordering != nullptr) ir_ref_instruction(ordering, irb->current_basic_block);
4748 ir_ref_instruction(ordering, irb->current_basic_block);
37624749
37634750 return &instruction->base;
37644751}
37654752
3766static IrInstruction *ir_build_save_err_ret_addr(IrBuilder *irb, Scope *scope, AstNode *source_node) {
3767 IrInstructionSaveErrRetAddr *instruction = ir_build_instruction<IrInstructionSaveErrRetAddr>(irb, scope, source_node);
4753static IrInstGen *ir_build_atomic_store_gen(IrAnalyze *ira, IrInst *source_instr,
4754 IrInstGen *ptr, IrInstGen *value, AtomicOrder ordering)
4755{
4756 IrInstGenAtomicStore *instruction = ir_build_inst_void<IrInstGenAtomicStore>(&ira->new_irb,
4757 source_instr->scope, source_instr->source_node);
4758 instruction->ptr = ptr;
4759 instruction->value = value;
4760 instruction->ordering = ordering;
4761
4762 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
4763 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
4764
37684765 return &instruction->base;
37694766}
37704767
3771static IrInstruction *ir_build_add_implicit_return_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
3772 IrInstruction *value, ResultLocReturn *result_loc_ret)
4768static IrInstSrc *ir_build_save_err_ret_addr_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
4769 IrInstSrcSaveErrRetAddr *inst = ir_build_instruction<IrInstSrcSaveErrRetAddr>(irb, scope, source_node);
4770 return &inst->base;
4771}
4772
4773static IrInstGen *ir_build_save_err_ret_addr_gen(IrAnalyze *ira, IrInst *source_instr) {
4774 IrInstGenSaveErrRetAddr *inst = ir_build_inst_void<IrInstGenSaveErrRetAddr>(&ira->new_irb,
4775 source_instr->scope, source_instr->source_node);
4776 return &inst->base;
4777}
4778
4779static IrInstSrc *ir_build_add_implicit_return_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4780 IrInstSrc *value, ResultLocReturn *result_loc_ret)
37734781{
3774 IrInstructionAddImplicitReturnType *instruction = ir_build_instruction<IrInstructionAddImplicitReturnType>(irb, scope, source_node);
3775 instruction->value = value;
3776 instruction->result_loc_ret = result_loc_ret;
4782 IrInstSrcAddImplicitReturnType *inst = ir_build_instruction<IrInstSrcAddImplicitReturnType>(irb, scope, source_node);
4783 inst->value = value;
4784 inst->result_loc_ret = result_loc_ret;
37774785
37784786 ir_ref_instruction(value, irb->current_basic_block);
37794787
3780 return &instruction->base;
4788 return &inst->base;
37814789}
37824790
3783static IrInstruction *ir_build_has_decl(IrBuilder *irb, Scope *scope, AstNode *source_node,
3784 IrInstruction *container, IrInstruction *name)
4791static IrInstSrc *ir_build_has_decl(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4792 IrInstSrc *container, IrInstSrc *name)
37854793{
3786 IrInstructionHasDecl *instruction = ir_build_instruction<IrInstructionHasDecl>(irb, scope, source_node);
4794 IrInstSrcHasDecl *instruction = ir_build_instruction<IrInstSrcHasDecl>(irb, scope, source_node);
37874795 instruction->container = container;
37884796 instruction->name = name;
37894797
......@@ -3793,17 +4801,15 @@ static IrInstruction *ir_build_has_decl(IrBuilder *irb, Scope *scope, AstNode *s
37934801 return &instruction->base;
37944802}
37954803
3796static IrInstruction *ir_build_undeclared_identifier(IrBuilder *irb, Scope *scope, AstNode *source_node,
3797 Buf *name)
3798{
3799 IrInstructionUndeclaredIdent *instruction = ir_build_instruction<IrInstructionUndeclaredIdent>(irb, scope, source_node);
4804static IrInstSrc *ir_build_undeclared_identifier(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, Buf *name) {
4805 IrInstSrcUndeclaredIdent *instruction = ir_build_instruction<IrInstSrcUndeclaredIdent>(irb, scope, source_node);
38004806 instruction->name = name;
38014807
38024808 return &instruction->base;
38034809}
38044810
3805static IrInstruction *ir_build_check_runtime_scope(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *scope_is_comptime, IrInstruction *is_comptime) {
3806 IrInstructionCheckRuntimeScope *instruction = ir_build_instruction<IrInstructionCheckRuntimeScope>(irb, scope, source_node);
4811static IrInstSrc *ir_build_check_runtime_scope(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *scope_is_comptime, IrInstSrc *is_comptime) {
4812 IrInstSrcCheckRuntimeScope *instruction = ir_build_instruction<IrInstSrcCheckRuntimeScope>(irb, scope, source_node);
38074813 instruction->scope_is_comptime = scope_is_comptime;
38084814 instruction->is_comptime = is_comptime;
38094815
......@@ -3813,10 +4819,10 @@ static IrInstruction *ir_build_check_runtime_scope(IrBuilder *irb, Scope *scope,
38134819 return &instruction->base;
38144820}
38154821
3816static IrInstruction *ir_build_union_init_named_field(IrBuilder *irb, Scope *scope, AstNode *source_node,
3817 IrInstruction *union_type, IrInstruction *field_name, IrInstruction *field_result_loc, IrInstruction *result_loc)
4822static IrInstSrc *ir_build_union_init_named_field(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4823 IrInstSrc *union_type, IrInstSrc *field_name, IrInstSrc *field_result_loc, IrInstSrc *result_loc)
38184824{
3819 IrInstructionUnionInitNamedField *instruction = ir_build_instruction<IrInstructionUnionInitNamedField>(irb, scope, source_node);
4825 IrInstSrcUnionInitNamedField *instruction = ir_build_instruction<IrInstSrcUnionInitNamedField>(irb, scope, source_node);
38204826 instruction->union_type = union_type;
38214827 instruction->field_name = field_name;
38224828 instruction->field_result_loc = field_result_loc;
......@@ -3831,79 +4837,79 @@ static IrInstruction *ir_build_union_init_named_field(IrBuilder *irb, Scope *sco
38314837}
38324838
38334839
3834static IrInstruction *ir_build_vector_to_array(IrAnalyze *ira, IrInstruction *source_instruction,
3835 ZigType *result_type, IrInstruction *vector, IrInstruction *result_loc)
4840static IrInstGen *ir_build_vector_to_array(IrAnalyze *ira, IrInst *source_instruction,
4841 ZigType *result_type, IrInstGen *vector, IrInstGen *result_loc)
38364842{
3837 IrInstructionVectorToArray *instruction = ir_build_instruction<IrInstructionVectorToArray>(&ira->new_irb,
4843 IrInstGenVectorToArray *instruction = ir_build_inst_gen<IrInstGenVectorToArray>(&ira->new_irb,
38384844 source_instruction->scope, source_instruction->source_node);
38394845 instruction->base.value->type = result_type;
38404846 instruction->vector = vector;
38414847 instruction->result_loc = result_loc;
38424848
3843 ir_ref_instruction(vector, ira->new_irb.current_basic_block);
3844 ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
4849 ir_ref_inst_gen(vector, ira->new_irb.current_basic_block);
4850 ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
38454851
38464852 return &instruction->base;
38474853}
38484854
3849static IrInstruction *ir_build_ptr_of_array_to_slice(IrAnalyze *ira, IrInstruction *source_instruction,
3850 ZigType *result_type, IrInstruction *operand, IrInstruction *result_loc)
4855static IrInstGen *ir_build_ptr_of_array_to_slice(IrAnalyze *ira, IrInst *source_instruction,
4856 ZigType *result_type, IrInstGen *operand, IrInstGen *result_loc)
38514857{
3852 IrInstructionPtrOfArrayToSlice *instruction = ir_build_instruction<IrInstructionPtrOfArrayToSlice>(&ira->new_irb,
4858 IrInstGenPtrOfArrayToSlice *instruction = ir_build_inst_gen<IrInstGenPtrOfArrayToSlice>(&ira->new_irb,
38534859 source_instruction->scope, source_instruction->source_node);
38544860 instruction->base.value->type = result_type;
38554861 instruction->operand = operand;
38564862 instruction->result_loc = result_loc;
38574863
3858 ir_ref_instruction(operand, ira->new_irb.current_basic_block);
3859 ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
4864 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
4865 ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
38604866
38614867 return &instruction->base;
38624868}
38634869
3864static IrInstruction *ir_build_array_to_vector(IrAnalyze *ira, IrInstruction *source_instruction,
3865 IrInstruction *array, ZigType *result_type)
4870static IrInstGen *ir_build_array_to_vector(IrAnalyze *ira, IrInst *source_instruction,
4871 IrInstGen *array, ZigType *result_type)
38664872{
3867 IrInstructionArrayToVector *instruction = ir_build_instruction<IrInstructionArrayToVector>(&ira->new_irb,
4873 IrInstGenArrayToVector *instruction = ir_build_inst_gen<IrInstGenArrayToVector>(&ira->new_irb,
38684874 source_instruction->scope, source_instruction->source_node);
38694875 instruction->base.value->type = result_type;
38704876 instruction->array = array;
38714877
3872 ir_ref_instruction(array, ira->new_irb.current_basic_block);
4878 ir_ref_inst_gen(array, ira->new_irb.current_basic_block);
38734879
38744880 return &instruction->base;
38754881}
38764882
3877static IrInstruction *ir_build_assert_zero(IrAnalyze *ira, IrInstruction *source_instruction,
3878 IrInstruction *target)
4883static IrInstGen *ir_build_assert_zero(IrAnalyze *ira, IrInst *source_instruction,
4884 IrInstGen *target)
38794885{
3880 IrInstructionAssertZero *instruction = ir_build_instruction<IrInstructionAssertZero>(&ira->new_irb,
4886 IrInstGenAssertZero *instruction = ir_build_inst_gen<IrInstGenAssertZero>(&ira->new_irb,
38814887 source_instruction->scope, source_instruction->source_node);
38824888 instruction->base.value->type = ira->codegen->builtin_types.entry_void;
38834889 instruction->target = target;
38844890
3885 ir_ref_instruction(target, ira->new_irb.current_basic_block);
4891 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
38864892
38874893 return &instruction->base;
38884894}
38894895
3890static IrInstruction *ir_build_assert_non_null(IrAnalyze *ira, IrInstruction *source_instruction,
3891 IrInstruction *target)
4896static IrInstGen *ir_build_assert_non_null(IrAnalyze *ira, IrInst *source_instruction,
4897 IrInstGen *target)
38924898{
3893 IrInstructionAssertNonNull *instruction = ir_build_instruction<IrInstructionAssertNonNull>(&ira->new_irb,
4899 IrInstGenAssertNonNull *instruction = ir_build_inst_gen<IrInstGenAssertNonNull>(&ira->new_irb,
38944900 source_instruction->scope, source_instruction->source_node);
38954901 instruction->base.value->type = ira->codegen->builtin_types.entry_void;
38964902 instruction->target = target;
38974903
3898 ir_ref_instruction(target, ira->new_irb.current_basic_block);
4904 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
38994905
39004906 return &instruction->base;
39014907}
39024908
3903static IrInstruction *ir_build_alloca_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
3904 IrInstruction *align, const char *name_hint, IrInstruction *is_comptime)
4909static IrInstSrc *ir_build_alloca_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4910 IrInstSrc *align, const char *name_hint, IrInstSrc *is_comptime)
39054911{
3906 IrInstructionAllocaSrc *instruction = ir_build_instruction<IrInstructionAllocaSrc>(irb, scope, source_node);
4912 IrInstSrcAlloca *instruction = ir_build_instruction<IrInstSrcAlloca>(irb, scope, source_node);
39074913 instruction->base.is_gen = true;
39084914 instruction->align = align;
39094915 instruction->name_hint = name_hint;
......@@ -3915,10 +4921,10 @@ static IrInstruction *ir_build_alloca_src(IrBuilder *irb, Scope *scope, AstNode
39154921 return &instruction->base;
39164922}
39174923
3918static IrInstructionAllocaGen *ir_build_alloca_gen(IrAnalyze *ira, IrInstruction *source_instruction,
4924static IrInstGenAlloca *ir_build_alloca_gen(IrAnalyze *ira, IrInst *source_instruction,
39194925 uint32_t align, const char *name_hint)
39204926{
3921 IrInstructionAllocaGen *instruction = ir_create_instruction<IrInstructionAllocaGen>(&ira->new_irb,
4927 IrInstGenAlloca *instruction = ir_create_inst_gen<IrInstGenAlloca>(&ira->new_irb,
39224928 source_instruction->scope, source_instruction->source_node);
39234929 instruction->align = align;
39244930 instruction->name_hint = name_hint;
......@@ -3926,10 +4932,10 @@ static IrInstructionAllocaGen *ir_build_alloca_gen(IrAnalyze *ira, IrInstruction
39264932 return instruction;
39274933}
39284934
3929static IrInstruction *ir_build_end_expr(IrBuilder *irb, Scope *scope, AstNode *source_node,
3930 IrInstruction *value, ResultLoc *result_loc)
4935static IrInstSrc *ir_build_end_expr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4936 IrInstSrc *value, ResultLoc *result_loc)
39314937{
3932 IrInstructionEndExpr *instruction = ir_build_instruction<IrInstructionEndExpr>(irb, scope, source_node);
4938 IrInstSrcEndExpr *instruction = ir_build_instruction<IrInstSrcEndExpr>(irb, scope, source_node);
39334939 instruction->base.is_gen = true;
39344940 instruction->value = value;
39354941 instruction->result_loc = result_loc;
......@@ -3939,29 +4945,41 @@ static IrInstruction *ir_build_end_expr(IrBuilder *irb, Scope *scope, AstNode *s
39394945 return &instruction->base;
39404946}
39414947
3942static IrInstructionSuspendBegin *ir_build_suspend_begin(IrBuilder *irb, Scope *scope, AstNode *source_node) {
3943 IrInstructionSuspendBegin *instruction = ir_build_instruction<IrInstructionSuspendBegin>(irb, scope, source_node);
3944 instruction->base.value->type = irb->codegen->builtin_types.entry_void;
4948static IrInstSrcSuspendBegin *ir_build_suspend_begin_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
4949 return ir_build_instruction<IrInstSrcSuspendBegin>(irb, scope, source_node);
4950}
39454951
3946 return instruction;
4952static IrInstGen *ir_build_suspend_begin_gen(IrAnalyze *ira, IrInst *source_instr) {
4953 IrInstGenSuspendBegin *inst = ir_build_inst_void<IrInstGenSuspendBegin>(&ira->new_irb,
4954 source_instr->scope, source_instr->source_node);
4955 return &inst->base;
39474956}
39484957
3949static IrInstruction *ir_build_suspend_finish(IrBuilder *irb, Scope *scope, AstNode *source_node,
3950 IrInstructionSuspendBegin *begin)
4958static IrInstSrc *ir_build_suspend_finish_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4959 IrInstSrcSuspendBegin *begin)
39514960{
3952 IrInstructionSuspendFinish *instruction = ir_build_instruction<IrInstructionSuspendFinish>(irb, scope, source_node);
3953 instruction->base.value->type = irb->codegen->builtin_types.entry_void;
3954 instruction->begin = begin;
4961 IrInstSrcSuspendFinish *inst = ir_build_instruction<IrInstSrcSuspendFinish>(irb, scope, source_node);
4962 inst->begin = begin;
39554963
39564964 ir_ref_instruction(&begin->base, irb->current_basic_block);
39574965
3958 return &instruction->base;
4966 return &inst->base;
4967}
4968
4969static IrInstGen *ir_build_suspend_finish_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGenSuspendBegin *begin) {
4970 IrInstGenSuspendFinish *inst = ir_build_inst_void<IrInstGenSuspendFinish>(&ira->new_irb,
4971 source_instr->scope, source_instr->source_node);
4972 inst->begin = begin;
4973
4974 ir_ref_inst_gen(&begin->base, ira->new_irb.current_basic_block);
4975
4976 return &inst->base;
39594977}
39604978
3961static IrInstruction *ir_build_await_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
3962 IrInstruction *frame, ResultLoc *result_loc)
4979static IrInstSrc *ir_build_await_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4980 IrInstSrc *frame, ResultLoc *result_loc)
39634981{
3964 IrInstructionAwaitSrc *instruction = ir_build_instruction<IrInstructionAwaitSrc>(irb, scope, source_node);
4982 IrInstSrcAwait *instruction = ir_build_instruction<IrInstSrcAwait>(irb, scope, source_node);
39654983 instruction->frame = frame;
39664984 instruction->result_loc = result_loc;
39674985
......@@ -3970,24 +4988,23 @@ static IrInstruction *ir_build_await_src(IrBuilder *irb, Scope *scope, AstNode *
39704988 return &instruction->base;
39714989}
39724990
3973static IrInstructionAwaitGen *ir_build_await_gen(IrAnalyze *ira, IrInstruction *source_instruction,
3974 IrInstruction *frame, ZigType *result_type, IrInstruction *result_loc)
4991static IrInstGenAwait *ir_build_await_gen(IrAnalyze *ira, IrInst *source_instruction,
4992 IrInstGen *frame, ZigType *result_type, IrInstGen *result_loc)
39754993{
3976 IrInstructionAwaitGen *instruction = ir_build_instruction<IrInstructionAwaitGen>(&ira->new_irb,
4994 IrInstGenAwait *instruction = ir_build_inst_gen<IrInstGenAwait>(&ira->new_irb,
39774995 source_instruction->scope, source_instruction->source_node);
39784996 instruction->base.value->type = result_type;
39794997 instruction->frame = frame;
39804998 instruction->result_loc = result_loc;
39814999
3982 ir_ref_instruction(frame, ira->new_irb.current_basic_block);
3983 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
5000 ir_ref_inst_gen(frame, ira->new_irb.current_basic_block);
5001 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
39845002
39855003 return instruction;
39865004}
39875005
3988static IrInstruction *ir_build_resume(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *frame) {
3989 IrInstructionResume *instruction = ir_build_instruction<IrInstructionResume>(irb, scope, source_node);
3990 instruction->base.value->type = irb->codegen->builtin_types.entry_void;
5006static IrInstSrc *ir_build_resume_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *frame) {
5007 IrInstSrcResume *instruction = ir_build_instruction<IrInstSrcResume>(irb, scope, source_node);
39915008 instruction->frame = frame;
39925009
39935010 ir_ref_instruction(frame, irb->current_basic_block);
......@@ -3995,12 +5012,20 @@ static IrInstruction *ir_build_resume(IrBuilder *irb, Scope *scope, AstNode *sou
39955012 return &instruction->base;
39965013}
39975014
3998static IrInstructionSpillBegin *ir_build_spill_begin(IrBuilder *irb, Scope *scope, AstNode *source_node,
3999 IrInstruction *operand, SpillId spill_id)
5015static IrInstGen *ir_build_resume_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *frame) {
5016 IrInstGenResume *instruction = ir_build_inst_void<IrInstGenResume>(&ira->new_irb,
5017 source_instr->scope, source_instr->source_node);
5018 instruction->frame = frame;
5019
5020 ir_ref_inst_gen(frame, ira->new_irb.current_basic_block);
5021
5022 return &instruction->base;
5023}
5024
5025static IrInstSrcSpillBegin *ir_build_spill_begin_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
5026 IrInstSrc *operand, SpillId spill_id)
40005027{
4001 IrInstructionSpillBegin *instruction = ir_build_instruction<IrInstructionSpillBegin>(irb, scope, source_node);
4002 instruction->base.value->special = ConstValSpecialStatic;
4003 instruction->base.value->type = irb->codegen->builtin_types.entry_void;
5028 IrInstSrcSpillBegin *instruction = ir_build_instruction<IrInstSrcSpillBegin>(irb, scope, source_node);
40045029 instruction->operand = operand;
40055030 instruction->spill_id = spill_id;
40065031
......@@ -4009,10 +5034,23 @@ static IrInstructionSpillBegin *ir_build_spill_begin(IrBuilder *irb, Scope *scop
40095034 return instruction;
40105035}
40115036
4012static IrInstruction *ir_build_spill_end(IrBuilder *irb, Scope *scope, AstNode *source_node,
4013 IrInstructionSpillBegin *begin)
5037static IrInstGen *ir_build_spill_begin_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *operand,
5038 SpillId spill_id)
5039{
5040 IrInstGenSpillBegin *instruction = ir_build_inst_void<IrInstGenSpillBegin>(&ira->new_irb,
5041 source_instr->scope, source_instr->source_node);
5042 instruction->operand = operand;
5043 instruction->spill_id = spill_id;
5044
5045 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
5046
5047 return &instruction->base;
5048}
5049
5050static IrInstSrc *ir_build_spill_end_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
5051 IrInstSrcSpillBegin *begin)
40145052{
4015 IrInstructionSpillEnd *instruction = ir_build_instruction<IrInstructionSpillEnd>(irb, scope, source_node);
5053 IrInstSrcSpillEnd *instruction = ir_build_instruction<IrInstSrcSpillEnd>(irb, scope, source_node);
40165054 instruction->begin = begin;
40175055
40185056 ir_ref_instruction(&begin->base, irb->current_basic_block);
......@@ -4020,22 +5058,35 @@ static IrInstruction *ir_build_spill_end(IrBuilder *irb, Scope *scope, AstNode *
40205058 return &instruction->base;
40215059}
40225060
4023static IrInstruction *ir_build_vector_extract_elem(IrAnalyze *ira, IrInstruction *source_instruction,
4024 IrInstruction *vector, IrInstruction *index)
5061static IrInstGen *ir_build_spill_end_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGenSpillBegin *begin,
5062 ZigType *result_type)
5063{
5064 IrInstGenSpillEnd *instruction = ir_build_inst_gen<IrInstGenSpillEnd>(&ira->new_irb,
5065 source_instr->scope, source_instr->source_node);
5066 instruction->base.value->type = result_type;
5067 instruction->begin = begin;
5068
5069 ir_ref_inst_gen(&begin->base, ira->new_irb.current_basic_block);
5070
5071 return &instruction->base;
5072}
5073
5074static IrInstGen *ir_build_vector_extract_elem(IrAnalyze *ira, IrInst *source_instruction,
5075 IrInstGen *vector, IrInstGen *index)
40255076{
4026 IrInstructionVectorExtractElem *instruction = ir_build_instruction<IrInstructionVectorExtractElem>(
5077 IrInstGenVectorExtractElem *instruction = ir_build_inst_gen<IrInstGenVectorExtractElem>(
40275078 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
40285079 instruction->base.value->type = vector->value->type->data.vector.elem_type;
40295080 instruction->vector = vector;
40305081 instruction->index = index;
40315082
4032 ir_ref_instruction(vector, ira->new_irb.current_basic_block);
4033 ir_ref_instruction(index, ira->new_irb.current_basic_block);
5083 ir_ref_inst_gen(vector, ira->new_irb.current_basic_block);
5084 ir_ref_inst_gen(index, ira->new_irb.current_basic_block);
40345085
40355086 return &instruction->base;
40365087}
40375088
4038static void ir_count_defers(IrBuilder *irb, Scope *inner_scope, Scope *outer_scope, size_t *results) {
5089static void ir_count_defers(IrBuilderSrc *irb, Scope *inner_scope, Scope *outer_scope, size_t *results) {
40395090 results[ReturnKindUnconditional] = 0;
40405091 results[ReturnKindError] = 0;
40415092
......@@ -4072,12 +5123,12 @@ static void ir_count_defers(IrBuilder *irb, Scope *inner_scope, Scope *outer_sco
40725123 }
40735124}
40745125
4075static IrInstruction *ir_mark_gen(IrInstruction *instruction) {
5126static IrInstSrc *ir_mark_gen(IrInstSrc *instruction) {
40765127 instruction->is_gen = true;
40775128 return instruction;
40785129}
40795130
4080static bool ir_gen_defers_for_block(IrBuilder *irb, Scope *inner_scope, Scope *outer_scope, bool gen_error_defers) {
5131static bool ir_gen_defers_for_block(IrBuilderSrc *irb, Scope *inner_scope, Scope *outer_scope, bool gen_error_defers) {
40815132 Scope *scope = inner_scope;
40825133 bool is_noreturn = false;
40835134 while (scope != outer_scope) {
......@@ -4094,11 +5145,9 @@ static bool ir_gen_defers_for_block(IrBuilder *irb, Scope *inner_scope, Scope *o
40945145 {
40955146 AstNode *defer_expr_node = defer_node->data.defer.expr;
40965147 Scope *defer_expr_scope = defer_node->data.defer.expr_scope;
4097 IrInstruction *defer_expr_value = ir_gen_node(irb, defer_expr_node, defer_expr_scope);
4098 if (defer_expr_value != irb->codegen->invalid_instruction) {
4099 if (defer_expr_value->value->type != nullptr &&
4100 defer_expr_value->value->type->id == ZigTypeIdUnreachable)
4101 {
5148 IrInstSrc *defer_expr_value = ir_gen_node(irb, defer_expr_node, defer_expr_scope);
5149 if (defer_expr_value != irb->codegen->invalid_inst_src) {
5150 if (defer_expr_value->is_noreturn) {
41025151 is_noreturn = true;
41035152 } else {
41045153 ir_mark_gen(ir_build_check_statement_is_void(irb, defer_expr_scope, defer_expr_node,
......@@ -4130,13 +5179,17 @@ static bool ir_gen_defers_for_block(IrBuilder *irb, Scope *inner_scope, Scope *o
41305179 return is_noreturn;
41315180}
41325181
4133static void ir_set_cursor_at_end(IrBuilder *irb, IrBasicBlock *basic_block) {
5182static void ir_set_cursor_at_end_gen(IrBuilderGen *irb, IrBasicBlockGen *basic_block) {
41345183 assert(basic_block);
5184 irb->current_basic_block = basic_block;
5185}
41355186
5187static void ir_set_cursor_at_end(IrBuilderSrc *irb, IrBasicBlockSrc *basic_block) {
5188 assert(basic_block);
41365189 irb->current_basic_block = basic_block;
41375190}
41385191
4139static void ir_set_cursor_at_end_and_append_block(IrBuilder *irb, IrBasicBlock *basic_block) {
5192static void ir_set_cursor_at_end_and_append_block(IrBuilderSrc *irb, IrBasicBlockSrc *basic_block) {
41405193 basic_block->index = irb->exec->basic_block_list.length;
41415194 irb->exec->basic_block_list.append(basic_block);
41425195 ir_set_cursor_at_end(irb, basic_block);
......@@ -4166,22 +5219,16 @@ static ScopeDeferExpr *get_scope_defer_expr(Scope *scope) {
41665219 return nullptr;
41675220}
41685221
4169static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
5222static IrInstSrc *ir_gen_return(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
41705223 assert(node->type == NodeTypeReturnExpr);
41715224
4172 ZigFn *fn_entry = exec_fn_entry(irb->exec);
4173 if (!fn_entry) {
4174 add_node_error(irb->codegen, node, buf_sprintf("return expression outside function definition"));
4175 return irb->codegen->invalid_instruction;
4176 }
4177
41785225 ScopeDeferExpr *scope_defer_expr = get_scope_defer_expr(scope);
41795226 if (scope_defer_expr) {
41805227 if (!scope_defer_expr->reported_err) {
41815228 add_node_error(irb->codegen, node, buf_sprintf("cannot return from defer expression"));
41825229 scope_defer_expr->reported_err = true;
41835230 }
4184 return irb->codegen->invalid_instruction;
5231 return irb->codegen->invalid_inst_src;
41855232 }
41865233
41875234 Scope *outer_scope = irb->exec->begin_scope;
......@@ -4194,15 +5241,15 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
41945241 result_loc_ret->base.id = ResultLocIdReturn;
41955242 ir_build_reset_result(irb, scope, node, &result_loc_ret->base);
41965243
4197 IrInstruction *return_value;
5244 IrInstSrc *return_value;
41985245 if (expr_node) {
41995246 // Temporarily set this so that if we return a type it gets the name of the function
42005247 ZigFn *prev_name_fn = irb->exec->name_fn;
42015248 irb->exec->name_fn = exec_fn_entry(irb->exec);
42025249 return_value = ir_gen_node_extra(irb, expr_node, scope, LValNone, &result_loc_ret->base);
42035250 irb->exec->name_fn = prev_name_fn;
4204 if (return_value == irb->codegen->invalid_instruction)
4205 return irb->codegen->invalid_instruction;
5251 if (return_value == irb->codegen->invalid_inst_src)
5252 return irb->codegen->invalid_inst_src;
42065253 } else {
42075254 return_value = ir_build_const_void(irb, scope, node);
42085255 }
......@@ -4215,22 +5262,22 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
42155262 if (!have_err_defers && !irb->codegen->have_err_ret_tracing) {
42165263 // only generate unconditional defers
42175264 ir_gen_defers_for_block(irb, scope, outer_scope, false);
4218 IrInstruction *result = ir_build_return(irb, scope, node, return_value);
5265 IrInstSrc *result = ir_build_return_src(irb, scope, node, return_value);
42195266 result_loc_ret->base.source_instruction = result;
42205267 return result;
42215268 }
42225269 bool should_inline = ir_should_inline(irb->exec, scope);
42235270
4224 IrBasicBlock *err_block = ir_create_basic_block(irb, scope, "ErrRetErr");
4225 IrBasicBlock *ok_block = ir_create_basic_block(irb, scope, "ErrRetOk");
5271 IrBasicBlockSrc *err_block = ir_create_basic_block(irb, scope, "ErrRetErr");
5272 IrBasicBlockSrc *ok_block = ir_create_basic_block(irb, scope, "ErrRetOk");
42265273
42275274 if (!have_err_defers) {
42285275 ir_gen_defers_for_block(irb, scope, outer_scope, false);
42295276 }
42305277
4231 IrInstruction *is_err = ir_build_test_err_src(irb, scope, node, return_value, false, true);
5278 IrInstSrc *is_err = ir_build_test_err_src(irb, scope, node, return_value, false, true);
42325279
4233 IrInstruction *is_comptime;
5280 IrInstSrc *is_comptime;
42345281 if (should_inline) {
42355282 is_comptime = ir_build_const_bool(irb, scope, node, should_inline);
42365283 } else {
......@@ -4238,14 +5285,14 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
42385285 }
42395286
42405287 ir_mark_gen(ir_build_cond_br(irb, scope, node, is_err, err_block, ok_block, is_comptime));
4241 IrBasicBlock *ret_stmt_block = ir_create_basic_block(irb, scope, "RetStmt");
5288 IrBasicBlockSrc *ret_stmt_block = ir_create_basic_block(irb, scope, "RetStmt");
42425289
42435290 ir_set_cursor_at_end_and_append_block(irb, err_block);
42445291 if (have_err_defers) {
42455292 ir_gen_defers_for_block(irb, scope, outer_scope, true);
42465293 }
42475294 if (irb->codegen->have_err_ret_tracing && !should_inline) {
4248 ir_build_save_err_ret_addr(irb, scope, node);
5295 ir_build_save_err_ret_addr_src(irb, scope, node);
42495296 }
42505297 ir_build_br(irb, scope, node, ret_stmt_block, is_comptime);
42515298
......@@ -4256,21 +5303,21 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
42565303 ir_build_br(irb, scope, node, ret_stmt_block, is_comptime);
42575304
42585305 ir_set_cursor_at_end_and_append_block(irb, ret_stmt_block);
4259 IrInstruction *result = ir_build_return(irb, scope, node, return_value);
5306 IrInstSrc *result = ir_build_return_src(irb, scope, node, return_value);
42605307 result_loc_ret->base.source_instruction = result;
42615308 return result;
42625309 }
42635310 case ReturnKindError:
42645311 {
42655312 assert(expr_node);
4266 IrInstruction *err_union_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
4267 if (err_union_ptr == irb->codegen->invalid_instruction)
4268 return irb->codegen->invalid_instruction;
4269 IrInstruction *is_err_val = ir_build_test_err_src(irb, scope, node, err_union_ptr, true, false);
4270
4271 IrBasicBlock *return_block = ir_create_basic_block(irb, scope, "ErrRetReturn");
4272 IrBasicBlock *continue_block = ir_create_basic_block(irb, scope, "ErrRetContinue");
4273 IrInstruction *is_comptime;
5313 IrInstSrc *err_union_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
5314 if (err_union_ptr == irb->codegen->invalid_inst_src)
5315 return irb->codegen->invalid_inst_src;
5316 IrInstSrc *is_err_val = ir_build_test_err_src(irb, scope, node, err_union_ptr, true, false);
5317
5318 IrBasicBlockSrc *return_block = ir_create_basic_block(irb, scope, "ErrRetReturn");
5319 IrBasicBlockSrc *continue_block = ir_create_basic_block(irb, scope, "ErrRetContinue");
5320 IrInstSrc *is_comptime;
42745321 bool should_inline = ir_should_inline(irb->exec, scope);
42755322 if (should_inline) {
42765323 is_comptime = ir_build_const_bool(irb, scope, node, true);
......@@ -4280,10 +5327,10 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
42805327 ir_mark_gen(ir_build_cond_br(irb, scope, node, is_err_val, return_block, continue_block, is_comptime));
42815328
42825329 ir_set_cursor_at_end_and_append_block(irb, return_block);
4283 IrInstruction *err_val_ptr = ir_build_unwrap_err_code(irb, scope, node, err_union_ptr);
4284 IrInstruction *err_val = ir_build_load_ptr(irb, scope, node, err_val_ptr);
5330 IrInstSrc *err_val_ptr = ir_build_unwrap_err_code_src(irb, scope, node, err_union_ptr);
5331 IrInstSrc *err_val = ir_build_load_ptr(irb, scope, node, err_val_ptr);
42855332 ir_mark_gen(ir_build_add_implicit_return_type(irb, scope, node, err_val, nullptr));
4286 IrInstructionSpillBegin *spill_begin = ir_build_spill_begin(irb, scope, node, err_val,
5333 IrInstSrcSpillBegin *spill_begin = ir_build_spill_begin_src(irb, scope, node, err_val,
42875334 SpillIdRetErrCode);
42885335 ResultLocReturn *result_loc_ret = allocate<ResultLocReturn>(1, "ResultLocReturn");
42895336 result_loc_ret->base.id = ResultLocIdReturn;
......@@ -4291,15 +5338,15 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
42915338 ir_build_end_expr(irb, scope, node, err_val, &result_loc_ret->base);
42925339 if (!ir_gen_defers_for_block(irb, scope, outer_scope, true)) {
42935340 if (irb->codegen->have_err_ret_tracing && !should_inline) {
4294 ir_build_save_err_ret_addr(irb, scope, node);
5341 ir_build_save_err_ret_addr_src(irb, scope, node);
42955342 }
4296 err_val = ir_build_spill_end(irb, scope, node, spill_begin);
4297 IrInstruction *ret_inst = ir_build_return(irb, scope, node, err_val);
5343 err_val = ir_build_spill_end_src(irb, scope, node, spill_begin);
5344 IrInstSrc *ret_inst = ir_build_return_src(irb, scope, node, err_val);
42985345 result_loc_ret->base.source_instruction = ret_inst;
42995346 }
43005347
43015348 ir_set_cursor_at_end_and_append_block(irb, continue_block);
4302 IrInstruction *unwrapped_ptr = ir_build_unwrap_err_payload(irb, scope, node, err_union_ptr, false, false);
5349 IrInstSrc *unwrapped_ptr = ir_build_unwrap_err_payload_src(irb, scope, node, err_union_ptr, false, false);
43035350 if (lval == LValPtr)
43045351 return unwrapped_ptr;
43055352 else
......@@ -4310,19 +5357,18 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
43105357}
43115358
43125359static ZigVar *create_local_var(CodeGen *codegen, AstNode *node, Scope *parent_scope,
4313 Buf *name, bool src_is_const, bool gen_is_const, bool is_shadowable, IrInstruction *is_comptime,
5360 Buf *name, bool src_is_const, bool gen_is_const, bool is_shadowable, IrInstSrc *is_comptime,
43145361 bool skip_name_check)
43155362{
43165363 ZigVar *variable_entry = allocate<ZigVar>(1, "ZigVar");
43175364 variable_entry->parent_scope = parent_scope;
43185365 variable_entry->shadowable = is_shadowable;
4319 variable_entry->mem_slot_index = SIZE_MAX;
43205366 variable_entry->is_comptime = is_comptime;
43215367 variable_entry->src_arg_index = SIZE_MAX;
43225368 variable_entry->const_value = create_const_vals(1);
43235369
43245370 if (is_comptime != nullptr) {
4325 is_comptime->ref_count += 1;
5371 is_comptime->base.ref_count += 1;
43265372 }
43275373
43285374 if (name) {
......@@ -4372,15 +5418,14 @@ static ZigVar *create_local_var(CodeGen *codegen, AstNode *node, Scope *parent_s
43725418
43735419// Set name to nullptr to make the variable anonymous (not visible to programmer).
43745420// After you call this function var->child_scope has the variable in scope
4375static ZigVar *ir_create_var(IrBuilder *irb, AstNode *node, Scope *scope, Buf *name,
4376 bool src_is_const, bool gen_is_const, bool is_shadowable, IrInstruction *is_comptime)
5421static ZigVar *ir_create_var(IrBuilderSrc *irb, AstNode *node, Scope *scope, Buf *name,
5422 bool src_is_const, bool gen_is_const, bool is_shadowable, IrInstSrc *is_comptime)
43775423{
43785424 bool is_underscored = name ? buf_eql_str(name, "_") : false;
43795425 ZigVar *var = create_local_var(irb->codegen, node, scope,
43805426 (is_underscored ? nullptr : name), src_is_const, gen_is_const,
43815427 (is_underscored ? true : is_shadowable), is_comptime, false);
43825428 if (is_comptime != nullptr || gen_is_const) {
4383 var->mem_slot_index = exec_next_mem_slot(irb->exec);
43845429 var->owner_exec = irb->exec;
43855430 }
43865431 assert(var->child_scope);
......@@ -4396,13 +5441,13 @@ static ResultLocPeer *create_peer_result(ResultLocPeerParent *peer_parent) {
43965441 return result;
43975442}
43985443
4399static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode *block_node, LVal lval,
5444static IrInstSrc *ir_gen_block(IrBuilderSrc *irb, Scope *parent_scope, AstNode *block_node, LVal lval,
44005445 ResultLoc *result_loc)
44015446{
44025447 assert(block_node->type == NodeTypeBlock);
44035448
4404 ZigList<IrInstruction *> incoming_values = {0};
4405 ZigList<IrBasicBlock *> incoming_blocks = {0};
5449 ZigList<IrInstSrc *> incoming_values = {0};
5450 ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
44065451
44075452 ScopeBlock *scope_block = create_block_scope(irb->codegen, block_node, parent_scope);
44085453
......@@ -4438,11 +5483,11 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode
44385483 }
44395484
44405485 bool is_continuation_unreachable = false;
4441 IrInstruction *noreturn_return_value = nullptr;
5486 IrInstSrc *noreturn_return_value = nullptr;
44425487 for (size_t i = 0; i < block_node->data.block.statements.length; i += 1) {
44435488 AstNode *statement_node = block_node->data.block.statements.at(i);
44445489
4445 IrInstruction *statement_value = ir_gen_node(irb, statement_node, child_scope);
5490 IrInstSrc *statement_value = ir_gen_node(irb, statement_node, child_scope);
44465491 is_continuation_unreachable = instr_is_unreachable(statement_value);
44475492 if (is_continuation_unreachable) {
44485493 // keep the last noreturn statement value around in case we need to return it
......@@ -4450,15 +5495,15 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode
44505495 }
44515496 // This logic must be kept in sync with
44525497 // [STMT_EXPR_TEST_THING] <--- (search this token)
4453 if (statement_node->type == NodeTypeDefer && statement_value != irb->codegen->invalid_instruction) {
5498 if (statement_node->type == NodeTypeDefer && statement_value != irb->codegen->invalid_inst_src) {
44545499 // defer starts a new scope
44555500 child_scope = statement_node->data.defer.child_scope;
44565501 assert(child_scope);
4457 } else if (statement_value->id == IrInstructionIdDeclVarSrc) {
5502 } else if (statement_value->id == IrInstSrcIdDeclVar) {
44585503 // variable declarations start a new scope
4459 IrInstructionDeclVarSrc *decl_var_instruction = (IrInstructionDeclVarSrc *)statement_value;
5504 IrInstSrcDeclVar *decl_var_instruction = (IrInstSrcDeclVar *)statement_value;
44605505 child_scope = decl_var_instruction->var->child_scope;
4461 } else if (statement_value != irb->codegen->invalid_instruction && !is_continuation_unreachable) {
5506 } else if (statement_value != irb->codegen->invalid_inst_src && !is_continuation_unreachable) {
44625507 // this statement's value must be void
44635508 ir_mark_gen(ir_build_check_statement_is_void(irb, child_scope, statement_node, statement_value));
44645509 }
......@@ -4474,12 +5519,12 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode
44745519 scope_block->peer_parent->peers.last()->next_bb = scope_block->end_block;
44755520 }
44765521 ir_set_cursor_at_end_and_append_block(irb, scope_block->end_block);
4477 IrInstruction *phi = ir_build_phi(irb, parent_scope, block_node, incoming_blocks.length,
5522 IrInstSrc *phi = ir_build_phi(irb, parent_scope, block_node, incoming_blocks.length,
44785523 incoming_blocks.items, incoming_values.items, scope_block->peer_parent);
44795524 return ir_expr_wrap(irb, parent_scope, phi, result_loc);
44805525 } else {
44815526 incoming_blocks.append(irb->current_basic_block);
4482 IrInstruction *else_expr_result = ir_mark_gen(ir_build_const_void(irb, parent_scope, block_node));
5527 IrInstSrc *else_expr_result = ir_mark_gen(ir_build_const_void(irb, parent_scope, block_node));
44835528
44845529 if (scope_block->peer_parent != nullptr) {
44855530 ResultLocPeer *peer_result = create_peer_result(scope_block->peer_parent);
......@@ -4499,15 +5544,15 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode
44995544 ir_gen_defers_for_block(irb, child_scope, outer_block_scope, false);
45005545 }
45015546
4502 IrInstruction *result;
5547 IrInstSrc *result;
45035548 if (block_node->data.block.name != nullptr) {
45045549 ir_mark_gen(ir_build_br(irb, parent_scope, block_node, scope_block->end_block, scope_block->is_comptime));
45055550 ir_set_cursor_at_end_and_append_block(irb, scope_block->end_block);
4506 IrInstruction *phi = ir_build_phi(irb, parent_scope, block_node, incoming_blocks.length,
5551 IrInstSrc *phi = ir_build_phi(irb, parent_scope, block_node, incoming_blocks.length,
45075552 incoming_blocks.items, incoming_values.items, scope_block->peer_parent);
45085553 result = ir_expr_wrap(irb, parent_scope, phi, result_loc);
45095554 } else {
4510 IrInstruction *void_inst = ir_mark_gen(ir_build_const_void(irb, child_scope, block_node));
5555 IrInstSrc *void_inst = ir_mark_gen(ir_build_const_void(irb, child_scope, block_node));
45115556 result = ir_lval_wrap(irb, parent_scope, void_inst, lval, result_loc);
45125557 }
45135558 if (!is_return_from_fn)
......@@ -4517,31 +5562,35 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode
45175562 // only generate unconditional defers
45185563
45195564 ir_mark_gen(ir_build_add_implicit_return_type(irb, child_scope, block_node, result, nullptr));
5565 ResultLocReturn *result_loc_ret = allocate<ResultLocReturn>(1, "ResultLocReturn");
5566 result_loc_ret->base.id = ResultLocIdReturn;
5567 ir_build_reset_result(irb, parent_scope, block_node, &result_loc_ret->base);
5568 ir_mark_gen(ir_build_end_expr(irb, parent_scope, block_node, result, &result_loc_ret->base));
45205569 ir_gen_defers_for_block(irb, child_scope, outer_block_scope, false);
4521 return ir_mark_gen(ir_build_return(irb, child_scope, result->source_node, result));
5570 return ir_mark_gen(ir_build_return_src(irb, child_scope, result->base.source_node, result));
45225571}
45235572
4524static IrInstruction *ir_gen_bin_op_id(IrBuilder *irb, Scope *scope, AstNode *node, IrBinOp op_id) {
5573static IrInstSrc *ir_gen_bin_op_id(IrBuilderSrc *irb, Scope *scope, AstNode *node, IrBinOp op_id) {
45255574 Scope *inner_scope = scope;
45265575 if (op_id == IrBinOpArrayCat || op_id == IrBinOpArrayMult) {
45275576 inner_scope = create_comptime_scope(irb->codegen, node, scope);
45285577 }
45295578
4530 IrInstruction *op1 = ir_gen_node(irb, node->data.bin_op_expr.op1, inner_scope);
4531 IrInstruction *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, inner_scope);
5579 IrInstSrc *op1 = ir_gen_node(irb, node->data.bin_op_expr.op1, inner_scope);
5580 IrInstSrc *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, inner_scope);
45325581
4533 if (op1 == irb->codegen->invalid_instruction || op2 == irb->codegen->invalid_instruction)
4534 return irb->codegen->invalid_instruction;
5582 if (op1 == irb->codegen->invalid_inst_src || op2 == irb->codegen->invalid_inst_src)
5583 return irb->codegen->invalid_inst_src;
45355584
45365585 return ir_build_bin_op(irb, scope, node, op_id, op1, op2, true);
45375586}
45385587
4539static IrInstruction *ir_gen_merge_err_sets(IrBuilder *irb, Scope *scope, AstNode *node) {
4540 IrInstruction *op1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);
4541 IrInstruction *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
5588static IrInstSrc *ir_gen_merge_err_sets(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
5589 IrInstSrc *op1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);
5590 IrInstSrc *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
45425591
4543 if (op1 == irb->codegen->invalid_instruction || op2 == irb->codegen->invalid_instruction)
4544 return irb->codegen->invalid_instruction;
5592 if (op1 == irb->codegen->invalid_inst_src || op2 == irb->codegen->invalid_inst_src)
5593 return irb->codegen->invalid_inst_src;
45455594
45465595 // TODO only pass type_name when the || operator is the top level AST node in the var decl expr
45475596 Buf bare_name = BUF_INIT;
......@@ -4550,10 +5599,10 @@ static IrInstruction *ir_gen_merge_err_sets(IrBuilder *irb, Scope *scope, AstNod
45505599 return ir_build_merge_err_sets(irb, scope, node, op1, op2, type_name);
45515600}
45525601
4553static IrInstruction *ir_gen_assign(IrBuilder *irb, Scope *scope, AstNode *node) {
4554 IrInstruction *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);
4555 if (lvalue == irb->codegen->invalid_instruction)
4556 return irb->codegen->invalid_instruction;
5602static IrInstSrc *ir_gen_assign(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
5603 IrInstSrc *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);
5604 if (lvalue == irb->codegen->invalid_inst_src)
5605 return irb->codegen->invalid_inst_src;
45575606
45585607 ResultLocInstruction *result_loc_inst = allocate<ResultLocInstruction>(1, "ResultLocInstruction");
45595608 result_loc_inst->base.id = ResultLocIdInstruction;
......@@ -4561,49 +5610,49 @@ static IrInstruction *ir_gen_assign(IrBuilder *irb, Scope *scope, AstNode *node)
45615610 ir_ref_instruction(lvalue, irb->current_basic_block);
45625611 ir_build_reset_result(irb, scope, node, &result_loc_inst->base);
45635612
4564 IrInstruction *rvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op2, scope, LValNone,
5613 IrInstSrc *rvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op2, scope, LValNone,
45655614 &result_loc_inst->base);
4566 if (rvalue == irb->codegen->invalid_instruction)
4567 return irb->codegen->invalid_instruction;
5615 if (rvalue == irb->codegen->invalid_inst_src)
5616 return irb->codegen->invalid_inst_src;
45685617
45695618 return ir_build_const_void(irb, scope, node);
45705619}
45715620
4572static IrInstruction *ir_gen_assign_merge_err_sets(IrBuilder *irb, Scope *scope, AstNode *node) {
4573 IrInstruction *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);
4574 if (lvalue == irb->codegen->invalid_instruction)
5621static IrInstSrc *ir_gen_assign_merge_err_sets(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
5622 IrInstSrc *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);
5623 if (lvalue == irb->codegen->invalid_inst_src)
45755624 return lvalue;
4576 IrInstruction *op1 = ir_build_load_ptr(irb, scope, node->data.bin_op_expr.op1, lvalue);
4577 IrInstruction *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
4578 if (op2 == irb->codegen->invalid_instruction)
5625 IrInstSrc *op1 = ir_build_load_ptr(irb, scope, node->data.bin_op_expr.op1, lvalue);
5626 IrInstSrc *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
5627 if (op2 == irb->codegen->invalid_inst_src)
45795628 return op2;
4580 IrInstruction *result = ir_build_merge_err_sets(irb, scope, node, op1, op2, nullptr);
5629 IrInstSrc *result = ir_build_merge_err_sets(irb, scope, node, op1, op2, nullptr);
45815630 ir_build_store_ptr(irb, scope, node, lvalue, result);
45825631 return ir_build_const_void(irb, scope, node);
45835632}
45845633
4585static IrInstruction *ir_gen_assign_op(IrBuilder *irb, Scope *scope, AstNode *node, IrBinOp op_id) {
4586 IrInstruction *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);
4587 if (lvalue == irb->codegen->invalid_instruction)
5634static IrInstSrc *ir_gen_assign_op(IrBuilderSrc *irb, Scope *scope, AstNode *node, IrBinOp op_id) {
5635 IrInstSrc *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);
5636 if (lvalue == irb->codegen->invalid_inst_src)
45885637 return lvalue;
4589 IrInstruction *op1 = ir_build_load_ptr(irb, scope, node->data.bin_op_expr.op1, lvalue);
4590 IrInstruction *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
4591 if (op2 == irb->codegen->invalid_instruction)
5638 IrInstSrc *op1 = ir_build_load_ptr(irb, scope, node->data.bin_op_expr.op1, lvalue);
5639 IrInstSrc *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
5640 if (op2 == irb->codegen->invalid_inst_src)
45925641 return op2;
4593 IrInstruction *result = ir_build_bin_op(irb, scope, node, op_id, op1, op2, true);
5642 IrInstSrc *result = ir_build_bin_op(irb, scope, node, op_id, op1, op2, true);
45945643 ir_build_store_ptr(irb, scope, node, lvalue, result);
45955644 return ir_build_const_void(irb, scope, node);
45965645}
45975646
4598static IrInstruction *ir_gen_bool_or(IrBuilder *irb, Scope *scope, AstNode *node) {
5647static IrInstSrc *ir_gen_bool_or(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
45995648 assert(node->type == NodeTypeBinOpExpr);
46005649
4601 IrInstruction *val1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);
4602 if (val1 == irb->codegen->invalid_instruction)
4603 return irb->codegen->invalid_instruction;
4604 IrBasicBlock *post_val1_block = irb->current_basic_block;
5650 IrInstSrc *val1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);
5651 if (val1 == irb->codegen->invalid_inst_src)
5652 return irb->codegen->invalid_inst_src;
5653 IrBasicBlockSrc *post_val1_block = irb->current_basic_block;
46055654
4606 IrInstruction *is_comptime;
5655 IrInstSrc *is_comptime;
46075656 if (ir_should_inline(irb->exec, scope)) {
46085657 is_comptime = ir_build_const_bool(irb, scope, node, true);
46095658 } else {
......@@ -4611,41 +5660,41 @@ static IrInstruction *ir_gen_bool_or(IrBuilder *irb, Scope *scope, AstNode *node
46115660 }
46125661
46135662 // block for when val1 == false
4614 IrBasicBlock *false_block = ir_create_basic_block(irb, scope, "BoolOrFalse");
5663 IrBasicBlockSrc *false_block = ir_create_basic_block(irb, scope, "BoolOrFalse");
46155664 // block for when val1 == true (don't even evaluate the second part)
4616 IrBasicBlock *true_block = ir_create_basic_block(irb, scope, "BoolOrTrue");
5665 IrBasicBlockSrc *true_block = ir_create_basic_block(irb, scope, "BoolOrTrue");
46175666
46185667 ir_build_cond_br(irb, scope, node, val1, true_block, false_block, is_comptime);
46195668
46205669 ir_set_cursor_at_end_and_append_block(irb, false_block);
4621 IrInstruction *val2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
4622 if (val2 == irb->codegen->invalid_instruction)
4623 return irb->codegen->invalid_instruction;
4624 IrBasicBlock *post_val2_block = irb->current_basic_block;
5670 IrInstSrc *val2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
5671 if (val2 == irb->codegen->invalid_inst_src)
5672 return irb->codegen->invalid_inst_src;
5673 IrBasicBlockSrc *post_val2_block = irb->current_basic_block;
46255674
46265675 ir_build_br(irb, scope, node, true_block, is_comptime);
46275676
46285677 ir_set_cursor_at_end_and_append_block(irb, true_block);
46295678
4630 IrInstruction **incoming_values = allocate<IrInstruction *>(2, "IrInstruction *");
5679 IrInstSrc **incoming_values = allocate<IrInstSrc *>(2, "IrInstSrc *");
46315680 incoming_values[0] = val1;
46325681 incoming_values[1] = val2;
4633 IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");
5682 IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
46345683 incoming_blocks[0] = post_val1_block;
46355684 incoming_blocks[1] = post_val2_block;
46365685
46375686 return ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, nullptr);
46385687}
46395688
4640static IrInstruction *ir_gen_bool_and(IrBuilder *irb, Scope *scope, AstNode *node) {
5689static IrInstSrc *ir_gen_bool_and(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
46415690 assert(node->type == NodeTypeBinOpExpr);
46425691
4643 IrInstruction *val1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);
4644 if (val1 == irb->codegen->invalid_instruction)
4645 return irb->codegen->invalid_instruction;
4646 IrBasicBlock *post_val1_block = irb->current_basic_block;
5692 IrInstSrc *val1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);
5693 if (val1 == irb->codegen->invalid_inst_src)
5694 return irb->codegen->invalid_inst_src;
5695 IrBasicBlockSrc *post_val1_block = irb->current_basic_block;
46475696
4648 IrInstruction *is_comptime;
5697 IrInstSrc *is_comptime;
46495698 if (ir_should_inline(irb->exec, scope)) {
46505699 is_comptime = ir_build_const_bool(irb, scope, node, true);
46515700 } else {
......@@ -4653,34 +5702,34 @@ static IrInstruction *ir_gen_bool_and(IrBuilder *irb, Scope *scope, AstNode *nod
46535702 }
46545703
46555704 // block for when val1 == true
4656 IrBasicBlock *true_block = ir_create_basic_block(irb, scope, "BoolAndTrue");
5705 IrBasicBlockSrc *true_block = ir_create_basic_block(irb, scope, "BoolAndTrue");
46575706 // block for when val1 == false (don't even evaluate the second part)
4658 IrBasicBlock *false_block = ir_create_basic_block(irb, scope, "BoolAndFalse");
5707 IrBasicBlockSrc *false_block = ir_create_basic_block(irb, scope, "BoolAndFalse");
46595708
46605709 ir_build_cond_br(irb, scope, node, val1, true_block, false_block, is_comptime);
46615710
46625711 ir_set_cursor_at_end_and_append_block(irb, true_block);
4663 IrInstruction *val2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
4664 if (val2 == irb->codegen->invalid_instruction)
4665 return irb->codegen->invalid_instruction;
4666 IrBasicBlock *post_val2_block = irb->current_basic_block;
5712 IrInstSrc *val2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
5713 if (val2 == irb->codegen->invalid_inst_src)
5714 return irb->codegen->invalid_inst_src;
5715 IrBasicBlockSrc *post_val2_block = irb->current_basic_block;
46675716
46685717 ir_build_br(irb, scope, node, false_block, is_comptime);
46695718
46705719 ir_set_cursor_at_end_and_append_block(irb, false_block);
46715720
4672 IrInstruction **incoming_values = allocate<IrInstruction *>(2);
5721 IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
46735722 incoming_values[0] = val1;
46745723 incoming_values[1] = val2;
4675 IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");
5724 IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
46765725 incoming_blocks[0] = post_val1_block;
46775726 incoming_blocks[1] = post_val2_block;
46785727
46795728 return ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, nullptr);
46805729}
46815730
4682static ResultLocPeerParent *ir_build_result_peers(IrBuilder *irb, IrInstruction *cond_br_inst,
4683 IrBasicBlock *end_block, ResultLoc *parent, IrInstruction *is_comptime)
5731static ResultLocPeerParent *ir_build_result_peers(IrBuilderSrc *irb, IrInstSrc *cond_br_inst,
5732 IrBasicBlockSrc *end_block, ResultLoc *parent, IrInstSrc *is_comptime)
46845733{
46855734 ResultLocPeerParent *peer_parent = allocate<ResultLocPeerParent>(1);
46865735 peer_parent->base.id = ResultLocIdPeerParent;
......@@ -4690,17 +5739,17 @@ static ResultLocPeerParent *ir_build_result_peers(IrBuilder *irb, IrInstruction
46905739 peer_parent->is_comptime = is_comptime;
46915740 peer_parent->parent = parent;
46925741
4693 IrInstruction *popped_inst = irb->current_basic_block->instruction_list.pop();
4694 ir_assert(popped_inst == cond_br_inst, cond_br_inst);
5742 IrInstSrc *popped_inst = irb->current_basic_block->instruction_list.pop();
5743 ir_assert(popped_inst == cond_br_inst, &cond_br_inst->base);
46955744
4696 ir_build_reset_result(irb, cond_br_inst->scope, cond_br_inst->source_node, &peer_parent->base);
5745 ir_build_reset_result(irb, cond_br_inst->base.scope, cond_br_inst->base.source_node, &peer_parent->base);
46975746 irb->current_basic_block->instruction_list.append(popped_inst);
46985747
46995748 return peer_parent;
47005749}
47015750
4702static ResultLocPeerParent *ir_build_binary_result_peers(IrBuilder *irb, IrInstruction *cond_br_inst,
4703 IrBasicBlock *else_block, IrBasicBlock *end_block, ResultLoc *parent, IrInstruction *is_comptime)
5751static ResultLocPeerParent *ir_build_binary_result_peers(IrBuilderSrc *irb, IrInstSrc *cond_br_inst,
5752 IrBasicBlockSrc *else_block, IrBasicBlockSrc *end_block, ResultLoc *parent, IrInstSrc *is_comptime)
47045753{
47055754 ResultLocPeerParent *peer_parent = ir_build_result_peers(irb, cond_br_inst, end_block, parent, is_comptime);
47065755
......@@ -4713,7 +5762,7 @@ static ResultLocPeerParent *ir_build_binary_result_peers(IrBuilder *irb, IrInstr
47135762 return peer_parent;
47145763}
47155764
4716static IrInstruction *ir_gen_orelse(IrBuilder *irb, Scope *parent_scope, AstNode *node, LVal lval,
5765static IrInstSrc *ir_gen_orelse(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node, LVal lval,
47175766 ResultLoc *result_loc)
47185767{
47195768 assert(node->type == NodeTypeBinOpExpr);
......@@ -4721,73 +5770,73 @@ static IrInstruction *ir_gen_orelse(IrBuilder *irb, Scope *parent_scope, AstNode
47215770 AstNode *op1_node = node->data.bin_op_expr.op1;
47225771 AstNode *op2_node = node->data.bin_op_expr.op2;
47235772
4724 IrInstruction *maybe_ptr = ir_gen_node_extra(irb, op1_node, parent_scope, LValPtr, nullptr);
4725 if (maybe_ptr == irb->codegen->invalid_instruction)
4726 return irb->codegen->invalid_instruction;
5773 IrInstSrc *maybe_ptr = ir_gen_node_extra(irb, op1_node, parent_scope, LValPtr, nullptr);
5774 if (maybe_ptr == irb->codegen->invalid_inst_src)
5775 return irb->codegen->invalid_inst_src;
47275776
4728 IrInstruction *maybe_val = ir_build_load_ptr(irb, parent_scope, node, maybe_ptr);
4729 IrInstruction *is_non_null = ir_build_test_nonnull(irb, parent_scope, node, maybe_val);
5777 IrInstSrc *maybe_val = ir_build_load_ptr(irb, parent_scope, node, maybe_ptr);
5778 IrInstSrc *is_non_null = ir_build_test_non_null_src(irb, parent_scope, node, maybe_val);
47305779
4731 IrInstruction *is_comptime;
5780 IrInstSrc *is_comptime;
47325781 if (ir_should_inline(irb->exec, parent_scope)) {
47335782 is_comptime = ir_build_const_bool(irb, parent_scope, node, true);
47345783 } else {
47355784 is_comptime = ir_build_test_comptime(irb, parent_scope, node, is_non_null);
47365785 }
47375786
4738 IrBasicBlock *ok_block = ir_create_basic_block(irb, parent_scope, "OptionalNonNull");
4739 IrBasicBlock *null_block = ir_create_basic_block(irb, parent_scope, "OptionalNull");
4740 IrBasicBlock *end_block = ir_create_basic_block(irb, parent_scope, "OptionalEnd");
4741 IrInstruction *cond_br_inst = ir_build_cond_br(irb, parent_scope, node, is_non_null, ok_block, null_block, is_comptime);
5787 IrBasicBlockSrc *ok_block = ir_create_basic_block(irb, parent_scope, "OptionalNonNull");
5788 IrBasicBlockSrc *null_block = ir_create_basic_block(irb, parent_scope, "OptionalNull");
5789 IrBasicBlockSrc *end_block = ir_create_basic_block(irb, parent_scope, "OptionalEnd");
5790 IrInstSrc *cond_br_inst = ir_build_cond_br(irb, parent_scope, node, is_non_null, ok_block, null_block, is_comptime);
47425791
47435792 ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, ok_block, end_block,
47445793 result_loc, is_comptime);
47455794
47465795 ir_set_cursor_at_end_and_append_block(irb, null_block);
4747 IrInstruction *null_result = ir_gen_node_extra(irb, op2_node, parent_scope, LValNone,
5796 IrInstSrc *null_result = ir_gen_node_extra(irb, op2_node, parent_scope, LValNone,
47485797 &peer_parent->peers.at(0)->base);
4749 if (null_result == irb->codegen->invalid_instruction)
4750 return irb->codegen->invalid_instruction;
4751 IrBasicBlock *after_null_block = irb->current_basic_block;
5798 if (null_result == irb->codegen->invalid_inst_src)
5799 return irb->codegen->invalid_inst_src;
5800 IrBasicBlockSrc *after_null_block = irb->current_basic_block;
47525801 if (!instr_is_unreachable(null_result))
47535802 ir_mark_gen(ir_build_br(irb, parent_scope, node, end_block, is_comptime));
47545803
47555804 ir_set_cursor_at_end_and_append_block(irb, ok_block);
4756 IrInstruction *unwrapped_ptr = ir_build_optional_unwrap_ptr(irb, parent_scope, node, maybe_ptr, false, false);
4757 IrInstruction *unwrapped_payload = ir_build_load_ptr(irb, parent_scope, node, unwrapped_ptr);
5805 IrInstSrc *unwrapped_ptr = ir_build_optional_unwrap_ptr(irb, parent_scope, node, maybe_ptr, false, false);
5806 IrInstSrc *unwrapped_payload = ir_build_load_ptr(irb, parent_scope, node, unwrapped_ptr);
47585807 ir_build_end_expr(irb, parent_scope, node, unwrapped_payload, &peer_parent->peers.at(1)->base);
4759 IrBasicBlock *after_ok_block = irb->current_basic_block;
5808 IrBasicBlockSrc *after_ok_block = irb->current_basic_block;
47605809 ir_build_br(irb, parent_scope, node, end_block, is_comptime);
47615810
47625811 ir_set_cursor_at_end_and_append_block(irb, end_block);
4763 IrInstruction **incoming_values = allocate<IrInstruction *>(2);
5812 IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
47645813 incoming_values[0] = null_result;
47655814 incoming_values[1] = unwrapped_payload;
4766 IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");
5815 IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
47675816 incoming_blocks[0] = after_null_block;
47685817 incoming_blocks[1] = after_ok_block;
4769 IrInstruction *phi = ir_build_phi(irb, parent_scope, node, 2, incoming_blocks, incoming_values, peer_parent);
5818 IrInstSrc *phi = ir_build_phi(irb, parent_scope, node, 2, incoming_blocks, incoming_values, peer_parent);
47705819 return ir_lval_wrap(irb, parent_scope, phi, lval, result_loc);
47715820}
47725821
4773static IrInstruction *ir_gen_error_union(IrBuilder *irb, Scope *parent_scope, AstNode *node) {
5822static IrInstSrc *ir_gen_error_union(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
47745823 assert(node->type == NodeTypeBinOpExpr);
47755824
47765825 AstNode *op1_node = node->data.bin_op_expr.op1;
47775826 AstNode *op2_node = node->data.bin_op_expr.op2;
47785827
4779 IrInstruction *err_set = ir_gen_node(irb, op1_node, parent_scope);
4780 if (err_set == irb->codegen->invalid_instruction)
4781 return irb->codegen->invalid_instruction;
5828 IrInstSrc *err_set = ir_gen_node(irb, op1_node, parent_scope);
5829 if (err_set == irb->codegen->invalid_inst_src)
5830 return irb->codegen->invalid_inst_src;
47825831
4783 IrInstruction *payload = ir_gen_node(irb, op2_node, parent_scope);
4784 if (payload == irb->codegen->invalid_instruction)
4785 return irb->codegen->invalid_instruction;
5832 IrInstSrc *payload = ir_gen_node(irb, op2_node, parent_scope);
5833 if (payload == irb->codegen->invalid_inst_src)
5834 return irb->codegen->invalid_inst_src;
47865835
47875836 return ir_build_error_union(irb, parent_scope, node, err_set, payload);
47885837}
47895838
4790static IrInstruction *ir_gen_bin_op(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
5839static IrInstSrc *ir_gen_bin_op(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
47915840 assert(node->type == NodeTypeBinOpExpr);
47925841
47935842 BinOpType bin_op_type = node->data.bin_op_expr.bin_op;
......@@ -4880,30 +5929,30 @@ static IrInstruction *ir_gen_bin_op(IrBuilder *irb, Scope *scope, AstNode *node,
48805929 zig_unreachable();
48815930}
48825931
4883static IrInstruction *ir_gen_int_lit(IrBuilder *irb, Scope *scope, AstNode *node) {
5932static IrInstSrc *ir_gen_int_lit(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
48845933 assert(node->type == NodeTypeIntLiteral);
48855934
48865935 return ir_build_const_bigint(irb, scope, node, node->data.int_literal.bigint);
48875936}
48885937
4889static IrInstruction *ir_gen_float_lit(IrBuilder *irb, Scope *scope, AstNode *node) {
5938static IrInstSrc *ir_gen_float_lit(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
48905939 assert(node->type == NodeTypeFloatLiteral);
48915940
48925941 if (node->data.float_literal.overflow) {
48935942 add_node_error(irb->codegen, node, buf_sprintf("float literal out of range of any type"));
4894 return irb->codegen->invalid_instruction;
5943 return irb->codegen->invalid_inst_src;
48955944 }
48965945
48975946 return ir_build_const_bigfloat(irb, scope, node, node->data.float_literal.bigfloat);
48985947}
48995948
4900static IrInstruction *ir_gen_char_lit(IrBuilder *irb, Scope *scope, AstNode *node) {
5949static IrInstSrc *ir_gen_char_lit(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
49015950 assert(node->type == NodeTypeCharLiteral);
49025951
49035952 return ir_build_const_uint(irb, scope, node, node->data.char_literal.value);
49045953}
49055954
4906static IrInstruction *ir_gen_null_literal(IrBuilder *irb, Scope *scope, AstNode *node) {
5955static IrInstSrc *ir_gen_null_literal(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
49075956 assert(node->type == NodeTypeNullLiteral);
49085957
49095958 return ir_build_const_null(irb, scope, node);
......@@ -4921,11 +5970,11 @@ static void populate_invalid_variable_in_scope(CodeGen *g, Scope *scope, AstNode
49215970 init_tld(&tld_var->base, TldIdVar, var_name, VisibModPub, node, &scope_decls->base);
49225971 tld_var->base.resolution = TldResolutionInvalid;
49235972 tld_var->var = add_variable(g, node, &scope_decls->base, var_name, false,
4924 g->invalid_instruction->value, &tld_var->base, g->builtin_types.entry_invalid);
5973 g->invalid_inst_gen->value, &tld_var->base, g->builtin_types.entry_invalid);
49255974 scope_decls->decl_table.put(var_name, &tld_var->base);
49265975}
49275976
4928static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
5977static IrInstSrc *ir_gen_symbol(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
49295978 Error err;
49305979 assert(node->type == NodeTypeSymbol);
49315980
......@@ -4933,15 +5982,16 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,
49335982
49345983 if (buf_eql_str(variable_name, "_")) {
49355984 if (lval == LValPtr) {
4936 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, node);
4937 const_instruction->base.value->type = get_pointer_to_type(irb->codegen,
5985 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, node);
5986 const_instruction->value = create_const_vals(1);
5987 const_instruction->value->type = get_pointer_to_type(irb->codegen,
49385988 irb->codegen->builtin_types.entry_void, false);
4939 const_instruction->base.value->special = ConstValSpecialStatic;
4940 const_instruction->base.value->data.x_ptr.special = ConstPtrSpecialDiscard;
5989 const_instruction->value->special = ConstValSpecialStatic;
5990 const_instruction->value->data.x_ptr.special = ConstPtrSpecialDiscard;
49415991 return &const_instruction->base;
49425992 } else {
49435993 add_node_error(irb->codegen, node, buf_sprintf("`_` may only be used to assign things to"));
4944 return irb->codegen->invalid_instruction;
5994 return irb->codegen->invalid_inst_src;
49455995 }
49465996 }
49475997
......@@ -4951,13 +6001,13 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,
49516001 add_node_error(irb->codegen, node,
49526002 buf_sprintf("primitive integer type '%s' exceeds maximum bit width of 65535",
49536003 buf_ptr(variable_name)));
4954 return irb->codegen->invalid_instruction;
6004 return irb->codegen->invalid_inst_src;
49556005 }
49566006 assert(err == ErrorPrimitiveTypeNotFound);
49576007 } else {
4958 IrInstruction *value = ir_build_const_type(irb, scope, node, primitive_type);
6008 IrInstSrc *value = ir_build_const_type(irb, scope, node, primitive_type);
49596009 if (lval == LValPtr) {
4960 return ir_build_ref(irb, scope, node, value, false, false);
6010 return ir_build_ref_src(irb, scope, node, value, false, false);
49616011 } else {
49626012 return ir_expr_wrap(irb, scope, value, result_loc);
49636013 }
......@@ -4966,7 +6016,7 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,
49666016 ScopeFnDef *crossed_fndef_scope;
49676017 ZigVar *var = find_variable(irb->codegen, scope, variable_name, &crossed_fndef_scope);
49686018 if (var) {
4969 IrInstruction *var_ptr = ir_build_var_ptr_x(irb, scope, node, var, crossed_fndef_scope);
6019 IrInstSrc *var_ptr = ir_build_var_ptr_x(irb, scope, node, var, crossed_fndef_scope);
49706020 if (lval == LValPtr) {
49716021 return var_ptr;
49726022 } else {
......@@ -4976,7 +6026,7 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,
49766026
49776027 Tld *tld = find_decl(irb->codegen, scope, variable_name);
49786028 if (tld) {
4979 IrInstruction *decl_ref = ir_build_decl_ref(irb, scope, node, tld, lval);
6029 IrInstSrc *decl_ref = ir_build_decl_ref(irb, scope, node, tld, lval);
49806030 if (lval == LValPtr) {
49816031 return decl_ref;
49826032 } else {
......@@ -4987,50 +6037,50 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,
49876037 if (get_container_scope(node->owner)->any_imports_failed) {
49886038 // skip the error message since we had a failing import in this file
49896039 // if an import breaks we don't need redundant undeclared identifier errors
4990 return irb->codegen->invalid_instruction;
6040 return irb->codegen->invalid_inst_src;
49916041 }
49926042
49936043 return ir_build_undeclared_identifier(irb, scope, node, variable_name);
49946044}
49956045
4996static IrInstruction *ir_gen_array_access(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
6046static IrInstSrc *ir_gen_array_access(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
49976047 ResultLoc *result_loc)
49986048{
49996049 assert(node->type == NodeTypeArrayAccessExpr);
50006050
50016051 AstNode *array_ref_node = node->data.array_access_expr.array_ref_expr;
5002 IrInstruction *array_ref_instruction = ir_gen_node_extra(irb, array_ref_node, scope, LValPtr, nullptr);
5003 if (array_ref_instruction == irb->codegen->invalid_instruction)
6052 IrInstSrc *array_ref_instruction = ir_gen_node_extra(irb, array_ref_node, scope, LValPtr, nullptr);
6053 if (array_ref_instruction == irb->codegen->invalid_inst_src)
50046054 return array_ref_instruction;
50056055
50066056 AstNode *subscript_node = node->data.array_access_expr.subscript;
5007 IrInstruction *subscript_instruction = ir_gen_node(irb, subscript_node, scope);
5008 if (subscript_instruction == irb->codegen->invalid_instruction)
6057 IrInstSrc *subscript_instruction = ir_gen_node(irb, subscript_node, scope);
6058 if (subscript_instruction == irb->codegen->invalid_inst_src)
50096059 return subscript_instruction;
50106060
5011 IrInstruction *ptr_instruction = ir_build_elem_ptr(irb, scope, node, array_ref_instruction,
6061 IrInstSrc *ptr_instruction = ir_build_elem_ptr(irb, scope, node, array_ref_instruction,
50126062 subscript_instruction, true, PtrLenSingle, nullptr);
50136063 if (lval == LValPtr)
50146064 return ptr_instruction;
50156065
5016 IrInstruction *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);
6066 IrInstSrc *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);
50176067 return ir_expr_wrap(irb, scope, load_ptr, result_loc);
50186068}
50196069
5020static IrInstruction *ir_gen_field_access(IrBuilder *irb, Scope *scope, AstNode *node) {
6070static IrInstSrc *ir_gen_field_access(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
50216071 assert(node->type == NodeTypeFieldAccessExpr);
50226072
50236073 AstNode *container_ref_node = node->data.field_access_expr.struct_expr;
50246074 Buf *field_name = node->data.field_access_expr.field_name;
50256075
5026 IrInstruction *container_ref_instruction = ir_gen_node_extra(irb, container_ref_node, scope, LValPtr, nullptr);
5027 if (container_ref_instruction == irb->codegen->invalid_instruction)
6076 IrInstSrc *container_ref_instruction = ir_gen_node_extra(irb, container_ref_node, scope, LValPtr, nullptr);
6077 if (container_ref_instruction == irb->codegen->invalid_inst_src)
50286078 return container_ref_instruction;
50296079
50306080 return ir_build_field_ptr(irb, scope, node, container_ref_instruction, field_name, false);
50316081}
50326082
5033static IrInstruction *ir_gen_overflow_op(IrBuilder *irb, Scope *scope, AstNode *node, IrOverflowOp op) {
6083static IrInstSrc *ir_gen_overflow_op(IrBuilderSrc *irb, Scope *scope, AstNode *node, IrOverflowOp op) {
50346084 assert(node->type == NodeTypeFnCallExpr);
50356085
50366086 AstNode *type_node = node->data.fn_call_expr.params.at(0);
......@@ -5039,26 +6089,26 @@ static IrInstruction *ir_gen_overflow_op(IrBuilder *irb, Scope *scope, AstNode *
50396089 AstNode *result_ptr_node = node->data.fn_call_expr.params.at(3);
50406090
50416091
5042 IrInstruction *type_value = ir_gen_node(irb, type_node, scope);
5043 if (type_value == irb->codegen->invalid_instruction)
5044 return irb->codegen->invalid_instruction;
6092 IrInstSrc *type_value = ir_gen_node(irb, type_node, scope);
6093 if (type_value == irb->codegen->invalid_inst_src)
6094 return irb->codegen->invalid_inst_src;
50456095
5046 IrInstruction *op1 = ir_gen_node(irb, op1_node, scope);
5047 if (op1 == irb->codegen->invalid_instruction)
5048 return irb->codegen->invalid_instruction;
6096 IrInstSrc *op1 = ir_gen_node(irb, op1_node, scope);
6097 if (op1 == irb->codegen->invalid_inst_src)
6098 return irb->codegen->invalid_inst_src;
50496099
5050 IrInstruction *op2 = ir_gen_node(irb, op2_node, scope);
5051 if (op2 == irb->codegen->invalid_instruction)
5052 return irb->codegen->invalid_instruction;
6100 IrInstSrc *op2 = ir_gen_node(irb, op2_node, scope);
6101 if (op2 == irb->codegen->invalid_inst_src)
6102 return irb->codegen->invalid_inst_src;
50536103
5054 IrInstruction *result_ptr = ir_gen_node(irb, result_ptr_node, scope);
5055 if (result_ptr == irb->codegen->invalid_instruction)
5056 return irb->codegen->invalid_instruction;
6104 IrInstSrc *result_ptr = ir_gen_node(irb, result_ptr_node, scope);
6105 if (result_ptr == irb->codegen->invalid_inst_src)
6106 return irb->codegen->invalid_inst_src;
50576107
5058 return ir_build_overflow_op(irb, scope, node, op, type_value, op1, op2, result_ptr, nullptr);
6108 return ir_build_overflow_op_src(irb, scope, node, op, type_value, op1, op2, result_ptr);
50596109}
50606110
5061static IrInstruction *ir_gen_mul_add(IrBuilder *irb, Scope *scope, AstNode *node) {
6111static IrInstSrc *ir_gen_mul_add(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
50626112 assert(node->type == NodeTypeFnCallExpr);
50636113
50646114 AstNode *type_node = node->data.fn_call_expr.params.at(0);
......@@ -5066,26 +6116,26 @@ static IrInstruction *ir_gen_mul_add(IrBuilder *irb, Scope *scope, AstNode *node
50666116 AstNode *op2_node = node->data.fn_call_expr.params.at(2);
50676117 AstNode *op3_node = node->data.fn_call_expr.params.at(3);
50686118
5069 IrInstruction *type_value = ir_gen_node(irb, type_node, scope);
5070 if (type_value == irb->codegen->invalid_instruction)
5071 return irb->codegen->invalid_instruction;
6119 IrInstSrc *type_value = ir_gen_node(irb, type_node, scope);
6120 if (type_value == irb->codegen->invalid_inst_src)
6121 return irb->codegen->invalid_inst_src;
50726122
5073 IrInstruction *op1 = ir_gen_node(irb, op1_node, scope);
5074 if (op1 == irb->codegen->invalid_instruction)
5075 return irb->codegen->invalid_instruction;
6123 IrInstSrc *op1 = ir_gen_node(irb, op1_node, scope);
6124 if (op1 == irb->codegen->invalid_inst_src)
6125 return irb->codegen->invalid_inst_src;
50766126
5077 IrInstruction *op2 = ir_gen_node(irb, op2_node, scope);
5078 if (op2 == irb->codegen->invalid_instruction)
5079 return irb->codegen->invalid_instruction;
6127 IrInstSrc *op2 = ir_gen_node(irb, op2_node, scope);
6128 if (op2 == irb->codegen->invalid_inst_src)
6129 return irb->codegen->invalid_inst_src;
50806130
5081 IrInstruction *op3 = ir_gen_node(irb, op3_node, scope);
5082 if (op3 == irb->codegen->invalid_instruction)
5083 return irb->codegen->invalid_instruction;
6131 IrInstSrc *op3 = ir_gen_node(irb, op3_node, scope);
6132 if (op3 == irb->codegen->invalid_inst_src)
6133 return irb->codegen->invalid_inst_src;
50846134
5085 return ir_build_mul_add(irb, scope, node, type_value, op1, op2, op3);
6135 return ir_build_mul_add_src(irb, scope, node, type_value, op1, op2, op3);
50866136}
50876137
5088static IrInstruction *ir_gen_this(IrBuilder *irb, Scope *orig_scope, AstNode *node) {
6138static IrInstSrc *ir_gen_this(IrBuilderSrc *irb, Scope *orig_scope, AstNode *node) {
50896139 for (Scope *it_scope = orig_scope; it_scope != nullptr; it_scope = it_scope->parent) {
50906140 if (it_scope->id == ScopeIdDecls) {
50916141 ScopeDecls *decls_scope = (ScopeDecls *)it_scope;
......@@ -5100,7 +6150,7 @@ static IrInstruction *ir_gen_this(IrBuilder *irb, Scope *orig_scope, AstNode *no
51006150 zig_unreachable();
51016151}
51026152
5103static IrInstruction *ir_gen_async_call(IrBuilder *irb, Scope *scope, AstNode *await_node, AstNode *call_node,
6153static IrInstSrc *ir_gen_async_call(IrBuilderSrc *irb, Scope *scope, AstNode *await_node, AstNode *call_node,
51046154 LVal lval, ResultLoc *result_loc)
51056155{
51066156 size_t arg_offset = 3;
......@@ -5108,71 +6158,71 @@ static IrInstruction *ir_gen_async_call(IrBuilder *irb, Scope *scope, AstNode *a
51086158 add_node_error(irb->codegen, call_node,
51096159 buf_sprintf("expected at least %" ZIG_PRI_usize " arguments, found %" ZIG_PRI_usize,
51106160 arg_offset, call_node->data.fn_call_expr.params.length));
5111 return irb->codegen->invalid_instruction;
6161 return irb->codegen->invalid_inst_src;
51126162 }
51136163
51146164 AstNode *bytes_node = call_node->data.fn_call_expr.params.at(0);
5115 IrInstruction *bytes = ir_gen_node(irb, bytes_node, scope);
5116 if (bytes == irb->codegen->invalid_instruction)
6165 IrInstSrc *bytes = ir_gen_node(irb, bytes_node, scope);
6166 if (bytes == irb->codegen->invalid_inst_src)
51176167 return bytes;
51186168
51196169 AstNode *ret_ptr_node = call_node->data.fn_call_expr.params.at(1);
5120 IrInstruction *ret_ptr = ir_gen_node(irb, ret_ptr_node, scope);
5121 if (ret_ptr == irb->codegen->invalid_instruction)
6170 IrInstSrc *ret_ptr = ir_gen_node(irb, ret_ptr_node, scope);
6171 if (ret_ptr == irb->codegen->invalid_inst_src)
51226172 return ret_ptr;
51236173
51246174 AstNode *fn_ref_node = call_node->data.fn_call_expr.params.at(2);
5125 IrInstruction *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
5126 if (fn_ref == irb->codegen->invalid_instruction)
6175 IrInstSrc *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
6176 if (fn_ref == irb->codegen->invalid_inst_src)
51276177 return fn_ref;
51286178
51296179 size_t arg_count = call_node->data.fn_call_expr.params.length - arg_offset;
5130 IrInstruction **args = allocate<IrInstruction*>(arg_count);
6180 IrInstSrc **args = allocate<IrInstSrc*>(arg_count);
51316181 for (size_t i = 0; i < arg_count; i += 1) {
51326182 AstNode *arg_node = call_node->data.fn_call_expr.params.at(i + arg_offset);
5133 IrInstruction *arg = ir_gen_node(irb, arg_node, scope);
5134 if (arg == irb->codegen->invalid_instruction)
6183 IrInstSrc *arg = ir_gen_node(irb, arg_node, scope);
6184 if (arg == irb->codegen->invalid_inst_src)
51356185 return arg;
51366186 args[i] = arg;
51376187 }
51386188
51396189 CallModifier modifier = (await_node == nullptr) ? CallModifierAsync : CallModifierNone;
51406190 bool is_async_call_builtin = true;
5141 IrInstruction *call = ir_build_call_src(irb, scope, call_node, nullptr, fn_ref, arg_count, args,
6191 IrInstSrc *call = ir_build_call_src(irb, scope, call_node, nullptr, fn_ref, arg_count, args,
51426192 ret_ptr, modifier, is_async_call_builtin, bytes, result_loc);
51436193 return ir_lval_wrap(irb, scope, call, lval, result_loc);
51446194}
51456195
5146static IrInstruction *ir_gen_fn_call_with_args(IrBuilder *irb, Scope *scope, AstNode *source_node,
5147 AstNode *fn_ref_node, CallModifier modifier, IrInstruction *options,
6196static IrInstSrc *ir_gen_fn_call_with_args(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
6197 AstNode *fn_ref_node, CallModifier modifier, IrInstSrc *options,
51486198 AstNode **args_ptr, size_t args_len, LVal lval, ResultLoc *result_loc)
51496199{
5150 IrInstruction *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
5151 if (fn_ref == irb->codegen->invalid_instruction)
6200 IrInstSrc *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
6201 if (fn_ref == irb->codegen->invalid_inst_src)
51526202 return fn_ref;
51536203
5154 IrInstruction *fn_type = ir_build_typeof(irb, scope, source_node, fn_ref);
6204 IrInstSrc *fn_type = ir_build_typeof(irb, scope, source_node, fn_ref);
51556205
5156 IrInstruction **args = allocate<IrInstruction*>(args_len);
6206 IrInstSrc **args = allocate<IrInstSrc*>(args_len);
51576207 for (size_t i = 0; i < args_len; i += 1) {
51586208 AstNode *arg_node = args_ptr[i];
51596209
5160 IrInstruction *arg_index = ir_build_const_usize(irb, scope, arg_node, i);
5161 IrInstruction *arg_type = ir_build_arg_type(irb, scope, source_node, fn_type, arg_index, true);
6210 IrInstSrc *arg_index = ir_build_const_usize(irb, scope, arg_node, i);
6211 IrInstSrc *arg_type = ir_build_arg_type(irb, scope, source_node, fn_type, arg_index, true);
51626212 ResultLoc *no_result = no_result_loc();
51636213 ir_build_reset_result(irb, scope, source_node, no_result);
51646214 ResultLocCast *result_loc_cast = ir_build_cast_result_loc(irb, arg_type, no_result);
51656215
5166 IrInstruction *arg = ir_gen_node_extra(irb, arg_node, scope, LValNone, &result_loc_cast->base);
5167 if (arg == irb->codegen->invalid_instruction)
6216 IrInstSrc *arg = ir_gen_node_extra(irb, arg_node, scope, LValNone, &result_loc_cast->base);
6217 if (arg == irb->codegen->invalid_inst_src)
51686218 return arg;
51696219
51706220 args[i] = ir_build_implicit_cast(irb, scope, arg_node, arg, result_loc_cast);
51716221 }
51726222
5173 IrInstruction *fn_call;
6223 IrInstSrc *fn_call;
51746224 if (options != nullptr) {
5175 fn_call = ir_build_call_src_args(irb, scope, source_node, options, fn_ref, args, args_len, result_loc);
6225 fn_call = ir_build_call_args(irb, scope, source_node, options, fn_ref, args, args_len, result_loc);
51766226 } else {
51776227 fn_call = ir_build_call_src(irb, scope, source_node, nullptr, fn_ref, args_len, args, nullptr,
51786228 modifier, false, nullptr, result_loc);
......@@ -5180,7 +6230,7 @@ static IrInstruction *ir_gen_fn_call_with_args(IrBuilder *irb, Scope *scope, Ast
51806230 return ir_lval_wrap(irb, scope, fn_call, lval, result_loc);
51816231}
51826232
5183static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
6233static IrInstSrc *ir_gen_builtin_fn_call(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
51846234 ResultLoc *result_loc)
51856235{
51866236 assert(node->type == NodeTypeFnCallExpr);
......@@ -5192,7 +6242,7 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
51926242 if (!entry) {
51936243 add_node_error(irb->codegen, node,
51946244 buf_sprintf("invalid builtin function: '%s'", buf_ptr(name)));
5195 return irb->codegen->invalid_instruction;
6245 return irb->codegen->invalid_inst_src;
51966246 }
51976247
51986248 BuiltinFnEntry *builtin_fn = entry->value;
......@@ -5202,7 +6252,7 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
52026252 add_node_error(irb->codegen, node,
52036253 buf_sprintf("expected %" ZIG_PRI_usize " arguments, found %" ZIG_PRI_usize,
52046254 builtin_fn->param_count, actual_param_count));
5205 return irb->codegen->invalid_instruction;
6255 return irb->codegen->invalid_inst_src;
52066256 }
52076257
52086258 switch (builtin_fn->id) {
......@@ -5213,197 +6263,197 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
52136263 Scope *sub_scope = create_typeof_scope(irb->codegen, node, scope);
52146264
52156265 AstNode *arg_node = node->data.fn_call_expr.params.at(0);
5216 IrInstruction *arg = ir_gen_node(irb, arg_node, sub_scope);
5217 if (arg == irb->codegen->invalid_instruction)
6266 IrInstSrc *arg = ir_gen_node(irb, arg_node, sub_scope);
6267 if (arg == irb->codegen->invalid_inst_src)
52186268 return arg;
52196269
5220 IrInstruction *type_of = ir_build_typeof(irb, scope, node, arg);
6270 IrInstSrc *type_of = ir_build_typeof(irb, scope, node, arg);
52216271 return ir_lval_wrap(irb, scope, type_of, lval, result_loc);
52226272 }
52236273 case BuiltinFnIdSetCold:
52246274 {
52256275 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5226 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5227 if (arg0_value == irb->codegen->invalid_instruction)
6276 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6277 if (arg0_value == irb->codegen->invalid_inst_src)
52286278 return arg0_value;
52296279
5230 IrInstruction *set_cold = ir_build_set_cold(irb, scope, node, arg0_value);
6280 IrInstSrc *set_cold = ir_build_set_cold(irb, scope, node, arg0_value);
52316281 return ir_lval_wrap(irb, scope, set_cold, lval, result_loc);
52326282 }
52336283 case BuiltinFnIdSetRuntimeSafety:
52346284 {
52356285 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5236 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5237 if (arg0_value == irb->codegen->invalid_instruction)
6286 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6287 if (arg0_value == irb->codegen->invalid_inst_src)
52386288 return arg0_value;
52396289
5240 IrInstruction *set_safety = ir_build_set_runtime_safety(irb, scope, node, arg0_value);
6290 IrInstSrc *set_safety = ir_build_set_runtime_safety(irb, scope, node, arg0_value);
52416291 return ir_lval_wrap(irb, scope, set_safety, lval, result_loc);
52426292 }
52436293 case BuiltinFnIdSetFloatMode:
52446294 {
52456295 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5246 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5247 if (arg0_value == irb->codegen->invalid_instruction)
6296 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6297 if (arg0_value == irb->codegen->invalid_inst_src)
52486298 return arg0_value;
52496299
5250 IrInstruction *set_float_mode = ir_build_set_float_mode(irb, scope, node, arg0_value);
6300 IrInstSrc *set_float_mode = ir_build_set_float_mode(irb, scope, node, arg0_value);
52516301 return ir_lval_wrap(irb, scope, set_float_mode, lval, result_loc);
52526302 }
52536303 case BuiltinFnIdSizeof:
52546304 case BuiltinFnIdBitSizeof:
52556305 {
52566306 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5257 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5258 if (arg0_value == irb->codegen->invalid_instruction)
6307 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6308 if (arg0_value == irb->codegen->invalid_inst_src)
52596309 return arg0_value;
52606310
5261 IrInstruction *size_of = ir_build_size_of(irb, scope, node, arg0_value, builtin_fn->id == BuiltinFnIdBitSizeof);
6311 IrInstSrc *size_of = ir_build_size_of(irb, scope, node, arg0_value, builtin_fn->id == BuiltinFnIdBitSizeof);
52626312 return ir_lval_wrap(irb, scope, size_of, lval, result_loc);
52636313 }
52646314 case BuiltinFnIdImport:
52656315 {
52666316 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5267 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5268 if (arg0_value == irb->codegen->invalid_instruction)
6317 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6318 if (arg0_value == irb->codegen->invalid_inst_src)
52696319 return arg0_value;
52706320
5271 IrInstruction *import = ir_build_import(irb, scope, node, arg0_value);
6321 IrInstSrc *import = ir_build_import(irb, scope, node, arg0_value);
52726322 return ir_lval_wrap(irb, scope, import, lval, result_loc);
52736323 }
52746324 case BuiltinFnIdCImport:
52756325 {
5276 IrInstruction *c_import = ir_build_c_import(irb, scope, node);
6326 IrInstSrc *c_import = ir_build_c_import(irb, scope, node);
52776327 return ir_lval_wrap(irb, scope, c_import, lval, result_loc);
52786328 }
52796329 case BuiltinFnIdCInclude:
52806330 {
52816331 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5282 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5283 if (arg0_value == irb->codegen->invalid_instruction)
6332 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6333 if (arg0_value == irb->codegen->invalid_inst_src)
52846334 return arg0_value;
52856335
52866336 if (!exec_c_import_buf(irb->exec)) {
52876337 add_node_error(irb->codegen, node, buf_sprintf("C include valid only inside C import block"));
5288 return irb->codegen->invalid_instruction;
6338 return irb->codegen->invalid_inst_src;
52896339 }
52906340
5291 IrInstruction *c_include = ir_build_c_include(irb, scope, node, arg0_value);
6341 IrInstSrc *c_include = ir_build_c_include(irb, scope, node, arg0_value);
52926342 return ir_lval_wrap(irb, scope, c_include, lval, result_loc);
52936343 }
52946344 case BuiltinFnIdCDefine:
52956345 {
52966346 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5297 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5298 if (arg0_value == irb->codegen->invalid_instruction)
6347 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6348 if (arg0_value == irb->codegen->invalid_inst_src)
52996349 return arg0_value;
53006350
53016351 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5302 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5303 if (arg1_value == irb->codegen->invalid_instruction)
6352 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6353 if (arg1_value == irb->codegen->invalid_inst_src)
53046354 return arg1_value;
53056355
53066356 if (!exec_c_import_buf(irb->exec)) {
53076357 add_node_error(irb->codegen, node, buf_sprintf("C define valid only inside C import block"));
5308 return irb->codegen->invalid_instruction;
6358 return irb->codegen->invalid_inst_src;
53096359 }
53106360
5311 IrInstruction *c_define = ir_build_c_define(irb, scope, node, arg0_value, arg1_value);
6361 IrInstSrc *c_define = ir_build_c_define(irb, scope, node, arg0_value, arg1_value);
53126362 return ir_lval_wrap(irb, scope, c_define, lval, result_loc);
53136363 }
53146364 case BuiltinFnIdCUndef:
53156365 {
53166366 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5317 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5318 if (arg0_value == irb->codegen->invalid_instruction)
6367 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6368 if (arg0_value == irb->codegen->invalid_inst_src)
53196369 return arg0_value;
53206370
53216371 if (!exec_c_import_buf(irb->exec)) {
53226372 add_node_error(irb->codegen, node, buf_sprintf("C undef valid only inside C import block"));
5323 return irb->codegen->invalid_instruction;
6373 return irb->codegen->invalid_inst_src;
53246374 }
53256375
5326 IrInstruction *c_undef = ir_build_c_undef(irb, scope, node, arg0_value);
6376 IrInstSrc *c_undef = ir_build_c_undef(irb, scope, node, arg0_value);
53276377 return ir_lval_wrap(irb, scope, c_undef, lval, result_loc);
53286378 }
53296379 case BuiltinFnIdCompileErr:
53306380 {
53316381 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5332 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5333 if (arg0_value == irb->codegen->invalid_instruction)
6382 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6383 if (arg0_value == irb->codegen->invalid_inst_src)
53346384 return arg0_value;
53356385
5336 IrInstruction *compile_err = ir_build_compile_err(irb, scope, node, arg0_value);
6386 IrInstSrc *compile_err = ir_build_compile_err(irb, scope, node, arg0_value);
53376387 return ir_lval_wrap(irb, scope, compile_err, lval, result_loc);
53386388 }
53396389 case BuiltinFnIdCompileLog:
53406390 {
5341 IrInstruction **args = allocate<IrInstruction*>(actual_param_count);
6391 IrInstSrc **args = allocate<IrInstSrc*>(actual_param_count);
53426392
53436393 for (size_t i = 0; i < actual_param_count; i += 1) {
53446394 AstNode *arg_node = node->data.fn_call_expr.params.at(i);
53456395 args[i] = ir_gen_node(irb, arg_node, scope);
5346 if (args[i] == irb->codegen->invalid_instruction)
5347 return irb->codegen->invalid_instruction;
6396 if (args[i] == irb->codegen->invalid_inst_src)
6397 return irb->codegen->invalid_inst_src;
53486398 }
53496399
5350 IrInstruction *compile_log = ir_build_compile_log(irb, scope, node, actual_param_count, args);
6400 IrInstSrc *compile_log = ir_build_compile_log(irb, scope, node, actual_param_count, args);
53516401 return ir_lval_wrap(irb, scope, compile_log, lval, result_loc);
53526402 }
53536403 case BuiltinFnIdErrName:
53546404 {
53556405 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5356 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5357 if (arg0_value == irb->codegen->invalid_instruction)
6406 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6407 if (arg0_value == irb->codegen->invalid_inst_src)
53586408 return arg0_value;
53596409
5360 IrInstruction *err_name = ir_build_err_name(irb, scope, node, arg0_value);
6410 IrInstSrc *err_name = ir_build_err_name(irb, scope, node, arg0_value);
53616411 return ir_lval_wrap(irb, scope, err_name, lval, result_loc);
53626412 }
53636413 case BuiltinFnIdEmbedFile:
53646414 {
53656415 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5366 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5367 if (arg0_value == irb->codegen->invalid_instruction)
6416 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6417 if (arg0_value == irb->codegen->invalid_inst_src)
53686418 return arg0_value;
53696419
5370 IrInstruction *embed_file = ir_build_embed_file(irb, scope, node, arg0_value);
6420 IrInstSrc *embed_file = ir_build_embed_file(irb, scope, node, arg0_value);
53716421 return ir_lval_wrap(irb, scope, embed_file, lval, result_loc);
53726422 }
53736423 case BuiltinFnIdCmpxchgWeak:
53746424 case BuiltinFnIdCmpxchgStrong:
53756425 {
53766426 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5377 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5378 if (arg0_value == irb->codegen->invalid_instruction)
6427 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6428 if (arg0_value == irb->codegen->invalid_inst_src)
53796429 return arg0_value;
53806430
53816431 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5382 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5383 if (arg1_value == irb->codegen->invalid_instruction)
6432 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6433 if (arg1_value == irb->codegen->invalid_inst_src)
53846434 return arg1_value;
53856435
53866436 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
5387 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
5388 if (arg2_value == irb->codegen->invalid_instruction)
6437 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
6438 if (arg2_value == irb->codegen->invalid_inst_src)
53896439 return arg2_value;
53906440
53916441 AstNode *arg3_node = node->data.fn_call_expr.params.at(3);
5392 IrInstruction *arg3_value = ir_gen_node(irb, arg3_node, scope);
5393 if (arg3_value == irb->codegen->invalid_instruction)
6442 IrInstSrc *arg3_value = ir_gen_node(irb, arg3_node, scope);
6443 if (arg3_value == irb->codegen->invalid_inst_src)
53946444 return arg3_value;
53956445
53966446 AstNode *arg4_node = node->data.fn_call_expr.params.at(4);
5397 IrInstruction *arg4_value = ir_gen_node(irb, arg4_node, scope);
5398 if (arg4_value == irb->codegen->invalid_instruction)
6447 IrInstSrc *arg4_value = ir_gen_node(irb, arg4_node, scope);
6448 if (arg4_value == irb->codegen->invalid_inst_src)
53996449 return arg4_value;
54006450
54016451 AstNode *arg5_node = node->data.fn_call_expr.params.at(5);
5402 IrInstruction *arg5_value = ir_gen_node(irb, arg5_node, scope);
5403 if (arg5_value == irb->codegen->invalid_instruction)
6452 IrInstSrc *arg5_value = ir_gen_node(irb, arg5_node, scope);
6453 if (arg5_value == irb->codegen->invalid_inst_src)
54046454 return arg5_value;
54056455
5406 IrInstruction *cmpxchg = ir_build_cmpxchg_src(irb, scope, node, arg0_value, arg1_value,
6456 IrInstSrc *cmpxchg = ir_build_cmpxchg_src(irb, scope, node, arg0_value, arg1_value,
54076457 arg2_value, arg3_value, arg4_value, arg5_value, (builtin_fn->id == BuiltinFnIdCmpxchgWeak),
54086458 result_loc);
54096459 return ir_lval_wrap(irb, scope, cmpxchg, lval, result_loc);
......@@ -5411,86 +6461,86 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
54116461 case BuiltinFnIdFence:
54126462 {
54136463 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5414 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5415 if (arg0_value == irb->codegen->invalid_instruction)
6464 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6465 if (arg0_value == irb->codegen->invalid_inst_src)
54166466 return arg0_value;
54176467
5418 IrInstruction *fence = ir_build_fence(irb, scope, node, arg0_value, AtomicOrderUnordered);
6468 IrInstSrc *fence = ir_build_fence(irb, scope, node, arg0_value);
54196469 return ir_lval_wrap(irb, scope, fence, lval, result_loc);
54206470 }
54216471 case BuiltinFnIdDivExact:
54226472 {
54236473 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5424 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5425 if (arg0_value == irb->codegen->invalid_instruction)
6474 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6475 if (arg0_value == irb->codegen->invalid_inst_src)
54266476 return arg0_value;
54276477
54286478 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5429 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5430 if (arg1_value == irb->codegen->invalid_instruction)
6479 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6480 if (arg1_value == irb->codegen->invalid_inst_src)
54316481 return arg1_value;
54326482
5433 IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivExact, arg0_value, arg1_value, true);
6483 IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivExact, arg0_value, arg1_value, true);
54346484 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
54356485 }
54366486 case BuiltinFnIdDivTrunc:
54376487 {
54386488 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5439 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5440 if (arg0_value == irb->codegen->invalid_instruction)
6489 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6490 if (arg0_value == irb->codegen->invalid_inst_src)
54416491 return arg0_value;
54426492
54436493 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5444 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5445 if (arg1_value == irb->codegen->invalid_instruction)
6494 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6495 if (arg1_value == irb->codegen->invalid_inst_src)
54466496 return arg1_value;
54476497
5448 IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivTrunc, arg0_value, arg1_value, true);
6498 IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivTrunc, arg0_value, arg1_value, true);
54496499 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
54506500 }
54516501 case BuiltinFnIdDivFloor:
54526502 {
54536503 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5454 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5455 if (arg0_value == irb->codegen->invalid_instruction)
6504 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6505 if (arg0_value == irb->codegen->invalid_inst_src)
54566506 return arg0_value;
54576507
54586508 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5459 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5460 if (arg1_value == irb->codegen->invalid_instruction)
6509 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6510 if (arg1_value == irb->codegen->invalid_inst_src)
54616511 return arg1_value;
54626512
5463 IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivFloor, arg0_value, arg1_value, true);
6513 IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivFloor, arg0_value, arg1_value, true);
54646514 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
54656515 }
54666516 case BuiltinFnIdRem:
54676517 {
54686518 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5469 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5470 if (arg0_value == irb->codegen->invalid_instruction)
6519 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6520 if (arg0_value == irb->codegen->invalid_inst_src)
54716521 return arg0_value;
54726522
54736523 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5474 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5475 if (arg1_value == irb->codegen->invalid_instruction)
6524 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6525 if (arg1_value == irb->codegen->invalid_inst_src)
54766526 return arg1_value;
54776527
5478 IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpRemRem, arg0_value, arg1_value, true);
6528 IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpRemRem, arg0_value, arg1_value, true);
54796529 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
54806530 }
54816531 case BuiltinFnIdMod:
54826532 {
54836533 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5484 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5485 if (arg0_value == irb->codegen->invalid_instruction)
6534 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6535 if (arg0_value == irb->codegen->invalid_inst_src)
54866536 return arg0_value;
54876537
54886538 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5489 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5490 if (arg1_value == irb->codegen->invalid_instruction)
6539 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6540 if (arg1_value == irb->codegen->invalid_inst_src)
54916541 return arg1_value;
54926542
5493 IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpRemMod, arg0_value, arg1_value, true);
6543 IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpRemMod, arg0_value, arg1_value, true);
54946544 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
54956545 }
54966546 case BuiltinFnIdSqrt:
......@@ -5509,406 +6559,406 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
55096559 case BuiltinFnIdRound:
55106560 {
55116561 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5512 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5513 if (arg0_value == irb->codegen->invalid_instruction)
6562 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6563 if (arg0_value == irb->codegen->invalid_inst_src)
55146564 return arg0_value;
55156565
5516 IrInstruction *inst = ir_build_float_op(irb, scope, node, arg0_value, builtin_fn->id);
6566 IrInstSrc *inst = ir_build_float_op_src(irb, scope, node, arg0_value, builtin_fn->id);
55176567 return ir_lval_wrap(irb, scope, inst, lval, result_loc);
55186568 }
55196569 case BuiltinFnIdTruncate:
55206570 {
55216571 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5522 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5523 if (arg0_value == irb->codegen->invalid_instruction)
6572 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6573 if (arg0_value == irb->codegen->invalid_inst_src)
55246574 return arg0_value;
55256575
55266576 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5527 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5528 if (arg1_value == irb->codegen->invalid_instruction)
6577 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6578 if (arg1_value == irb->codegen->invalid_inst_src)
55296579 return arg1_value;
55306580
5531 IrInstruction *truncate = ir_build_truncate(irb, scope, node, arg0_value, arg1_value);
6581 IrInstSrc *truncate = ir_build_truncate(irb, scope, node, arg0_value, arg1_value);
55326582 return ir_lval_wrap(irb, scope, truncate, lval, result_loc);
55336583 }
55346584 case BuiltinFnIdIntCast:
55356585 {
55366586 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5537 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5538 if (arg0_value == irb->codegen->invalid_instruction)
6587 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6588 if (arg0_value == irb->codegen->invalid_inst_src)
55396589 return arg0_value;
55406590
55416591 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5542 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5543 if (arg1_value == irb->codegen->invalid_instruction)
6592 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6593 if (arg1_value == irb->codegen->invalid_inst_src)
55446594 return arg1_value;
55456595
5546 IrInstruction *result = ir_build_int_cast(irb, scope, node, arg0_value, arg1_value);
6596 IrInstSrc *result = ir_build_int_cast(irb, scope, node, arg0_value, arg1_value);
55476597 return ir_lval_wrap(irb, scope, result, lval, result_loc);
55486598 }
55496599 case BuiltinFnIdFloatCast:
55506600 {
55516601 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5552 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5553 if (arg0_value == irb->codegen->invalid_instruction)
6602 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6603 if (arg0_value == irb->codegen->invalid_inst_src)
55546604 return arg0_value;
55556605
55566606 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5557 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5558 if (arg1_value == irb->codegen->invalid_instruction)
6607 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6608 if (arg1_value == irb->codegen->invalid_inst_src)
55596609 return arg1_value;
55606610
5561 IrInstruction *result = ir_build_float_cast(irb, scope, node, arg0_value, arg1_value);
6611 IrInstSrc *result = ir_build_float_cast(irb, scope, node, arg0_value, arg1_value);
55626612 return ir_lval_wrap(irb, scope, result, lval, result_loc);
55636613 }
55646614 case BuiltinFnIdErrSetCast:
55656615 {
55666616 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5567 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5568 if (arg0_value == irb->codegen->invalid_instruction)
6617 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6618 if (arg0_value == irb->codegen->invalid_inst_src)
55696619 return arg0_value;
55706620
55716621 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5572 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5573 if (arg1_value == irb->codegen->invalid_instruction)
6622 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6623 if (arg1_value == irb->codegen->invalid_inst_src)
55746624 return arg1_value;
55756625
5576 IrInstruction *result = ir_build_err_set_cast(irb, scope, node, arg0_value, arg1_value);
6626 IrInstSrc *result = ir_build_err_set_cast(irb, scope, node, arg0_value, arg1_value);
55776627 return ir_lval_wrap(irb, scope, result, lval, result_loc);
55786628 }
55796629 case BuiltinFnIdFromBytes:
55806630 {
55816631 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5582 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5583 if (arg0_value == irb->codegen->invalid_instruction)
6632 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6633 if (arg0_value == irb->codegen->invalid_inst_src)
55846634 return arg0_value;
55856635
55866636 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5587 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5588 if (arg1_value == irb->codegen->invalid_instruction)
6637 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6638 if (arg1_value == irb->codegen->invalid_inst_src)
55896639 return arg1_value;
55906640
5591 IrInstruction *result = ir_build_from_bytes(irb, scope, node, arg0_value, arg1_value, result_loc);
6641 IrInstSrc *result = ir_build_from_bytes(irb, scope, node, arg0_value, arg1_value, result_loc);
55926642 return ir_lval_wrap(irb, scope, result, lval, result_loc);
55936643 }
55946644 case BuiltinFnIdToBytes:
55956645 {
55966646 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5597 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5598 if (arg0_value == irb->codegen->invalid_instruction)
6647 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6648 if (arg0_value == irb->codegen->invalid_inst_src)
55996649 return arg0_value;
56006650
5601 IrInstruction *result = ir_build_to_bytes(irb, scope, node, arg0_value, result_loc);
6651 IrInstSrc *result = ir_build_to_bytes(irb, scope, node, arg0_value, result_loc);
56026652 return ir_lval_wrap(irb, scope, result, lval, result_loc);
56036653 }
56046654 case BuiltinFnIdIntToFloat:
56056655 {
56066656 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5607 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5608 if (arg0_value == irb->codegen->invalid_instruction)
6657 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6658 if (arg0_value == irb->codegen->invalid_inst_src)
56096659 return arg0_value;
56106660
56116661 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5612 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5613 if (arg1_value == irb->codegen->invalid_instruction)
6662 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6663 if (arg1_value == irb->codegen->invalid_inst_src)
56146664 return arg1_value;
56156665
5616 IrInstruction *result = ir_build_int_to_float(irb, scope, node, arg0_value, arg1_value);
6666 IrInstSrc *result = ir_build_int_to_float(irb, scope, node, arg0_value, arg1_value);
56176667 return ir_lval_wrap(irb, scope, result, lval, result_loc);
56186668 }
56196669 case BuiltinFnIdFloatToInt:
56206670 {
56216671 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5622 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5623 if (arg0_value == irb->codegen->invalid_instruction)
6672 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6673 if (arg0_value == irb->codegen->invalid_inst_src)
56246674 return arg0_value;
56256675
56266676 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5627 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5628 if (arg1_value == irb->codegen->invalid_instruction)
6677 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6678 if (arg1_value == irb->codegen->invalid_inst_src)
56296679 return arg1_value;
56306680
5631 IrInstruction *result = ir_build_float_to_int(irb, scope, node, arg0_value, arg1_value);
6681 IrInstSrc *result = ir_build_float_to_int(irb, scope, node, arg0_value, arg1_value);
56326682 return ir_lval_wrap(irb, scope, result, lval, result_loc);
56336683 }
56346684 case BuiltinFnIdErrToInt:
56356685 {
56366686 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5637 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5638 if (arg0_value == irb->codegen->invalid_instruction)
6687 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6688 if (arg0_value == irb->codegen->invalid_inst_src)
56396689 return arg0_value;
56406690
5641 IrInstruction *result = ir_build_err_to_int(irb, scope, node, arg0_value);
6691 IrInstSrc *result = ir_build_err_to_int_src(irb, scope, node, arg0_value);
56426692 return ir_lval_wrap(irb, scope, result, lval, result_loc);
56436693 }
56446694 case BuiltinFnIdIntToErr:
56456695 {
56466696 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5647 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5648 if (arg0_value == irb->codegen->invalid_instruction)
6697 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6698 if (arg0_value == irb->codegen->invalid_inst_src)
56496699 return arg0_value;
56506700
5651 IrInstruction *result = ir_build_int_to_err(irb, scope, node, arg0_value);
6701 IrInstSrc *result = ir_build_int_to_err_src(irb, scope, node, arg0_value);
56526702 return ir_lval_wrap(irb, scope, result, lval, result_loc);
56536703 }
56546704 case BuiltinFnIdBoolToInt:
56556705 {
56566706 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5657 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5658 if (arg0_value == irb->codegen->invalid_instruction)
6707 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6708 if (arg0_value == irb->codegen->invalid_inst_src)
56596709 return arg0_value;
56606710
5661 IrInstruction *result = ir_build_bool_to_int(irb, scope, node, arg0_value);
6711 IrInstSrc *result = ir_build_bool_to_int(irb, scope, node, arg0_value);
56626712 return ir_lval_wrap(irb, scope, result, lval, result_loc);
56636713 }
56646714 case BuiltinFnIdIntType:
56656715 {
56666716 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5667 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5668 if (arg0_value == irb->codegen->invalid_instruction)
6717 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6718 if (arg0_value == irb->codegen->invalid_inst_src)
56696719 return arg0_value;
56706720
56716721 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5672 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5673 if (arg1_value == irb->codegen->invalid_instruction)
6722 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6723 if (arg1_value == irb->codegen->invalid_inst_src)
56746724 return arg1_value;
56756725
5676 IrInstruction *int_type = ir_build_int_type(irb, scope, node, arg0_value, arg1_value);
6726 IrInstSrc *int_type = ir_build_int_type(irb, scope, node, arg0_value, arg1_value);
56776727 return ir_lval_wrap(irb, scope, int_type, lval, result_loc);
56786728 }
56796729 case BuiltinFnIdVectorType:
56806730 {
56816731 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5682 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5683 if (arg0_value == irb->codegen->invalid_instruction)
6732 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6733 if (arg0_value == irb->codegen->invalid_inst_src)
56846734 return arg0_value;
56856735
56866736 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5687 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5688 if (arg1_value == irb->codegen->invalid_instruction)
6737 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6738 if (arg1_value == irb->codegen->invalid_inst_src)
56896739 return arg1_value;
56906740
5691 IrInstruction *vector_type = ir_build_vector_type(irb, scope, node, arg0_value, arg1_value);
6741 IrInstSrc *vector_type = ir_build_vector_type(irb, scope, node, arg0_value, arg1_value);
56926742 return ir_lval_wrap(irb, scope, vector_type, lval, result_loc);
56936743 }
56946744 case BuiltinFnIdShuffle:
56956745 {
56966746 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5697 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5698 if (arg0_value == irb->codegen->invalid_instruction)
6747 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6748 if (arg0_value == irb->codegen->invalid_inst_src)
56996749 return arg0_value;
57006750
57016751 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5702 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5703 if (arg1_value == irb->codegen->invalid_instruction)
6752 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6753 if (arg1_value == irb->codegen->invalid_inst_src)
57046754 return arg1_value;
57056755
57066756 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
5707 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
5708 if (arg2_value == irb->codegen->invalid_instruction)
6757 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
6758 if (arg2_value == irb->codegen->invalid_inst_src)
57096759 return arg2_value;
57106760
57116761 AstNode *arg3_node = node->data.fn_call_expr.params.at(3);
5712 IrInstruction *arg3_value = ir_gen_node(irb, arg3_node, scope);
5713 if (arg3_value == irb->codegen->invalid_instruction)
6762 IrInstSrc *arg3_value = ir_gen_node(irb, arg3_node, scope);
6763 if (arg3_value == irb->codegen->invalid_inst_src)
57146764 return arg3_value;
57156765
5716 IrInstruction *shuffle_vector = ir_build_shuffle_vector(irb, scope, node,
6766 IrInstSrc *shuffle_vector = ir_build_shuffle_vector(irb, scope, node,
57176767 arg0_value, arg1_value, arg2_value, arg3_value);
57186768 return ir_lval_wrap(irb, scope, shuffle_vector, lval, result_loc);
57196769 }
57206770 case BuiltinFnIdSplat:
57216771 {
57226772 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5723 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5724 if (arg0_value == irb->codegen->invalid_instruction)
6773 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6774 if (arg0_value == irb->codegen->invalid_inst_src)
57256775 return arg0_value;
57266776
57276777 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5728 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5729 if (arg1_value == irb->codegen->invalid_instruction)
6778 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6779 if (arg1_value == irb->codegen->invalid_inst_src)
57306780 return arg1_value;
57316781
5732 IrInstruction *splat = ir_build_splat_src(irb, scope, node,
6782 IrInstSrc *splat = ir_build_splat_src(irb, scope, node,
57336783 arg0_value, arg1_value);
57346784 return ir_lval_wrap(irb, scope, splat, lval, result_loc);
57356785 }
57366786 case BuiltinFnIdMemcpy:
57376787 {
57386788 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5739 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5740 if (arg0_value == irb->codegen->invalid_instruction)
6789 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6790 if (arg0_value == irb->codegen->invalid_inst_src)
57416791 return arg0_value;
57426792
57436793 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5744 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5745 if (arg1_value == irb->codegen->invalid_instruction)
6794 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6795 if (arg1_value == irb->codegen->invalid_inst_src)
57466796 return arg1_value;
57476797
57486798 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
5749 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
5750 if (arg2_value == irb->codegen->invalid_instruction)
6799 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
6800 if (arg2_value == irb->codegen->invalid_inst_src)
57516801 return arg2_value;
57526802
5753 IrInstruction *ir_memcpy = ir_build_memcpy(irb, scope, node, arg0_value, arg1_value, arg2_value);
6803 IrInstSrc *ir_memcpy = ir_build_memcpy_src(irb, scope, node, arg0_value, arg1_value, arg2_value);
57546804 return ir_lval_wrap(irb, scope, ir_memcpy, lval, result_loc);
57556805 }
57566806 case BuiltinFnIdMemset:
57576807 {
57586808 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5759 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5760 if (arg0_value == irb->codegen->invalid_instruction)
6809 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6810 if (arg0_value == irb->codegen->invalid_inst_src)
57616811 return arg0_value;
57626812
57636813 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5764 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5765 if (arg1_value == irb->codegen->invalid_instruction)
6814 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6815 if (arg1_value == irb->codegen->invalid_inst_src)
57666816 return arg1_value;
57676817
57686818 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
5769 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
5770 if (arg2_value == irb->codegen->invalid_instruction)
6819 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
6820 if (arg2_value == irb->codegen->invalid_inst_src)
57716821 return arg2_value;
57726822
5773 IrInstruction *ir_memset = ir_build_memset(irb, scope, node, arg0_value, arg1_value, arg2_value);
6823 IrInstSrc *ir_memset = ir_build_memset_src(irb, scope, node, arg0_value, arg1_value, arg2_value);
57746824 return ir_lval_wrap(irb, scope, ir_memset, lval, result_loc);
57756825 }
57766826 case BuiltinFnIdMemberCount:
57776827 {
57786828 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5779 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5780 if (arg0_value == irb->codegen->invalid_instruction)
6829 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6830 if (arg0_value == irb->codegen->invalid_inst_src)
57816831 return arg0_value;
57826832
5783 IrInstruction *member_count = ir_build_member_count(irb, scope, node, arg0_value);
6833 IrInstSrc *member_count = ir_build_member_count(irb, scope, node, arg0_value);
57846834 return ir_lval_wrap(irb, scope, member_count, lval, result_loc);
57856835 }
57866836 case BuiltinFnIdMemberType:
57876837 {
57886838 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5789 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5790 if (arg0_value == irb->codegen->invalid_instruction)
6839 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6840 if (arg0_value == irb->codegen->invalid_inst_src)
57916841 return arg0_value;
57926842
57936843 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5794 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5795 if (arg1_value == irb->codegen->invalid_instruction)
6844 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6845 if (arg1_value == irb->codegen->invalid_inst_src)
57966846 return arg1_value;
57976847
57986848
5799 IrInstruction *member_type = ir_build_member_type(irb, scope, node, arg0_value, arg1_value);
6849 IrInstSrc *member_type = ir_build_member_type(irb, scope, node, arg0_value, arg1_value);
58006850 return ir_lval_wrap(irb, scope, member_type, lval, result_loc);
58016851 }
58026852 case BuiltinFnIdMemberName:
58036853 {
58046854 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5805 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5806 if (arg0_value == irb->codegen->invalid_instruction)
6855 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6856 if (arg0_value == irb->codegen->invalid_inst_src)
58076857 return arg0_value;
58086858
58096859 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5810 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5811 if (arg1_value == irb->codegen->invalid_instruction)
6860 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6861 if (arg1_value == irb->codegen->invalid_inst_src)
58126862 return arg1_value;
58136863
58146864
5815 IrInstruction *member_name = ir_build_member_name(irb, scope, node, arg0_value, arg1_value);
6865 IrInstSrc *member_name = ir_build_member_name(irb, scope, node, arg0_value, arg1_value);
58166866 return ir_lval_wrap(irb, scope, member_name, lval, result_loc);
58176867 }
58186868 case BuiltinFnIdField:
58196869 {
58206870 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5821 IrInstruction *arg0_value = ir_gen_node_extra(irb, arg0_node, scope, LValPtr, nullptr);
5822 if (arg0_value == irb->codegen->invalid_instruction)
6871 IrInstSrc *arg0_value = ir_gen_node_extra(irb, arg0_node, scope, LValPtr, nullptr);
6872 if (arg0_value == irb->codegen->invalid_inst_src)
58236873 return arg0_value;
58246874
58256875 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5826 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5827 if (arg1_value == irb->codegen->invalid_instruction)
6876 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6877 if (arg1_value == irb->codegen->invalid_inst_src)
58286878 return arg1_value;
58296879
5830 IrInstruction *ptr_instruction = ir_build_field_ptr_instruction(irb, scope, node,
6880 IrInstSrc *ptr_instruction = ir_build_field_ptr_instruction(irb, scope, node,
58316881 arg0_value, arg1_value, false);
58326882
58336883 if (lval == LValPtr)
58346884 return ptr_instruction;
58356885
5836 IrInstruction *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);
6886 IrInstSrc *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);
58376887 return ir_expr_wrap(irb, scope, load_ptr, result_loc);
58386888 }
58396889 case BuiltinFnIdHasField:
58406890 {
58416891 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5842 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5843 if (arg0_value == irb->codegen->invalid_instruction)
6892 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6893 if (arg0_value == irb->codegen->invalid_inst_src)
58446894 return arg0_value;
58456895
58466896 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5847 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5848 if (arg1_value == irb->codegen->invalid_instruction)
6897 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6898 if (arg1_value == irb->codegen->invalid_inst_src)
58496899 return arg1_value;
58506900
5851 IrInstruction *type_info = ir_build_has_field(irb, scope, node, arg0_value, arg1_value);
6901 IrInstSrc *type_info = ir_build_has_field(irb, scope, node, arg0_value, arg1_value);
58526902 return ir_lval_wrap(irb, scope, type_info, lval, result_loc);
58536903 }
58546904 case BuiltinFnIdTypeInfo:
58556905 {
58566906 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5857 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5858 if (arg0_value == irb->codegen->invalid_instruction)
6907 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6908 if (arg0_value == irb->codegen->invalid_inst_src)
58596909 return arg0_value;
58606910
5861 IrInstruction *type_info = ir_build_type_info(irb, scope, node, arg0_value);
6911 IrInstSrc *type_info = ir_build_type_info(irb, scope, node, arg0_value);
58626912 return ir_lval_wrap(irb, scope, type_info, lval, result_loc);
58636913 }
58646914 case BuiltinFnIdType:
58656915 {
58666916 AstNode *arg_node = node->data.fn_call_expr.params.at(0);
5867 IrInstruction *arg = ir_gen_node(irb, arg_node, scope);
5868 if (arg == irb->codegen->invalid_instruction)
6917 IrInstSrc *arg = ir_gen_node(irb, arg_node, scope);
6918 if (arg == irb->codegen->invalid_inst_src)
58696919 return arg;
58706920
5871 IrInstruction *type = ir_build_type(irb, scope, node, arg);
6921 IrInstSrc *type = ir_build_type(irb, scope, node, arg);
58726922 return ir_lval_wrap(irb, scope, type, lval, result_loc);
58736923 }
58746924 case BuiltinFnIdBreakpoint:
58756925 return ir_lval_wrap(irb, scope, ir_build_breakpoint(irb, scope, node), lval, result_loc);
58766926 case BuiltinFnIdReturnAddress:
5877 return ir_lval_wrap(irb, scope, ir_build_return_address(irb, scope, node), lval, result_loc);
6927 return ir_lval_wrap(irb, scope, ir_build_return_address_src(irb, scope, node), lval, result_loc);
58786928 case BuiltinFnIdFrameAddress:
5879 return ir_lval_wrap(irb, scope, ir_build_frame_address(irb, scope, node), lval, result_loc);
6929 return ir_lval_wrap(irb, scope, ir_build_frame_address_src(irb, scope, node), lval, result_loc);
58806930 case BuiltinFnIdFrameHandle:
58816931 if (!irb->exec->fn_entry) {
58826932 add_node_error(irb->codegen, node, buf_sprintf("@frame() called outside of function definition"));
5883 return irb->codegen->invalid_instruction;
6933 return irb->codegen->invalid_inst_src;
58846934 }
5885 return ir_lval_wrap(irb, scope, ir_build_handle(irb, scope, node), lval, result_loc);
6935 return ir_lval_wrap(irb, scope, ir_build_handle_src(irb, scope, node), lval, result_loc);
58866936 case BuiltinFnIdFrameType: {
58876937 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5888 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5889 if (arg0_value == irb->codegen->invalid_instruction)
6938 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6939 if (arg0_value == irb->codegen->invalid_inst_src)
58906940 return arg0_value;
58916941
5892 IrInstruction *frame_type = ir_build_frame_type(irb, scope, node, arg0_value);
6942 IrInstSrc *frame_type = ir_build_frame_type(irb, scope, node, arg0_value);
58936943 return ir_lval_wrap(irb, scope, frame_type, lval, result_loc);
58946944 }
58956945 case BuiltinFnIdFrameSize: {
58966946 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5897 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5898 if (arg0_value == irb->codegen->invalid_instruction)
6947 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6948 if (arg0_value == irb->codegen->invalid_inst_src)
58996949 return arg0_value;
59006950
5901 IrInstruction *frame_size = ir_build_frame_size_src(irb, scope, node, arg0_value);
6951 IrInstSrc *frame_size = ir_build_frame_size_src(irb, scope, node, arg0_value);
59026952 return ir_lval_wrap(irb, scope, frame_size, lval, result_loc);
59036953 }
59046954 case BuiltinFnIdAlignOf:
59056955 {
59066956 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5907 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5908 if (arg0_value == irb->codegen->invalid_instruction)
6957 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6958 if (arg0_value == irb->codegen->invalid_inst_src)
59096959 return arg0_value;
59106960
5911 IrInstruction *align_of = ir_build_align_of(irb, scope, node, arg0_value);
6961 IrInstSrc *align_of = ir_build_align_of(irb, scope, node, arg0_value);
59126962 return ir_lval_wrap(irb, scope, align_of, lval, result_loc);
59136963 }
59146964 case BuiltinFnIdAddWithOverflow:
......@@ -5924,173 +6974,175 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
59246974 case BuiltinFnIdTypeName:
59256975 {
59266976 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5927 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5928 if (arg0_value == irb->codegen->invalid_instruction)
6977 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6978 if (arg0_value == irb->codegen->invalid_inst_src)
59296979 return arg0_value;
59306980
5931 IrInstruction *type_name = ir_build_type_name(irb, scope, node, arg0_value);
6981 IrInstSrc *type_name = ir_build_type_name(irb, scope, node, arg0_value);
59326982 return ir_lval_wrap(irb, scope, type_name, lval, result_loc);
59336983 }
59346984 case BuiltinFnIdPanic:
59356985 {
59366986 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5937 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5938 if (arg0_value == irb->codegen->invalid_instruction)
6987 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6988 if (arg0_value == irb->codegen->invalid_inst_src)
59396989 return arg0_value;
59406990
5941 IrInstruction *panic = ir_build_panic(irb, scope, node, arg0_value);
6991 IrInstSrc *panic = ir_build_panic_src(irb, scope, node, arg0_value);
59426992 return ir_lval_wrap(irb, scope, panic, lval, result_loc);
59436993 }
59446994 case BuiltinFnIdPtrCast:
59456995 {
59466996 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5947 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5948 if (arg0_value == irb->codegen->invalid_instruction)
6997 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6998 if (arg0_value == irb->codegen->invalid_inst_src)
59496999 return arg0_value;
59507000
59517001 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5952 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5953 if (arg1_value == irb->codegen->invalid_instruction)
7002 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7003 if (arg1_value == irb->codegen->invalid_inst_src)
59547004 return arg1_value;
59557005
5956 IrInstruction *ptr_cast = ir_build_ptr_cast_src(irb, scope, node, arg0_value, arg1_value, true);
7006 IrInstSrc *ptr_cast = ir_build_ptr_cast_src(irb, scope, node, arg0_value, arg1_value, true);
59577007 return ir_lval_wrap(irb, scope, ptr_cast, lval, result_loc);
59587008 }
59597009 case BuiltinFnIdBitCast:
59607010 {
59617011 AstNode *dest_type_node = node->data.fn_call_expr.params.at(0);
5962 IrInstruction *dest_type = ir_gen_node(irb, dest_type_node, scope);
5963 if (dest_type == irb->codegen->invalid_instruction)
7012 IrInstSrc *dest_type = ir_gen_node(irb, dest_type_node, scope);
7013 if (dest_type == irb->codegen->invalid_inst_src)
59647014 return dest_type;
59657015
59667016 ResultLocBitCast *result_loc_bit_cast = allocate<ResultLocBitCast>(1);
59677017 result_loc_bit_cast->base.id = ResultLocIdBitCast;
59687018 result_loc_bit_cast->base.source_instruction = dest_type;
7019 result_loc_bit_cast->base.allow_write_through_const = result_loc->allow_write_through_const;
59697020 ir_ref_instruction(dest_type, irb->current_basic_block);
59707021 result_loc_bit_cast->parent = result_loc;
59717022
59727023 ir_build_reset_result(irb, scope, node, &result_loc_bit_cast->base);
59737024
59747025 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5975 IrInstruction *arg1_value = ir_gen_node_extra(irb, arg1_node, scope, LValNone,
7026 IrInstSrc *arg1_value = ir_gen_node_extra(irb, arg1_node, scope, LValNone,
59767027 &result_loc_bit_cast->base);
5977 if (arg1_value == irb->codegen->invalid_instruction)
7028 if (arg1_value == irb->codegen->invalid_inst_src)
59787029 return arg1_value;
59797030
5980 IrInstruction *bitcast = ir_build_bit_cast_src(irb, scope, arg1_node, arg1_value, result_loc_bit_cast);
7031 IrInstSrc *bitcast = ir_build_bit_cast_src(irb, scope, arg1_node, arg1_value, result_loc_bit_cast);
59817032 return ir_lval_wrap(irb, scope, bitcast, lval, result_loc);
59827033 }
59837034 case BuiltinFnIdAs:
59847035 {
59857036 AstNode *dest_type_node = node->data.fn_call_expr.params.at(0);
5986 IrInstruction *dest_type = ir_gen_node(irb, dest_type_node, scope);
5987 if (dest_type == irb->codegen->invalid_instruction)
7037 IrInstSrc *dest_type = ir_gen_node(irb, dest_type_node, scope);
7038 if (dest_type == irb->codegen->invalid_inst_src)
59887039 return dest_type;
59897040
59907041 ResultLocCast *result_loc_cast = ir_build_cast_result_loc(irb, dest_type, result_loc);
59917042
59927043 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5993 IrInstruction *arg1_value = ir_gen_node_extra(irb, arg1_node, scope, LValNone,
7044 IrInstSrc *arg1_value = ir_gen_node_extra(irb, arg1_node, scope, LValNone,
59947045 &result_loc_cast->base);
5995 if (arg1_value == irb->codegen->invalid_instruction)
7046 if (arg1_value == irb->codegen->invalid_inst_src)
59967047 return arg1_value;
59977048
5998 IrInstruction *result = ir_build_implicit_cast(irb, scope, node, arg1_value, result_loc_cast);
7049 IrInstSrc *result = ir_build_implicit_cast(irb, scope, node, arg1_value, result_loc_cast);
59997050 return ir_lval_wrap(irb, scope, result, lval, result_loc);
60007051 }
60017052 case BuiltinFnIdIntToPtr:
60027053 {
60037054 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6004 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6005 if (arg0_value == irb->codegen->invalid_instruction)
7055 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7056 if (arg0_value == irb->codegen->invalid_inst_src)
60067057 return arg0_value;
60077058
60087059 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6009 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6010 if (arg1_value == irb->codegen->invalid_instruction)
7060 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7061 if (arg1_value == irb->codegen->invalid_inst_src)
60117062 return arg1_value;
60127063
6013 IrInstruction *int_to_ptr = ir_build_int_to_ptr(irb, scope, node, arg0_value, arg1_value);
7064 IrInstSrc *int_to_ptr = ir_build_int_to_ptr_src(irb, scope, node, arg0_value, arg1_value);
60147065 return ir_lval_wrap(irb, scope, int_to_ptr, lval, result_loc);
60157066 }
60167067 case BuiltinFnIdPtrToInt:
60177068 {
60187069 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6019 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6020 if (arg0_value == irb->codegen->invalid_instruction)
7070 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7071 if (arg0_value == irb->codegen->invalid_inst_src)
60217072 return arg0_value;
60227073
6023 IrInstruction *ptr_to_int = ir_build_ptr_to_int(irb, scope, node, arg0_value);
7074 IrInstSrc *ptr_to_int = ir_build_ptr_to_int_src(irb, scope, node, arg0_value);
60247075 return ir_lval_wrap(irb, scope, ptr_to_int, lval, result_loc);
60257076 }
60267077 case BuiltinFnIdTagName:
60277078 {
60287079 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6029 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6030 if (arg0_value == irb->codegen->invalid_instruction)
7080 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7081 if (arg0_value == irb->codegen->invalid_inst_src)
60317082 return arg0_value;
60327083
6033 IrInstruction *tag_name = ir_build_tag_name(irb, scope, node, arg0_value);
7084 IrInstSrc *tag_name = ir_build_tag_name_src(irb, scope, node, arg0_value);
60347085 return ir_lval_wrap(irb, scope, tag_name, lval, result_loc);
60357086 }
60367087 case BuiltinFnIdTagType:
60377088 {
60387089 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6039 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6040 if (arg0_value == irb->codegen->invalid_instruction)
7090 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7091 if (arg0_value == irb->codegen->invalid_inst_src)
60417092 return arg0_value;
60427093
6043 IrInstruction *tag_type = ir_build_tag_type(irb, scope, node, arg0_value);
7094 IrInstSrc *tag_type = ir_build_tag_type(irb, scope, node, arg0_value);
60447095 return ir_lval_wrap(irb, scope, tag_type, lval, result_loc);
60457096 }
60467097 case BuiltinFnIdFieldParentPtr:
60477098 {
60487099 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6049 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6050 if (arg0_value == irb->codegen->invalid_instruction)
7100 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7101 if (arg0_value == irb->codegen->invalid_inst_src)
60517102 return arg0_value;
60527103
60537104 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6054 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6055 if (arg1_value == irb->codegen->invalid_instruction)
7105 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7106 if (arg1_value == irb->codegen->invalid_inst_src)
60567107 return arg1_value;
60577108
60587109 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
6059 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
6060 if (arg2_value == irb->codegen->invalid_instruction)
7110 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
7111 if (arg2_value == irb->codegen->invalid_inst_src)
60617112 return arg2_value;
60627113
6063 IrInstruction *field_parent_ptr = ir_build_field_parent_ptr(irb, scope, node, arg0_value, arg1_value, arg2_value, nullptr);
7114 IrInstSrc *field_parent_ptr = ir_build_field_parent_ptr_src(irb, scope, node,
7115 arg0_value, arg1_value, arg2_value);
60647116 return ir_lval_wrap(irb, scope, field_parent_ptr, lval, result_loc);
60657117 }
60667118 case BuiltinFnIdByteOffsetOf:
60677119 {
60687120 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6069 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6070 if (arg0_value == irb->codegen->invalid_instruction)
7121 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7122 if (arg0_value == irb->codegen->invalid_inst_src)
60717123 return arg0_value;
60727124
60737125 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6074 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6075 if (arg1_value == irb->codegen->invalid_instruction)
7126 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7127 if (arg1_value == irb->codegen->invalid_inst_src)
60767128 return arg1_value;
60777129
6078 IrInstruction *offset_of = ir_build_byte_offset_of(irb, scope, node, arg0_value, arg1_value);
7130 IrInstSrc *offset_of = ir_build_byte_offset_of(irb, scope, node, arg0_value, arg1_value);
60797131 return ir_lval_wrap(irb, scope, offset_of, lval, result_loc);
60807132 }
60817133 case BuiltinFnIdBitOffsetOf:
60827134 {
60837135 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6084 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6085 if (arg0_value == irb->codegen->invalid_instruction)
7136 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7137 if (arg0_value == irb->codegen->invalid_inst_src)
60867138 return arg0_value;
60877139
60887140 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6089 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6090 if (arg1_value == irb->codegen->invalid_instruction)
7141 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7142 if (arg1_value == irb->codegen->invalid_inst_src)
60917143 return arg1_value;
60927144
6093 IrInstruction *offset_of = ir_build_bit_offset_of(irb, scope, node, arg0_value, arg1_value);
7145 IrInstSrc *offset_of = ir_build_bit_offset_of(irb, scope, node, arg0_value, arg1_value);
60947146 return ir_lval_wrap(irb, scope, offset_of, lval, result_loc);
60957147 }
60967148 case BuiltinFnIdNewStackCall:
......@@ -6099,45 +7151,45 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
60997151 add_node_error(irb->codegen, node,
61007152 buf_sprintf("expected at least 2 arguments, found %" ZIG_PRI_usize,
61017153 node->data.fn_call_expr.params.length));
6102 return irb->codegen->invalid_instruction;
7154 return irb->codegen->invalid_inst_src;
61037155 }
61047156
61057157 AstNode *new_stack_node = node->data.fn_call_expr.params.at(0);
6106 IrInstruction *new_stack = ir_gen_node(irb, new_stack_node, scope);
6107 if (new_stack == irb->codegen->invalid_instruction)
7158 IrInstSrc *new_stack = ir_gen_node(irb, new_stack_node, scope);
7159 if (new_stack == irb->codegen->invalid_inst_src)
61087160 return new_stack;
61097161
61107162 AstNode *fn_ref_node = node->data.fn_call_expr.params.at(1);
6111 IrInstruction *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
6112 if (fn_ref == irb->codegen->invalid_instruction)
7163 IrInstSrc *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
7164 if (fn_ref == irb->codegen->invalid_inst_src)
61137165 return fn_ref;
61147166
61157167 size_t arg_count = node->data.fn_call_expr.params.length - 2;
61167168
6117 IrInstruction **args = allocate<IrInstruction*>(arg_count);
7169 IrInstSrc **args = allocate<IrInstSrc*>(arg_count);
61187170 for (size_t i = 0; i < arg_count; i += 1) {
61197171 AstNode *arg_node = node->data.fn_call_expr.params.at(i + 2);
61207172 args[i] = ir_gen_node(irb, arg_node, scope);
6121 if (args[i] == irb->codegen->invalid_instruction)
7173 if (args[i] == irb->codegen->invalid_inst_src)
61227174 return args[i];
61237175 }
61247176
6125 IrInstruction *call = ir_build_call_src(irb, scope, node, nullptr, fn_ref, arg_count, args,
7177 IrInstSrc *call = ir_build_call_src(irb, scope, node, nullptr, fn_ref, arg_count, args,
61267178 nullptr, CallModifierNone, false, new_stack, result_loc);
61277179 return ir_lval_wrap(irb, scope, call, lval, result_loc);
61287180 }
61297181 case BuiltinFnIdCall: {
61307182 // Cast the options parameter to the options type
61317183 ZigType *options_type = get_builtin_type(irb->codegen, "CallOptions");
6132 IrInstruction *options_type_inst = ir_build_const_type(irb, scope, node, options_type);
7184 IrInstSrc *options_type_inst = ir_build_const_type(irb, scope, node, options_type);
61337185 ResultLocCast *result_loc_cast = ir_build_cast_result_loc(irb, options_type_inst, no_result_loc());
61347186
61357187 AstNode *options_node = node->data.fn_call_expr.params.at(0);
6136 IrInstruction *options_inner = ir_gen_node_extra(irb, options_node, scope,
7188 IrInstSrc *options_inner = ir_gen_node_extra(irb, options_node, scope,
61377189 LValNone, &result_loc_cast->base);
6138 if (options_inner == irb->codegen->invalid_instruction)
7190 if (options_inner == irb->codegen->invalid_inst_src)
61397191 return options_inner;
6140 IrInstruction *options = ir_build_implicit_cast(irb, scope, options_node, options_inner, result_loc_cast);
7192 IrInstSrc *options = ir_build_implicit_cast(irb, scope, options_node, options_inner, result_loc_cast);
61417193
61427194 AstNode *fn_ref_node = node->data.fn_call_expr.params.at(1);
61437195 AstNode *args_node = node->data.fn_call_expr.params.at(2);
......@@ -6153,18 +7205,18 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
61537205 } else {
61547206 exec_add_error_node(irb->codegen, irb->exec, args_node,
61557207 buf_sprintf("TODO: @call with anon struct literal"));
6156 return irb->codegen->invalid_instruction;
7208 return irb->codegen->invalid_inst_src;
61577209 }
61587210 } else {
6159 IrInstruction *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
6160 if (fn_ref == irb->codegen->invalid_instruction)
7211 IrInstSrc *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
7212 if (fn_ref == irb->codegen->invalid_inst_src)
61617213 return fn_ref;
61627214
6163 IrInstruction *args = ir_gen_node(irb, args_node, scope);
6164 if (args == irb->codegen->invalid_instruction)
7215 IrInstSrc *args = ir_gen_node(irb, args_node, scope);
7216 if (args == irb->codegen->invalid_inst_src)
61657217 return args;
61667218
6167 IrInstruction *call = ir_build_call_extra(irb, scope, node, options, fn_ref, args, result_loc);
7219 IrInstSrc *call = ir_build_call_extra(irb, scope, node, options, fn_ref, args, result_loc);
61687220 return ir_lval_wrap(irb, scope, call, lval, result_loc);
61697221 }
61707222 }
......@@ -6173,237 +7225,233 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
61737225 case BuiltinFnIdTypeId:
61747226 {
61757227 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6176 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6177 if (arg0_value == irb->codegen->invalid_instruction)
7228 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7229 if (arg0_value == irb->codegen->invalid_inst_src)
61787230 return arg0_value;
61797231
6180 IrInstruction *type_id = ir_build_type_id(irb, scope, node, arg0_value);
7232 IrInstSrc *type_id = ir_build_type_id(irb, scope, node, arg0_value);
61817233 return ir_lval_wrap(irb, scope, type_id, lval, result_loc);
61827234 }
61837235 case BuiltinFnIdShlExact:
61847236 {
61857237 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6186 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6187 if (arg0_value == irb->codegen->invalid_instruction)
7238 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7239 if (arg0_value == irb->codegen->invalid_inst_src)
61887240 return arg0_value;
61897241
61907242 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6191 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6192 if (arg1_value == irb->codegen->invalid_instruction)
7243 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7244 if (arg1_value == irb->codegen->invalid_inst_src)
61937245 return arg1_value;
61947246
6195 IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpBitShiftLeftExact, arg0_value, arg1_value, true);
7247 IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpBitShiftLeftExact, arg0_value, arg1_value, true);
61967248 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
61977249 }
61987250 case BuiltinFnIdShrExact:
61997251 {
62007252 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6201 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6202 if (arg0_value == irb->codegen->invalid_instruction)
7253 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7254 if (arg0_value == irb->codegen->invalid_inst_src)
62037255 return arg0_value;
62047256
62057257 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6206 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6207 if (arg1_value == irb->codegen->invalid_instruction)
7258 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7259 if (arg1_value == irb->codegen->invalid_inst_src)
62087260 return arg1_value;
62097261
6210 IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpBitShiftRightExact, arg0_value, arg1_value, true);
7262 IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpBitShiftRightExact, arg0_value, arg1_value, true);
62117263 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
62127264 }
62137265 case BuiltinFnIdSetEvalBranchQuota:
62147266 {
62157267 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6216 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6217 if (arg0_value == irb->codegen->invalid_instruction)
7268 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7269 if (arg0_value == irb->codegen->invalid_inst_src)
62187270 return arg0_value;
62197271
6220 IrInstruction *set_eval_branch_quota = ir_build_set_eval_branch_quota(irb, scope, node, arg0_value);
7272 IrInstSrc *set_eval_branch_quota = ir_build_set_eval_branch_quota(irb, scope, node, arg0_value);
62217273 return ir_lval_wrap(irb, scope, set_eval_branch_quota, lval, result_loc);
62227274 }
62237275 case BuiltinFnIdAlignCast:
62247276 {
62257277 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6226 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6227 if (arg0_value == irb->codegen->invalid_instruction)
7278 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7279 if (arg0_value == irb->codegen->invalid_inst_src)
62287280 return arg0_value;
62297281
62307282 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6231 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6232 if (arg1_value == irb->codegen->invalid_instruction)
7283 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7284 if (arg1_value == irb->codegen->invalid_inst_src)
62337285 return arg1_value;
62347286
6235 IrInstruction *align_cast = ir_build_align_cast(irb, scope, node, arg0_value, arg1_value);
7287 IrInstSrc *align_cast = ir_build_align_cast_src(irb, scope, node, arg0_value, arg1_value);
62367288 return ir_lval_wrap(irb, scope, align_cast, lval, result_loc);
62377289 }
62387290 case BuiltinFnIdOpaqueType:
62397291 {
6240 IrInstruction *opaque_type = ir_build_opaque_type(irb, scope, node);
7292 IrInstSrc *opaque_type = ir_build_opaque_type(irb, scope, node);
62417293 return ir_lval_wrap(irb, scope, opaque_type, lval, result_loc);
62427294 }
62437295 case BuiltinFnIdThis:
62447296 {
6245 IrInstruction *this_inst = ir_gen_this(irb, scope, node);
7297 IrInstSrc *this_inst = ir_gen_this(irb, scope, node);
62467298 return ir_lval_wrap(irb, scope, this_inst, lval, result_loc);
62477299 }
62487300 case BuiltinFnIdSetAlignStack:
62497301 {
62507302 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6251 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6252 if (arg0_value == irb->codegen->invalid_instruction)
7303 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7304 if (arg0_value == irb->codegen->invalid_inst_src)
62537305 return arg0_value;
62547306
6255 IrInstruction *set_align_stack = ir_build_set_align_stack(irb, scope, node, arg0_value);
7307 IrInstSrc *set_align_stack = ir_build_set_align_stack(irb, scope, node, arg0_value);
62567308 return ir_lval_wrap(irb, scope, set_align_stack, lval, result_loc);
62577309 }
62587310 case BuiltinFnIdArgType:
62597311 {
62607312 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6261 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6262 if (arg0_value == irb->codegen->invalid_instruction)
7313 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7314 if (arg0_value == irb->codegen->invalid_inst_src)
62637315 return arg0_value;
62647316
62657317 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6266 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6267 if (arg1_value == irb->codegen->invalid_instruction)
7318 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7319 if (arg1_value == irb->codegen->invalid_inst_src)
62687320 return arg1_value;
62697321
6270 IrInstruction *arg_type = ir_build_arg_type(irb, scope, node, arg0_value, arg1_value, false);
7322 IrInstSrc *arg_type = ir_build_arg_type(irb, scope, node, arg0_value, arg1_value, false);
62717323 return ir_lval_wrap(irb, scope, arg_type, lval, result_loc);
62727324 }
62737325 case BuiltinFnIdExport:
62747326 {
62757327 // Cast the options parameter to the options type
62767328 ZigType *options_type = get_builtin_type(irb->codegen, "ExportOptions");
6277 IrInstruction *options_type_inst = ir_build_const_type(irb, scope, node, options_type);
7329 IrInstSrc *options_type_inst = ir_build_const_type(irb, scope, node, options_type);
62787330 ResultLocCast *result_loc_cast = ir_build_cast_result_loc(irb, options_type_inst, no_result_loc());
62797331
62807332 AstNode *target_node = node->data.fn_call_expr.params.at(0);
6281 IrInstruction *target_value = ir_gen_node(irb, target_node, scope);
6282 if (target_value == irb->codegen->invalid_instruction)
7333 IrInstSrc *target_value = ir_gen_node(irb, target_node, scope);
7334 if (target_value == irb->codegen->invalid_inst_src)
62837335 return target_value;
62847336
62857337 AstNode *options_node = node->data.fn_call_expr.params.at(1);
6286 IrInstruction *options_value = ir_gen_node_extra(irb, options_node,
7338 IrInstSrc *options_value = ir_gen_node_extra(irb, options_node,
62877339 scope, LValNone, &result_loc_cast->base);
6288 if (options_value == irb->codegen->invalid_instruction)
7340 if (options_value == irb->codegen->invalid_inst_src)
62897341 return options_value;
62907342
6291 IrInstruction *casted_options_value = ir_build_implicit_cast(
7343 IrInstSrc *casted_options_value = ir_build_implicit_cast(
62927344 irb, scope, options_node, options_value, result_loc_cast);
62937345
6294 IrInstruction *ir_export = ir_build_export(irb, scope, node, target_value, casted_options_value);
7346 IrInstSrc *ir_export = ir_build_export(irb, scope, node, target_value, casted_options_value);
62957347 return ir_lval_wrap(irb, scope, ir_export, lval, result_loc);
62967348 }
62977349 case BuiltinFnIdErrorReturnTrace:
62987350 {
6299 IrInstruction *error_return_trace = ir_build_error_return_trace(irb, scope, node, IrInstructionErrorReturnTrace::Null);
7351 IrInstSrc *error_return_trace = ir_build_error_return_trace_src(irb, scope, node,
7352 IrInstErrorReturnTraceNull);
63007353 return ir_lval_wrap(irb, scope, error_return_trace, lval, result_loc);
63017354 }
63027355 case BuiltinFnIdAtomicRmw:
63037356 {
63047357 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6305 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6306 if (arg0_value == irb->codegen->invalid_instruction)
7358 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7359 if (arg0_value == irb->codegen->invalid_inst_src)
63077360 return arg0_value;
63087361
63097362 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6310 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6311 if (arg1_value == irb->codegen->invalid_instruction)
7363 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7364 if (arg1_value == irb->codegen->invalid_inst_src)
63127365 return arg1_value;
63137366
63147367 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
6315 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
6316 if (arg2_value == irb->codegen->invalid_instruction)
7368 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
7369 if (arg2_value == irb->codegen->invalid_inst_src)
63177370 return arg2_value;
63187371
63197372 AstNode *arg3_node = node->data.fn_call_expr.params.at(3);
6320 IrInstruction *arg3_value = ir_gen_node(irb, arg3_node, scope);
6321 if (arg3_value == irb->codegen->invalid_instruction)
7373 IrInstSrc *arg3_value = ir_gen_node(irb, arg3_node, scope);
7374 if (arg3_value == irb->codegen->invalid_inst_src)
63227375 return arg3_value;
63237376
63247377 AstNode *arg4_node = node->data.fn_call_expr.params.at(4);
6325 IrInstruction *arg4_value = ir_gen_node(irb, arg4_node, scope);
6326 if (arg4_value == irb->codegen->invalid_instruction)
7378 IrInstSrc *arg4_value = ir_gen_node(irb, arg4_node, scope);
7379 if (arg4_value == irb->codegen->invalid_inst_src)
63277380 return arg4_value;
63287381
6329 IrInstruction *inst = ir_build_atomic_rmw(irb, scope, node, arg0_value, arg1_value, arg2_value, arg3_value,
6330 arg4_value,
6331 // these 2 values don't mean anything since we passed non-null values for other args
6332 AtomicRmwOp_xchg, AtomicOrderMonotonic);
7382 IrInstSrc *inst = ir_build_atomic_rmw_src(irb, scope, node,
7383 arg0_value, arg1_value, arg2_value, arg3_value, arg4_value);
63337384 return ir_lval_wrap(irb, scope, inst, lval, result_loc);
63347385 }
63357386 case BuiltinFnIdAtomicLoad:
63367387 {
63377388 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6338 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6339 if (arg0_value == irb->codegen->invalid_instruction)
7389 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7390 if (arg0_value == irb->codegen->invalid_inst_src)
63407391 return arg0_value;
63417392
63427393 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6343 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6344 if (arg1_value == irb->codegen->invalid_instruction)
7394 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7395 if (arg1_value == irb->codegen->invalid_inst_src)
63457396 return arg1_value;
63467397
63477398 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
6348 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
6349 if (arg2_value == irb->codegen->invalid_instruction)
7399 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
7400 if (arg2_value == irb->codegen->invalid_inst_src)
63507401 return arg2_value;
63517402
6352 IrInstruction *inst = ir_build_atomic_load(irb, scope, node, arg0_value, arg1_value, arg2_value,
6353 // this value does not mean anything since we passed non-null values for other arg
6354 AtomicOrderMonotonic);
7403 IrInstSrc *inst = ir_build_atomic_load_src(irb, scope, node, arg0_value, arg1_value, arg2_value);
63557404 return ir_lval_wrap(irb, scope, inst, lval, result_loc);
63567405 }
63577406 case BuiltinFnIdAtomicStore:
63587407 {
63597408 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6360 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6361 if (arg0_value == irb->codegen->invalid_instruction)
7409 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7410 if (arg0_value == irb->codegen->invalid_inst_src)
63627411 return arg0_value;
63637412
63647413 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6365 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6366 if (arg1_value == irb->codegen->invalid_instruction)
7414 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7415 if (arg1_value == irb->codegen->invalid_inst_src)
63677416 return arg1_value;
63687417
63697418 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
6370 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
6371 if (arg2_value == irb->codegen->invalid_instruction)
7419 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
7420 if (arg2_value == irb->codegen->invalid_inst_src)
63727421 return arg2_value;
63737422
63747423 AstNode *arg3_node = node->data.fn_call_expr.params.at(3);
6375 IrInstruction *arg3_value = ir_gen_node(irb, arg3_node, scope);
6376 if (arg3_value == irb->codegen->invalid_instruction)
7424 IrInstSrc *arg3_value = ir_gen_node(irb, arg3_node, scope);
7425 if (arg3_value == irb->codegen->invalid_inst_src)
63777426 return arg3_value;
63787427
6379 IrInstruction *inst = ir_build_atomic_store(irb, scope, node, arg0_value, arg1_value, arg2_value, arg3_value,
6380 // this value does not mean anything since we passed non-null values for other arg
6381 AtomicOrderMonotonic);
7428 IrInstSrc *inst = ir_build_atomic_store_src(irb, scope, node, arg0_value, arg1_value,
7429 arg2_value, arg3_value);
63827430 return ir_lval_wrap(irb, scope, inst, lval, result_loc);
63837431 }
63847432 case BuiltinFnIdIntToEnum:
63857433 {
63867434 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6387 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6388 if (arg0_value == irb->codegen->invalid_instruction)
7435 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7436 if (arg0_value == irb->codegen->invalid_inst_src)
63897437 return arg0_value;
63907438
63917439 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6392 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6393 if (arg1_value == irb->codegen->invalid_instruction)
7440 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7441 if (arg1_value == irb->codegen->invalid_inst_src)
63947442 return arg1_value;
63957443
6396 IrInstruction *result = ir_build_int_to_enum(irb, scope, node, arg0_value, arg1_value);
7444 IrInstSrc *result = ir_build_int_to_enum_src(irb, scope, node, arg0_value, arg1_value);
63977445 return ir_lval_wrap(irb, scope, result, lval, result_loc);
63987446 }
63997447 case BuiltinFnIdEnumToInt:
64007448 {
64017449 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6402 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6403 if (arg0_value == irb->codegen->invalid_instruction)
7450 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7451 if (arg0_value == irb->codegen->invalid_inst_src)
64047452 return arg0_value;
64057453
6406 IrInstruction *result = ir_build_enum_to_int(irb, scope, node, arg0_value);
7454 IrInstSrc *result = ir_build_enum_to_int(irb, scope, node, arg0_value);
64077455 return ir_lval_wrap(irb, scope, result, lval, result_loc);
64087456 }
64097457 case BuiltinFnIdCtz:
......@@ -6413,16 +7461,16 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
64137461 case BuiltinFnIdBitReverse:
64147462 {
64157463 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6416 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6417 if (arg0_value == irb->codegen->invalid_instruction)
7464 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7465 if (arg0_value == irb->codegen->invalid_inst_src)
64187466 return arg0_value;
64197467
64207468 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6421 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6422 if (arg1_value == irb->codegen->invalid_instruction)
7469 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7470 if (arg1_value == irb->codegen->invalid_inst_src)
64237471 return arg1_value;
64247472
6425 IrInstruction *result;
7473 IrInstSrc *result;
64267474 switch (builtin_fn->id) {
64277475 case BuiltinFnIdCtz:
64287476 result = ir_build_ctz(irb, scope, node, arg0_value, arg1_value);
......@@ -6447,28 +7495,28 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
64477495 case BuiltinFnIdHasDecl:
64487496 {
64497497 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6450 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6451 if (arg0_value == irb->codegen->invalid_instruction)
7498 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7499 if (arg0_value == irb->codegen->invalid_inst_src)
64527500 return arg0_value;
64537501
64547502 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6455 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6456 if (arg1_value == irb->codegen->invalid_instruction)
7503 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7504 if (arg1_value == irb->codegen->invalid_inst_src)
64577505 return arg1_value;
64587506
6459 IrInstruction *has_decl = ir_build_has_decl(irb, scope, node, arg0_value, arg1_value);
7507 IrInstSrc *has_decl = ir_build_has_decl(irb, scope, node, arg0_value, arg1_value);
64607508 return ir_lval_wrap(irb, scope, has_decl, lval, result_loc);
64617509 }
64627510 case BuiltinFnIdUnionInit:
64637511 {
64647512 AstNode *union_type_node = node->data.fn_call_expr.params.at(0);
6465 IrInstruction *union_type_inst = ir_gen_node(irb, union_type_node, scope);
6466 if (union_type_inst == irb->codegen->invalid_instruction)
7513 IrInstSrc *union_type_inst = ir_gen_node(irb, union_type_node, scope);
7514 if (union_type_inst == irb->codegen->invalid_inst_src)
64677515 return union_type_inst;
64687516
64697517 AstNode *name_node = node->data.fn_call_expr.params.at(1);
6470 IrInstruction *name_inst = ir_gen_node(irb, name_node, scope);
6471 if (name_inst == irb->codegen->invalid_instruction)
7518 IrInstSrc *name_inst = ir_gen_node(irb, name_node, scope);
7519 if (name_inst == irb->codegen->invalid_inst_src)
64727520 return name_inst;
64737521
64747522 AstNode *init_node = node->data.fn_call_expr.params.at(2);
......@@ -6480,7 +7528,7 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
64807528 zig_unreachable();
64817529}
64827530
6483static IrInstruction *ir_gen_fn_call(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
7531static IrInstSrc *ir_gen_fn_call(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
64847532 ResultLoc *result_loc)
64857533{
64867534 assert(node->type == NodeTypeFnCallExpr);
......@@ -6493,16 +7541,16 @@ static IrInstruction *ir_gen_fn_call(IrBuilder *irb, Scope *scope, AstNode *node
64937541 nullptr, node->data.fn_call_expr.params.items, node->data.fn_call_expr.params.length, lval, result_loc);
64947542}
64957543
6496static IrInstruction *ir_gen_if_bool_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
7544static IrInstSrc *ir_gen_if_bool_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
64977545 ResultLoc *result_loc)
64987546{
64997547 assert(node->type == NodeTypeIfBoolExpr);
65007548
6501 IrInstruction *condition = ir_gen_node(irb, node->data.if_bool_expr.condition, scope);
6502 if (condition == irb->codegen->invalid_instruction)
6503 return irb->codegen->invalid_instruction;
7549 IrInstSrc *condition = ir_gen_node(irb, node->data.if_bool_expr.condition, scope);
7550 if (condition == irb->codegen->invalid_inst_src)
7551 return irb->codegen->invalid_inst_src;
65047552
6505 IrInstruction *is_comptime;
7553 IrInstSrc *is_comptime;
65067554 if (ir_should_inline(irb->exec, scope)) {
65077555 is_comptime = ir_build_const_bool(irb, scope, node, true);
65087556 } else {
......@@ -6512,11 +7560,11 @@ static IrInstruction *ir_gen_if_bool_expr(IrBuilder *irb, Scope *scope, AstNode
65127560 AstNode *then_node = node->data.if_bool_expr.then_block;
65137561 AstNode *else_node = node->data.if_bool_expr.else_node;
65147562
6515 IrBasicBlock *then_block = ir_create_basic_block(irb, scope, "Then");
6516 IrBasicBlock *else_block = ir_create_basic_block(irb, scope, "Else");
6517 IrBasicBlock *endif_block = ir_create_basic_block(irb, scope, "EndIf");
7563 IrBasicBlockSrc *then_block = ir_create_basic_block(irb, scope, "Then");
7564 IrBasicBlockSrc *else_block = ir_create_basic_block(irb, scope, "Else");
7565 IrBasicBlockSrc *endif_block = ir_create_basic_block(irb, scope, "EndIf");
65187566
6519 IrInstruction *cond_br_inst = ir_build_cond_br(irb, scope, node, condition,
7567 IrInstSrc *cond_br_inst = ir_build_cond_br(irb, scope, node, condition,
65207568 then_block, else_block, is_comptime);
65217569 ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, else_block, endif_block,
65227570 result_loc, is_comptime);
......@@ -6524,70 +7572,70 @@ static IrInstruction *ir_gen_if_bool_expr(IrBuilder *irb, Scope *scope, AstNode
65247572 ir_set_cursor_at_end_and_append_block(irb, then_block);
65257573
65267574 Scope *subexpr_scope = create_runtime_scope(irb->codegen, node, scope, is_comptime);
6527 IrInstruction *then_expr_result = ir_gen_node_extra(irb, then_node, subexpr_scope, lval,
7575 IrInstSrc *then_expr_result = ir_gen_node_extra(irb, then_node, subexpr_scope, lval,
65287576 &peer_parent->peers.at(0)->base);
6529 if (then_expr_result == irb->codegen->invalid_instruction)
6530 return irb->codegen->invalid_instruction;
6531 IrBasicBlock *after_then_block = irb->current_basic_block;
7577 if (then_expr_result == irb->codegen->invalid_inst_src)
7578 return irb->codegen->invalid_inst_src;
7579 IrBasicBlockSrc *after_then_block = irb->current_basic_block;
65327580 if (!instr_is_unreachable(then_expr_result))
65337581 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
65347582
65357583 ir_set_cursor_at_end_and_append_block(irb, else_block);
6536 IrInstruction *else_expr_result;
7584 IrInstSrc *else_expr_result;
65377585 if (else_node) {
65387586 else_expr_result = ir_gen_node_extra(irb, else_node, subexpr_scope, lval, &peer_parent->peers.at(1)->base);
6539 if (else_expr_result == irb->codegen->invalid_instruction)
6540 return irb->codegen->invalid_instruction;
7587 if (else_expr_result == irb->codegen->invalid_inst_src)
7588 return irb->codegen->invalid_inst_src;
65417589 } else {
65427590 else_expr_result = ir_build_const_void(irb, scope, node);
65437591 ir_build_end_expr(irb, scope, node, else_expr_result, &peer_parent->peers.at(1)->base);
65447592 }
6545 IrBasicBlock *after_else_block = irb->current_basic_block;
7593 IrBasicBlockSrc *after_else_block = irb->current_basic_block;
65467594 if (!instr_is_unreachable(else_expr_result))
65477595 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
65487596
65497597 ir_set_cursor_at_end_and_append_block(irb, endif_block);
6550 IrInstruction **incoming_values = allocate<IrInstruction *>(2);
7598 IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
65517599 incoming_values[0] = then_expr_result;
65527600 incoming_values[1] = else_expr_result;
6553 IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");
7601 IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
65547602 incoming_blocks[0] = after_then_block;
65557603 incoming_blocks[1] = after_else_block;
65567604
6557 IrInstruction *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);
7605 IrInstSrc *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);
65587606 return ir_expr_wrap(irb, scope, phi, result_loc);
65597607}
65607608
6561static IrInstruction *ir_gen_prefix_op_id_lval(IrBuilder *irb, Scope *scope, AstNode *node, IrUnOp op_id, LVal lval) {
7609static IrInstSrc *ir_gen_prefix_op_id_lval(IrBuilderSrc *irb, Scope *scope, AstNode *node, IrUnOp op_id, LVal lval) {
65627610 assert(node->type == NodeTypePrefixOpExpr);
65637611 AstNode *expr_node = node->data.prefix_op_expr.primary_expr;
65647612
6565 IrInstruction *value = ir_gen_node_extra(irb, expr_node, scope, lval, nullptr);
6566 if (value == irb->codegen->invalid_instruction)
7613 IrInstSrc *value = ir_gen_node_extra(irb, expr_node, scope, lval, nullptr);
7614 if (value == irb->codegen->invalid_inst_src)
65677615 return value;
65687616
65697617 return ir_build_un_op(irb, scope, node, op_id, value);
65707618}
65717619
6572static IrInstruction *ir_gen_prefix_op_id(IrBuilder *irb, Scope *scope, AstNode *node, IrUnOp op_id) {
7620static IrInstSrc *ir_gen_prefix_op_id(IrBuilderSrc *irb, Scope *scope, AstNode *node, IrUnOp op_id) {
65737621 return ir_gen_prefix_op_id_lval(irb, scope, node, op_id, LValNone);
65747622}
65757623
6576static IrInstruction *ir_expr_wrap(IrBuilder *irb, Scope *scope, IrInstruction *inst, ResultLoc *result_loc) {
6577 if (inst == irb->codegen->invalid_instruction) return inst;
6578 ir_build_end_expr(irb, scope, inst->source_node, inst, result_loc);
7624static IrInstSrc *ir_expr_wrap(IrBuilderSrc *irb, Scope *scope, IrInstSrc *inst, ResultLoc *result_loc) {
7625 if (inst == irb->codegen->invalid_inst_src) return inst;
7626 ir_build_end_expr(irb, scope, inst->base.source_node, inst, result_loc);
65797627 return inst;
65807628}
65817629
6582static IrInstruction *ir_lval_wrap(IrBuilder *irb, Scope *scope, IrInstruction *value, LVal lval,
7630static IrInstSrc *ir_lval_wrap(IrBuilderSrc *irb, Scope *scope, IrInstSrc *value, LVal lval,
65837631 ResultLoc *result_loc)
65847632{
65857633 // This logic must be kept in sync with
65867634 // [STMT_EXPR_TEST_THING] <--- (search this token)
6587 if (value == irb->codegen->invalid_instruction ||
7635 if (value == irb->codegen->invalid_inst_src ||
65887636 instr_is_unreachable(value) ||
6589 value->source_node->type == NodeTypeDefer ||
6590 value->id == IrInstructionIdDeclVarSrc)
7637 value->base.source_node->type == NodeTypeDefer ||
7638 value->id == IrInstSrcIdDeclVar)
65917639 {
65927640 return value;
65937641 }
......@@ -6595,7 +7643,7 @@ static IrInstruction *ir_lval_wrap(IrBuilder *irb, Scope *scope, IrInstruction *
65957643 if (lval == LValPtr) {
65967644 // We needed a pointer to a value, but we got a value. So we create
65977645 // an instruction which just makes a pointer of it.
6598 return ir_build_ref(irb, scope, value->source_node, value, false, false);
7646 return ir_build_ref_src(irb, scope, value->base.source_node, value, false, false);
65997647 } else if (result_loc != nullptr) {
66007648 return ir_expr_wrap(irb, scope, value, result_loc);
66017649 } else {
......@@ -6618,7 +7666,7 @@ static PtrLen star_token_to_ptr_len(TokenId token_id) {
66187666 }
66197667}
66207668
6621static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode *node) {
7669static IrInstSrc *ir_gen_pointer_type(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
66227670 assert(node->type == NodeTypePointerType);
66237671
66247672 PtrLen ptr_len = star_token_to_ptr_len(node->data.pointer_type.star_token->id);
......@@ -6630,26 +7678,26 @@ static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode
66307678 AstNode *expr_node = node->data.pointer_type.op_expr;
66317679 AstNode *align_expr = node->data.pointer_type.align_expr;
66327680
6633 IrInstruction *sentinel;
7681 IrInstSrc *sentinel;
66347682 if (sentinel_expr != nullptr) {
66357683 sentinel = ir_gen_node(irb, sentinel_expr, scope);
6636 if (sentinel == irb->codegen->invalid_instruction)
7684 if (sentinel == irb->codegen->invalid_inst_src)
66377685 return sentinel;
66387686 } else {
66397687 sentinel = nullptr;
66407688 }
66417689
6642 IrInstruction *align_value;
7690 IrInstSrc *align_value;
66437691 if (align_expr != nullptr) {
66447692 align_value = ir_gen_node(irb, align_expr, scope);
6645 if (align_value == irb->codegen->invalid_instruction)
7693 if (align_value == irb->codegen->invalid_inst_src)
66467694 return align_value;
66477695 } else {
66487696 align_value = nullptr;
66497697 }
66507698
6651 IrInstruction *child_type = ir_gen_node(irb, expr_node, scope);
6652 if (child_type == irb->codegen->invalid_instruction)
7699 IrInstSrc *child_type = ir_gen_node(irb, expr_node, scope);
7700 if (child_type == irb->codegen->invalid_inst_src)
66537701 return child_type;
66547702
66557703 uint32_t bit_offset_start = 0;
......@@ -6659,7 +7707,7 @@ static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode
66597707 bigint_append_buf(val_buf, node->data.pointer_type.bit_offset_start, 10);
66607708 exec_add_error_node(irb->codegen, irb->exec, node,
66617709 buf_sprintf("value %s too large for u32 bit offset", buf_ptr(val_buf)));
6662 return irb->codegen->invalid_instruction;
7710 return irb->codegen->invalid_inst_src;
66637711 }
66647712 bit_offset_start = bigint_as_u32(node->data.pointer_type.bit_offset_start);
66657713 }
......@@ -6671,7 +7719,7 @@ static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode
66717719 bigint_append_buf(val_buf, node->data.pointer_type.host_int_bytes, 10);
66727720 exec_add_error_node(irb->codegen, irb->exec, node,
66737721 buf_sprintf("value %s too large for u32 byte count", buf_ptr(val_buf)));
6674 return irb->codegen->invalid_instruction;
7722 return irb->codegen->invalid_inst_src;
66757723 }
66767724 host_int_bytes = bigint_as_u32(node->data.pointer_type.host_int_bytes);
66777725 }
......@@ -6679,43 +7727,43 @@ static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode
66797727 if (host_int_bytes != 0 && bit_offset_start >= host_int_bytes * 8) {
66807728 exec_add_error_node(irb->codegen, irb->exec, node,
66817729 buf_sprintf("bit offset starts after end of host integer"));
6682 return irb->codegen->invalid_instruction;
7730 return irb->codegen->invalid_inst_src;
66837731 }
66847732
66857733 return ir_build_ptr_type(irb, scope, node, child_type, is_const, is_volatile,
66867734 ptr_len, sentinel, align_value, bit_offset_start, host_int_bytes, is_allow_zero);
66877735}
66887736
6689static IrInstruction *ir_gen_catch_unreachable(IrBuilder *irb, Scope *scope, AstNode *source_node,
7737static IrInstSrc *ir_gen_catch_unreachable(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
66907738 AstNode *expr_node, LVal lval, ResultLoc *result_loc)
66917739{
6692 IrInstruction *err_union_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
6693 if (err_union_ptr == irb->codegen->invalid_instruction)
6694 return irb->codegen->invalid_instruction;
7740 IrInstSrc *err_union_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
7741 if (err_union_ptr == irb->codegen->invalid_inst_src)
7742 return irb->codegen->invalid_inst_src;
66957743
6696 IrInstruction *payload_ptr = ir_build_unwrap_err_payload(irb, scope, source_node, err_union_ptr, true, false);
6697 if (payload_ptr == irb->codegen->invalid_instruction)
6698 return irb->codegen->invalid_instruction;
7744 IrInstSrc *payload_ptr = ir_build_unwrap_err_payload_src(irb, scope, source_node, err_union_ptr, true, false);
7745 if (payload_ptr == irb->codegen->invalid_inst_src)
7746 return irb->codegen->invalid_inst_src;
66997747
67007748 if (lval == LValPtr)
67017749 return payload_ptr;
67027750
6703 IrInstruction *load_ptr = ir_build_load_ptr(irb, scope, source_node, payload_ptr);
7751 IrInstSrc *load_ptr = ir_build_load_ptr(irb, scope, source_node, payload_ptr);
67047752 return ir_expr_wrap(irb, scope, load_ptr, result_loc);
67057753}
67067754
6707static IrInstruction *ir_gen_bool_not(IrBuilder *irb, Scope *scope, AstNode *node) {
7755static IrInstSrc *ir_gen_bool_not(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
67087756 assert(node->type == NodeTypePrefixOpExpr);
67097757 AstNode *expr_node = node->data.prefix_op_expr.primary_expr;
67107758
6711 IrInstruction *value = ir_gen_node(irb, expr_node, scope);
6712 if (value == irb->codegen->invalid_instruction)
6713 return irb->codegen->invalid_instruction;
7759 IrInstSrc *value = ir_gen_node(irb, expr_node, scope);
7760 if (value == irb->codegen->invalid_inst_src)
7761 return irb->codegen->invalid_inst_src;
67147762
67157763 return ir_build_bool_not(irb, scope, node, value);
67167764}
67177765
6718static IrInstruction *ir_gen_prefix_op_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
7766static IrInstSrc *ir_gen_prefix_op_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
67197767 ResultLoc *result_loc)
67207768{
67217769 assert(node->type == NodeTypePrefixOpExpr);
......@@ -6743,12 +7791,12 @@ static IrInstruction *ir_gen_prefix_op_expr(IrBuilder *irb, Scope *scope, AstNod
67437791 zig_unreachable();
67447792}
67457793
6746static IrInstruction *ir_gen_union_init_expr(IrBuilder *irb, Scope *scope, AstNode *source_node,
6747 IrInstruction *union_type, IrInstruction *field_name, AstNode *expr_node,
7794static IrInstSrc *ir_gen_union_init_expr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
7795 IrInstSrc *union_type, IrInstSrc *field_name, AstNode *expr_node,
67487796 LVal lval, ResultLoc *parent_result_loc)
67497797{
6750 IrInstruction *container_ptr = ir_build_resolve_result(irb, scope, source_node, parent_result_loc, union_type);
6751 IrInstruction *field_ptr = ir_build_field_ptr_instruction(irb, scope, source_node, container_ptr,
7798 IrInstSrc *container_ptr = ir_build_resolve_result(irb, scope, source_node, parent_result_loc, union_type);
7799 IrInstSrc *field_ptr = ir_build_field_ptr_instruction(irb, scope, source_node, container_ptr,
67527800 field_name, true);
67537801
67547802 ResultLocInstruction *result_loc_inst = allocate<ResultLocInstruction>(1);
......@@ -6757,18 +7805,18 @@ static IrInstruction *ir_gen_union_init_expr(IrBuilder *irb, Scope *scope, AstNo
67577805 ir_ref_instruction(field_ptr, irb->current_basic_block);
67587806 ir_build_reset_result(irb, scope, expr_node, &result_loc_inst->base);
67597807
6760 IrInstruction *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,
7808 IrInstSrc *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,
67617809 &result_loc_inst->base);
6762 if (expr_value == irb->codegen->invalid_instruction)
7810 if (expr_value == irb->codegen->invalid_inst_src)
67637811 return expr_value;
67647812
6765 IrInstruction *init_union = ir_build_union_init_named_field(irb, scope, source_node, union_type,
7813 IrInstSrc *init_union = ir_build_union_init_named_field(irb, scope, source_node, union_type,
67667814 field_name, field_ptr, container_ptr);
67677815
67687816 return ir_lval_wrap(irb, scope, init_union, lval, parent_result_loc);
67697817}
67707818
6771static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
7819static IrInstSrc *ir_gen_container_init_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
67727820 ResultLoc *parent_result_loc)
67737821{
67747822 assert(node->type == NodeTypeContainerInitExpr);
......@@ -6780,42 +7828,42 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
67807828 ResultLoc *child_result_loc;
67817829 AstNode *init_array_type_source_node;
67827830 if (container_init_expr->type != nullptr) {
6783 IrInstruction *container_type;
7831 IrInstSrc *container_type;
67847832 if (container_init_expr->type->type == NodeTypeInferredArrayType) {
67857833 if (kind == ContainerInitKindStruct) {
67867834 add_node_error(irb->codegen, container_init_expr->type,
67877835 buf_sprintf("initializing array with struct syntax"));
6788 return irb->codegen->invalid_instruction;
7836 return irb->codegen->invalid_inst_src;
67897837 }
6790 IrInstruction *sentinel;
7838 IrInstSrc *sentinel;
67917839 if (container_init_expr->type->data.inferred_array_type.sentinel != nullptr) {
67927840 sentinel = ir_gen_node(irb, container_init_expr->type->data.inferred_array_type.sentinel, scope);
6793 if (sentinel == irb->codegen->invalid_instruction)
7841 if (sentinel == irb->codegen->invalid_inst_src)
67947842 return sentinel;
67957843 } else {
67967844 sentinel = nullptr;
67977845 }
67987846
6799 IrInstruction *elem_type = ir_gen_node(irb,
7847 IrInstSrc *elem_type = ir_gen_node(irb,
68007848 container_init_expr->type->data.inferred_array_type.child_type, scope);
6801 if (elem_type == irb->codegen->invalid_instruction)
7849 if (elem_type == irb->codegen->invalid_inst_src)
68027850 return elem_type;
68037851 size_t item_count = container_init_expr->entries.length;
6804 IrInstruction *item_count_inst = ir_build_const_usize(irb, scope, node, item_count);
7852 IrInstSrc *item_count_inst = ir_build_const_usize(irb, scope, node, item_count);
68057853 container_type = ir_build_array_type(irb, scope, node, item_count_inst, sentinel, elem_type);
68067854 } else {
68077855 container_type = ir_gen_node(irb, container_init_expr->type, scope);
6808 if (container_type == irb->codegen->invalid_instruction)
7856 if (container_type == irb->codegen->invalid_inst_src)
68097857 return container_type;
68107858 }
68117859
68127860 result_loc_cast = ir_build_cast_result_loc(irb, container_type, parent_result_loc);
68137861 child_result_loc = &result_loc_cast->base;
6814 init_array_type_source_node = container_type->source_node;
7862 init_array_type_source_node = container_type->base.source_node;
68157863 } else {
68167864 child_result_loc = parent_result_loc;
68177865 if (parent_result_loc->source_instruction != nullptr) {
6818 init_array_type_source_node = parent_result_loc->source_instruction->source_node;
7866 init_array_type_source_node = parent_result_loc->source_instruction->base.source_node;
68197867 } else {
68207868 init_array_type_source_node = node;
68217869 }
......@@ -6823,11 +7871,11 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
68237871
68247872 switch (kind) {
68257873 case ContainerInitKindStruct: {
6826 IrInstruction *container_ptr = ir_build_resolve_result(irb, scope, node, child_result_loc,
7874 IrInstSrc *container_ptr = ir_build_resolve_result(irb, scope, node, child_result_loc,
68277875 nullptr);
68287876
68297877 size_t field_count = container_init_expr->entries.length;
6830 IrInstructionContainerInitFieldsField *fields = allocate<IrInstructionContainerInitFieldsField>(field_count);
7878 IrInstSrcContainerInitFieldsField *fields = allocate<IrInstSrcContainerInitFieldsField>(field_count);
68317879 for (size_t i = 0; i < field_count; i += 1) {
68327880 AstNode *entry_node = container_init_expr->entries.at(i);
68337881 assert(entry_node->type == NodeTypeStructValueField);
......@@ -6835,7 +7883,7 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
68357883 Buf *name = entry_node->data.struct_val_field.name;
68367884 AstNode *expr_node = entry_node->data.struct_val_field.expr;
68377885
6838 IrInstruction *field_ptr = ir_build_field_ptr(irb, scope, entry_node, container_ptr, name, true);
7886 IrInstSrc *field_ptr = ir_build_field_ptr(irb, scope, entry_node, container_ptr, name, true);
68397887 ResultLocInstruction *result_loc_inst = allocate<ResultLocInstruction>(1);
68407888 result_loc_inst->base.id = ResultLocIdInstruction;
68417889 result_loc_inst->base.source_instruction = field_ptr;
......@@ -6843,16 +7891,16 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
68437891 ir_ref_instruction(field_ptr, irb->current_basic_block);
68447892 ir_build_reset_result(irb, scope, expr_node, &result_loc_inst->base);
68457893
6846 IrInstruction *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,
7894 IrInstSrc *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,
68477895 &result_loc_inst->base);
6848 if (expr_value == irb->codegen->invalid_instruction)
7896 if (expr_value == irb->codegen->invalid_inst_src)
68497897 return expr_value;
68507898
68517899 fields[i].name = name;
68527900 fields[i].source_node = entry_node;
68537901 fields[i].result_loc = field_ptr;
68547902 }
6855 IrInstruction *result = ir_build_container_init_fields(irb, scope, node, field_count,
7903 IrInstSrc *result = ir_build_container_init_fields(irb, scope, node, field_count,
68567904 fields, container_ptr);
68577905
68587906 if (result_loc_cast != nullptr) {
......@@ -6863,15 +7911,15 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
68637911 case ContainerInitKindArray: {
68647912 size_t item_count = container_init_expr->entries.length;
68657913
6866 IrInstruction *container_ptr = ir_build_resolve_result(irb, scope, node, child_result_loc,
7914 IrInstSrc *container_ptr = ir_build_resolve_result(irb, scope, node, child_result_loc,
68677915 nullptr);
68687916
6869 IrInstruction **result_locs = allocate<IrInstruction *>(item_count);
7917 IrInstSrc **result_locs = allocate<IrInstSrc *>(item_count);
68707918 for (size_t i = 0; i < item_count; i += 1) {
68717919 AstNode *expr_node = container_init_expr->entries.at(i);
68727920
6873 IrInstruction *elem_index = ir_build_const_usize(irb, scope, expr_node, i);
6874 IrInstruction *elem_ptr = ir_build_elem_ptr(irb, scope, expr_node, container_ptr,
7921 IrInstSrc *elem_index = ir_build_const_usize(irb, scope, expr_node, i);
7922 IrInstSrc *elem_ptr = ir_build_elem_ptr(irb, scope, expr_node, container_ptr,
68757923 elem_index, false, PtrLenSingle, init_array_type_source_node);
68767924 ResultLocInstruction *result_loc_inst = allocate<ResultLocInstruction>(1);
68777925 result_loc_inst->base.id = ResultLocIdInstruction;
......@@ -6880,14 +7928,14 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
68807928 ir_ref_instruction(elem_ptr, irb->current_basic_block);
68817929 ir_build_reset_result(irb, scope, expr_node, &result_loc_inst->base);
68827930
6883 IrInstruction *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,
7931 IrInstSrc *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,
68847932 &result_loc_inst->base);
6885 if (expr_value == irb->codegen->invalid_instruction)
7933 if (expr_value == irb->codegen->invalid_inst_src)
68867934 return expr_value;
68877935
68887936 result_locs[i] = elem_ptr;
68897937 }
6890 IrInstruction *result = ir_build_container_init_list(irb, scope, node, item_count,
7938 IrInstSrc *result = ir_build_container_init_list(irb, scope, node, item_count,
68917939 result_locs, container_ptr, init_array_type_source_node);
68927940 if (result_loc_cast != nullptr) {
68937941 result = ir_build_implicit_cast(irb, scope, node, result, result_loc_cast);
......@@ -6898,19 +7946,19 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
68987946 zig_unreachable();
68997947}
69007948
6901static ResultLocVar *ir_build_var_result_loc(IrBuilder *irb, IrInstruction *alloca, ZigVar *var) {
7949static ResultLocVar *ir_build_var_result_loc(IrBuilderSrc *irb, IrInstSrc *alloca, ZigVar *var) {
69027950 ResultLocVar *result_loc_var = allocate<ResultLocVar>(1);
69037951 result_loc_var->base.id = ResultLocIdVar;
69047952 result_loc_var->base.source_instruction = alloca;
69057953 result_loc_var->base.allow_write_through_const = true;
69067954 result_loc_var->var = var;
69077955
6908 ir_build_reset_result(irb, alloca->scope, alloca->source_node, &result_loc_var->base);
7956 ir_build_reset_result(irb, alloca->base.scope, alloca->base.source_node, &result_loc_var->base);
69097957
69107958 return result_loc_var;
69117959}
69127960
6913static ResultLocCast *ir_build_cast_result_loc(IrBuilder *irb, IrInstruction *dest_type,
7961static ResultLocCast *ir_build_cast_result_loc(IrBuilderSrc *irb, IrInstSrc *dest_type,
69147962 ResultLoc *parent_result_loc)
69157963{
69167964 ResultLocCast *result_loc_cast = allocate<ResultLocCast>(1);
......@@ -6920,37 +7968,37 @@ static ResultLocCast *ir_build_cast_result_loc(IrBuilder *irb, IrInstruction *de
69207968 ir_ref_instruction(dest_type, irb->current_basic_block);
69217969 result_loc_cast->parent = parent_result_loc;
69227970
6923 ir_build_reset_result(irb, dest_type->scope, dest_type->source_node, &result_loc_cast->base);
7971 ir_build_reset_result(irb, dest_type->base.scope, dest_type->base.source_node, &result_loc_cast->base);
69247972
69257973 return result_loc_cast;
69267974}
69277975
6928static void build_decl_var_and_init(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigVar *var,
6929 IrInstruction *init, const char *name_hint, IrInstruction *is_comptime)
7976static void build_decl_var_and_init(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, ZigVar *var,
7977 IrInstSrc *init, const char *name_hint, IrInstSrc *is_comptime)
69307978{
6931 IrInstruction *alloca = ir_build_alloca_src(irb, scope, source_node, nullptr, name_hint, is_comptime);
7979 IrInstSrc *alloca = ir_build_alloca_src(irb, scope, source_node, nullptr, name_hint, is_comptime);
69327980 ResultLocVar *var_result_loc = ir_build_var_result_loc(irb, alloca, var);
69337981 ir_build_end_expr(irb, scope, source_node, init, &var_result_loc->base);
69347982 ir_build_var_decl_src(irb, scope, source_node, var, nullptr, alloca);
69357983}
69367984
6937static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *node) {
7985static IrInstSrc *ir_gen_var_decl(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
69387986 assert(node->type == NodeTypeVariableDeclaration);
69397987
69407988 AstNodeVariableDeclaration *variable_declaration = &node->data.variable_declaration;
69417989
69427990 if (buf_eql_str(variable_declaration->symbol, "_")) {
69437991 add_node_error(irb->codegen, node, buf_sprintf("`_` is not a declarable symbol"));
6944 return irb->codegen->invalid_instruction;
7992 return irb->codegen->invalid_inst_src;
69457993 }
69467994
69477995 // Used for the type expr and the align expr
69487996 Scope *comptime_scope = create_comptime_scope(irb->codegen, node, scope);
69497997
6950 IrInstruction *type_instruction;
7998 IrInstSrc *type_instruction;
69517999 if (variable_declaration->type != nullptr) {
69528000 type_instruction = ir_gen_node(irb, variable_declaration->type, comptime_scope);
6953 if (type_instruction == irb->codegen->invalid_instruction)
8001 if (type_instruction == irb->codegen->invalid_inst_src)
69548002 return type_instruction;
69558003 } else {
69568004 type_instruction = nullptr;
......@@ -6961,22 +8009,22 @@ static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *nod
69618009 bool is_extern = variable_declaration->is_extern;
69628010
69638011 bool is_comptime_scalar = ir_should_inline(irb->exec, scope) || variable_declaration->is_comptime;
6964 IrInstruction *is_comptime = ir_build_const_bool(irb, scope, node, is_comptime_scalar);
8012 IrInstSrc *is_comptime = ir_build_const_bool(irb, scope, node, is_comptime_scalar);
69658013 ZigVar *var = ir_create_var(irb, node, scope, variable_declaration->symbol,
69668014 is_const, is_const, is_shadowable, is_comptime);
6967 // we detect IrInstructionIdDeclVarSrc in gen_block to make sure the next node
8015 // we detect IrInstSrcDeclVar in gen_block to make sure the next node
69688016 // is inside var->child_scope
69698017
69708018 if (!is_extern && !variable_declaration->expr) {
69718019 var->var_type = irb->codegen->builtin_types.entry_invalid;
69728020 add_node_error(irb->codegen, node, buf_sprintf("variables must be initialized"));
6973 return irb->codegen->invalid_instruction;
8021 return irb->codegen->invalid_inst_src;
69748022 }
69758023
6976 IrInstruction *align_value = nullptr;
8024 IrInstSrc *align_value = nullptr;
69778025 if (variable_declaration->align_expr != nullptr) {
69788026 align_value = ir_gen_node(irb, variable_declaration->align_expr, comptime_scope);
6979 if (align_value == irb->codegen->invalid_instruction)
8027 if (align_value == irb->codegen->invalid_inst_src)
69808028 return align_value;
69818029 }
69828030
......@@ -6988,7 +8036,7 @@ static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *nod
69888036 // Parser should ensure that this never happens
69898037 assert(variable_declaration->threadlocal_tok == nullptr);
69908038
6991 IrInstruction *alloca = ir_build_alloca_src(irb, scope, node, align_value,
8039 IrInstSrc *alloca = ir_build_alloca_src(irb, scope, node, align_value,
69928040 buf_ptr(variable_declaration->symbol), is_comptime);
69938041
69948042 // Create a result location for the initialization expression.
......@@ -7006,19 +8054,19 @@ static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *nod
70068054 Scope *init_scope = is_comptime_scalar ?
70078055 create_comptime_scope(irb->codegen, variable_declaration->expr, scope) : scope;
70088056
7009 // Temporarily set the name of the IrExecutable to the VariableDeclaration
8057 // Temporarily set the name of the IrExecutableSrc to the VariableDeclaration
70108058 // so that the struct or enum from the init expression inherits the name.
70118059 Buf *old_exec_name = irb->exec->name;
70128060 irb->exec->name = variable_declaration->symbol;
7013 IrInstruction *init_value = ir_gen_node_extra(irb, variable_declaration->expr, init_scope,
8061 IrInstSrc *init_value = ir_gen_node_extra(irb, variable_declaration->expr, init_scope,
70148062 LValNone, init_result_loc);
70158063 irb->exec->name = old_exec_name;
70168064
7017 if (init_value == irb->codegen->invalid_instruction)
7018 return irb->codegen->invalid_instruction;
8065 if (init_value == irb->codegen->invalid_inst_src)
8066 return irb->codegen->invalid_inst_src;
70198067
70208068 if (result_loc_cast != nullptr) {
7021 IrInstruction *implicit_cast = ir_build_implicit_cast(irb, scope, init_value->source_node,
8069 IrInstSrc *implicit_cast = ir_build_implicit_cast(irb, scope, init_value->base.source_node,
70228070 init_value, result_loc_cast);
70238071 ir_build_end_expr(irb, scope, node, implicit_cast, &result_loc_var->base);
70248072 }
......@@ -7026,7 +8074,7 @@ static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *nod
70268074 return ir_build_var_decl_src(irb, scope, node, var, align_value, alloca);
70278075}
70288076
7029static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
8077static IrInstSrc *ir_gen_while_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
70308078 ResultLoc *result_loc)
70318079{
70328080 assert(node->type == NodeTypeWhileExpr);
......@@ -7034,15 +8082,15 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
70348082 AstNode *continue_expr_node = node->data.while_expr.continue_expr;
70358083 AstNode *else_node = node->data.while_expr.else_node;
70368084
7037 IrBasicBlock *cond_block = ir_create_basic_block(irb, scope, "WhileCond");
7038 IrBasicBlock *body_block = ir_create_basic_block(irb, scope, "WhileBody");
7039 IrBasicBlock *continue_block = continue_expr_node ?
8085 IrBasicBlockSrc *cond_block = ir_create_basic_block(irb, scope, "WhileCond");
8086 IrBasicBlockSrc *body_block = ir_create_basic_block(irb, scope, "WhileBody");
8087 IrBasicBlockSrc *continue_block = continue_expr_node ?
70408088 ir_create_basic_block(irb, scope, "WhileContinue") : cond_block;
7041 IrBasicBlock *end_block = ir_create_basic_block(irb, scope, "WhileEnd");
7042 IrBasicBlock *else_block = else_node ?
8089 IrBasicBlockSrc *end_block = ir_create_basic_block(irb, scope, "WhileEnd");
8090 IrBasicBlockSrc *else_block = else_node ?
70438091 ir_create_basic_block(irb, scope, "WhileElse") : end_block;
70448092
7045 IrInstruction *is_comptime = ir_build_const_bool(irb, scope, node,
8093 IrInstSrc *is_comptime = ir_build_const_bool(irb, scope, node,
70468094 ir_should_inline(irb->exec, scope) || node->data.while_expr.is_inline);
70478095 ir_build_br(irb, scope, node, cond_block, is_comptime);
70488096
......@@ -7063,15 +8111,16 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
70638111 } else {
70648112 payload_scope = subexpr_scope;
70658113 }
7066 IrInstruction *err_val_ptr = ir_gen_node_extra(irb, node->data.while_expr.condition, subexpr_scope,
8114 ScopeExpr *spill_scope = create_expr_scope(irb->codegen, node, payload_scope);
8115 IrInstSrc *err_val_ptr = ir_gen_node_extra(irb, node->data.while_expr.condition, subexpr_scope,
70678116 LValPtr, nullptr);
7068 if (err_val_ptr == irb->codegen->invalid_instruction)
8117 if (err_val_ptr == irb->codegen->invalid_inst_src)
70698118 return err_val_ptr;
7070 IrInstruction *is_err = ir_build_test_err_src(irb, scope, node->data.while_expr.condition, err_val_ptr,
8119 IrInstSrc *is_err = ir_build_test_err_src(irb, scope, node->data.while_expr.condition, err_val_ptr,
70718120 true, false);
7072 IrBasicBlock *after_cond_block = irb->current_basic_block;
7073 IrInstruction *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));
7074 IrInstruction *cond_br_inst;
8121 IrBasicBlockSrc *after_cond_block = irb->current_basic_block;
8122 IrInstSrc *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));
8123 IrInstSrc *cond_br_inst;
70758124 if (!instr_is_unreachable(is_err)) {
70768125 cond_br_inst = ir_build_cond_br(irb, scope, node->data.while_expr.condition, is_err,
70778126 else_block, body_block, is_comptime);
......@@ -7086,15 +8135,15 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
70868135
70878136 ir_set_cursor_at_end_and_append_block(irb, body_block);
70888137 if (var_symbol) {
7089 IrInstruction *payload_ptr = ir_build_unwrap_err_payload(irb, payload_scope, symbol_node,
8138 IrInstSrc *payload_ptr = ir_build_unwrap_err_payload_src(irb, &spill_scope->base, symbol_node,
70908139 err_val_ptr, false, false);
7091 IrInstruction *var_ptr = node->data.while_expr.var_is_ptr ?
7092 ir_build_ref(irb, payload_scope, symbol_node, payload_ptr, true, false) : payload_ptr;
8140 IrInstSrc *var_ptr = node->data.while_expr.var_is_ptr ?
8141 ir_build_ref_src(irb, &spill_scope->base, symbol_node, payload_ptr, true, false) : payload_ptr;
70938142 ir_build_var_decl_src(irb, payload_scope, symbol_node, payload_var, nullptr, var_ptr);
70948143 }
70958144
7096 ZigList<IrInstruction *> incoming_values = {0};
7097 ZigList<IrBasicBlock *> incoming_blocks = {0};
8145 ZigList<IrInstSrc *> incoming_values = {0};
8146 ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
70988147
70998148 ScopeLoop *loop_scope = create_loop_scope(irb->codegen, node, payload_scope);
71008149 loop_scope->break_block = end_block;
......@@ -7104,12 +8153,13 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
71048153 loop_scope->incoming_values = &incoming_values;
71058154 loop_scope->lval = lval;
71068155 loop_scope->peer_parent = peer_parent;
8156 loop_scope->spill_scope = spill_scope;
71078157
71088158 // Note the body block of the loop is not the place that lval and result_loc are used -
71098159 // it's actually in break statements, handled similarly to return statements.
71108160 // That is why we set those values in loop_scope above and not in this ir_gen_node call.
7111 IrInstruction *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);
7112 if (body_result == irb->codegen->invalid_instruction)
8161 IrInstSrc *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);
8162 if (body_result == irb->codegen->invalid_inst_src)
71138163 return body_result;
71148164
71158165 if (!instr_is_unreachable(body_result)) {
......@@ -7119,8 +8169,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
71198169
71208170 if (continue_expr_node) {
71218171 ir_set_cursor_at_end_and_append_block(irb, continue_block);
7122 IrInstruction *expr_result = ir_gen_node(irb, continue_expr_node, payload_scope);
7123 if (expr_result == irb->codegen->invalid_instruction)
8172 IrInstSrc *expr_result = ir_gen_node(irb, continue_expr_node, payload_scope);
8173 if (expr_result == irb->codegen->invalid_inst_src)
71248174 return expr_result;
71258175 if (!instr_is_unreachable(expr_result)) {
71268176 ir_mark_gen(ir_build_check_statement_is_void(irb, payload_scope, continue_expr_node, expr_result));
......@@ -7136,7 +8186,7 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
71368186 ZigVar *err_var = ir_create_var(irb, err_symbol_node, scope, err_symbol,
71378187 true, false, false, is_comptime);
71388188 Scope *err_scope = err_var->child_scope;
7139 IrInstruction *err_ptr = ir_build_unwrap_err_code(irb, err_scope, err_symbol_node, err_val_ptr);
8189 IrInstSrc *err_ptr = ir_build_unwrap_err_code_src(irb, err_scope, err_symbol_node, err_val_ptr);
71408190 ir_build_var_decl_src(irb, err_scope, symbol_node, err_var, nullptr, err_ptr);
71418191
71428192 if (peer_parent->peers.length != 0) {
......@@ -7144,12 +8194,12 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
71448194 }
71458195 ResultLocPeer *peer_result = create_peer_result(peer_parent);
71468196 peer_parent->peers.append(peer_result);
7147 IrInstruction *else_result = ir_gen_node_extra(irb, else_node, err_scope, lval, &peer_result->base);
7148 if (else_result == irb->codegen->invalid_instruction)
8197 IrInstSrc *else_result = ir_gen_node_extra(irb, else_node, err_scope, lval, &peer_result->base);
8198 if (else_result == irb->codegen->invalid_inst_src)
71498199 return else_result;
71508200 if (!instr_is_unreachable(else_result))
71518201 ir_mark_gen(ir_build_br(irb, scope, node, end_block, is_comptime));
7152 IrBasicBlock *after_else_block = irb->current_basic_block;
8202 IrBasicBlockSrc *after_else_block = irb->current_basic_block;
71538203 ir_set_cursor_at_end_and_append_block(irb, end_block);
71548204 if (else_result) {
71558205 incoming_blocks.append(after_else_block);
......@@ -7162,7 +8212,7 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
71628212 peer_parent->peers.last()->next_bb = end_block;
71638213 }
71648214
7165 IrInstruction *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,
8215 IrInstSrc *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,
71668216 incoming_blocks.items, incoming_values.items, peer_parent);
71678217 return ir_expr_wrap(irb, scope, phi, result_loc);
71688218 } else if (var_symbol != nullptr) {
......@@ -7174,15 +8224,16 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
71748224 ZigVar *payload_var = ir_create_var(irb, symbol_node, subexpr_scope, var_symbol,
71758225 true, false, false, is_comptime);
71768226 Scope *child_scope = payload_var->child_scope;
7177 IrInstruction *maybe_val_ptr = ir_gen_node_extra(irb, node->data.while_expr.condition, subexpr_scope,
8227 ScopeExpr *spill_scope = create_expr_scope(irb->codegen, node, child_scope);
8228 IrInstSrc *maybe_val_ptr = ir_gen_node_extra(irb, node->data.while_expr.condition, subexpr_scope,
71788229 LValPtr, nullptr);
7179 if (maybe_val_ptr == irb->codegen->invalid_instruction)
8230 if (maybe_val_ptr == irb->codegen->invalid_inst_src)
71808231 return maybe_val_ptr;
7181 IrInstruction *maybe_val = ir_build_load_ptr(irb, scope, node->data.while_expr.condition, maybe_val_ptr);
7182 IrInstruction *is_non_null = ir_build_test_nonnull(irb, scope, node->data.while_expr.condition, maybe_val);
7183 IrBasicBlock *after_cond_block = irb->current_basic_block;
7184 IrInstruction *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));
7185 IrInstruction *cond_br_inst;
8232 IrInstSrc *maybe_val = ir_build_load_ptr(irb, scope, node->data.while_expr.condition, maybe_val_ptr);
8233 IrInstSrc *is_non_null = ir_build_test_non_null_src(irb, scope, node->data.while_expr.condition, maybe_val);
8234 IrBasicBlockSrc *after_cond_block = irb->current_basic_block;
8235 IrInstSrc *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));
8236 IrInstSrc *cond_br_inst;
71868237 if (!instr_is_unreachable(is_non_null)) {
71878238 cond_br_inst = ir_build_cond_br(irb, scope, node->data.while_expr.condition, is_non_null,
71888239 body_block, else_block, is_comptime);
......@@ -7196,13 +8247,13 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
71968247 is_comptime);
71978248
71988249 ir_set_cursor_at_end_and_append_block(irb, body_block);
7199 IrInstruction *payload_ptr = ir_build_optional_unwrap_ptr(irb, child_scope, symbol_node, maybe_val_ptr, false, false);
7200 IrInstruction *var_ptr = node->data.while_expr.var_is_ptr ?
7201 ir_build_ref(irb, child_scope, symbol_node, payload_ptr, true, false) : payload_ptr;
8250 IrInstSrc *payload_ptr = ir_build_optional_unwrap_ptr(irb, &spill_scope->base, symbol_node, maybe_val_ptr, false, false);
8251 IrInstSrc *var_ptr = node->data.while_expr.var_is_ptr ?
8252 ir_build_ref_src(irb, &spill_scope->base, symbol_node, payload_ptr, true, false) : payload_ptr;
72028253 ir_build_var_decl_src(irb, child_scope, symbol_node, payload_var, nullptr, var_ptr);
72038254
7204 ZigList<IrInstruction *> incoming_values = {0};
7205 ZigList<IrBasicBlock *> incoming_blocks = {0};
8255 ZigList<IrInstSrc *> incoming_values = {0};
8256 ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
72068257
72078258 ScopeLoop *loop_scope = create_loop_scope(irb->codegen, node, child_scope);
72088259 loop_scope->break_block = end_block;
......@@ -7212,12 +8263,13 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
72128263 loop_scope->incoming_values = &incoming_values;
72138264 loop_scope->lval = lval;
72148265 loop_scope->peer_parent = peer_parent;
8266 loop_scope->spill_scope = spill_scope;
72158267
72168268 // Note the body block of the loop is not the place that lval and result_loc are used -
72178269 // it's actually in break statements, handled similarly to return statements.
72188270 // That is why we set those values in loop_scope above and not in this ir_gen_node call.
7219 IrInstruction *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);
7220 if (body_result == irb->codegen->invalid_instruction)
8271 IrInstSrc *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);
8272 if (body_result == irb->codegen->invalid_inst_src)
72218273 return body_result;
72228274
72238275 if (!instr_is_unreachable(body_result)) {
......@@ -7227,8 +8279,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
72278279
72288280 if (continue_expr_node) {
72298281 ir_set_cursor_at_end_and_append_block(irb, continue_block);
7230 IrInstruction *expr_result = ir_gen_node(irb, continue_expr_node, child_scope);
7231 if (expr_result == irb->codegen->invalid_instruction)
8282 IrInstSrc *expr_result = ir_gen_node(irb, continue_expr_node, child_scope);
8283 if (expr_result == irb->codegen->invalid_inst_src)
72328284 return expr_result;
72338285 if (!instr_is_unreachable(expr_result)) {
72348286 ir_mark_gen(ir_build_check_statement_is_void(irb, child_scope, continue_expr_node, expr_result));
......@@ -7236,7 +8288,7 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
72368288 }
72378289 }
72388290
7239 IrInstruction *else_result = nullptr;
8291 IrInstSrc *else_result = nullptr;
72408292 if (else_node) {
72418293 ir_set_cursor_at_end_and_append_block(irb, else_block);
72428294
......@@ -7246,12 +8298,12 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
72468298 ResultLocPeer *peer_result = create_peer_result(peer_parent);
72478299 peer_parent->peers.append(peer_result);
72488300 else_result = ir_gen_node_extra(irb, else_node, scope, lval, &peer_result->base);
7249 if (else_result == irb->codegen->invalid_instruction)
8301 if (else_result == irb->codegen->invalid_inst_src)
72508302 return else_result;
72518303 if (!instr_is_unreachable(else_result))
72528304 ir_mark_gen(ir_build_br(irb, scope, node, end_block, is_comptime));
72538305 }
7254 IrBasicBlock *after_else_block = irb->current_basic_block;
8306 IrBasicBlockSrc *after_else_block = irb->current_basic_block;
72558307 ir_set_cursor_at_end_and_append_block(irb, end_block);
72568308 if (else_result) {
72578309 incoming_blocks.append(after_else_block);
......@@ -7264,17 +8316,17 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
72648316 peer_parent->peers.last()->next_bb = end_block;
72658317 }
72668318
7267 IrInstruction *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,
8319 IrInstSrc *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,
72688320 incoming_blocks.items, incoming_values.items, peer_parent);
72698321 return ir_expr_wrap(irb, scope, phi, result_loc);
72708322 } else {
72718323 ir_set_cursor_at_end_and_append_block(irb, cond_block);
7272 IrInstruction *cond_val = ir_gen_node(irb, node->data.while_expr.condition, scope);
7273 if (cond_val == irb->codegen->invalid_instruction)
8324 IrInstSrc *cond_val = ir_gen_node(irb, node->data.while_expr.condition, scope);
8325 if (cond_val == irb->codegen->invalid_inst_src)
72748326 return cond_val;
7275 IrBasicBlock *after_cond_block = irb->current_basic_block;
7276 IrInstruction *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));
7277 IrInstruction *cond_br_inst;
8327 IrBasicBlockSrc *after_cond_block = irb->current_basic_block;
8328 IrInstSrc *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));
8329 IrInstSrc *cond_br_inst;
72788330 if (!instr_is_unreachable(cond_val)) {
72798331 cond_br_inst = ir_build_cond_br(irb, scope, node->data.while_expr.condition, cond_val,
72808332 body_block, else_block, is_comptime);
......@@ -7288,8 +8340,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
72888340 is_comptime);
72898341 ir_set_cursor_at_end_and_append_block(irb, body_block);
72908342
7291 ZigList<IrInstruction *> incoming_values = {0};
7292 ZigList<IrBasicBlock *> incoming_blocks = {0};
8343 ZigList<IrInstSrc *> incoming_values = {0};
8344 ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
72938345
72948346 Scope *subexpr_scope = create_runtime_scope(irb->codegen, node, scope, is_comptime);
72958347
......@@ -7305,8 +8357,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
73058357 // Note the body block of the loop is not the place that lval and result_loc are used -
73068358 // it's actually in break statements, handled similarly to return statements.
73078359 // That is why we set those values in loop_scope above and not in this ir_gen_node call.
7308 IrInstruction *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);
7309 if (body_result == irb->codegen->invalid_instruction)
8360 IrInstSrc *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);
8361 if (body_result == irb->codegen->invalid_inst_src)
73108362 return body_result;
73118363
73128364 if (!instr_is_unreachable(body_result)) {
......@@ -7316,8 +8368,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
73168368
73178369 if (continue_expr_node) {
73188370 ir_set_cursor_at_end_and_append_block(irb, continue_block);
7319 IrInstruction *expr_result = ir_gen_node(irb, continue_expr_node, subexpr_scope);
7320 if (expr_result == irb->codegen->invalid_instruction)
8371 IrInstSrc *expr_result = ir_gen_node(irb, continue_expr_node, subexpr_scope);
8372 if (expr_result == irb->codegen->invalid_inst_src)
73218373 return expr_result;
73228374 if (!instr_is_unreachable(expr_result)) {
73238375 ir_mark_gen(ir_build_check_statement_is_void(irb, scope, continue_expr_node, expr_result));
......@@ -7325,7 +8377,7 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
73258377 }
73268378 }
73278379
7328 IrInstruction *else_result = nullptr;
8380 IrInstSrc *else_result = nullptr;
73298381 if (else_node) {
73308382 ir_set_cursor_at_end_and_append_block(irb, else_block);
73318383
......@@ -7336,12 +8388,12 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
73368388 peer_parent->peers.append(peer_result);
73378389
73388390 else_result = ir_gen_node_extra(irb, else_node, subexpr_scope, lval, &peer_result->base);
7339 if (else_result == irb->codegen->invalid_instruction)
8391 if (else_result == irb->codegen->invalid_inst_src)
73408392 return else_result;
73418393 if (!instr_is_unreachable(else_result))
73428394 ir_mark_gen(ir_build_br(irb, scope, node, end_block, is_comptime));
73438395 }
7344 IrBasicBlock *after_else_block = irb->current_basic_block;
8396 IrBasicBlockSrc *after_else_block = irb->current_basic_block;
73458397 ir_set_cursor_at_end_and_append_block(irb, end_block);
73468398 if (else_result) {
73478399 incoming_blocks.append(after_else_block);
......@@ -7354,13 +8406,13 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
73548406 peer_parent->peers.last()->next_bb = end_block;
73558407 }
73568408
7357 IrInstruction *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,
8409 IrInstSrc *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,
73588410 incoming_blocks.items, incoming_values.items, peer_parent);
73598411 return ir_expr_wrap(irb, scope, phi, result_loc);
73608412 }
73618413}
73628414
7363static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNode *node, LVal lval,
8415static IrInstSrc *ir_gen_for_expr(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node, LVal lval,
73648416 ResultLoc *result_loc)
73658417{
73668418 assert(node->type == NodeTypeForExpr);
......@@ -7373,17 +8425,17 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
73738425
73748426 if (!elem_node) {
73758427 add_node_error(irb->codegen, node, buf_sprintf("for loop expression missing element parameter"));
7376 return irb->codegen->invalid_instruction;
8428 return irb->codegen->invalid_inst_src;
73778429 }
73788430 assert(elem_node->type == NodeTypeSymbol);
73798431
73808432 ScopeExpr *spill_scope = create_expr_scope(irb->codegen, node, parent_scope);
73818433
7382 IrInstruction *array_val_ptr = ir_gen_node_extra(irb, array_node, &spill_scope->base, LValPtr, nullptr);
7383 if (array_val_ptr == irb->codegen->invalid_instruction)
8434 IrInstSrc *array_val_ptr = ir_gen_node_extra(irb, array_node, &spill_scope->base, LValPtr, nullptr);
8435 if (array_val_ptr == irb->codegen->invalid_inst_src)
73848436 return array_val_ptr;
73858437
7386 IrInstruction *is_comptime = ir_build_const_bool(irb, parent_scope, node,
8438 IrInstSrc *is_comptime = ir_build_const_bool(irb, parent_scope, node,
73878439 ir_should_inline(irb->exec, parent_scope) || node->data.for_expr.is_inline);
73888440
73898441 AstNode *index_var_source_node;
......@@ -7400,50 +8452,49 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
74008452 index_var_name = "i";
74018453 }
74028454
7403 IrInstruction *zero = ir_build_const_usize(irb, parent_scope, node, 0);
8455 IrInstSrc *zero = ir_build_const_usize(irb, parent_scope, node, 0);
74048456 build_decl_var_and_init(irb, parent_scope, index_var_source_node, index_var, zero, index_var_name, is_comptime);
74058457 parent_scope = index_var->child_scope;
74068458
7407 IrInstruction *one = ir_build_const_usize(irb, parent_scope, node, 1);
7408 IrInstruction *index_ptr = ir_build_var_ptr(irb, parent_scope, node, index_var);
8459 IrInstSrc *one = ir_build_const_usize(irb, parent_scope, node, 1);
8460 IrInstSrc *index_ptr = ir_build_var_ptr(irb, parent_scope, node, index_var);
74098461
74108462
7411 IrBasicBlock *cond_block = ir_create_basic_block(irb, parent_scope, "ForCond");
7412 IrBasicBlock *body_block = ir_create_basic_block(irb, parent_scope, "ForBody");
7413 IrBasicBlock *end_block = ir_create_basic_block(irb, parent_scope, "ForEnd");
7414 IrBasicBlock *else_block = else_node ? ir_create_basic_block(irb, parent_scope, "ForElse") : end_block;
7415 IrBasicBlock *continue_block = ir_create_basic_block(irb, parent_scope, "ForContinue");
8463 IrBasicBlockSrc *cond_block = ir_create_basic_block(irb, parent_scope, "ForCond");
8464 IrBasicBlockSrc *body_block = ir_create_basic_block(irb, parent_scope, "ForBody");
8465 IrBasicBlockSrc *end_block = ir_create_basic_block(irb, parent_scope, "ForEnd");
8466 IrBasicBlockSrc *else_block = else_node ? ir_create_basic_block(irb, parent_scope, "ForElse") : end_block;
8467 IrBasicBlockSrc *continue_block = ir_create_basic_block(irb, parent_scope, "ForContinue");
74168468
74178469 Buf *len_field_name = buf_create_from_str("len");
7418 IrInstruction *len_ref = ir_build_field_ptr(irb, parent_scope, node, array_val_ptr, len_field_name, false);
7419 IrInstruction *len_val = ir_build_load_ptr(irb, &spill_scope->base, node, len_ref);
8470 IrInstSrc *len_ref = ir_build_field_ptr(irb, parent_scope, node, array_val_ptr, len_field_name, false);
8471 IrInstSrc *len_val = ir_build_load_ptr(irb, &spill_scope->base, node, len_ref);
74208472 ir_build_br(irb, parent_scope, node, cond_block, is_comptime);
74218473
74228474 ir_set_cursor_at_end_and_append_block(irb, cond_block);
7423 IrInstruction *index_val = ir_build_load_ptr(irb, &spill_scope->base, node, index_ptr);
7424 IrInstruction *cond = ir_build_bin_op(irb, parent_scope, node, IrBinOpCmpLessThan, index_val, len_val, false);
7425 IrBasicBlock *after_cond_block = irb->current_basic_block;
7426 IrInstruction *void_else_value = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, parent_scope, node));
7427 IrInstruction *cond_br_inst = ir_mark_gen(ir_build_cond_br(irb, parent_scope, node, cond,
8475 IrInstSrc *index_val = ir_build_load_ptr(irb, &spill_scope->base, node, index_ptr);
8476 IrInstSrc *cond = ir_build_bin_op(irb, parent_scope, node, IrBinOpCmpLessThan, index_val, len_val, false);
8477 IrBasicBlockSrc *after_cond_block = irb->current_basic_block;
8478 IrInstSrc *void_else_value = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, parent_scope, node));
8479 IrInstSrc *cond_br_inst = ir_mark_gen(ir_build_cond_br(irb, parent_scope, node, cond,
74288480 body_block, else_block, is_comptime));
74298481
74308482 ResultLocPeerParent *peer_parent = ir_build_result_peers(irb, cond_br_inst, end_block, result_loc, is_comptime);
74318483
74328484 ir_set_cursor_at_end_and_append_block(irb, body_block);
7433 Scope *elem_ptr_scope = node->data.for_expr.elem_is_ptr ? parent_scope : &spill_scope->base;
7434 IrInstruction *elem_ptr = ir_build_elem_ptr(irb, elem_ptr_scope, node, array_val_ptr, index_val, false,
7435 PtrLenSingle, nullptr);
8485 IrInstSrc *elem_ptr = ir_build_elem_ptr(irb, &spill_scope->base, node, array_val_ptr, index_val,
8486 false, PtrLenSingle, nullptr);
74368487 // TODO make it an error to write to element variable or i variable.
74378488 Buf *elem_var_name = elem_node->data.symbol_expr.symbol;
74388489 ZigVar *elem_var = ir_create_var(irb, elem_node, parent_scope, elem_var_name, true, false, false, is_comptime);
74398490 Scope *child_scope = elem_var->child_scope;
74408491
7441 IrInstruction *var_ptr = node->data.for_expr.elem_is_ptr ?
7442 ir_build_ref(irb, &spill_scope->base, elem_node, elem_ptr, true, false) : elem_ptr;
8492 IrInstSrc *var_ptr = node->data.for_expr.elem_is_ptr ?
8493 ir_build_ref_src(irb, &spill_scope->base, elem_node, elem_ptr, true, false) : elem_ptr;
74438494 ir_build_var_decl_src(irb, parent_scope, elem_node, elem_var, nullptr, var_ptr);
74448495
7445 ZigList<IrInstruction *> incoming_values = {0};
7446 ZigList<IrBasicBlock *> incoming_blocks = {0};
8496 ZigList<IrInstSrc *> incoming_values = {0};
8497 ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
74478498 ScopeLoop *loop_scope = create_loop_scope(irb->codegen, node, child_scope);
74488499 loop_scope->break_block = end_block;
74498500 loop_scope->continue_block = continue_block;
......@@ -7457,9 +8508,9 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
74578508 // Note the body block of the loop is not the place that lval and result_loc are used -
74588509 // it's actually in break statements, handled similarly to return statements.
74598510 // That is why we set those values in loop_scope above and not in this ir_gen_node call.
7460 IrInstruction *body_result = ir_gen_node(irb, body_node, &loop_scope->base);
7461 if (body_result == irb->codegen->invalid_instruction)
7462 return irb->codegen->invalid_instruction;
8511 IrInstSrc *body_result = ir_gen_node(irb, body_node, &loop_scope->base);
8512 if (body_result == irb->codegen->invalid_inst_src)
8513 return irb->codegen->invalid_inst_src;
74638514
74648515 if (!instr_is_unreachable(body_result)) {
74658516 ir_mark_gen(ir_build_check_statement_is_void(irb, child_scope, node->data.for_expr.body, body_result));
......@@ -7467,11 +8518,11 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
74678518 }
74688519
74698520 ir_set_cursor_at_end_and_append_block(irb, continue_block);
7470 IrInstruction *new_index_val = ir_build_bin_op(irb, child_scope, node, IrBinOpAdd, index_val, one, false);
8521 IrInstSrc *new_index_val = ir_build_bin_op(irb, child_scope, node, IrBinOpAdd, index_val, one, false);
74718522 ir_build_store_ptr(irb, child_scope, node, index_ptr, new_index_val)->allow_write_through_const = true;
74728523 ir_build_br(irb, child_scope, node, cond_block, is_comptime);
74738524
7474 IrInstruction *else_result = nullptr;
8525 IrInstSrc *else_result = nullptr;
74758526 if (else_node) {
74768527 ir_set_cursor_at_end_and_append_block(irb, else_block);
74778528
......@@ -7481,12 +8532,12 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
74818532 ResultLocPeer *peer_result = create_peer_result(peer_parent);
74828533 peer_parent->peers.append(peer_result);
74838534 else_result = ir_gen_node_extra(irb, else_node, parent_scope, LValNone, &peer_result->base);
7484 if (else_result == irb->codegen->invalid_instruction)
8535 if (else_result == irb->codegen->invalid_inst_src)
74858536 return else_result;
74868537 if (!instr_is_unreachable(else_result))
74878538 ir_mark_gen(ir_build_br(irb, parent_scope, node, end_block, is_comptime));
74888539 }
7489 IrBasicBlock *after_else_block = irb->current_basic_block;
8540 IrBasicBlockSrc *after_else_block = irb->current_basic_block;
74908541 ir_set_cursor_at_end_and_append_block(irb, end_block);
74918542
74928543 if (else_result) {
......@@ -7500,29 +8551,29 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
75008551 peer_parent->peers.last()->next_bb = end_block;
75018552 }
75028553
7503 IrInstruction *phi = ir_build_phi(irb, parent_scope, node, incoming_blocks.length,
8554 IrInstSrc *phi = ir_build_phi(irb, parent_scope, node, incoming_blocks.length,
75048555 incoming_blocks.items, incoming_values.items, peer_parent);
75058556 return ir_lval_wrap(irb, parent_scope, phi, lval, result_loc);
75068557}
75078558
7508static IrInstruction *ir_gen_bool_literal(IrBuilder *irb, Scope *scope, AstNode *node) {
8559static IrInstSrc *ir_gen_bool_literal(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
75098560 assert(node->type == NodeTypeBoolLiteral);
75108561 return ir_build_const_bool(irb, scope, node, node->data.bool_literal.value);
75118562}
75128563
7513static IrInstruction *ir_gen_enum_literal(IrBuilder *irb, Scope *scope, AstNode *node) {
8564static IrInstSrc *ir_gen_enum_literal(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
75148565 assert(node->type == NodeTypeEnumLiteral);
75158566 Buf *name = &node->data.enum_literal.identifier->data.str_lit.str;
75168567 return ir_build_const_enum_literal(irb, scope, node, name);
75178568}
75188569
7519static IrInstruction *ir_gen_string_literal(IrBuilder *irb, Scope *scope, AstNode *node) {
8570static IrInstSrc *ir_gen_string_literal(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
75208571 assert(node->type == NodeTypeStringLiteral);
75218572
75228573 return ir_build_const_str_lit(irb, scope, node, node->data.string_literal.buf);
75238574}
75248575
7525static IrInstruction *ir_gen_array_type(IrBuilder *irb, Scope *scope, AstNode *node) {
8576static IrInstSrc *ir_gen_array_type(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
75268577 assert(node->type == NodeTypeArrayType);
75278578
75288579 AstNode *size_node = node->data.array_type.size;
......@@ -7535,10 +8586,10 @@ static IrInstruction *ir_gen_array_type(IrBuilder *irb, Scope *scope, AstNode *n
75358586
75368587 Scope *comptime_scope = create_comptime_scope(irb->codegen, node, scope);
75378588
7538 IrInstruction *sentinel;
8589 IrInstSrc *sentinel;
75398590 if (sentinel_expr != nullptr) {
75408591 sentinel = ir_gen_node(irb, sentinel_expr, comptime_scope);
7541 if (sentinel == irb->codegen->invalid_instruction)
8592 if (sentinel == irb->codegen->invalid_inst_src)
75428593 return sentinel;
75438594 } else {
75448595 sentinel = nullptr;
......@@ -7547,42 +8598,42 @@ static IrInstruction *ir_gen_array_type(IrBuilder *irb, Scope *scope, AstNode *n
75478598 if (size_node) {
75488599 if (is_const) {
75498600 add_node_error(irb->codegen, node, buf_create_from_str("const qualifier invalid on array type"));
7550 return irb->codegen->invalid_instruction;
8601 return irb->codegen->invalid_inst_src;
75518602 }
75528603 if (is_volatile) {
75538604 add_node_error(irb->codegen, node, buf_create_from_str("volatile qualifier invalid on array type"));
7554 return irb->codegen->invalid_instruction;
8605 return irb->codegen->invalid_inst_src;
75558606 }
75568607 if (is_allow_zero) {
75578608 add_node_error(irb->codegen, node, buf_create_from_str("allowzero qualifier invalid on array type"));
7558 return irb->codegen->invalid_instruction;
8609 return irb->codegen->invalid_inst_src;
75598610 }
75608611 if (align_expr != nullptr) {
75618612 add_node_error(irb->codegen, node, buf_create_from_str("align qualifier invalid on array type"));
7562 return irb->codegen->invalid_instruction;
8613 return irb->codegen->invalid_inst_src;
75638614 }
75648615
7565 IrInstruction *size_value = ir_gen_node(irb, size_node, comptime_scope);
7566 if (size_value == irb->codegen->invalid_instruction)
8616 IrInstSrc *size_value = ir_gen_node(irb, size_node, comptime_scope);
8617 if (size_value == irb->codegen->invalid_inst_src)
75678618 return size_value;
75688619
7569 IrInstruction *child_type = ir_gen_node(irb, child_type_node, comptime_scope);
7570 if (child_type == irb->codegen->invalid_instruction)
8620 IrInstSrc *child_type = ir_gen_node(irb, child_type_node, comptime_scope);
8621 if (child_type == irb->codegen->invalid_inst_src)
75718622 return child_type;
75728623
75738624 return ir_build_array_type(irb, scope, node, size_value, sentinel, child_type);
75748625 } else {
7575 IrInstruction *align_value;
8626 IrInstSrc *align_value;
75768627 if (align_expr != nullptr) {
75778628 align_value = ir_gen_node(irb, align_expr, comptime_scope);
7578 if (align_value == irb->codegen->invalid_instruction)
8629 if (align_value == irb->codegen->invalid_inst_src)
75798630 return align_value;
75808631 } else {
75818632 align_value = nullptr;
75828633 }
75838634
7584 IrInstruction *child_type = ir_gen_node(irb, child_type_node, comptime_scope);
7585 if (child_type == irb->codegen->invalid_instruction)
8635 IrInstSrc *child_type = ir_gen_node(irb, child_type_node, comptime_scope);
8636 if (child_type == irb->codegen->invalid_inst_src)
75868637 return child_type;
75878638
75888639 return ir_build_slice_type(irb, scope, node, child_type, is_const, is_volatile, sentinel,
......@@ -7590,15 +8641,15 @@ static IrInstruction *ir_gen_array_type(IrBuilder *irb, Scope *scope, AstNode *n
75908641 }
75918642}
75928643
7593static IrInstruction *ir_gen_anyframe_type(IrBuilder *irb, Scope *scope, AstNode *node) {
8644static IrInstSrc *ir_gen_anyframe_type(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
75948645 assert(node->type == NodeTypeAnyFrameType);
75958646
75968647 AstNode *payload_type_node = node->data.anyframe_type.payload_type;
7597 IrInstruction *payload_type_value = nullptr;
8648 IrInstSrc *payload_type_value = nullptr;
75988649
75998650 if (payload_type_node != nullptr) {
76008651 payload_type_value = ir_gen_node(irb, payload_type_node, scope);
7601 if (payload_type_value == irb->codegen->invalid_instruction)
8652 if (payload_type_value == irb->codegen->invalid_inst_src)
76028653 return payload_type_value;
76038654
76048655 }
......@@ -7606,7 +8657,7 @@ static IrInstruction *ir_gen_anyframe_type(IrBuilder *irb, Scope *scope, AstNode
76068657 return ir_build_anyframe_type(irb, scope, node, payload_type_value);
76078658}
76088659
7609static IrInstruction *ir_gen_undefined_literal(IrBuilder *irb, Scope *scope, AstNode *node) {
8660static IrInstSrc *ir_gen_undefined_literal(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
76108661 assert(node->type == NodeTypeUndefinedLiteral);
76118662 return ir_build_const_undefined(irb, scope, node);
76128663}
......@@ -7723,13 +8774,13 @@ static size_t find_asm_index(CodeGen *g, AstNode *node, AsmToken *tok, Buf *src_
77238774 return SIZE_MAX;
77248775}
77258776
7726static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *node) {
8777static IrInstSrc *ir_gen_asm_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
77278778 assert(node->type == NodeTypeAsmExpr);
77288779 AstNodeAsmExpr *asm_expr = &node->data.asm_expr;
77298780
7730 IrInstruction *asm_template = ir_gen_node(irb, asm_expr->asm_template, scope);
7731 if (asm_template == irb->codegen->invalid_instruction)
7732 return irb->codegen->invalid_instruction;
8781 IrInstSrc *asm_template = ir_gen_node(irb, asm_expr->asm_template, scope);
8782 if (asm_template == irb->codegen->invalid_inst_src)
8783 return irb->codegen->invalid_inst_src;
77338784
77348785 bool is_volatile = asm_expr->volatile_token != nullptr;
77358786 bool in_fn_scope = (scope_fn_entry(scope) != nullptr);
......@@ -7738,7 +8789,7 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod
77388789 if (is_volatile) {
77398790 add_token_error(irb->codegen, node->owner, asm_expr->volatile_token,
77408791 buf_sprintf("volatile is meaningless on global assembly"));
7741 return irb->codegen->invalid_instruction;
8792 return irb->codegen->invalid_inst_src;
77428793 }
77438794
77448795 if (asm_expr->output_list.length != 0 || asm_expr->input_list.length != 0 ||
......@@ -7746,34 +8797,34 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod
77468797 {
77478798 add_node_error(irb->codegen, node,
77488799 buf_sprintf("global assembly cannot have inputs, outputs, or clobbers"));
7749 return irb->codegen->invalid_instruction;
8800 return irb->codegen->invalid_inst_src;
77508801 }
77518802
77528803 return ir_build_asm_src(irb, scope, node, asm_template, nullptr, nullptr,
77538804 nullptr, 0, is_volatile, true);
77548805 }
77558806
7756 IrInstruction **input_list = allocate<IrInstruction *>(asm_expr->input_list.length);
7757 IrInstruction **output_types = allocate<IrInstruction *>(asm_expr->output_list.length);
8807 IrInstSrc **input_list = allocate<IrInstSrc *>(asm_expr->input_list.length);
8808 IrInstSrc **output_types = allocate<IrInstSrc *>(asm_expr->output_list.length);
77588809 ZigVar **output_vars = allocate<ZigVar *>(asm_expr->output_list.length);
77598810 size_t return_count = 0;
77608811 if (!is_volatile && asm_expr->output_list.length == 0) {
77618812 add_node_error(irb->codegen, node,
77628813 buf_sprintf("assembly expression with no output must be marked volatile"));
7763 return irb->codegen->invalid_instruction;
8814 return irb->codegen->invalid_inst_src;
77648815 }
77658816 for (size_t i = 0; i < asm_expr->output_list.length; i += 1) {
77668817 AsmOutput *asm_output = asm_expr->output_list.at(i);
77678818 if (asm_output->return_type) {
77688819 return_count += 1;
77698820
7770 IrInstruction *return_type = ir_gen_node(irb, asm_output->return_type, scope);
7771 if (return_type == irb->codegen->invalid_instruction)
7772 return irb->codegen->invalid_instruction;
8821 IrInstSrc *return_type = ir_gen_node(irb, asm_output->return_type, scope);
8822 if (return_type == irb->codegen->invalid_inst_src)
8823 return irb->codegen->invalid_inst_src;
77738824 if (return_count > 1) {
77748825 add_node_error(irb->codegen, node,
77758826 buf_sprintf("inline assembly allows up to one output value"));
7776 return irb->codegen->invalid_instruction;
8827 return irb->codegen->invalid_inst_src;
77778828 }
77788829 output_types[i] = return_type;
77798830 } else {
......@@ -7786,7 +8837,7 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod
77868837 } else {
77878838 add_node_error(irb->codegen, node,
77888839 buf_sprintf("use of undeclared identifier '%s'", buf_ptr(variable_name)));
7789 return irb->codegen->invalid_instruction;
8840 return irb->codegen->invalid_inst_src;
77908841 }
77918842 }
77928843
......@@ -7796,14 +8847,14 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod
77968847 buf_sprintf("invalid modifier starting output constraint for '%s': '%c', only '=' is supported."
77978848 " Compiler TODO: see https://github.com/ziglang/zig/issues/215",
77988849 buf_ptr(asm_output->asm_symbolic_name), modifier));
7799 return irb->codegen->invalid_instruction;
8850 return irb->codegen->invalid_inst_src;
78008851 }
78018852 }
78028853 for (size_t i = 0; i < asm_expr->input_list.length; i += 1) {
78038854 AsmInput *asm_input = asm_expr->input_list.at(i);
7804 IrInstruction *input_value = ir_gen_node(irb, asm_input->expr, scope);
7805 if (input_value == irb->codegen->invalid_instruction)
7806 return irb->codegen->invalid_instruction;
8855 IrInstSrc *input_value = ir_gen_node(irb, asm_input->expr, scope);
8856 if (input_value == irb->codegen->invalid_inst_src)
8857 return irb->codegen->invalid_inst_src;
78078858
78088859 input_list[i] = input_value;
78098860 }
......@@ -7812,7 +8863,7 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod
78128863 output_vars, return_count, is_volatile, false);
78138864}
78148865
7815static IrInstruction *ir_gen_if_optional_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
8866static IrInstSrc *ir_gen_if_optional_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
78168867 ResultLoc *result_loc)
78178868{
78188869 assert(node->type == NodeTypeIfOptional);
......@@ -7823,24 +8874,24 @@ static IrInstruction *ir_gen_if_optional_expr(IrBuilder *irb, Scope *scope, AstN
78238874 AstNode *else_node = node->data.test_expr.else_node;
78248875 bool var_is_ptr = node->data.test_expr.var_is_ptr;
78258876
7826 IrInstruction *maybe_val_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
7827 if (maybe_val_ptr == irb->codegen->invalid_instruction)
8877 IrInstSrc *maybe_val_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
8878 if (maybe_val_ptr == irb->codegen->invalid_inst_src)
78288879 return maybe_val_ptr;
78298880
7830 IrInstruction *maybe_val = ir_build_load_ptr(irb, scope, node, maybe_val_ptr);
7831 IrInstruction *is_non_null = ir_build_test_nonnull(irb, scope, node, maybe_val);
8881 IrInstSrc *maybe_val = ir_build_load_ptr(irb, scope, node, maybe_val_ptr);
8882 IrInstSrc *is_non_null = ir_build_test_non_null_src(irb, scope, node, maybe_val);
78328883
7833 IrBasicBlock *then_block = ir_create_basic_block(irb, scope, "OptionalThen");
7834 IrBasicBlock *else_block = ir_create_basic_block(irb, scope, "OptionalElse");
7835 IrBasicBlock *endif_block = ir_create_basic_block(irb, scope, "OptionalEndIf");
8884 IrBasicBlockSrc *then_block = ir_create_basic_block(irb, scope, "OptionalThen");
8885 IrBasicBlockSrc *else_block = ir_create_basic_block(irb, scope, "OptionalElse");
8886 IrBasicBlockSrc *endif_block = ir_create_basic_block(irb, scope, "OptionalEndIf");
78368887
7837 IrInstruction *is_comptime;
8888 IrInstSrc *is_comptime;
78388889 if (ir_should_inline(irb->exec, scope)) {
78398890 is_comptime = ir_build_const_bool(irb, scope, node, true);
78408891 } else {
78418892 is_comptime = ir_build_test_comptime(irb, scope, node, is_non_null);
78428893 }
7843 IrInstruction *cond_br_inst = ir_build_cond_br(irb, scope, node, is_non_null,
8894 IrInstSrc *cond_br_inst = ir_build_cond_br(irb, scope, node, is_non_null,
78448895 then_block, else_block, is_comptime);
78458896
78468897 ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, else_block, endif_block,
......@@ -7856,48 +8907,48 @@ static IrInstruction *ir_gen_if_optional_expr(IrBuilder *irb, Scope *scope, AstN
78568907 ZigVar *var = ir_create_var(irb, node, subexpr_scope,
78578908 var_symbol, is_const, is_const, is_shadowable, is_comptime);
78588909
7859 IrInstruction *payload_ptr = ir_build_optional_unwrap_ptr(irb, subexpr_scope, node, maybe_val_ptr, false, false);
7860 IrInstruction *var_ptr = var_is_ptr ? ir_build_ref(irb, subexpr_scope, node, payload_ptr, true, false) : payload_ptr;
8910 IrInstSrc *payload_ptr = ir_build_optional_unwrap_ptr(irb, subexpr_scope, node, maybe_val_ptr, false, false);
8911 IrInstSrc *var_ptr = var_is_ptr ? ir_build_ref_src(irb, subexpr_scope, node, payload_ptr, true, false) : payload_ptr;
78618912 ir_build_var_decl_src(irb, subexpr_scope, node, var, nullptr, var_ptr);
78628913 var_scope = var->child_scope;
78638914 } else {
78648915 var_scope = subexpr_scope;
78658916 }
7866 IrInstruction *then_expr_result = ir_gen_node_extra(irb, then_node, var_scope, lval,
8917 IrInstSrc *then_expr_result = ir_gen_node_extra(irb, then_node, var_scope, lval,
78678918 &peer_parent->peers.at(0)->base);
7868 if (then_expr_result == irb->codegen->invalid_instruction)
8919 if (then_expr_result == irb->codegen->invalid_inst_src)
78698920 return then_expr_result;
7870 IrBasicBlock *after_then_block = irb->current_basic_block;
8921 IrBasicBlockSrc *after_then_block = irb->current_basic_block;
78718922 if (!instr_is_unreachable(then_expr_result))
78728923 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
78738924
78748925 ir_set_cursor_at_end_and_append_block(irb, else_block);
7875 IrInstruction *else_expr_result;
8926 IrInstSrc *else_expr_result;
78768927 if (else_node) {
78778928 else_expr_result = ir_gen_node_extra(irb, else_node, subexpr_scope, lval, &peer_parent->peers.at(1)->base);
7878 if (else_expr_result == irb->codegen->invalid_instruction)
8929 if (else_expr_result == irb->codegen->invalid_inst_src)
78798930 return else_expr_result;
78808931 } else {
78818932 else_expr_result = ir_build_const_void(irb, scope, node);
78828933 ir_build_end_expr(irb, scope, node, else_expr_result, &peer_parent->peers.at(1)->base);
78838934 }
7884 IrBasicBlock *after_else_block = irb->current_basic_block;
8935 IrBasicBlockSrc *after_else_block = irb->current_basic_block;
78858936 if (!instr_is_unreachable(else_expr_result))
78868937 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
78878938
78888939 ir_set_cursor_at_end_and_append_block(irb, endif_block);
7889 IrInstruction **incoming_values = allocate<IrInstruction *>(2);
8940 IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
78908941 incoming_values[0] = then_expr_result;
78918942 incoming_values[1] = else_expr_result;
7892 IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");
8943 IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
78938944 incoming_blocks[0] = after_then_block;
78948945 incoming_blocks[1] = after_else_block;
78958946
7896 IrInstruction *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);
8947 IrInstSrc *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);
78978948 return ir_expr_wrap(irb, scope, phi, result_loc);
78988949}
78998950
7900static IrInstruction *ir_gen_if_err_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
8951static IrInstSrc *ir_gen_if_err_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
79018952 ResultLoc *result_loc)
79028953{
79038954 assert(node->type == NodeTypeIfErrorExpr);
......@@ -7910,20 +8961,20 @@ static IrInstruction *ir_gen_if_err_expr(IrBuilder *irb, Scope *scope, AstNode *
79108961 Buf *var_symbol = node->data.if_err_expr.var_symbol;
79118962 Buf *err_symbol = node->data.if_err_expr.err_symbol;
79128963
7913 IrInstruction *err_val_ptr = ir_gen_node_extra(irb, target_node, scope, LValPtr, nullptr);
7914 if (err_val_ptr == irb->codegen->invalid_instruction)
8964 IrInstSrc *err_val_ptr = ir_gen_node_extra(irb, target_node, scope, LValPtr, nullptr);
8965 if (err_val_ptr == irb->codegen->invalid_inst_src)
79158966 return err_val_ptr;
79168967
7917 IrInstruction *err_val = ir_build_load_ptr(irb, scope, node, err_val_ptr);
7918 IrInstruction *is_err = ir_build_test_err_src(irb, scope, node, err_val_ptr, true, false);
8968 IrInstSrc *err_val = ir_build_load_ptr(irb, scope, node, err_val_ptr);
8969 IrInstSrc *is_err = ir_build_test_err_src(irb, scope, node, err_val_ptr, true, false);
79198970
7920 IrBasicBlock *ok_block = ir_create_basic_block(irb, scope, "TryOk");
7921 IrBasicBlock *else_block = ir_create_basic_block(irb, scope, "TryElse");
7922 IrBasicBlock *endif_block = ir_create_basic_block(irb, scope, "TryEnd");
8971 IrBasicBlockSrc *ok_block = ir_create_basic_block(irb, scope, "TryOk");
8972 IrBasicBlockSrc *else_block = ir_create_basic_block(irb, scope, "TryElse");
8973 IrBasicBlockSrc *endif_block = ir_create_basic_block(irb, scope, "TryEnd");
79238974
79248975 bool force_comptime = ir_should_inline(irb->exec, scope);
7925 IrInstruction *is_comptime = force_comptime ? ir_build_const_bool(irb, scope, node, true) : ir_build_test_comptime(irb, scope, node, is_err);
7926 IrInstruction *cond_br_inst = ir_build_cond_br(irb, scope, node, is_err, else_block, ok_block, is_comptime);
8976 IrInstSrc *is_comptime = force_comptime ? ir_build_const_bool(irb, scope, node, true) : ir_build_test_comptime(irb, scope, node, is_err);
8977 IrInstSrc *cond_br_inst = ir_build_cond_br(irb, scope, node, is_err, else_block, ok_block, is_comptime);
79278978
79288979 ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, else_block, endif_block,
79298980 result_loc, is_comptime);
......@@ -7934,29 +8985,29 @@ static IrInstruction *ir_gen_if_err_expr(IrBuilder *irb, Scope *scope, AstNode *
79348985 Scope *var_scope;
79358986 if (var_symbol) {
79368987 bool is_shadowable = false;
7937 IrInstruction *var_is_comptime = force_comptime ? ir_build_const_bool(irb, subexpr_scope, node, true) : ir_build_test_comptime(irb, subexpr_scope, node, err_val);
8988 IrInstSrc *var_is_comptime = force_comptime ? ir_build_const_bool(irb, subexpr_scope, node, true) : ir_build_test_comptime(irb, subexpr_scope, node, err_val);
79388989 ZigVar *var = ir_create_var(irb, node, subexpr_scope,
79398990 var_symbol, var_is_const, var_is_const, is_shadowable, var_is_comptime);
79408991
7941 IrInstruction *payload_ptr = ir_build_unwrap_err_payload(irb, subexpr_scope, node, err_val_ptr, false, false);
7942 IrInstruction *var_ptr = var_is_ptr ?
7943 ir_build_ref(irb, subexpr_scope, node, payload_ptr, true, false) : payload_ptr;
8992 IrInstSrc *payload_ptr = ir_build_unwrap_err_payload_src(irb, subexpr_scope, node, err_val_ptr, false, false);
8993 IrInstSrc *var_ptr = var_is_ptr ?
8994 ir_build_ref_src(irb, subexpr_scope, node, payload_ptr, true, false) : payload_ptr;
79448995 ir_build_var_decl_src(irb, subexpr_scope, node, var, nullptr, var_ptr);
79458996 var_scope = var->child_scope;
79468997 } else {
79478998 var_scope = subexpr_scope;
79488999 }
7949 IrInstruction *then_expr_result = ir_gen_node_extra(irb, then_node, var_scope, lval,
9000 IrInstSrc *then_expr_result = ir_gen_node_extra(irb, then_node, var_scope, lval,
79509001 &peer_parent->peers.at(0)->base);
7951 if (then_expr_result == irb->codegen->invalid_instruction)
9002 if (then_expr_result == irb->codegen->invalid_inst_src)
79529003 return then_expr_result;
7953 IrBasicBlock *after_then_block = irb->current_basic_block;
9004 IrBasicBlockSrc *after_then_block = irb->current_basic_block;
79549005 if (!instr_is_unreachable(then_expr_result))
79559006 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
79569007
79579008 ir_set_cursor_at_end_and_append_block(irb, else_block);
79589009
7959 IrInstruction *else_expr_result;
9010 IrInstSrc *else_expr_result;
79609011 if (else_node) {
79619012 Scope *err_var_scope;
79629013 if (err_symbol) {
......@@ -7965,40 +9016,40 @@ static IrInstruction *ir_gen_if_err_expr(IrBuilder *irb, Scope *scope, AstNode *
79659016 ZigVar *var = ir_create_var(irb, node, subexpr_scope,
79669017 err_symbol, is_const, is_const, is_shadowable, is_comptime);
79679018
7968 IrInstruction *err_ptr = ir_build_unwrap_err_code(irb, subexpr_scope, node, err_val_ptr);
9019 IrInstSrc *err_ptr = ir_build_unwrap_err_code_src(irb, subexpr_scope, node, err_val_ptr);
79699020 ir_build_var_decl_src(irb, subexpr_scope, node, var, nullptr, err_ptr);
79709021 err_var_scope = var->child_scope;
79719022 } else {
79729023 err_var_scope = subexpr_scope;
79739024 }
79749025 else_expr_result = ir_gen_node_extra(irb, else_node, err_var_scope, lval, &peer_parent->peers.at(1)->base);
7975 if (else_expr_result == irb->codegen->invalid_instruction)
9026 if (else_expr_result == irb->codegen->invalid_inst_src)
79769027 return else_expr_result;
79779028 } else {
79789029 else_expr_result = ir_build_const_void(irb, scope, node);
79799030 ir_build_end_expr(irb, scope, node, else_expr_result, &peer_parent->peers.at(1)->base);
79809031 }
7981 IrBasicBlock *after_else_block = irb->current_basic_block;
9032 IrBasicBlockSrc *after_else_block = irb->current_basic_block;
79829033 if (!instr_is_unreachable(else_expr_result))
79839034 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
79849035
79859036 ir_set_cursor_at_end_and_append_block(irb, endif_block);
7986 IrInstruction **incoming_values = allocate<IrInstruction *>(2);
9037 IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
79879038 incoming_values[0] = then_expr_result;
79889039 incoming_values[1] = else_expr_result;
7989 IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");
9040 IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
79909041 incoming_blocks[0] = after_then_block;
79919042 incoming_blocks[1] = after_else_block;
79929043
7993 IrInstruction *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);
9044 IrInstSrc *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);
79949045 return ir_expr_wrap(irb, scope, phi, result_loc);
79959046}
79969047
7997static bool ir_gen_switch_prong_expr(IrBuilder *irb, Scope *scope, AstNode *switch_node, AstNode *prong_node,
7998 IrBasicBlock *end_block, IrInstruction *is_comptime, IrInstruction *var_is_comptime,
7999 IrInstruction *target_value_ptr, IrInstruction **prong_values, size_t prong_values_len,
8000 ZigList<IrBasicBlock *> *incoming_blocks, ZigList<IrInstruction *> *incoming_values,
8001 IrInstructionSwitchElseVar **out_switch_else_var, LVal lval, ResultLoc *result_loc)
9048static bool ir_gen_switch_prong_expr(IrBuilderSrc *irb, Scope *scope, AstNode *switch_node, AstNode *prong_node,
9049 IrBasicBlockSrc *end_block, IrInstSrc *is_comptime, IrInstSrc *var_is_comptime,
9050 IrInstSrc *target_value_ptr, IrInstSrc **prong_values, size_t prong_values_len,
9051 ZigList<IrBasicBlockSrc *> *incoming_blocks, ZigList<IrInstSrc *> *incoming_values,
9052 IrInstSrcSwitchElseVar **out_switch_else_var, LVal lval, ResultLoc *result_loc)
80029053{
80039054 assert(switch_node->type == NodeTypeSwitchExpr);
80049055 assert(prong_node->type == NodeTypeSwitchProng);
......@@ -8016,28 +9067,28 @@ static bool ir_gen_switch_prong_expr(IrBuilder *irb, Scope *scope, AstNode *swit
80169067 ZigVar *var = ir_create_var(irb, var_symbol_node, scope,
80179068 var_name, is_const, is_const, is_shadowable, var_is_comptime);
80189069 child_scope = var->child_scope;
8019 IrInstruction *var_ptr;
9070 IrInstSrc *var_ptr;
80209071 if (out_switch_else_var != nullptr) {
8021 IrInstructionSwitchElseVar *switch_else_var = ir_build_switch_else_var(irb, scope, var_symbol_node,
9072 IrInstSrcSwitchElseVar *switch_else_var = ir_build_switch_else_var(irb, scope, var_symbol_node,
80229073 target_value_ptr);
80239074 *out_switch_else_var = switch_else_var;
8024 IrInstruction *payload_ptr = &switch_else_var->base;
8025 var_ptr = var_is_ptr ? ir_build_ref(irb, scope, var_symbol_node, payload_ptr, true, false) : payload_ptr;
9075 IrInstSrc *payload_ptr = &switch_else_var->base;
9076 var_ptr = var_is_ptr ? ir_build_ref_src(irb, scope, var_symbol_node, payload_ptr, true, false) : payload_ptr;
80269077 } else if (prong_values != nullptr) {
8027 IrInstruction *payload_ptr = ir_build_switch_var(irb, scope, var_symbol_node, target_value_ptr,
9078 IrInstSrc *payload_ptr = ir_build_switch_var(irb, scope, var_symbol_node, target_value_ptr,
80289079 prong_values, prong_values_len);
8029 var_ptr = var_is_ptr ? ir_build_ref(irb, scope, var_symbol_node, payload_ptr, true, false) : payload_ptr;
9080 var_ptr = var_is_ptr ? ir_build_ref_src(irb, scope, var_symbol_node, payload_ptr, true, false) : payload_ptr;
80309081 } else {
80319082 var_ptr = var_is_ptr ?
8032 ir_build_ref(irb, scope, var_symbol_node, target_value_ptr, true, false) : target_value_ptr;
9083 ir_build_ref_src(irb, scope, var_symbol_node, target_value_ptr, true, false) : target_value_ptr;
80339084 }
80349085 ir_build_var_decl_src(irb, scope, var_symbol_node, var, nullptr, var_ptr);
80359086 } else {
80369087 child_scope = scope;
80379088 }
80389089
8039 IrInstruction *expr_result = ir_gen_node_extra(irb, expr_node, child_scope, lval, result_loc);
8040 if (expr_result == irb->codegen->invalid_instruction)
9090 IrInstSrc *expr_result = ir_gen_node_extra(irb, expr_node, child_scope, lval, result_loc);
9091 if (expr_result == irb->codegen->invalid_inst_src)
80419092 return false;
80429093 if (!instr_is_unreachable(expr_result))
80439094 ir_mark_gen(ir_build_br(irb, scope, switch_node, end_block, is_comptime));
......@@ -8046,25 +9097,25 @@ static bool ir_gen_switch_prong_expr(IrBuilder *irb, Scope *scope, AstNode *swit
80469097 return true;
80479098}
80489099
8049static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
9100static IrInstSrc *ir_gen_switch_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
80509101 ResultLoc *result_loc)
80519102{
80529103 assert(node->type == NodeTypeSwitchExpr);
80539104
80549105 AstNode *target_node = node->data.switch_expr.expr;
8055 IrInstruction *target_value_ptr = ir_gen_node_extra(irb, target_node, scope, LValPtr, nullptr);
8056 if (target_value_ptr == irb->codegen->invalid_instruction)
9106 IrInstSrc *target_value_ptr = ir_gen_node_extra(irb, target_node, scope, LValPtr, nullptr);
9107 if (target_value_ptr == irb->codegen->invalid_inst_src)
80579108 return target_value_ptr;
8058 IrInstruction *target_value = ir_build_switch_target(irb, scope, node, target_value_ptr);
9109 IrInstSrc *target_value = ir_build_switch_target(irb, scope, node, target_value_ptr);
80599110
8060 IrBasicBlock *else_block = ir_create_basic_block(irb, scope, "SwitchElse");
8061 IrBasicBlock *end_block = ir_create_basic_block(irb, scope, "SwitchEnd");
9111 IrBasicBlockSrc *else_block = ir_create_basic_block(irb, scope, "SwitchElse");
9112 IrBasicBlockSrc *end_block = ir_create_basic_block(irb, scope, "SwitchEnd");
80629113
80639114 size_t prong_count = node->data.switch_expr.prongs.length;
8064 ZigList<IrInstructionSwitchBrCase> cases = {0};
9115 ZigList<IrInstSrcSwitchBrCase> cases = {0};
80659116
8066 IrInstruction *is_comptime;
8067 IrInstruction *var_is_comptime;
9117 IrInstSrc *is_comptime;
9118 IrInstSrc *var_is_comptime;
80689119 if (ir_should_inline(irb->exec, scope)) {
80699120 is_comptime = ir_build_const_bool(irb, scope, node, true);
80709121 var_is_comptime = is_comptime;
......@@ -8073,11 +9124,11 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
80739124 var_is_comptime = ir_build_test_comptime(irb, scope, node, target_value_ptr);
80749125 }
80759126
8076 ZigList<IrInstruction *> incoming_values = {0};
8077 ZigList<IrBasicBlock *> incoming_blocks = {0};
8078 ZigList<IrInstructionCheckSwitchProngsRange> check_ranges = {0};
9127 ZigList<IrInstSrc *> incoming_values = {0};
9128 ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
9129 ZigList<IrInstSrcCheckSwitchProngsRange> check_ranges = {0};
80799130
8080 IrInstructionSwitchElseVar *switch_else_var = nullptr;
9131 IrInstSrcSwitchElseVar *switch_else_var = nullptr;
80819132
80829133 ResultLocPeerParent *peer_parent = allocate<ResultLocPeerParent>(1);
80839134 peer_parent->base.id = ResultLocIdPeerParent;
......@@ -8099,7 +9150,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
80999150 if (prong_node->data.switch_prong.any_items_are_range) {
81009151 ResultLocPeer *this_peer_result_loc = create_peer_result(peer_parent);
81019152
8102 IrInstruction *ok_bit = nullptr;
9153 IrInstSrc *ok_bit = nullptr;
81039154 AstNode *last_item_node = nullptr;
81049155 for (size_t item_i = 0; item_i < prong_item_count; item_i += 1) {
81059156 AstNode *item_node = prong_node->data.switch_prong.items.at(item_i);
......@@ -8108,23 +9159,23 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
81089159 AstNode *start_node = item_node->data.switch_range.start;
81099160 AstNode *end_node = item_node->data.switch_range.end;
81109161
8111 IrInstruction *start_value = ir_gen_node(irb, start_node, comptime_scope);
8112 if (start_value == irb->codegen->invalid_instruction)
8113 return irb->codegen->invalid_instruction;
9162 IrInstSrc *start_value = ir_gen_node(irb, start_node, comptime_scope);
9163 if (start_value == irb->codegen->invalid_inst_src)
9164 return irb->codegen->invalid_inst_src;
81149165
8115 IrInstruction *end_value = ir_gen_node(irb, end_node, comptime_scope);
8116 if (end_value == irb->codegen->invalid_instruction)
8117 return irb->codegen->invalid_instruction;
9166 IrInstSrc *end_value = ir_gen_node(irb, end_node, comptime_scope);
9167 if (end_value == irb->codegen->invalid_inst_src)
9168 return irb->codegen->invalid_inst_src;
81189169
8119 IrInstructionCheckSwitchProngsRange *check_range = check_ranges.add_one();
9170 IrInstSrcCheckSwitchProngsRange *check_range = check_ranges.add_one();
81209171 check_range->start = start_value;
81219172 check_range->end = end_value;
81229173
8123 IrInstruction *lower_range_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpGreaterOrEq,
9174 IrInstSrc *lower_range_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpGreaterOrEq,
81249175 target_value, start_value, false);
8125 IrInstruction *upper_range_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpLessOrEq,
9176 IrInstSrc *upper_range_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpLessOrEq,
81269177 target_value, end_value, false);
8127 IrInstruction *both_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpBoolAnd,
9178 IrInstSrc *both_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpBoolAnd,
81289179 lower_range_ok, upper_range_ok, false);
81299180 if (ok_bit) {
81309181 ok_bit = ir_build_bin_op(irb, scope, item_node, IrBinOpBoolOr, both_ok, ok_bit, false);
......@@ -8132,15 +9183,15 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
81329183 ok_bit = both_ok;
81339184 }
81349185 } else {
8135 IrInstruction *item_value = ir_gen_node(irb, item_node, comptime_scope);
8136 if (item_value == irb->codegen->invalid_instruction)
8137 return irb->codegen->invalid_instruction;
9186 IrInstSrc *item_value = ir_gen_node(irb, item_node, comptime_scope);
9187 if (item_value == irb->codegen->invalid_inst_src)
9188 return irb->codegen->invalid_inst_src;
81389189
8139 IrInstructionCheckSwitchProngsRange *check_range = check_ranges.add_one();
9190 IrInstSrcCheckSwitchProngsRange *check_range = check_ranges.add_one();
81409191 check_range->start = item_value;
81419192 check_range->end = item_value;
81429193
8143 IrInstruction *cmp_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpEq,
9194 IrInstSrc *cmp_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpEq,
81449195 item_value, target_value, false);
81459196 if (ok_bit) {
81469197 ok_bit = ir_build_bin_op(irb, scope, item_node, IrBinOpBoolOr, cmp_ok, ok_bit, false);
......@@ -8150,12 +9201,12 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
81509201 }
81519202 }
81529203
8153 IrBasicBlock *range_block_yes = ir_create_basic_block(irb, scope, "SwitchRangeYes");
8154 IrBasicBlock *range_block_no = ir_create_basic_block(irb, scope, "SwitchRangeNo");
9204 IrBasicBlockSrc *range_block_yes = ir_create_basic_block(irb, scope, "SwitchRangeYes");
9205 IrBasicBlockSrc *range_block_no = ir_create_basic_block(irb, scope, "SwitchRangeNo");
81559206
81569207 assert(ok_bit);
81579208 assert(last_item_node);
8158 IrInstruction *br_inst = ir_mark_gen(ir_build_cond_br(irb, scope, last_item_node, ok_bit,
9209 IrInstSrc *br_inst = ir_mark_gen(ir_build_cond_br(irb, scope, last_item_node, ok_bit,
81599210 range_block_yes, range_block_no, is_comptime));
81609211 if (peer_parent->base.source_instruction == nullptr) {
81619212 peer_parent->base.source_instruction = br_inst;
......@@ -8170,7 +9221,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
81709221 is_comptime, var_is_comptime, target_value_ptr, nullptr, 0,
81719222 &incoming_blocks, &incoming_values, nullptr, LValNone, &this_peer_result_loc->base))
81729223 {
8173 return irb->codegen->invalid_instruction;
9224 return irb->codegen->invalid_inst_src;
81749225 }
81759226
81769227 ir_set_cursor_at_end_and_append_block(irb, range_block_no);
......@@ -8181,7 +9232,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
81819232 buf_sprintf("multiple else prongs in switch expression"));
81829233 add_error_note(irb->codegen, msg, else_prong,
81839234 buf_sprintf("previous else prong is here"));
8184 return irb->codegen->invalid_instruction;
9235 return irb->codegen->invalid_inst_src;
81859236 }
81869237 else_prong = prong_node;
81879238 } else if (prong_item_count == 1 &&
......@@ -8192,7 +9243,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
81929243 buf_sprintf("multiple '_' prongs in switch expression"));
81939244 add_error_note(irb->codegen, msg, underscore_prong,
81949245 buf_sprintf("previous '_' prong is here"));
8195 return irb->codegen->invalid_instruction;
9246 return irb->codegen->invalid_inst_src;
81969247 }
81979248 underscore_prong = prong_node;
81989249 } else {
......@@ -8207,11 +9258,11 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
82079258 else
82089259 add_error_note(irb->codegen, msg, underscore_prong,
82099260 buf_sprintf("'_' prong is here"));
8210 return irb->codegen->invalid_instruction;
9261 return irb->codegen->invalid_inst_src;
82119262 }
82129263 ResultLocPeer *this_peer_result_loc = create_peer_result(peer_parent);
82139264
8214 IrBasicBlock *prev_block = irb->current_basic_block;
9265 IrBasicBlockSrc *prev_block = irb->current_basic_block;
82159266 if (peer_parent->peers.length > 0) {
82169267 peer_parent->peers.last()->next_bb = else_block;
82179268 }
......@@ -8221,7 +9272,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
82219272 is_comptime, var_is_comptime, target_value_ptr, nullptr, 0, &incoming_blocks, &incoming_values,
82229273 &switch_else_var, LValNone, &this_peer_result_loc->base))
82239274 {
8224 return irb->codegen->invalid_instruction;
9275 return irb->codegen->invalid_inst_src;
82259276 }
82269277 ir_set_cursor_at_end(irb, prev_block);
82279278 }
......@@ -8240,29 +9291,29 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
82409291
82419292 ResultLocPeer *this_peer_result_loc = create_peer_result(peer_parent);
82429293
8243 IrBasicBlock *prong_block = ir_create_basic_block(irb, scope, "SwitchProng");
8244 IrInstruction **items = allocate<IrInstruction *>(prong_item_count);
9294 IrBasicBlockSrc *prong_block = ir_create_basic_block(irb, scope, "SwitchProng");
9295 IrInstSrc **items = allocate<IrInstSrc *>(prong_item_count);
82459296
82469297 for (size_t item_i = 0; item_i < prong_item_count; item_i += 1) {
82479298 AstNode *item_node = prong_node->data.switch_prong.items.at(item_i);
82489299 assert(item_node->type != NodeTypeSwitchRange);
82499300
8250 IrInstruction *item_value = ir_gen_node(irb, item_node, comptime_scope);
8251 if (item_value == irb->codegen->invalid_instruction)
8252 return irb->codegen->invalid_instruction;
9301 IrInstSrc *item_value = ir_gen_node(irb, item_node, comptime_scope);
9302 if (item_value == irb->codegen->invalid_inst_src)
9303 return irb->codegen->invalid_inst_src;
82539304
8254 IrInstructionCheckSwitchProngsRange *check_range = check_ranges.add_one();
9305 IrInstSrcCheckSwitchProngsRange *check_range = check_ranges.add_one();
82559306 check_range->start = item_value;
82569307 check_range->end = item_value;
82579308
8258 IrInstructionSwitchBrCase *this_case = cases.add_one();
9309 IrInstSrcSwitchBrCase *this_case = cases.add_one();
82599310 this_case->value = item_value;
82609311 this_case->block = prong_block;
82619312
82629313 items[item_i] = item_value;
82639314 }
82649315
8265 IrBasicBlock *prev_block = irb->current_basic_block;
9316 IrBasicBlockSrc *prev_block = irb->current_basic_block;
82669317 if (peer_parent->peers.length > 0) {
82679318 peer_parent->peers.last()->next_bb = prong_block;
82689319 }
......@@ -8272,21 +9323,21 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
82729323 is_comptime, var_is_comptime, target_value_ptr, items, prong_item_count,
82739324 &incoming_blocks, &incoming_values, nullptr, LValNone, &this_peer_result_loc->base))
82749325 {
8275 return irb->codegen->invalid_instruction;
9326 return irb->codegen->invalid_inst_src;
82769327 }
82779328
82789329 ir_set_cursor_at_end(irb, prev_block);
82799330
82809331 }
82819332
8282 IrInstruction *switch_prongs_void = ir_build_check_switch_prongs(irb, scope, node, target_value,
9333 IrInstSrc *switch_prongs_void = ir_build_check_switch_prongs(irb, scope, node, target_value,
82839334 check_ranges.items, check_ranges.length, else_prong != nullptr, underscore_prong != nullptr);
82849335
8285 IrInstruction *br_instruction;
9336 IrInstSrc *br_instruction;
82869337 if (cases.length == 0) {
82879338 br_instruction = ir_build_br(irb, scope, node, else_block, is_comptime);
82889339 } else {
8289 IrInstructionSwitchBr *switch_br = ir_build_switch_br(irb, scope, node, target_value, else_block,
9340 IrInstSrcSwitchBr *switch_br = ir_build_switch_br_src(irb, scope, node, target_value, else_block,
82909341 cases.length, cases.items, is_comptime, switch_prongs_void);
82919342 if (switch_else_var != nullptr) {
82929343 switch_else_var->switch_br = switch_br;
......@@ -8314,7 +9365,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
83149365
83159366 ir_set_cursor_at_end_and_append_block(irb, end_block);
83169367 assert(incoming_blocks.length == incoming_values.length);
8317 IrInstruction *result_instruction;
9368 IrInstSrc *result_instruction;
83189369 if (incoming_blocks.length == 0) {
83199370 result_instruction = ir_build_const_void(irb, scope, node);
83209371 } else {
......@@ -8324,7 +9375,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
83249375 return ir_lval_wrap(irb, scope, result_instruction, lval, result_loc);
83259376}
83269377
8327static IrInstruction *ir_gen_comptime(IrBuilder *irb, Scope *parent_scope, AstNode *node, LVal lval) {
9378static IrInstSrc *ir_gen_comptime(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node, LVal lval) {
83289379 assert(node->type == NodeTypeCompTime);
83299380
83309381 Scope *child_scope = create_comptime_scope(irb->codegen, node, parent_scope);
......@@ -8332,28 +9383,28 @@ static IrInstruction *ir_gen_comptime(IrBuilder *irb, Scope *parent_scope, AstNo
83329383 return ir_gen_node_extra(irb, node->data.comptime_expr.expr, child_scope, lval, nullptr);
83339384}
83349385
8335static IrInstruction *ir_gen_return_from_block(IrBuilder *irb, Scope *break_scope, AstNode *node, ScopeBlock *block_scope) {
8336 IrInstruction *is_comptime;
9386static IrInstSrc *ir_gen_return_from_block(IrBuilderSrc *irb, Scope *break_scope, AstNode *node, ScopeBlock *block_scope) {
9387 IrInstSrc *is_comptime;
83379388 if (ir_should_inline(irb->exec, break_scope)) {
83389389 is_comptime = ir_build_const_bool(irb, break_scope, node, true);
83399390 } else {
83409391 is_comptime = block_scope->is_comptime;
83419392 }
83429393
8343 IrInstruction *result_value;
9394 IrInstSrc *result_value;
83449395 if (node->data.break_expr.expr) {
83459396 ResultLocPeer *peer_result = create_peer_result(block_scope->peer_parent);
83469397 block_scope->peer_parent->peers.append(peer_result);
83479398
83489399 result_value = ir_gen_node_extra(irb, node->data.break_expr.expr, break_scope, block_scope->lval,
83499400 &peer_result->base);
8350 if (result_value == irb->codegen->invalid_instruction)
8351 return irb->codegen->invalid_instruction;
9401 if (result_value == irb->codegen->invalid_inst_src)
9402 return irb->codegen->invalid_inst_src;
83529403 } else {
83539404 result_value = ir_build_const_void(irb, break_scope, node);
83549405 }
83559406
8356 IrBasicBlock *dest_block = block_scope->end_block;
9407 IrBasicBlockSrc *dest_block = block_scope->end_block;
83579408 ir_gen_defers_for_block(irb, break_scope, dest_block->scope, false);
83589409
83599410 block_scope->incoming_blocks->append(irb->current_basic_block);
......@@ -8361,7 +9412,7 @@ static IrInstruction *ir_gen_return_from_block(IrBuilder *irb, Scope *break_scop
83619412 return ir_build_br(irb, break_scope, node, dest_block, is_comptime);
83629413}
83639414
8364static IrInstruction *ir_gen_break(IrBuilder *irb, Scope *break_scope, AstNode *node) {
9415static IrInstSrc *ir_gen_break(IrBuilderSrc *irb, Scope *break_scope, AstNode *node) {
83659416 assert(node->type == NodeTypeBreak);
83669417
83679418 // Search up the scope. We'll find one of these things first:
......@@ -8376,14 +9427,14 @@ static IrInstruction *ir_gen_break(IrBuilder *irb, Scope *break_scope, AstNode *
83769427 if (search_scope == nullptr || search_scope->id == ScopeIdFnDef) {
83779428 if (node->data.break_expr.name != nullptr) {
83789429 add_node_error(irb->codegen, node, buf_sprintf("label not found: '%s'", buf_ptr(node->data.break_expr.name)));
8379 return irb->codegen->invalid_instruction;
9430 return irb->codegen->invalid_inst_src;
83809431 } else {
83819432 add_node_error(irb->codegen, node, buf_sprintf("break expression outside loop"));
8382 return irb->codegen->invalid_instruction;
9433 return irb->codegen->invalid_inst_src;
83839434 }
83849435 } else if (search_scope->id == ScopeIdDeferExpr) {
83859436 add_node_error(irb->codegen, node, buf_sprintf("cannot break out of defer expression"));
8386 return irb->codegen->invalid_instruction;
9437 return irb->codegen->invalid_inst_src;
83879438 } else if (search_scope->id == ScopeIdLoop) {
83889439 ScopeLoop *this_loop_scope = (ScopeLoop *)search_scope;
83899440 if (node->data.break_expr.name == nullptr ||
......@@ -8402,32 +9453,32 @@ static IrInstruction *ir_gen_break(IrBuilder *irb, Scope *break_scope, AstNode *
84029453 }
84039454 } else if (search_scope->id == ScopeIdSuspend) {
84049455 add_node_error(irb->codegen, node, buf_sprintf("cannot break out of suspend block"));
8405 return irb->codegen->invalid_instruction;
9456 return irb->codegen->invalid_inst_src;
84069457 }
84079458 search_scope = search_scope->parent;
84089459 }
84099460
8410 IrInstruction *is_comptime;
9461 IrInstSrc *is_comptime;
84119462 if (ir_should_inline(irb->exec, break_scope)) {
84129463 is_comptime = ir_build_const_bool(irb, break_scope, node, true);
84139464 } else {
84149465 is_comptime = loop_scope->is_comptime;
84159466 }
84169467
8417 IrInstruction *result_value;
9468 IrInstSrc *result_value;
84189469 if (node->data.break_expr.expr) {
84199470 ResultLocPeer *peer_result = create_peer_result(loop_scope->peer_parent);
84209471 loop_scope->peer_parent->peers.append(peer_result);
84219472
84229473 result_value = ir_gen_node_extra(irb, node->data.break_expr.expr, break_scope,
84239474 loop_scope->lval, &peer_result->base);
8424 if (result_value == irb->codegen->invalid_instruction)
8425 return irb->codegen->invalid_instruction;
9475 if (result_value == irb->codegen->invalid_inst_src)
9476 return irb->codegen->invalid_inst_src;
84269477 } else {
84279478 result_value = ir_build_const_void(irb, break_scope, node);
84289479 }
84299480
8430 IrBasicBlock *dest_block = loop_scope->break_block;
9481 IrBasicBlockSrc *dest_block = loop_scope->break_block;
84319482 ir_gen_defers_for_block(irb, break_scope, dest_block->scope, false);
84329483
84339484 loop_scope->incoming_blocks->append(irb->current_basic_block);
......@@ -8435,7 +9486,7 @@ static IrInstruction *ir_gen_break(IrBuilder *irb, Scope *break_scope, AstNode *
84359486 return ir_build_br(irb, break_scope, node, dest_block, is_comptime);
84369487}
84379488
8438static IrInstruction *ir_gen_continue(IrBuilder *irb, Scope *continue_scope, AstNode *node) {
9489static IrInstSrc *ir_gen_continue(IrBuilderSrc *irb, Scope *continue_scope, AstNode *node) {
84399490 assert(node->type == NodeTypeContinue);
84409491
84419492 // Search up the scope. We'll find one of these things first:
......@@ -8451,14 +9502,14 @@ static IrInstruction *ir_gen_continue(IrBuilder *irb, Scope *continue_scope, Ast
84519502 if (search_scope == nullptr || search_scope->id == ScopeIdFnDef) {
84529503 if (node->data.continue_expr.name != nullptr) {
84539504 add_node_error(irb->codegen, node, buf_sprintf("labeled loop not found: '%s'", buf_ptr(node->data.continue_expr.name)));
8454 return irb->codegen->invalid_instruction;
9505 return irb->codegen->invalid_inst_src;
84559506 } else {
84569507 add_node_error(irb->codegen, node, buf_sprintf("continue expression outside loop"));
8457 return irb->codegen->invalid_instruction;
9508 return irb->codegen->invalid_inst_src;
84589509 }
84599510 } else if (search_scope->id == ScopeIdDeferExpr) {
84609511 add_node_error(irb->codegen, node, buf_sprintf("cannot continue out of defer expression"));
8461 return irb->codegen->invalid_instruction;
9512 return irb->codegen->invalid_inst_src;
84629513 } else if (search_scope->id == ScopeIdLoop) {
84639514 ScopeLoop *this_loop_scope = (ScopeLoop *)search_scope;
84649515 if (node->data.continue_expr.name == nullptr ||
......@@ -8474,7 +9525,7 @@ static IrInstruction *ir_gen_continue(IrBuilder *irb, Scope *continue_scope, Ast
84749525 search_scope = search_scope->parent;
84759526 }
84769527
8477 IrInstruction *is_comptime;
9528 IrInstSrc *is_comptime;
84789529 if (ir_should_inline(irb->exec, continue_scope)) {
84799530 is_comptime = ir_build_const_bool(irb, continue_scope, node, true);
84809531 } else {
......@@ -8486,17 +9537,17 @@ static IrInstruction *ir_gen_continue(IrBuilder *irb, Scope *continue_scope, Ast
84869537 ir_mark_gen(ir_build_check_runtime_scope(irb, continue_scope, node, scope_runtime->is_comptime, is_comptime));
84879538 }
84889539
8489 IrBasicBlock *dest_block = loop_scope->continue_block;
9540 IrBasicBlockSrc *dest_block = loop_scope->continue_block;
84909541 ir_gen_defers_for_block(irb, continue_scope, dest_block->scope, false);
84919542 return ir_mark_gen(ir_build_br(irb, continue_scope, node, dest_block, is_comptime));
84929543}
84939544
8494static IrInstruction *ir_gen_error_type(IrBuilder *irb, Scope *scope, AstNode *node) {
9545static IrInstSrc *ir_gen_error_type(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
84959546 assert(node->type == NodeTypeErrorType);
84969547 return ir_build_const_type(irb, scope, node, irb->codegen->builtin_types.entry_global_error_set);
84979548}
84989549
8499static IrInstruction *ir_gen_defer(IrBuilder *irb, Scope *parent_scope, AstNode *node) {
9550static IrInstSrc *ir_gen_defer(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
85009551 assert(node->type == NodeTypeDefer);
85019552
85029553 ScopeDefer *defer_child_scope = create_defer_scope(irb->codegen, node, parent_scope);
......@@ -8508,7 +9559,7 @@ static IrInstruction *ir_gen_defer(IrBuilder *irb, Scope *parent_scope, AstNode
85089559 return ir_build_const_void(irb, parent_scope, node);
85099560}
85109561
8511static IrInstruction *ir_gen_slice(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
9562static IrInstSrc *ir_gen_slice(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
85129563 assert(node->type == NodeTypeSliceExpr);
85139564
85149565 AstNodeSliceExpr *slice_expr = &node->data.slice_expr;
......@@ -8517,38 +9568,38 @@ static IrInstruction *ir_gen_slice(IrBuilder *irb, Scope *scope, AstNode *node,
85179568 AstNode *end_node = slice_expr->end;
85189569 AstNode *sentinel_node = slice_expr->sentinel;
85199570
8520 IrInstruction *ptr_value = ir_gen_node_extra(irb, array_node, scope, LValPtr, nullptr);
8521 if (ptr_value == irb->codegen->invalid_instruction)
8522 return irb->codegen->invalid_instruction;
9571 IrInstSrc *ptr_value = ir_gen_node_extra(irb, array_node, scope, LValPtr, nullptr);
9572 if (ptr_value == irb->codegen->invalid_inst_src)
9573 return irb->codegen->invalid_inst_src;
85239574
8524 IrInstruction *start_value = ir_gen_node(irb, start_node, scope);
8525 if (start_value == irb->codegen->invalid_instruction)
8526 return irb->codegen->invalid_instruction;
9575 IrInstSrc *start_value = ir_gen_node(irb, start_node, scope);
9576 if (start_value == irb->codegen->invalid_inst_src)
9577 return irb->codegen->invalid_inst_src;
85279578
8528 IrInstruction *end_value;
9579 IrInstSrc *end_value;
85299580 if (end_node) {
85309581 end_value = ir_gen_node(irb, end_node, scope);
8531 if (end_value == irb->codegen->invalid_instruction)
8532 return irb->codegen->invalid_instruction;
9582 if (end_value == irb->codegen->invalid_inst_src)
9583 return irb->codegen->invalid_inst_src;
85339584 } else {
85349585 end_value = nullptr;
85359586 }
85369587
8537 IrInstruction *sentinel_value;
9588 IrInstSrc *sentinel_value;
85389589 if (sentinel_node) {
85399590 sentinel_value = ir_gen_node(irb, sentinel_node, scope);
8540 if (sentinel_value == irb->codegen->invalid_instruction)
8541 return irb->codegen->invalid_instruction;
9591 if (sentinel_value == irb->codegen->invalid_inst_src)
9592 return irb->codegen->invalid_inst_src;
85429593 } else {
85439594 sentinel_value = nullptr;
85449595 }
85459596
8546 IrInstruction *slice = ir_build_slice_src(irb, scope, node, ptr_value, start_value, end_value,
9597 IrInstSrc *slice = ir_build_slice_src(irb, scope, node, ptr_value, start_value, end_value,
85479598 sentinel_value, true, result_loc);
85489599 return ir_lval_wrap(irb, scope, slice, lval, result_loc);
85499600}
85509601
8551static IrInstruction *ir_gen_catch(IrBuilder *irb, Scope *parent_scope, AstNode *node, LVal lval,
9602static IrInstSrc *ir_gen_catch(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node, LVal lval,
85529603 ResultLoc *result_loc)
85539604{
85549605 assert(node->type == NodeTypeCatchExpr);
......@@ -8562,29 +9613,29 @@ static IrInstruction *ir_gen_catch(IrBuilder *irb, Scope *parent_scope, AstNode
85629613 assert(var_node->type == NodeTypeSymbol);
85639614 Buf *var_name = var_node->data.symbol_expr.symbol;
85649615 add_node_error(irb->codegen, var_node, buf_sprintf("unused variable: '%s'", buf_ptr(var_name)));
8565 return irb->codegen->invalid_instruction;
9616 return irb->codegen->invalid_inst_src;
85669617 }
85679618 return ir_gen_catch_unreachable(irb, parent_scope, node, op1_node, lval, result_loc);
85689619 }
85699620
85709621
8571 IrInstruction *err_union_ptr = ir_gen_node_extra(irb, op1_node, parent_scope, LValPtr, nullptr);
8572 if (err_union_ptr == irb->codegen->invalid_instruction)
8573 return irb->codegen->invalid_instruction;
9622 IrInstSrc *err_union_ptr = ir_gen_node_extra(irb, op1_node, parent_scope, LValPtr, nullptr);
9623 if (err_union_ptr == irb->codegen->invalid_inst_src)
9624 return irb->codegen->invalid_inst_src;
85749625
8575 IrInstruction *is_err = ir_build_test_err_src(irb, parent_scope, node, err_union_ptr, true, false);
9626 IrInstSrc *is_err = ir_build_test_err_src(irb, parent_scope, node, err_union_ptr, true, false);
85769627
8577 IrInstruction *is_comptime;
9628 IrInstSrc *is_comptime;
85789629 if (ir_should_inline(irb->exec, parent_scope)) {
85799630 is_comptime = ir_build_const_bool(irb, parent_scope, node, true);
85809631 } else {
85819632 is_comptime = ir_build_test_comptime(irb, parent_scope, node, is_err);
85829633 }
85839634
8584 IrBasicBlock *ok_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrOk");
8585 IrBasicBlock *err_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrError");
8586 IrBasicBlock *end_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrEnd");
8587 IrInstruction *cond_br_inst = ir_build_cond_br(irb, parent_scope, node, is_err, err_block, ok_block, is_comptime);
9635 IrBasicBlockSrc *ok_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrOk");
9636 IrBasicBlockSrc *err_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrError");
9637 IrBasicBlockSrc *end_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrEnd");
9638 IrInstSrc *cond_br_inst = ir_build_cond_br(irb, parent_scope, node, is_err, err_block, ok_block, is_comptime);
85889639
85899640 ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, ok_block, end_block, result_loc,
85909641 is_comptime);
......@@ -8600,33 +9651,33 @@ static IrInstruction *ir_gen_catch(IrBuilder *irb, Scope *parent_scope, AstNode
86009651 ZigVar *var = ir_create_var(irb, node, subexpr_scope, var_name,
86019652 is_const, is_const, is_shadowable, is_comptime);
86029653 err_scope = var->child_scope;
8603 IrInstruction *err_ptr = ir_build_unwrap_err_code(irb, err_scope, node, err_union_ptr);
9654 IrInstSrc *err_ptr = ir_build_unwrap_err_code_src(irb, err_scope, node, err_union_ptr);
86049655 ir_build_var_decl_src(irb, err_scope, var_node, var, nullptr, err_ptr);
86059656 } else {
86069657 err_scope = subexpr_scope;
86079658 }
8608 IrInstruction *err_result = ir_gen_node_extra(irb, op2_node, err_scope, LValNone, &peer_parent->peers.at(0)->base);
8609 if (err_result == irb->codegen->invalid_instruction)
8610 return irb->codegen->invalid_instruction;
8611 IrBasicBlock *after_err_block = irb->current_basic_block;
9659 IrInstSrc *err_result = ir_gen_node_extra(irb, op2_node, err_scope, LValNone, &peer_parent->peers.at(0)->base);
9660 if (err_result == irb->codegen->invalid_inst_src)
9661 return irb->codegen->invalid_inst_src;
9662 IrBasicBlockSrc *after_err_block = irb->current_basic_block;
86129663 if (!instr_is_unreachable(err_result))
86139664 ir_mark_gen(ir_build_br(irb, parent_scope, node, end_block, is_comptime));
86149665
86159666 ir_set_cursor_at_end_and_append_block(irb, ok_block);
8616 IrInstruction *unwrapped_ptr = ir_build_unwrap_err_payload(irb, parent_scope, node, err_union_ptr, false, false);
8617 IrInstruction *unwrapped_payload = ir_build_load_ptr(irb, parent_scope, node, unwrapped_ptr);
9667 IrInstSrc *unwrapped_ptr = ir_build_unwrap_err_payload_src(irb, parent_scope, node, err_union_ptr, false, false);
9668 IrInstSrc *unwrapped_payload = ir_build_load_ptr(irb, parent_scope, node, unwrapped_ptr);
86189669 ir_build_end_expr(irb, parent_scope, node, unwrapped_payload, &peer_parent->peers.at(1)->base);
8619 IrBasicBlock *after_ok_block = irb->current_basic_block;
9670 IrBasicBlockSrc *after_ok_block = irb->current_basic_block;
86209671 ir_build_br(irb, parent_scope, node, end_block, is_comptime);
86219672
86229673 ir_set_cursor_at_end_and_append_block(irb, end_block);
8623 IrInstruction **incoming_values = allocate<IrInstruction *>(2);
9674 IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
86249675 incoming_values[0] = err_result;
86259676 incoming_values[1] = unwrapped_payload;
8626 IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");
9677 IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
86279678 incoming_blocks[0] = after_err_block;
86289679 incoming_blocks[1] = after_ok_block;
8629 IrInstruction *phi = ir_build_phi(irb, parent_scope, node, 2, incoming_blocks, incoming_values, peer_parent);
9680 IrInstSrc *phi = ir_build_phi(irb, parent_scope, node, 2, incoming_blocks, incoming_values, peer_parent);
86309681 return ir_lval_wrap(irb, parent_scope, phi, lval, result_loc);
86319682}
86329683
......@@ -8644,7 +9695,7 @@ static bool render_instance_name_recursive(CodeGen *codegen, Buf *name, Scope *o
86449695 return true;
86459696}
86469697
8647static Buf *get_anon_type_name(CodeGen *codegen, IrExecutable *exec, const char *kind_name,
9698static Buf *get_anon_type_name(CodeGen *codegen, IrExecutableSrc *exec, const char *kind_name,
86489699 Scope *scope, AstNode *source_node, Buf *out_bare_name)
86499700{
86509701 if (exec != nullptr && exec->name) {
......@@ -8673,7 +9724,7 @@ static Buf *get_anon_type_name(CodeGen *codegen, IrExecutable *exec, const char
86739724 }
86749725}
86759726
8676static IrInstruction *ir_gen_container_decl(IrBuilder *irb, Scope *parent_scope, AstNode *node) {
9727static IrInstSrc *ir_gen_container_decl(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
86779728 assert(node->type == NodeTypeContainerDecl);
86789729
86799730 ContainerKind kind = node->data.container_decl.kind;
......@@ -8798,7 +9849,7 @@ static AstNode *ast_field_to_symbol_node(AstNode *err_set_field_node) {
87989849 }
87999850}
88009851
8801static IrInstruction *ir_gen_err_set_decl(IrBuilder *irb, Scope *parent_scope, AstNode *node) {
9852static IrInstSrc *ir_gen_err_set_decl(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
88029853 assert(node->type == NodeTypeErrorSetDecl);
88039854
88049855 uint32_t err_count = node->data.err_set_decl.decls.length;
......@@ -8841,7 +9892,7 @@ static IrInstruction *ir_gen_err_set_decl(IrBuilder *irb, Scope *parent_scope, A
88419892 buf_sprintf("duplicate error: '%s'", buf_ptr(&err->name)));
88429893 add_error_note(irb->codegen, msg, ast_field_to_symbol_node(prev_err->decl_node),
88439894 buf_sprintf("other error here"));
8844 return irb->codegen->invalid_instruction;
9895 return irb->codegen->invalid_inst_src;
88459896 }
88469897 errors[err->value] = err;
88479898 }
......@@ -8849,11 +9900,11 @@ static IrInstruction *ir_gen_err_set_decl(IrBuilder *irb, Scope *parent_scope, A
88499900 return ir_build_const_type(irb, parent_scope, node, err_set_type);
88509901}
88519902
8852static IrInstruction *ir_gen_fn_proto(IrBuilder *irb, Scope *parent_scope, AstNode *node) {
9903static IrInstSrc *ir_gen_fn_proto(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
88539904 assert(node->type == NodeTypeFnProto);
88549905
88559906 size_t param_count = node->data.fn_proto.params.length;
8856 IrInstruction **param_types = allocate<IrInstruction*>(param_count);
9907 IrInstSrc **param_types = allocate<IrInstSrc*>(param_count);
88579908
88589909 bool is_var_args = false;
88599910 for (size_t i = 0; i < param_count; i += 1) {
......@@ -8864,59 +9915,59 @@ static IrInstruction *ir_gen_fn_proto(IrBuilder *irb, Scope *parent_scope, AstNo
88649915 }
88659916 if (param_node->data.param_decl.var_token == nullptr) {
88669917 AstNode *type_node = param_node->data.param_decl.type;
8867 IrInstruction *type_value = ir_gen_node(irb, type_node, parent_scope);
8868 if (type_value == irb->codegen->invalid_instruction)
8869 return irb->codegen->invalid_instruction;
9918 IrInstSrc *type_value = ir_gen_node(irb, type_node, parent_scope);
9919 if (type_value == irb->codegen->invalid_inst_src)
9920 return irb->codegen->invalid_inst_src;
88709921 param_types[i] = type_value;
88719922 } else {
88729923 param_types[i] = nullptr;
88739924 }
88749925 }
88759926
8876 IrInstruction *align_value = nullptr;
9927 IrInstSrc *align_value = nullptr;
88779928 if (node->data.fn_proto.align_expr != nullptr) {
88789929 align_value = ir_gen_node(irb, node->data.fn_proto.align_expr, parent_scope);
8879 if (align_value == irb->codegen->invalid_instruction)
8880 return irb->codegen->invalid_instruction;
9930 if (align_value == irb->codegen->invalid_inst_src)
9931 return irb->codegen->invalid_inst_src;
88819932 }
88829933
8883 IrInstruction *callconv_value = nullptr;
9934 IrInstSrc *callconv_value = nullptr;
88849935 if (node->data.fn_proto.callconv_expr != nullptr) {
88859936 callconv_value = ir_gen_node(irb, node->data.fn_proto.callconv_expr, parent_scope);
8886 if (callconv_value == irb->codegen->invalid_instruction)
8887 return irb->codegen->invalid_instruction;
9937 if (callconv_value == irb->codegen->invalid_inst_src)
9938 return irb->codegen->invalid_inst_src;
88889939 }
88899940
8890 IrInstruction *return_type;
9941 IrInstSrc *return_type;
88919942 if (node->data.fn_proto.return_var_token == nullptr) {
88929943 if (node->data.fn_proto.return_type == nullptr) {
88939944 return_type = ir_build_const_type(irb, parent_scope, node, irb->codegen->builtin_types.entry_void);
88949945 } else {
88959946 return_type = ir_gen_node(irb, node->data.fn_proto.return_type, parent_scope);
8896 if (return_type == irb->codegen->invalid_instruction)
8897 return irb->codegen->invalid_instruction;
9947 if (return_type == irb->codegen->invalid_inst_src)
9948 return irb->codegen->invalid_inst_src;
88989949 }
88999950 } else {
89009951 add_node_error(irb->codegen, node,
89019952 buf_sprintf("TODO implement inferred return types https://github.com/ziglang/zig/issues/447"));
8902 return irb->codegen->invalid_instruction;
9953 return irb->codegen->invalid_inst_src;
89039954 //return_type = nullptr;
89049955 }
89059956
89069957 return ir_build_fn_proto(irb, parent_scope, node, param_types, align_value, callconv_value, return_type, is_var_args);
89079958}
89089959
8909static IrInstruction *ir_gen_resume(IrBuilder *irb, Scope *scope, AstNode *node) {
9960static IrInstSrc *ir_gen_resume(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
89109961 assert(node->type == NodeTypeResume);
89119962
8912 IrInstruction *target_inst = ir_gen_node_extra(irb, node->data.resume_expr.expr, scope, LValPtr, nullptr);
8913 if (target_inst == irb->codegen->invalid_instruction)
8914 return irb->codegen->invalid_instruction;
9963 IrInstSrc *target_inst = ir_gen_node_extra(irb, node->data.resume_expr.expr, scope, LValPtr, nullptr);
9964 if (target_inst == irb->codegen->invalid_inst_src)
9965 return irb->codegen->invalid_inst_src;
89159966
8916 return ir_build_resume(irb, scope, node, target_inst);
9967 return ir_build_resume_src(irb, scope, node, target_inst);
89179968}
89189969
8919static IrInstruction *ir_gen_await_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
9970static IrInstSrc *ir_gen_await_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
89209971 ResultLoc *result_loc)
89219972{
89229973 assert(node->type == NodeTypeAwaitExpr);
......@@ -8937,7 +9988,7 @@ static IrInstruction *ir_gen_await_expr(IrBuilder *irb, Scope *scope, AstNode *n
89379988 ZigFn *fn_entry = exec_fn_entry(irb->exec);
89389989 if (!fn_entry) {
89399990 add_node_error(irb->codegen, node, buf_sprintf("await outside function definition"));
8940 return irb->codegen->invalid_instruction;
9991 return irb->codegen->invalid_inst_src;
89419992 }
89429993 ScopeSuspend *existing_suspend_scope = get_scope_suspend(scope);
89439994 if (existing_suspend_scope) {
......@@ -8946,24 +9997,24 @@ static IrInstruction *ir_gen_await_expr(IrBuilder *irb, Scope *scope, AstNode *n
89469997 add_error_note(irb->codegen, msg, existing_suspend_scope->base.source_node, buf_sprintf("suspend block here"));
89479998 existing_suspend_scope->reported_err = true;
89489999 }
8949 return irb->codegen->invalid_instruction;
10000 return irb->codegen->invalid_inst_src;
895010001 }
895110002
8952 IrInstruction *target_inst = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
8953 if (target_inst == irb->codegen->invalid_instruction)
8954 return irb->codegen->invalid_instruction;
10003 IrInstSrc *target_inst = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
10004 if (target_inst == irb->codegen->invalid_inst_src)
10005 return irb->codegen->invalid_inst_src;
895510006
8956 IrInstruction *await_inst = ir_build_await_src(irb, scope, node, target_inst, result_loc);
10007 IrInstSrc *await_inst = ir_build_await_src(irb, scope, node, target_inst, result_loc);
895710008 return ir_lval_wrap(irb, scope, await_inst, lval, result_loc);
895810009}
895910010
8960static IrInstruction *ir_gen_suspend(IrBuilder *irb, Scope *parent_scope, AstNode *node) {
10011static IrInstSrc *ir_gen_suspend(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
896110012 assert(node->type == NodeTypeSuspend);
896210013
896310014 ZigFn *fn_entry = exec_fn_entry(irb->exec);
896410015 if (!fn_entry) {
896510016 add_node_error(irb->codegen, node, buf_sprintf("suspend outside function definition"));
8966 return irb->codegen->invalid_instruction;
10017 return irb->codegen->invalid_inst_src;
896710018 }
896810019 ScopeSuspend *existing_suspend_scope = get_scope_suspend(parent_scope);
896910020 if (existing_suspend_scope) {
......@@ -8972,21 +10023,21 @@ static IrInstruction *ir_gen_suspend(IrBuilder *irb, Scope *parent_scope, AstNod
897210023 add_error_note(irb->codegen, msg, existing_suspend_scope->base.source_node, buf_sprintf("other suspend block here"));
897310024 existing_suspend_scope->reported_err = true;
897410025 }
8975 return irb->codegen->invalid_instruction;
10026 return irb->codegen->invalid_inst_src;
897610027 }
897710028
8978 IrInstructionSuspendBegin *begin = ir_build_suspend_begin(irb, parent_scope, node);
10029 IrInstSrcSuspendBegin *begin = ir_build_suspend_begin_src(irb, parent_scope, node);
897910030 if (node->data.suspend.block != nullptr) {
898010031 ScopeSuspend *suspend_scope = create_suspend_scope(irb->codegen, node, parent_scope);
898110032 Scope *child_scope = &suspend_scope->base;
8982 IrInstruction *susp_res = ir_gen_node(irb, node->data.suspend.block, child_scope);
10033 IrInstSrc *susp_res = ir_gen_node(irb, node->data.suspend.block, child_scope);
898310034 ir_mark_gen(ir_build_check_statement_is_void(irb, child_scope, node->data.suspend.block, susp_res));
898410035 }
898510036
8986 return ir_mark_gen(ir_build_suspend_finish(irb, parent_scope, node, begin));
10037 return ir_mark_gen(ir_build_suspend_finish_src(irb, parent_scope, node, begin));
898710038}
898810039
8989static IrInstruction *ir_gen_node_raw(IrBuilder *irb, AstNode *node, Scope *scope,
10040static IrInstSrc *ir_gen_node_raw(IrBuilderSrc *irb, AstNode *node, Scope *scope,
899010041 LVal lval, ResultLoc *result_loc)
899110042{
899210043 assert(scope);
......@@ -9035,39 +10086,39 @@ static IrInstruction *ir_gen_node_raw(IrBuilder *irb, AstNode *node, Scope *scop
903510086 return ir_gen_return(irb, scope, node, lval, result_loc);
903610087 case NodeTypeFieldAccessExpr:
903710088 {
9038 IrInstruction *ptr_instruction = ir_gen_field_access(irb, scope, node);
9039 if (ptr_instruction == irb->codegen->invalid_instruction)
10089 IrInstSrc *ptr_instruction = ir_gen_field_access(irb, scope, node);
10090 if (ptr_instruction == irb->codegen->invalid_inst_src)
904010091 return ptr_instruction;
904110092 if (lval == LValPtr)
904210093 return ptr_instruction;
904310094
9044 IrInstruction *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);
10095 IrInstSrc *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);
904510096 return ir_expr_wrap(irb, scope, load_ptr, result_loc);
904610097 }
904710098 case NodeTypePtrDeref: {
904810099 AstNode *expr_node = node->data.ptr_deref_expr.target;
9049 IrInstruction *value = ir_gen_node_extra(irb, expr_node, scope, lval, nullptr);
9050 if (value == irb->codegen->invalid_instruction)
10100 IrInstSrc *value = ir_gen_node_extra(irb, expr_node, scope, lval, nullptr);
10101 if (value == irb->codegen->invalid_inst_src)
905110102 return value;
905210103
905310104 // We essentially just converted any lvalue from &(x.*) to (&x).*;
905410105 // this inhibits checking that x is a pointer later, so we directly
905510106 // record whether the pointer check is needed
9056 IrInstruction *un_op = ir_build_un_op_lval(irb, scope, node, IrUnOpDereference, value, lval, result_loc);
10107 IrInstSrc *un_op = ir_build_un_op_lval(irb, scope, node, IrUnOpDereference, value, lval, result_loc);
905710108 return ir_expr_wrap(irb, scope, un_op, result_loc);
905810109 }
905910110 case NodeTypeUnwrapOptional: {
906010111 AstNode *expr_node = node->data.unwrap_optional.expr;
906110112
9062 IrInstruction *maybe_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
9063 if (maybe_ptr == irb->codegen->invalid_instruction)
9064 return irb->codegen->invalid_instruction;
10113 IrInstSrc *maybe_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
10114 if (maybe_ptr == irb->codegen->invalid_inst_src)
10115 return irb->codegen->invalid_inst_src;
906510116
9066 IrInstruction *unwrapped_ptr = ir_build_optional_unwrap_ptr(irb, scope, node, maybe_ptr, true, false);
10117 IrInstSrc *unwrapped_ptr = ir_build_optional_unwrap_ptr(irb, scope, node, maybe_ptr, true, false);
906710118 if (lval == LValPtr)
906810119 return unwrapped_ptr;
906910120
9070 IrInstruction *load_ptr = ir_build_load_ptr(irb, scope, node, unwrapped_ptr);
10121 IrInstSrc *load_ptr = ir_build_load_ptr(irb, scope, node, unwrapped_ptr);
907110122 return ir_expr_wrap(irb, scope, load_ptr, result_loc);
907210123 }
907310124 case NodeTypeBoolLiteral:
......@@ -9125,7 +10176,7 @@ static IrInstruction *ir_gen_node_raw(IrBuilder *irb, AstNode *node, Scope *scop
912510176 case NodeTypeInferredArrayType:
912610177 add_node_error(irb->codegen, node,
912710178 buf_sprintf("inferred array size invalid here"));
9128 return irb->codegen->invalid_instruction;
10179 return irb->codegen->invalid_inst_src;
912910180 case NodeTypeVarFieldType:
913010181 return ir_lval_wrap(irb, scope,
913110182 ir_build_const_type(irb, scope, node, irb->codegen->builtin_types.entry_var), lval, result_loc);
......@@ -9139,7 +10190,7 @@ static ResultLoc *no_result_loc(void) {
913910190 return &result_loc_none->base;
914010191}
914110192
9142static IrInstruction *ir_gen_node_extra(IrBuilder *irb, AstNode *node, Scope *scope, LVal lval,
10193static IrInstSrc *ir_gen_node_extra(IrBuilderSrc *irb, AstNode *node, Scope *scope, LVal lval,
914310194 ResultLoc *result_loc)
914410195{
914510196 if (result_loc == nullptr) {
......@@ -9156,8 +10207,8 @@ static IrInstruction *ir_gen_node_extra(IrBuilder *irb, AstNode *node, Scope *sc
915610207 } else {
915710208 child_scope = &create_expr_scope(irb->codegen, node, scope)->base;
915810209 }
9159 IrInstruction *result = ir_gen_node_raw(irb, node, child_scope, lval, result_loc);
9160 if (result == irb->codegen->invalid_instruction) {
10210 IrInstSrc *result = ir_gen_node_raw(irb, node, child_scope, lval, result_loc);
10211 if (result == irb->codegen->invalid_inst_src) {
916110212 if (irb->exec->first_err_trace_msg == nullptr) {
916210213 irb->exec->first_err_trace_msg = irb->codegen->trace_err;
916310214 }
......@@ -9165,11 +10216,22 @@ static IrInstruction *ir_gen_node_extra(IrBuilder *irb, AstNode *node, Scope *sc
916510216 return result;
916610217}
916710218
9168static IrInstruction *ir_gen_node(IrBuilder *irb, AstNode *node, Scope *scope) {
10219static IrInstSrc *ir_gen_node(IrBuilderSrc *irb, AstNode *node, Scope *scope) {
916910220 return ir_gen_node_extra(irb, node, scope, LValNone, nullptr);
917010221}
917110222
9172static void invalidate_exec(IrExecutable *exec, ErrorMsg *msg) {
10223static void invalidate_exec(IrExecutableSrc *exec, ErrorMsg *msg) {
10224 if (exec->first_err_trace_msg != nullptr)
10225 return;
10226
10227 exec->first_err_trace_msg = msg;
10228
10229 for (size_t i = 0; i < exec->tld_list.length; i += 1) {
10230 exec->tld_list.items[i]->resolution = TldResolutionInvalid;
10231 }
10232}
10233
10234static void invalidate_exec_gen(IrExecutableGen *exec, ErrorMsg *msg) {
917310235 if (exec->first_err_trace_msg != nullptr)
917410236 return;
917510237
......@@ -9183,24 +10245,25 @@ static void invalidate_exec(IrExecutable *exec, ErrorMsg *msg) {
918310245 invalidate_exec(exec->source_exec, msg);
918410246}
918510247
9186bool ir_gen(CodeGen *codegen, AstNode *node, Scope *scope, IrExecutable *ir_executable) {
10248
10249bool ir_gen(CodeGen *codegen, AstNode *node, Scope *scope, IrExecutableSrc *ir_executable) {
918710250 assert(node->owner);
918810251
9189 IrBuilder ir_builder = {0};
9190 IrBuilder *irb = &ir_builder;
10252 IrBuilderSrc ir_builder = {0};
10253 IrBuilderSrc *irb = &ir_builder;
919110254
919210255 irb->codegen = codegen;
919310256 irb->exec = ir_executable;
919410257 irb->main_block_node = node;
919510258
9196 IrBasicBlock *entry_block = ir_create_basic_block(irb, scope, "Entry");
10259 IrBasicBlockSrc *entry_block = ir_create_basic_block(irb, scope, "Entry");
919710260 ir_set_cursor_at_end_and_append_block(irb, entry_block);
919810261 // Entry block gets a reference because we enter it to begin.
919910262 ir_ref_bb(irb->current_basic_block);
920010263
9201 IrInstruction *result = ir_gen_node_extra(irb, node, scope, LValNone, nullptr);
10264 IrInstSrc *result = ir_gen_node_extra(irb, node, scope, LValNone, nullptr);
920210265
9203 if (result == irb->codegen->invalid_instruction)
10266 if (result == irb->codegen->invalid_inst_src)
920410267 return false;
920510268
920610269 if (irb->exec->first_err_trace_msg != nullptr) {
......@@ -9209,9 +10272,13 @@ bool ir_gen(CodeGen *codegen, AstNode *node, Scope *scope, IrExecutable *ir_exec
920910272 }
921010273
921110274 if (!instr_is_unreachable(result)) {
9212 ir_mark_gen(ir_build_add_implicit_return_type(irb, scope, result->source_node, result, nullptr));
10275 ir_mark_gen(ir_build_add_implicit_return_type(irb, scope, result->base.source_node, result, nullptr));
921310276 // no need for save_err_ret_addr because this cannot return error
9214 ir_mark_gen(ir_build_return(irb, scope, result->source_node, result));
10277 ResultLocReturn *result_loc_ret = allocate<ResultLocReturn>(1, "ResultLocReturn");
10278 result_loc_ret->base.id = ResultLocIdReturn;
10279 ir_build_reset_result(irb, scope, node, &result_loc_ret->base);
10280 ir_mark_gen(ir_build_end_expr(irb, scope, node, result, &result_loc_ret->base));
10281 ir_mark_gen(ir_build_return_src(irb, scope, result->base.source_node, result));
921510282 }
921610283
921710284 return true;
......@@ -9220,7 +10287,7 @@ bool ir_gen(CodeGen *codegen, AstNode *node, Scope *scope, IrExecutable *ir_exec
922010287bool ir_gen_fn(CodeGen *codegen, ZigFn *fn_entry) {
922110288 assert(fn_entry);
922210289
9223 IrExecutable *ir_executable = fn_entry->ir_executable;
10290 IrExecutableSrc *ir_executable = fn_entry->ir_executable;
922410291 AstNode *body_node = fn_entry->body_node;
922510292
922610293 assert(fn_entry->child_scope);
......@@ -9228,14 +10295,21 @@ bool ir_gen_fn(CodeGen *codegen, ZigFn *fn_entry) {
922810295 return ir_gen(codegen, body_node, fn_entry->child_scope, ir_executable);
922910296}
923010297
9231static void ir_add_call_stack_errors(CodeGen *codegen, IrExecutable *exec, ErrorMsg *err_msg, int limit) {
10298static void ir_add_call_stack_errors_gen(CodeGen *codegen, IrExecutableGen *exec, ErrorMsg *err_msg, int limit) {
10299 if (!exec || !exec->source_node || limit < 0) return;
10300 add_error_note(codegen, err_msg, exec->source_node, buf_sprintf("called from here"));
10301
10302 ir_add_call_stack_errors_gen(codegen, exec->parent_exec, err_msg, limit - 1);
10303}
10304
10305static void ir_add_call_stack_errors(CodeGen *codegen, IrExecutableSrc *exec, ErrorMsg *err_msg, int limit) {
923210306 if (!exec || !exec->source_node || limit < 0) return;
923310307 add_error_note(codegen, err_msg, exec->source_node, buf_sprintf("called from here"));
923410308
9235 ir_add_call_stack_errors(codegen, exec->parent_exec, err_msg, limit - 1);
10309 ir_add_call_stack_errors_gen(codegen, exec->parent_exec, err_msg, limit - 1);
923610310}
923710311
9238static ErrorMsg *exec_add_error_node(CodeGen *codegen, IrExecutable *exec, AstNode *source_node, Buf *msg) {
10312static ErrorMsg *exec_add_error_node(CodeGen *codegen, IrExecutableSrc *exec, AstNode *source_node, Buf *msg) {
923910313 ErrorMsg *err_msg = add_node_error(codegen, source_node, msg);
924010314 invalidate_exec(exec, err_msg);
924110315 if (exec->parent_exec) {
......@@ -9244,26 +10318,40 @@ static ErrorMsg *exec_add_error_node(CodeGen *codegen, IrExecutable *exec, AstNo
924410318 return err_msg;
924510319}
924610320
10321static ErrorMsg *exec_add_error_node_gen(CodeGen *codegen, IrExecutableGen *exec, AstNode *source_node, Buf *msg) {
10322 ErrorMsg *err_msg = add_node_error(codegen, source_node, msg);
10323 invalidate_exec_gen(exec, err_msg);
10324 if (exec->parent_exec) {
10325 ir_add_call_stack_errors_gen(codegen, exec, err_msg, 10);
10326 }
10327 return err_msg;
10328}
10329
924710330static ErrorMsg *ir_add_error_node(IrAnalyze *ira, AstNode *source_node, Buf *msg) {
9248 return exec_add_error_node(ira->codegen, ira->new_irb.exec, source_node, msg);
10331 return exec_add_error_node_gen(ira->codegen, ira->new_irb.exec, source_node, msg);
924910332}
925010333
925110334static ErrorMsg *opt_ir_add_error_node(IrAnalyze *ira, CodeGen *codegen, AstNode *source_node, Buf *msg) {
925210335 if (ira != nullptr)
9253 return exec_add_error_node(codegen, ira->new_irb.exec, source_node, msg);
10336 return exec_add_error_node_gen(codegen, ira->new_irb.exec, source_node, msg);
925410337 else
925510338 return add_node_error(codegen, source_node, msg);
925610339}
925710340
9258static ErrorMsg *ir_add_error(IrAnalyze *ira, IrInstruction *source_instruction, Buf *msg) {
10341static ErrorMsg *ir_add_error(IrAnalyze *ira, IrInst *source_instruction, Buf *msg) {
925910342 return ir_add_error_node(ira, source_instruction->source_node, msg);
926010343}
926110344
9262static void ir_assert(bool ok, IrInstruction *source_instruction) {
10345static void ir_assert(bool ok, IrInst *source_instruction) {
926310346 if (ok) return;
926410347 src_assert(ok, source_instruction->source_node);
926510348}
926610349
10350static void ir_assert_gen(bool ok, IrInstGen *source_instruction) {
10351 if (ok) return;
10352 src_assert(ok, source_instruction->base.source_node);
10353}
10354
926710355// This function takes a comptime ptr and makes the child const value conform to the type
926810356// described by the pointer.
926910357static Error eval_comptime_ptr_reinterpret(IrAnalyze *ira, CodeGen *codegen, AstNode *source_node,
......@@ -9309,43 +10397,37 @@ ZigValue *const_ptr_pointee(IrAnalyze *ira, CodeGen *codegen, ZigValue *const_va
930910397 return val;
931010398}
931110399
9312static ZigValue *ir_exec_const_result(CodeGen *codegen, IrExecutable *exec) {
9313 IrBasicBlock *bb = exec->basic_block_list.at(0);
10400static Error ir_exec_scan_for_side_effects(CodeGen *codegen, IrExecutableGen *exec) {
10401 IrBasicBlockGen *bb = exec->basic_block_list.at(0);
931410402 for (size_t i = 0; i < bb->instruction_list.length; i += 1) {
9315 IrInstruction *instruction = bb->instruction_list.at(i);
9316 if (instruction->id == IrInstructionIdReturn) {
9317 IrInstructionReturn *ret_inst = (IrInstructionReturn *)instruction;
9318 IrInstruction *operand = ret_inst->operand;
9319 if (operand->value->special == ConstValSpecialRuntime) {
9320 exec_add_error_node(codegen, exec, operand->source_node,
9321 buf_sprintf("unable to evaluate constant expression"));
9322 return codegen->invalid_instruction->value;
9323 }
9324 return operand->value;
9325 } else if (ir_has_side_effects(instruction)) {
10403 IrInstGen *instruction = bb->instruction_list.at(i);
10404 if (instruction->id == IrInstGenIdReturn) {
10405 return ErrorNone;
10406 } else if (ir_inst_gen_has_side_effects(instruction)) {
932610407 if (instr_is_comptime(instruction)) {
932710408 switch (instruction->id) {
9328 case IrInstructionIdUnwrapErrPayload:
9329 case IrInstructionIdUnionFieldPtr:
10409 case IrInstGenIdUnwrapErrPayload:
10410 case IrInstGenIdOptionalUnwrapPtr:
10411 case IrInstGenIdUnionFieldPtr:
933010412 continue;
933110413 default:
933210414 break;
933310415 }
933410416 }
9335 if (get_scope_typeof(instruction->scope) != nullptr) {
10417 if (get_scope_typeof(instruction->base.scope) != nullptr) {
933610418 // doesn't count, it's inside a @TypeOf()
933710419 continue;
933810420 }
9339 exec_add_error_node(codegen, exec, instruction->source_node,
10421 exec_add_error_node_gen(codegen, exec, instruction->base.source_node,
934010422 buf_sprintf("unable to evaluate constant expression"));
9341 return codegen->invalid_instruction->value;
10423 return ErrorSemanticAnalyzeFail;
934210424 }
934310425 }
934410426 zig_unreachable();
934510427}
934610428
9347static bool ir_emit_global_runtime_side_effect(IrAnalyze *ira, IrInstruction *source_instruction) {
9348 if (ir_should_inline(ira->new_irb.exec, source_instruction->scope)) {
10429static bool ir_emit_global_runtime_side_effect(IrAnalyze *ira, IrInst* source_instruction) {
10430 if (ir_should_inline(ira->old_irb.exec, source_instruction->scope)) {
934910431 ir_add_error(ira, source_instruction, buf_sprintf("unable to evaluate constant expression"));
935010432 return false;
935110433 }
......@@ -10079,7 +11161,39 @@ void float_read_ieee597(ZigValue *val, uint8_t *buf, bool is_big_endian) {
1007911161 }
1008011162}
1008111163
10082static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruction, ZigType *other_type,
11164static void value_to_bigfloat(BigFloat *out, ZigValue *val) {
11165 switch (val->type->id) {
11166 case ZigTypeIdInt:
11167 case ZigTypeIdComptimeInt:
11168 bigfloat_init_bigint(out, &val->data.x_bigint);
11169 return;
11170 case ZigTypeIdComptimeFloat:
11171 *out = val->data.x_bigfloat;
11172 return;
11173 case ZigTypeIdFloat: switch (val->type->data.floating.bit_count) {
11174 case 16:
11175 bigfloat_init_16(out, val->data.x_f16);
11176 return;
11177 case 32:
11178 bigfloat_init_32(out, val->data.x_f32);
11179 return;
11180 case 64:
11181 bigfloat_init_64(out, val->data.x_f64);
11182 return;
11183 case 80:
11184 zig_panic("TODO");
11185 case 128:
11186 bigfloat_init_128(out, val->data.x_f128);
11187 return;
11188 default:
11189 zig_unreachable();
11190 }
11191 default:
11192 zig_unreachable();
11193 }
11194}
11195
11196static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstGen *instruction, ZigType *other_type,
1008311197 bool explicit_cast)
1008411198{
1008511199 if (type_is_invalid(other_type)) {
......@@ -10173,7 +11287,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
1017311287 }
1017411288 Buf *val_buf = buf_alloc();
1017511289 bigint_append_buf(val_buf, &const_val->data.x_bigint, 10);
10176 ir_add_error(ira, instruction,
11290 ir_add_error_node(ira, instruction->base.source_node,
1017711291 buf_sprintf("integer value %s has no representation in type '%s'",
1017811292 buf_ptr(val_buf),
1017911293 buf_ptr(&other_type->name)));
......@@ -10268,7 +11382,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
1026811382 }
1026911383 Buf *val_buf = buf_alloc();
1027011384 float_append_buf(val_buf, const_val);
10271 ir_add_error(ira, instruction,
11385 ir_add_error_node(ira, instruction->base.source_node,
1027211386 buf_sprintf("cast of value %s to type '%s' loses information",
1027311387 buf_ptr(val_buf),
1027411388 buf_ptr(&other_type->name)));
......@@ -10277,7 +11391,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
1027711391 if (!other_type->data.integral.is_signed && const_val->data.x_bigint.is_negative) {
1027811392 Buf *val_buf = buf_alloc();
1027911393 bigint_append_buf(val_buf, &const_val->data.x_bigint, 10);
10280 ir_add_error(ira, instruction,
11394 ir_add_error_node(ira, instruction->base.source_node,
1028111395 buf_sprintf("cannot cast negative value %s to unsigned integer type '%s'",
1028211396 buf_ptr(val_buf),
1028311397 buf_ptr(&other_type->name)));
......@@ -10298,7 +11412,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
1029811412 if (!child_type->data.integral.is_signed && const_val->data.x_bigint.is_negative) {
1029911413 Buf *val_buf = buf_alloc();
1030011414 bigint_append_buf(val_buf, &const_val->data.x_bigint, 10);
10301 ir_add_error(ira, instruction,
11415 ir_add_error_node(ira, instruction->base.source_node,
1030211416 buf_sprintf("cannot cast negative value %s to unsigned integer type '%s'",
1030311417 buf_ptr(val_buf),
1030411418 buf_ptr(&child_type->name)));
......@@ -10321,7 +11435,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
1032111435 Buf *val_buf = buf_alloc();
1032211436 float_append_buf(val_buf, const_val);
1032311437
10324 ir_add_error(ira, instruction,
11438 ir_add_error_node(ira, instruction->base.source_node,
1032511439 buf_sprintf("fractional component prevents float value %s from being casted to type '%s'",
1032611440 buf_ptr(val_buf),
1032711441 buf_ptr(&other_type->name)));
......@@ -10351,7 +11465,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
1035111465 bigint_append_buf(val_buf, &const_val->data.x_bigint, 10);
1035211466 }
1035311467
10354 ir_add_error(ira, instruction,
11468 ir_add_error_node(ira, instruction->base.source_node,
1035511469 buf_sprintf("%s value %s cannot be coerced to type '%s'",
1035611470 num_lit_str,
1035711471 buf_ptr(val_buf),
......@@ -10805,11 +11919,11 @@ static void update_errors_helper(CodeGen *g, ErrorTableEntry ***errors, size_t *
1080511919}
1080611920
1080711921static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigType *expected_type,
10808 IrInstruction **instructions, size_t instruction_count)
11922 IrInstGen **instructions, size_t instruction_count)
1080911923{
1081011924 Error err;
1081111925 assert(instruction_count >= 1);
10812 IrInstruction *prev_inst;
11926 IrInstGen *prev_inst;
1081311927 size_t i = 0;
1081411928 for (;;) {
1081511929 prev_inst = instructions[i];
......@@ -10829,7 +11943,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
1082911943 size_t errors_count = 0;
1083011944 ZigType *err_set_type = nullptr;
1083111945 if (prev_inst->value->type->id == ZigTypeIdErrorSet) {
10832 if (!resolve_inferred_error_set(ira->codegen, prev_inst->value->type, prev_inst->source_node)) {
11946 if (!resolve_inferred_error_set(ira->codegen, prev_inst->value->type, prev_inst->base.source_node)) {
1083311947 return ira->codegen->builtin_types.entry_invalid;
1083411948 }
1083511949 if (type_is_global_error_set(prev_inst->value->type)) {
......@@ -10849,7 +11963,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
1084911963 bool any_are_null = (prev_inst->value->type->id == ZigTypeIdNull);
1085011964 bool convert_to_const_slice = false;
1085111965 for (; i < instruction_count; i += 1) {
10852 IrInstruction *cur_inst = instructions[i];
11966 IrInstGen *cur_inst = instructions[i];
1085311967 ZigType *cur_type = cur_inst->value->type;
1085411968 ZigType *prev_type = prev_inst->value->type;
1085511969
......@@ -10871,14 +11985,14 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
1087111985 }
1087211986
1087311987 if (prev_type->id == ZigTypeIdErrorSet) {
10874 ir_assert(err_set_type != nullptr, prev_inst);
11988 ir_assert_gen(err_set_type != nullptr, prev_inst);
1087511989 if (cur_type->id == ZigTypeIdErrorSet) {
1087611990 if (type_is_global_error_set(err_set_type)) {
1087711991 continue;
1087811992 }
1087911993 bool allow_infer = cur_type->data.error_set.infer_fn != nullptr &&
1088011994 cur_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;
10881 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_type, cur_inst->source_node)) {
11995 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_type, cur_inst->base.source_node)) {
1088211996 return ira->codegen->builtin_types.entry_invalid;
1088311997 }
1088411998 if (!allow_infer && type_is_global_error_set(cur_type)) {
......@@ -10946,7 +12060,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
1094612060 ZigType *cur_err_set_type = cur_type->data.error_union.err_set_type;
1094712061 bool allow_infer = cur_err_set_type->data.error_set.infer_fn != nullptr &&
1094812062 cur_err_set_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;
10949 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->source_node)) {
12063 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->base.source_node)) {
1095012064 return ira->codegen->builtin_types.entry_invalid;
1095112065 }
1095212066 if (!allow_infer && type_is_global_error_set(cur_err_set_type)) {
......@@ -11001,7 +12115,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
1100112115 if (cur_type->id == ZigTypeIdErrorSet) {
1100212116 bool allow_infer = cur_type->data.error_set.infer_fn != nullptr &&
1100312117 cur_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;
11004 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_type, cur_inst->source_node)) {
12118 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_type, cur_inst->base.source_node)) {
1100512119 return ira->codegen->builtin_types.entry_invalid;
1100612120 }
1100712121 if (!allow_infer && type_is_global_error_set(cur_type)) {
......@@ -11024,7 +12138,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
1102412138 err_set_type = cur_type;
1102512139 }
1102612140
11027 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, err_set_type, cur_inst->source_node)) {
12141 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, err_set_type, cur_inst->base.source_node)) {
1102812142 return ira->codegen->builtin_types.entry_invalid;
1102912143 }
1103012144
......@@ -11087,11 +12201,11 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
1108712201 bool allow_infer_cur = cur_err_set_type->data.error_set.infer_fn != nullptr &&
1108812202 cur_err_set_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;
1108912203
11090 if (!allow_infer_prev && !resolve_inferred_error_set(ira->codegen, prev_err_set_type, cur_inst->source_node)) {
12204 if (!allow_infer_prev && !resolve_inferred_error_set(ira->codegen, prev_err_set_type, cur_inst->base.source_node)) {
1109112205 return ira->codegen->builtin_types.entry_invalid;
1109212206 }
1109312207
11094 if (!allow_infer_cur && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->source_node)) {
12208 if (!allow_infer_cur && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->base.source_node)) {
1109512209 return ira->codegen->builtin_types.entry_invalid;
1109612210 }
1109712211
......@@ -11268,7 +12382,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
1126812382 ZigType *cur_err_set_type = cur_type->data.error_union.err_set_type;
1126912383 bool allow_infer = cur_err_set_type->data.error_set.infer_fn != nullptr &&
1127012384 cur_err_set_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;
11271 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->source_node)) {
12385 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->base.source_node)) {
1127212386 return ira->codegen->builtin_types.entry_invalid;
1127312387 }
1127412388 if ((!allow_infer && type_is_global_error_set(cur_err_set_type)) ||
......@@ -11463,9 +12577,9 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
1146312577 ErrorMsg *msg = ir_add_error_node(ira, source_node,
1146412578 buf_sprintf("incompatible types: '%s' and '%s'",
1146512579 buf_ptr(&prev_type->name), buf_ptr(&cur_type->name)));
11466 add_error_note(ira->codegen, msg, prev_inst->source_node,
12580 add_error_note(ira->codegen, msg, prev_inst->base.source_node,
1146712581 buf_sprintf("type '%s' here", buf_ptr(&prev_type->name)));
11468 add_error_note(ira->codegen, msg, cur_inst->source_node,
12582 add_error_note(ira->codegen, msg, cur_inst->base.source_node,
1146912583 buf_sprintf("type '%s' here", buf_ptr(&cur_type->name)));
1147012584
1147112585 return ira->codegen->builtin_types.entry_invalid;
......@@ -11535,7 +12649,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
1153512649 }
1153612650}
1153712651
11538static bool eval_const_expr_implicit_cast(IrAnalyze *ira, IrInstruction *source_instr,
12652static bool eval_const_expr_implicit_cast(IrAnalyze *ira, IrInst *source_instr,
1153912653 CastOp cast_op,
1154012654 ZigValue *other_val, ZigType *other_type,
1154112655 ZigValue *const_val, ZigType *new_type)
......@@ -11635,58 +12749,56 @@ static bool eval_const_expr_implicit_cast(IrAnalyze *ira, IrInstruction *source_
1163512749 return true;
1163612750}
1163712751
11638static IrInstruction *ir_const(IrAnalyze *ira, IrInstruction *old_instruction, ZigType *ty) {
11639 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
11640 old_instruction->scope, old_instruction->source_node);
11641 IrInstruction *new_instruction = &const_instruction->base;
12752static IrInstGen *ir_const(IrAnalyze *ira, IrInst *inst, ZigType *ty) {
12753 IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
12754 inst->scope, inst->source_node);
12755 IrInstGen *new_instruction = &const_instruction->base;
1164212756 new_instruction->value->type = ty;
1164312757 new_instruction->value->special = ConstValSpecialStatic;
1164412758 return new_instruction;
1164512759}
1164612760
11647static IrInstruction *ir_const_noval(IrAnalyze *ira, IrInstruction *old_instruction) {
11648 IrInstructionConst *const_instruction = ir_create_instruction_noval<IrInstructionConst>(&ira->new_irb,
12761static IrInstGen *ir_const_noval(IrAnalyze *ira, IrInst *old_instruction) {
12762 IrInstGenConst *const_instruction = ir_create_inst_noval<IrInstGenConst>(&ira->new_irb,
1164912763 old_instruction->scope, old_instruction->source_node);
1165012764 return &const_instruction->base;
1165112765}
1165212766
11653// This function initializes the new IrInstruction with the provided ZigValue,
12767// This function initializes the new IrInstGen with the provided ZigValue,
1165412768// rather than creating a new one.
11655static IrInstruction *ir_const_move(IrAnalyze *ira, IrInstruction *old_instruction, ZigValue *val) {
11656 IrInstruction *result = ir_const_noval(ira, old_instruction);
12769static IrInstGen *ir_const_move(IrAnalyze *ira, IrInst *old_instruction, ZigValue *val) {
12770 IrInstGen *result = ir_const_noval(ira, old_instruction);
1165712771 result->value = val;
1165812772 return result;
1165912773}
1166012774
11661static IrInstruction *ir_resolve_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,
12775static IrInstGen *ir_resolve_cast(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value,
1166212776 ZigType *wanted_type, CastOp cast_op)
1166312777{
1166412778 if (instr_is_comptime(value) || !type_has_bits(wanted_type)) {
11665 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
12779 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1166612780 if (!eval_const_expr_implicit_cast(ira, source_instr, cast_op, value->value, value->value->type,
1166712781 result->value, wanted_type))
1166812782 {
11669 return ira->codegen->invalid_instruction;
12783 return ira->codegen->invalid_inst_gen;
1167012784 }
1167112785 return result;
1167212786 } else {
11673 IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope, source_instr->source_node, wanted_type, value, cast_op);
11674 result->value->type = wanted_type;
11675 return result;
12787 return ir_build_cast(ira, source_instr, wanted_type, value, cast_op);
1167612788 }
1167712789}
1167812790
11679static IrInstruction *ir_resolve_ptr_of_array_to_unknown_len_ptr(IrAnalyze *ira, IrInstruction *source_instr,
11680 IrInstruction *value, ZigType *wanted_type)
12791static IrInstGen *ir_resolve_ptr_of_array_to_unknown_len_ptr(IrAnalyze *ira, IrInst* source_instr,
12792 IrInstGen *value, ZigType *wanted_type)
1168112793{
11682 assert(value->value->type->id == ZigTypeIdPointer);
12794 ir_assert(value->value->type->id == ZigTypeIdPointer, source_instr);
1168312795
1168412796 Error err;
1168512797
1168612798 if ((err = type_resolve(ira->codegen, value->value->type->data.pointer.child_type,
1168712799 ResolveStatusAlignmentKnown)))
1168812800 {
11689 return ira->codegen->invalid_instruction;
12801 return ira->codegen->invalid_inst_gen;
1169012802 }
1169112803
1169212804 wanted_type = adjust_ptr_align(ira->codegen, wanted_type, get_ptr_align(ira->codegen, value->value->type));
......@@ -11694,9 +12806,9 @@ static IrInstruction *ir_resolve_ptr_of_array_to_unknown_len_ptr(IrAnalyze *ira,
1169412806 if (instr_is_comptime(value)) {
1169512807 ZigValue *pointee = const_ptr_pointee(ira, ira->codegen, value->value, source_instr->source_node);
1169612808 if (pointee == nullptr)
11697 return ira->codegen->invalid_instruction;
12809 return ira->codegen->invalid_inst_gen;
1169812810 if (pointee->special != ConstValSpecialRuntime) {
11699 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
12811 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1170012812 result->value->data.x_ptr.special = ConstPtrSpecialBaseArray;
1170112813 result->value->data.x_ptr.mut = value->value->data.x_ptr.mut;
1170212814 result->value->data.x_ptr.data.base_array.array_val = pointee;
......@@ -11705,70 +12817,71 @@ static IrInstruction *ir_resolve_ptr_of_array_to_unknown_len_ptr(IrAnalyze *ira,
1170512817 }
1170612818 }
1170712819
11708 IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope, source_instr->source_node,
11709 wanted_type, value, CastOpBitCast);
11710 result->value->type = wanted_type;
11711 return result;
12820 return ir_build_cast(ira, source_instr, wanted_type, value, CastOpBitCast);
1171212821}
1171312822
11714static IrInstruction *ir_resolve_ptr_of_array_to_slice(IrAnalyze *ira, IrInstruction *source_instr,
11715 IrInstruction *array_ptr, ZigType *wanted_type, ResultLoc *result_loc)
12823static IrInstGen *ir_resolve_ptr_of_array_to_slice(IrAnalyze *ira, IrInst* source_instr,
12824 IrInstGen *array_ptr, ZigType *wanted_type, ResultLoc *result_loc)
1171612825{
1171712826 Error err;
1171812827
1171912828 if ((err = type_resolve(ira->codegen, array_ptr->value->type->data.pointer.child_type,
1172012829 ResolveStatusAlignmentKnown)))
1172112830 {
11722 return ira->codegen->invalid_instruction;
12831 return ira->codegen->invalid_inst_gen;
1172312832 }
1172412833
1172512834 wanted_type = adjust_slice_align(ira->codegen, wanted_type, get_ptr_align(ira->codegen, array_ptr->value->type));
1172612835
1172712836 if (instr_is_comptime(array_ptr)) {
11728 ZigValue *pointee = const_ptr_pointee(ira, ira->codegen, array_ptr->value, source_instr->source_node);
12837 ZigValue *array_ptr_val = ir_resolve_const(ira, array_ptr, UndefBad);
12838 if (array_ptr_val == nullptr)
12839 return ira->codegen->invalid_inst_gen;
12840 ZigValue *pointee = const_ptr_pointee(ira, ira->codegen, array_ptr_val, source_instr->source_node);
1172912841 if (pointee == nullptr)
11730 return ira->codegen->invalid_instruction;
12842 return ira->codegen->invalid_inst_gen;
1173112843 if (pointee->special != ConstValSpecialRuntime) {
11732 assert(array_ptr->value->type->id == ZigTypeIdPointer);
11733 ZigType *array_type = array_ptr->value->type->data.pointer.child_type;
12844 assert(array_ptr_val->type->id == ZigTypeIdPointer);
12845 ZigType *array_type = array_ptr_val->type->data.pointer.child_type;
1173412846 assert(is_slice(wanted_type));
1173512847 bool is_const = wanted_type->data.structure.fields[slice_ptr_index]->type_entry->data.pointer.is_const;
1173612848
11737 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
12849 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1173812850 init_const_slice(ira->codegen, result->value, pointee, 0, array_type->data.array.len, is_const);
11739 result->value->data.x_struct.fields[slice_ptr_index]->data.x_ptr.mut = array_ptr->value->data.x_ptr.mut;
12851 result->value->data.x_struct.fields[slice_ptr_index]->data.x_ptr.mut = array_ptr_val->data.x_ptr.mut;
1174012852 result->value->type = wanted_type;
1174112853 return result;
1174212854 }
1174312855 }
1174412856
1174512857 if (result_loc == nullptr) result_loc = no_result_loc();
11746 IrInstruction *result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true,
11747 false, true);
11748 if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {
12858 IrInstGen *result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true, true);
12859 if (type_is_invalid(result_loc_inst->value->type) ||
12860 result_loc_inst->value->type->id == ZigTypeIdUnreachable)
12861 {
1174912862 return result_loc_inst;
1175012863 }
1175112864 return ir_build_ptr_of_array_to_slice(ira, source_instr, wanted_type, array_ptr, result_loc_inst);
1175212865}
1175312866
11754static IrBasicBlock *ir_get_new_bb(IrAnalyze *ira, IrBasicBlock *old_bb, IrInstruction *ref_old_instruction) {
12867static IrBasicBlockGen *ir_get_new_bb(IrAnalyze *ira, IrBasicBlockSrc *old_bb, IrInst *ref_old_instruction) {
1175512868 assert(old_bb);
1175612869
11757 if (old_bb->other) {
11758 if (ref_old_instruction == nullptr || old_bb->other->ref_instruction != ref_old_instruction) {
11759 return old_bb->other;
12870 if (old_bb->child) {
12871 if (ref_old_instruction == nullptr || old_bb->child->ref_instruction != ref_old_instruction) {
12872 return old_bb->child;
1176012873 }
1176112874 }
1176212875
11763 IrBasicBlock *new_bb = ir_build_bb_from(&ira->new_irb, old_bb);
12876 IrBasicBlockGen *new_bb = ir_build_bb_from(ira, old_bb);
1176412877 new_bb->ref_instruction = ref_old_instruction;
1176512878
1176612879 return new_bb;
1176712880}
1176812881
11769static IrBasicBlock *ir_get_new_bb_runtime(IrAnalyze *ira, IrBasicBlock *old_bb, IrInstruction *ref_old_instruction) {
12882static IrBasicBlockGen *ir_get_new_bb_runtime(IrAnalyze *ira, IrBasicBlockSrc *old_bb, IrInst *ref_old_instruction) {
1177012883 assert(ref_old_instruction != nullptr);
11771 IrBasicBlock *new_bb = ir_get_new_bb(ira, old_bb, ref_old_instruction);
12884 IrBasicBlockGen *new_bb = ir_get_new_bb(ira, old_bb, ref_old_instruction);
1177212885 if (new_bb->must_be_comptime_source_instr) {
1177312886 ErrorMsg *msg = ir_add_error(ira, ref_old_instruction,
1177412887 buf_sprintf("control flow attempts to use compile-time variable at runtime"));
......@@ -11779,24 +12892,24 @@ static IrBasicBlock *ir_get_new_bb_runtime(IrAnalyze *ira, IrBasicBlock *old_bb,
1177912892 return new_bb;
1178012893}
1178112894
11782static void ir_start_bb(IrAnalyze *ira, IrBasicBlock *old_bb, IrBasicBlock *const_predecessor_bb) {
11783 ir_assert(!old_bb->suspended, (old_bb->instruction_list.length != 0) ? old_bb->instruction_list.at(0) : nullptr);
12895static void ir_start_bb(IrAnalyze *ira, IrBasicBlockSrc *old_bb, IrBasicBlockSrc *const_predecessor_bb) {
12896 ir_assert(!old_bb->suspended, (old_bb->instruction_list.length != 0) ? &old_bb->instruction_list.at(0)->base : nullptr);
1178412897 ira->instruction_index = 0;
1178512898 ira->old_irb.current_basic_block = old_bb;
1178612899 ira->const_predecessor_bb = const_predecessor_bb;
1178712900 ira->old_bb_index = old_bb->index;
1178812901}
1178912902
11790static IrInstruction *ira_suspend(IrAnalyze *ira, IrInstruction *old_instruction, IrBasicBlock *next_bb,
12903static IrInstGen *ira_suspend(IrAnalyze *ira, IrInst *old_instruction, IrBasicBlockSrc *next_bb,
1179112904 IrSuspendPosition *suspend_pos)
1179212905{
1179312906 if (ira->codegen->verbose_ir) {
11794 fprintf(stderr, "suspend %s_%zu %s_%zu #%" PRIu32 " (%zu,%zu)\n",
12907 fprintf(stderr, "suspend %s_%" PRIu32 " %s_%" PRIu32 " #%" PRIu32 " (%zu,%zu)\n",
1179512908 ira->old_irb.current_basic_block->name_hint,
1179612909 ira->old_irb.current_basic_block->debug_id,
1179712910 ira->old_irb.exec->basic_block_list.at(ira->old_bb_index)->name_hint,
1179812911 ira->old_irb.exec->basic_block_list.at(ira->old_bb_index)->debug_id,
11799 ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index)->debug_id,
12912 ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index)->base.debug_id,
1180012913 ira->old_bb_index, ira->instruction_index);
1180112914 }
1180212915 suspend_pos->basic_block_index = ira->old_bb_index;
......@@ -11811,13 +12924,13 @@ static IrInstruction *ira_suspend(IrAnalyze *ira, IrInstruction *old_instruction
1181112924 assert(ira->old_irb.current_basic_block == next_bb);
1181212925 ira->instruction_index = 0;
1181312926 ira->const_predecessor_bb = nullptr;
11814 next_bb->other = ir_get_new_bb_runtime(ira, next_bb, old_instruction);
11815 ira->new_irb.current_basic_block = next_bb->other;
12927 next_bb->child = ir_get_new_bb_runtime(ira, next_bb, old_instruction);
12928 ira->new_irb.current_basic_block = next_bb->child;
1181612929 }
1181712930 return ira->codegen->unreach_instruction;
1181812931}
1181912932
11820static IrInstruction *ira_resume(IrAnalyze *ira) {
12933static IrInstGen *ira_resume(IrAnalyze *ira) {
1182112934 IrSuspendPosition pos = ira->resume_stack.pop();
1182212935 if (ira->codegen->verbose_ir) {
1182312936 fprintf(stderr, "resume (%zu,%zu) ", pos.basic_block_index, pos.instruction_index);
......@@ -11830,12 +12943,12 @@ static IrInstruction *ira_resume(IrAnalyze *ira) {
1183012943 ira->instruction_index = pos.instruction_index;
1183112944 assert(pos.instruction_index < ira->old_irb.current_basic_block->instruction_list.length);
1183212945 if (ira->codegen->verbose_ir) {
11833 fprintf(stderr, "%s_%zu #%" PRIu32 "\n", ira->old_irb.current_basic_block->name_hint,
12946 fprintf(stderr, "%s_%" PRIu32 " #%" PRIu32 "\n", ira->old_irb.current_basic_block->name_hint,
1183412947 ira->old_irb.current_basic_block->debug_id,
11835 ira->old_irb.current_basic_block->instruction_list.at(pos.instruction_index)->debug_id);
12948 ira->old_irb.current_basic_block->instruction_list.at(pos.instruction_index)->base.debug_id);
1183612949 }
1183712950 ira->const_predecessor_bb = nullptr;
11838 ira->new_irb.current_basic_block = ira->old_irb.current_basic_block->other;
12951 ira->new_irb.current_basic_block = ira->old_irb.current_basic_block->child;
1183912952 assert(ira->new_irb.current_basic_block != nullptr);
1184012953 return ira->codegen->unreach_instruction;
1184112954}
......@@ -11846,8 +12959,8 @@ static void ir_start_next_bb(IrAnalyze *ira) {
1184612959 bool need_repeat = true;
1184712960 for (;;) {
1184812961 while (ira->old_bb_index < ira->old_irb.exec->basic_block_list.length) {
11849 IrBasicBlock *old_bb = ira->old_irb.exec->basic_block_list.at(ira->old_bb_index);
11850 if (old_bb->other == nullptr && old_bb->suspend_instruction_ref == nullptr) {
12962 IrBasicBlockSrc *old_bb = ira->old_irb.exec->basic_block_list.at(ira->old_bb_index);
12963 if (old_bb->child == nullptr && old_bb->suspend_instruction_ref == nullptr) {
1185112964 ira->old_bb_index += 1;
1185212965 continue;
1185312966 }
......@@ -11855,8 +12968,8 @@ static void ir_start_next_bb(IrAnalyze *ira) {
1185512968 // if it's a suspended block,
1185612969 // then skip it
1185712970 if (old_bb->suspended ||
11858 (old_bb->other != nullptr && old_bb->other->instruction_list.length != 0) ||
11859 (old_bb->other != nullptr && old_bb->other->already_appended))
12971 (old_bb->child != nullptr && old_bb->child->instruction_list.length != 0) ||
12972 (old_bb->child != nullptr && old_bb->child->already_appended))
1186012973 {
1186112974 ira->old_bb_index += 1;
1186212975 continue;
......@@ -11870,10 +12983,10 @@ static void ir_start_next_bb(IrAnalyze *ira) {
1187012983 return;
1187112984 }
1187212985
11873 if (old_bb->other == nullptr) {
11874 old_bb->other = ir_get_new_bb_runtime(ira, old_bb, old_bb->suspend_instruction_ref);
12986 if (old_bb->child == nullptr) {
12987 old_bb->child = ir_get_new_bb_runtime(ira, old_bb, old_bb->suspend_instruction_ref);
1187512988 }
11876 ira->new_irb.current_basic_block = old_bb->other;
12989 ira->new_irb.current_basic_block = old_bb->child;
1187712990 ir_start_bb(ira, old_bb, nullptr);
1187812991 return;
1187912992 }
......@@ -11893,16 +13006,16 @@ static void ir_finish_bb(IrAnalyze *ira) {
1189313006 if (!ira->new_irb.current_basic_block->already_appended) {
1189413007 ira->new_irb.current_basic_block->already_appended = true;
1189513008 if (ira->codegen->verbose_ir) {
11896 fprintf(stderr, "append new bb %s_%zu\n", ira->new_irb.current_basic_block->name_hint,
13009 fprintf(stderr, "append new bb %s_%" PRIu32 "\n", ira->new_irb.current_basic_block->name_hint,
1189713010 ira->new_irb.current_basic_block->debug_id);
1189813011 }
1189913012 ira->new_irb.exec->basic_block_list.append(ira->new_irb.current_basic_block);
1190013013 }
1190113014 ira->instruction_index += 1;
1190213015 while (ira->instruction_index < ira->old_irb.current_basic_block->instruction_list.length) {
11903 IrInstruction *next_instruction = ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index);
13016 IrInstSrc *next_instruction = ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index);
1190413017 if (!next_instruction->is_gen) {
11905 ir_add_error(ira, next_instruction, buf_sprintf("unreachable code"));
13018 ir_add_error(ira, &next_instruction->base, buf_sprintf("unreachable code"));
1190613019 break;
1190713020 }
1190813021 ira->instruction_index += 1;
......@@ -11911,7 +13024,7 @@ static void ir_finish_bb(IrAnalyze *ira) {
1191113024 ir_start_next_bb(ira);
1191213025}
1191313026
11914static IrInstruction *ir_unreach_error(IrAnalyze *ira) {
13027static IrInstGen *ir_unreach_error(IrAnalyze *ira) {
1191513028 ira->old_bb_index = SIZE_MAX;
1191613029 if (ira->new_irb.exec->first_err_trace_msg == nullptr) {
1191713030 ira->new_irb.exec->first_err_trace_msg = ira->codegen->trace_err;
......@@ -11919,7 +13032,7 @@ static IrInstruction *ir_unreach_error(IrAnalyze *ira) {
1191913032 return ira->codegen->unreach_instruction;
1192013033}
1192113034
11922static bool ir_emit_backward_branch(IrAnalyze *ira, IrInstruction *source_instruction) {
13035static bool ir_emit_backward_branch(IrAnalyze *ira, IrInst* source_instruction) {
1192313036 size_t *bbc = ira->new_irb.exec->backward_branch_count;
1192413037 size_t *quota = ira->new_irb.exec->backward_branch_quota;
1192513038
......@@ -11938,66 +13051,85 @@ static bool ir_emit_backward_branch(IrAnalyze *ira, IrInstruction *source_instru
1193813051 return true;
1193913052}
1194013053
11941static IrInstruction *ir_inline_bb(IrAnalyze *ira, IrInstruction *source_instruction, IrBasicBlock *old_bb) {
13054static IrInstGen *ir_inline_bb(IrAnalyze *ira, IrInst* source_instruction, IrBasicBlockSrc *old_bb) {
1194213055 if (old_bb->debug_id <= ira->old_irb.current_basic_block->debug_id) {
1194313056 if (!ir_emit_backward_branch(ira, source_instruction))
1194413057 return ir_unreach_error(ira);
1194513058 }
1194613059
11947 old_bb->other = ira->old_irb.current_basic_block->other;
13060 old_bb->child = ira->old_irb.current_basic_block->child;
1194813061 ir_start_bb(ira, old_bb, ira->old_irb.current_basic_block);
1194913062 return ira->codegen->unreach_instruction;
1195013063}
1195113064
11952static IrInstruction *ir_finish_anal(IrAnalyze *ira, IrInstruction *instruction) {
13065static IrInstGen *ir_finish_anal(IrAnalyze *ira, IrInstGen *instruction) {
1195313066 if (instruction->value->type->id == ZigTypeIdUnreachable)
1195413067 ir_finish_bb(ira);
1195513068 return instruction;
1195613069}
1195713070
11958static IrInstruction *ir_const_type(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *ty) {
11959 IrInstruction *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_type);
13071static IrInstGen *ir_const_fn(IrAnalyze *ira, IrInst *source_instr, ZigFn *fn_entry) {
13072 IrInstGen *result = ir_const(ira, source_instr, fn_entry->type_entry);
13073 result->value->special = ConstValSpecialStatic;
13074 result->value->data.x_ptr.data.fn.fn_entry = fn_entry;
13075 result->value->data.x_ptr.mut = ConstPtrMutComptimeConst;
13076 result->value->data.x_ptr.special = ConstPtrSpecialFunction;
13077 return result;
13078}
13079
13080static IrInstGen *ir_const_bound_fn(IrAnalyze *ira, IrInst *src_inst, ZigFn *fn_entry, IrInstGen *first_arg,
13081 IrInst *first_arg_src)
13082{
13083 IrInstGen *result = ir_const(ira, src_inst, get_bound_fn_type(ira->codegen, fn_entry));
13084 result->value->data.x_bound_fn.fn = fn_entry;
13085 result->value->data.x_bound_fn.first_arg = first_arg;
13086 result->value->data.x_bound_fn.first_arg_src = first_arg_src;
13087 return result;
13088}
13089
13090static IrInstGen *ir_const_type(IrAnalyze *ira, IrInst *source_instruction, ZigType *ty) {
13091 IrInstGen *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_type);
1196013092 result->value->data.x_type = ty;
1196113093 return result;
1196213094}
1196313095
11964static IrInstruction *ir_const_bool(IrAnalyze *ira, IrInstruction *source_instruction, bool value) {
11965 IrInstruction *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_bool);
13096static IrInstGen *ir_const_bool(IrAnalyze *ira, IrInst *source_instruction, bool value) {
13097 IrInstGen *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_bool);
1196613098 result->value->data.x_bool = value;
1196713099 return result;
1196813100}
1196913101
11970static IrInstruction *ir_const_undef(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *ty) {
11971 IrInstruction *result = ir_const(ira, source_instruction, ty);
13102static IrInstGen *ir_const_undef(IrAnalyze *ira, IrInst *source_instruction, ZigType *ty) {
13103 IrInstGen *result = ir_const(ira, source_instruction, ty);
1197213104 result->value->special = ConstValSpecialUndef;
1197313105 return result;
1197413106}
1197513107
11976static IrInstruction *ir_const_unreachable(IrAnalyze *ira, IrInstruction *source_instruction) {
11977 IrInstruction *result = ir_const_noval(ira, source_instruction);
13108static IrInstGen *ir_const_unreachable(IrAnalyze *ira, IrInst *source_instruction) {
13109 IrInstGen *result = ir_const_noval(ira, source_instruction);
1197813110 result->value = ira->codegen->intern.for_unreachable();
1197913111 return result;
1198013112}
1198113113
11982static IrInstruction *ir_const_void(IrAnalyze *ira, IrInstruction *source_instruction) {
11983 IrInstruction *result = ir_const_noval(ira, source_instruction);
13114static IrInstGen *ir_const_void(IrAnalyze *ira, IrInst *source_instruction) {
13115 IrInstGen *result = ir_const_noval(ira, source_instruction);
1198413116 result->value = ira->codegen->intern.for_void();
1198513117 return result;
1198613118}
1198713119
11988static IrInstruction *ir_const_unsigned(IrAnalyze *ira, IrInstruction *source_instruction, uint64_t value) {
11989 IrInstruction *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_num_lit_int);
13120static IrInstGen *ir_const_unsigned(IrAnalyze *ira, IrInst *source_instruction, uint64_t value) {
13121 IrInstGen *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_num_lit_int);
1199013122 bigint_init_unsigned(&result->value->data.x_bigint, value);
1199113123 return result;
1199213124}
1199313125
11994static IrInstruction *ir_get_const_ptr(IrAnalyze *ira, IrInstruction *instruction,
13126static IrInstGen *ir_get_const_ptr(IrAnalyze *ira, IrInst *instruction,
1199513127 ZigValue *pointee, ZigType *pointee_type,
1199613128 ConstPtrMut ptr_mut, bool ptr_is_const, bool ptr_is_volatile, uint32_t ptr_align)
1199713129{
1199813130 ZigType *ptr_type = get_pointer_to_type_extra(ira->codegen, pointee_type,
1199913131 ptr_is_const, ptr_is_volatile, PtrLenSingle, ptr_align, 0, 0, false);
12000 IrInstruction *const_instr = ir_const(ira, instruction, ptr_type);
13132 IrInstGen *const_instr = ir_const(ira, instruction, ptr_type);
1200113133 ZigValue *const_val = const_instr->value;
1200213134 const_val->data.x_ptr.special = ConstPtrSpecialRef;
1200313135 const_val->data.x_ptr.mut = ptr_mut;
......@@ -12005,7 +13137,7 @@ static IrInstruction *ir_get_const_ptr(IrAnalyze *ira, IrInstruction *instructio
1200513137 return const_instr;
1200613138}
1200713139
12008static Error ir_resolve_const_val(CodeGen *codegen, IrExecutable *exec, AstNode *source_node,
13140static Error ir_resolve_const_val(CodeGen *codegen, IrExecutableGen *exec, AstNode *source_node,
1200913141 ZigValue *val, UndefAllowed undef_allowed)
1201013142{
1201113143 Error err;
......@@ -12017,14 +13149,14 @@ static Error ir_resolve_const_val(CodeGen *codegen, IrExecutable *exec, AstNode
1201713149 if (!type_has_bits(val->type))
1201813150 return ErrorNone;
1201913151
12020 exec_add_error_node(codegen, exec, source_node,
13152 exec_add_error_node_gen(codegen, exec, source_node,
1202113153 buf_sprintf("unable to evaluate constant expression"));
1202213154 return ErrorSemanticAnalyzeFail;
1202313155 case ConstValSpecialUndef:
1202413156 if (undef_allowed == UndefOk || undef_allowed == LazyOk)
1202513157 return ErrorNone;
1202613158
12027 exec_add_error_node(codegen, exec, source_node,
13159 exec_add_error_node_gen(codegen, exec, source_node,
1202813160 buf_sprintf("use of undefined value here causes undefined behavior"));
1202913161 return ErrorSemanticAnalyzeFail;
1203013162 case ConstValSpecialLazy:
......@@ -12039,9 +13171,9 @@ static Error ir_resolve_const_val(CodeGen *codegen, IrExecutable *exec, AstNode
1203913171 }
1204013172}
1204113173
12042static ZigValue *ir_resolve_const(IrAnalyze *ira, IrInstruction *value, UndefAllowed undef_allowed) {
13174static ZigValue *ir_resolve_const(IrAnalyze *ira, IrInstGen *value, UndefAllowed undef_allowed) {
1204313175 Error err;
12044 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, value->source_node,
13176 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, value->base.source_node,
1204513177 value->value, undef_allowed)))
1204613178 {
1204713179 return nullptr;
......@@ -12049,17 +13181,19 @@ static ZigValue *ir_resolve_const(IrAnalyze *ira, IrInstruction *value, UndefAll
1204913181 return value->value;
1205013182}
1205113183
12052ZigValue *ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
12053 ZigType *expected_type, size_t *backward_branch_count, size_t *backward_branch_quota,
13184Error ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
13185 ZigValue *return_ptr, size_t *backward_branch_count, size_t *backward_branch_quota,
1205413186 ZigFn *fn_entry, Buf *c_import_buf, AstNode *source_node, Buf *exec_name,
12055 IrExecutable *parent_exec, AstNode *expected_type_source_node, UndefAllowed undef_allowed)
13187 IrExecutableGen *parent_exec, AstNode *expected_type_source_node, UndefAllowed undef_allowed)
1205613188{
1205713189 Error err;
1205813190
12059 if (expected_type != nullptr && type_is_invalid(expected_type))
12060 return codegen->invalid_instruction->value;
13191 src_assert(return_ptr->type->id == ZigTypeIdPointer, source_node);
13192
13193 if (type_is_invalid(return_ptr->type))
13194 return ErrorSemanticAnalyzeFail;
1206113195
12062 IrExecutable *ir_executable = allocate<IrExecutable>(1, "IrExecutablePass1");
13196 IrExecutableSrc *ir_executable = allocate<IrExecutableSrc>(1, "IrExecutableSrc");
1206313197 ir_executable->source_node = source_node;
1206413198 ir_executable->parent_exec = parent_exec;
1206513199 ir_executable->name = exec_name;
......@@ -12069,21 +13203,21 @@ ZigValue *ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
1206913203 ir_executable->begin_scope = scope;
1207013204
1207113205 if (!ir_gen(codegen, node, scope, ir_executable))
12072 return codegen->invalid_instruction->value;
13206 return ErrorSemanticAnalyzeFail;
1207313207
1207413208 if (ir_executable->first_err_trace_msg != nullptr) {
1207513209 codegen->trace_err = ir_executable->first_err_trace_msg;
12076 return codegen->invalid_instruction->value;
13210 return ErrorSemanticAnalyzeFail;
1207713211 }
1207813212
1207913213 if (codegen->verbose_ir) {
1208013214 fprintf(stderr, "\nSource: ");
1208113215 ast_render(stderr, node, 4);
1208213216 fprintf(stderr, "\n{ // (IR)\n");
12083 ir_print(codegen, stderr, ir_executable, 2, IrPassSrc);
13217 ir_print_src(codegen, stderr, ir_executable, 2);
1208413218 fprintf(stderr, "}\n");
1208513219 }
12086 IrExecutable *analyzed_executable = allocate<IrExecutable>(1, "IrExecutablePass2");
13220 IrExecutableGen *analyzed_executable = allocate<IrExecutableGen>(1, "IrExecutableGen");
1208713221 analyzed_executable->source_node = source_node;
1208813222 analyzed_executable->parent_exec = parent_exec;
1208913223 analyzed_executable->source_exec = ir_executable;
......@@ -12094,33 +13228,36 @@ ZigValue *ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
1209413228 analyzed_executable->backward_branch_count = backward_branch_count;
1209513229 analyzed_executable->backward_branch_quota = backward_branch_quota;
1209613230 analyzed_executable->begin_scope = scope;
12097 ZigType *result_type = ir_analyze(codegen, ir_executable, analyzed_executable, expected_type, expected_type_source_node);
13231 ZigType *result_type = ir_analyze(codegen, ir_executable, analyzed_executable,
13232 return_ptr->type->data.pointer.child_type, expected_type_source_node, return_ptr);
1209813233 if (type_is_invalid(result_type)) {
12099 return codegen->invalid_instruction->value;
13234 return ErrorSemanticAnalyzeFail;
1210013235 }
1210113236
1210213237 if (codegen->verbose_ir) {
1210313238 fprintf(stderr, "{ // (analyzed)\n");
12104 ir_print(codegen, stderr, analyzed_executable, 2, IrPassGen);
13239 ir_print_gen(codegen, stderr, analyzed_executable, 2);
1210513240 fprintf(stderr, "}\n");
1210613241 }
1210713242
12108 ZigValue *result = ir_exec_const_result(codegen, analyzed_executable);
12109 if (type_is_invalid(result->type))
12110 return codegen->invalid_instruction->value;
13243 if ((err = ir_exec_scan_for_side_effects(codegen, analyzed_executable)))
13244 return err;
1211113245
13246 ZigValue *result = const_ptr_pointee(nullptr, codegen, return_ptr, source_node);
13247 if (result == nullptr)
13248 return ErrorSemanticAnalyzeFail;
1211213249 if ((err = ir_resolve_const_val(codegen, analyzed_executable, node, result, undef_allowed)))
12113 return codegen->invalid_instruction->value;
13250 return err;
1211413251
12115 return result;
13252 return ErrorNone;
1211613253}
1211713254
12118static ErrorTableEntry *ir_resolve_error(IrAnalyze *ira, IrInstruction *err_value) {
13255static ErrorTableEntry *ir_resolve_error(IrAnalyze *ira, IrInstGen *err_value) {
1211913256 if (type_is_invalid(err_value->value->type))
1212013257 return nullptr;
1212113258
1212213259 if (err_value->value->type->id != ZigTypeIdErrorSet) {
12123 ir_add_error(ira, err_value,
13260 ir_add_error_node(ira, err_value->base.source_node,
1212413261 buf_sprintf("expected error, found '%s'", buf_ptr(&err_value->value->type->name)));
1212513262 return nullptr;
1212613263 }
......@@ -12133,7 +13270,7 @@ static ErrorTableEntry *ir_resolve_error(IrAnalyze *ira, IrInstruction *err_valu
1213313270 return const_val->data.x_err_set;
1213413271}
1213513272
12136static ZigType *ir_resolve_const_type(CodeGen *codegen, IrExecutable *exec, AstNode *source_node,
13273static ZigType *ir_resolve_const_type(CodeGen *codegen, IrExecutableGen *exec, AstNode *source_node,
1213713274 ZigValue *val)
1213813275{
1213913276 Error err;
......@@ -12144,18 +13281,18 @@ static ZigType *ir_resolve_const_type(CodeGen *codegen, IrExecutable *exec, AstN
1214413281 return val->data.x_type;
1214513282}
1214613283
12147static ZigValue *ir_resolve_type_lazy(IrAnalyze *ira, IrInstruction *type_value) {
13284static ZigValue *ir_resolve_type_lazy(IrAnalyze *ira, IrInstGen *type_value) {
1214813285 if (type_is_invalid(type_value->value->type))
1214913286 return nullptr;
1215013287
1215113288 if (type_value->value->type->id != ZigTypeIdMetaType) {
12152 ir_add_error(ira, type_value,
13289 ir_add_error_node(ira, type_value->base.source_node,
1215313290 buf_sprintf("expected type 'type', found '%s'", buf_ptr(&type_value->value->type->name)));
1215413291 return nullptr;
1215513292 }
1215613293
1215713294 Error err;
12158 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, type_value->source_node,
13295 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, type_value->base.source_node,
1215913296 type_value->value, LazyOk)))
1216013297 {
1216113298 return nullptr;
......@@ -12164,17 +13301,17 @@ static ZigValue *ir_resolve_type_lazy(IrAnalyze *ira, IrInstruction *type_value)
1216413301 return type_value->value;
1216513302}
1216613303
12167static ZigType *ir_resolve_type(IrAnalyze *ira, IrInstruction *type_value) {
13304static ZigType *ir_resolve_type(IrAnalyze *ira, IrInstGen *type_value) {
1216813305 ZigValue *val = ir_resolve_type_lazy(ira, type_value);
1216913306 if (val == nullptr)
1217013307 return ira->codegen->builtin_types.entry_invalid;
1217113308
12172 return ir_resolve_const_type(ira->codegen, ira->new_irb.exec, type_value->source_node, val);
13309 return ir_resolve_const_type(ira->codegen, ira->new_irb.exec, type_value->base.source_node, val);
1217313310}
1217413311
12175static Error ir_validate_vector_elem_type(IrAnalyze *ira, IrInstruction *source_instr, ZigType *elem_type) {
13312static Error ir_validate_vector_elem_type(IrAnalyze *ira, AstNode *source_node, ZigType *elem_type) {
1217613313 if (!is_valid_vector_elem_type(elem_type)) {
12177 ir_add_error(ira, source_instr,
13314 ir_add_error_node(ira, source_node,
1217813315 buf_sprintf("vector element type must be integer, float, bool, or pointer; '%s' is invalid",
1217913316 buf_ptr(&elem_type->name)));
1218013317 return ErrorSemanticAnalyzeFail;
......@@ -12182,28 +13319,28 @@ static Error ir_validate_vector_elem_type(IrAnalyze *ira, IrInstruction *source_
1218213319 return ErrorNone;
1218313320}
1218413321
12185static ZigType *ir_resolve_vector_elem_type(IrAnalyze *ira, IrInstruction *elem_type_value) {
13322static ZigType *ir_resolve_vector_elem_type(IrAnalyze *ira, IrInstGen *elem_type_value) {
1218613323 Error err;
1218713324 ZigType *elem_type = ir_resolve_type(ira, elem_type_value);
1218813325 if (type_is_invalid(elem_type))
1218913326 return ira->codegen->builtin_types.entry_invalid;
12190 if ((err = ir_validate_vector_elem_type(ira, elem_type_value, elem_type)))
13327 if ((err = ir_validate_vector_elem_type(ira, elem_type_value->base.source_node, elem_type)))
1219113328 return ira->codegen->builtin_types.entry_invalid;
1219213329 return elem_type;
1219313330}
1219413331
12195static ZigType *ir_resolve_int_type(IrAnalyze *ira, IrInstruction *type_value) {
13332static ZigType *ir_resolve_int_type(IrAnalyze *ira, IrInstGen *type_value) {
1219613333 ZigType *ty = ir_resolve_type(ira, type_value);
1219713334 if (type_is_invalid(ty))
1219813335 return ira->codegen->builtin_types.entry_invalid;
1219913336
1220013337 if (ty->id != ZigTypeIdInt) {
12201 ErrorMsg *msg = ir_add_error(ira, type_value,
13338 ErrorMsg *msg = ir_add_error_node(ira, type_value->base.source_node,
1220213339 buf_sprintf("expected integer type, found '%s'", buf_ptr(&ty->name)));
1220313340 if (ty->id == ZigTypeIdVector &&
1220413341 ty->data.vector.elem_type->id == ZigTypeIdInt)
1220513342 {
12206 add_error_note(ira->codegen, msg, type_value->source_node,
13343 add_error_note(ira->codegen, msg, type_value->base.source_node,
1220713344 buf_sprintf("represent vectors with their element types, i.e. '%s'",
1220813345 buf_ptr(&ty->data.vector.elem_type->name)));
1220913346 }
......@@ -12213,12 +13350,12 @@ static ZigType *ir_resolve_int_type(IrAnalyze *ira, IrInstruction *type_value) {
1221313350 return ty;
1221413351}
1221513352
12216static ZigType *ir_resolve_error_set_type(IrAnalyze *ira, IrInstruction *op_source, IrInstruction *type_value) {
13353static ZigType *ir_resolve_error_set_type(IrAnalyze *ira, IrInst *op_source, IrInstGen *type_value) {
1221713354 if (type_is_invalid(type_value->value->type))
1221813355 return ira->codegen->builtin_types.entry_invalid;
1221913356
1222013357 if (type_value->value->type->id != ZigTypeIdMetaType) {
12221 ErrorMsg *msg = ir_add_error(ira, type_value,
13358 ErrorMsg *msg = ir_add_error_node(ira, type_value->base.source_node,
1222213359 buf_sprintf("expected error set type, found '%s'", buf_ptr(&type_value->value->type->name)));
1222313360 add_error_note(ira->codegen, msg, op_source->source_node,
1222413361 buf_sprintf("`||` merges error sets; `or` performs boolean OR"));
......@@ -12232,7 +13369,7 @@ static ZigType *ir_resolve_error_set_type(IrAnalyze *ira, IrInstruction *op_sour
1223213369 assert(const_val->data.x_type != nullptr);
1223313370 ZigType *result_type = const_val->data.x_type;
1223413371 if (result_type->id != ZigTypeIdErrorSet) {
12235 ErrorMsg *msg = ir_add_error(ira, type_value,
13372 ErrorMsg *msg = ir_add_error_node(ira, type_value->base.source_node,
1223613373 buf_sprintf("expected error set type, found type '%s'", buf_ptr(&result_type->name)));
1223713374 add_error_note(ira->codegen, msg, op_source->source_node,
1223813375 buf_sprintf("`||` merges error sets; `or` performs boolean OR"));
......@@ -12241,15 +13378,12 @@ static ZigType *ir_resolve_error_set_type(IrAnalyze *ira, IrInstruction *op_sour
1224113378 return result_type;
1224213379}
1224313380
12244static ZigFn *ir_resolve_fn(IrAnalyze *ira, IrInstruction *fn_value) {
12245 if (fn_value == ira->codegen->invalid_instruction)
12246 return nullptr;
12247
13381static ZigFn *ir_resolve_fn(IrAnalyze *ira, IrInstGen *fn_value) {
1224813382 if (type_is_invalid(fn_value->value->type))
1224913383 return nullptr;
1225013384
1225113385 if (fn_value->value->type->id != ZigTypeIdFn) {
12252 ir_add_error_node(ira, fn_value->source_node,
13386 ir_add_error_node(ira, fn_value->base.source_node,
1225313387 buf_sprintf("expected function type, found '%s'", buf_ptr(&fn_value->value->type->name)));
1225413388 return nullptr;
1225513389 }
......@@ -12265,22 +13399,22 @@ static ZigFn *ir_resolve_fn(IrAnalyze *ira, IrInstruction *fn_value) {
1226513399 return const_val->data.x_ptr.data.fn.fn_entry;
1226613400}
1226713401
12268static IrInstruction *ir_analyze_optional_wrap(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,
12269 ZigType *wanted_type, ResultLoc *result_loc)
13402static IrInstGen *ir_analyze_optional_wrap(IrAnalyze *ira, IrInst* source_instr,
13403 IrInstGen *value, ZigType *wanted_type, ResultLoc *result_loc)
1227013404{
1227113405 assert(wanted_type->id == ZigTypeIdOptional);
1227213406
1227313407 if (instr_is_comptime(value)) {
1227413408 ZigType *payload_type = wanted_type->data.maybe.child_type;
12275 IrInstruction *casted_payload = ir_implicit_cast(ira, value, payload_type);
13409 IrInstGen *casted_payload = ir_implicit_cast(ira, value, payload_type);
1227613410 if (type_is_invalid(casted_payload->value->type))
12277 return ira->codegen->invalid_instruction;
13411 return ira->codegen->invalid_inst_gen;
1227813412
1227913413 ZigValue *val = ir_resolve_const(ira, casted_payload, UndefOk);
1228013414 if (!val)
12281 return ira->codegen->invalid_instruction;
13415 return ira->codegen->invalid_inst_gen;
1228213416
12283 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
13417 IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
1228413418 source_instr->scope, source_instr->source_node);
1228513419 const_instruction->base.value->special = ConstValSpecialStatic;
1228613420 if (types_have_same_zig_comptime_repr(ira->codegen, wanted_type, payload_type)) {
......@@ -12295,40 +13429,42 @@ static IrInstruction *ir_analyze_optional_wrap(IrAnalyze *ira, IrInstruction *so
1229513429 if (result_loc == nullptr && handle_is_ptr(wanted_type)) {
1229613430 result_loc = no_result_loc();
1229713431 }
12298 IrInstruction *result_loc_inst = nullptr;
13432 IrInstGen *result_loc_inst = nullptr;
1229913433 if (result_loc != nullptr) {
12300 result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true, false, true);
12301 if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {
13434 result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true, true);
13435 if (type_is_invalid(result_loc_inst->value->type) ||
13436 result_loc_inst->value->type->id == ZigTypeIdUnreachable)
13437 {
1230213438 return result_loc_inst;
1230313439 }
1230413440 }
12305 IrInstruction *result = ir_build_optional_wrap(ira, source_instr, wanted_type, value, result_loc_inst);
13441 IrInstGen *result = ir_build_optional_wrap(ira, source_instr, wanted_type, value, result_loc_inst);
1230613442 result->value->data.rh_maybe = RuntimeHintOptionalNonNull;
1230713443 return result;
1230813444}
1230913445
12310static IrInstruction *ir_analyze_err_wrap_payload(IrAnalyze *ira, IrInstruction *source_instr,
12311 IrInstruction *value, ZigType *wanted_type, ResultLoc *result_loc)
13446static IrInstGen *ir_analyze_err_wrap_payload(IrAnalyze *ira, IrInst* source_instr,
13447 IrInstGen *value, ZigType *wanted_type, ResultLoc *result_loc)
1231213448{
1231313449 assert(wanted_type->id == ZigTypeIdErrorUnion);
1231413450
1231513451 ZigType *payload_type = wanted_type->data.error_union.payload_type;
1231613452 ZigType *err_set_type = wanted_type->data.error_union.err_set_type;
1231713453 if (instr_is_comptime(value)) {
12318 IrInstruction *casted_payload = ir_implicit_cast(ira, value, payload_type);
13454 IrInstGen *casted_payload = ir_implicit_cast(ira, value, payload_type);
1231913455 if (type_is_invalid(casted_payload->value->type))
12320 return ira->codegen->invalid_instruction;
13456 return ira->codegen->invalid_inst_gen;
1232113457
12322 ZigValue *val = ir_resolve_const(ira, casted_payload, UndefBad);
12323 if (!val)
12324 return ira->codegen->invalid_instruction;
13458 ZigValue *val = ir_resolve_const(ira, casted_payload, UndefOk);
13459 if (val == nullptr)
13460 return ira->codegen->invalid_inst_gen;
1232513461
1232613462 ZigValue *err_set_val = create_const_vals(1);
1232713463 err_set_val->type = err_set_type;
1232813464 err_set_val->special = ConstValSpecialStatic;
1232913465 err_set_val->data.x_err_set = nullptr;
1233013466
12331 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
13467 IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
1233213468 source_instr->scope, source_instr->source_node);
1233313469 const_instruction->base.value->type = wanted_type;
1233413470 const_instruction->base.value->special = ConstValSpecialStatic;
......@@ -12337,23 +13473,24 @@ static IrInstruction *ir_analyze_err_wrap_payload(IrAnalyze *ira, IrInstruction
1233713473 return &const_instruction->base;
1233813474 }
1233913475
12340 IrInstruction *result_loc_inst;
13476 IrInstGen *result_loc_inst;
1234113477 if (handle_is_ptr(wanted_type)) {
1234213478 if (result_loc == nullptr) result_loc = no_result_loc();
12343 result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true, false, true);
12344 if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {
13479 result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true, true);
13480 if (type_is_invalid(result_loc_inst->value->type) ||
13481 result_loc_inst->value->type->id == ZigTypeIdUnreachable) {
1234513482 return result_loc_inst;
1234613483 }
1234713484 } else {
1234813485 result_loc_inst = nullptr;
1234913486 }
1235013487
12351 IrInstruction *result = ir_build_err_wrap_payload(ira, source_instr, wanted_type, value, result_loc_inst);
13488 IrInstGen *result = ir_build_err_wrap_payload(ira, source_instr, wanted_type, value, result_loc_inst);
1235213489 result->value->data.rh_error_union = RuntimeHintErrorUnionNonError;
1235313490 return result;
1235413491}
1235513492
12356static IrInstruction *ir_analyze_err_set_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,
13493static IrInstGen *ir_analyze_err_set_cast(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value,
1235713494 ZigType *wanted_type)
1235813495{
1235913496 assert(value->value->type->id == ZigTypeIdErrorSet);
......@@ -12362,10 +13499,10 @@ static IrInstruction *ir_analyze_err_set_cast(IrAnalyze *ira, IrInstruction *sou
1236213499 if (instr_is_comptime(value)) {
1236313500 ZigValue *val = ir_resolve_const(ira, value, UndefBad);
1236413501 if (!val)
12365 return ira->codegen->invalid_instruction;
13502 return ira->codegen->invalid_inst_gen;
1236613503
1236713504 if (!resolve_inferred_error_set(ira->codegen, wanted_type, source_instr->source_node)) {
12368 return ira->codegen->invalid_instruction;
13505 return ira->codegen->invalid_inst_gen;
1236913506 }
1237013507 if (!type_is_global_error_set(wanted_type)) {
1237113508 bool subset = false;
......@@ -12379,11 +13516,11 @@ static IrInstruction *ir_analyze_err_set_cast(IrAnalyze *ira, IrInstruction *sou
1237913516 ir_add_error(ira, source_instr,
1238013517 buf_sprintf("error.%s not a member of error set '%s'",
1238113518 buf_ptr(&val->data.x_err_set->name), buf_ptr(&wanted_type->name)));
12382 return ira->codegen->invalid_instruction;
13519 return ira->codegen->invalid_inst_gen;
1238313520 }
1238413521 }
1238513522
12386 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
13523 IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
1238713524 source_instr->scope, source_instr->source_node);
1238813525 const_instruction->base.value->type = wanted_type;
1238913526 const_instruction->base.value->special = ConstValSpecialStatic;
......@@ -12391,18 +13528,16 @@ static IrInstruction *ir_analyze_err_set_cast(IrAnalyze *ira, IrInstruction *sou
1239113528 return &const_instruction->base;
1239213529 }
1239313530
12394 IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope, source_instr->source_node, wanted_type, value, CastOpErrSet);
12395 result->value->type = wanted_type;
12396 return result;
13531 return ir_build_cast(ira, source_instr, wanted_type, value, CastOpErrSet);
1239713532}
1239813533
12399static IrInstruction *ir_analyze_frame_ptr_to_anyframe(IrAnalyze *ira, IrInstruction *source_instr,
12400 IrInstruction *frame_ptr, ZigType *wanted_type)
13534static IrInstGen *ir_analyze_frame_ptr_to_anyframe(IrAnalyze *ira, IrInst* source_instr,
13535 IrInstGen *frame_ptr, ZigType *wanted_type)
1240113536{
1240213537 if (instr_is_comptime(frame_ptr)) {
1240313538 ZigValue *ptr_val = ir_resolve_const(ira, frame_ptr, UndefBad);
1240413539 if (ptr_val == nullptr)
12405 return ira->codegen->invalid_instruction;
13540 return ira->codegen->invalid_inst_gen;
1240613541
1240713542 ir_assert(ptr_val->type->id == ZigTypeIdPointer, source_instr);
1240813543 if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
......@@ -12410,44 +13545,38 @@ static IrInstruction *ir_analyze_frame_ptr_to_anyframe(IrAnalyze *ira, IrInstruc
1241013545 }
1241113546 }
1241213547
12413 IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope, source_instr->source_node,
12414 wanted_type, frame_ptr, CastOpBitCast);
12415 result->value->type = wanted_type;
12416 return result;
13548 return ir_build_cast(ira, source_instr, wanted_type, frame_ptr, CastOpBitCast);
1241713549}
1241813550
12419static IrInstruction *ir_analyze_anyframe_to_anyframe(IrAnalyze *ira, IrInstruction *source_instr,
12420 IrInstruction *value, ZigType *wanted_type)
13551static IrInstGen *ir_analyze_anyframe_to_anyframe(IrAnalyze *ira, IrInst* source_instr,
13552 IrInstGen *value, ZigType *wanted_type)
1242113553{
1242213554 if (instr_is_comptime(value)) {
1242313555 zig_panic("TODO comptime anyframe->T to anyframe");
1242413556 }
1242513557
12426 IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope, source_instr->source_node,
12427 wanted_type, value, CastOpBitCast);
12428 result->value->type = wanted_type;
12429 return result;
13558 return ir_build_cast(ira, source_instr, wanted_type, value, CastOpBitCast);
1243013559}
1243113560
1243213561
12433static IrInstruction *ir_analyze_err_wrap_code(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,
13562static IrInstGen *ir_analyze_err_wrap_code(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value,
1243413563 ZigType *wanted_type, ResultLoc *result_loc)
1243513564{
1243613565 assert(wanted_type->id == ZigTypeIdErrorUnion);
1243713566
12438 IrInstruction *casted_value = ir_implicit_cast(ira, value, wanted_type->data.error_union.err_set_type);
13567 IrInstGen *casted_value = ir_implicit_cast(ira, value, wanted_type->data.error_union.err_set_type);
1243913568
1244013569 if (instr_is_comptime(casted_value)) {
1244113570 ZigValue *val = ir_resolve_const(ira, casted_value, UndefBad);
1244213571 if (!val)
12443 return ira->codegen->invalid_instruction;
13572 return ira->codegen->invalid_inst_gen;
1244413573
1244513574 ZigValue *err_set_val = create_const_vals(1);
1244613575 err_set_val->special = ConstValSpecialStatic;
1244713576 err_set_val->type = wanted_type->data.error_union.err_set_type;
1244813577 err_set_val->data.x_err_set = val->data.x_err_set;
1244913578
12450 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
13579 IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
1245113580 source_instr->scope, source_instr->source_node);
1245213581 const_instruction->base.value->type = wanted_type;
1245313582 const_instruction->base.value->special = ConstValSpecialStatic;
......@@ -12456,11 +13585,13 @@ static IrInstruction *ir_analyze_err_wrap_code(IrAnalyze *ira, IrInstruction *so
1245613585 return &const_instruction->base;
1245713586 }
1245813587
12459 IrInstruction *result_loc_inst;
13588 IrInstGen *result_loc_inst;
1246013589 if (handle_is_ptr(wanted_type)) {
1246113590 if (result_loc == nullptr) result_loc = no_result_loc();
12462 result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true, false, true);
12463 if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {
13591 result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true, true);
13592 if (type_is_invalid(result_loc_inst->value->type) ||
13593 result_loc_inst->value->type->id == ZigTypeIdUnreachable)
13594 {
1246413595 return result_loc_inst;
1246513596 }
1246613597 } else {
......@@ -12468,19 +13599,19 @@ static IrInstruction *ir_analyze_err_wrap_code(IrAnalyze *ira, IrInstruction *so
1246813599 }
1246913600
1247013601
12471 IrInstruction *result = ir_build_err_wrap_code(ira, source_instr, wanted_type, value, result_loc_inst);
13602 IrInstGen *result = ir_build_err_wrap_code(ira, source_instr, wanted_type, value, result_loc_inst);
1247213603 result->value->data.rh_error_union = RuntimeHintErrorUnionError;
1247313604 return result;
1247413605}
1247513606
12476static IrInstruction *ir_analyze_null_to_maybe(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value, ZigType *wanted_type) {
13607static IrInstGen *ir_analyze_null_to_maybe(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value, ZigType *wanted_type) {
1247713608 assert(wanted_type->id == ZigTypeIdOptional);
1247813609 assert(instr_is_comptime(value));
1247913610
1248013611 ZigValue *val = ir_resolve_const(ira, value, UndefBad);
1248113612 assert(val != nullptr);
1248213613
12483 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
13614 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1248413615 result->value->special = ConstValSpecialStatic;
1248513616 if (get_codegen_ptr_type(wanted_type) != nullptr) {
1248613617 result->value->data.x_ptr.special = ConstPtrSpecialNull;
......@@ -12492,8 +13623,8 @@ static IrInstruction *ir_analyze_null_to_maybe(IrAnalyze *ira, IrInstruction *so
1249213623 return result;
1249313624}
1249413625
12495static IrInstruction *ir_analyze_null_to_c_pointer(IrAnalyze *ira, IrInstruction *source_instr,
12496 IrInstruction *value, ZigType *wanted_type)
13626static IrInstGen *ir_analyze_null_to_c_pointer(IrAnalyze *ira, IrInst *source_instr,
13627 IrInstGen *value, ZigType *wanted_type)
1249713628{
1249813629 assert(wanted_type->id == ZigTypeIdPointer);
1249913630 assert(wanted_type->data.pointer.ptr_len == PtrLenC);
......@@ -12502,48 +13633,53 @@ static IrInstruction *ir_analyze_null_to_c_pointer(IrAnalyze *ira, IrInstruction
1250213633 ZigValue *val = ir_resolve_const(ira, value, UndefBad);
1250313634 assert(val != nullptr);
1250413635
12505 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
13636 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1250613637 result->value->data.x_ptr.special = ConstPtrSpecialNull;
1250713638 result->value->data.x_ptr.mut = ConstPtrMutComptimeConst;
1250813639 return result;
1250913640}
1251013641
12511static IrInstruction *ir_get_ref(IrAnalyze *ira, IrInstruction *source_instruction, IrInstruction *value,
12512 bool is_const, bool is_volatile)
13642static IrInstGen *ir_get_ref2(IrAnalyze *ira, IrInst* source_instruction, IrInstGen *value,
13643 ZigType *elem_type, bool is_const, bool is_volatile)
1251313644{
1251413645 Error err;
1251513646
12516 if (type_is_invalid(value->value->type))
12517 return ira->codegen->invalid_instruction;
13647 if (type_is_invalid(elem_type))
13648 return ira->codegen->invalid_inst_gen;
1251813649
1251913650 if (instr_is_comptime(value)) {
1252013651 ZigValue *val = ir_resolve_const(ira, value, LazyOk);
1252113652 if (!val)
12522 return ira->codegen->invalid_instruction;
12523 return ir_get_const_ptr(ira, source_instruction, val, value->value->type,
13653 return ira->codegen->invalid_inst_gen;
13654 return ir_get_const_ptr(ira, source_instruction, val, elem_type,
1252413655 ConstPtrMutComptimeConst, is_const, is_volatile, 0);
1252513656 }
1252613657
12527 ZigType *ptr_type = get_pointer_to_type_extra(ira->codegen, value->value->type,
13658 ZigType *ptr_type = get_pointer_to_type_extra(ira->codegen, elem_type,
1252813659 is_const, is_volatile, PtrLenSingle, 0, 0, 0, false);
1252913660
1253013661 if ((err = type_resolve(ira->codegen, ptr_type, ResolveStatusZeroBitsKnown)))
12531 return ira->codegen->invalid_instruction;
13662 return ira->codegen->invalid_inst_gen;
1253213663
12533 IrInstruction *result_loc;
12534 if (type_has_bits(ptr_type) && !handle_is_ptr(value->value->type)) {
12535 result_loc = ir_resolve_result(ira, source_instruction, no_result_loc(), value->value->type, nullptr, true,
12536 false, true);
13664 IrInstGen *result_loc;
13665 if (type_has_bits(ptr_type) && !handle_is_ptr(elem_type)) {
13666 result_loc = ir_resolve_result(ira, source_instruction, no_result_loc(), elem_type, nullptr, true, true);
1253713667 } else {
1253813668 result_loc = nullptr;
1253913669 }
1254013670
12541 IrInstruction *new_instruction = ir_build_ref_gen(ira, source_instruction, ptr_type, value, result_loc);
13671 IrInstGen *new_instruction = ir_build_ref_gen(ira, source_instruction, ptr_type, value, result_loc);
1254213672 new_instruction->value->data.rh_ptr = RuntimeHintPtrStack;
1254313673 return new_instruction;
1254413674}
1254513675
12546static ZigType *ir_resolve_union_tag_type(IrAnalyze *ira, IrInstruction *source_instr, ZigType *union_type) {
13676static IrInstGen *ir_get_ref(IrAnalyze *ira, IrInst* source_instruction, IrInstGen *value,
13677 bool is_const, bool is_volatile)
13678{
13679 return ir_get_ref2(ira, source_instruction, value, value->value->type, is_const, is_volatile);
13680}
13681
13682static ZigType *ir_resolve_union_tag_type(IrAnalyze *ira, AstNode *source_node, ZigType *union_type) {
1254713683 assert(union_type->id == ZigTypeIdUnion);
1254813684
1254913685 Error err;
......@@ -12555,36 +13691,36 @@ static ZigType *ir_resolve_union_tag_type(IrAnalyze *ira, IrInstruction *source_
1255513691 assert(union_type->data.unionation.tag_type != nullptr);
1255613692 return union_type->data.unionation.tag_type;
1255713693 } else {
12558 ErrorMsg *msg = ir_add_error(ira, source_instr, buf_sprintf("union '%s' has no tag",
13694 ErrorMsg *msg = ir_add_error_node(ira, source_node, buf_sprintf("union '%s' has no tag",
1255913695 buf_ptr(&union_type->name)));
1256013696 add_error_note(ira->codegen, msg, decl_node, buf_sprintf("consider 'union(enum)' here"));
1256113697 return ira->codegen->builtin_types.entry_invalid;
1256213698 }
1256313699}
1256413700
12565static IrInstruction *ir_analyze_enum_to_int(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target) {
13701static IrInstGen *ir_analyze_enum_to_int(IrAnalyze *ira, IrInst *source_instr, IrInstGen *target) {
1256613702 Error err;
1256713703
12568 IrInstruction *enum_target;
13704 IrInstGen *enum_target;
1256913705 ZigType *enum_type;
1257013706 if (target->value->type->id == ZigTypeIdUnion) {
12571 enum_type = ir_resolve_union_tag_type(ira, target, target->value->type);
13707 enum_type = ir_resolve_union_tag_type(ira, target->base.source_node, target->value->type);
1257213708 if (type_is_invalid(enum_type))
12573 return ira->codegen->invalid_instruction;
13709 return ira->codegen->invalid_inst_gen;
1257413710 enum_target = ir_implicit_cast(ira, target, enum_type);
1257513711 if (type_is_invalid(enum_target->value->type))
12576 return ira->codegen->invalid_instruction;
13712 return ira->codegen->invalid_inst_gen;
1257713713 } else if (target->value->type->id == ZigTypeIdEnum) {
1257813714 enum_target = target;
1257913715 enum_type = target->value->type;
1258013716 } else {
12581 ir_add_error(ira, target,
13717 ir_add_error_node(ira, target->base.source_node,
1258213718 buf_sprintf("expected enum, found type '%s'", buf_ptr(&target->value->type->name)));
12583 return ira->codegen->invalid_instruction;
13719 return ira->codegen->invalid_inst_gen;
1258413720 }
1258513721
1258613722 if ((err = type_resolve(ira->codegen, enum_type, ResolveStatusSizeKnown)))
12587 return ira->codegen->invalid_instruction;
13723 return ira->codegen->invalid_inst_gen;
1258813724
1258913725 ZigType *tag_type = enum_type->data.enumeration.tag_int_type;
1259013726 assert(tag_type->id == ZigTypeIdInt || tag_type->id == ZigTypeIdComptimeInt);
......@@ -12593,7 +13729,7 @@ static IrInstruction *ir_analyze_enum_to_int(IrAnalyze *ira, IrInstruction *sour
1259313729 if (enum_type->data.enumeration.layout == ContainerLayoutAuto &&
1259413730 enum_type->data.enumeration.src_field_count == 1)
1259513731 {
12596 IrInstruction *result = ir_const(ira, source_instr, tag_type);
13732 IrInstGen *result = ir_const(ira, source_instr, tag_type);
1259713733 init_const_bigint(result->value, tag_type,
1259813734 &enum_type->data.enumeration.fields[0].value);
1259913735 return result;
......@@ -12602,20 +13738,17 @@ static IrInstruction *ir_analyze_enum_to_int(IrAnalyze *ira, IrInstruction *sour
1260213738 if (instr_is_comptime(enum_target)) {
1260313739 ZigValue *val = ir_resolve_const(ira, enum_target, UndefBad);
1260413740 if (!val)
12605 return ira->codegen->invalid_instruction;
12606 IrInstruction *result = ir_const(ira, source_instr, tag_type);
13741 return ira->codegen->invalid_inst_gen;
13742 IrInstGen *result = ir_const(ira, source_instr, tag_type);
1260713743 init_const_bigint(result->value, tag_type, &val->data.x_enum_tag);
1260813744 return result;
1260913745 }
1261013746
12611 IrInstruction *result = ir_build_widen_or_shorten(&ira->new_irb, source_instr->scope,
12612 source_instr->source_node, enum_target);
12613 result->value->type = tag_type;
12614 return result;
13747 return ir_build_widen_or_shorten(ira, source_instr->scope, source_instr->source_node, enum_target, tag_type);
1261513748}
1261613749
12617static IrInstruction *ir_analyze_union_to_tag(IrAnalyze *ira, IrInstruction *source_instr,
12618 IrInstruction *target, ZigType *wanted_type)
13750static IrInstGen *ir_analyze_union_to_tag(IrAnalyze *ira, IrInst* source_instr,
13751 IrInstGen *target, ZigType *wanted_type)
1261913752{
1262013753 assert(target->value->type->id == ZigTypeIdUnion);
1262113754 assert(wanted_type->id == ZigTypeIdEnum);
......@@ -12624,8 +13757,8 @@ static IrInstruction *ir_analyze_union_to_tag(IrAnalyze *ira, IrInstruction *sou
1262413757 if (instr_is_comptime(target)) {
1262513758 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
1262613759 if (!val)
12627 return ira->codegen->invalid_instruction;
12628 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
13760 return ira->codegen->invalid_inst_gen;
13761 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1262913762 result->value->special = ConstValSpecialStatic;
1263013763 result->value->type = wanted_type;
1263113764 bigint_init_bigint(&result->value->data.x_enum_tag, &val->data.x_union.tag);
......@@ -12636,7 +13769,7 @@ static IrInstruction *ir_analyze_union_to_tag(IrAnalyze *ira, IrInstruction *sou
1263613769 if (wanted_type->data.enumeration.layout == ContainerLayoutAuto &&
1263713770 wanted_type->data.enumeration.src_field_count == 1)
1263813771 {
12639 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
13772 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1264013773 result->value->special = ConstValSpecialStatic;
1264113774 result->value->type = wanted_type;
1264213775 TypeEnumField *enum_field = target->value->type->data.unionation.fields[0].enum_field;
......@@ -12644,48 +13777,45 @@ static IrInstruction *ir_analyze_union_to_tag(IrAnalyze *ira, IrInstruction *sou
1264413777 return result;
1264513778 }
1264613779
12647 IrInstruction *result = ir_build_union_tag(&ira->new_irb, source_instr->scope,
12648 source_instr->source_node, target);
12649 result->value->type = wanted_type;
12650 return result;
13780 return ir_build_union_tag(ira, source_instr, target, wanted_type);
1265113781}
1265213782
12653static IrInstruction *ir_analyze_undefined_to_anything(IrAnalyze *ira, IrInstruction *source_instr,
12654 IrInstruction *target, ZigType *wanted_type)
13783static IrInstGen *ir_analyze_undefined_to_anything(IrAnalyze *ira, IrInst* source_instr,
13784 IrInstGen *target, ZigType *wanted_type)
1265513785{
12656 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
13786 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1265713787 result->value->special = ConstValSpecialUndef;
1265813788 return result;
1265913789}
1266013790
12661static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *source_instr,
12662 IrInstruction *uncasted_target, ZigType *wanted_type)
13791static IrInstGen *ir_analyze_enum_to_union(IrAnalyze *ira, IrInst* source_instr,
13792 IrInstGen *uncasted_target, ZigType *wanted_type)
1266313793{
1266413794 Error err;
1266513795 assert(wanted_type->id == ZigTypeIdUnion);
1266613796
1266713797 if ((err = type_resolve(ira->codegen, wanted_type, ResolveStatusZeroBitsKnown)))
12668 return ira->codegen->invalid_instruction;
13798 return ira->codegen->invalid_inst_gen;
1266913799
12670 IrInstruction *target = ir_implicit_cast(ira, uncasted_target, wanted_type->data.unionation.tag_type);
13800 IrInstGen *target = ir_implicit_cast(ira, uncasted_target, wanted_type->data.unionation.tag_type);
1267113801 if (type_is_invalid(target->value->type))
12672 return ira->codegen->invalid_instruction;
13802 return ira->codegen->invalid_inst_gen;
1267313803
1267413804 if (instr_is_comptime(target)) {
1267513805 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
1267613806 if (!val)
12677 return ira->codegen->invalid_instruction;
13807 return ira->codegen->invalid_inst_gen;
1267813808 TypeUnionField *union_field = find_union_field_by_tag(wanted_type, &val->data.x_enum_tag);
1267913809 assert(union_field != nullptr);
1268013810 ZigType *field_type = resolve_union_field_type(ira->codegen, union_field);
1268113811 if (field_type == nullptr)
12682 return ira->codegen->invalid_instruction;
13812 return ira->codegen->invalid_inst_gen;
1268313813 if ((err = type_resolve(ira->codegen, field_type, ResolveStatusZeroBitsKnown)))
12684 return ira->codegen->invalid_instruction;
13814 return ira->codegen->invalid_inst_gen;
1268513815
1268613816 switch (type_has_one_possible_value(ira->codegen, field_type)) {
1268713817 case OnePossibleValueInvalid:
12688 return ira->codegen->invalid_instruction;
13818 return ira->codegen->invalid_inst_gen;
1268913819 case OnePossibleValueNo: {
1269013820 AstNode *field_node = wanted_type->data.unionation.decl_node->data.container_decl.fields.at(
1269113821 union_field->enum_field->decl_index);
......@@ -12696,13 +13826,13 @@ static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *so
1269613826 buf_ptr(union_field->name)));
1269713827 add_error_note(ira->codegen, msg, field_node,
1269813828 buf_sprintf("field '%s' declared here", buf_ptr(union_field->name)));
12699 return ira->codegen->invalid_instruction;
13829 return ira->codegen->invalid_inst_gen;
1270013830 }
1270113831 case OnePossibleValueYes:
1270213832 break;
1270313833 }
1270413834
12705 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
13835 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1270613836 result->value->special = ConstValSpecialStatic;
1270713837 result->value->type = wanted_type;
1270813838 bigint_init_bigint(&result->value->data.x_union.tag, &val->data.x_enum_tag);
......@@ -12715,9 +13845,7 @@ static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *so
1271513845 // if the union has all fields 0 bits, we can do it
1271613846 // and in fact it's a noop cast because the union value is just the enum value
1271713847 if (wanted_type->data.unionation.gen_field_count == 0) {
12718 IrInstruction *result = ir_build_cast(&ira->new_irb, target->scope, target->source_node, wanted_type, target, CastOpNoop);
12719 result->value->type = wanted_type;
12720 return result;
13848 return ir_build_cast(ira, &target->base, wanted_type, target, CastOpNoop);
1272113849 }
1272213850
1272313851 ErrorMsg *msg = ir_add_error(ira, source_instr,
......@@ -12727,10 +13855,10 @@ static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *so
1272713855 TypeUnionField *union_field = &wanted_type->data.unionation.fields[i];
1272813856 ZigType *field_type = resolve_union_field_type(ira->codegen, union_field);
1272913857 if (field_type == nullptr)
12730 return ira->codegen->invalid_instruction;
13858 return ira->codegen->invalid_inst_gen;
1273113859 bool has_bits;
1273213860 if ((err = type_has_bits2(ira->codegen, field_type, &has_bits)))
12733 return ira->codegen->invalid_instruction;
13861 return ira->codegen->invalid_inst_gen;
1273413862 if (has_bits) {
1273513863 AstNode *field_node = wanted_type->data.unionation.decl_node->data.container_decl.fields.at(i);
1273613864 add_error_note(ira->codegen, msg, field_node,
......@@ -12739,23 +13867,23 @@ static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *so
1273913867 buf_ptr(&field_type->name)));
1274013868 }
1274113869 }
12742 return ira->codegen->invalid_instruction;
13870 return ira->codegen->invalid_inst_gen;
1274313871}
1274413872
12745static IrInstruction *ir_analyze_widen_or_shorten(IrAnalyze *ira, IrInstruction *source_instr,
12746 IrInstruction *target, ZigType *wanted_type)
13873static IrInstGen *ir_analyze_widen_or_shorten(IrAnalyze *ira, IrInst* source_instr,
13874 IrInstGen *target, ZigType *wanted_type)
1274713875{
1274813876 assert(wanted_type->id == ZigTypeIdInt || wanted_type->id == ZigTypeIdFloat);
1274913877
1275013878 if (instr_is_comptime(target)) {
1275113879 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
1275213880 if (!val)
12753 return ira->codegen->invalid_instruction;
13881 return ira->codegen->invalid_inst_gen;
1275413882 if (wanted_type->id == ZigTypeIdInt) {
1275513883 if (bigint_cmp_zero(&val->data.x_bigint) == CmpLT && !wanted_type->data.integral.is_signed) {
1275613884 ir_add_error(ira, source_instr,
1275713885 buf_sprintf("attempt to cast negative value to unsigned integer"));
12758 return ira->codegen->invalid_instruction;
13886 return ira->codegen->invalid_inst_gen;
1275913887 }
1276013888 if (!bigint_fits_in_bits(&val->data.x_bigint, wanted_type->data.integral.bit_count,
1276113889 wanted_type->data.integral.is_signed))
......@@ -12763,10 +13891,10 @@ static IrInstruction *ir_analyze_widen_or_shorten(IrAnalyze *ira, IrInstruction
1276313891 ir_add_error(ira, source_instr,
1276413892 buf_sprintf("cast from '%s' to '%s' truncates bits",
1276513893 buf_ptr(&target->value->type->name), buf_ptr(&wanted_type->name)));
12766 return ira->codegen->invalid_instruction;
13894 return ira->codegen->invalid_inst_gen;
1276713895 }
1276813896 }
12769 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
13897 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1277013898 result->value->type = wanted_type;
1277113899 if (wanted_type->id == ZigTypeIdInt) {
1277213900 bigint_init_bigint(&result->value->data.x_bigint, &val->data.x_bigint);
......@@ -12783,19 +13911,16 @@ static IrInstruction *ir_analyze_widen_or_shorten(IrAnalyze *ira, IrInstruction
1278313911 assert(wanted_type->id == ZigTypeIdInt);
1278413912 assert(type_has_bits(target->value->type));
1278513913 ir_build_assert_zero(ira, source_instr, target);
12786 IrInstruction *result = ir_const_unsigned(ira, source_instr, 0);
13914 IrInstGen *result = ir_const_unsigned(ira, source_instr, 0);
1278713915 result->value->type = wanted_type;
1278813916 return result;
1278913917 }
1279013918
12791 IrInstruction *result = ir_build_widen_or_shorten(&ira->new_irb, source_instr->scope,
12792 source_instr->source_node, target);
12793 result->value->type = wanted_type;
12794 return result;
13919 return ir_build_widen_or_shorten(ira, source_instr->scope, source_instr->source_node, target, wanted_type);
1279513920}
1279613921
12797static IrInstruction *ir_analyze_int_to_enum(IrAnalyze *ira, IrInstruction *source_instr,
12798 IrInstruction *target, ZigType *wanted_type)
13922static IrInstGen *ir_analyze_int_to_enum(IrAnalyze *ira, IrInst* source_instr,
13923 IrInstGen *target, ZigType *wanted_type)
1279913924{
1280013925 Error err;
1280113926 assert(wanted_type->id == ZigTypeIdEnum);
......@@ -12803,14 +13928,14 @@ static IrInstruction *ir_analyze_int_to_enum(IrAnalyze *ira, IrInstruction *sour
1280313928 ZigType *actual_type = target->value->type;
1280413929
1280513930 if ((err = type_resolve(ira->codegen, wanted_type, ResolveStatusSizeKnown)))
12806 return ira->codegen->invalid_instruction;
13931 return ira->codegen->invalid_inst_gen;
1280713932
1280813933 if (actual_type != wanted_type->data.enumeration.tag_int_type) {
1280913934 ir_add_error(ira, source_instr,
1281013935 buf_sprintf("integer to enum cast from '%s' instead of its tag type, '%s'",
1281113936 buf_ptr(&actual_type->name),
1281213937 buf_ptr(&wanted_type->data.enumeration.tag_int_type->name)));
12813 return ira->codegen->invalid_instruction;
13938 return ira->codegen->invalid_inst_gen;
1281413939 }
1281513940
1281613941 assert(actual_type->id == ZigTypeIdInt || actual_type->id == ZigTypeIdComptimeInt);
......@@ -12818,7 +13943,7 @@ static IrInstruction *ir_analyze_int_to_enum(IrAnalyze *ira, IrInstruction *sour
1281813943 if (instr_is_comptime(target)) {
1281913944 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
1282013945 if (!val)
12821 return ira->codegen->invalid_instruction;
13946 return ira->codegen->invalid_inst_gen;
1282213947
1282313948 TypeEnumField *field = find_enum_field_by_tag(wanted_type, &val->data.x_bigint);
1282413949 if (field == nullptr && !wanted_type->data.enumeration.non_exhaustive) {
......@@ -12829,28 +13954,25 @@ static IrInstruction *ir_analyze_int_to_enum(IrAnalyze *ira, IrInstruction *sour
1282913954 buf_ptr(&wanted_type->name), buf_ptr(val_buf)));
1283013955 add_error_note(ira->codegen, msg, wanted_type->data.enumeration.decl_node,
1283113956 buf_sprintf("'%s' declared here", buf_ptr(&wanted_type->name)));
12832 return ira->codegen->invalid_instruction;
13957 return ira->codegen->invalid_inst_gen;
1283313958 }
1283413959
12835 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
13960 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1283613961 bigint_init_bigint(&result->value->data.x_enum_tag, &val->data.x_bigint);
1283713962 return result;
1283813963 }
1283913964
12840 IrInstruction *result = ir_build_int_to_enum(&ira->new_irb, source_instr->scope,
12841 source_instr->source_node, nullptr, target);
12842 result->value->type = wanted_type;
12843 return result;
13965 return ir_build_int_to_enum_gen(ira, source_instr->scope, source_instr->source_node, wanted_type, target);
1284413966}
1284513967
12846static IrInstruction *ir_analyze_number_to_literal(IrAnalyze *ira, IrInstruction *source_instr,
12847 IrInstruction *target, ZigType *wanted_type)
13968static IrInstGen *ir_analyze_number_to_literal(IrAnalyze *ira, IrInst* source_instr,
13969 IrInstGen *target, ZigType *wanted_type)
1284813970{
1284913971 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
1285013972 if (!val)
12851 return ira->codegen->invalid_instruction;
13973 return ira->codegen->invalid_inst_gen;
1285213974
12853 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
13975 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1285413976 if (wanted_type->id == ZigTypeIdComptimeFloat) {
1285513977 float_init_float(result->value, val);
1285613978 } else if (wanted_type->id == ZigTypeIdComptimeInt) {
......@@ -12861,7 +13983,7 @@ static IrInstruction *ir_analyze_number_to_literal(IrAnalyze *ira, IrInstruction
1286113983 return result;
1286213984}
1286313985
12864static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target,
13986static IrInstGen *ir_analyze_int_to_err(IrAnalyze *ira, IrInst* source_instr, IrInstGen *target,
1286513987 ZigType *wanted_type)
1286613988{
1286713989 assert(target->value->type->id == ZigTypeIdInt);
......@@ -12871,12 +13993,12 @@ static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *sourc
1287113993 if (instr_is_comptime(target)) {
1287213994 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
1287313995 if (!val)
12874 return ira->codegen->invalid_instruction;
13996 return ira->codegen->invalid_inst_gen;
1287513997
12876 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
13998 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1287713999
1287814000 if (!resolve_inferred_error_set(ira->codegen, wanted_type, source_instr->source_node)) {
12879 return ira->codegen->invalid_instruction;
14001 return ira->codegen->invalid_inst_gen;
1288014002 }
1288114003
1288214004 if (type_is_global_error_set(wanted_type)) {
......@@ -12888,7 +14010,7 @@ static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *sourc
1288814010 bigint_append_buf(val_buf, &val->data.x_bigint, 10);
1288914011 ir_add_error(ira, source_instr,
1289014012 buf_sprintf("integer value %s represents no error", buf_ptr(val_buf)));
12891 return ira->codegen->invalid_instruction;
14013 return ira->codegen->invalid_inst_gen;
1289214014 }
1289314015
1289414016 size_t index = bigint_as_usize(&val->data.x_bigint);
......@@ -12912,7 +14034,7 @@ static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *sourc
1291214034 bigint_append_buf(val_buf, &val->data.x_bigint, 10);
1291314035 ir_add_error(ira, source_instr,
1291414036 buf_sprintf("integer value %s represents no error in '%s'", buf_ptr(val_buf), buf_ptr(&wanted_type->name)));
12915 return ira->codegen->invalid_instruction;
14037 return ira->codegen->invalid_inst_gen;
1291614038 }
1291714039
1291814040 result->value->data.x_err_set = err;
......@@ -12920,12 +14042,10 @@ static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *sourc
1292014042 }
1292114043 }
1292214044
12923 IrInstruction *result = ir_build_int_to_err(&ira->new_irb, source_instr->scope, source_instr->source_node, target);
12924 result->value->type = wanted_type;
12925 return result;
14045 return ir_build_int_to_err_gen(ira, source_instr->scope, source_instr->source_node, target, wanted_type);
1292614046}
1292714047
12928static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target,
14048static IrInstGen *ir_analyze_err_to_int(IrAnalyze *ira, IrInst* source_instr, IrInstGen *target,
1292914049 ZigType *wanted_type)
1293014050{
1293114051 assert(wanted_type->id == ZigTypeIdInt);
......@@ -12935,9 +14055,9 @@ static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *sourc
1293514055 if (instr_is_comptime(target)) {
1293614056 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
1293714057 if (!val)
12938 return ira->codegen->invalid_instruction;
14058 return ira->codegen->invalid_inst_gen;
1293914059
12940 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
14060 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1294114061
1294214062 ErrorTableEntry *err;
1294314063 if (err_type->id == ZigTypeIdErrorUnion) {
......@@ -12957,7 +14077,7 @@ static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *sourc
1295714077 ir_add_error_node(ira, source_instr->source_node,
1295814078 buf_sprintf("error code '%s' does not fit in '%s'",
1295914079 buf_ptr(&err->name), buf_ptr(&wanted_type->name)));
12960 return ira->codegen->invalid_instruction;
14080 return ira->codegen->invalid_inst_gen;
1296114081 }
1296214082
1296314083 return result;
......@@ -12973,14 +14093,14 @@ static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *sourc
1297314093 }
1297414094 if (!type_is_global_error_set(err_set_type)) {
1297514095 if (!resolve_inferred_error_set(ira->codegen, err_set_type, source_instr->source_node)) {
12976 return ira->codegen->invalid_instruction;
14096 return ira->codegen->invalid_inst_gen;
1297714097 }
1297814098 if (err_set_type->data.error_set.err_count == 0) {
12979 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
14099 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1298014100 bigint_init_unsigned(&result->value->data.x_bigint, 0);
1298114101 return result;
1298214102 } else if (err_set_type->data.error_set.err_count == 1) {
12983 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
14103 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1298414104 ErrorTableEntry *err = err_set_type->data.error_set.errors[0];
1298514105 bigint_init_unsigned(&result->value->data.x_bigint, err->value);
1298614106 return result;
......@@ -12992,21 +14112,19 @@ static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *sourc
1299214112 if (!bigint_fits_in_bits(&bn, wanted_type->data.integral.bit_count, wanted_type->data.integral.is_signed)) {
1299314113 ir_add_error_node(ira, source_instr->source_node,
1299414114 buf_sprintf("too many error values to fit in '%s'", buf_ptr(&wanted_type->name)));
12995 return ira->codegen->invalid_instruction;
14115 return ira->codegen->invalid_inst_gen;
1299614116 }
1299714117
12998 IrInstruction *result = ir_build_err_to_int(&ira->new_irb, source_instr->scope, source_instr->source_node, target);
12999 result->value->type = wanted_type;
13000 return result;
14118 return ir_build_err_to_int_gen(ira, source_instr->scope, source_instr->source_node, target, wanted_type);
1300114119}
1300214120
13003static IrInstruction *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target,
14121static IrInstGen *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInst* source_instr, IrInstGen *target,
1300414122 ZigType *wanted_type)
1300514123{
1300614124 assert(wanted_type->id == ZigTypeIdPointer);
1300714125 Error err;
1300814126 if ((err = type_resolve(ira->codegen, target->value->type->data.pointer.child_type, ResolveStatusAlignmentKnown)))
13009 return ira->codegen->invalid_instruction;
14127 return ira->codegen->invalid_inst_gen;
1301014128 assert((wanted_type->data.pointer.is_const && target->value->type->data.pointer.is_const) || !target->value->type->data.pointer.is_const);
1301114129 wanted_type = adjust_ptr_align(ira->codegen, wanted_type, get_ptr_align(ira->codegen, target->value->type));
1301214130 ZigType *array_type = wanted_type->data.pointer.child_type;
......@@ -13016,12 +14134,12 @@ static IrInstruction *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInstruction *sou
1301614134 if (instr_is_comptime(target)) {
1301714135 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
1301814136 if (!val)
13019 return ira->codegen->invalid_instruction;
14137 return ira->codegen->invalid_inst_gen;
1302014138
1302114139 assert(val->type->id == ZigTypeIdPointer);
1302214140 ZigValue *pointee = const_ptr_pointee(ira, ira->codegen, val, source_instr->source_node);
1302314141 if (pointee == nullptr)
13024 return ira->codegen->invalid_instruction;
14142 return ira->codegen->invalid_inst_gen;
1302514143 if (pointee->special != ConstValSpecialRuntime) {
1302614144 ZigValue *array_val = create_const_vals(1);
1302714145 array_val->special = ConstValSpecialStatic;
......@@ -13031,7 +14149,7 @@ static IrInstruction *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInstruction *sou
1303114149 array_val->parent.id = ConstParentIdScalar;
1303214150 array_val->parent.data.p_scalar.scalar_val = pointee;
1303314151
13034 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
14152 IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
1303514153 source_instr->scope, source_instr->source_node);
1303614154 const_instruction->base.value->type = wanted_type;
1303714155 const_instruction->base.value->special = ConstValSpecialStatic;
......@@ -13043,10 +14161,7 @@ static IrInstruction *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInstruction *sou
1304314161 }
1304414162
1304514163 // pointer to array and pointer to single item are represented the same way at runtime
13046 IrInstruction *result = ir_build_cast(&ira->new_irb, target->scope, target->source_node,
13047 wanted_type, target, CastOpBitCast);
13048 result->value->type = wanted_type;
13049 return result;
14164 return ir_build_cast(ira, &target->base, wanted_type, target, CastOpBitCast);
1305014165}
1305114166
1305214167static void report_recursive_error(IrAnalyze *ira, AstNode *source_node, ConstCastOnly *cast_result,
......@@ -13234,12 +14349,12 @@ static void report_recursive_error(IrAnalyze *ira, AstNode *source_node, ConstCa
1323414349 }
1323514350}
1323614351
13237static IrInstruction *ir_analyze_array_to_vector(IrAnalyze *ira, IrInstruction *source_instr,
13238 IrInstruction *array, ZigType *vector_type)
14352static IrInstGen *ir_analyze_array_to_vector(IrAnalyze *ira, IrInst* source_instr,
14353 IrInstGen *array, ZigType *vector_type)
1323914354{
1324014355 if (instr_is_comptime(array)) {
1324114356 // arrays and vectors have the same ZigValue representation
13242 IrInstruction *result = ir_const(ira, source_instr, vector_type);
14357 IrInstGen *result = ir_const(ira, source_instr, vector_type);
1324314358 copy_const_val(result->value, array->value);
1324414359 result->value->type = vector_type;
1324514360 return result;
......@@ -13247,12 +14362,12 @@ static IrInstruction *ir_analyze_array_to_vector(IrAnalyze *ira, IrInstruction *
1324714362 return ir_build_array_to_vector(ira, source_instr, array, vector_type);
1324814363}
1324914364
13250static IrInstruction *ir_analyze_vector_to_array(IrAnalyze *ira, IrInstruction *source_instr,
13251 IrInstruction *vector, ZigType *array_type, ResultLoc *result_loc)
14365static IrInstGen *ir_analyze_vector_to_array(IrAnalyze *ira, IrInst* source_instr,
14366 IrInstGen *vector, ZigType *array_type, ResultLoc *result_loc)
1325214367{
1325314368 if (instr_is_comptime(vector)) {
1325414369 // arrays and vectors have the same ZigValue representation
13255 IrInstruction *result = ir_const(ira, source_instr, array_type);
14370 IrInstGen *result = ir_const(ira, source_instr, array_type);
1325614371 copy_const_val(result->value, vector->value);
1325714372 result->value->type = array_type;
1325814373 return result;
......@@ -13260,18 +14375,17 @@ static IrInstruction *ir_analyze_vector_to_array(IrAnalyze *ira, IrInstruction *
1326014375 if (result_loc == nullptr) {
1326114376 result_loc = no_result_loc();
1326214377 }
13263 IrInstruction *result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, array_type, nullptr,
13264 true, false, true);
13265 if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {
14378 IrInstGen *result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, array_type, nullptr, true, true);
14379 if (type_is_invalid(result_loc_inst->value->type) || result_loc_inst->value->type->id == ZigTypeIdUnreachable) {
1326614380 return result_loc_inst;
1326714381 }
1326814382 return ir_build_vector_to_array(ira, source_instr, array_type, vector, result_loc_inst);
1326914383}
1327014384
13271static IrInstruction *ir_analyze_int_to_c_ptr(IrAnalyze *ira, IrInstruction *source_instr,
13272 IrInstruction *integer, ZigType *dest_type)
14385static IrInstGen *ir_analyze_int_to_c_ptr(IrAnalyze *ira, IrInst* source_instr,
14386 IrInstGen *integer, ZigType *dest_type)
1327314387{
13274 IrInstruction *unsigned_integer;
14388 IrInstGen *unsigned_integer;
1327514389 if (instr_is_comptime(integer)) {
1327614390 unsigned_integer = integer;
1327714391 } else {
......@@ -13284,7 +14398,7 @@ static IrInstruction *ir_analyze_int_to_c_ptr(IrAnalyze *ira, IrInstruction *sou
1328414398 buf_sprintf("integer type '%s' too big for implicit @intToPtr to type '%s'",
1328514399 buf_ptr(&integer->value->type->name),
1328614400 buf_ptr(&dest_type->name)));
13287 return ira->codegen->invalid_instruction;
14401 return ira->codegen->invalid_inst_gen;
1328814402 }
1328914403
1329014404 if (integer->value->type->data.integral.is_signed) {
......@@ -13292,7 +14406,7 @@ static IrInstruction *ir_analyze_int_to_c_ptr(IrAnalyze *ira, IrInstruction *sou
1329214406 integer->value->type->data.integral.bit_count);
1329314407 unsigned_integer = ir_analyze_bit_cast(ira, source_instr, integer, unsigned_int_type);
1329414408 if (type_is_invalid(unsigned_integer->value->type))
13295 return ira->codegen->invalid_instruction;
14409 return ira->codegen->invalid_inst_gen;
1329614410 } else {
1329714411 unsigned_integer = integer;
1329814412 }
......@@ -13312,14 +14426,14 @@ static bool is_pointery_and_elem_is_not_pointery(ZigType *ty) {
1331214426 return false;
1331314427}
1331414428
13315static IrInstruction *ir_analyze_enum_literal(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,
14429static IrInstGen *ir_analyze_enum_literal(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value,
1331614430 ZigType *enum_type)
1331714431{
1331814432 assert(enum_type->id == ZigTypeIdEnum);
1331914433
1332014434 Error err;
1332114435 if ((err = type_resolve(ira->codegen, enum_type, ResolveStatusZeroBitsKnown)))
13322 return ira->codegen->invalid_instruction;
14436 return ira->codegen->invalid_inst_gen;
1332314437
1332414438 TypeEnumField *field = find_enum_type_field(enum_type, value->value->data.x_enum_literal);
1332514439 if (field == nullptr) {
......@@ -13327,40 +14441,40 @@ static IrInstruction *ir_analyze_enum_literal(IrAnalyze *ira, IrInstruction *sou
1332714441 buf_ptr(&enum_type->name), buf_ptr(value->value->data.x_enum_literal)));
1332814442 add_error_note(ira->codegen, msg, enum_type->data.enumeration.decl_node,
1332914443 buf_sprintf("'%s' declared here", buf_ptr(&enum_type->name)));
13330 return ira->codegen->invalid_instruction;
14444 return ira->codegen->invalid_inst_gen;
1333114445 }
13332 IrInstruction *result = ir_const(ira, source_instr, enum_type);
14446 IrInstGen *result = ir_const(ira, source_instr, enum_type);
1333314447 bigint_init_bigint(&result->value->data.x_enum_tag, &field->value);
1333414448
1333514449 return result;
1333614450}
1333714451
13338static IrInstruction *ir_analyze_struct_literal_to_array(IrAnalyze *ira, IrInstruction *source_instr,
13339 IrInstruction *value, ZigType *wanted_type)
14452static IrInstGen *ir_analyze_struct_literal_to_array(IrAnalyze *ira, IrInst* source_instr,
14453 IrInstGen *value, ZigType *wanted_type)
1334014454{
1334114455 ir_add_error(ira, source_instr, buf_sprintf("TODO: type coercion of anon list literal to array"));
13342 return ira->codegen->invalid_instruction;
14456 return ira->codegen->invalid_inst_gen;
1334314457}
1334414458
13345static IrInstruction *ir_analyze_struct_literal_to_struct(IrAnalyze *ira, IrInstruction *source_instr,
13346 IrInstruction *value, ZigType *wanted_type)
14459static IrInstGen *ir_analyze_struct_literal_to_struct(IrAnalyze *ira, IrInst* source_instr,
14460 IrInstGen *value, ZigType *wanted_type)
1334714461{
1334814462 ir_add_error(ira, source_instr, buf_sprintf("TODO: type coercion of anon struct literal to struct"));
13349 return ira->codegen->invalid_instruction;
14463 return ira->codegen->invalid_inst_gen;
1335014464}
1335114465
13352static IrInstruction *ir_analyze_struct_literal_to_union(IrAnalyze *ira, IrInstruction *source_instr,
13353 IrInstruction *value, ZigType *wanted_type)
14466static IrInstGen *ir_analyze_struct_literal_to_union(IrAnalyze *ira, IrInst* source_instr,
14467 IrInstGen *value, ZigType *wanted_type)
1335414468{
1335514469 ir_add_error(ira, source_instr, buf_sprintf("TODO: type coercion of anon struct literal to union"));
13356 return ira->codegen->invalid_instruction;
14470 return ira->codegen->invalid_inst_gen;
1335714471}
1335814472
1335914473// Add a compile error and return ErrorSemanticAnalyzeFail if the pointer alignment does not work,
1336014474// otherwise return ErrorNone. Does not emit any instructions.
1336114475// Assumes that the pointer types have element types with the same ABI alignment. Avoids resolving the
1336214476// pointer types' alignments if both of the pointer types are ABI aligned.
13363static Error ir_cast_ptr_align(IrAnalyze *ira, IrInstruction *source_instr, ZigType *dest_ptr_type,
14477static Error ir_cast_ptr_align(IrAnalyze *ira, IrInst* source_instr, ZigType *dest_ptr_type,
1336414478 ZigType *src_ptr_type, AstNode *src_source_node)
1336514479{
1336614480 Error err;
......@@ -13394,37 +14508,37 @@ static Error ir_cast_ptr_align(IrAnalyze *ira, IrInstruction *source_instr, ZigT
1339414508 return ErrorNone;
1339514509}
1339614510
13397static IrInstruction *ir_analyze_struct_value_field_value(IrAnalyze *ira, IrInstruction *source_instr,
13398 IrInstruction *struct_operand, TypeStructField *field)
14511static IrInstGen *ir_analyze_struct_value_field_value(IrAnalyze *ira, IrInst* source_instr,
14512 IrInstGen *struct_operand, TypeStructField *field)
1339914513{
13400 IrInstruction *struct_ptr = ir_get_ref(ira, source_instr, struct_operand, true, false);
14514 IrInstGen *struct_ptr = ir_get_ref(ira, source_instr, struct_operand, true, false);
1340114515 if (type_is_invalid(struct_ptr->value->type))
13402 return ira->codegen->invalid_instruction;
13403 IrInstruction *field_ptr = ir_analyze_struct_field_ptr(ira, source_instr, field, struct_ptr,
14516 return ira->codegen->invalid_inst_gen;
14517 IrInstGen *field_ptr = ir_analyze_struct_field_ptr(ira, source_instr, field, struct_ptr,
1340414518 struct_operand->value->type, false);
1340514519 if (type_is_invalid(field_ptr->value->type))
13406 return ira->codegen->invalid_instruction;
14520 return ira->codegen->invalid_inst_gen;
1340714521 return ir_get_deref(ira, source_instr, field_ptr, nullptr);
1340814522}
1340914523
13410static IrInstruction *ir_analyze_optional_value_payload_value(IrAnalyze *ira, IrInstruction *source_instr,
13411 IrInstruction *optional_operand, bool safety_check_on)
14524static IrInstGen *ir_analyze_optional_value_payload_value(IrAnalyze *ira, IrInst* source_instr,
14525 IrInstGen *optional_operand, bool safety_check_on)
1341214526{
13413 IrInstruction *opt_ptr = ir_get_ref(ira, source_instr, optional_operand, true, false);
13414 IrInstruction *payload_ptr = ir_analyze_unwrap_optional_payload(ira, source_instr, opt_ptr,
14527 IrInstGen *opt_ptr = ir_get_ref(ira, source_instr, optional_operand, true, false);
14528 IrInstGen *payload_ptr = ir_analyze_unwrap_optional_payload(ira, source_instr, opt_ptr,
1341514529 safety_check_on, false);
1341614530 return ir_get_deref(ira, source_instr, payload_ptr, nullptr);
1341714531}
1341814532
13419static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_instr,
13420 ZigType *wanted_type, IrInstruction *value)
14533static IrInstGen *ir_analyze_cast(IrAnalyze *ira, IrInst *source_instr,
14534 ZigType *wanted_type, IrInstGen *value)
1342114535{
1342214536 Error err;
1342314537 ZigType *actual_type = value->value->type;
1342414538 AstNode *source_node = source_instr->source_node;
1342514539
1342614540 if (type_is_invalid(wanted_type) || type_is_invalid(actual_type)) {
13427 return ira->codegen->invalid_instruction;
14541 return ira->codegen->invalid_inst_gen;
1342814542 }
1342914543
1343014544 // This means the wanted type is anything.
......@@ -13436,7 +14550,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1343614550 ConstCastOnly const_cast_result = types_match_const_cast_only(ira, wanted_type, actual_type,
1343714551 source_node, false);
1343814552 if (const_cast_result.id == ConstCastResultIdInvalid)
13439 return ira->codegen->invalid_instruction;
14553 return ira->codegen->invalid_inst_gen;
1344014554 if (const_cast_result.id == ConstCastResultIdOk) {
1344114555 return ir_resolve_cast(ira, source_instr, value, wanted_type, CastOpNoop);
1344214556 }
......@@ -13470,7 +14584,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1347014584 if (ir_num_lit_fits_in_other_type(ira, value, wanted_child_type, true)) {
1347114585 return ir_analyze_optional_wrap(ira, source_instr, value, wanted_type, nullptr);
1347214586 } else {
13473 return ira->codegen->invalid_instruction;
14587 return ira->codegen->invalid_inst_gen;
1347414588 }
1347514589 } else if (
1347614590 wanted_child_type->id == ZigTypeIdPointer &&
......@@ -13480,18 +14594,18 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1348014594 actual_type->data.pointer.child_type->id == ZigTypeIdArray)
1348114595 {
1348214596 if ((err = type_resolve(ira->codegen, actual_type->data.pointer.child_type, ResolveStatusAlignmentKnown)))
13483 return ira->codegen->invalid_instruction;
14597 return ira->codegen->invalid_inst_gen;
1348414598 if ((err = type_resolve(ira->codegen, wanted_child_type->data.pointer.child_type, ResolveStatusAlignmentKnown)))
13485 return ira->codegen->invalid_instruction;
14599 return ira->codegen->invalid_inst_gen;
1348614600 if (get_ptr_align(ira->codegen, actual_type) >= get_ptr_align(ira->codegen, wanted_child_type) &&
1348714601 types_match_const_cast_only(ira, wanted_child_type->data.pointer.child_type,
1348814602 actual_type->data.pointer.child_type->data.array.child_type, source_node,
1348914603 !wanted_child_type->data.pointer.is_const).id == ConstCastResultIdOk)
1349014604 {
13491 IrInstruction *cast1 = ir_resolve_ptr_of_array_to_unknown_len_ptr(ira, source_instr, value,
14605 IrInstGen *cast1 = ir_resolve_ptr_of_array_to_unknown_len_ptr(ira, source_instr, value,
1349214606 wanted_child_type);
1349314607 if (type_is_invalid(cast1->value->type))
13494 return ira->codegen->invalid_instruction;
14608 return ira->codegen->invalid_inst_gen;
1349514609 return ir_analyze_optional_wrap(ira, source_instr, cast1, wanted_type, nullptr);
1349614610 }
1349714611 }
......@@ -13509,7 +14623,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1350914623 if (ir_num_lit_fits_in_other_type(ira, value, wanted_type->data.error_union.payload_type, true)) {
1351014624 return ir_analyze_err_wrap_payload(ira, source_instr, value, wanted_type, nullptr);
1351114625 } else {
13512 return ira->codegen->invalid_instruction;
14626 return ira->codegen->invalid_inst_gen;
1351314627 }
1351414628 }
1351514629 }
......@@ -13525,13 +14639,13 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1352514639 actual_type->id == ZigTypeIdComptimeInt ||
1352614640 actual_type->id == ZigTypeIdComptimeFloat)
1352714641 {
13528 IrInstruction *cast1 = ir_analyze_cast(ira, source_instr, wanted_type->data.error_union.payload_type, value);
14642 IrInstGen *cast1 = ir_analyze_cast(ira, source_instr, wanted_type->data.error_union.payload_type, value);
1352914643 if (type_is_invalid(cast1->value->type))
13530 return ira->codegen->invalid_instruction;
14644 return ira->codegen->invalid_inst_gen;
1353114645
13532 IrInstruction *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);
14646 IrInstGen *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);
1353314647 if (type_is_invalid(cast2->value->type))
13534 return ira->codegen->invalid_instruction;
14648 return ira->codegen->invalid_inst_gen;
1353514649
1353614650 return cast2;
1353714651 }
......@@ -13546,13 +14660,13 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1354614660 wanted_type->id == ZigTypeIdFloat || wanted_type->id == ZigTypeIdComptimeFloat))
1354714661 {
1354814662 if (value->value->special == ConstValSpecialUndef) {
13549 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
14663 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1355014664 result->value->special = ConstValSpecialUndef;
1355114665 return result;
1355214666 }
1355314667 if (ir_num_lit_fits_in_other_type(ira, value, wanted_type, true)) {
1355414668 if (wanted_type->id == ZigTypeIdComptimeInt || wanted_type->id == ZigTypeIdInt) {
13555 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
14669 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1355614670 if (actual_type->id == ZigTypeIdComptimeInt || actual_type->id == ZigTypeIdInt) {
1355714671 copy_const_val(result->value, value->value);
1355814672 result->value->type = wanted_type;
......@@ -13561,7 +14675,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1356114675 }
1356214676 return result;
1356314677 } else if (wanted_type->id == ZigTypeIdComptimeFloat || wanted_type->id == ZigTypeIdFloat) {
13564 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
14678 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1356514679 if (actual_type->id == ZigTypeIdComptimeInt || actual_type->id == ZigTypeIdInt) {
1356614680 BigFloat bf;
1356714681 bigfloat_init_bigint(&bf, &value->value->data.x_bigint);
......@@ -13573,7 +14687,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1357314687 }
1357414688 zig_unreachable();
1357514689 } else {
13576 return ira->codegen->invalid_instruction;
14690 return ira->codegen->invalid_inst_gen;
1357714691 }
1357814692 }
1357914693
......@@ -13609,13 +14723,13 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1360914723 actual_type->data.pointer.ptr_len == PtrLenSingle &&
1361014724 actual_type->data.pointer.child_type->id == ZigTypeIdArray)
1361114725 {
13612 IrInstruction *cast1 = ir_analyze_cast(ira, source_instr, wanted_type->data.maybe.child_type, value);
14726 IrInstGen *cast1 = ir_analyze_cast(ira, source_instr, wanted_type->data.maybe.child_type, value);
1361314727 if (type_is_invalid(cast1->value->type))
13614 return ira->codegen->invalid_instruction;
14728 return ira->codegen->invalid_inst_gen;
1361514729
13616 IrInstruction *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);
14730 IrInstGen *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);
1361714731 if (type_is_invalid(cast2->value->type))
13618 return ira->codegen->invalid_instruction;
14732 return ira->codegen->invalid_inst_gen;
1361914733
1362014734 return cast2;
1362114735 }
......@@ -13636,9 +14750,9 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1363614750 actual_array_type->data.array.sentinel)))
1363714751 {
1363814752 if ((err = type_resolve(ira->codegen, actual_type->data.pointer.child_type, ResolveStatusAlignmentKnown)))
13639 return ira->codegen->invalid_instruction;
14753 return ira->codegen->invalid_inst_gen;
1364014754 if ((err = type_resolve(ira->codegen, wanted_type->data.pointer.child_type, ResolveStatusAlignmentKnown)))
13641 return ira->codegen->invalid_instruction;
14755 return ira->codegen->invalid_inst_gen;
1364214756 if (get_ptr_align(ira->codegen, actual_type) >= get_ptr_align(ira->codegen, wanted_type) &&
1364314757 types_match_const_cast_only(ira, wanted_type->data.pointer.child_type,
1364414758 actual_type->data.pointer.child_type->data.array.child_type, source_node,
......@@ -13679,24 +14793,24 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1367914793 if ((err = type_resolve(ira->codegen, actual_type->data.pointer.child_type,
1368014794 ResolveStatusAlignmentKnown)))
1368114795 {
13682 return ira->codegen->invalid_instruction;
14796 return ira->codegen->invalid_inst_gen;
1368314797 }
1368414798 if ((err = type_resolve(ira->codegen, slice_ptr_type->data.pointer.child_type,
1368514799 ResolveStatusAlignmentKnown)))
1368614800 {
13687 return ira->codegen->invalid_instruction;
14801 return ira->codegen->invalid_inst_gen;
1368814802 }
1368914803 ok_align = get_ptr_align(ira->codegen, actual_type) >= get_ptr_align(ira->codegen, slice_ptr_type);
1369014804 }
1369114805 if (ok_align) {
1369214806 if (wanted_type->id == ZigTypeIdErrorUnion) {
13693 IrInstruction *cast1 = ir_analyze_cast(ira, source_instr, slice_type, value);
14807 IrInstGen *cast1 = ir_analyze_cast(ira, source_instr, slice_type, value);
1369414808 if (type_is_invalid(cast1->value->type))
13695 return ira->codegen->invalid_instruction;
14809 return ira->codegen->invalid_inst_gen;
1369614810
13697 IrInstruction *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);
14811 IrInstGen *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);
1369814812 if (type_is_invalid(cast2->value->type))
13699 return ira->codegen->invalid_instruction;
14813 return ira->codegen->invalid_inst_gen;
1370014814
1370114815 return cast2;
1370214816 } else {
......@@ -13731,12 +14845,12 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1373114845 if ((err = type_resolve(ira->codegen, actual_type->data.pointer.child_type,
1373214846 ResolveStatusAlignmentKnown)))
1373314847 {
13734 return ira->codegen->invalid_instruction;
14848 return ira->codegen->invalid_inst_gen;
1373514849 }
1373614850 if ((err = type_resolve(ira->codegen, slice_ptr_type->data.pointer.child_type,
1373714851 ResolveStatusAlignmentKnown)))
1373814852 {
13739 return ira->codegen->invalid_instruction;
14853 return ira->codegen->invalid_inst_gen;
1374014854 }
1374114855 ok_align = get_ptr_align(ira->codegen, actual_type) >= get_ptr_align(ira->codegen, slice_ptr_type);
1374214856 }
......@@ -13777,7 +14891,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1377714891 }
1377814892 }
1377914893 if (ok) {
13780 IrInstruction *cast1 = ir_analyze_frame_ptr_to_anyframe(ira, source_instr, value, anyframe_type);
14894 IrInstGen *cast1 = ir_analyze_frame_ptr_to_anyframe(ira, source_instr, value, anyframe_type);
1378114895 if (anyframe_type == wanted_type)
1378214896 return cast1;
1378314897 return ir_analyze_cast(ira, source_instr, wanted_type, cast1);
......@@ -13832,28 +14946,28 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1383214946 if (actual_type->id == ZigTypeIdEnumLiteral &&
1383314947 (wanted_type->id == ZigTypeIdOptional && wanted_type->data.maybe.child_type->id == ZigTypeIdEnum))
1383414948 {
13835 IrInstruction *result = ir_analyze_enum_literal(ira, source_instr, value, wanted_type->data.maybe.child_type);
13836 if (result == ira->codegen->invalid_instruction)
14949 IrInstGen *result = ir_analyze_enum_literal(ira, source_instr, value, wanted_type->data.maybe.child_type);
14950 if (type_is_invalid(result->value->type))
1383714951 return result;
1383814952
13839 return ir_analyze_optional_wrap(ira, result, value, wanted_type, nullptr);
14953 return ir_analyze_optional_wrap(ira, source_instr, value, wanted_type, nullptr);
1384014954 }
1384114955
1384214956 // cast from enum literal to error union when payload is an enum
1384314957 if (actual_type->id == ZigTypeIdEnumLiteral &&
1384414958 (wanted_type->id == ZigTypeIdErrorUnion && wanted_type->data.error_union.payload_type->id == ZigTypeIdEnum))
1384514959 {
13846 IrInstruction *result = ir_analyze_enum_literal(ira, source_instr, value, wanted_type->data.error_union.payload_type);
13847 if (result == ira->codegen->invalid_instruction)
14960 IrInstGen *result = ir_analyze_enum_literal(ira, source_instr, value, wanted_type->data.error_union.payload_type);
14961 if (type_is_invalid(result->value->type))
1384814962 return result;
1384914963
13850 return ir_analyze_err_wrap_payload(ira, result, value, wanted_type, nullptr);
14964 return ir_analyze_err_wrap_payload(ira, source_instr, value, wanted_type, nullptr);
1385114965 }
1385214966
1385314967 // cast from union to the enum type of the union
1385414968 if (actual_type->id == ZigTypeIdUnion && wanted_type->id == ZigTypeIdEnum) {
1385514969 if ((err = type_resolve(ira->codegen, actual_type, ResolveStatusZeroBitsKnown)))
13856 return ira->codegen->invalid_instruction;
14970 return ira->codegen->invalid_inst_gen;
1385714971
1385814972 if (actual_type->data.unionation.tag_type == wanted_type) {
1385914973 return ir_analyze_union_to_tag(ira, source_instr, value, wanted_type);
......@@ -13881,8 +14995,8 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1388114995 (!actual_type->data.pointer.is_const || wanted_type->data.pointer.is_const) &&
1388214996 (!actual_type->data.pointer.is_volatile || wanted_type->data.pointer.is_volatile))
1388314997 {
13884 if ((err = ir_cast_ptr_align(ira, source_instr, wanted_type, actual_type, value->source_node)))
13885 return ira->codegen->invalid_instruction;
14998 if ((err = ir_cast_ptr_align(ira, source_instr, wanted_type, actual_type, value->base.source_node)))
14999 return ira->codegen->invalid_inst_gen;
1388615000
1388715001 return ir_analyze_ptr_to_array(ira, source_instr, value, wanted_type);
1388815002 }
......@@ -13905,7 +15019,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1390515019 slice_ptr_type->data.pointer.sentinel))))
1390615020 {
1390715021 TypeStructField *ptr_field = actual_type->data.structure.fields[slice_ptr_index];
13908 IrInstruction *slice_ptr = ir_analyze_struct_value_field_value(ira, source_instr, value, ptr_field);
15022 IrInstGen *slice_ptr = ir_analyze_struct_value_field_value(ira, source_instr, value, ptr_field);
1390915023 return ir_implicit_cast2(ira, source_instr, slice_ptr, wanted_type);
1391015024 }
1391115025 }
......@@ -13925,7 +15039,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1392515039 dest_ptr_type = wanted_type->data.maybe.child_type;
1392615040 }
1392715041 if (dest_ptr_type != nullptr) {
13928 return ir_analyze_ptr_cast(ira, source_instr, value, wanted_type, source_instr, true);
15042 return ir_analyze_ptr_cast(ira, source_instr, value, source_instr, wanted_type, source_instr, true);
1392915043 }
1393015044 }
1393115045
......@@ -13936,7 +15050,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1393615050 {
1393715051 bool has_bits;
1393815052 if ((err = type_has_bits2(ira->codegen, actual_type, &has_bits)))
13939 return ira->codegen->invalid_instruction;
15053 return ira->codegen->invalid_inst_gen;
1394015054 if (!has_bits) {
1394115055 return ir_get_ref(ira, source_instr, value, false, false);
1394215056 }
......@@ -13967,7 +15081,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1396715081 actual_type->data.pointer.child_type, source_node,
1396815082 !wanted_type->data.pointer.is_const).id == ConstCastResultIdOk)
1396915083 {
13970 return ir_analyze_ptr_cast(ira, source_instr, value, wanted_type, source_instr, true);
15084 return ir_analyze_ptr_cast(ira, source_instr, value, source_instr, wanted_type, source_instr, true);
1397115085 }
1397215086
1397315087 // cast from integer to C pointer
......@@ -14003,9 +15117,9 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1400315117
1400415118 // T to ?U, where T implicitly casts to U
1400515119 if (wanted_type->id == ZigTypeIdOptional && actual_type->id != ZigTypeIdOptional) {
14006 IrInstruction *cast1 = ir_implicit_cast2(ira, source_instr, value, wanted_type->data.maybe.child_type);
15120 IrInstGen *cast1 = ir_implicit_cast2(ira, source_instr, value, wanted_type->data.maybe.child_type);
1400715121 if (type_is_invalid(cast1->value->type))
14008 return ira->codegen->invalid_instruction;
15122 return ira->codegen->invalid_inst_gen;
1400915123 return ir_implicit_cast2(ira, source_instr, cast1, wanted_type);
1401015124 }
1401115125
......@@ -14013,9 +15127,9 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1401315127 if (wanted_type->id == ZigTypeIdErrorUnion && actual_type->id != ZigTypeIdErrorUnion &&
1401415128 actual_type->id != ZigTypeIdErrorSet)
1401515129 {
14016 IrInstruction *cast1 = ir_implicit_cast2(ira, source_instr, value, wanted_type->data.error_union.payload_type);
15130 IrInstGen *cast1 = ir_implicit_cast2(ira, source_instr, value, wanted_type->data.error_union.payload_type);
1401715131 if (type_is_invalid(cast1->value->type))
14018 return ira->codegen->invalid_instruction;
15132 return ira->codegen->invalid_inst_gen;
1401915133 return ir_implicit_cast2(ira, source_instr, cast1, wanted_type);
1402015134 }
1402115135
......@@ -14024,14 +15138,13 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1402415138 buf_ptr(&wanted_type->name),
1402515139 buf_ptr(&actual_type->name)));
1402615140 report_recursive_error(ira, source_instr->source_node, &const_cast_result, parent_msg);
14027 return ira->codegen->invalid_instruction;
15141 return ira->codegen->invalid_inst_gen;
1402815142}
1402915143
14030static IrInstruction *ir_implicit_cast2(IrAnalyze *ira, IrInstruction *value_source_instr,
14031 IrInstruction *value, ZigType *expected_type)
15144static IrInstGen *ir_implicit_cast2(IrAnalyze *ira, IrInst *value_source_instr,
15145 IrInstGen *value, ZigType *expected_type)
1403215146{
1403315147 assert(value);
14034 assert(value != ira->codegen->invalid_instruction);
1403515148 assert(!expected_type || !type_is_invalid(expected_type));
1403615149 assert(value->value->type);
1403715150 assert(!type_is_invalid(value->value->type));
......@@ -14045,17 +15158,17 @@ static IrInstruction *ir_implicit_cast2(IrAnalyze *ira, IrInstruction *value_sou
1404515158 return ir_analyze_cast(ira, value_source_instr, expected_type, value);
1404615159}
1404715160
14048static IrInstruction *ir_implicit_cast(IrAnalyze *ira, IrInstruction *value, ZigType *expected_type) {
14049 return ir_implicit_cast2(ira, value, value, expected_type);
15161static IrInstGen *ir_implicit_cast(IrAnalyze *ira, IrInstGen *value, ZigType *expected_type) {
15162 return ir_implicit_cast2(ira, &value->base, value, expected_type);
1405015163}
1405115164
14052static ZigType *get_ptr_elem_type(CodeGen *g, IrInstruction *ptr) {
14053 ir_assert(ptr->value->type->id == ZigTypeIdPointer, ptr);
15165static ZigType *get_ptr_elem_type(CodeGen *g, IrInstGen *ptr) {
15166 ir_assert_gen(ptr->value->type->id == ZigTypeIdPointer, ptr);
1405415167 ZigType *elem_type = ptr->value->type->data.pointer.child_type;
1405515168 if (elem_type != g->builtin_types.entry_var)
1405615169 return elem_type;
1405715170
14058 if (ir_resolve_lazy(g, ptr->source_node, ptr->value))
15171 if (ir_resolve_lazy(g, ptr->base.source_node, ptr->value))
1405915172 return g->builtin_types.entry_invalid;
1406015173
1406115174 assert(value_is_comptime(ptr->value));
......@@ -14063,28 +15176,28 @@ static ZigType *get_ptr_elem_type(CodeGen *g, IrInstruction *ptr) {
1406315176 return pointee->type;
1406415177}
1406515178
14066static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruction, IrInstruction *ptr,
15179static IrInstGen *ir_get_deref(IrAnalyze *ira, IrInst* source_instruction, IrInstGen *ptr,
1406715180 ResultLoc *result_loc)
1406815181{
1406915182 Error err;
1407015183 ZigType *ptr_type = ptr->value->type;
1407115184 if (type_is_invalid(ptr_type))
14072 return ira->codegen->invalid_instruction;
15185 return ira->codegen->invalid_inst_gen;
1407315186
1407415187 if (ptr_type->id != ZigTypeIdPointer) {
1407515188 ir_add_error_node(ira, source_instruction->source_node,
1407615189 buf_sprintf("attempt to dereference non-pointer type '%s'",
1407715190 buf_ptr(&ptr_type->name)));
14078 return ira->codegen->invalid_instruction;
15191 return ira->codegen->invalid_inst_gen;
1407915192 }
1408015193
1408115194 ZigType *child_type = ptr_type->data.pointer.child_type;
1408215195 if (type_is_invalid(child_type))
14083 return ira->codegen->invalid_instruction;
15196 return ira->codegen->invalid_inst_gen;
1408415197 // if the child type has one possible value, the deref is comptime
1408515198 switch (type_has_one_possible_value(ira->codegen, child_type)) {
1408615199 case OnePossibleValueInvalid:
14087 return ira->codegen->invalid_instruction;
15200 return ira->codegen->invalid_inst_gen;
1408815201 case OnePossibleValueYes:
1408915202 return ir_const_move(ira, source_instruction,
1409015203 get_the_one_possible_value(ira->codegen, child_type));
......@@ -14093,8 +15206,8 @@ static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruc
1409315206 }
1409415207 if (instr_is_comptime(ptr)) {
1409515208 if (ptr->value->special == ConstValSpecialUndef) {
14096 ir_add_error(ira, ptr, buf_sprintf("attempt to dereference undefined value"));
14097 return ira->codegen->invalid_instruction;
15209 ir_add_error(ira, &ptr->base, buf_sprintf("attempt to dereference undefined value"));
15210 return ira->codegen->invalid_inst_gen;
1409815211 }
1409915212 if (ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
1410015213 ZigValue *pointee = const_ptr_pointee_unchecked(ira->codegen, ptr->value);
......@@ -14102,12 +15215,12 @@ static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruc
1410215215 child_type = pointee->type;
1410315216 }
1410415217 if (pointee->special != ConstValSpecialRuntime) {
14105 IrInstruction *result = ir_const(ira, source_instruction, child_type);
15218 IrInstGen *result = ir_const(ira, source_instruction, child_type);
1410615219
1410715220 if ((err = ir_read_const_ptr(ira, ira->codegen, source_instruction->source_node, result->value,
1410815221 ptr->value)))
1410915222 {
14110 return ira->codegen->invalid_instruction;
15223 return ira->codegen->invalid_inst_gen;
1411115224 }
1411215225 result->value->type = child_type;
1411315226 return result;
......@@ -14116,38 +15229,37 @@ static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruc
1411615229 }
1411715230
1411815231 // if the instruction is a const ref instruction we can skip it
14119 if (ptr->id == IrInstructionIdRef) {
14120 IrInstructionRef *ref_inst = reinterpret_cast<IrInstructionRef *>(ptr);
14121 return ref_inst->value;
15232 if (ptr->id == IrInstGenIdRef) {
15233 IrInstGenRef *ref_inst = reinterpret_cast<IrInstGenRef *>(ptr);
15234 return ref_inst->operand;
1412215235 }
1412315236
1412415237 // If the instruction is a element pointer instruction to a vector, we emit
1412515238 // vector element extract instruction rather than load pointer. If the
1412615239 // pointer type has non-VECTOR_INDEX_RUNTIME value, it would have been
14127 // possible to implement this in the codegen for IrInstructionLoadPtrGen.
15240 // possible to implement this in the codegen for IrInstGenLoadPtr.
1412815241 // However if it has VECTOR_INDEX_RUNTIME then we must emit a compile error
1412915242 // if the vector index cannot be determined right here, right now, because
1413015243 // the type information does not contain enough information to actually
1413115244 // perform a dereference.
1413215245 if (ptr_type->data.pointer.vector_index == VECTOR_INDEX_RUNTIME) {
14133 if (ptr->id == IrInstructionIdElemPtr) {
14134 IrInstructionElemPtr *elem_ptr = (IrInstructionElemPtr *)ptr;
14135 IrInstruction *vector_loaded = ir_get_deref(ira, elem_ptr->array_ptr,
15246 if (ptr->id == IrInstGenIdElemPtr) {
15247 IrInstGenElemPtr *elem_ptr = (IrInstGenElemPtr *)ptr;
15248 IrInstGen *vector_loaded = ir_get_deref(ira, &elem_ptr->array_ptr->base,
1413615249 elem_ptr->array_ptr, nullptr);
14137 IrInstruction *elem_index = elem_ptr->elem_index;
15250 IrInstGen *elem_index = elem_ptr->elem_index;
1413815251 return ir_build_vector_extract_elem(ira, source_instruction, vector_loaded, elem_index);
1413915252 }
14140 ir_add_error(ira, ptr,
15253 ir_add_error(ira, &ptr->base,
1414115254 buf_sprintf("unable to determine vector element index of type '%s'", buf_ptr(&ptr_type->name)));
14142 return ira->codegen->invalid_instruction;
15255 return ira->codegen->invalid_inst_gen;
1414315256 }
1414415257
14145 IrInstruction *result_loc_inst;
15258 IrInstGen *result_loc_inst;
1414615259 if (ptr_type->data.pointer.host_int_bytes != 0 && handle_is_ptr(child_type)) {
1414715260 if (result_loc == nullptr) result_loc = no_result_loc();
14148 result_loc_inst = ir_resolve_result(ira, source_instruction, result_loc, child_type, nullptr,
14149 true, false, true);
14150 if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {
15261 result_loc_inst = ir_resolve_result(ira, source_instruction, result_loc, child_type, nullptr, true, true);
15262 if (type_is_invalid(result_loc_inst->value->type) || result_loc_inst->value->type->id == ZigTypeIdUnreachable) {
1415115263 return result_loc_inst;
1415215264 }
1415315265 } else {
......@@ -14157,7 +15269,7 @@ static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruc
1415715269 return ir_build_load_ptr_gen(ira, source_instruction, ptr, child_type, result_loc_inst);
1415815270}
1415915271
14160static bool ir_resolve_const_align(CodeGen *codegen, IrExecutable *exec, AstNode *source_node,
15272static bool ir_resolve_const_align(CodeGen *codegen, IrExecutableGen *exec, AstNode *source_node,
1416115273 ZigValue *const_val, uint32_t *out)
1416215274{
1416315275 Error err;
......@@ -14166,12 +15278,12 @@ static bool ir_resolve_const_align(CodeGen *codegen, IrExecutable *exec, AstNode
1416615278
1416715279 uint32_t align_bytes = bigint_as_u32(&const_val->data.x_bigint);
1416815280 if (align_bytes == 0) {
14169 exec_add_error_node(codegen, exec, source_node, buf_sprintf("alignment must be >= 1"));
15281 exec_add_error_node_gen(codegen, exec, source_node, buf_sprintf("alignment must be >= 1"));
1417015282 return false;
1417115283 }
1417215284
1417315285 if (!is_power_of_2(align_bytes)) {
14174 exec_add_error_node(codegen, exec, source_node,
15286 exec_add_error_node_gen(codegen, exec, source_node,
1417515287 buf_sprintf("alignment value %" PRIu32 " is not a power of 2", align_bytes));
1417615288 return false;
1417715289 }
......@@ -14180,7 +15292,7 @@ static bool ir_resolve_const_align(CodeGen *codegen, IrExecutable *exec, AstNode
1418015292 return true;
1418115293}
1418215294
14183static bool ir_resolve_align(IrAnalyze *ira, IrInstruction *value, ZigType *elem_type, uint32_t *out) {
15295static bool ir_resolve_align(IrAnalyze *ira, IrInstGen *value, ZigType *elem_type, uint32_t *out) {
1418415296 if (type_is_invalid(value->value->type))
1418515297 return false;
1418615298
......@@ -14201,19 +15313,19 @@ static bool ir_resolve_align(IrAnalyze *ira, IrInstruction *value, ZigType *elem
1420115313 }
1420215314 }
1420315315
14204 IrInstruction *casted_value = ir_implicit_cast(ira, value, get_align_amt_type(ira->codegen));
15316 IrInstGen *casted_value = ir_implicit_cast(ira, value, get_align_amt_type(ira->codegen));
1420515317 if (type_is_invalid(casted_value->value->type))
1420615318 return false;
1420715319
14208 return ir_resolve_const_align(ira->codegen, ira->new_irb.exec, value->source_node,
15320 return ir_resolve_const_align(ira->codegen, ira->new_irb.exec, value->base.source_node,
1420915321 casted_value->value, out);
1421015322}
1421115323
14212static bool ir_resolve_unsigned(IrAnalyze *ira, IrInstruction *value, ZigType *int_type, uint64_t *out) {
15324static bool ir_resolve_unsigned(IrAnalyze *ira, IrInstGen *value, ZigType *int_type, uint64_t *out) {
1421315325 if (type_is_invalid(value->value->type))
1421415326 return false;
1421515327
14216 IrInstruction *casted_value = ir_implicit_cast(ira, value, int_type);
15328 IrInstGen *casted_value = ir_implicit_cast(ira, value, int_type);
1421715329 if (type_is_invalid(casted_value->value->type))
1421815330 return false;
1421915331
......@@ -14225,15 +15337,15 @@ static bool ir_resolve_unsigned(IrAnalyze *ira, IrInstruction *value, ZigType *i
1422515337 return true;
1422615338}
1422715339
14228static bool ir_resolve_usize(IrAnalyze *ira, IrInstruction *value, uint64_t *out) {
15340static bool ir_resolve_usize(IrAnalyze *ira, IrInstGen *value, uint64_t *out) {
1422915341 return ir_resolve_unsigned(ira, value, ira->codegen->builtin_types.entry_usize, out);
1423015342}
1423115343
14232static bool ir_resolve_bool(IrAnalyze *ira, IrInstruction *value, bool *out) {
15344static bool ir_resolve_bool(IrAnalyze *ira, IrInstGen *value, bool *out) {
1423315345 if (type_is_invalid(value->value->type))
1423415346 return false;
1423515347
14236 IrInstruction *casted_value = ir_implicit_cast(ira, value, ira->codegen->builtin_types.entry_bool);
15348 IrInstGen *casted_value = ir_implicit_cast(ira, value, ira->codegen->builtin_types.entry_bool);
1423715349 if (type_is_invalid(casted_value->value->type))
1423815350 return false;
1423915351
......@@ -14245,7 +15357,7 @@ static bool ir_resolve_bool(IrAnalyze *ira, IrInstruction *value, bool *out) {
1424515357 return true;
1424615358}
1424715359
14248static bool ir_resolve_comptime(IrAnalyze *ira, IrInstruction *value, bool *out) {
15360static bool ir_resolve_comptime(IrAnalyze *ira, IrInstGen *value, bool *out) {
1424915361 if (!value) {
1425015362 *out = false;
1425115363 return true;
......@@ -14253,13 +15365,13 @@ static bool ir_resolve_comptime(IrAnalyze *ira, IrInstruction *value, bool *out)
1425315365 return ir_resolve_bool(ira, value, out);
1425415366}
1425515367
14256static bool ir_resolve_atomic_order(IrAnalyze *ira, IrInstruction *value, AtomicOrder *out) {
15368static bool ir_resolve_atomic_order(IrAnalyze *ira, IrInstGen *value, AtomicOrder *out) {
1425715369 if (type_is_invalid(value->value->type))
1425815370 return false;
1425915371
1426015372 ZigType *atomic_order_type = get_builtin_type(ira->codegen, "AtomicOrder");
1426115373
14262 IrInstruction *casted_value = ir_implicit_cast(ira, value, atomic_order_type);
15374 IrInstGen *casted_value = ir_implicit_cast(ira, value, atomic_order_type);
1426315375 if (type_is_invalid(casted_value->value->type))
1426415376 return false;
1426515377
......@@ -14271,13 +15383,13 @@ static bool ir_resolve_atomic_order(IrAnalyze *ira, IrInstruction *value, Atomic
1427115383 return true;
1427215384}
1427315385
14274static bool ir_resolve_atomic_rmw_op(IrAnalyze *ira, IrInstruction *value, AtomicRmwOp *out) {
15386static bool ir_resolve_atomic_rmw_op(IrAnalyze *ira, IrInstGen *value, AtomicRmwOp *out) {
1427515387 if (type_is_invalid(value->value->type))
1427615388 return false;
1427715389
1427815390 ZigType *atomic_rmw_op_type = get_builtin_type(ira->codegen, "AtomicRmwOp");
1427915391
14280 IrInstruction *casted_value = ir_implicit_cast(ira, value, atomic_rmw_op_type);
15392 IrInstGen *casted_value = ir_implicit_cast(ira, value, atomic_rmw_op_type);
1428115393 if (type_is_invalid(casted_value->value->type))
1428215394 return false;
1428315395
......@@ -14289,13 +15401,13 @@ static bool ir_resolve_atomic_rmw_op(IrAnalyze *ira, IrInstruction *value, Atomi
1428915401 return true;
1429015402}
1429115403
14292static bool ir_resolve_global_linkage(IrAnalyze *ira, IrInstruction *value, GlobalLinkageId *out) {
15404static bool ir_resolve_global_linkage(IrAnalyze *ira, IrInstGen *value, GlobalLinkageId *out) {
1429315405 if (type_is_invalid(value->value->type))
1429415406 return false;
1429515407
1429615408 ZigType *global_linkage_type = get_builtin_type(ira->codegen, "GlobalLinkage");
1429715409
14298 IrInstruction *casted_value = ir_implicit_cast(ira, value, global_linkage_type);
15410 IrInstGen *casted_value = ir_implicit_cast(ira, value, global_linkage_type);
1429915411 if (type_is_invalid(casted_value->value->type))
1430015412 return false;
1430115413
......@@ -14307,13 +15419,13 @@ static bool ir_resolve_global_linkage(IrAnalyze *ira, IrInstruction *value, Glob
1430715419 return true;
1430815420}
1430915421
14310static bool ir_resolve_float_mode(IrAnalyze *ira, IrInstruction *value, FloatMode *out) {
15422static bool ir_resolve_float_mode(IrAnalyze *ira, IrInstGen *value, FloatMode *out) {
1431115423 if (type_is_invalid(value->value->type))
1431215424 return false;
1431315425
1431415426 ZigType *float_mode_type = get_builtin_type(ira->codegen, "FloatMode");
1431515427
14316 IrInstruction *casted_value = ir_implicit_cast(ira, value, float_mode_type);
15428 IrInstGen *casted_value = ir_implicit_cast(ira, value, float_mode_type);
1431715429 if (type_is_invalid(casted_value->value->type))
1431815430 return false;
1431915431
......@@ -14325,14 +15437,14 @@ static bool ir_resolve_float_mode(IrAnalyze *ira, IrInstruction *value, FloatMod
1432515437 return true;
1432615438}
1432715439
14328static Buf *ir_resolve_str(IrAnalyze *ira, IrInstruction *value) {
15440static Buf *ir_resolve_str(IrAnalyze *ira, IrInstGen *value) {
1432915441 if (type_is_invalid(value->value->type))
1433015442 return nullptr;
1433115443
1433215444 ZigType *ptr_type = get_pointer_to_type_extra(ira->codegen, ira->codegen->builtin_types.entry_u8,
1433315445 true, false, PtrLenUnknown, 0, 0, 0, false);
1433415446 ZigType *str_type = get_slice_type(ira->codegen, ptr_type);
14335 IrInstruction *casted_value = ir_implicit_cast(ira, value, str_type);
15447 IrInstGen *casted_value = ir_implicit_cast(ira, value, str_type);
1433615448 if (type_is_invalid(casted_value->value->type))
1433715449 return nullptr;
1433815450
......@@ -14356,7 +15468,7 @@ static Buf *ir_resolve_str(IrAnalyze *ira, IrInstruction *value) {
1435615468 size_t new_index = ptr_field->data.x_ptr.data.base_array.elem_index + i;
1435715469 ZigValue *char_val = &array_val->data.x_array.data.s_none.elements[new_index];
1435815470 if (char_val->special == ConstValSpecialUndef) {
14359 ir_add_error(ira, casted_value, buf_sprintf("use of undefined value"));
15471 ir_add_error(ira, &casted_value->base, buf_sprintf("use of undefined value"));
1436015472 return nullptr;
1436115473 }
1436215474 uint64_t big_c = bigint_as_u64(&char_val->data.x_bigint);
......@@ -14367,10 +15479,10 @@ static Buf *ir_resolve_str(IrAnalyze *ira, IrInstruction *value) {
1436715479 return result;
1436815480}
1436915481
14370static IrInstruction *ir_analyze_instruction_add_implicit_return_type(IrAnalyze *ira,
14371 IrInstructionAddImplicitReturnType *instruction)
15482static IrInstGen *ir_analyze_instruction_add_implicit_return_type(IrAnalyze *ira,
15483 IrInstSrcAddImplicitReturnType *instruction)
1437215484{
14373 IrInstruction *value = instruction->value->child;
15485 IrInstGen *value = instruction->value->child;
1437415486 if (type_is_invalid(value->value->type))
1437515487 return ir_unreach_error(ira);
1437615488
......@@ -14378,15 +15490,15 @@ static IrInstruction *ir_analyze_instruction_add_implicit_return_type(IrAnalyze
1437815490 ira->src_implicit_return_type_list.append(value);
1437915491 }
1438015492
14381 return ir_const_void(ira, &instruction->base);
15493 return ir_const_void(ira, &instruction->base.base);
1438215494}
1438315495
14384static IrInstruction *ir_analyze_instruction_return(IrAnalyze *ira, IrInstructionReturn *instruction) {
14385 IrInstruction *operand = instruction->operand->child;
15496static IrInstGen *ir_analyze_instruction_return(IrAnalyze *ira, IrInstSrcReturn *instruction) {
15497 IrInstGen *operand = instruction->operand->child;
1438615498 if (type_is_invalid(operand->value->type))
1438715499 return ir_unreach_error(ira);
1438815500
14389 IrInstruction *casted_operand = ir_implicit_cast(ira, operand, ira->explicit_return_type);
15501 IrInstGen *casted_operand = ir_implicit_cast(ira, operand, ira->explicit_return_type);
1439015502 if (type_is_invalid(casted_operand->value->type)) {
1439115503 AstNode *source_node = ira->explicit_return_type_source_node;
1439215504 if (source_node != nullptr) {
......@@ -14401,9 +15513,7 @@ static IrInstruction *ir_analyze_instruction_return(IrAnalyze *ira, IrInstructio
1440115513 handle_is_ptr(ira->explicit_return_type))
1440215514 {
1440315515 // result location mechanism took care of it.
14404 IrInstruction *result = ir_build_return(&ira->new_irb, instruction->base.scope,
14405 instruction->base.source_node, nullptr);
14406 result->value->type = ira->codegen->builtin_types.entry_unreachable;
15516 IrInstGen *result = ir_build_return_gen(ira, &instruction->base.base, nullptr);
1440715517 return ir_finish_anal(ira, result);
1440815518 }
1440915519
......@@ -14411,47 +15521,45 @@ static IrInstruction *ir_analyze_instruction_return(IrAnalyze *ira, IrInstructio
1441115521 casted_operand->value->type->id == ZigTypeIdPointer &&
1441215522 casted_operand->value->data.rh_ptr == RuntimeHintPtrStack)
1441315523 {
14414 ir_add_error(ira, casted_operand, buf_sprintf("function returns address of local variable"));
15524 ir_add_error(ira, &instruction->operand->base, buf_sprintf("function returns address of local variable"));
1441515525 return ir_unreach_error(ira);
1441615526 }
1441715527
14418 IrInstruction *result = ir_build_return(&ira->new_irb, instruction->base.scope,
14419 instruction->base.source_node, casted_operand);
14420 result->value->type = ira->codegen->builtin_types.entry_unreachable;
15528 IrInstGen *result = ir_build_return_gen(ira, &instruction->base.base, casted_operand);
1442115529 return ir_finish_anal(ira, result);
1442215530}
1442315531
14424static IrInstruction *ir_analyze_instruction_const(IrAnalyze *ira, IrInstructionConst *instruction) {
14425 return ir_const_move(ira, &instruction->base, instruction->base.value);
15532static IrInstGen *ir_analyze_instruction_const(IrAnalyze *ira, IrInstSrcConst *instruction) {
15533 return ir_const_move(ira, &instruction->base.base, instruction->value);
1442615534}
1442715535
14428static IrInstruction *ir_analyze_bin_op_bool(IrAnalyze *ira, IrInstructionBinOp *bin_op_instruction) {
14429 IrInstruction *op1 = bin_op_instruction->op1->child;
15536static IrInstGen *ir_analyze_bin_op_bool(IrAnalyze *ira, IrInstSrcBinOp *bin_op_instruction) {
15537 IrInstGen *op1 = bin_op_instruction->op1->child;
1443015538 if (type_is_invalid(op1->value->type))
14431 return ira->codegen->invalid_instruction;
15539 return ira->codegen->invalid_inst_gen;
1443215540
14433 IrInstruction *op2 = bin_op_instruction->op2->child;
15541 IrInstGen *op2 = bin_op_instruction->op2->child;
1443415542 if (type_is_invalid(op2->value->type))
14435 return ira->codegen->invalid_instruction;
15543 return ira->codegen->invalid_inst_gen;
1443615544
1443715545 ZigType *bool_type = ira->codegen->builtin_types.entry_bool;
1443815546
14439 IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, bool_type);
14440 if (casted_op1 == ira->codegen->invalid_instruction)
14441 return ira->codegen->invalid_instruction;
15547 IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, bool_type);
15548 if (type_is_invalid(casted_op1->value->type))
15549 return ira->codegen->invalid_inst_gen;
1444215550
14443 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, bool_type);
14444 if (casted_op2 == ira->codegen->invalid_instruction)
14445 return ira->codegen->invalid_instruction;
15551 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, bool_type);
15552 if (type_is_invalid(casted_op2->value->type))
15553 return ira->codegen->invalid_inst_gen;
1444615554
1444715555 if (instr_is_comptime(casted_op1) && instr_is_comptime(casted_op2)) {
1444815556 ZigValue *op1_val = ir_resolve_const(ira, casted_op1, UndefBad);
1444915557 if (op1_val == nullptr)
14450 return ira->codegen->invalid_instruction;
15558 return ira->codegen->invalid_inst_gen;
1445115559
1445215560 ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);
1445315561 if (op2_val == nullptr)
14454 return ira->codegen->invalid_instruction;
15562 return ira->codegen->invalid_inst_gen;
1445515563
1445615564 assert(casted_op1->value->type->id == ZigTypeIdBool);
1445715565 assert(casted_op2->value->type->id == ZigTypeIdBool);
......@@ -14463,14 +15571,11 @@ static IrInstruction *ir_analyze_bin_op_bool(IrAnalyze *ira, IrInstructionBinOp
1446315571 } else {
1446415572 zig_unreachable();
1446515573 }
14466 return ir_const_bool(ira, &bin_op_instruction->base, result_bool);
15574 return ir_const_bool(ira, &bin_op_instruction->base.base, result_bool);
1446715575 }
1446815576
14469 IrInstruction *result = ir_build_bin_op(&ira->new_irb,
14470 bin_op_instruction->base.scope, bin_op_instruction->base.source_node,
15577 return ir_build_bin_op_gen(ira, &bin_op_instruction->base.base, bool_type,
1447115578 bin_op_instruction->op_id, casted_op1, casted_op2, bin_op_instruction->safety_check_on);
14472 result->value->type = bool_type;
14473 return result;
1447415579}
1447515580
1447615581static bool resolve_cmp_op_id(IrBinOp op_id, Cmp cmp) {
......@@ -14535,12 +15640,13 @@ static void set_optional_payload(ZigValue *opt_val, ZigValue *payload) {
1453515640 }
1453615641}
1453715642
14538static IrInstruction *ir_evaluate_bin_op_cmp(IrAnalyze *ira, ZigType *resolved_type,
14539 ZigValue *op1_val, ZigValue *op2_val, IrInstructionBinOp *bin_op_instruction, IrBinOp op_id,
14540 bool one_possible_value) {
15643static IrInstGen *ir_evaluate_bin_op_cmp(IrAnalyze *ira, ZigType *resolved_type,
15644 ZigValue *op1_val, ZigValue *op2_val, IrInstSrcBinOp *bin_op_instruction, IrBinOp op_id,
15645 bool one_possible_value)
15646{
1454115647 if (op1_val->special == ConstValSpecialUndef ||
1454215648 op2_val->special == ConstValSpecialUndef)
14543 return ir_const_undef(ira, &bin_op_instruction->base, resolved_type);
15649 return ir_const_undef(ira, &bin_op_instruction->base.base, resolved_type);
1454415650 if (resolved_type->id == ZigTypeIdPointer && op_id != IrBinOpCmpEq && op_id != IrBinOpCmpNotEq) {
1454515651 if ((op1_val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr ||
1454615652 op1_val->data.x_ptr.special == ConstPtrSpecialNull) &&
......@@ -14560,7 +15666,7 @@ static IrInstruction *ir_evaluate_bin_op_cmp(IrAnalyze *ira, ZigType *resolved_t
1456015666 cmp_result = CmpEQ;
1456115667 }
1456215668 bool answer = resolve_cmp_op_id(op_id, cmp_result);
14563 return ir_const_bool(ira, &bin_op_instruction->base, answer);
15669 return ir_const_bool(ira, &bin_op_instruction->base.base, answer);
1456415670 }
1456515671 } else {
1456615672 bool are_equal = one_possible_value || const_values_equal(ira->codegen, op1_val, op2_val);
......@@ -14572,15 +15678,33 @@ static IrInstruction *ir_evaluate_bin_op_cmp(IrAnalyze *ira, ZigType *resolved_t
1457215678 } else {
1457315679 zig_unreachable();
1457415680 }
14575 return ir_const_bool(ira, &bin_op_instruction->base, answer);
15681 return ir_const_bool(ira, &bin_op_instruction->base.base, answer);
1457615682 }
1457715683 zig_unreachable();
1457815684}
1457915685
1458015686// Returns ErrorNotLazy when the value cannot be determined
14581static Error lazy_cmp_zero(AstNode *source_node, ZigValue *val, Cmp *result) {
15687static Error lazy_cmp_zero(CodeGen *codegen, AstNode *source_node, ZigValue *val, Cmp *result) {
1458215688 Error err;
1458315689
15690 switch (type_has_one_possible_value(codegen, val->type)) {
15691 case OnePossibleValueInvalid:
15692 return ErrorSemanticAnalyzeFail;
15693 case OnePossibleValueNo:
15694 break;
15695 case OnePossibleValueYes:
15696 switch (val->type->id) {
15697 case ZigTypeIdInt:
15698 src_assert(val->type->data.integral.bit_count == 0, source_node);
15699 *result = CmpEQ;
15700 return ErrorNone;
15701 case ZigTypeIdUndefined:
15702 return ErrorNotLazy;
15703 default:
15704 zig_unreachable();
15705 }
15706 }
15707
1458415708 switch (val->special) {
1458515709 case ConstValSpecialRuntime:
1458615710 case ConstValSpecialUndef:
......@@ -14626,7 +15750,7 @@ static Error lazy_cmp_zero(AstNode *source_node, ZigValue *val, Cmp *result) {
1462615750 zig_unreachable();
1462715751}
1462815752
14629static ErrorMsg *ir_eval_bin_op_cmp_scalar(IrAnalyze *ira, IrInstruction *source_instr,
15753static ErrorMsg *ir_eval_bin_op_cmp_scalar(IrAnalyze *ira, IrInst* source_instr,
1463015754 ZigValue *op1_val, IrBinOp op_id, ZigValue *op2_val, ZigValue *out_val)
1463115755{
1463215756 Error err;
......@@ -14634,12 +15758,12 @@ static ErrorMsg *ir_eval_bin_op_cmp_scalar(IrAnalyze *ira, IrInstruction *source
1463415758 // Before resolving the values, we special case comparisons against zero. These can often
1463515759 // be done without resolving lazy values, preventing potential dependency loops.
1463615760 Cmp op1_cmp_zero;
14637 if ((err = lazy_cmp_zero(source_instr->source_node, op1_val, &op1_cmp_zero))) {
15761 if ((err = lazy_cmp_zero(ira->codegen, source_instr->source_node, op1_val, &op1_cmp_zero))) {
1463815762 if (err == ErrorNotLazy) goto never_mind_just_calculate_it_normally;
1463915763 return ira->codegen->trace_err;
1464015764 }
1464115765 Cmp op2_cmp_zero;
14642 if ((err = lazy_cmp_zero(source_instr->source_node, op2_val, &op2_cmp_zero))) {
15766 if ((err = lazy_cmp_zero(ira->codegen, source_instr->source_node, op2_val, &op2_cmp_zero))) {
1464315767 if (err == ErrorNotLazy) goto never_mind_just_calculate_it_normally;
1464415768 return ira->codegen->trace_err;
1464515769 }
......@@ -14704,14 +15828,14 @@ never_mind_just_calculate_it_normally:
1470415828 return nullptr;
1470515829 }
1470615830 if (op1_val->type->id == ZigTypeIdComptimeFloat) {
14707 IrInstruction *tmp = ir_const_noval(ira, source_instr);
15831 IrInstGen *tmp = ir_const_noval(ira, source_instr);
1470815832 tmp->value = op1_val;
14709 IrInstruction *casted = ir_implicit_cast(ira, tmp, op2_val->type);
15833 IrInstGen *casted = ir_implicit_cast(ira, tmp, op2_val->type);
1471015834 op1_val = casted->value;
1471115835 } else if (op2_val->type->id == ZigTypeIdComptimeFloat) {
14712 IrInstruction *tmp = ir_const_noval(ira, source_instr);
15836 IrInstGen *tmp = ir_const_noval(ira, source_instr);
1471315837 tmp->value = op2_val;
14714 IrInstruction *casted = ir_implicit_cast(ira, tmp, op1_val->type);
15838 IrInstGen *casted = ir_implicit_cast(ira, tmp, op1_val->type);
1471515839 op2_val = casted->value;
1471615840 }
1471715841 Cmp cmp_result = float_cmp(op1_val, op2_val);
......@@ -14723,38 +15847,49 @@ never_mind_just_calculate_it_normally:
1472315847 bool op1_is_int = op1_val->type->id == ZigTypeIdInt || op1_val->type->id == ZigTypeIdComptimeInt;
1472415848 bool op2_is_int = op2_val->type->id == ZigTypeIdInt || op2_val->type->id == ZigTypeIdComptimeInt;
1472515849
14726 BigInt *op1_bigint;
14727 BigInt *op2_bigint;
14728 bool need_to_free_op1_bigint = false;
14729 bool need_to_free_op2_bigint = false;
14730 if (op1_is_float) {
14731 op1_bigint = allocate<BigInt>(1, "BigInt");
14732 need_to_free_op1_bigint = true;
14733 float_init_bigint(op1_bigint, op1_val);
14734 } else {
14735 assert(op1_is_int);
14736 op1_bigint = &op1_val->data.x_bigint;
15850 if (op1_is_int && op2_is_int) {
15851 Cmp cmp_result = bigint_cmp(&op1_val->data.x_bigint, &op2_val->data.x_bigint);
15852 out_val->special = ConstValSpecialStatic;
15853 out_val->data.x_bool = resolve_cmp_op_id(op_id, cmp_result);
15854
15855 return nullptr;
1473715856 }
14738 if (op2_is_float) {
14739 op2_bigint = allocate<BigInt>(1, "BigInt");
14740 need_to_free_op2_bigint = true;
14741 float_init_bigint(op2_bigint, op2_val);
15857
15858 // Handle the case where one of the two operands is a fp value and the other
15859 // is an integer value
15860 ZigValue *float_val;
15861 if (op1_is_int && op2_is_float) {
15862 float_val = op2_val;
15863 } else if (op1_is_float && op2_is_int) {
15864 float_val = op1_val;
1474215865 } else {
14743 assert(op2_is_int);
14744 op2_bigint = &op2_val->data.x_bigint;
15866 zig_unreachable();
15867 }
15868
15869 // They can never be equal if the fp value has a non-zero decimal part
15870 if (op_id == IrBinOpCmpEq || op_id == IrBinOpCmpNotEq) {
15871 if (float_has_fraction(float_val)) {
15872 out_val->special = ConstValSpecialStatic;
15873 out_val->data.x_bool = op_id == IrBinOpCmpNotEq;
15874 return nullptr;
15875 }
1474515876 }
1474615877
14747 Cmp cmp_result = bigint_cmp(op1_bigint, op2_bigint);
15878 // Cast the integer operand into a fp value to perform the comparison
15879 BigFloat op1_bigfloat;
15880 BigFloat op2_bigfloat;
15881 value_to_bigfloat(&op1_bigfloat, op1_val);
15882 value_to_bigfloat(&op2_bigfloat, op2_val);
15883
15884 Cmp cmp_result = bigfloat_cmp(&op1_bigfloat, &op2_bigfloat);
1474815885 out_val->special = ConstValSpecialStatic;
1474915886 out_val->data.x_bool = resolve_cmp_op_id(op_id, cmp_result);
1475015887
14751 if (need_to_free_op1_bigint) destroy(op1_bigint, "BigInt");
14752 if (need_to_free_op2_bigint) destroy(op2_bigint, "BigInt");
1475315888 return nullptr;
1475415889}
1475515890
14756static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstruction *source_instr,
14757 IrInstruction *op1, IrInstruction *op2, IrBinOp op_id)
15891static IrInstGen *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInst *source_instr,
15892 IrInstGen *op1, IrInstGen *op2, IrBinOp op_id)
1475815893{
1475915894 Error err;
1476015895
......@@ -14767,7 +15902,7 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
1476715902 ir_add_error(ira, source_instr,
1476815903 buf_sprintf("vector length mismatch: %" PRIu32 " and %" PRIu32,
1476915904 op1->value->type->data.vector.len, op2->value->type->data.vector.len));
14770 return ira->codegen->invalid_instruction;
15905 return ira->codegen->invalid_inst_gen;
1477115906 }
1477215907 result_type = get_vector_type(ira->codegen, op1->value->type->data.vector.len, scalar_result_type);
1477315908 op1_scalar_type = op1->value->type->data.vector.elem_type;
......@@ -14776,13 +15911,13 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
1477615911 ir_add_error(ira, source_instr,
1477715912 buf_sprintf("mixed scalar and vector operands to comparison operator: '%s' and '%s'",
1477815913 buf_ptr(&op1->value->type->name), buf_ptr(&op2->value->type->name)));
14779 return ira->codegen->invalid_instruction;
15914 return ira->codegen->invalid_inst_gen;
1478015915 }
1478115916
1478215917 bool opv_op1;
1478315918 switch (type_has_one_possible_value(ira->codegen, op1->value->type)) {
1478415919 case OnePossibleValueInvalid:
14785 return ira->codegen->invalid_instruction;
15920 return ira->codegen->invalid_inst_gen;
1478615921 case OnePossibleValueYes:
1478715922 opv_op1 = true;
1478815923 break;
......@@ -14793,7 +15928,7 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
1479315928 bool opv_op2;
1479415929 switch (type_has_one_possible_value(ira->codegen, op2->value->type)) {
1479515930 case OnePossibleValueInvalid:
14796 return ira->codegen->invalid_instruction;
15931 return ira->codegen->invalid_inst_gen;
1479715932 case OnePossibleValueYes:
1479815933 opv_op2 = true;
1479915934 break;
......@@ -14803,22 +15938,22 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
1480315938 }
1480415939 Cmp op1_cmp_zero;
1480515940 bool have_op1_cmp_zero = false;
14806 if ((err = lazy_cmp_zero(source_instr->source_node, op1->value, &op1_cmp_zero))) {
14807 if (err != ErrorNotLazy) return ira->codegen->invalid_instruction;
15941 if ((err = lazy_cmp_zero(ira->codegen, source_instr->source_node, op1->value, &op1_cmp_zero))) {
15942 if (err != ErrorNotLazy) return ira->codegen->invalid_inst_gen;
1480815943 } else {
1480915944 have_op1_cmp_zero = true;
1481015945 }
1481115946 Cmp op2_cmp_zero;
1481215947 bool have_op2_cmp_zero = false;
14813 if ((err = lazy_cmp_zero(source_instr->source_node, op2->value, &op2_cmp_zero))) {
14814 if (err != ErrorNotLazy) return ira->codegen->invalid_instruction;
15948 if ((err = lazy_cmp_zero(ira->codegen, source_instr->source_node, op2->value, &op2_cmp_zero))) {
15949 if (err != ErrorNotLazy) return ira->codegen->invalid_inst_gen;
1481515950 } else {
1481615951 have_op2_cmp_zero = true;
1481715952 }
1481815953 if (((opv_op1 || instr_is_comptime(op1)) && (opv_op2 || instr_is_comptime(op2))) ||
1481915954 (have_op1_cmp_zero && have_op2_cmp_zero))
1482015955 {
14821 IrInstruction *result_instruction = ir_const(ira, source_instr, result_type);
15956 IrInstGen *result_instruction = ir_const(ira, source_instr, result_type);
1482215957 ZigValue *out_val = result_instruction->value;
1482315958 if (result_type->id == ZigTypeIdVector) {
1482415959 size_t len = result_type->data.vector.len;
......@@ -14836,7 +15971,7 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
1483615971 if (msg != nullptr) {
1483715972 add_error_note(ira->codegen, msg, source_instr->source_node,
1483815973 buf_sprintf("when computing vector element at index %" ZIG_PRI_usize, i));
14839 return ira->codegen->invalid_instruction;
15974 return ira->codegen->invalid_inst_gen;
1484015975 }
1484115976 }
1484215977 out_val->type = result_type;
......@@ -14845,7 +15980,7 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
1484515980 if (ir_eval_bin_op_cmp_scalar(ira, source_instr, op1->value, op_id,
1484615981 op2->value, out_val) != nullptr)
1484715982 {
14848 return ira->codegen->invalid_instruction;
15983 return ira->codegen->invalid_inst_gen;
1484915984 }
1485015985 }
1485115986 return result_instruction;
......@@ -14939,10 +16074,10 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
1493916074 }
1494016075 ZigType *dest_type = (result_type->id == ZigTypeIdVector) ?
1494116076 get_vector_type(ira->codegen, result_type->data.vector.len, dest_scalar_type) : dest_scalar_type;
14942 IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, dest_type);
14943 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, dest_type);
16077 IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, dest_type);
16078 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, dest_type);
1494416079 if (type_is_invalid(casted_op1->value->type) || type_is_invalid(casted_op2->value->type))
14945 return ira->codegen->invalid_instruction;
16080 return ira->codegen->invalid_inst_gen;
1494616081 return ir_build_bin_op_gen(ira, source_instr, result_type, op_id, casted_op1, casted_op2, true);
1494716082 }
1494816083
......@@ -14972,12 +16107,12 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
1497216107 if (instr_is_comptime(op1)) {
1497316108 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefOk);
1497416109 if (op1_val == nullptr)
14975 return ira->codegen->invalid_instruction;
16110 return ira->codegen->invalid_inst_gen;
1497616111 if (op1_val->special == ConstValSpecialUndef)
1497716112 return ir_const_undef(ira, source_instr, ira->codegen->builtin_types.entry_bool);
1497816113 if (result_type->id == ZigTypeIdVector) {
14979 ir_add_error(ira, op1, buf_sprintf("compiler bug: TODO: support comptime vector here"));
14980 return ira->codegen->invalid_instruction;
16114 ir_add_error(ira, &op1->base, buf_sprintf("compiler bug: TODO: support comptime vector here"));
16115 return ira->codegen->invalid_inst_gen;
1498116116 }
1498216117 bool is_unsigned;
1498316118 if (op1_is_float) {
......@@ -15016,12 +16151,12 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
1501616151 if (instr_is_comptime(op2)) {
1501716152 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefOk);
1501816153 if (op2_val == nullptr)
15019 return ira->codegen->invalid_instruction;
16154 return ira->codegen->invalid_inst_gen;
1502016155 if (op2_val->special == ConstValSpecialUndef)
1502116156 return ir_const_undef(ira, source_instr, ira->codegen->builtin_types.entry_bool);
1502216157 if (result_type->id == ZigTypeIdVector) {
15023 ir_add_error(ira, op2, buf_sprintf("compiler bug: TODO: support comptime vector here"));
15024 return ira->codegen->invalid_instruction;
16158 ir_add_error(ira, &op2->base, buf_sprintf("compiler bug: TODO: support comptime vector here"));
16159 return ira->codegen->invalid_inst_gen;
1502516160 }
1502616161 bool is_unsigned;
1502716162 if (op2_is_float) {
......@@ -15062,35 +16197,35 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
1506216197 ZigType *dest_type = (result_type->id == ZigTypeIdVector) ?
1506316198 get_vector_type(ira->codegen, result_type->data.vector.len, dest_scalar_type) : dest_scalar_type;
1506416199
15065 IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, dest_type);
16200 IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, dest_type);
1506616201 if (type_is_invalid(casted_op1->value->type))
15067 return ira->codegen->invalid_instruction;
15068 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, dest_type);
16202 return ira->codegen->invalid_inst_gen;
16203 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, dest_type);
1506916204 if (type_is_invalid(casted_op2->value->type))
15070 return ira->codegen->invalid_instruction;
16205 return ira->codegen->invalid_inst_gen;
1507116206 return ir_build_bin_op_gen(ira, source_instr, result_type, op_id, casted_op1, casted_op2, true);
1507216207}
1507316208
15074static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *bin_op_instruction) {
15075 IrInstruction *op1 = bin_op_instruction->op1->child;
16209static IrInstGen *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstSrcBinOp *bin_op_instruction) {
16210 IrInstGen *op1 = bin_op_instruction->op1->child;
1507616211 if (type_is_invalid(op1->value->type))
15077 return ira->codegen->invalid_instruction;
16212 return ira->codegen->invalid_inst_gen;
1507816213
15079 IrInstruction *op2 = bin_op_instruction->op2->child;
16214 IrInstGen *op2 = bin_op_instruction->op2->child;
1508016215 if (type_is_invalid(op2->value->type))
15081 return ira->codegen->invalid_instruction;
16216 return ira->codegen->invalid_inst_gen;
1508216217
15083 AstNode *source_node = bin_op_instruction->base.source_node;
16218 AstNode *source_node = bin_op_instruction->base.base.source_node;
1508416219
1508516220 IrBinOp op_id = bin_op_instruction->op_id;
1508616221 bool is_equality_cmp = (op_id == IrBinOpCmpEq || op_id == IrBinOpCmpNotEq);
1508716222 if (is_equality_cmp && op1->value->type->id == ZigTypeIdNull && op2->value->type->id == ZigTypeIdNull) {
15088 return ir_const_bool(ira, &bin_op_instruction->base, (op_id == IrBinOpCmpEq));
16223 return ir_const_bool(ira, &bin_op_instruction->base.base, (op_id == IrBinOpCmpEq));
1508916224 } else if (is_equality_cmp &&
1509016225 ((op1->value->type->id == ZigTypeIdNull && op2->value->type->id == ZigTypeIdOptional) ||
1509116226 (op2->value->type->id == ZigTypeIdNull && op1->value->type->id == ZigTypeIdOptional)))
1509216227 {
15093 IrInstruction *maybe_op;
16228 IrInstGen *maybe_op;
1509416229 if (op1->value->type->id == ZigTypeIdNull) {
1509516230 maybe_op = op2;
1509616231 } else if (op2->value->type->id == ZigTypeIdNull) {
......@@ -15101,21 +16236,16 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
1510116236 if (instr_is_comptime(maybe_op)) {
1510216237 ZigValue *maybe_val = ir_resolve_const(ira, maybe_op, UndefBad);
1510316238 if (!maybe_val)
15104 return ira->codegen->invalid_instruction;
16239 return ira->codegen->invalid_inst_gen;
1510516240 bool is_null = optional_value_is_null(maybe_val);
1510616241 bool bool_result = (op_id == IrBinOpCmpEq) ? is_null : !is_null;
15107 return ir_const_bool(ira, &bin_op_instruction->base, bool_result);
16242 return ir_const_bool(ira, &bin_op_instruction->base.base, bool_result);
1510816243 }
1510916244
15110 IrInstruction *is_non_null = ir_build_test_nonnull(&ira->new_irb, bin_op_instruction->base.scope,
15111 source_node, maybe_op);
15112 is_non_null->value->type = ira->codegen->builtin_types.entry_bool;
16245 IrInstGen *is_non_null = ir_build_test_non_null_gen(ira, &bin_op_instruction->base.base, maybe_op);
1511316246
1511416247 if (op_id == IrBinOpCmpEq) {
15115 IrInstruction *result = ir_build_bool_not(&ira->new_irb, bin_op_instruction->base.scope,
15116 bin_op_instruction->base.source_node, is_non_null);
15117 result->value->type = ira->codegen->builtin_types.entry_bool;
15118 return result;
16248 return ir_build_bool_not_gen(ira, &bin_op_instruction->base.base, is_non_null);
1511916249 } else {
1512016250 return is_non_null;
1512116251 }
......@@ -15125,7 +16255,7 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
1512516255 (op2->value->type->id == ZigTypeIdNull && op1->value->type->id == ZigTypeIdPointer &&
1512616256 op1->value->type->data.pointer.ptr_len == PtrLenC)))
1512716257 {
15128 IrInstruction *c_ptr_op;
16258 IrInstGen *c_ptr_op;
1512916259 if (op1->value->type->id == ZigTypeIdNull) {
1513016260 c_ptr_op = op2;
1513116261 } else if (op2->value->type->id == ZigTypeIdNull) {
......@@ -15136,24 +16266,19 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
1513616266 if (instr_is_comptime(c_ptr_op)) {
1513716267 ZigValue *c_ptr_val = ir_resolve_const(ira, c_ptr_op, UndefOk);
1513816268 if (!c_ptr_val)
15139 return ira->codegen->invalid_instruction;
16269 return ira->codegen->invalid_inst_gen;
1514016270 if (c_ptr_val->special == ConstValSpecialUndef)
15141 return ir_const_undef(ira, &bin_op_instruction->base, ira->codegen->builtin_types.entry_bool);
16271 return ir_const_undef(ira, &bin_op_instruction->base.base, ira->codegen->builtin_types.entry_bool);
1514216272 bool is_null = c_ptr_val->data.x_ptr.special == ConstPtrSpecialNull ||
1514316273 (c_ptr_val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr &&
1514416274 c_ptr_val->data.x_ptr.data.hard_coded_addr.addr == 0);
1514516275 bool bool_result = (op_id == IrBinOpCmpEq) ? is_null : !is_null;
15146 return ir_const_bool(ira, &bin_op_instruction->base, bool_result);
16276 return ir_const_bool(ira, &bin_op_instruction->base.base, bool_result);
1514716277 }
15148 IrInstruction *is_non_null = ir_build_test_nonnull(&ira->new_irb, bin_op_instruction->base.scope,
15149 source_node, c_ptr_op);
15150 is_non_null->value->type = ira->codegen->builtin_types.entry_bool;
16278 IrInstGen *is_non_null = ir_build_test_non_null_gen(ira, &bin_op_instruction->base.base, c_ptr_op);
1515116279
1515216280 if (op_id == IrBinOpCmpEq) {
15153 IrInstruction *result = ir_build_bool_not(&ira->new_irb, bin_op_instruction->base.scope,
15154 bin_op_instruction->base.source_node, is_non_null);
15155 result->value->type = ira->codegen->builtin_types.entry_bool;
15156 return result;
16281 return ir_build_bool_not_gen(ira, &bin_op_instruction->base.base, is_non_null);
1515716282 } else {
1515816283 return is_non_null;
1515916284 }
......@@ -15161,61 +16286,57 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
1516116286 ZigType *non_null_type = (op1->value->type->id == ZigTypeIdNull) ? op2->value->type : op1->value->type;
1516216287 ir_add_error_node(ira, source_node, buf_sprintf("comparison of '%s' with null",
1516316288 buf_ptr(&non_null_type->name)));
15164 return ira->codegen->invalid_instruction;
16289 return ira->codegen->invalid_inst_gen;
1516516290 } else if (is_equality_cmp && (
1516616291 (op1->value->type->id == ZigTypeIdEnumLiteral && op2->value->type->id == ZigTypeIdUnion) ||
1516716292 (op2->value->type->id == ZigTypeIdEnumLiteral && op1->value->type->id == ZigTypeIdUnion)))
1516816293 {
1516916294 // Support equality comparison between a union's tag value and a enum literal
15170 IrInstruction *union_val = op1->value->type->id == ZigTypeIdUnion ? op1 : op2;
15171 IrInstruction *enum_val = op1->value->type->id == ZigTypeIdUnion ? op2 : op1;
16295 IrInstGen *union_val = op1->value->type->id == ZigTypeIdUnion ? op1 : op2;
16296 IrInstGen *enum_val = op1->value->type->id == ZigTypeIdUnion ? op2 : op1;
1517216297
1517316298 ZigType *tag_type = union_val->value->type->data.unionation.tag_type;
1517416299 assert(tag_type != nullptr);
1517516300
15176 IrInstruction *casted_union = ir_implicit_cast(ira, union_val, tag_type);
16301 IrInstGen *casted_union = ir_implicit_cast(ira, union_val, tag_type);
1517716302 if (type_is_invalid(casted_union->value->type))
15178 return ira->codegen->invalid_instruction;
16303 return ira->codegen->invalid_inst_gen;
1517916304
15180 IrInstruction *casted_val = ir_implicit_cast(ira, enum_val, tag_type);
16305 IrInstGen *casted_val = ir_implicit_cast(ira, enum_val, tag_type);
1518116306 if (type_is_invalid(casted_val->value->type))
15182 return ira->codegen->invalid_instruction;
16307 return ira->codegen->invalid_inst_gen;
1518316308
1518416309 if (instr_is_comptime(casted_union)) {
1518516310 ZigValue *const_union_val = ir_resolve_const(ira, casted_union, UndefBad);
1518616311 if (!const_union_val)
15187 return ira->codegen->invalid_instruction;
16312 return ira->codegen->invalid_inst_gen;
1518816313
1518916314 ZigValue *const_enum_val = ir_resolve_const(ira, casted_val, UndefBad);
1519016315 if (!const_enum_val)
15191 return ira->codegen->invalid_instruction;
16316 return ira->codegen->invalid_inst_gen;
1519216317
1519316318 Cmp cmp_result = bigint_cmp(&const_union_val->data.x_union.tag, &const_enum_val->data.x_enum_tag);
1519416319 bool bool_result = (op_id == IrBinOpCmpEq) ? cmp_result == CmpEQ : cmp_result != CmpEQ;
1519516320
15196 return ir_const_bool(ira, &bin_op_instruction->base, bool_result);
16321 return ir_const_bool(ira, &bin_op_instruction->base.base, bool_result);
1519716322 }
1519816323
15199 IrInstruction *result = ir_build_bin_op(&ira->new_irb,
15200 bin_op_instruction->base.scope, bin_op_instruction->base.source_node,
16324 return ir_build_bin_op_gen(ira, &bin_op_instruction->base.base, ira->codegen->builtin_types.entry_bool,
1520116325 op_id, casted_union, casted_val, bin_op_instruction->safety_check_on);
15202 result->value->type = ira->codegen->builtin_types.entry_bool;
15203
15204 return result;
1520516326 }
1520616327
1520716328 if (op1->value->type->id == ZigTypeIdErrorSet && op2->value->type->id == ZigTypeIdErrorSet) {
1520816329 if (!is_equality_cmp) {
1520916330 ir_add_error_node(ira, source_node, buf_sprintf("operator not allowed for errors"));
15210 return ira->codegen->invalid_instruction;
16331 return ira->codegen->invalid_inst_gen;
1521116332 }
1521216333 ZigType *intersect_type = get_error_set_intersection(ira, op1->value->type, op2->value->type, source_node);
1521316334 if (type_is_invalid(intersect_type)) {
15214 return ira->codegen->invalid_instruction;
16335 return ira->codegen->invalid_inst_gen;
1521516336 }
1521616337
1521716338 if (!resolve_inferred_error_set(ira->codegen, intersect_type, source_node)) {
15218 return ira->codegen->invalid_instruction;
16339 return ira->codegen->invalid_inst_gen;
1521916340 }
1522016341
1522116342 // exception if one of the operators has the type of the empty error set, we allow the comparison
......@@ -15232,7 +16353,7 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
1523216353 } else {
1523316354 zig_unreachable();
1523416355 }
15235 return ir_const_bool(ira, &bin_op_instruction->base, answer);
16356 return ir_const_bool(ira, &bin_op_instruction->base.base, answer);
1523616357 }
1523716358
1523816359 if (!type_is_global_error_set(intersect_type)) {
......@@ -15240,7 +16361,7 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
1524016361 ir_add_error_node(ira, source_node,
1524116362 buf_sprintf("error sets '%s' and '%s' have no common errors",
1524216363 buf_ptr(&op1->value->type->name), buf_ptr(&op2->value->type->name)));
15243 return ira->codegen->invalid_instruction;
16364 return ira->codegen->invalid_inst_gen;
1524416365 }
1524516366 if (op1->value->type->data.error_set.err_count == 1 && op2->value->type->data.error_set.err_count == 1) {
1524616367 bool are_equal = true;
......@@ -15252,17 +16373,17 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
1525216373 } else {
1525316374 zig_unreachable();
1525416375 }
15255 return ir_const_bool(ira, &bin_op_instruction->base, answer);
16376 return ir_const_bool(ira, &bin_op_instruction->base.base, answer);
1525616377 }
1525716378 }
1525816379
1525916380 if (instr_is_comptime(op1) && instr_is_comptime(op2)) {
1526016381 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);
1526116382 if (op1_val == nullptr)
15262 return ira->codegen->invalid_instruction;
16383 return ira->codegen->invalid_inst_gen;
1526316384 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);
1526416385 if (op2_val == nullptr)
15265 return ira->codegen->invalid_instruction;
16386 return ira->codegen->invalid_inst_gen;
1526616387
1526716388 bool answer;
1526816389 bool are_equal = op1_val->data.x_err_set->value == op2_val->data.x_err_set->value;
......@@ -15274,27 +16395,24 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
1527416395 zig_unreachable();
1527516396 }
1527616397
15277 return ir_const_bool(ira, &bin_op_instruction->base, answer);
16398 return ir_const_bool(ira, &bin_op_instruction->base.base, answer);
1527816399 }
1527916400
15280 IrInstruction *result = ir_build_bin_op(&ira->new_irb,
15281 bin_op_instruction->base.scope, bin_op_instruction->base.source_node,
16401 return ir_build_bin_op_gen(ira, &bin_op_instruction->base.base, ira->codegen->builtin_types.entry_bool,
1528216402 op_id, op1, op2, bin_op_instruction->safety_check_on);
15283 result->value->type = ira->codegen->builtin_types.entry_bool;
15284 return result;
1528516403 }
1528616404
1528716405 if (type_is_numeric(op1->value->type) && type_is_numeric(op2->value->type)) {
1528816406 // This operation allows any combination of integer and float types, regardless of the
1528916407 // signed-ness, comptime-ness, and bit-width. So peer type resolution is incorrect for
1529016408 // numeric types.
15291 return ir_analyze_bin_op_cmp_numeric(ira, &bin_op_instruction->base, op1, op2, op_id);
16409 return ir_analyze_bin_op_cmp_numeric(ira, &bin_op_instruction->base.base, op1, op2, op_id);
1529216410 }
1529316411
15294 IrInstruction *instructions[] = {op1, op2};
16412 IrInstGen *instructions[] = {op1, op2};
1529516413 ZigType *resolved_type = ir_resolve_peer_types(ira, source_node, nullptr, instructions, 2);
1529616414 if (type_is_invalid(resolved_type))
15297 return ira->codegen->invalid_instruction;
16415 return ira->codegen->invalid_inst_gen;
1529816416
1529916417 bool operator_allowed;
1530016418 switch (resolved_type->id) {
......@@ -15342,21 +16460,21 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
1534216460 if (!operator_allowed) {
1534316461 ir_add_error_node(ira, source_node,
1534416462 buf_sprintf("operator not allowed for type '%s'", buf_ptr(&resolved_type->name)));
15345 return ira->codegen->invalid_instruction;
16463 return ira->codegen->invalid_inst_gen;
1534616464 }
1534716465
15348 IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, resolved_type);
15349 if (casted_op1 == ira->codegen->invalid_instruction)
15350 return ira->codegen->invalid_instruction;
16466 IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, resolved_type);
16467 if (type_is_invalid(casted_op1->value->type))
16468 return ira->codegen->invalid_inst_gen;
1535116469
15352 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);
15353 if (casted_op2 == ira->codegen->invalid_instruction)
15354 return ira->codegen->invalid_instruction;
16470 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);
16471 if (type_is_invalid(casted_op2->value->type))
16472 return ira->codegen->invalid_inst_gen;
1535516473
1535616474 bool one_possible_value;
1535716475 switch (type_has_one_possible_value(ira->codegen, resolved_type)) {
1535816476 case OnePossibleValueInvalid:
15359 return ira->codegen->invalid_instruction;
16477 return ira->codegen->invalid_inst_gen;
1536016478 case OnePossibleValueYes:
1536116479 one_possible_value = true;
1536216480 break;
......@@ -15368,20 +16486,20 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
1536816486 if (one_possible_value || (instr_is_comptime(casted_op1) && instr_is_comptime(casted_op2))) {
1536916487 ZigValue *op1_val = one_possible_value ? casted_op1->value : ir_resolve_const(ira, casted_op1, UndefBad);
1537016488 if (op1_val == nullptr)
15371 return ira->codegen->invalid_instruction;
16489 return ira->codegen->invalid_inst_gen;
1537216490 ZigValue *op2_val = one_possible_value ? casted_op2->value : ir_resolve_const(ira, casted_op2, UndefBad);
1537316491 if (op2_val == nullptr)
15374 return ira->codegen->invalid_instruction;
16492 return ira->codegen->invalid_inst_gen;
1537516493 if (resolved_type->id != ZigTypeIdVector)
1537616494 return ir_evaluate_bin_op_cmp(ira, resolved_type, op1_val, op2_val, bin_op_instruction, op_id, one_possible_value);
15377 IrInstruction *result = ir_const(ira, &bin_op_instruction->base,
16495 IrInstGen *result = ir_const(ira, &bin_op_instruction->base.base,
1537816496 get_vector_type(ira->codegen, resolved_type->data.vector.len, ira->codegen->builtin_types.entry_bool));
1537916497 result->value->data.x_array.data.s_none.elements =
1538016498 create_const_vals(resolved_type->data.vector.len);
1538116499
1538216500 expand_undef_array(ira->codegen, result->value);
1538316501 for (size_t i = 0;i < resolved_type->data.vector.len;i++) {
15384 IrInstruction *cur_res = ir_evaluate_bin_op_cmp(ira, resolved_type->data.vector.elem_type,
16502 IrInstGen *cur_res = ir_evaluate_bin_op_cmp(ira, resolved_type->data.vector.elem_type,
1538516503 &op1_val->data.x_array.data.s_none.elements[i],
1538616504 &op2_val->data.x_array.data.s_none.elements[i],
1538716505 bin_op_instruction, op_id, one_possible_value);
......@@ -15390,19 +16508,14 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
1539016508 return result;
1539116509 }
1539216510
15393 IrInstruction *result = ir_build_bin_op(&ira->new_irb,
15394 bin_op_instruction->base.scope, bin_op_instruction->base.source_node,
16511 ZigType *res_type = (resolved_type->id == ZigTypeIdVector) ?
16512 get_vector_type(ira->codegen, resolved_type->data.vector.len, ira->codegen->builtin_types.entry_bool) :
16513 ira->codegen->builtin_types.entry_bool;
16514 return ir_build_bin_op_gen(ira, &bin_op_instruction->base.base, res_type,
1539516515 op_id, casted_op1, casted_op2, bin_op_instruction->safety_check_on);
15396 if (resolved_type->id == ZigTypeIdVector) {
15397 result->value->type = get_vector_type(ira->codegen, resolved_type->data.vector.len,
15398 ira->codegen->builtin_types.entry_bool);
15399 } else {
15400 result->value->type = ira->codegen->builtin_types.entry_bool;
15401 }
15402 return result;
1540316516}
1540416517
15405static ErrorMsg *ir_eval_math_op_scalar(IrAnalyze *ira, IrInstruction *source_instr, ZigType *type_entry,
16518static ErrorMsg *ir_eval_math_op_scalar(IrAnalyze *ira, IrInst* source_instr, ZigType *type_entry,
1540616519 ZigValue *op1_val, IrBinOp op_id, ZigValue *op2_val, ZigValue *out_val)
1540716520{
1540816521 bool is_int;
......@@ -15582,10 +16695,10 @@ static ErrorMsg *ir_eval_math_op_scalar(IrAnalyze *ira, IrInstruction *source_in
1558216695}
1558316696
1558416697// This works on operands that have already been checked to be comptime known.
15585static IrInstruction *ir_analyze_math_op(IrAnalyze *ira, IrInstruction *source_instr,
16698static IrInstGen *ir_analyze_math_op(IrAnalyze *ira, IrInst* source_instr,
1558616699 ZigType *type_entry, ZigValue *op1_val, IrBinOp op_id, ZigValue *op2_val)
1558716700{
15588 IrInstruction *result_instruction = ir_const(ira, source_instr, type_entry);
16701 IrInstGen *result_instruction = ir_const(ira, source_instr, type_entry);
1558916702 ZigValue *out_val = result_instruction->value;
1559016703 if (type_entry->id == ZigTypeIdVector) {
1559116704 expand_undef_array(ira->codegen, op1_val);
......@@ -15606,43 +16719,43 @@ static IrInstruction *ir_analyze_math_op(IrAnalyze *ira, IrInstruction *source_i
1560616719 if (msg != nullptr) {
1560716720 add_error_note(ira->codegen, msg, source_instr->source_node,
1560816721 buf_sprintf("when computing vector element at index %" ZIG_PRI_usize, i));
15609 return ira->codegen->invalid_instruction;
16722 return ira->codegen->invalid_inst_gen;
1561016723 }
1561116724 }
1561216725 out_val->type = type_entry;
1561316726 out_val->special = ConstValSpecialStatic;
1561416727 } else {
1561516728 if (ir_eval_math_op_scalar(ira, source_instr, type_entry, op1_val, op_id, op2_val, out_val) != nullptr) {
15616 return ira->codegen->invalid_instruction;
16729 return ira->codegen->invalid_inst_gen;
1561716730 }
1561816731 }
1561916732 return ir_implicit_cast(ira, result_instruction, type_entry);
1562016733}
1562116734
15622static IrInstruction *ir_analyze_bit_shift(IrAnalyze *ira, IrInstructionBinOp *bin_op_instruction) {
15623 IrInstruction *op1 = bin_op_instruction->op1->child;
16735static IrInstGen *ir_analyze_bit_shift(IrAnalyze *ira, IrInstSrcBinOp *bin_op_instruction) {
16736 IrInstGen *op1 = bin_op_instruction->op1->child;
1562416737 if (type_is_invalid(op1->value->type))
15625 return ira->codegen->invalid_instruction;
16738 return ira->codegen->invalid_inst_gen;
1562616739
1562716740 if (op1->value->type->id != ZigTypeIdInt && op1->value->type->id != ZigTypeIdComptimeInt) {
15628 ir_add_error(ira, bin_op_instruction->op1,
16741 ir_add_error(ira, &bin_op_instruction->op1->base,
1562916742 buf_sprintf("bit shifting operation expected integer type, found '%s'",
1563016743 buf_ptr(&op1->value->type->name)));
15631 return ira->codegen->invalid_instruction;
16744 return ira->codegen->invalid_inst_gen;
1563216745 }
1563316746
15634 IrInstruction *op2 = bin_op_instruction->op2->child;
16747 IrInstGen *op2 = bin_op_instruction->op2->child;
1563516748 if (type_is_invalid(op2->value->type))
15636 return ira->codegen->invalid_instruction;
16749 return ira->codegen->invalid_inst_gen;
1563716750
1563816751 if (op2->value->type->id != ZigTypeIdInt && op2->value->type->id != ZigTypeIdComptimeInt) {
15639 ir_add_error(ira, bin_op_instruction->op2,
16752 ir_add_error(ira, &bin_op_instruction->op2->base,
1564016753 buf_sprintf("shift amount has to be an integer type, but found '%s'",
1564116754 buf_ptr(&op2->value->type->name)));
15642 return ira->codegen->invalid_instruction;
16755 return ira->codegen->invalid_inst_gen;
1564316756 }
1564416757
15645 IrInstruction *casted_op2;
16758 IrInstGen *casted_op2;
1564616759 IrBinOp op_id = bin_op_instruction->op_id;
1564716760 if (op1->value->type->id == ZigTypeIdComptimeInt) {
1564816761 casted_op2 = op2;
......@@ -15654,8 +16767,8 @@ static IrInstruction *ir_analyze_bit_shift(IrAnalyze *ira, IrInstructionBinOp *b
1565416767 if (casted_op2->value->data.x_bigint.is_negative) {
1565516768 Buf *val_buf = buf_alloc();
1565616769 bigint_append_buf(val_buf, &casted_op2->value->data.x_bigint, 10);
15657 ir_add_error(ira, casted_op2, buf_sprintf("shift by negative value %s", buf_ptr(val_buf)));
15658 return ira->codegen->invalid_instruction;
16770 ir_add_error(ira, &casted_op2->base, buf_sprintf("shift by negative value %s", buf_ptr(val_buf)));
16771 return ira->codegen->invalid_inst_gen;
1565916772 }
1566016773 } else {
1566116774 ZigType *shift_amt_type = get_smallest_unsigned_int_type(ira->codegen,
......@@ -15665,57 +16778,51 @@ static IrInstruction *ir_analyze_bit_shift(IrAnalyze *ira, IrInstructionBinOp *b
1566516778
1566616779 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);
1566716780 if (op2_val == nullptr)
15668 return ira->codegen->invalid_instruction;
16781 return ira->codegen->invalid_inst_gen;
1566916782 if (!bigint_fits_in_bits(&op2_val->data.x_bigint,
1567016783 shift_amt_type->data.integral.bit_count,
1567116784 op2_val->data.x_bigint.is_negative)) {
1567216785 Buf *val_buf = buf_alloc();
1567316786 bigint_append_buf(val_buf, &op2_val->data.x_bigint, 10);
1567416787 ErrorMsg* msg = ir_add_error(ira,
15675 &bin_op_instruction->base,
16788 &bin_op_instruction->base.base,
1567616789 buf_sprintf("RHS of shift is too large for LHS type"));
1567716790 add_error_note(
1567816791 ira->codegen,
1567916792 msg,
15680 op2->source_node,
16793 op2->base.source_node,
1568116794 buf_sprintf("value %s cannot fit into type %s",
1568216795 buf_ptr(val_buf),
1568316796 buf_ptr(&shift_amt_type->name)));
15684 return ira->codegen->invalid_instruction;
16797 return ira->codegen->invalid_inst_gen;
1568516798 }
1568616799 }
1568716800
1568816801 casted_op2 = ir_implicit_cast(ira, op2, shift_amt_type);
15689 if (casted_op2 == ira->codegen->invalid_instruction)
15690 return ira->codegen->invalid_instruction;
16802 if (type_is_invalid(casted_op2->value->type))
16803 return ira->codegen->invalid_inst_gen;
1569116804 }
1569216805
1569316806 if (instr_is_comptime(op1) && instr_is_comptime(casted_op2)) {
1569416807 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);
1569516808 if (op1_val == nullptr)
15696 return ira->codegen->invalid_instruction;
16809 return ira->codegen->invalid_inst_gen;
1569716810
1569816811 ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);
1569916812 if (op2_val == nullptr)
15700 return ira->codegen->invalid_instruction;
16813 return ira->codegen->invalid_inst_gen;
1570116814
15702 return ir_analyze_math_op(ira, &bin_op_instruction->base, op1->value->type, op1_val, op_id, op2_val);
16815 return ir_analyze_math_op(ira, &bin_op_instruction->base.base, op1->value->type, op1_val, op_id, op2_val);
1570316816 } else if (op1->value->type->id == ZigTypeIdComptimeInt) {
15704 ir_add_error(ira, &bin_op_instruction->base,
16817 ir_add_error(ira, &bin_op_instruction->base.base,
1570516818 buf_sprintf("LHS of shift must be an integer type, or RHS must be compile-time known"));
15706 return ira->codegen->invalid_instruction;
16819 return ira->codegen->invalid_inst_gen;
1570716820 } else if (instr_is_comptime(casted_op2) && bigint_cmp_zero(&casted_op2->value->data.x_bigint) == CmpEQ) {
15708 IrInstruction *result = ir_build_cast(&ira->new_irb, bin_op_instruction->base.scope,
15709 bin_op_instruction->base.source_node, op1->value->type, op1, CastOpNoop);
15710 result->value->type = op1->value->type;
15711 return result;
16821 return ir_build_cast(ira, &bin_op_instruction->base.base, op1->value->type, op1, CastOpNoop);
1571216822 }
1571316823
15714 IrInstruction *result = ir_build_bin_op(&ira->new_irb, bin_op_instruction->base.scope,
15715 bin_op_instruction->base.source_node, op_id,
15716 op1, casted_op2, bin_op_instruction->safety_check_on);
15717 result->value->type = op1->value->type;
15718 return result;
16824 return ir_build_bin_op_gen(ira, &bin_op_instruction->base.base, op1->value->type,
16825 op_id, op1, casted_op2, bin_op_instruction->safety_check_on);
1571916826}
1572016827
1572116828static bool ok_float_op(IrBinOp op) {
......@@ -15779,24 +16886,24 @@ static bool is_pointer_arithmetic_allowed(ZigType *lhs_type, IrBinOp op) {
1577916886 zig_unreachable();
1578016887}
1578116888
15782static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp *instruction) {
16889static IrInstGen *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstSrcBinOp *instruction) {
1578316890 Error err;
1578416891
15785 IrInstruction *op1 = instruction->op1->child;
16892 IrInstGen *op1 = instruction->op1->child;
1578616893 if (type_is_invalid(op1->value->type))
15787 return ira->codegen->invalid_instruction;
16894 return ira->codegen->invalid_inst_gen;
1578816895
15789 IrInstruction *op2 = instruction->op2->child;
16896 IrInstGen *op2 = instruction->op2->child;
1579016897 if (type_is_invalid(op2->value->type))
15791 return ira->codegen->invalid_instruction;
16898 return ira->codegen->invalid_inst_gen;
1579216899
1579316900 IrBinOp op_id = instruction->op_id;
1579416901
1579516902 // look for pointer math
1579616903 if (is_pointer_arithmetic_allowed(op1->value->type, op_id)) {
15797 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, ira->codegen->builtin_types.entry_usize);
16904 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, ira->codegen->builtin_types.entry_usize);
1579816905 if (type_is_invalid(casted_op2->value->type))
15799 return ira->codegen->invalid_instruction;
16906 return ira->codegen->invalid_inst_gen;
1580016907
1580116908 // If either operand is undef, result is undef.
1580216909 ZigValue *op1_val = nullptr;
......@@ -15804,28 +16911,28 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
1580416911 if (instr_is_comptime(op1)) {
1580516912 op1_val = ir_resolve_const(ira, op1, UndefOk);
1580616913 if (op1_val == nullptr)
15807 return ira->codegen->invalid_instruction;
16914 return ira->codegen->invalid_inst_gen;
1580816915 if (op1_val->special == ConstValSpecialUndef)
15809 return ir_const_undef(ira, &instruction->base, op1->value->type);
16916 return ir_const_undef(ira, &instruction->base.base, op1->value->type);
1581016917 }
1581116918 if (instr_is_comptime(casted_op2)) {
1581216919 op2_val = ir_resolve_const(ira, casted_op2, UndefOk);
1581316920 if (op2_val == nullptr)
15814 return ira->codegen->invalid_instruction;
16921 return ira->codegen->invalid_inst_gen;
1581516922 if (op2_val->special == ConstValSpecialUndef)
15816 return ir_const_undef(ira, &instruction->base, op1->value->type);
16923 return ir_const_undef(ira, &instruction->base.base, op1->value->type);
1581716924 }
1581816925
1581916926 ZigType *elem_type = op1->value->type->data.pointer.child_type;
1582016927 if ((err = type_resolve(ira->codegen, elem_type, ResolveStatusSizeKnown)))
15821 return ira->codegen->invalid_instruction;
16928 return ira->codegen->invalid_inst_gen;
1582216929
1582316930 // NOTE: this variable is meaningful iff op2_val is not null!
1582416931 uint64_t byte_offset;
1582516932 if (op2_val != nullptr) {
1582616933 uint64_t elem_offset;
1582716934 if (!ir_resolve_usize(ira, casted_op2, &elem_offset))
15828 return ira->codegen->invalid_instruction;
16935 return ira->codegen->invalid_inst_gen;
1582916936
1583016937 byte_offset = type_size(ira->codegen, elem_type) * elem_offset;
1583116938 }
......@@ -15840,7 +16947,7 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
1584016947 {
1584116948 uint32_t align_bytes;
1584216949 if ((err = resolve_ptr_align(ira, op1->value->type, &align_bytes)))
15843 return ira->codegen->invalid_instruction;
16950 return ira->codegen->invalid_inst_gen;
1584416951
1584516952 // If the addend is not a comptime-known value we can still count on
1584616953 // it being a multiple of the type size
......@@ -15869,23 +16976,20 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
1586916976 } else {
1587016977 zig_unreachable();
1587116978 }
15872 IrInstruction *result = ir_const(ira, &instruction->base, result_type);
16979 IrInstGen *result = ir_const(ira, &instruction->base.base, result_type);
1587316980 result->value->data.x_ptr.special = ConstPtrSpecialHardCodedAddr;
1587416981 result->value->data.x_ptr.mut = ConstPtrMutRuntimeVar;
1587516982 result->value->data.x_ptr.data.hard_coded_addr.addr = new_addr;
1587616983 return result;
1587716984 }
1587816985
15879 IrInstruction *result = ir_build_bin_op(&ira->new_irb, instruction->base.scope,
15880 instruction->base.source_node, op_id, op1, casted_op2, true);
15881 result->value->type = result_type;
15882 return result;
16986 return ir_build_bin_op_gen(ira, &instruction->base.base, result_type, op_id, op1, casted_op2, true);
1588316987 }
1588416988
15885 IrInstruction *instructions[] = {op1, op2};
15886 ZigType *resolved_type = ir_resolve_peer_types(ira, instruction->base.source_node, nullptr, instructions, 2);
16989 IrInstGen *instructions[] = {op1, op2};
16990 ZigType *resolved_type = ir_resolve_peer_types(ira, instruction->base.base.source_node, nullptr, instructions, 2);
1588716991 if (type_is_invalid(resolved_type))
15888 return ira->codegen->invalid_instruction;
16992 return ira->codegen->invalid_inst_gen;
1588916993
1589016994 bool is_int = resolved_type->id == ZigTypeIdInt || resolved_type->id == ZigTypeIdComptimeInt;
1589116995 bool is_float = resolved_type->id == ZigTypeIdFloat || resolved_type->id == ZigTypeIdComptimeFloat;
......@@ -15905,11 +17009,11 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
1590517009 if (instr_is_comptime(op1) && instr_is_comptime(op2)) {
1590617010 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);
1590717011 if (op1_val == nullptr)
15908 return ira->codegen->invalid_instruction;
17012 return ira->codegen->invalid_inst_gen;
1590917013
1591017014 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);
1591117015 if (op2_val == nullptr)
15912 return ira->codegen->invalid_instruction;
17016 return ira->codegen->invalid_inst_gen;
1591317017
1591417018 if (bigint_cmp_zero(&op2_val->data.x_bigint) == CmpEQ) {
1591517019 // the division by zero error will be caught later, but we don't have a
......@@ -15928,11 +17032,11 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
1592817032 }
1592917033 }
1593017034 if (!ok) {
15931 ir_add_error(ira, &instruction->base,
17035 ir_add_error(ira, &instruction->base.base,
1593217036 buf_sprintf("division with '%s' and '%s': signed integers must use @divTrunc, @divFloor, or @divExact",
1593317037 buf_ptr(&op1->value->type->name),
1593417038 buf_ptr(&op2->value->type->name)));
15935 return ira->codegen->invalid_instruction;
17039 return ira->codegen->invalid_inst_gen;
1593617040 }
1593717041 } else {
1593817042 op_id = IrBinOpDivTrunc;
......@@ -15943,12 +17047,12 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
1594317047 if (instr_is_comptime(op1) && instr_is_comptime(op2)) {
1594417048 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);
1594517049 if (op1_val == nullptr)
15946 return ira->codegen->invalid_instruction;
17050 return ira->codegen->invalid_inst_gen;
1594717051
1594817052 if (is_int) {
1594917053 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);
1595017054 if (op2_val == nullptr)
15951 return ira->codegen->invalid_instruction;
17055 return ira->codegen->invalid_inst_gen;
1595217056
1595317057 if (bigint_cmp_zero(&op2->value->data.x_bigint) == CmpEQ) {
1595417058 // the division by zero error will be caught later, but we don't
......@@ -15962,13 +17066,13 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
1596217066 ok = bigint_cmp(&rem_result, &mod_result) == CmpEQ;
1596317067 }
1596417068 } else {
15965 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);
15966 if (casted_op2 == ira->codegen->invalid_instruction)
15967 return ira->codegen->invalid_instruction;
17069 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);
17070 if (type_is_invalid(casted_op2->value->type))
17071 return ira->codegen->invalid_inst_gen;
1596817072
1596917073 ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);
1597017074 if (op2_val == nullptr)
15971 return ira->codegen->invalid_instruction;
17075 return ira->codegen->invalid_inst_gen;
1597217076
1597317077 if (float_cmp_zero(casted_op2->value) == CmpEQ) {
1597417078 // the division by zero error will be caught later, but we don't
......@@ -15984,11 +17088,11 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
1598417088 }
1598517089 }
1598617090 if (!ok) {
15987 ir_add_error(ira, &instruction->base,
17091 ir_add_error(ira, &instruction->base.base,
1598817092 buf_sprintf("remainder division with '%s' and '%s': signed integers and floats must use @rem or @mod",
1598917093 buf_ptr(&op1->value->type->name),
1599017094 buf_ptr(&op2->value->type->name)));
15991 return ira->codegen->invalid_instruction;
17095 return ira->codegen->invalid_inst_gen;
1599217096 }
1599317097 }
1599417098 op_id = IrBinOpRemRem;
......@@ -16008,12 +17112,12 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
1600817112 }
1600917113 }
1601017114 if (!ok) {
16011 AstNode *source_node = instruction->base.source_node;
17115 AstNode *source_node = instruction->base.base.source_node;
1601217116 ir_add_error_node(ira, source_node,
1601317117 buf_sprintf("invalid operands to binary expression: '%s' and '%s'",
1601417118 buf_ptr(&op1->value->type->name),
1601517119 buf_ptr(&op2->value->type->name)));
16016 return ira->codegen->invalid_instruction;
17120 return ira->codegen->invalid_inst_gen;
1601717121 }
1601817122
1601917123 if (resolved_type->id == ZigTypeIdComptimeInt) {
......@@ -16026,33 +17130,31 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
1602617130 }
1602717131 }
1602817132
16029 IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, resolved_type);
16030 if (casted_op1 == ira->codegen->invalid_instruction)
16031 return ira->codegen->invalid_instruction;
17133 IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, resolved_type);
17134 if (type_is_invalid(casted_op1->value->type))
17135 return ira->codegen->invalid_inst_gen;
1603217136
16033 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);
16034 if (casted_op2 == ira->codegen->invalid_instruction)
16035 return ira->codegen->invalid_instruction;
17137 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);
17138 if (type_is_invalid(casted_op2->value->type))
17139 return ira->codegen->invalid_inst_gen;
1603617140
1603717141 if (instr_is_comptime(casted_op1) && instr_is_comptime(casted_op2)) {
1603817142 ZigValue *op1_val = ir_resolve_const(ira, casted_op1, UndefBad);
1603917143 if (op1_val == nullptr)
16040 return ira->codegen->invalid_instruction;
17144 return ira->codegen->invalid_inst_gen;
1604117145 ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);
1604217146 if (op2_val == nullptr)
16043 return ira->codegen->invalid_instruction;
17147 return ira->codegen->invalid_inst_gen;
1604417148
16045 return ir_analyze_math_op(ira, &instruction->base, resolved_type, op1_val, op_id, op2_val);
17149 return ir_analyze_math_op(ira, &instruction->base.base, resolved_type, op1_val, op_id, op2_val);
1604617150 }
1604717151
16048 IrInstruction *result = ir_build_bin_op(&ira->new_irb, instruction->base.scope,
16049 instruction->base.source_node, op_id, casted_op1, casted_op2, instruction->safety_check_on);
16050 result->value->type = resolved_type;
16051 return result;
17152 return ir_build_bin_op_gen(ira, &instruction->base.base, resolved_type,
17153 op_id, casted_op1, casted_op2, instruction->safety_check_on);
1605217154}
1605317155
16054static IrInstruction *ir_analyze_tuple_cat(IrAnalyze *ira, IrInstruction *source_instr,
16055 IrInstruction *op1, IrInstruction *op2)
17156static IrInstGen *ir_analyze_tuple_cat(IrAnalyze *ira, IrInst* source_instr,
17157 IrInstGen *op1, IrInstGen *op2)
1605617158{
1605717159 Error err;
1605817160 ZigType *op1_type = op1->value->type;
......@@ -16069,10 +17171,10 @@ static IrInstruction *ir_analyze_tuple_cat(IrAnalyze *ira, IrInstruction *source
1606917171 new_type->data.structure.special = StructSpecialInferredTuple;
1607017172 new_type->data.structure.resolve_status = ResolveStatusBeingInferred;
1607117173
16072 bool is_comptime = ir_should_inline(ira->new_irb.exec, source_instr->scope);
17174 bool is_comptime = ir_should_inline(ira->old_irb.exec, source_instr->scope);
1607317175
16074 IrInstruction *new_struct_ptr = ir_resolve_result(ira, source_instr, no_result_loc(),
16075 new_type, nullptr, false, false, true);
17176 IrInstGen *new_struct_ptr = ir_resolve_result(ira, source_instr, no_result_loc(),
17177 new_type, nullptr, false, true);
1607617178 uint32_t new_field_count = op1_field_count + op2_field_count;
1607717179
1607817180 new_type->data.structure.src_field_count = new_field_count;
......@@ -16095,13 +17197,13 @@ static IrInstruction *ir_analyze_tuple_cat(IrAnalyze *ira, IrInstruction *source
1609517197 new_field->is_comptime = src_field->is_comptime;
1609617198 }
1609717199 if ((err = type_resolve(ira->codegen, new_type, ResolveStatusZeroBitsKnown)))
16098 return ira->codegen->invalid_instruction;
17200 return ira->codegen->invalid_inst_gen;
1609917201
16100 ZigList<IrInstruction *> const_ptrs = {};
16101 IrInstruction *first_non_const_instruction = nullptr;
17202 ZigList<IrInstGen *> const_ptrs = {};
17203 IrInstGen *first_non_const_instruction = nullptr;
1610217204 for (uint32_t i = 0; i < new_field_count; i += 1) {
1610317205 TypeStructField *dst_field = new_type->data.structure.fields[i];
16104 IrInstruction *src_struct_op;
17206 IrInstGen *src_struct_op;
1610517207 TypeStructField *src_field;
1610617208 if (i < op1_field_count) {
1610717209 src_field = op1_type->data.structure.fields[i];
......@@ -16110,73 +17212,73 @@ static IrInstruction *ir_analyze_tuple_cat(IrAnalyze *ira, IrInstruction *source
1611017212 src_field = op2_type->data.structure.fields[i - op1_field_count];
1611117213 src_struct_op = op2;
1611217214 }
16113 IrInstruction *field_value = ir_analyze_struct_value_field_value(ira, source_instr,
17215 IrInstGen *field_value = ir_analyze_struct_value_field_value(ira, source_instr,
1611417216 src_struct_op, src_field);
1611517217 if (type_is_invalid(field_value->value->type))
16116 return ira->codegen->invalid_instruction;
16117 IrInstruction *dest_ptr = ir_analyze_struct_field_ptr(ira, source_instr, dst_field,
17218 return ira->codegen->invalid_inst_gen;
17219 IrInstGen *dest_ptr = ir_analyze_struct_field_ptr(ira, source_instr, dst_field,
1611817220 new_struct_ptr, new_type, true);
1611917221 if (type_is_invalid(dest_ptr->value->type))
16120 return ira->codegen->invalid_instruction;
17222 return ira->codegen->invalid_inst_gen;
1612117223 if (instr_is_comptime(field_value)) {
1612217224 const_ptrs.append(dest_ptr);
1612317225 } else {
1612417226 first_non_const_instruction = field_value;
1612517227 }
16126 IrInstruction *store_ptr_inst = ir_analyze_store_ptr(ira, source_instr, dest_ptr, field_value,
17228 IrInstGen *store_ptr_inst = ir_analyze_store_ptr(ira, source_instr, dest_ptr, field_value,
1612717229 true);
1612817230 if (type_is_invalid(store_ptr_inst->value->type))
16129 return ira->codegen->invalid_instruction;
17231 return ira->codegen->invalid_inst_gen;
1613017232 }
1613117233 if (const_ptrs.length != new_field_count) {
1613217234 new_struct_ptr->value->special = ConstValSpecialRuntime;
1613317235 for (size_t i = 0; i < const_ptrs.length; i += 1) {
16134 IrInstruction *elem_result_loc = const_ptrs.at(i);
17236 IrInstGen *elem_result_loc = const_ptrs.at(i);
1613517237 assert(elem_result_loc->value->special == ConstValSpecialStatic);
1613617238 if (elem_result_loc->value->type->data.pointer.inferred_struct_field != nullptr) {
1613717239 // This field will be generated comptime; no need to do this.
1613817240 continue;
1613917241 }
16140 IrInstruction *deref = ir_get_deref(ira, elem_result_loc, elem_result_loc, nullptr);
17242 IrInstGen *deref = ir_get_deref(ira, &elem_result_loc->base, elem_result_loc, nullptr);
1614117243 elem_result_loc->value->special = ConstValSpecialRuntime;
16142 ir_analyze_store_ptr(ira, elem_result_loc, elem_result_loc, deref, false);
17244 ir_analyze_store_ptr(ira, &elem_result_loc->base, elem_result_loc, deref, false);
1614317245 }
1614417246 }
16145 IrInstruction *result = ir_get_deref(ira, source_instr, new_struct_ptr, nullptr);
17247 IrInstGen *result = ir_get_deref(ira, source_instr, new_struct_ptr, nullptr);
1614617248 if (instr_is_comptime(result))
1614717249 return result;
1614817250
1614917251 if (is_comptime) {
16150 ir_add_error_node(ira, first_non_const_instruction->source_node,
17252 ir_add_error(ira, &first_non_const_instruction->base,
1615117253 buf_sprintf("unable to evaluate constant expression"));
16152 return ira->codegen->invalid_instruction;
17254 return ira->codegen->invalid_inst_gen;
1615317255 }
1615417256
1615517257 return result;
1615617258}
1615717259
16158static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *instruction) {
16159 IrInstruction *op1 = instruction->op1->child;
17260static IrInstGen *ir_analyze_array_cat(IrAnalyze *ira, IrInstSrcBinOp *instruction) {
17261 IrInstGen *op1 = instruction->op1->child;
1616017262 ZigType *op1_type = op1->value->type;
1616117263 if (type_is_invalid(op1_type))
16162 return ira->codegen->invalid_instruction;
17264 return ira->codegen->invalid_inst_gen;
1616317265
16164 IrInstruction *op2 = instruction->op2->child;
17266 IrInstGen *op2 = instruction->op2->child;
1616517267 ZigType *op2_type = op2->value->type;
1616617268 if (type_is_invalid(op2_type))
16167 return ira->codegen->invalid_instruction;
17269 return ira->codegen->invalid_inst_gen;
1616817270
1616917271 if (is_tuple(op1_type) && is_tuple(op2_type)) {
16170 return ir_analyze_tuple_cat(ira, &instruction->base, op1, op2);
17272 return ir_analyze_tuple_cat(ira, &instruction->base.base, op1, op2);
1617117273 }
1617217274
1617317275 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);
1617417276 if (!op1_val)
16175 return ira->codegen->invalid_instruction;
17277 return ira->codegen->invalid_inst_gen;
1617617278
1617717279 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);
1617817280 if (!op2_val)
16179 return ira->codegen->invalid_instruction;
17281 return ira->codegen->invalid_inst_gen;
1618017282
1618117283 ZigValue *sentinel1 = nullptr;
1618217284 ZigValue *op1_array_val;
......@@ -16214,15 +17316,15 @@ static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *i
1621417316 {
1621517317 ZigType *array_type = op1_type->data.pointer.child_type;
1621617318 child_type = array_type->data.array.child_type;
16217 op1_array_val = const_ptr_pointee(ira, ira->codegen, op1_val, op1->source_node);
17319 op1_array_val = const_ptr_pointee(ira, ira->codegen, op1_val, op1->base.source_node);
1621817320 if (op1_array_val == nullptr)
16219 return ira->codegen->invalid_instruction;
17321 return ira->codegen->invalid_inst_gen;
1622017322 op1_array_index = 0;
1622117323 op1_array_end = array_type->data.array.len;
1622217324 sentinel1 = array_type->data.array.sentinel;
1622317325 } else {
16224 ir_add_error(ira, op1, buf_sprintf("expected array, found '%s'", buf_ptr(&op1->value->type->name)));
16225 return ira->codegen->invalid_instruction;
17326 ir_add_error(ira, &op1->base, buf_sprintf("expected array, found '%s'", buf_ptr(&op1->value->type->name)));
17327 return ira->codegen->invalid_inst_gen;
1622617328 }
1622717329
1622817330 ZigValue *sentinel2 = nullptr;
......@@ -16262,23 +17364,23 @@ static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *i
1626217364 {
1626317365 ZigType *array_type = op2_type->data.pointer.child_type;
1626417366 op2_type_valid = array_type->data.array.child_type == child_type;
16265 op2_array_val = const_ptr_pointee(ira, ira->codegen, op2_val, op2->source_node);
17367 op2_array_val = const_ptr_pointee(ira, ira->codegen, op2_val, op2->base.source_node);
1626617368 if (op2_array_val == nullptr)
16267 return ira->codegen->invalid_instruction;
17369 return ira->codegen->invalid_inst_gen;
1626817370 op2_array_index = 0;
1626917371 op2_array_end = array_type->data.array.len;
1627017372
1627117373 sentinel2 = array_type->data.array.sentinel;
1627217374 } else {
16273 ir_add_error(ira, op2,
17375 ir_add_error(ira, &op2->base,
1627417376 buf_sprintf("expected array or C string literal, found '%s'", buf_ptr(&op2->value->type->name)));
16275 return ira->codegen->invalid_instruction;
17377 return ira->codegen->invalid_inst_gen;
1627617378 }
1627717379 if (!op2_type_valid) {
16278 ir_add_error(ira, op2, buf_sprintf("expected array of type '%s', found '%s'",
17380 ir_add_error(ira, &op2->base, buf_sprintf("expected array of type '%s', found '%s'",
1627917381 buf_ptr(&child_type->name),
1628017382 buf_ptr(&op2->value->type->name)));
16281 return ira->codegen->invalid_instruction;
17383 return ira->codegen->invalid_inst_gen;
1628217384 }
1628317385
1628417386 ZigValue *sentinel;
......@@ -16295,7 +17397,7 @@ static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *i
1629517397 }
1629617398
1629717399 // The type of result is populated in the following if blocks
16298 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
17400 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
1629917401 ZigValue *out_val = result->value;
1630017402
1630117403 ZigValue *out_array_val;
......@@ -16383,14 +17485,14 @@ static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *i
1638317485 return result;
1638417486}
1638517487
16386static IrInstruction *ir_analyze_array_mult(IrAnalyze *ira, IrInstructionBinOp *instruction) {
16387 IrInstruction *op1 = instruction->op1->child;
17488static IrInstGen *ir_analyze_array_mult(IrAnalyze *ira, IrInstSrcBinOp *instruction) {
17489 IrInstGen *op1 = instruction->op1->child;
1638817490 if (type_is_invalid(op1->value->type))
16389 return ira->codegen->invalid_instruction;
17491 return ira->codegen->invalid_inst_gen;
1639017492
16391 IrInstruction *op2 = instruction->op2->child;
17493 IrInstGen *op2 = instruction->op2->child;
1639217494 if (type_is_invalid(op2->value->type))
16393 return ira->codegen->invalid_instruction;
17495 return ira->codegen->invalid_inst_gen;
1639417496
1639517497 bool want_ptr_to_array = false;
1639617498 ZigType *array_type;
......@@ -16399,49 +17501,49 @@ static IrInstruction *ir_analyze_array_mult(IrAnalyze *ira, IrInstructionBinOp *
1639917501 array_type = op1->value->type;
1640017502 array_val = ir_resolve_const(ira, op1, UndefOk);
1640117503 if (array_val == nullptr)
16402 return ira->codegen->invalid_instruction;
17504 return ira->codegen->invalid_inst_gen;
1640317505 } else if (op1->value->type->id == ZigTypeIdPointer && op1->value->type->data.pointer.ptr_len == PtrLenSingle &&
1640417506 op1->value->type->data.pointer.child_type->id == ZigTypeIdArray)
1640517507 {
1640617508 array_type = op1->value->type->data.pointer.child_type;
16407 IrInstruction *array_inst = ir_get_deref(ira, op1, op1, nullptr);
17509 IrInstGen *array_inst = ir_get_deref(ira, &op1->base, op1, nullptr);
1640817510 if (type_is_invalid(array_inst->value->type))
16409 return ira->codegen->invalid_instruction;
17511 return ira->codegen->invalid_inst_gen;
1641017512 array_val = ir_resolve_const(ira, array_inst, UndefOk);
1641117513 if (array_val == nullptr)
16412 return ira->codegen->invalid_instruction;
17514 return ira->codegen->invalid_inst_gen;
1641317515 want_ptr_to_array = true;
1641417516 } else {
16415 ir_add_error(ira, op1, buf_sprintf("expected array type, found '%s'", buf_ptr(&op1->value->type->name)));
16416 return ira->codegen->invalid_instruction;
17517 ir_add_error(ira, &op1->base, buf_sprintf("expected array type, found '%s'", buf_ptr(&op1->value->type->name)));
17518 return ira->codegen->invalid_inst_gen;
1641717519 }
1641817520
1641917521 uint64_t mult_amt;
1642017522 if (!ir_resolve_usize(ira, op2, &mult_amt))
16421 return ira->codegen->invalid_instruction;
17523 return ira->codegen->invalid_inst_gen;
1642217524
1642317525 uint64_t old_array_len = array_type->data.array.len;
1642417526 uint64_t new_array_len;
1642517527
1642617528 if (mul_u64_overflow(old_array_len, mult_amt, &new_array_len)) {
16427 ir_add_error(ira, &instruction->base, buf_sprintf("operation results in overflow"));
16428 return ira->codegen->invalid_instruction;
17529 ir_add_error(ira, &instruction->base.base, buf_sprintf("operation results in overflow"));
17530 return ira->codegen->invalid_inst_gen;
1642917531 }
1643017532
1643117533 ZigType *child_type = array_type->data.array.child_type;
1643217534 ZigType *result_array_type = get_array_type(ira->codegen, child_type, new_array_len,
1643317535 array_type->data.array.sentinel);
1643417536
16435 IrInstruction *array_result;
17537 IrInstGen *array_result;
1643617538 if (array_val->special == ConstValSpecialUndef || array_val->data.x_array.special == ConstArraySpecialUndef) {
16437 array_result = ir_const_undef(ira, &instruction->base, result_array_type);
17539 array_result = ir_const_undef(ira, &instruction->base.base, result_array_type);
1643817540 } else {
16439 array_result = ir_const(ira, &instruction->base, result_array_type);
17541 array_result = ir_const(ira, &instruction->base.base, result_array_type);
1644017542 ZigValue *out_val = array_result->value;
1644117543
1644217544 switch (type_has_one_possible_value(ira->codegen, result_array_type)) {
1644317545 case OnePossibleValueInvalid:
16444 return ira->codegen->invalid_instruction;
17546 return ira->codegen->invalid_inst_gen;
1644517547 case OnePossibleValueYes:
1644617548 goto skip_computation;
1644717549 case OnePossibleValueNo:
......@@ -16477,35 +17579,35 @@ static IrInstruction *ir_analyze_array_mult(IrAnalyze *ira, IrInstructionBinOp *
1647717579 }
1647817580skip_computation:
1647917581 if (want_ptr_to_array) {
16480 return ir_get_ref(ira, &instruction->base, array_result, true, false);
17582 return ir_get_ref(ira, &instruction->base.base, array_result, true, false);
1648117583 } else {
1648217584 return array_result;
1648317585 }
1648417586}
1648517587
16486static IrInstruction *ir_analyze_instruction_merge_err_sets(IrAnalyze *ira,
16487 IrInstructionMergeErrSets *instruction)
17588static IrInstGen *ir_analyze_instruction_merge_err_sets(IrAnalyze *ira,
17589 IrInstSrcMergeErrSets *instruction)
1648817590{
16489 ZigType *op1_type = ir_resolve_error_set_type(ira, &instruction->base, instruction->op1->child);
17591 ZigType *op1_type = ir_resolve_error_set_type(ira, &instruction->base.base, instruction->op1->child);
1649017592 if (type_is_invalid(op1_type))
16491 return ira->codegen->invalid_instruction;
17593 return ira->codegen->invalid_inst_gen;
1649217594
16493 ZigType *op2_type = ir_resolve_error_set_type(ira, &instruction->base, instruction->op2->child);
17595 ZigType *op2_type = ir_resolve_error_set_type(ira, &instruction->base.base, instruction->op2->child);
1649417596 if (type_is_invalid(op2_type))
16495 return ira->codegen->invalid_instruction;
17597 return ira->codegen->invalid_inst_gen;
1649617598
1649717599 if (type_is_global_error_set(op1_type) ||
1649817600 type_is_global_error_set(op2_type))
1649917601 {
16500 return ir_const_type(ira, &instruction->base, ira->codegen->builtin_types.entry_global_error_set);
17602 return ir_const_type(ira, &instruction->base.base, ira->codegen->builtin_types.entry_global_error_set);
1650117603 }
1650217604
16503 if (!resolve_inferred_error_set(ira->codegen, op1_type, instruction->op1->child->source_node)) {
16504 return ira->codegen->invalid_instruction;
17605 if (!resolve_inferred_error_set(ira->codegen, op1_type, instruction->op1->child->base.source_node)) {
17606 return ira->codegen->invalid_inst_gen;
1650517607 }
1650617608
16507 if (!resolve_inferred_error_set(ira->codegen, op2_type, instruction->op2->child->source_node)) {
16508 return ira->codegen->invalid_instruction;
17609 if (!resolve_inferred_error_set(ira->codegen, op2_type, instruction->op2->child->base.source_node)) {
17610 return ira->codegen->invalid_inst_gen;
1650917611 }
1651017612
1651117613 size_t errors_count = ira->codegen->errors_by_index.length;
......@@ -16518,11 +17620,11 @@ static IrInstruction *ir_analyze_instruction_merge_err_sets(IrAnalyze *ira,
1651817620 ZigType *result_type = get_error_set_union(ira->codegen, errors, op1_type, op2_type, instruction->type_name);
1651917621 deallocate(errors, errors_count, "ErrorTableEntry *");
1652017622
16521 return ir_const_type(ira, &instruction->base, result_type);
17623 return ir_const_type(ira, &instruction->base.base, result_type);
1652217624}
1652317625
1652417626
16525static IrInstruction *ir_analyze_instruction_bin_op(IrAnalyze *ira, IrInstructionBinOp *bin_op_instruction) {
17627static IrInstGen *ir_analyze_instruction_bin_op(IrAnalyze *ira, IrInstSrcBinOp *bin_op_instruction) {
1652617628 IrBinOp op_id = bin_op_instruction->op_id;
1652717629 switch (op_id) {
1652817630 case IrBinOpInvalid:
......@@ -16567,41 +17669,39 @@ static IrInstruction *ir_analyze_instruction_bin_op(IrAnalyze *ira, IrInstructio
1656717669 zig_unreachable();
1656817670}
1656917671
16570static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,
16571 IrInstructionDeclVarSrc *decl_var_instruction)
16572{
17672static IrInstGen *ir_analyze_instruction_decl_var(IrAnalyze *ira, IrInstSrcDeclVar *decl_var_instruction) {
1657317673 Error err;
1657417674 ZigVar *var = decl_var_instruction->var;
1657517675
1657617676 ZigType *explicit_type = nullptr;
16577 IrInstruction *var_type = nullptr;
17677 IrInstGen *var_type = nullptr;
1657817678 if (decl_var_instruction->var_type != nullptr) {
1657917679 var_type = decl_var_instruction->var_type->child;
1658017680 ZigType *proposed_type = ir_resolve_type(ira, var_type);
16581 explicit_type = validate_var_type(ira->codegen, var_type->source_node, proposed_type);
17681 explicit_type = validate_var_type(ira->codegen, var_type->base.source_node, proposed_type);
1658217682 if (type_is_invalid(explicit_type)) {
1658317683 var->var_type = ira->codegen->builtin_types.entry_invalid;
16584 return ira->codegen->invalid_instruction;
17684 return ira->codegen->invalid_inst_gen;
1658517685 }
1658617686 }
1658717687
16588 AstNode *source_node = decl_var_instruction->base.source_node;
17688 AstNode *source_node = decl_var_instruction->base.base.source_node;
1658917689
1659017690 bool is_comptime_var = ir_get_var_is_comptime(var);
1659117691
1659217692 bool var_class_requires_const = false;
1659317693
16594 IrInstruction *var_ptr = decl_var_instruction->ptr->child;
17694 IrInstGen *var_ptr = decl_var_instruction->ptr->child;
1659517695 // if this is null, a compiler error happened and did not initialize the variable.
1659617696 // if there are no compile errors there may be a missing ir_expr_wrap in pass1 IR generation.
1659717697 if (var_ptr == nullptr || type_is_invalid(var_ptr->value->type)) {
16598 ir_assert(var_ptr != nullptr || ira->codegen->errors.length != 0, &decl_var_instruction->base);
17698 ir_assert(var_ptr != nullptr || ira->codegen->errors.length != 0, &decl_var_instruction->base.base);
1659917699 var->var_type = ira->codegen->builtin_types.entry_invalid;
16600 return ira->codegen->invalid_instruction;
17700 return ira->codegen->invalid_inst_gen;
1660117701 }
1660217702
1660317703 // The ir_build_var_decl_src call is supposed to pass a pointer to the allocation, not an initialization value.
16604 ir_assert(var_ptr->value->type->id == ZigTypeIdPointer, &decl_var_instruction->base);
17704 ir_assert(var_ptr->value->type->id == ZigTypeIdPointer, &decl_var_instruction->base.base);
1660517705
1660617706 ZigType *result_type = var_ptr->value->type->data.pointer.child_type;
1660717707 if (type_is_invalid(result_type)) {
......@@ -16612,7 +17712,7 @@ static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,
1661217712
1661317713 ZigValue *init_val = nullptr;
1661417714 if (instr_is_comptime(var_ptr) && var_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
16615 init_val = const_ptr_pointee(ira, ira->codegen, var_ptr->value, decl_var_instruction->base.source_node);
17715 init_val = const_ptr_pointee(ira, ira->codegen, var_ptr->value, decl_var_instruction->base.base.source_node);
1661617716 if (is_comptime_var) {
1661717717 if (var->gen_is_const) {
1661817718 var->const_value = init_val;
......@@ -16639,7 +17739,7 @@ static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,
1663917739 case ReqCompTimeNo:
1664017740 if (init_val != nullptr && value_is_comptime(init_val)) {
1664117741 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec,
16642 decl_var_instruction->base.source_node, init_val, UndefOk)))
17742 decl_var_instruction->base.base.source_node, init_val, UndefOk)))
1664317743 {
1664417744 result_type = ira->codegen->builtin_types.entry_invalid;
1664517745 } else if (init_val->type->id == ZigTypeIdFn &&
......@@ -16660,42 +17760,27 @@ static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,
1666017760 break;
1666117761 }
1666217762
16663 if (var->var_type != nullptr && !is_comptime_var) {
16664 // This is at least the second time we've seen this variable declaration during analysis.
16665 // This means that this is actually a different variable due to, e.g. an inline while loop.
16666 // We make a new variable so that it can hold a different type, and so the debug info can
16667 // be distinct.
16668 ZigVar *new_var = create_local_var(ira->codegen, var->decl_node, var->child_scope,
16669 buf_create_from_str(var->name), var->src_is_const, var->gen_is_const,
16670 var->shadowable, var->is_comptime, true);
16671 new_var->owner_exec = var->owner_exec;
16672 new_var->align_bytes = var->align_bytes;
16673 if (var->mem_slot_index != SIZE_MAX) {
16674 ZigValue *vals = create_const_vals(1);
16675 new_var->mem_slot_index = ira->exec_context.mem_slot_list.length;
16676 ira->exec_context.mem_slot_list.append(vals);
16677 }
16678
16679 var->next_var = new_var;
16680 var = new_var;
17763 while (var->next_var != nullptr) {
17764 var = var->next_var;
1668117765 }
1668217766
1668317767 // This must be done after possibly creating a new variable above
1668417768 var->ref_count = 0;
1668517769
17770 var->ptr_instruction = var_ptr;
1668617771 var->var_type = result_type;
1668717772 assert(var->var_type);
1668817773
1668917774 if (type_is_invalid(result_type)) {
16690 return ir_const_void(ira, &decl_var_instruction->base);
17775 return ir_const_void(ira, &decl_var_instruction->base.base);
1669117776 }
1669217777
1669317778 if (decl_var_instruction->align_value == nullptr) {
1669417779 if ((err = type_resolve(ira->codegen, result_type, ResolveStatusAlignmentKnown))) {
1669517780 var->var_type = ira->codegen->builtin_types.entry_invalid;
16696 return ir_const_void(ira, &decl_var_instruction->base);
17781 return ir_const_void(ira, &decl_var_instruction->base.base);
1669717782 }
16698 var->align_bytes = get_abi_alignment(ira->codegen, result_type);
17783 var->align_bytes = get_ptr_align(ira->codegen, var_ptr->value->type);
1669917784 } else {
1670017785 if (!ir_resolve_align(ira, decl_var_instruction->align_value->child, nullptr, &var->align_bytes)) {
1670117786 var->var_type = ira->codegen->builtin_types.entry_invalid;
......@@ -16712,104 +17797,96 @@ static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,
1671217797 // we need a runtime ptr but we have a comptime val.
1671317798 // since it's a comptime val there are no instructions for it.
1671417799 // we memcpy the init value here
16715 IrInstruction *deref = ir_get_deref(ira, var_ptr, var_ptr, nullptr);
17800 IrInstGen *deref = ir_get_deref(ira, &var_ptr->base, var_ptr, nullptr);
1671617801 if (type_is_invalid(deref->value->type)) {
1671717802 var->var_type = ira->codegen->builtin_types.entry_invalid;
16718 return ira->codegen->invalid_instruction;
17803 return ira->codegen->invalid_inst_gen;
1671917804 }
1672017805 // If this assertion trips, something is wrong with the IR instructions, because
1672117806 // we expected the above deref to return a constant value, but it created a runtime
1672217807 // instruction.
1672317808 assert(deref->value->special != ConstValSpecialRuntime);
1672417809 var_ptr->value->special = ConstValSpecialRuntime;
16725 ir_analyze_store_ptr(ira, var_ptr, var_ptr, deref, false);
17810 ir_analyze_store_ptr(ira, &var_ptr->base, var_ptr, deref, false);
1672617811 }
16727
16728 if (instr_is_comptime(var_ptr) && var->mem_slot_index != SIZE_MAX) {
16729 assert(var->mem_slot_index < ira->exec_context.mem_slot_list.length);
16730 ZigValue *mem_slot = ira->exec_context.mem_slot_list.at(var->mem_slot_index);
16731 copy_const_val(mem_slot, init_val);
16732 ira_ref(var->owner_exec->analysis);
16733
16734 if (is_comptime_var || (var_class_requires_const && var->gen_is_const)) {
16735 return ir_const_void(ira, &decl_var_instruction->base);
16736 }
17812 if (instr_is_comptime(var_ptr) && (is_comptime_var || (var_class_requires_const && var->gen_is_const))) {
17813 return ir_const_void(ira, &decl_var_instruction->base.base);
1673717814 }
1673817815 } else if (is_comptime_var) {
16739 ir_add_error(ira, &decl_var_instruction->base,
17816 ir_add_error(ira, &decl_var_instruction->base.base,
1674017817 buf_sprintf("cannot store runtime value in compile time variable"));
1674117818 var->var_type = ira->codegen->builtin_types.entry_invalid;
16742 return ira->codegen->invalid_instruction;
17819 return ira->codegen->invalid_inst_gen;
1674317820 }
1674417821
16745 ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);
17822 ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
1674617823 if (fn_entry)
1674717824 fn_entry->variable_list.append(var);
1674817825
16749 return ir_build_var_decl_gen(ira, &decl_var_instruction->base, var, var_ptr);
17826 return ir_build_var_decl_gen(ira, &decl_var_instruction->base.base, var, var_ptr);
1675017827}
1675117828
16752static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructionExport *instruction) {
16753 IrInstruction *target = instruction->target->child;
17829static IrInstGen *ir_analyze_instruction_export(IrAnalyze *ira, IrInstSrcExport *instruction) {
17830 IrInstGen *target = instruction->target->child;
1675417831 if (type_is_invalid(target->value->type))
16755 return ira->codegen->invalid_instruction;
17832 return ira->codegen->invalid_inst_gen;
1675617833
16757 IrInstruction *options = instruction->options->child;
17834 IrInstGen *options = instruction->options->child;
1675817835 if (type_is_invalid(options->value->type))
16759 return ira->codegen->invalid_instruction;
17836 return ira->codegen->invalid_inst_gen;
1676017837
1676117838 ZigType *options_type = options->value->type;
1676217839 assert(options_type->id == ZigTypeIdStruct);
1676317840
1676417841 TypeStructField *name_field = find_struct_type_field(options_type, buf_create_from_str("name"));
16765 ir_assert(name_field != nullptr, &instruction->base);
16766 IrInstruction *name_inst = ir_analyze_struct_value_field_value(ira, &instruction->base, options, name_field);
17842 ir_assert(name_field != nullptr, &instruction->base.base);
17843 IrInstGen *name_inst = ir_analyze_struct_value_field_value(ira, &instruction->base.base, options, name_field);
1676717844 if (type_is_invalid(name_inst->value->type))
16768 return ira->codegen->invalid_instruction;
17845 return ira->codegen->invalid_inst_gen;
1676917846
1677017847 TypeStructField *linkage_field = find_struct_type_field(options_type, buf_create_from_str("linkage"));
16771 ir_assert(linkage_field != nullptr, &instruction->base);
16772 IrInstruction *linkage_inst = ir_analyze_struct_value_field_value(ira, &instruction->base, options, linkage_field);
17848 ir_assert(linkage_field != nullptr, &instruction->base.base);
17849 IrInstGen *linkage_inst = ir_analyze_struct_value_field_value(ira, &instruction->base.base, options, linkage_field);
1677317850 if (type_is_invalid(linkage_inst->value->type))
16774 return ira->codegen->invalid_instruction;
17851 return ira->codegen->invalid_inst_gen;
1677517852
1677617853 TypeStructField *section_field = find_struct_type_field(options_type, buf_create_from_str("section"));
16777 ir_assert(section_field != nullptr, &instruction->base);
16778 IrInstruction *section_inst = ir_analyze_struct_value_field_value(ira, &instruction->base, options, section_field);
17854 ir_assert(section_field != nullptr, &instruction->base.base);
17855 IrInstGen *section_inst = ir_analyze_struct_value_field_value(ira, &instruction->base.base, options, section_field);
1677917856 if (type_is_invalid(section_inst->value->type))
16780 return ira->codegen->invalid_instruction;
17857 return ira->codegen->invalid_inst_gen;
1678117858
1678217859 // The `section` field is optional, we have to unwrap it first
16783 IrInstruction *non_null_check = ir_analyze_test_non_null(ira, &instruction->base, section_inst);
17860 IrInstGen *non_null_check = ir_analyze_test_non_null(ira, &instruction->base.base, section_inst);
1678417861 bool is_non_null;
1678517862 if (!ir_resolve_bool(ira, non_null_check, &is_non_null))
16786 return ira->codegen->invalid_instruction;
17863 return ira->codegen->invalid_inst_gen;
1678717864
16788 IrInstruction *section_str_inst = nullptr;
17865 IrInstGen *section_str_inst = nullptr;
1678917866 if (is_non_null) {
16790 section_str_inst = ir_analyze_optional_value_payload_value(ira, &instruction->base, section_inst, false);
17867 section_str_inst = ir_analyze_optional_value_payload_value(ira, &instruction->base.base, section_inst, false);
1679117868 if (type_is_invalid(section_str_inst->value->type))
16792 return ira->codegen->invalid_instruction;
17869 return ira->codegen->invalid_inst_gen;
1679317870 }
1679417871
1679517872 // Resolve all the comptime values
1679617873 Buf *symbol_name = ir_resolve_str(ira, name_inst);
1679717874 if (!symbol_name)
16798 return ira->codegen->invalid_instruction;
17875 return ira->codegen->invalid_inst_gen;
1679917876
1680017877 if (buf_len(symbol_name) < 1) {
16801 ir_add_error(ira, name_inst,
17878 ir_add_error(ira, &name_inst->base,
1680217879 buf_sprintf("exported symbol name cannot be empty"));
16803 return ira->codegen->invalid_instruction;
17880 return ira->codegen->invalid_inst_gen;
1680417881 }
1680517882
1680617883 GlobalLinkageId global_linkage_id;
1680717884 if (!ir_resolve_global_linkage(ira, linkage_inst, &global_linkage_id))
16808 return ira->codegen->invalid_instruction;
17885 return ira->codegen->invalid_inst_gen;
1680917886
1681017887 Buf *section_name = nullptr;
1681117888 if (section_str_inst != nullptr && !(section_name = ir_resolve_str(ira, section_str_inst)))
16812 return ira->codegen->invalid_instruction;
17889 return ira->codegen->invalid_inst_gen;
1681317890
1681417891 // TODO: This function needs to be audited.
1681517892 // It's not clear how all the different types are supposed to be handled.
......@@ -16817,15 +17894,15 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
1681717894 // in another file.
1681817895 TldFn *tld_fn = allocate<TldFn>(1);
1681917896 tld_fn->base.id = TldIdFn;
16820 tld_fn->base.source_node = instruction->base.source_node;
17897 tld_fn->base.source_node = instruction->base.base.source_node;
1682117898
1682217899 auto entry = ira->codegen->exported_symbol_names.put_unique(symbol_name, &tld_fn->base);
1682317900 if (entry) {
1682417901 AstNode *other_export_node = entry->value->source_node;
16825 ErrorMsg *msg = ir_add_error(ira, &instruction->base,
17902 ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
1682617903 buf_sprintf("exported symbol collision: '%s'", buf_ptr(symbol_name)));
1682717904 add_error_note(ira->codegen, msg, other_export_node, buf_sprintf("other symbol is here"));
16828 return ira->codegen->invalid_instruction;
17905 return ira->codegen->invalid_inst_gen;
1682917906 }
1683017907
1683117908 Error err;
......@@ -16841,12 +17918,12 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
1684117918 CallingConvention cc = fn_entry->type_entry->data.fn.fn_type_id.cc;
1684217919 switch (cc) {
1684317920 case CallingConventionUnspecified: {
16844 ErrorMsg *msg = ir_add_error(ira, target,
17921 ErrorMsg *msg = ir_add_error(ira, &target->base,
1684517922 buf_sprintf("exported function must specify calling convention"));
1684617923 add_error_note(ira->codegen, msg, fn_entry->proto_node, buf_sprintf("declared here"));
1684717924 } break;
1684817925 case CallingConventionAsync: {
16849 ErrorMsg *msg = ir_add_error(ira, target,
17926 ErrorMsg *msg = ir_add_error(ira, &target->base,
1685017927 buf_sprintf("exported function cannot be async"));
1685117928 add_error_note(ira->codegen, msg, fn_entry->proto_node, buf_sprintf("declared here"));
1685217929 } break;
......@@ -16869,10 +17946,10 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
1686917946 } break;
1687017947 case ZigTypeIdStruct:
1687117948 if (is_slice(target->value->type)) {
16872 ir_add_error(ira, target,
17949 ir_add_error(ira, &target->base,
1687317950 buf_sprintf("unable to export value of type '%s'", buf_ptr(&target->value->type->name)));
1687417951 } else if (target->value->type->data.structure.layout != ContainerLayoutExtern) {
16875 ErrorMsg *msg = ir_add_error(ira, target,
17952 ErrorMsg *msg = ir_add_error(ira, &target->base,
1687617953 buf_sprintf("exported struct value must be declared extern"));
1687717954 add_error_note(ira->codegen, msg, target->value->type->data.structure.decl_node, buf_sprintf("declared here"));
1687817955 } else {
......@@ -16881,7 +17958,7 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
1688117958 break;
1688217959 case ZigTypeIdUnion:
1688317960 if (target->value->type->data.unionation.layout != ContainerLayoutExtern) {
16884 ErrorMsg *msg = ir_add_error(ira, target,
17961 ErrorMsg *msg = ir_add_error(ira, &target->base,
1688517962 buf_sprintf("exported union value must be declared extern"));
1688617963 add_error_note(ira->codegen, msg, target->value->type->data.unionation.decl_node, buf_sprintf("declared here"));
1688717964 } else {
......@@ -16890,7 +17967,7 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
1689017967 break;
1689117968 case ZigTypeIdEnum:
1689217969 if (target->value->type->data.enumeration.layout != ContainerLayoutExtern) {
16893 ErrorMsg *msg = ir_add_error(ira, target,
17970 ErrorMsg *msg = ir_add_error(ira, &target->base,
1689417971 buf_sprintf("exported enum value must be declared extern"));
1689517972 add_error_note(ira->codegen, msg, target->value->type->data.enumeration.decl_node, buf_sprintf("declared here"));
1689617973 } else {
......@@ -16900,10 +17977,10 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
1690017977 case ZigTypeIdArray: {
1690117978 bool ok_type;
1690217979 if ((err = type_allowed_in_extern(ira->codegen, target->value->type->data.array.child_type, &ok_type)))
16903 return ira->codegen->invalid_instruction;
17980 return ira->codegen->invalid_inst_gen;
1690417981
1690517982 if (!ok_type) {
16906 ir_add_error(ira, target,
17983 ir_add_error(ira, &target->base,
1690717984 buf_sprintf("array element type '%s' not extern-compatible",
1690817985 buf_ptr(&target->value->type->data.array.child_type->name)));
1690917986 } else {
......@@ -16918,31 +17995,31 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
1691817995 zig_unreachable();
1691917996 case ZigTypeIdStruct:
1692017997 if (is_slice(type_value)) {
16921 ir_add_error(ira, target,
17998 ir_add_error(ira, &target->base,
1692217999 buf_sprintf("unable to export type '%s'", buf_ptr(&type_value->name)));
1692318000 } else if (type_value->data.structure.layout != ContainerLayoutExtern) {
16924 ErrorMsg *msg = ir_add_error(ira, target,
18001 ErrorMsg *msg = ir_add_error(ira, &target->base,
1692518002 buf_sprintf("exported struct must be declared extern"));
1692618003 add_error_note(ira->codegen, msg, type_value->data.structure.decl_node, buf_sprintf("declared here"));
1692718004 }
1692818005 break;
1692918006 case ZigTypeIdUnion:
1693018007 if (type_value->data.unionation.layout != ContainerLayoutExtern) {
16931 ErrorMsg *msg = ir_add_error(ira, target,
18008 ErrorMsg *msg = ir_add_error(ira, &target->base,
1693218009 buf_sprintf("exported union must be declared extern"));
1693318010 add_error_note(ira->codegen, msg, type_value->data.unionation.decl_node, buf_sprintf("declared here"));
1693418011 }
1693518012 break;
1693618013 case ZigTypeIdEnum:
1693718014 if (type_value->data.enumeration.layout != ContainerLayoutExtern) {
16938 ErrorMsg *msg = ir_add_error(ira, target,
18015 ErrorMsg *msg = ir_add_error(ira, &target->base,
1693918016 buf_sprintf("exported enum must be declared extern"));
1694018017 add_error_note(ira->codegen, msg, type_value->data.enumeration.decl_node, buf_sprintf("declared here"));
1694118018 }
1694218019 break;
1694318020 case ZigTypeIdFn: {
1694418021 if (type_value->data.fn.fn_type_id.cc == CallingConventionUnspecified) {
16945 ir_add_error(ira, target,
18022 ir_add_error(ira, &target->base,
1694618023 buf_sprintf("exported function type must specify calling convention"));
1694718024 }
1694818025 } break;
......@@ -16968,7 +18045,7 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
1696818045 case ZigTypeIdOpaque:
1696918046 case ZigTypeIdFnFrame:
1697018047 case ZigTypeIdAnyFrame:
16971 ir_add_error(ira, target,
18048 ir_add_error(ira, &target->base,
1697218049 buf_sprintf("invalid export target '%s'", buf_ptr(&type_value->name)));
1697318050 break;
1697418051 }
......@@ -16993,61 +18070,55 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
1699318070 case ZigTypeIdEnumLiteral:
1699418071 case ZigTypeIdFnFrame:
1699518072 case ZigTypeIdAnyFrame:
16996 ir_add_error(ira, target,
18073 ir_add_error(ira, &target->base,
1699718074 buf_sprintf("invalid export target type '%s'", buf_ptr(&target->value->type->name)));
1699818075 break;
1699918076 }
1700018077
1700118078 // TODO audit the various ways to use @export
17002 if (want_var_export && target->id == IrInstructionIdLoadPtrGen) {
17003 IrInstructionLoadPtrGen *load_ptr = reinterpret_cast<IrInstructionLoadPtrGen *>(target);
17004 if (load_ptr->ptr->id == IrInstructionIdVarPtr) {
17005 IrInstructionVarPtr *var_ptr = reinterpret_cast<IrInstructionVarPtr *>(load_ptr->ptr);
18079 if (want_var_export && target->id == IrInstGenIdLoadPtr) {
18080 IrInstGenLoadPtr *load_ptr = reinterpret_cast<IrInstGenLoadPtr *>(target);
18081 if (load_ptr->ptr->id == IrInstGenIdVarPtr) {
18082 IrInstGenVarPtr *var_ptr = reinterpret_cast<IrInstGenVarPtr *>(load_ptr->ptr);
1700618083 ZigVar *var = var_ptr->var;
1700718084 add_var_export(ira->codegen, var, buf_ptr(symbol_name), global_linkage_id);
1700818085 var->section_name = section_name;
1700918086 }
1701018087 }
1701118088
17012 return ir_const_void(ira, &instruction->base);
18089 return ir_const_void(ira, &instruction->base.base);
1701318090}
1701418091
17015static bool exec_has_err_ret_trace(CodeGen *g, IrExecutable *exec) {
18092static bool exec_has_err_ret_trace(CodeGen *g, IrExecutableSrc *exec) {
1701618093 ZigFn *fn_entry = exec_fn_entry(exec);
1701718094 return fn_entry != nullptr && fn_entry->calls_or_awaits_errorable_fn && g->have_err_ret_tracing;
1701818095}
1701918096
17020static IrInstruction *ir_analyze_instruction_error_return_trace(IrAnalyze *ira,
17021 IrInstructionErrorReturnTrace *instruction)
18097static IrInstGen *ir_analyze_instruction_error_return_trace(IrAnalyze *ira,
18098 IrInstSrcErrorReturnTrace *instruction)
1702218099{
1702318100 ZigType *ptr_to_stack_trace_type = get_pointer_to_type(ira->codegen, get_stack_trace_type(ira->codegen), false);
17024 if (instruction->optional == IrInstructionErrorReturnTrace::Null) {
18101 if (instruction->optional == IrInstErrorReturnTraceNull) {
1702518102 ZigType *optional_type = get_optional_type(ira->codegen, ptr_to_stack_trace_type);
17026 if (!exec_has_err_ret_trace(ira->codegen, ira->new_irb.exec)) {
17027 IrInstruction *result = ir_const(ira, &instruction->base, optional_type);
18103 if (!exec_has_err_ret_trace(ira->codegen, ira->old_irb.exec)) {
18104 IrInstGen *result = ir_const(ira, &instruction->base.base, optional_type);
1702818105 ZigValue *out_val = result->value;
1702918106 assert(get_codegen_ptr_type(optional_type) != nullptr);
1703018107 out_val->data.x_ptr.special = ConstPtrSpecialHardCodedAddr;
1703118108 out_val->data.x_ptr.data.hard_coded_addr.addr = 0;
1703218109 return result;
1703318110 }
17034 IrInstruction *new_instruction = ir_build_error_return_trace(&ira->new_irb, instruction->base.scope,
17035 instruction->base.source_node, instruction->optional);
17036 new_instruction->value->type = optional_type;
17037 return new_instruction;
18111 return ir_build_error_return_trace_gen(ira, instruction->base.base.scope,
18112 instruction->base.base.source_node, instruction->optional, optional_type);
1703818113 } else {
1703918114 assert(ira->codegen->have_err_ret_tracing);
17040 IrInstruction *new_instruction = ir_build_error_return_trace(&ira->new_irb, instruction->base.scope,
17041 instruction->base.source_node, instruction->optional);
17042 new_instruction->value->type = ptr_to_stack_trace_type;
17043 return new_instruction;
18115 return ir_build_error_return_trace_gen(ira, instruction->base.base.scope,
18116 instruction->base.base.source_node, instruction->optional, ptr_to_stack_trace_type);
1704418117 }
1704518118}
1704618119
17047static IrInstruction *ir_analyze_instruction_error_union(IrAnalyze *ira,
17048 IrInstructionErrorUnion *instruction)
17049{
17050 IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_type);
18120static IrInstGen *ir_analyze_instruction_error_union(IrAnalyze *ira, IrInstSrcErrorUnion *instruction) {
18121 IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_type);
1705118122 result->value->special = ConstValSpecialLazy;
1705218123
1705318124 LazyValueErrUnionType *lazy_err_union_type = allocate<LazyValueErrUnionType>(1, "LazyValueErrUnionType");
......@@ -17057,24 +18128,25 @@ static IrInstruction *ir_analyze_instruction_error_union(IrAnalyze *ira,
1705718128
1705818129 lazy_err_union_type->err_set_type = instruction->err_set->child;
1705918130 if (ir_resolve_type_lazy(ira, lazy_err_union_type->err_set_type) == nullptr)
17060 return ira->codegen->invalid_instruction;
18131 return ira->codegen->invalid_inst_gen;
1706118132
1706218133 lazy_err_union_type->payload_type = instruction->payload->child;
1706318134 if (ir_resolve_type_lazy(ira, lazy_err_union_type->payload_type) == nullptr)
17064 return ira->codegen->invalid_instruction;
18135 return ira->codegen->invalid_inst_gen;
1706518136
1706618137 return result;
1706718138}
1706818139
17069static IrInstruction *ir_analyze_alloca(IrAnalyze *ira, IrInstruction *source_inst, ZigType *var_type,
18140static IrInstGen *ir_analyze_alloca(IrAnalyze *ira, IrInst *source_inst, ZigType *var_type,
1707018141 uint32_t align, const char *name_hint, bool force_comptime)
1707118142{
1707218143 Error err;
1707318144
1707418145 ZigValue *pointee = create_const_vals(1);
1707518146 pointee->special = ConstValSpecialUndef;
18147 pointee->llvm_align = align;
1707618148
17077 IrInstructionAllocaGen *result = ir_build_alloca_gen(ira, source_inst, align, name_hint);
18149 IrInstGenAlloca *result = ir_build_alloca_gen(ira, source_inst, align, name_hint);
1707818150 result->base.value->special = ConstValSpecialStatic;
1707918151 result->base.value->data.x_ptr.special = ConstPtrSpecialRef;
1708018152 result->base.value->data.x_ptr.mut = force_comptime ? ConstPtrMutComptimeVar : ConstPtrMutInfer;
......@@ -17082,15 +18154,15 @@ static IrInstruction *ir_analyze_alloca(IrAnalyze *ira, IrInstruction *source_in
1708218154
1708318155 bool var_type_has_bits;
1708418156 if ((err = type_has_bits2(ira->codegen, var_type, &var_type_has_bits)))
17085 return ira->codegen->invalid_instruction;
18157 return ira->codegen->invalid_inst_gen;
1708618158 if (align != 0) {
1708718159 if ((err = type_resolve(ira->codegen, var_type, ResolveStatusAlignmentKnown)))
17088 return ira->codegen->invalid_instruction;
18160 return ira->codegen->invalid_inst_gen;
1708918161 if (!var_type_has_bits) {
1709018162 ir_add_error(ira, source_inst,
1709118163 buf_sprintf("variable '%s' of zero-bit type '%s' has no in-memory representation, it cannot be aligned",
1709218164 name_hint, buf_ptr(&var_type->name)));
17093 return ira->codegen->invalid_instruction;
18165 return ira->codegen->invalid_inst_gen;
1709418166 }
1709518167 }
1709618168 assert(result->base.value->data.x_ptr.special != ConstPtrSpecialInvalid);
......@@ -17099,15 +18171,16 @@ static IrInstruction *ir_analyze_alloca(IrAnalyze *ira, IrInstruction *source_in
1709918171 result->base.value->type = get_pointer_to_type_extra(ira->codegen, var_type, false, false,
1710018172 PtrLenSingle, align, 0, 0, false);
1710118173
17102 ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);
17103 if (fn_entry != nullptr) {
17104 fn_entry->alloca_gen_list.append(result);
18174 if (!force_comptime) {
18175 ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
18176 if (fn_entry != nullptr) {
18177 fn_entry->alloca_gen_list.append(result);
18178 }
1710518179 }
17106 result->base.is_gen = true;
1710718180 return &result->base;
1710818181}
1710918182
17110static ZigType *ir_result_loc_expected_type(IrAnalyze *ira, IrInstruction *suspend_source_instr,
18183static ZigType *ir_result_loc_expected_type(IrAnalyze *ira, IrInst *suspend_source_instr,
1711118184 ResultLoc *result_loc)
1711218185{
1711318186 switch (result_loc->id) {
......@@ -17150,7 +18223,7 @@ static bool type_can_bit_cast(ZigType *t) {
1715018223 }
1715118224}
1715218225
17153static void set_up_result_loc_for_inferred_comptime(IrInstruction *ptr) {
18226static void set_up_result_loc_for_inferred_comptime(IrInstGen *ptr) {
1715418227 ZigValue *undef_child = create_const_vals(1);
1715518228 undef_child->type = ptr->value->type->data.pointer.child_type;
1715618229 undef_child->special = ConstValSpecialUndef;
......@@ -17189,16 +18262,16 @@ static Error ir_result_has_type(IrAnalyze *ira, ResultLoc *result_loc, bool *out
1718918262 zig_unreachable();
1719018263}
1719118264
17192static IrInstruction *ir_resolve_no_result_loc(IrAnalyze *ira, IrInstruction *suspend_source_instr,
17193 ResultLoc *result_loc, ZigType *value_type, bool force_runtime, bool non_null_comptime)
18265static IrInstGen *ir_resolve_no_result_loc(IrAnalyze *ira, IrInst *suspend_source_instr,
18266 ResultLoc *result_loc, ZigType *value_type)
1719418267{
1719518268 if (type_is_invalid(value_type))
17196 return ira->codegen->invalid_instruction;
17197 IrInstructionAllocaGen *alloca_gen = ir_build_alloca_gen(ira, suspend_source_instr, 0, "");
18269 return ira->codegen->invalid_inst_gen;
18270 IrInstGenAlloca *alloca_gen = ir_build_alloca_gen(ira, suspend_source_instr, 0, "");
1719818271 alloca_gen->base.value->type = get_pointer_to_type_extra(ira->codegen, value_type, false, false,
1719918272 PtrLenSingle, 0, 0, 0, false);
1720018273 set_up_result_loc_for_inferred_comptime(&alloca_gen->base);
17201 ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);
18274 ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
1720218275 if (fn_entry != nullptr && get_scope_typeof(suspend_source_instr->scope) == nullptr) {
1720318276 fn_entry->alloca_gen_list.append(alloca_gen);
1720418277 }
......@@ -17207,10 +18280,25 @@ static IrInstruction *ir_resolve_no_result_loc(IrAnalyze *ira, IrInstruction *su
1720718280 return result_loc->resolved_loc;
1720818281}
1720918282
18283static bool result_loc_is_discard(ResultLoc *result_loc_pass1) {
18284 if (result_loc_pass1->id == ResultLocIdInstruction &&
18285 result_loc_pass1->source_instruction->id == IrInstSrcIdConst)
18286 {
18287 IrInstSrcConst *const_inst = reinterpret_cast<IrInstSrcConst *>(result_loc_pass1->source_instruction);
18288 if (value_is_comptime(const_inst->value) &&
18289 const_inst->value->type->id == ZigTypeIdPointer &&
18290 const_inst->value->data.x_ptr.special == ConstPtrSpecialDiscard)
18291 {
18292 return true;
18293 }
18294 }
18295 return false;
18296}
18297
1721018298// when calling this function, at the callsite must check for result type noreturn and propagate it up
17211static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspend_source_instr,
17212 ResultLoc *result_loc, ZigType *value_type, IrInstruction *value, bool force_runtime,
17213 bool non_null_comptime, bool allow_discard)
18299static IrInstGen *ir_resolve_result_raw(IrAnalyze *ira, IrInst *suspend_source_instr,
18300 ResultLoc *result_loc, ZigType *value_type, IrInstGen *value, bool force_runtime,
18301 bool allow_discard)
1721418302{
1721518303 Error err;
1721618304 if (result_loc->resolved_loc != nullptr) {
......@@ -17230,54 +18318,56 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1723018318 return nullptr;
1723118319 }
1723218320 // need to return a result location and don't have one. use a stack allocation
17233 return ir_resolve_no_result_loc(ira, suspend_source_instr, result_loc, value_type,
17234 force_runtime, non_null_comptime);
18321 return ir_resolve_no_result_loc(ira, suspend_source_instr, result_loc, value_type);
1723518322 }
1723618323 case ResultLocIdVar: {
1723718324 ResultLocVar *result_loc_var = reinterpret_cast<ResultLocVar *>(result_loc);
17238 assert(result_loc->source_instruction->id == IrInstructionIdAllocaSrc);
17239
18325 assert(result_loc->source_instruction->id == IrInstSrcIdAlloca);
18326 IrInstSrcAlloca *alloca_src = reinterpret_cast<IrInstSrcAlloca *>(result_loc->source_instruction);
18327
18328 ZigVar *var = result_loc_var->var;
18329 if (var->var_type != nullptr && !ir_get_var_is_comptime(var)) {
18330 // This is at least the second time we've seen this variable declaration during analysis.
18331 // This means that this is actually a different variable due to, e.g. an inline while loop.
18332 // We make a new variable so that it can hold a different type, and so the debug info can
18333 // be distinct.
18334 ZigVar *new_var = create_local_var(ira->codegen, var->decl_node, var->child_scope,
18335 buf_create_from_str(var->name), var->src_is_const, var->gen_is_const,
18336 var->shadowable, var->is_comptime, true);
18337 new_var->owner_exec = var->owner_exec;
18338 new_var->align_bytes = var->align_bytes;
18339
18340 var->next_var = new_var;
18341 var = new_var;
18342 }
1724018343 if (value_type->id == ZigTypeIdUnreachable || value_type->id == ZigTypeIdOpaque) {
17241 ir_add_error(ira, result_loc->source_instruction,
18344 ir_add_error(ira, &result_loc->source_instruction->base,
1724218345 buf_sprintf("variable of type '%s' not allowed", buf_ptr(&value_type->name)));
17243 return ira->codegen->invalid_instruction;
18346 return ira->codegen->invalid_inst_gen;
1724418347 }
17245
17246 IrInstructionAllocaSrc *alloca_src =
17247 reinterpret_cast<IrInstructionAllocaSrc *>(result_loc->source_instruction);
17248 bool force_comptime;
17249 if (!ir_resolve_comptime(ira, alloca_src->is_comptime->child, &force_comptime))
17250 return ira->codegen->invalid_instruction;
17251 bool is_comptime = force_comptime || (!force_runtime && value != nullptr &&
17252 value->value->special != ConstValSpecialRuntime && result_loc_var->var->gen_is_const);
17253
17254 if (alloca_src->base.child == nullptr || is_comptime) {
18348 if (alloca_src->base.child == nullptr || var->ptr_instruction == nullptr) {
18349 bool force_comptime;
18350 if (!ir_resolve_comptime(ira, alloca_src->is_comptime->child, &force_comptime))
18351 return ira->codegen->invalid_inst_gen;
1725518352 uint32_t align = 0;
1725618353 if (alloca_src->align != nullptr && !ir_resolve_align(ira, alloca_src->align->child, nullptr, &align)) {
17257 return ira->codegen->invalid_instruction;
18354 return ira->codegen->invalid_inst_gen;
1725818355 }
17259 IrInstruction *alloca_gen;
17260 if (is_comptime && value != nullptr) {
17261 if (align > value->value->llvm_align) {
17262 value->value->llvm_align = align;
17263 }
17264 alloca_gen = ir_get_ref(ira, result_loc->source_instruction, value, true, false);
17265 } else {
17266 alloca_gen = ir_analyze_alloca(ira, result_loc->source_instruction, value_type, align,
17267 alloca_src->name_hint, force_comptime);
17268 if (force_runtime) {
17269 alloca_gen->value->data.x_ptr.mut = ConstPtrMutRuntimeVar;
17270 alloca_gen->value->special = ConstValSpecialRuntime;
17271 }
18356 IrInstGen *alloca_gen = ir_analyze_alloca(ira, &result_loc->source_instruction->base, value_type,
18357 align, alloca_src->name_hint, force_comptime);
18358 if (force_runtime) {
18359 alloca_gen->value->data.x_ptr.mut = ConstPtrMutRuntimeVar;
18360 alloca_gen->value->special = ConstValSpecialRuntime;
1727218361 }
1727318362 if (alloca_src->base.child != nullptr && !result_loc->written) {
17274 alloca_src->base.child->ref_count = 0;
18363 alloca_src->base.child->base.ref_count = 0;
1727518364 }
1727618365 alloca_src->base.child = alloca_gen;
18366 var->ptr_instruction = alloca_gen;
1727718367 }
1727818368 result_loc->written = true;
17279 result_loc->resolved_loc = is_comptime ? nullptr : alloca_src->base.child;
17280 return result_loc->resolved_loc;
18369 result_loc->resolved_loc = alloca_src->base.child;
18370 return alloca_src->base.child;
1728118371 }
1728218372 case ResultLocIdInstruction: {
1728318373 result_loc->written = true;
......@@ -17289,27 +18379,8 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1728918379 reinterpret_cast<ResultLocReturn *>(result_loc)->implicit_return_type_done = true;
1729018380 ira->src_implicit_return_type_list.append(value);
1729118381 }
17292 if (!non_null_comptime) {
17293 bool is_comptime = value != nullptr && value->value->special != ConstValSpecialRuntime;
17294 if (is_comptime)
17295 return nullptr;
17296 }
17297 bool has_bits;
17298 if ((err = type_has_bits2(ira->codegen, ira->explicit_return_type, &has_bits)))
17299 return ira->codegen->invalid_instruction;
17300 if (!has_bits || !handle_is_ptr(ira->explicit_return_type)) {
17301 ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);
17302 if (fn_entry == nullptr || fn_entry->inferred_async_node == nullptr) {
17303 return nullptr;
17304 }
17305 }
17306
17307 ZigType *ptr_return_type = get_pointer_to_type(ira->codegen, ira->explicit_return_type, false);
1730818382 result_loc->written = true;
17309 result_loc->resolved_loc = ir_build_return_ptr(ira, result_loc->source_instruction, ptr_return_type);
17310 if (ir_should_inline(ira->old_irb.exec, result_loc->source_instruction->scope)) {
17311 set_up_result_loc_for_inferred_comptime(result_loc->resolved_loc);
17312 }
18383 result_loc->resolved_loc = ira->return_ptr;
1731318384 return result_loc->resolved_loc;
1731418385 }
1731518386 case ResultLocIdPeer: {
......@@ -17317,8 +18388,8 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1731718388 ResultLocPeerParent *peer_parent = result_peer->parent;
1731818389
1731918390 if (peer_parent->peers.length == 1) {
17320 IrInstruction *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
17321 value_type, value, force_runtime, non_null_comptime, true);
18391 IrInstGen *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
18392 value_type, value, force_runtime, true);
1732218393 result_peer->suspend_pos.basic_block_index = SIZE_MAX;
1732318394 result_peer->suspend_pos.instruction_index = SIZE_MAX;
1732418395 if (parent_result_loc == nullptr || type_is_invalid(parent_result_loc->value->type) ||
......@@ -17333,22 +18404,19 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1733318404
1733418405 bool is_condition_comptime;
1733518406 if (!ir_resolve_comptime(ira, peer_parent->is_comptime->child, &is_condition_comptime))
17336 return ira->codegen->invalid_instruction;
18407 return ira->codegen->invalid_inst_gen;
1733718408 if (is_condition_comptime) {
1733818409 peer_parent->skipped = true;
17339 if (non_null_comptime) {
17340 return ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
17341 value_type, value, force_runtime, non_null_comptime, true);
17342 }
17343 return nullptr;
18410 return ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
18411 value_type, value, force_runtime, true);
1734418412 }
1734518413 bool peer_parent_has_type;
1734618414 if ((err = ir_result_has_type(ira, peer_parent->parent, &peer_parent_has_type)))
17347 return ira->codegen->invalid_instruction;
18415 return ira->codegen->invalid_inst_gen;
1734818416 if (peer_parent_has_type) {
1734918417 peer_parent->skipped = true;
17350 IrInstruction *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
17351 value_type, value, force_runtime || !is_condition_comptime, true, true);
18418 IrInstGen *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
18419 value_type, value, force_runtime || !is_condition_comptime, true);
1735218420 if (parent_result_loc == nullptr || type_is_invalid(parent_result_loc->value->type) ||
1735318421 parent_result_loc->value->type->id == ZigTypeIdUnreachable)
1735418422 {
......@@ -17364,7 +18432,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1736418432 if (peer_parent->end_bb->suspend_instruction_ref == nullptr) {
1736518433 peer_parent->end_bb->suspend_instruction_ref = suspend_source_instr;
1736618434 }
17367 IrInstruction *unreach_inst = ira_suspend(ira, suspend_source_instr, result_peer->next_bb,
18435 IrInstGen *unreach_inst = ira_suspend(ira, suspend_source_instr, result_peer->next_bb,
1736818436 &result_peer->suspend_pos);
1736918437 if (result_peer->next_bb == nullptr) {
1737018438 ir_start_next_bb(ira);
......@@ -17372,8 +18440,8 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1737218440 return unreach_inst;
1737318441 }
1737418442
17375 IrInstruction *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
17376 peer_parent->resolved_type, nullptr, force_runtime, non_null_comptime, true);
18443 IrInstGen *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
18444 peer_parent->resolved_type, nullptr, force_runtime, true);
1737718445 if (parent_result_loc == nullptr || type_is_invalid(parent_result_loc->value->type) ||
1737818446 parent_result_loc->value->type->id == ZigTypeIdUnreachable)
1737918447 {
......@@ -17386,30 +18454,27 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1738618454 return result_loc->resolved_loc;
1738718455 }
1738818456 case ResultLocIdCast: {
17389 if (value != nullptr && value->value->special != ConstValSpecialRuntime && !non_null_comptime)
17390 return nullptr;
1739118457 ResultLocCast *result_cast = reinterpret_cast<ResultLocCast *>(result_loc);
1739218458 ZigType *dest_type = ir_resolve_type(ira, result_cast->base.source_instruction->child);
1739318459 if (type_is_invalid(dest_type))
17394 return ira->codegen->invalid_instruction;
18460 return ira->codegen->invalid_inst_gen;
1739518461
1739618462 if (dest_type == ira->codegen->builtin_types.entry_var) {
17397 return ir_resolve_no_result_loc(ira, suspend_source_instr, result_loc, value_type,
17398 force_runtime, non_null_comptime);
18463 return ir_resolve_no_result_loc(ira, suspend_source_instr, result_loc, value_type);
1739918464 }
1740018465
17401 IrInstruction *casted_value;
18466 IrInstGen *casted_value;
1740218467 if (value != nullptr) {
17403 casted_value = ir_implicit_cast(ira, value, dest_type);
18468 casted_value = ir_implicit_cast2(ira, suspend_source_instr, value, dest_type);
1740418469 if (type_is_invalid(casted_value->value->type))
17405 return ira->codegen->invalid_instruction;
18470 return ira->codegen->invalid_inst_gen;
1740618471 dest_type = casted_value->value->type;
1740718472 } else {
1740818473 casted_value = nullptr;
1740918474 }
1741018475
17411 IrInstruction *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, result_cast->parent,
17412 dest_type, casted_value, force_runtime, non_null_comptime, true);
18476 IrInstGen *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, result_cast->parent,
18477 dest_type, casted_value, force_runtime, true);
1741318478 if (parent_result_loc == nullptr || type_is_invalid(parent_result_loc->value->type) ||
1741418479 parent_result_loc->value->type->id == ZigTypeIdUnreachable)
1741518480 {
......@@ -17422,11 +18487,11 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1742218487 if ((err = type_resolve(ira->codegen, parent_ptr_type->data.pointer.child_type,
1742318488 ResolveStatusAlignmentKnown)))
1742418489 {
17425 return ira->codegen->invalid_instruction;
18490 return ira->codegen->invalid_inst_gen;
1742618491 }
1742718492 uint64_t parent_ptr_align = get_ptr_align(ira->codegen, parent_ptr_type);
1742818493 if ((err = type_resolve(ira->codegen, value_type, ResolveStatusAlignmentKnown))) {
17429 return ira->codegen->invalid_instruction;
18494 return ira->codegen->invalid_inst_gen;
1743018495 }
1743118496 if (!type_has_bits(value_type)) {
1743218497 parent_ptr_align = 0;
......@@ -17449,9 +18514,9 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1744918514
1745018515 ConstCastOnly const_cast_result = types_match_const_cast_only(ira,
1745118516 parent_result_loc->value->type, ptr_type,
17452 result_cast->base.source_instruction->source_node, false);
18517 result_cast->base.source_instruction->base.source_node, false);
1745318518 if (const_cast_result.id == ConstCastResultIdInvalid)
17454 return ira->codegen->invalid_instruction;
18519 return ira->codegen->invalid_inst_gen;
1745518520 if (const_cast_result.id != ConstCastResultIdOk) {
1745618521 if (allow_discard) {
1745718522 return parent_result_loc;
......@@ -17459,59 +18524,59 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1745918524 // We will not be able to provide a result location for this value. Create
1746018525 // a new result location.
1746118526 result_cast->parent->written = false;
17462 return ir_resolve_no_result_loc(ira, suspend_source_instr, result_loc, value_type,
17463 force_runtime, non_null_comptime);
18527 return ir_resolve_no_result_loc(ira, suspend_source_instr, result_loc, value_type);
1746418528 }
1746518529
1746618530 result_loc->written = true;
1746718531 result_loc->resolved_loc = ir_analyze_ptr_cast(ira, suspend_source_instr, parent_result_loc,
17468 ptr_type, result_cast->base.source_instruction, false);
18532 &parent_result_loc->base, ptr_type, &result_cast->base.source_instruction->base, false);
1746918533 return result_loc->resolved_loc;
1747018534 }
1747118535 case ResultLocIdBitCast: {
1747218536 ResultLocBitCast *result_bit_cast = reinterpret_cast<ResultLocBitCast *>(result_loc);
1747318537 ZigType *dest_type = ir_resolve_type(ira, result_bit_cast->base.source_instruction->child);
1747418538 if (type_is_invalid(dest_type))
17475 return ira->codegen->invalid_instruction;
18539 return ira->codegen->invalid_inst_gen;
1747618540
1747718541 if (get_codegen_ptr_type(dest_type) != nullptr) {
17478 ir_add_error(ira, result_loc->source_instruction,
18542 ir_add_error(ira, &result_loc->source_instruction->base,
1747918543 buf_sprintf("unable to @bitCast to pointer type '%s'", buf_ptr(&dest_type->name)));
17480 return ira->codegen->invalid_instruction;
18544 return ira->codegen->invalid_inst_gen;
1748118545 }
1748218546
1748318547 if (!type_can_bit_cast(dest_type)) {
17484 ir_add_error(ira, result_loc->source_instruction,
18548 ir_add_error(ira, &result_loc->source_instruction->base,
1748518549 buf_sprintf("unable to @bitCast to type '%s'", buf_ptr(&dest_type->name)));
17486 return ira->codegen->invalid_instruction;
18550 return ira->codegen->invalid_inst_gen;
1748718551 }
1748818552
1748918553 if (get_codegen_ptr_type(value_type) != nullptr) {
1749018554 ir_add_error(ira, suspend_source_instr,
1749118555 buf_sprintf("unable to @bitCast from pointer type '%s'", buf_ptr(&value_type->name)));
17492 return ira->codegen->invalid_instruction;
18556 return ira->codegen->invalid_inst_gen;
1749318557 }
1749418558
1749518559 if (!type_can_bit_cast(value_type)) {
1749618560 ir_add_error(ira, suspend_source_instr,
1749718561 buf_sprintf("unable to @bitCast from type '%s'", buf_ptr(&value_type->name)));
17498 return ira->codegen->invalid_instruction;
18562 return ira->codegen->invalid_inst_gen;
1749918563 }
1750018564
17501 IrInstruction *bitcasted_value;
18565 IrInstGen *bitcasted_value;
1750218566 if (value != nullptr) {
17503 bitcasted_value = ir_analyze_bit_cast(ira, result_loc->source_instruction, value, dest_type);
18567 bitcasted_value = ir_analyze_bit_cast(ira, &result_loc->source_instruction->base, value, dest_type);
1750418568 dest_type = bitcasted_value->value->type;
1750518569 } else {
1750618570 bitcasted_value = nullptr;
1750718571 }
1750818572
17509 if (bitcasted_value == nullptr || type_is_invalid(bitcasted_value->value->type)) {
18573 if (bitcasted_value != nullptr && type_is_invalid(bitcasted_value->value->type)) {
1751018574 return bitcasted_value;
1751118575 }
1751218576
17513 IrInstruction *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, result_bit_cast->parent,
17514 dest_type, bitcasted_value, force_runtime, non_null_comptime, true);
18577 bool parent_was_written = result_bit_cast->parent->written;
18578 IrInstGen *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, result_bit_cast->parent,
18579 dest_type, bitcasted_value, force_runtime, true);
1751518580 if (parent_result_loc == nullptr || type_is_invalid(parent_result_loc->value->type) ||
1751618581 parent_result_loc->value->type->id == ZigTypeIdUnreachable)
1751718582 {
......@@ -17521,55 +18586,59 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1752118586 assert(parent_ptr_type->id == ZigTypeIdPointer);
1752218587 ZigType *child_type = parent_ptr_type->data.pointer.child_type;
1752318588
17524 bool has_bits;
17525 if ((err = type_has_bits2(ira->codegen, child_type, &has_bits))) {
17526 return ira->codegen->invalid_instruction;
17527 }
17528
17529 // This happens when the bitCast result is assigned to _
17530 if (!has_bits) {
18589 if (result_loc_is_discard(result_bit_cast->parent)) {
1753118590 assert(allow_discard);
1753218591 return parent_result_loc;
1753318592 }
1753418593
17535 if ((err = type_resolve(ira->codegen, child_type, ResolveStatusAlignmentKnown))) {
17536 return ira->codegen->invalid_instruction;
18594 if ((err = type_resolve(ira->codegen, child_type, ResolveStatusSizeKnown))) {
18595 return ira->codegen->invalid_inst_gen;
1753718596 }
1753818597
17539 uint64_t parent_ptr_align = get_ptr_align(ira->codegen, parent_ptr_type);
17540 if ((err = type_resolve(ira->codegen, value_type, ResolveStatusAlignmentKnown))) {
17541 return ira->codegen->invalid_instruction;
18598 if ((err = type_resolve(ira->codegen, value_type, ResolveStatusSizeKnown))) {
18599 return ira->codegen->invalid_inst_gen;
18600 }
18601
18602 if (child_type != ira->codegen->builtin_types.entry_var) {
18603 if (type_size(ira->codegen, child_type) != type_size(ira->codegen, value_type)) {
18604 // pointer cast won't work; we need a temporary location.
18605 result_bit_cast->parent->written = parent_was_written;
18606 result_loc->written = true;
18607 result_loc->resolved_loc = ir_resolve_result(ira, suspend_source_instr, no_result_loc(),
18608 value_type, bitcasted_value, force_runtime, true);
18609 return result_loc->resolved_loc;
18610 }
1754218611 }
18612 uint64_t parent_ptr_align = 0;
18613 if (type_has_bits(value_type)) parent_ptr_align = get_ptr_align(ira->codegen, parent_ptr_type);
1754318614 ZigType *ptr_type = get_pointer_to_type_extra(ira->codegen, value_type,
1754418615 parent_ptr_type->data.pointer.is_const, parent_ptr_type->data.pointer.is_volatile, PtrLenSingle,
1754518616 parent_ptr_align, 0, 0, parent_ptr_type->data.pointer.allow_zero);
1754618617
1754718618 result_loc->written = true;
1754818619 result_loc->resolved_loc = ir_analyze_ptr_cast(ira, suspend_source_instr, parent_result_loc,
17549 ptr_type, result_bit_cast->base.source_instruction, false);
18620 &parent_result_loc->base, ptr_type, &result_bit_cast->base.source_instruction->base, false);
1755018621 return result_loc->resolved_loc;
1755118622 }
1755218623 }
1755318624 zig_unreachable();
1755418625}
1755518626
17556static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_source_instr,
17557 ResultLoc *result_loc_pass1, ZigType *value_type, IrInstruction *value, bool force_runtime,
17558 bool non_null_comptime, bool allow_discard)
18627static IrInstGen *ir_resolve_result(IrAnalyze *ira, IrInst *suspend_source_instr,
18628 ResultLoc *result_loc_pass1, ZigType *value_type, IrInstGen *value, bool force_runtime,
18629 bool allow_discard)
1755918630{
17560 Error err;
17561 if (!allow_discard && result_loc_pass1->id == ResultLocIdInstruction &&
17562 instr_is_comptime(result_loc_pass1->source_instruction) &&
17563 result_loc_pass1->source_instruction->value->type->id == ZigTypeIdPointer &&
17564 result_loc_pass1->source_instruction->value->data.x_ptr.special == ConstPtrSpecialDiscard)
17565 {
18631 if (!allow_discard && result_loc_is_discard(result_loc_pass1)) {
1756618632 result_loc_pass1 = no_result_loc();
1756718633 }
17568 bool was_already_resolved = result_loc_pass1->resolved_loc != nullptr;
17569 IrInstruction *result_loc = ir_resolve_result_raw(ira, suspend_source_instr, result_loc_pass1, value_type,
17570 value, force_runtime, non_null_comptime, allow_discard);
17571 if (result_loc == nullptr || (instr_is_unreachable(result_loc) || type_is_invalid(result_loc->value->type)))
18634 bool was_written = result_loc_pass1->written;
18635 IrInstGen *result_loc = ir_resolve_result_raw(ira, suspend_source_instr, result_loc_pass1, value_type,
18636 value, force_runtime, allow_discard);
18637 if (result_loc == nullptr || result_loc->value->type->id == ZigTypeIdUnreachable ||
18638 type_is_invalid(result_loc->value->type))
18639 {
1757218640 return result_loc;
18641 }
1757318642
1757418643 if ((force_runtime || (value != nullptr && !instr_is_comptime(value))) &&
1757518644 result_loc_pass1->written && result_loc->value->data.x_ptr.mut == ConstPtrMutInfer)
......@@ -17578,56 +18647,63 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
1757818647 }
1757918648
1758018649 InferredStructField *isf = result_loc->value->type->data.pointer.inferred_struct_field;
17581 if (!was_already_resolved && isf != nullptr) {
17582 // Now it's time to add the field to the struct type.
17583 uint32_t old_field_count = isf->inferred_struct_type->data.structure.src_field_count;
17584 uint32_t new_field_count = old_field_count + 1;
17585 isf->inferred_struct_type->data.structure.src_field_count = new_field_count;
17586 isf->inferred_struct_type->data.structure.fields = realloc_type_struct_fields(
17587 isf->inferred_struct_type->data.structure.fields, old_field_count, new_field_count);
17588
17589 TypeStructField *field = isf->inferred_struct_type->data.structure.fields[old_field_count];
17590 field->name = isf->field_name;
17591 field->type_entry = value_type;
17592 field->type_val = create_const_type(ira->codegen, field->type_entry);
17593 field->src_index = old_field_count;
17594 field->decl_node = value ? value->source_node : suspend_source_instr->source_node;
17595 if (value && instr_is_comptime(value)) {
17596 ZigValue *val = ir_resolve_const(ira, value, UndefOk);
17597 if (!val)
17598 return ira->codegen->invalid_instruction;
17599 field->is_comptime = true;
17600 field->init_val = create_const_vals(1);
17601 copy_const_val(field->init_val, val);
17602 return result_loc;
17603 }
17604
17605 ZigType *struct_ptr_type = get_pointer_to_type(ira->codegen, isf->inferred_struct_type, false);
17606 IrInstruction *casted_ptr;
17607 if (instr_is_comptime(result_loc)) {
17608 casted_ptr = ir_const(ira, suspend_source_instr, struct_ptr_type);
17609 copy_const_val(casted_ptr->value, result_loc->value);
17610 casted_ptr->value->type = struct_ptr_type;
17611 } else {
18650 if (isf != nullptr) {
18651 TypeStructField *field;
18652 IrInstGen *casted_ptr;
18653 if (isf->already_resolved) {
18654 field = find_struct_type_field(isf->inferred_struct_type, isf->field_name);
1761218655 casted_ptr = result_loc;
17613 }
17614 if (instr_is_comptime(casted_ptr)) {
17615 ZigValue *ptr_val = ir_resolve_const(ira, casted_ptr, UndefBad);
17616 if (!ptr_val)
17617 return ira->codegen->invalid_instruction;
17618 if (ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {
17619 ZigValue *struct_val = const_ptr_pointee(ira, ira->codegen, ptr_val,
17620 suspend_source_instr->source_node);
17621 struct_val->special = ConstValSpecialStatic;
17622 struct_val->data.x_struct.fields = realloc_const_vals_ptrs(struct_val->data.x_struct.fields,
17623 old_field_count, new_field_count);
18656 } else {
18657 isf->already_resolved = true;
18658 // Now it's time to add the field to the struct type.
18659 uint32_t old_field_count = isf->inferred_struct_type->data.structure.src_field_count;
18660 uint32_t new_field_count = old_field_count + 1;
18661 isf->inferred_struct_type->data.structure.src_field_count = new_field_count;
18662 isf->inferred_struct_type->data.structure.fields = realloc_type_struct_fields(
18663 isf->inferred_struct_type->data.structure.fields, old_field_count, new_field_count);
18664
18665 field = isf->inferred_struct_type->data.structure.fields[old_field_count];
18666 field->name = isf->field_name;
18667 field->type_entry = value_type;
18668 field->type_val = create_const_type(ira->codegen, field->type_entry);
18669 field->src_index = old_field_count;
18670 field->decl_node = value ? value->base.source_node : suspend_source_instr->source_node;
18671 if (value && instr_is_comptime(value)) {
18672 ZigValue *val = ir_resolve_const(ira, value, UndefOk);
18673 if (!val)
18674 return ira->codegen->invalid_inst_gen;
18675 field->is_comptime = true;
18676 field->init_val = create_const_vals(1);
18677 copy_const_val(field->init_val, val);
18678 return result_loc;
18679 }
1762418680
17625 ZigValue *field_val = struct_val->data.x_struct.fields[old_field_count];
17626 field_val->special = ConstValSpecialUndef;
17627 field_val->type = field->type_entry;
17628 field_val->parent.id = ConstParentIdStruct;
17629 field_val->parent.data.p_struct.struct_val = struct_val;
17630 field_val->parent.data.p_struct.field_index = old_field_count;
18681 ZigType *struct_ptr_type = get_pointer_to_type(ira->codegen, isf->inferred_struct_type, false);
18682 if (instr_is_comptime(result_loc)) {
18683 casted_ptr = ir_const(ira, suspend_source_instr, struct_ptr_type);
18684 copy_const_val(casted_ptr->value, result_loc->value);
18685 casted_ptr->value->type = struct_ptr_type;
18686 } else {
18687 casted_ptr = result_loc;
18688 }
18689 if (instr_is_comptime(casted_ptr)) {
18690 ZigValue *ptr_val = ir_resolve_const(ira, casted_ptr, UndefBad);
18691 if (!ptr_val)
18692 return ira->codegen->invalid_inst_gen;
18693 if (ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {
18694 ZigValue *struct_val = const_ptr_pointee(ira, ira->codegen, ptr_val,
18695 suspend_source_instr->source_node);
18696 struct_val->special = ConstValSpecialStatic;
18697 struct_val->data.x_struct.fields = realloc_const_vals_ptrs(struct_val->data.x_struct.fields,
18698 old_field_count, new_field_count);
18699
18700 ZigValue *field_val = struct_val->data.x_struct.fields[old_field_count];
18701 field_val->special = ConstValSpecialUndef;
18702 field_val->type = field->type_entry;
18703 field_val->parent.id = ConstParentIdStruct;
18704 field_val->parent.data.p_struct.struct_val = struct_val;
18705 field_val->parent.data.p_struct.field_index = old_field_count;
18706 }
1763118707 }
1763218708 }
1763318709
......@@ -17636,73 +18712,70 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
1763618712 result_loc_pass1->resolved_loc = result_loc;
1763718713 }
1763818714
18715 if (was_written) {
18716 return result_loc;
18717 }
1763918718
1764018719 ir_assert(result_loc->value->type->id == ZigTypeIdPointer, suspend_source_instr);
1764118720 ZigType *actual_elem_type = result_loc->value->type->data.pointer.child_type;
1764218721 if (actual_elem_type->id == ZigTypeIdOptional && value_type->id != ZigTypeIdOptional &&
17643 value_type->id != ZigTypeIdNull)
18722 value_type->id != ZigTypeIdNull && value_type->id != ZigTypeIdUndefined)
1764418723 {
17645 bool has_bits;
17646 if ((err = type_has_bits2(ira->codegen, value_type, &has_bits)))
17647 return ira->codegen->invalid_instruction;
17648 if (has_bits) {
17649 result_loc_pass1->written = false;
18724 bool same_comptime_repr = types_have_same_zig_comptime_repr(ira->codegen, actual_elem_type, value_type);
18725 if (!same_comptime_repr) {
18726 result_loc_pass1->written = was_written;
1765018727 return ir_analyze_unwrap_optional_payload(ira, suspend_source_instr, result_loc, false, true);
1765118728 }
17652 } else if (actual_elem_type->id == ZigTypeIdErrorUnion && value_type->id != ZigTypeIdErrorUnion) {
17653 bool has_bits;
17654 if ((err = type_has_bits2(ira->codegen, value_type, &has_bits)))
17655 return ira->codegen->invalid_instruction;
17656 if (has_bits) {
17657 if (value_type->id == ZigTypeIdErrorSet) {
17658 return ir_analyze_unwrap_err_code(ira, suspend_source_instr, result_loc, true);
18729 } else if (actual_elem_type->id == ZigTypeIdErrorUnion && value_type->id != ZigTypeIdErrorUnion &&
18730 value_type->id != ZigTypeIdUndefined)
18731 {
18732 if (value_type->id == ZigTypeIdErrorSet) {
18733 return ir_analyze_unwrap_err_code(ira, suspend_source_instr, result_loc, true);
18734 } else {
18735 IrInstGen *unwrapped_err_ptr = ir_analyze_unwrap_error_payload(ira, suspend_source_instr,
18736 result_loc, false, true);
18737 ZigType *actual_payload_type = actual_elem_type->data.error_union.payload_type;
18738 if (actual_payload_type->id == ZigTypeIdOptional && value_type->id != ZigTypeIdOptional &&
18739 value_type->id != ZigTypeIdNull && value_type->id != ZigTypeIdUndefined)
18740 {
18741 return ir_analyze_unwrap_optional_payload(ira, suspend_source_instr, unwrapped_err_ptr, false, true);
1765918742 } else {
17660 IrInstruction *unwrapped_err_ptr = ir_analyze_unwrap_error_payload(ira, suspend_source_instr,
17661 result_loc, false, true);
17662 ZigType *actual_payload_type = actual_elem_type->data.error_union.payload_type;
17663 if (actual_payload_type->id == ZigTypeIdOptional && value_type->id != ZigTypeIdOptional &&
17664 value_type->id != ZigTypeIdNull) {
17665 return ir_analyze_unwrap_optional_payload(ira, suspend_source_instr, unwrapped_err_ptr, false, true);
17666 } else {
17667 return unwrapped_err_ptr;
17668 }
18743 return unwrapped_err_ptr;
1766918744 }
1767018745 }
1767118746 }
1767218747 return result_loc;
1767318748}
1767418749
17675static IrInstruction *ir_analyze_instruction_resolve_result(IrAnalyze *ira,
17676 IrInstructionResolveResult *instruction)
17677{
18750static IrInstGen *ir_analyze_instruction_resolve_result(IrAnalyze *ira, IrInstSrcResolveResult *instruction) {
1767818751 ZigType *implicit_elem_type;
1767918752 if (instruction->ty == nullptr) {
1768018753 if (instruction->result_loc->id == ResultLocIdCast) {
1768118754 implicit_elem_type = ir_resolve_type(ira,
1768218755 instruction->result_loc->source_instruction->child);
1768318756 if (type_is_invalid(implicit_elem_type))
17684 return ira->codegen->invalid_instruction;
18757 return ira->codegen->invalid_inst_gen;
1768518758 } else if (instruction->result_loc->id == ResultLocIdReturn) {
1768618759 implicit_elem_type = ira->explicit_return_type;
1768718760 if (type_is_invalid(implicit_elem_type))
17688 return ira->codegen->invalid_instruction;
18761 return ira->codegen->invalid_inst_gen;
1768918762 } else {
1769018763 implicit_elem_type = ira->codegen->builtin_types.entry_var;
1769118764 }
1769218765 if (implicit_elem_type == ira->codegen->builtin_types.entry_var) {
1769318766 Buf *bare_name = buf_alloc();
1769418767 Buf *name = get_anon_type_name(ira->codegen, nullptr, container_string(ContainerKindStruct),
17695 instruction->base.scope, instruction->base.source_node, bare_name);
18768 instruction->base.base.scope, instruction->base.base.source_node, bare_name);
1769618769
1769718770 StructSpecial struct_special = StructSpecialInferredStruct;
17698 if (instruction->base.source_node->type == NodeTypeContainerInitExpr &&
17699 instruction->base.source_node->data.container_init_expr.kind == ContainerInitKindArray)
18771 if (instruction->base.base.source_node->type == NodeTypeContainerInitExpr &&
18772 instruction->base.base.source_node->data.container_init_expr.kind == ContainerInitKindArray)
1770018773 {
1770118774 struct_special = StructSpecialInferredTuple;
1770218775 }
1770318776
1770418777 ZigType *inferred_struct_type = get_partial_container_type(ira->codegen,
17705 instruction->base.scope, ContainerKindStruct, instruction->base.source_node,
18778 instruction->base.base.scope, ContainerKindStruct, instruction->base.base.source_node,
1770618779 buf_ptr(name), bare_name, ContainerLayoutAuto);
1770718780 inferred_struct_type->data.structure.special = struct_special;
1770818781 inferred_struct_type->data.structure.resolve_status = ResolveStatusBeingInferred;
......@@ -17711,21 +18784,21 @@ static IrInstruction *ir_analyze_instruction_resolve_result(IrAnalyze *ira,
1771118784 } else {
1771218785 implicit_elem_type = ir_resolve_type(ira, instruction->ty->child);
1771318786 if (type_is_invalid(implicit_elem_type))
17714 return ira->codegen->invalid_instruction;
18787 return ira->codegen->invalid_inst_gen;
1771518788 }
17716 IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,
17717 implicit_elem_type, nullptr, false, true, true);
18789 IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
18790 implicit_elem_type, nullptr, false, true);
1771818791 if (result_loc != nullptr)
1771918792 return result_loc;
1772018793
17721 ZigFn *fn = exec_fn_entry(ira->new_irb.exec);
18794 ZigFn *fn = ira->new_irb.exec->fn_entry;
1772218795 if (fn != nullptr && fn->type_entry->data.fn.fn_type_id.cc == CallingConventionAsync &&
1772318796 instruction->result_loc->id == ResultLocIdReturn)
1772418797 {
17725 result_loc = ir_resolve_result(ira, &instruction->base, no_result_loc(),
17726 implicit_elem_type, nullptr, false, true, true);
18798 result_loc = ir_resolve_result(ira, &instruction->base.base, no_result_loc(),
18799 implicit_elem_type, nullptr, false, true);
1772718800 if (result_loc != nullptr &&
17728 (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)))
18801 (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable))
1772918802 {
1773018803 return result_loc;
1773118804 }
......@@ -17733,9 +18806,9 @@ static IrInstruction *ir_analyze_instruction_resolve_result(IrAnalyze *ira,
1773318806 return result_loc;
1773418807 }
1773518808
17736 IrInstruction *result = ir_const(ira, &instruction->base, implicit_elem_type);
18809 IrInstGen *result = ir_const(ira, &instruction->base.base, implicit_elem_type);
1773718810 result->value->special = ConstValSpecialUndef;
17738 IrInstruction *ptr = ir_get_ref(ira, &instruction->base, result, false, false);
18811 IrInstGen *ptr = ir_get_ref(ira, &instruction->base.base, result, false, false);
1773918812 ptr->value->data.x_ptr.mut = ConstPtrMutComptimeVar;
1774018813 return ptr;
1774118814}
......@@ -17759,8 +18832,7 @@ static void ir_reset_result(ResultLoc *result_loc) {
1775918832 break;
1776018833 }
1776118834 case ResultLocIdVar: {
17762 IrInstructionAllocaSrc *alloca_src =
17763 reinterpret_cast<IrInstructionAllocaSrc *>(result_loc->source_instruction);
18835 IrInstSrcAlloca *alloca_src = reinterpret_cast<IrInstSrcAlloca *>(result_loc->source_instruction);
1776418836 alloca_src->base.child = nullptr;
1776518837 break;
1776618838 }
......@@ -17776,18 +18848,18 @@ static void ir_reset_result(ResultLoc *result_loc) {
1777618848 }
1777718849}
1777818850
17779static IrInstruction *ir_analyze_instruction_reset_result(IrAnalyze *ira, IrInstructionResetResult *instruction) {
18851static IrInstGen *ir_analyze_instruction_reset_result(IrAnalyze *ira, IrInstSrcResetResult *instruction) {
1778018852 ir_reset_result(instruction->result_loc);
17781 return ir_const_void(ira, &instruction->base);
18853 return ir_const_void(ira, &instruction->base.base);
1778218854}
1778318855
17784static IrInstruction *get_async_call_result_loc(IrAnalyze *ira, IrInstruction *source_instr,
17785 ZigType *fn_ret_type, bool is_async_call_builtin, IrInstruction **args_ptr, size_t args_len,
17786 IrInstruction *ret_ptr_uncasted)
18856static IrInstGen *get_async_call_result_loc(IrAnalyze *ira, IrInst* source_instr,
18857 ZigType *fn_ret_type, bool is_async_call_builtin, IrInstGen **args_ptr, size_t args_len,
18858 IrInstGen *ret_ptr_uncasted)
1778718859{
1778818860 ir_assert(is_async_call_builtin, source_instr);
1778918861 if (type_is_invalid(ret_ptr_uncasted->value->type))
17790 return ira->codegen->invalid_instruction;
18862 return ira->codegen->invalid_inst_gen;
1779118863 if (ret_ptr_uncasted->value->type->id == ZigTypeIdVoid) {
1779218864 // Result location will be inside the async frame.
1779318865 return nullptr;
......@@ -17795,57 +18867,58 @@ static IrInstruction *get_async_call_result_loc(IrAnalyze *ira, IrInstruction *s
1779518867 return ir_implicit_cast(ira, ret_ptr_uncasted, get_pointer_to_type(ira->codegen, fn_ret_type, false));
1779618868}
1779718869
17798static IrInstruction *ir_analyze_async_call(IrAnalyze *ira, IrInstruction *source_instr, ZigFn *fn_entry,
17799 ZigType *fn_type, IrInstruction *fn_ref, IrInstruction **casted_args, size_t arg_count,
17800 IrInstruction *casted_new_stack, bool is_async_call_builtin, IrInstruction *ret_ptr_uncasted,
18870static IrInstGen *ir_analyze_async_call(IrAnalyze *ira, IrInst* source_instr, ZigFn *fn_entry,
18871 ZigType *fn_type, IrInstGen *fn_ref, IrInstGen **casted_args, size_t arg_count,
18872 IrInstGen *casted_new_stack, bool is_async_call_builtin, IrInstGen *ret_ptr_uncasted,
1780118873 ResultLoc *call_result_loc)
1780218874{
1780318875 if (fn_entry == nullptr) {
1780418876 if (fn_type->data.fn.fn_type_id.cc != CallingConventionAsync) {
17805 ir_add_error(ira, fn_ref,
18877 ir_add_error(ira, &fn_ref->base,
1780618878 buf_sprintf("expected async function, found '%s'", buf_ptr(&fn_type->name)));
17807 return ira->codegen->invalid_instruction;
18879 return ira->codegen->invalid_inst_gen;
1780818880 }
1780918881 if (casted_new_stack == nullptr) {
17810 ir_add_error(ira, fn_ref, buf_sprintf("function is not comptime-known; @asyncCall required"));
17811 return ira->codegen->invalid_instruction;
18882 ir_add_error(ira, &fn_ref->base, buf_sprintf("function is not comptime-known; @asyncCall required"));
18883 return ira->codegen->invalid_inst_gen;
1781218884 }
1781318885 }
1781418886 if (casted_new_stack != nullptr) {
1781518887 ZigType *fn_ret_type = fn_type->data.fn.fn_type_id.return_type;
17816 IrInstruction *ret_ptr = get_async_call_result_loc(ira, source_instr, fn_ret_type, is_async_call_builtin,
18888 IrInstGen *ret_ptr = get_async_call_result_loc(ira, source_instr, fn_ret_type, is_async_call_builtin,
1781718889 casted_args, arg_count, ret_ptr_uncasted);
1781818890 if (ret_ptr != nullptr && type_is_invalid(ret_ptr->value->type))
17819 return ira->codegen->invalid_instruction;
18891 return ira->codegen->invalid_inst_gen;
1782018892
1782118893 ZigType *anyframe_type = get_any_frame_type(ira->codegen, fn_ret_type);
1782218894
17823 IrInstructionCallGen *call_gen = ir_build_call_gen(ira, source_instr, fn_entry, fn_ref,
18895 IrInstGenCall *call_gen = ir_build_call_gen(ira, source_instr, fn_entry, fn_ref,
1782418896 arg_count, casted_args, CallModifierAsync, casted_new_stack,
1782518897 is_async_call_builtin, ret_ptr, anyframe_type);
1782618898 return &call_gen->base;
1782718899 } else {
1782818900 ZigType *frame_type = get_fn_frame_type(ira->codegen, fn_entry);
17829 IrInstruction *result_loc = ir_resolve_result(ira, source_instr, call_result_loc,
17830 frame_type, nullptr, true, true, false);
17831 if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {
18901 IrInstGen *result_loc = ir_resolve_result(ira, source_instr, call_result_loc,
18902 frame_type, nullptr, true, false);
18903 if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
1783218904 return result_loc;
1783318905 }
17834 result_loc = ir_implicit_cast(ira, result_loc, get_pointer_to_type(ira->codegen, frame_type, false));
18906 result_loc = ir_implicit_cast2(ira, &call_result_loc->source_instruction->base, result_loc,
18907 get_pointer_to_type(ira->codegen, frame_type, false));
1783518908 if (type_is_invalid(result_loc->value->type))
17836 return ira->codegen->invalid_instruction;
18909 return ira->codegen->invalid_inst_gen;
1783718910 return &ir_build_call_gen(ira, source_instr, fn_entry, fn_ref, arg_count,
1783818911 casted_args, CallModifierAsync, casted_new_stack,
1783918912 is_async_call_builtin, result_loc, frame_type)->base;
1784018913 }
1784118914}
1784218915static bool ir_analyze_fn_call_inline_arg(IrAnalyze *ira, AstNode *fn_proto_node,
17843 IrInstruction *arg, Scope **exec_scope, size_t *next_proto_i)
18916 IrInstGen *arg, Scope **exec_scope, size_t *next_proto_i)
1784418917{
1784518918 AstNode *param_decl_node = fn_proto_node->data.fn_proto.params.at(*next_proto_i);
1784618919 assert(param_decl_node->type == NodeTypeParamDecl);
1784718920
17848 IrInstruction *casted_arg;
18921 IrInstGen *casted_arg;
1784918922 if (param_decl_node->data.param_decl.var_token == nullptr) {
1785018923 AstNode *param_type_node = param_decl_node->data.param_decl.type;
1785118924 ZigType *param_type = ir_analyze_type_expr(ira, *exec_scope, param_type_node);
......@@ -17873,15 +18946,15 @@ static bool ir_analyze_fn_call_inline_arg(IrAnalyze *ira, AstNode *fn_proto_node
1787318946}
1787418947
1787518948static bool ir_analyze_fn_call_generic_arg(IrAnalyze *ira, AstNode *fn_proto_node,
17876 IrInstruction *arg, Scope **child_scope, size_t *next_proto_i,
17877 GenericFnTypeId *generic_id, FnTypeId *fn_type_id, IrInstruction **casted_args,
18949 IrInstGen *arg, IrInst *arg_src, Scope **child_scope, size_t *next_proto_i,
18950 GenericFnTypeId *generic_id, FnTypeId *fn_type_id, IrInstGen **casted_args,
1787818951 ZigFn *impl_fn)
1787918952{
1788018953 AstNode *param_decl_node = fn_proto_node->data.fn_proto.params.at(*next_proto_i);
1788118954 assert(param_decl_node->type == NodeTypeParamDecl);
1788218955 bool is_var_args = param_decl_node->data.param_decl.is_var_args;
1788318956 bool arg_part_of_generic_id = false;
17884 IrInstruction *casted_arg;
18957 IrInstGen *casted_arg;
1788518958 if (is_var_args) {
1788618959 arg_part_of_generic_id = true;
1788718960 casted_arg = arg;
......@@ -17892,7 +18965,7 @@ static bool ir_analyze_fn_call_generic_arg(IrAnalyze *ira, AstNode *fn_proto_nod
1789218965 if (type_is_invalid(param_type))
1789318966 return false;
1789418967
17895 casted_arg = ir_implicit_cast(ira, arg, param_type);
18968 casted_arg = ir_implicit_cast2(ira, arg_src, arg, param_type);
1789618969 if (type_is_invalid(casted_arg->value->type))
1789718970 return false;
1789818971 } else {
......@@ -17941,7 +19014,7 @@ static bool ir_analyze_fn_call_generic_arg(IrAnalyze *ira, AstNode *fn_proto_nod
1794119014 } else if (casted_arg->value->type->id == ZigTypeIdComptimeInt ||
1794219015 casted_arg->value->type->id == ZigTypeIdComptimeFloat)
1794319016 {
17944 ir_add_error(ira, casted_arg,
19017 ir_add_error(ira, &casted_arg->base,
1794519018 buf_sprintf("compiler bug: integer and float literals in var args function must be casted. https://github.com/ziglang/zig/issues/557"));
1794619019 return false;
1794719020 }
......@@ -17958,47 +19031,33 @@ static bool ir_analyze_fn_call_generic_arg(IrAnalyze *ira, AstNode *fn_proto_nod
1795819031 return true;
1795919032}
1796019033
17961static IrInstruction *ir_get_var_ptr(IrAnalyze *ira, IrInstruction *instruction, ZigVar *var) {
19034static IrInstGen *ir_get_var_ptr(IrAnalyze *ira, IrInst *source_instr, ZigVar *var) {
1796219035 while (var->next_var != nullptr) {
1796319036 var = var->next_var;
1796419037 }
1796519038
17966 if (var->mem_slot_index != SIZE_MAX && var->owner_exec->analysis == nullptr) {
17967 assert(ira->codegen->errors.length != 0);
17968 return ira->codegen->invalid_instruction;
17969 }
1797019039 if (var->var_type == nullptr || type_is_invalid(var->var_type))
17971 return ira->codegen->invalid_instruction;
19040 return ira->codegen->invalid_inst_gen;
1797219041
17973 ZigValue *mem_slot = nullptr;
17974
17975 bool comptime_var_mem = ir_get_var_is_comptime(var);
17976 bool linkage_makes_it_runtime = var->decl_node->data.variable_declaration.is_extern;
1797719042 bool is_volatile = false;
17978
17979 IrInstruction *result = ir_build_var_ptr(&ira->new_irb,
17980 instruction->scope, instruction->source_node, var);
17981 result->value->type = get_pointer_to_type_extra(ira->codegen, var->var_type,
19043 ZigType *var_ptr_type = get_pointer_to_type_extra(ira->codegen, var->var_type,
1798219044 var->src_is_const, is_volatile, PtrLenSingle, var->align_bytes, 0, 0, false);
1798319045
17984 if (linkage_makes_it_runtime || var->is_thread_local)
17985 goto no_mem_slot;
17986
17987 if (value_is_comptime(var->const_value)) {
17988 mem_slot = var->const_value;
17989 } else if (var->mem_slot_index != SIZE_MAX && (comptime_var_mem || var->gen_is_const)) {
17990 // find the relevant exec_context
17991 assert(var->owner_exec != nullptr);
17992 assert(var->owner_exec->analysis != nullptr);
17993 IrExecContext *exec_context = &var->owner_exec->analysis->exec_context;
17994 assert(var->mem_slot_index < exec_context->mem_slot_list.length);
17995 mem_slot = exec_context->mem_slot_list.at(var->mem_slot_index);
19046 if (var->ptr_instruction != nullptr) {
19047 return ir_implicit_cast(ira, var->ptr_instruction, var_ptr_type);
1799619048 }
1799719049
17998 if (mem_slot != nullptr) {
17999 switch (mem_slot->special) {
19050 bool comptime_var_mem = ir_get_var_is_comptime(var);
19051 bool linkage_makes_it_runtime = var->decl_node->data.variable_declaration.is_extern;
19052
19053 IrInstGen *result = ir_build_var_ptr_gen(ira, source_instr, var);
19054 result->value->type = var_ptr_type;
19055
19056 if (!linkage_makes_it_runtime && !var->is_thread_local && value_is_comptime(var->const_value)) {
19057 ZigValue *val = var->const_value;
19058 switch (val->special) {
1800019059 case ConstValSpecialRuntime:
18001 goto no_mem_slot;
19060 break;
1800219061 case ConstValSpecialStatic: // fallthrough
1800319062 case ConstValSpecialLazy: // fallthrough
1800419063 case ConstValSpecialUndef: {
......@@ -18014,15 +19073,12 @@ static IrInstruction *ir_get_var_ptr(IrAnalyze *ira, IrInstruction *instruction,
1801419073 result->value->special = ConstValSpecialStatic;
1801519074 result->value->data.x_ptr.mut = ptr_mut;
1801619075 result->value->data.x_ptr.special = ConstPtrSpecialRef;
18017 result->value->data.x_ptr.data.ref.pointee = mem_slot;
19076 result->value->data.x_ptr.data.ref.pointee = val;
1801819077 return result;
1801919078 }
1802019079 }
18021 zig_unreachable();
1802219080 }
1802319081
18024no_mem_slot:
18025
1802619082 bool in_fn_scope = (scope_fn_entry(var->parent_scope) != nullptr);
1802719083 result->value->data.rh_ptr = in_fn_scope ? RuntimeHintPtrStack : RuntimeHintPtrNonStack;
1802819084
......@@ -18030,7 +19086,7 @@ no_mem_slot:
1803019086}
1803119087
1803219088// This function is called when a comptime value becomes accessible at runtime.
18033static void mark_comptime_value_escape(IrAnalyze *ira, IrInstruction *source_instr, ZigValue *val) {
19089static void mark_comptime_value_escape(IrAnalyze *ira, IrInst* source_instr, ZigValue *val) {
1803419090 ir_assert(value_is_comptime(val), source_instr);
1803519091 if (val->special == ConstValSpecialUndef)
1803619092 return;
......@@ -18043,8 +19099,8 @@ static void mark_comptime_value_escape(IrAnalyze *ira, IrInstruction *source_ins
1804319099 }
1804419100}
1804519101
18046static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source_instr,
18047 IrInstruction *ptr, IrInstruction *uncasted_value, bool allow_write_through_const)
19102static IrInstGen *ir_analyze_store_ptr(IrAnalyze *ira, IrInst* source_instr,
19103 IrInstGen *ptr, IrInstGen *uncasted_value, bool allow_write_through_const)
1804819104{
1804919105 assert(ptr->value->type->id == ZigTypeIdPointer);
1805019106
......@@ -18053,24 +19109,24 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
1805319109 uncasted_value->value->type->id == ZigTypeIdErrorSet)
1805419110 {
1805519111 ir_add_error(ira, source_instr, buf_sprintf("error is discarded"));
18056 return ira->codegen->invalid_instruction;
19112 return ira->codegen->invalid_inst_gen;
1805719113 }
1805819114 return ir_const_void(ira, source_instr);
1805919115 }
1806019116
1806119117 if (ptr->value->type->data.pointer.is_const && !allow_write_through_const) {
1806219118 ir_add_error(ira, source_instr, buf_sprintf("cannot assign to constant"));
18063 return ira->codegen->invalid_instruction;
19119 return ira->codegen->invalid_inst_gen;
1806419120 }
1806519121
1806619122 ZigType *child_type = ptr->value->type->data.pointer.child_type;
18067 IrInstruction *value = ir_implicit_cast(ira, uncasted_value, child_type);
18068 if (value == ira->codegen->invalid_instruction)
18069 return ira->codegen->invalid_instruction;
19123 IrInstGen *value = ir_implicit_cast(ira, uncasted_value, child_type);
19124 if (type_is_invalid(value->value->type))
19125 return ira->codegen->invalid_inst_gen;
1807019126
1807119127 switch (type_has_one_possible_value(ira->codegen, child_type)) {
1807219128 case OnePossibleValueInvalid:
18073 return ira->codegen->invalid_instruction;
19129 return ira->codegen->invalid_inst_gen;
1807419130 case OnePossibleValueYes:
1807519131 return ir_const_void(ira, source_instr);
1807619132 case OnePossibleValueNo:
......@@ -18080,7 +19136,7 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
1808019136 if (instr_is_comptime(ptr) && ptr->value->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {
1808119137 if (!allow_write_through_const && ptr->value->data.x_ptr.mut == ConstPtrMutComptimeConst) {
1808219138 ir_add_error(ira, source_instr, buf_sprintf("cannot assign to constant"));
18083 return ira->codegen->invalid_instruction;
19139 return ira->codegen->invalid_inst_gen;
1808419140 }
1808519141 if ((allow_write_through_const && ptr->value->data.x_ptr.mut == ConstPtrMutComptimeConst) ||
1808619142 ptr->value->data.x_ptr.mut == ConstPtrMutComptimeVar ||
......@@ -18089,7 +19145,7 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
1808919145 if (instr_is_comptime(value)) {
1809019146 ZigValue *dest_val = const_ptr_pointee(ira, ira->codegen, ptr->value, source_instr->source_node);
1809119147 if (dest_val == nullptr)
18092 return ira->codegen->invalid_instruction;
19148 return ira->codegen->invalid_inst_gen;
1809319149 if (dest_val->special != ConstValSpecialRuntime) {
1809419150 copy_const_val(dest_val, value->value);
1809519151
......@@ -18109,7 +19165,7 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
1810919165 ZigValue *dest_val = const_ptr_pointee_unchecked(ira->codegen, ptr->value);
1811019166 dest_val->type = ira->codegen->builtin_types.entry_invalid;
1811119167
18112 return ira->codegen->invalid_instruction;
19168 return ira->codegen->invalid_inst_gen;
1811319169 }
1811419170 }
1811519171 }
......@@ -18122,15 +19178,15 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
1812219178
1812319179 switch (type_requires_comptime(ira->codegen, child_type)) {
1812419180 case ReqCompTimeInvalid:
18125 return ira->codegen->invalid_instruction;
19181 return ira->codegen->invalid_inst_gen;
1812619182 case ReqCompTimeYes:
1812719183 switch (type_has_one_possible_value(ira->codegen, ptr->value->type)) {
1812819184 case OnePossibleValueInvalid:
18129 return ira->codegen->invalid_instruction;
19185 return ira->codegen->invalid_inst_gen;
1813019186 case OnePossibleValueNo:
1813119187 ir_add_error(ira, source_instr,
1813219188 buf_sprintf("cannot store runtime value in type '%s'", buf_ptr(&child_type->name)));
18133 return ira->codegen->invalid_instruction;
19189 return ira->codegen->invalid_inst_gen;
1813419190 case OnePossibleValueYes:
1813519191 return ir_const_void(ira, source_instr);
1813619192 }
......@@ -18144,30 +19200,28 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
1814419200 }
1814519201
1814619202 // If this is a store to a pointer with a runtime-known vector index,
18147 // we have to figure out the IrInstruction which represents the index and
18148 // emit a IrInstructionVectorStoreElem, or emit a compile error
19203 // we have to figure out the IrInstGen which represents the index and
19204 // emit a IrInstGenVectorStoreElem, or emit a compile error
1814919205 // explaining why it is impossible for this store to work. Which is that
1815019206 // the pointer address is of the vector; without the element index being known
1815119207 // we cannot properly perform the insertion.
1815219208 if (ptr->value->type->data.pointer.vector_index == VECTOR_INDEX_RUNTIME) {
18153 if (ptr->id == IrInstructionIdElemPtr) {
18154 IrInstructionElemPtr *elem_ptr = (IrInstructionElemPtr *)ptr;
19209 if (ptr->id == IrInstGenIdElemPtr) {
19210 IrInstGenElemPtr *elem_ptr = (IrInstGenElemPtr *)ptr;
1815519211 return ir_build_vector_store_elem(ira, source_instr, elem_ptr->array_ptr,
1815619212 elem_ptr->elem_index, value);
1815719213 }
18158 ir_add_error(ira, ptr,
19214 ir_add_error(ira, &ptr->base,
1815919215 buf_sprintf("unable to determine vector element index of type '%s'",
1816019216 buf_ptr(&ptr->value->type->name)));
18161 return ira->codegen->invalid_instruction;
19217 return ira->codegen->invalid_inst_gen;
1816219218 }
1816319219
18164 IrInstructionStorePtr *store_ptr = ir_build_store_ptr(&ira->new_irb, source_instr->scope,
18165 source_instr->source_node, ptr, value);
18166 return &store_ptr->base;
19220 return ir_build_store_ptr_gen(ira, source_instr, ptr, value);
1816719221}
1816819222
18169static IrInstruction *analyze_casted_new_stack(IrAnalyze *ira, IrInstruction *source_instr,
18170 IrInstruction *new_stack, bool is_async_call_builtin, ZigFn *fn_entry)
19223static IrInstGen *analyze_casted_new_stack(IrAnalyze *ira, IrInst* source_instr,
19224 IrInstGen *new_stack, IrInst *new_stack_src, bool is_async_call_builtin, ZigFn *fn_entry)
1817119225{
1817219226 if (new_stack == nullptr)
1817319227 return nullptr;
......@@ -18192,15 +19246,15 @@ static IrInstruction *analyze_casted_new_stack(IrAnalyze *ira, IrInstruction *so
1819219246 false, false, PtrLenUnknown, target_fn_align(ira->codegen->zig_target), 0, 0, false);
1819319247 ZigType *u8_slice = get_slice_type(ira->codegen, u8_ptr);
1819419248 ira->codegen->need_frame_size_prefix_data = true;
18195 return ir_implicit_cast(ira, new_stack, u8_slice);
19249 return ir_implicit_cast2(ira, new_stack_src, new_stack, u8_slice);
1819619250 }
1819719251}
1819819252
18199static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_instr,
18200 ZigFn *fn_entry, ZigType *fn_type, IrInstruction *fn_ref,
18201 IrInstruction *first_arg_ptr, CallModifier modifier,
18202 IrInstruction *new_stack, bool is_async_call_builtin,
18203 IrInstruction **args_ptr, size_t args_len, IrInstruction *ret_ptr, ResultLoc *call_result_loc)
19253static IrInstGen *ir_analyze_fn_call(IrAnalyze *ira, IrInst* source_instr,
19254 ZigFn *fn_entry, ZigType *fn_type, IrInstGen *fn_ref,
19255 IrInstGen *first_arg_ptr, IrInst *first_arg_ptr_src, CallModifier modifier,
19256 IrInstGen *new_stack, IrInst *new_stack_src, bool is_async_call_builtin,
19257 IrInstGen **args_ptr, size_t args_len, IrInstGen *ret_ptr, ResultLoc *call_result_loc)
1820419258{
1820519259 Error err;
1820619260 FnTypeId *fn_type_id = &fn_type->data.fn.fn_type_id;
......@@ -18221,11 +19275,11 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1822119275 AstNode *fn_proto_node = fn_entry ? fn_entry->proto_node : nullptr;;
1822219276
1822319277 if (fn_type_id->cc == CallingConventionNaked) {
18224 ErrorMsg *msg = ir_add_error(ira, fn_ref, buf_sprintf("unable to call function with naked calling convention"));
19278 ErrorMsg *msg = ir_add_error(ira, &fn_ref->base, buf_sprintf("unable to call function with naked calling convention"));
1822519279 if (fn_proto_node) {
1822619280 add_error_note(ira->codegen, msg, fn_proto_node, buf_sprintf("declared here"));
1822719281 }
18228 return ira->codegen->invalid_instruction;
19282 return ira->codegen->invalid_inst_gen;
1822919283 }
1823019284
1823119285 if (fn_type_id->is_var_args) {
......@@ -18236,7 +19290,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1823619290 add_error_note(ira->codegen, msg, fn_proto_node,
1823719291 buf_sprintf("declared here"));
1823819292 }
18239 return ira->codegen->invalid_instruction;
19293 return ira->codegen->invalid_inst_gen;
1824019294 }
1824119295 } else if (src_param_count != call_param_count) {
1824219296 ErrorMsg *msg = ir_add_error_node(ira, source_node,
......@@ -18245,18 +19299,18 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1824519299 add_error_note(ira->codegen, msg, fn_proto_node,
1824619300 buf_sprintf("declared here"));
1824719301 }
18248 return ira->codegen->invalid_instruction;
19302 return ira->codegen->invalid_inst_gen;
1824919303 }
1825019304
1825119305 if (modifier == CallModifierCompileTime) {
1825219306 // No special handling is needed for compile time evaluation of generic functions.
1825319307 if (!fn_entry || fn_entry->body_node == nullptr) {
18254 ir_add_error(ira, fn_ref, buf_sprintf("unable to evaluate constant expression"));
18255 return ira->codegen->invalid_instruction;
19308 ir_add_error(ira, &fn_ref->base, buf_sprintf("unable to evaluate constant expression"));
19309 return ira->codegen->invalid_inst_gen;
1825619310 }
1825719311
1825819312 if (!ir_emit_backward_branch(ira, source_instr))
18259 return ira->codegen->invalid_instruction;
19313 return ira->codegen->invalid_inst_gen;
1826019314
1826119315 // Fork a scope of the function with known values for the parameters.
1826219316 Scope *exec_scope = &fn_entry->fndef_scope->base;
......@@ -18269,47 +19323,40 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1826919323 if (fn_type_id->next_param_index >= 1) {
1827019324 ZigType *param_type = fn_type_id->param_info[next_proto_i].type;
1827119325 if (type_is_invalid(param_type))
18272 return ira->codegen->invalid_instruction;
19326 return ira->codegen->invalid_inst_gen;
1827319327 first_arg_known_bare = param_type->id != ZigTypeIdPointer;
1827419328 }
1827519329
18276 IrInstruction *first_arg;
19330 IrInstGen *first_arg;
1827719331 if (!first_arg_known_bare && handle_is_ptr(first_arg_ptr->value->type->data.pointer.child_type)) {
1827819332 first_arg = first_arg_ptr;
1827919333 } else {
18280 first_arg = ir_get_deref(ira, first_arg_ptr, first_arg_ptr, nullptr);
19334 first_arg = ir_get_deref(ira, &first_arg_ptr->base, first_arg_ptr, nullptr);
1828119335 if (type_is_invalid(first_arg->value->type))
18282 return ira->codegen->invalid_instruction;
19336 return ira->codegen->invalid_inst_gen;
1828319337 }
1828419338
1828519339 if (!ir_analyze_fn_call_inline_arg(ira, fn_proto_node, first_arg, &exec_scope, &next_proto_i))
18286 return ira->codegen->invalid_instruction;
18287 }
18288
18289 if (fn_proto_node->data.fn_proto.is_var_args) {
18290 ir_add_error(ira, source_instr,
18291 buf_sprintf("compiler bug: unable to call var args function at compile time. https://github.com/ziglang/zig/issues/313"));
18292 return ira->codegen->invalid_instruction;
19340 return ira->codegen->invalid_inst_gen;
1829319341 }
1829419342
18295
1829619343 for (size_t call_i = 0; call_i < args_len; call_i += 1) {
18297 IrInstruction *old_arg = args_ptr[call_i];
19344 IrInstGen *old_arg = args_ptr[call_i];
1829819345
1829919346 if (!ir_analyze_fn_call_inline_arg(ira, fn_proto_node, old_arg, &exec_scope, &next_proto_i))
18300 return ira->codegen->invalid_instruction;
19347 return ira->codegen->invalid_inst_gen;
1830119348 }
1830219349
1830319350 AstNode *return_type_node = fn_proto_node->data.fn_proto.return_type;
1830419351 ZigType *specified_return_type = ir_analyze_type_expr(ira, exec_scope, return_type_node);
1830519352 if (type_is_invalid(specified_return_type))
18306 return ira->codegen->invalid_instruction;
19353 return ira->codegen->invalid_inst_gen;
1830719354 ZigType *return_type;
1830819355 ZigType *inferred_err_set_type = nullptr;
1830919356 if (fn_proto_node->data.fn_proto.auto_err_set) {
1831019357 inferred_err_set_type = get_auto_err_set_type(ira->codegen, fn_entry);
1831119358 if ((err = type_resolve(ira->codegen, specified_return_type, ResolveStatusSizeKnown)))
18312 return ira->codegen->invalid_instruction;
19359 return ira->codegen->invalid_inst_gen;
1831319360 return_type = get_error_union_type(ira->codegen, inferred_err_set_type, specified_return_type);
1831419361 } else {
1831519362 return_type = specified_return_type;
......@@ -18326,10 +19373,17 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1832619373 if (result == nullptr) {
1832719374 // Analyze the fn body block like any other constant expression.
1832819375 AstNode *body_node = fn_entry->body_node;
18329 result = ir_eval_const_value(ira->codegen, exec_scope, body_node, return_type,
18330 ira->new_irb.exec->backward_branch_count, ira->new_irb.exec->backward_branch_quota, fn_entry,
18331 nullptr, source_instr->source_node, nullptr, ira->new_irb.exec, return_type_node,
18332 UndefOk);
19376 ZigValue *result_ptr;
19377 create_result_ptr(ira->codegen, return_type, &result, &result_ptr);
19378 if ((err = ir_eval_const_value(ira->codegen, exec_scope, body_node, result_ptr,
19379 ira->new_irb.exec->backward_branch_count, ira->new_irb.exec->backward_branch_quota,
19380 fn_entry, nullptr, source_instr->source_node, nullptr, ira->new_irb.exec, return_type_node,
19381 UndefOk)))
19382 {
19383 return ira->codegen->invalid_inst_gen;
19384 }
19385 destroy(result_ptr, "ZigValue");
19386 result_ptr = nullptr;
1833319387
1833419388 if (inferred_err_set_type != nullptr) {
1833519389 inferred_err_set_type->data.error_set.incomplete = false;
......@@ -18354,24 +19408,24 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1835419408 }
1835519409
1835619410 if (type_is_invalid(result->type)) {
18357 return ira->codegen->invalid_instruction;
19411 return ira->codegen->invalid_inst_gen;
1835819412 }
1835919413 }
1836019414
18361 IrInstruction *new_instruction = ir_const_move(ira, source_instr, result);
19415 IrInstGen *new_instruction = ir_const_move(ira, source_instr, result);
1836219416 return ir_finish_anal(ira, new_instruction);
1836319417 }
1836419418
1836519419 if (fn_type->data.fn.is_generic) {
1836619420 if (!fn_entry) {
18367 ir_add_error(ira, fn_ref,
19421 ir_add_error(ira, &fn_ref->base,
1836819422 buf_sprintf("calling a generic function requires compile-time known function value"));
18369 return ira->codegen->invalid_instruction;
19423 return ira->codegen->invalid_inst_gen;
1837019424 }
1837119425
1837219426 size_t new_fn_arg_count = first_arg_1_or_0 + args_len;
1837319427
18374 IrInstruction **casted_args = allocate<IrInstruction *>(new_fn_arg_count);
19428 IrInstGen **casted_args = allocate<IrInstGen *>(new_fn_arg_count);
1837519429
1837619430 // Fork a scope of the function with known values for the parameters.
1837719431 Scope *parent_scope = fn_entry->fndef_scope->base.parent;
......@@ -18400,50 +19454,57 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1840019454 if (fn_type_id->next_param_index >= 1) {
1840119455 ZigType *param_type = fn_type_id->param_info[next_proto_i].type;
1840219456 if (type_is_invalid(param_type))
18403 return ira->codegen->invalid_instruction;
19457 return ira->codegen->invalid_inst_gen;
1840419458 first_arg_known_bare = param_type->id != ZigTypeIdPointer;
1840519459 }
1840619460
18407 IrInstruction *first_arg;
19461 IrInstGen *first_arg;
1840819462 if (!first_arg_known_bare && handle_is_ptr(first_arg_ptr->value->type->data.pointer.child_type)) {
1840919463 first_arg = first_arg_ptr;
1841019464 } else {
18411 first_arg = ir_get_deref(ira, first_arg_ptr, first_arg_ptr, nullptr);
19465 first_arg = ir_get_deref(ira, &first_arg_ptr->base, first_arg_ptr, nullptr);
1841219466 if (type_is_invalid(first_arg->value->type))
18413 return ira->codegen->invalid_instruction;
19467 return ira->codegen->invalid_inst_gen;
1841419468 }
1841519469
18416 if (!ir_analyze_fn_call_generic_arg(ira, fn_proto_node, first_arg, &impl_fn->child_scope,
18417 &next_proto_i, generic_id, &inst_fn_type_id, casted_args, impl_fn))
19470 if (!ir_analyze_fn_call_generic_arg(ira, fn_proto_node, first_arg, first_arg_ptr_src,
19471 &impl_fn->child_scope, &next_proto_i, generic_id, &inst_fn_type_id, casted_args, impl_fn))
1841819472 {
18419 return ira->codegen->invalid_instruction;
19473 return ira->codegen->invalid_inst_gen;
1842019474 }
1842119475 }
1842219476
18423 ZigFn *parent_fn_entry = exec_fn_entry(ira->new_irb.exec);
19477 ZigFn *parent_fn_entry = ira->new_irb.exec->fn_entry;
1842419478 assert(parent_fn_entry);
1842519479 for (size_t call_i = 0; call_i < args_len; call_i += 1) {
18426 IrInstruction *arg = args_ptr[call_i];
19480 IrInstGen *arg = args_ptr[call_i];
1842719481
1842819482 AstNode *param_decl_node = fn_proto_node->data.fn_proto.params.at(next_proto_i);
1842919483 assert(param_decl_node->type == NodeTypeParamDecl);
1843019484
18431 if (!ir_analyze_fn_call_generic_arg(ira, fn_proto_node, arg, &impl_fn->child_scope,
19485 if (!ir_analyze_fn_call_generic_arg(ira, fn_proto_node, arg, &arg->base, &impl_fn->child_scope,
1843219486 &next_proto_i, generic_id, &inst_fn_type_id, casted_args, impl_fn))
1843319487 {
18434 return ira->codegen->invalid_instruction;
19488 return ira->codegen->invalid_inst_gen;
1843519489 }
1843619490 }
1843719491
1843819492 if (fn_proto_node->data.fn_proto.align_expr != nullptr) {
18439 ZigValue *align_result = ir_eval_const_value(ira->codegen, impl_fn->child_scope,
18440 fn_proto_node->data.fn_proto.align_expr, get_align_amt_type(ira->codegen),
18441 ira->new_irb.exec->backward_branch_count, ira->new_irb.exec->backward_branch_quota,
18442 nullptr, nullptr, fn_proto_node->data.fn_proto.align_expr, nullptr, ira->new_irb.exec,
18443 nullptr, UndefBad);
18444 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
19493 ZigValue *align_result;
19494 ZigValue *result_ptr;
19495 create_result_ptr(ira->codegen, get_align_amt_type(ira->codegen), &align_result, &result_ptr);
19496 if ((err = ir_eval_const_value(ira->codegen, impl_fn->child_scope,
19497 fn_proto_node->data.fn_proto.align_expr, result_ptr,
19498 ira->new_irb.exec->backward_branch_count, ira->new_irb.exec->backward_branch_quota,
19499 nullptr, nullptr, fn_proto_node->data.fn_proto.align_expr, nullptr, ira->new_irb.exec,
19500 nullptr, UndefBad)))
19501 {
19502 return ira->codegen->invalid_inst_gen;
19503 }
19504 IrInstGenConst *const_instruction = ir_create_inst_noval<IrInstGenConst>(&ira->new_irb,
1844519505 impl_fn->child_scope, fn_proto_node->data.fn_proto.align_expr);
18446 copy_const_val(const_instruction->base.value, align_result);
19506 const_instruction->base.value = align_result;
19507 destroy(result_ptr, "ZigValue");
1844719508
1844819509 uint32_t align_bytes = 0;
1844919510 ir_resolve_align(ira, &const_instruction->base, nullptr, &align_bytes);
......@@ -18455,11 +19516,11 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1845519516 AstNode *return_type_node = fn_proto_node->data.fn_proto.return_type;
1845619517 ZigType *specified_return_type = ir_analyze_type_expr(ira, impl_fn->child_scope, return_type_node);
1845719518 if (type_is_invalid(specified_return_type))
18458 return ira->codegen->invalid_instruction;
19519 return ira->codegen->invalid_inst_gen;
1845919520 if (fn_proto_node->data.fn_proto.auto_err_set) {
1846019521 ZigType *inferred_err_set_type = get_auto_err_set_type(ira->codegen, impl_fn);
1846119522 if ((err = type_resolve(ira->codegen, specified_return_type, ResolveStatusSizeKnown)))
18462 return ira->codegen->invalid_instruction;
19523 return ira->codegen->invalid_inst_gen;
1846319524 inst_fn_type_id.return_type = get_error_union_type(ira->codegen, inferred_err_set_type, specified_return_type);
1846419525 } else {
1846519526 inst_fn_type_id.return_type = specified_return_type;
......@@ -18469,10 +19530,10 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1846919530 case ReqCompTimeYes:
1847019531 // Throw out our work and call the function as if it were comptime.
1847119532 return ir_analyze_fn_call(ira, source_instr, fn_entry, fn_type, fn_ref, first_arg_ptr,
18472 CallModifierCompileTime, new_stack, is_async_call_builtin, args_ptr, args_len,
18473 ret_ptr, call_result_loc);
19533 first_arg_ptr_src, CallModifierCompileTime, new_stack, new_stack_src, is_async_call_builtin,
19534 args_ptr, args_len, ret_ptr, call_result_loc);
1847419535 case ReqCompTimeInvalid:
18475 return ira->codegen->invalid_instruction;
19536 return ira->codegen->invalid_inst_gen;
1847619537 case ReqCompTimeNo:
1847719538 break;
1847819539 }
......@@ -18486,7 +19547,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1848619547 // finish instantiating the function
1848719548 impl_fn->type_entry = get_fn_type(ira->codegen, &inst_fn_type_id);
1848819549 if (type_is_invalid(impl_fn->type_entry))
18489 return ira->codegen->invalid_instruction;
19550 return ira->codegen->invalid_inst_gen;
1849019551
1849119552 impl_fn->ir_executable->source_node = source_instr->source_node;
1849219553 impl_fn->ir_executable->parent_exec = ira->new_irb.exec;
......@@ -18504,25 +19565,25 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1850419565 parent_fn_entry->calls_or_awaits_errorable_fn = true;
1850519566 }
1850619567
18507 IrInstruction *casted_new_stack = analyze_casted_new_stack(ira, source_instr, new_stack,
18508 is_async_call_builtin, impl_fn);
19568 IrInstGen *casted_new_stack = analyze_casted_new_stack(ira, source_instr, new_stack,
19569 new_stack_src, is_async_call_builtin, impl_fn);
1850919570 if (casted_new_stack != nullptr && type_is_invalid(casted_new_stack->value->type))
18510 return ira->codegen->invalid_instruction;
19571 return ira->codegen->invalid_inst_gen;
1851119572
1851219573 size_t impl_param_count = impl_fn_type_id->param_count;
1851319574 if (modifier == CallModifierAsync) {
18514 IrInstruction *result = ir_analyze_async_call(ira, source_instr, impl_fn, impl_fn->type_entry,
19575 IrInstGen *result = ir_analyze_async_call(ira, source_instr, impl_fn, impl_fn->type_entry,
1851519576 nullptr, casted_args, impl_param_count, casted_new_stack, is_async_call_builtin, ret_ptr,
1851619577 call_result_loc);
1851719578 return ir_finish_anal(ira, result);
1851819579 }
1851919580
18520 IrInstruction *result_loc;
19581 IrInstGen *result_loc;
1852119582 if (handle_is_ptr(impl_fn_type_id->return_type)) {
1852219583 result_loc = ir_resolve_result(ira, source_instr, call_result_loc,
18523 impl_fn_type_id->return_type, nullptr, true, true, false);
19584 impl_fn_type_id->return_type, nullptr, true, false);
1852419585 if (result_loc != nullptr) {
18525 if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {
19586 if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
1852619587 return result_loc;
1852719588 }
1852819589 ZigType *res_child_type = result_loc->value->type->data.pointer.child_type;
......@@ -18538,7 +19599,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1853819599 result_loc = get_async_call_result_loc(ira, source_instr, impl_fn_type_id->return_type,
1853919600 is_async_call_builtin, args_ptr, args_len, ret_ptr);
1854019601 if (result_loc != nullptr && type_is_invalid(result_loc->value->type))
18541 return ira->codegen->invalid_instruction;
19602 return ira->codegen->invalid_inst_gen;
1854219603 } else {
1854319604 result_loc = nullptr;
1854419605 }
......@@ -18547,11 +19608,11 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1854719608 parent_fn_entry->inferred_async_node == nullptr &&
1854819609 modifier != CallModifierNoAsync)
1854919610 {
18550 parent_fn_entry->inferred_async_node = fn_ref->source_node;
19611 parent_fn_entry->inferred_async_node = fn_ref->base.source_node;
1855119612 parent_fn_entry->inferred_async_fn = impl_fn;
1855219613 }
1855319614
18554 IrInstructionCallGen *new_call_instruction = ir_build_call_gen(ira, source_instr,
19615 IrInstGenCall *new_call_instruction = ir_build_call_gen(ira, source_instr,
1855519616 impl_fn, nullptr, impl_param_count, casted_args, modifier, casted_new_stack,
1855619617 is_async_call_builtin, result_loc, impl_fn_type_id->return_type);
1855719618
......@@ -18562,7 +19623,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1856219623 return ir_finish_anal(ira, &new_call_instruction->base);
1856319624 }
1856419625
18565 ZigFn *parent_fn_entry = exec_fn_entry(ira->new_irb.exec);
19626 ZigFn *parent_fn_entry = ira->new_irb.exec->fn_entry;
1856619627 assert(fn_type_id->return_type != nullptr);
1856719628 assert(parent_fn_entry != nullptr);
1856819629 if (fn_type_can_fail(fn_type_id)) {
......@@ -18570,46 +19631,46 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1857019631 }
1857119632
1857219633
18573 IrInstruction **casted_args = allocate<IrInstruction *>(call_param_count);
19634 IrInstGen **casted_args = allocate<IrInstGen *>(call_param_count);
1857419635 size_t next_arg_index = 0;
1857519636 if (first_arg_ptr) {
1857619637 assert(first_arg_ptr->value->type->id == ZigTypeIdPointer);
1857719638
1857819639 ZigType *param_type = fn_type_id->param_info[next_arg_index].type;
1857919640 if (type_is_invalid(param_type))
18580 return ira->codegen->invalid_instruction;
19641 return ira->codegen->invalid_inst_gen;
1858119642
18582 IrInstruction *first_arg;
19643 IrInstGen *first_arg;
1858319644 if (param_type->id == ZigTypeIdPointer &&
1858419645 handle_is_ptr(first_arg_ptr->value->type->data.pointer.child_type))
1858519646 {
1858619647 first_arg = first_arg_ptr;
1858719648 } else {
18588 first_arg = ir_get_deref(ira, first_arg_ptr, first_arg_ptr, nullptr);
19649 first_arg = ir_get_deref(ira, &first_arg_ptr->base, first_arg_ptr, nullptr);
1858919650 if (type_is_invalid(first_arg->value->type))
18590 return ira->codegen->invalid_instruction;
19651 return ira->codegen->invalid_inst_gen;
1859119652 }
1859219653
18593 IrInstruction *casted_arg = ir_implicit_cast(ira, first_arg, param_type);
19654 IrInstGen *casted_arg = ir_implicit_cast2(ira, first_arg_ptr_src, first_arg, param_type);
1859419655 if (type_is_invalid(casted_arg->value->type))
18595 return ira->codegen->invalid_instruction;
19656 return ira->codegen->invalid_inst_gen;
1859619657
1859719658 casted_args[next_arg_index] = casted_arg;
1859819659 next_arg_index += 1;
1859919660 }
1860019661 for (size_t call_i = 0; call_i < args_len; call_i += 1) {
18601 IrInstruction *old_arg = args_ptr[call_i];
19662 IrInstGen *old_arg = args_ptr[call_i];
1860219663 if (type_is_invalid(old_arg->value->type))
18603 return ira->codegen->invalid_instruction;
19664 return ira->codegen->invalid_inst_gen;
1860419665
18605 IrInstruction *casted_arg;
19666 IrInstGen *casted_arg;
1860619667 if (next_arg_index < src_param_count) {
1860719668 ZigType *param_type = fn_type_id->param_info[next_arg_index].type;
1860819669 if (type_is_invalid(param_type))
18609 return ira->codegen->invalid_instruction;
19670 return ira->codegen->invalid_inst_gen;
1861019671 casted_arg = ir_implicit_cast(ira, old_arg, param_type);
1861119672 if (type_is_invalid(casted_arg->value->type))
18612 return ira->codegen->invalid_instruction;
19673 return ira->codegen->invalid_inst_gen;
1861319674 } else {
1861419675 casted_arg = old_arg;
1861519676 }
......@@ -18622,21 +19683,21 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1862219683
1862319684 ZigType *return_type = fn_type_id->return_type;
1862419685 if (type_is_invalid(return_type))
18625 return ira->codegen->invalid_instruction;
19686 return ira->codegen->invalid_inst_gen;
1862619687
1862719688 if (fn_entry != nullptr && fn_entry->fn_inline == FnInlineAlways && modifier == CallModifierNeverInline) {
1862819689 ir_add_error(ira, source_instr,
1862919690 buf_sprintf("no-inline call of inline function"));
18630 return ira->codegen->invalid_instruction;
19691 return ira->codegen->invalid_inst_gen;
1863119692 }
1863219693
18633 IrInstruction *casted_new_stack = analyze_casted_new_stack(ira, source_instr, new_stack,
19694 IrInstGen *casted_new_stack = analyze_casted_new_stack(ira, source_instr, new_stack, new_stack_src,
1863419695 is_async_call_builtin, fn_entry);
1863519696 if (casted_new_stack != nullptr && type_is_invalid(casted_new_stack->value->type))
18636 return ira->codegen->invalid_instruction;
19697 return ira->codegen->invalid_inst_gen;
1863719698
1863819699 if (modifier == CallModifierAsync) {
18639 IrInstruction *result = ir_analyze_async_call(ira, source_instr, fn_entry, fn_type, fn_ref,
19700 IrInstGen *result = ir_analyze_async_call(ira, source_instr, fn_entry, fn_type, fn_ref,
1864019701 casted_args, call_param_count, casted_new_stack, is_async_call_builtin, ret_ptr, call_result_loc);
1864119702 return ir_finish_anal(ira, result);
1864219703 }
......@@ -18645,16 +19706,16 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1864519706 parent_fn_entry->inferred_async_node == nullptr &&
1864619707 modifier != CallModifierNoAsync)
1864719708 {
18648 parent_fn_entry->inferred_async_node = fn_ref->source_node;
19709 parent_fn_entry->inferred_async_node = fn_ref->base.source_node;
1864919710 parent_fn_entry->inferred_async_fn = fn_entry;
1865019711 }
1865119712
18652 IrInstruction *result_loc;
19713 IrInstGen *result_loc;
1865319714 if (handle_is_ptr(return_type)) {
1865419715 result_loc = ir_resolve_result(ira, source_instr, call_result_loc,
18655 return_type, nullptr, true, true, false);
19716 return_type, nullptr, true, false);
1865619717 if (result_loc != nullptr) {
18657 if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {
19718 if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
1865819719 return result_loc;
1865919720 }
1866019721 ZigType *res_child_type = result_loc->value->type->data.pointer.child_type;
......@@ -18670,12 +19731,12 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1867019731 result_loc = get_async_call_result_loc(ira, source_instr, return_type, is_async_call_builtin,
1867119732 args_ptr, args_len, ret_ptr);
1867219733 if (result_loc != nullptr && type_is_invalid(result_loc->value->type))
18673 return ira->codegen->invalid_instruction;
19734 return ira->codegen->invalid_inst_gen;
1867419735 } else {
1867519736 result_loc = nullptr;
1867619737 }
1867719738
18678 IrInstructionCallGen *new_call_instruction = ir_build_call_gen(ira, source_instr, fn_entry, fn_ref,
19739 IrInstGenCall *new_call_instruction = ir_build_call_gen(ira, source_instr, fn_entry, fn_ref,
1867919740 call_param_count, casted_args, modifier, casted_new_stack,
1868019741 is_async_call_builtin, result_loc, return_type);
1868119742 if (get_scope_typeof(source_instr->scope) == nullptr) {
......@@ -18684,62 +19745,65 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1868419745 return ir_finish_anal(ira, &new_call_instruction->base);
1868519746}
1868619747
18687static IrInstruction *ir_analyze_fn_call_src(IrAnalyze *ira, IrInstructionCallSrc *call_instruction,
18688 ZigFn *fn_entry, ZigType *fn_type, IrInstruction *fn_ref,
18689 IrInstruction *first_arg_ptr, CallModifier modifier)
19748static IrInstGen *ir_analyze_fn_call_src(IrAnalyze *ira, IrInstSrcCall *call_instruction,
19749 ZigFn *fn_entry, ZigType *fn_type, IrInstGen *fn_ref,
19750 IrInstGen *first_arg_ptr, IrInst *first_arg_ptr_src, CallModifier modifier)
1869019751{
18691 IrInstruction *new_stack = nullptr;
19752 IrInstGen *new_stack = nullptr;
19753 IrInst *new_stack_src = nullptr;
1869219754 if (call_instruction->new_stack) {
1869319755 new_stack = call_instruction->new_stack->child;
1869419756 if (type_is_invalid(new_stack->value->type))
18695 return ira->codegen->invalid_instruction;
19757 return ira->codegen->invalid_inst_gen;
19758 new_stack_src = &call_instruction->new_stack->base;
1869619759 }
18697 IrInstruction **args_ptr = allocate<IrInstruction *>(call_instruction->arg_count, "IrInstruction *");
19760 IrInstGen **args_ptr = allocate<IrInstGen *>(call_instruction->arg_count, "IrInstGen *");
1869819761 for (size_t i = 0; i < call_instruction->arg_count; i += 1) {
1869919762 args_ptr[i] = call_instruction->args[i]->child;
1870019763 if (type_is_invalid(args_ptr[i]->value->type))
18701 return ira->codegen->invalid_instruction;
19764 return ira->codegen->invalid_inst_gen;
1870219765 }
18703 IrInstruction *ret_ptr = nullptr;
19766 IrInstGen *ret_ptr = nullptr;
1870419767 if (call_instruction->ret_ptr != nullptr) {
1870519768 ret_ptr = call_instruction->ret_ptr->child;
1870619769 if (type_is_invalid(ret_ptr->value->type))
18707 return ira->codegen->invalid_instruction;
19770 return ira->codegen->invalid_inst_gen;
1870819771 }
18709 IrInstruction *result = ir_analyze_fn_call(ira, &call_instruction->base, fn_entry, fn_type, fn_ref,
18710 first_arg_ptr, modifier, new_stack, call_instruction->is_async_call_builtin,
18711 args_ptr, call_instruction->arg_count, ret_ptr, call_instruction->result_loc);
18712 deallocate(args_ptr, call_instruction->arg_count, "IrInstruction *");
19772 IrInstGen *result = ir_analyze_fn_call(ira, &call_instruction->base.base, fn_entry, fn_type, fn_ref,
19773 first_arg_ptr, first_arg_ptr_src, modifier, new_stack, new_stack_src,
19774 call_instruction->is_async_call_builtin, args_ptr, call_instruction->arg_count, ret_ptr,
19775 call_instruction->result_loc);
19776 deallocate(args_ptr, call_instruction->arg_count, "IrInstGen *");
1871319777 return result;
1871419778}
1871519779
18716static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *source_instr,
18717 IrInstruction *pass1_options, IrInstruction *pass1_fn_ref, IrInstruction **args_ptr, size_t args_len,
19780static IrInstGen *ir_analyze_call_extra(IrAnalyze *ira, IrInst* source_instr,
19781 IrInstSrc *pass1_options, IrInstSrc *pass1_fn_ref, IrInstGen **args_ptr, size_t args_len,
1871819782 ResultLoc *result_loc)
1871919783{
18720 IrInstruction *options = pass1_options->child;
19784 IrInstGen *options = pass1_options->child;
1872119785 if (type_is_invalid(options->value->type))
18722 return ira->codegen->invalid_instruction;
19786 return ira->codegen->invalid_inst_gen;
1872319787
18724 IrInstruction *fn_ref = pass1_fn_ref->child;
19788 IrInstGen *fn_ref = pass1_fn_ref->child;
1872519789 if (type_is_invalid(fn_ref->value->type))
18726 return ira->codegen->invalid_instruction;
19790 return ira->codegen->invalid_inst_gen;
1872719791
1872819792 TypeStructField *modifier_field = find_struct_type_field(options->value->type, buf_create_from_str("modifier"));
1872919793 ir_assert(modifier_field != nullptr, source_instr);
18730 IrInstruction *modifier_inst = ir_analyze_struct_value_field_value(ira, source_instr, options, modifier_field);
19794 IrInstGen *modifier_inst = ir_analyze_struct_value_field_value(ira, source_instr, options, modifier_field);
1873119795 ZigValue *modifier_val = ir_resolve_const(ira, modifier_inst, UndefBad);
1873219796 if (modifier_val == nullptr)
18733 return ira->codegen->invalid_instruction;
19797 return ira->codegen->invalid_inst_gen;
1873419798 CallModifier modifier = (CallModifier)bigint_as_u32(&modifier_val->data.x_enum_tag);
1873519799
18736 if (ir_should_inline(ira->new_irb.exec, source_instr->scope)) {
19800 if (ir_should_inline(ira->old_irb.exec, source_instr->scope)) {
1873719801 switch (modifier) {
1873819802 case CallModifierBuiltin:
1873919803 zig_unreachable();
1874019804 case CallModifierAsync:
1874119805 ir_add_error(ira, source_instr, buf_sprintf("TODO: comptime @call with async modifier"));
18742 return ira->codegen->invalid_instruction;
19806 return ira->codegen->invalid_inst_gen;
1874319807 case CallModifierCompileTime:
1874419808 case CallModifierNone:
1874519809 case CallModifierAlwaysInline:
......@@ -18750,23 +19814,25 @@ static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *sourc
1875019814 case CallModifierNeverInline:
1875119815 ir_add_error(ira, source_instr,
1875219816 buf_sprintf("unable to perform 'never_inline' call at compile-time"));
18753 return ira->codegen->invalid_instruction;
19817 return ira->codegen->invalid_inst_gen;
1875419818 case CallModifierNeverTail:
1875519819 ir_add_error(ira, source_instr,
1875619820 buf_sprintf("unable to perform 'never_tail' call at compile-time"));
18757 return ira->codegen->invalid_instruction;
19821 return ira->codegen->invalid_inst_gen;
1875819822 }
1875919823 }
1876019824
18761 IrInstruction *first_arg_ptr = nullptr;
19825 IrInstGen *first_arg_ptr = nullptr;
19826 IrInst *first_arg_ptr_src = nullptr;
1876219827 ZigFn *fn = nullptr;
1876319828 if (instr_is_comptime(fn_ref)) {
1876419829 if (fn_ref->value->type->id == ZigTypeIdBoundFn) {
1876519830 assert(fn_ref->value->special == ConstValSpecialStatic);
1876619831 fn = fn_ref->value->data.x_bound_fn.fn;
1876719832 first_arg_ptr = fn_ref->value->data.x_bound_fn.first_arg;
19833 first_arg_ptr_src = fn_ref->value->data.x_bound_fn.first_arg_src;
1876819834 if (type_is_invalid(first_arg_ptr->value->type))
18769 return ira->codegen->invalid_instruction;
19835 return ira->codegen->invalid_inst_gen;
1877019836 } else {
1877119837 fn = ir_resolve_fn(ira, fn_ref);
1877219838 }
......@@ -18778,9 +19844,9 @@ static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *sourc
1877819844 case CallModifierAlwaysInline:
1877919845 case CallModifierAsync:
1878019846 if (fn == nullptr) {
18781 ir_add_error(ira, modifier_inst,
19847 ir_add_error(ira, &modifier_inst->base,
1878219848 buf_sprintf("the specified modifier requires a comptime-known function"));
18783 return ira->codegen->invalid_instruction;
19849 return ira->codegen->invalid_inst_gen;
1878419850 }
1878519851 default:
1878619852 break;
......@@ -18790,120 +19856,121 @@ static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *sourc
1879019856
1879119857 TypeStructField *stack_field = find_struct_type_field(options->value->type, buf_create_from_str("stack"));
1879219858 ir_assert(stack_field != nullptr, source_instr);
18793 IrInstruction *opt_stack = ir_analyze_struct_value_field_value(ira, source_instr, options, stack_field);
19859 IrInstGen *opt_stack = ir_analyze_struct_value_field_value(ira, source_instr, options, stack_field);
1879419860 if (type_is_invalid(opt_stack->value->type))
18795 return ira->codegen->invalid_instruction;
19861 return ira->codegen->invalid_inst_gen;
1879619862
18797 IrInstruction *stack_is_non_null_inst = ir_analyze_test_non_null(ira, source_instr, opt_stack);
19863 IrInstGen *stack_is_non_null_inst = ir_analyze_test_non_null(ira, source_instr, opt_stack);
1879819864 bool stack_is_non_null;
1879919865 if (!ir_resolve_bool(ira, stack_is_non_null_inst, &stack_is_non_null))
18800 return ira->codegen->invalid_instruction;
19866 return ira->codegen->invalid_inst_gen;
1880119867
18802 IrInstruction *stack = nullptr;
19868 IrInstGen *stack = nullptr;
1880319869 if (stack_is_non_null) {
1880419870 stack = ir_analyze_optional_value_payload_value(ira, source_instr, opt_stack, false);
1880519871 if (type_is_invalid(stack->value->type))
18806 return ira->codegen->invalid_instruction;
19872 return ira->codegen->invalid_inst_gen;
1880719873 }
1880819874
18809 return ir_analyze_fn_call(ira, source_instr, fn, fn_type, fn_ref, first_arg_ptr,
18810 modifier, stack, false, args_ptr, args_len, nullptr, result_loc);
19875 return ir_analyze_fn_call(ira, source_instr, fn, fn_type, fn_ref, first_arg_ptr, first_arg_ptr_src,
19876 modifier, stack, &stack->base, false, args_ptr, args_len, nullptr, result_loc);
1881119877}
1881219878
18813static IrInstruction *ir_analyze_instruction_call_extra(IrAnalyze *ira, IrInstructionCallExtra *instruction) {
18814 IrInstruction *args = instruction->args->child;
19879static IrInstGen *ir_analyze_instruction_call_extra(IrAnalyze *ira, IrInstSrcCallExtra *instruction) {
19880 IrInstGen *args = instruction->args->child;
1881519881 ZigType *args_type = args->value->type;
1881619882 if (type_is_invalid(args_type))
18817 return ira->codegen->invalid_instruction;
19883 return ira->codegen->invalid_inst_gen;
1881819884
1881919885 if (args_type->id != ZigTypeIdStruct) {
18820 ir_add_error(ira, args,
19886 ir_add_error(ira, &args->base,
1882119887 buf_sprintf("expected tuple or struct, found '%s'", buf_ptr(&args_type->name)));
18822 return ira->codegen->invalid_instruction;
19888 return ira->codegen->invalid_inst_gen;
1882319889 }
1882419890
18825 IrInstruction **args_ptr = nullptr;
19891 IrInstGen **args_ptr = nullptr;
1882619892 size_t args_len = 0;
1882719893
1882819894 if (is_tuple(args_type)) {
1882919895 args_len = args_type->data.structure.src_field_count;
18830 args_ptr = allocate<IrInstruction *>(args_len, "IrInstruction *");
19896 args_ptr = allocate<IrInstGen *>(args_len, "IrInstGen *");
1883119897 for (size_t i = 0; i < args_len; i += 1) {
1883219898 TypeStructField *arg_field = args_type->data.structure.fields[i];
18833 args_ptr[i] = ir_analyze_struct_value_field_value(ira, &instruction->base, args, arg_field);
19899 args_ptr[i] = ir_analyze_struct_value_field_value(ira, &instruction->base.base, args, arg_field);
1883419900 if (type_is_invalid(args_ptr[i]->value->type))
18835 return ira->codegen->invalid_instruction;
19901 return ira->codegen->invalid_inst_gen;
1883619902 }
1883719903 } else {
18838 ir_add_error(ira, args, buf_sprintf("TODO: struct args"));
18839 return ira->codegen->invalid_instruction;
19904 ir_add_error(ira, &args->base, buf_sprintf("TODO: struct args"));
19905 return ira->codegen->invalid_inst_gen;
1884019906 }
18841 IrInstruction *result = ir_analyze_call_extra(ira, &instruction->base, instruction->options,
19907 IrInstGen *result = ir_analyze_call_extra(ira, &instruction->base.base, instruction->options,
1884219908 instruction->fn_ref, args_ptr, args_len, instruction->result_loc);
18843 deallocate(args_ptr, args_len, "IrInstruction *");
19909 deallocate(args_ptr, args_len, "IrInstGen *");
1884419910 return result;
1884519911}
1884619912
18847static IrInstruction *ir_analyze_instruction_call_args(IrAnalyze *ira, IrInstructionCallSrcArgs *instruction) {
18848 IrInstruction **args_ptr = allocate<IrInstruction *>(instruction->args_len, "IrInstruction *");
19913static IrInstGen *ir_analyze_instruction_call_args(IrAnalyze *ira, IrInstSrcCallArgs *instruction) {
19914 IrInstGen **args_ptr = allocate<IrInstGen *>(instruction->args_len, "IrInstGen *");
1884919915 for (size_t i = 0; i < instruction->args_len; i += 1) {
1885019916 args_ptr[i] = instruction->args_ptr[i]->child;
1885119917 if (type_is_invalid(args_ptr[i]->value->type))
18852 return ira->codegen->invalid_instruction;
19918 return ira->codegen->invalid_inst_gen;
1885319919 }
1885419920
18855 IrInstruction *result = ir_analyze_call_extra(ira, &instruction->base, instruction->options,
19921 IrInstGen *result = ir_analyze_call_extra(ira, &instruction->base.base, instruction->options,
1885619922 instruction->fn_ref, args_ptr, instruction->args_len, instruction->result_loc);
18857 deallocate(args_ptr, instruction->args_len, "IrInstruction *");
19923 deallocate(args_ptr, instruction->args_len, "IrInstGen *");
1885819924 return result;
1885919925}
1886019926
18861static IrInstruction *ir_analyze_instruction_call(IrAnalyze *ira, IrInstructionCallSrc *call_instruction) {
18862 IrInstruction *fn_ref = call_instruction->fn_ref->child;
19927static IrInstGen *ir_analyze_instruction_call(IrAnalyze *ira, IrInstSrcCall *call_instruction) {
19928 IrInstGen *fn_ref = call_instruction->fn_ref->child;
1886319929 if (type_is_invalid(fn_ref->value->type))
18864 return ira->codegen->invalid_instruction;
19930 return ira->codegen->invalid_inst_gen;
1886519931
1886619932 bool is_comptime = (call_instruction->modifier == CallModifierCompileTime) ||
18867 ir_should_inline(ira->new_irb.exec, call_instruction->base.scope);
19933 ir_should_inline(ira->old_irb.exec, call_instruction->base.base.scope);
1886819934 CallModifier modifier = is_comptime ? CallModifierCompileTime : call_instruction->modifier;
1886919935
1887019936 if (is_comptime || instr_is_comptime(fn_ref)) {
1887119937 if (fn_ref->value->type->id == ZigTypeIdMetaType) {
1887219938 ZigType *ty = ir_resolve_type(ira, fn_ref);
1887319939 if (ty == nullptr)
18874 return ira->codegen->invalid_instruction;
18875 ErrorMsg *msg = ir_add_error_node(ira, fn_ref->source_node,
19940 return ira->codegen->invalid_inst_gen;
19941 ErrorMsg *msg = ir_add_error(ira, &fn_ref->base,
1887619942 buf_sprintf("type '%s' not a function", buf_ptr(&ty->name)));
18877 add_error_note(ira->codegen, msg, call_instruction->base.source_node,
19943 add_error_note(ira->codegen, msg, call_instruction->base.base.source_node,
1887819944 buf_sprintf("use @as builtin for type coercion"));
18879 return ira->codegen->invalid_instruction;
19945 return ira->codegen->invalid_inst_gen;
1888019946 } else if (fn_ref->value->type->id == ZigTypeIdFn) {
1888119947 ZigFn *fn_table_entry = ir_resolve_fn(ira, fn_ref);
1888219948 ZigType *fn_type = fn_table_entry ? fn_table_entry->type_entry : fn_ref->value->type;
1888319949 CallModifier modifier = is_comptime ? CallModifierCompileTime : call_instruction->modifier;
1888419950 return ir_analyze_fn_call_src(ira, call_instruction, fn_table_entry, fn_type,
18885 fn_ref, nullptr, modifier);
19951 fn_ref, nullptr, nullptr, modifier);
1888619952 } else if (fn_ref->value->type->id == ZigTypeIdBoundFn) {
1888719953 assert(fn_ref->value->special == ConstValSpecialStatic);
1888819954 ZigFn *fn_table_entry = fn_ref->value->data.x_bound_fn.fn;
18889 IrInstruction *first_arg_ptr = fn_ref->value->data.x_bound_fn.first_arg;
19955 IrInstGen *first_arg_ptr = fn_ref->value->data.x_bound_fn.first_arg;
19956 IrInst *first_arg_ptr_src = fn_ref->value->data.x_bound_fn.first_arg_src;
1889019957 CallModifier modifier = is_comptime ? CallModifierCompileTime : call_instruction->modifier;
1889119958 return ir_analyze_fn_call_src(ira, call_instruction, fn_table_entry, fn_table_entry->type_entry,
18892 fn_ref, first_arg_ptr, modifier);
19959 fn_ref, first_arg_ptr, first_arg_ptr_src, modifier);
1889319960 } else {
18894 ir_add_error_node(ira, fn_ref->source_node,
19961 ir_add_error(ira, &fn_ref->base,
1889519962 buf_sprintf("type '%s' not a function", buf_ptr(&fn_ref->value->type->name)));
18896 return ira->codegen->invalid_instruction;
19963 return ira->codegen->invalid_inst_gen;
1889719964 }
1889819965 }
1889919966
1890019967 if (fn_ref->value->type->id == ZigTypeIdFn) {
1890119968 return ir_analyze_fn_call_src(ira, call_instruction, nullptr, fn_ref->value->type,
18902 fn_ref, nullptr, modifier);
19969 fn_ref, nullptr, nullptr, modifier);
1890319970 } else {
18904 ir_add_error_node(ira, fn_ref->source_node,
19971 ir_add_error(ira, &fn_ref->base,
1890519972 buf_sprintf("type '%s' not a function", buf_ptr(&fn_ref->value->type->name)));
18906 return ira->codegen->invalid_instruction;
19973 return ira->codegen->invalid_inst_gen;
1890719974 }
1890819975}
1890919976
......@@ -18992,8 +20059,8 @@ static Error ir_read_const_ptr(IrAnalyze *ira, CodeGen *codegen, AstNode *source
1899220059 zig_unreachable();
1899320060}
1899420061
18995static IrInstruction *ir_analyze_optional_type(IrAnalyze *ira, IrInstructionUnOp *instruction) {
18996 IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_type);
20062static IrInstGen *ir_analyze_optional_type(IrAnalyze *ira, IrInstSrcUnOp *instruction) {
20063 IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_type);
1899720064 result->value->special = ConstValSpecialLazy;
1899820065
1899920066 LazyValueOptType *lazy_opt_type = allocate<LazyValueOptType>(1, "LazyValueOptType");
......@@ -19003,12 +20070,12 @@ static IrInstruction *ir_analyze_optional_type(IrAnalyze *ira, IrInstructionUnOp
1900320070
1900420071 lazy_opt_type->payload_type = instruction->value->child;
1900520072 if (ir_resolve_type_lazy(ira, lazy_opt_type->payload_type) == nullptr)
19006 return ira->codegen->invalid_instruction;
20073 return ira->codegen->invalid_inst_gen;
1900720074
1900820075 return result;
1900920076}
1901020077
19011static ErrorMsg *ir_eval_negation_scalar(IrAnalyze *ira, IrInstruction *source_instr, ZigType *scalar_type,
20078static ErrorMsg *ir_eval_negation_scalar(IrAnalyze *ira, IrInst* source_instr, ZigType *scalar_type,
1901220079 ZigValue *operand_val, ZigValue *scalar_out_val, bool is_wrap_op)
1901320080{
1901420081 bool is_float = (scalar_type->id == ZigTypeIdFloat || scalar_type->id == ZigTypeIdComptimeFloat);
......@@ -19043,19 +20110,19 @@ static ErrorMsg *ir_eval_negation_scalar(IrAnalyze *ira, IrInstruction *source_i
1904320110 return nullptr;
1904420111}
1904520112
19046static IrInstruction *ir_analyze_negation(IrAnalyze *ira, IrInstructionUnOp *instruction) {
19047 IrInstruction *value = instruction->value->child;
20113static IrInstGen *ir_analyze_negation(IrAnalyze *ira, IrInstSrcUnOp *instruction) {
20114 IrInstGen *value = instruction->value->child;
1904820115 ZigType *expr_type = value->value->type;
1904920116 if (type_is_invalid(expr_type))
19050 return ira->codegen->invalid_instruction;
20117 return ira->codegen->invalid_inst_gen;
1905120118
1905220119 if (!(expr_type->id == ZigTypeIdInt || expr_type->id == ZigTypeIdComptimeInt ||
1905320120 expr_type->id == ZigTypeIdFloat || expr_type->id == ZigTypeIdComptimeFloat ||
1905420121 expr_type->id == ZigTypeIdVector))
1905520122 {
19056 ir_add_error(ira, &instruction->base,
20123 ir_add_error(ira, &instruction->base.base,
1905720124 buf_sprintf("negation of type '%s'", buf_ptr(&expr_type->name)));
19058 return ira->codegen->invalid_instruction;
20125 return ira->codegen->invalid_inst_gen;
1905920126 }
1906020127
1906120128 bool is_wrap_op = (instruction->op_id == IrUnOpNegationWrap);
......@@ -19065,9 +20132,9 @@ static IrInstruction *ir_analyze_negation(IrAnalyze *ira, IrInstructionUnOp *ins
1906520132 if (instr_is_comptime(value)) {
1906620133 ZigValue *operand_val = ir_resolve_const(ira, value, UndefBad);
1906720134 if (!operand_val)
19068 return ira->codegen->invalid_instruction;
20135 return ira->codegen->invalid_inst_gen;
1906920136
19070 IrInstruction *result_instruction = ir_const(ira, &instruction->base, expr_type);
20137 IrInstGen *result_instruction = ir_const(ira, &instruction->base.base, expr_type);
1907120138 ZigValue *out_val = result_instruction->value;
1907220139 if (expr_type->id == ZigTypeIdVector) {
1907320140 expand_undef_array(ira->codegen, operand_val);
......@@ -19079,63 +20146,60 @@ static IrInstruction *ir_analyze_negation(IrAnalyze *ira, IrInstructionUnOp *ins
1907920146 ZigValue *scalar_out_val = &out_val->data.x_array.data.s_none.elements[i];
1908020147 assert(scalar_operand_val->type == scalar_type);
1908120148 assert(scalar_out_val->type == scalar_type);
19082 ErrorMsg *msg = ir_eval_negation_scalar(ira, &instruction->base, scalar_type,
20149 ErrorMsg *msg = ir_eval_negation_scalar(ira, &instruction->base.base, scalar_type,
1908320150 scalar_operand_val, scalar_out_val, is_wrap_op);
1908420151 if (msg != nullptr) {
19085 add_error_note(ira->codegen, msg, instruction->base.source_node,
20152 add_error_note(ira->codegen, msg, instruction->base.base.source_node,
1908620153 buf_sprintf("when computing vector element at index %" ZIG_PRI_usize, i));
19087 return ira->codegen->invalid_instruction;
20154 return ira->codegen->invalid_inst_gen;
1908820155 }
1908920156 }
1909020157 out_val->type = expr_type;
1909120158 out_val->special = ConstValSpecialStatic;
1909220159 } else {
19093 if (ir_eval_negation_scalar(ira, &instruction->base, scalar_type, operand_val, out_val,
20160 if (ir_eval_negation_scalar(ira, &instruction->base.base, scalar_type, operand_val, out_val,
1909420161 is_wrap_op) != nullptr)
1909520162 {
19096 return ira->codegen->invalid_instruction;
20163 return ira->codegen->invalid_inst_gen;
1909720164 }
1909820165 }
1909920166 return result_instruction;
1910020167 }
1910120168
19102 IrInstruction *result = ir_build_un_op(&ira->new_irb,
19103 instruction->base.scope, instruction->base.source_node,
19104 instruction->op_id, value);
19105 result->value->type = expr_type;
19106 return result;
20169 if (is_wrap_op) {
20170 return ir_build_negation_wrapping(ira, &instruction->base.base, value, expr_type);
20171 } else {
20172 return ir_build_negation(ira, &instruction->base.base, value, expr_type);
20173 }
1910720174}
1910820175
19109static IrInstruction *ir_analyze_bin_not(IrAnalyze *ira, IrInstructionUnOp *instruction) {
19110 IrInstruction *value = instruction->value->child;
20176static IrInstGen *ir_analyze_bin_not(IrAnalyze *ira, IrInstSrcUnOp *instruction) {
20177 IrInstGen *value = instruction->value->child;
1911120178 ZigType *expr_type = value->value->type;
1911220179 if (type_is_invalid(expr_type))
19113 return ira->codegen->invalid_instruction;
20180 return ira->codegen->invalid_inst_gen;
1911420181
1911520182 if (expr_type->id == ZigTypeIdInt) {
1911620183 if (instr_is_comptime(value)) {
1911720184 ZigValue *target_const_val = ir_resolve_const(ira, value, UndefBad);
1911820185 if (target_const_val == nullptr)
19119 return ira->codegen->invalid_instruction;
20186 return ira->codegen->invalid_inst_gen;
1912020187
19121 IrInstruction *result = ir_const(ira, &instruction->base, expr_type);
20188 IrInstGen *result = ir_const(ira, &instruction->base.base, expr_type);
1912220189 bigint_not(&result->value->data.x_bigint, &target_const_val->data.x_bigint,
1912320190 expr_type->data.integral.bit_count, expr_type->data.integral.is_signed);
1912420191 return result;
1912520192 }
1912620193
19127 IrInstruction *result = ir_build_un_op(&ira->new_irb, instruction->base.scope,
19128 instruction->base.source_node, IrUnOpBinNot, value);
19129 result->value->type = expr_type;
19130 return result;
20194 return ir_build_binary_not(ira, &instruction->base.base, value, expr_type);
1913120195 }
1913220196
19133 ir_add_error(ira, &instruction->base,
20197 ir_add_error(ira, &instruction->base.base,
1913420198 buf_sprintf("unable to perform binary not operation on type '%s'", buf_ptr(&expr_type->name)));
19135 return ira->codegen->invalid_instruction;
20199 return ira->codegen->invalid_inst_gen;
1913620200}
1913720201
19138static IrInstruction *ir_analyze_instruction_un_op(IrAnalyze *ira, IrInstructionUnOp *instruction) {
20202static IrInstGen *ir_analyze_instruction_un_op(IrAnalyze *ira, IrInstSrcUnOp *instruction) {
1913920203 IrUnOp op_id = instruction->op_id;
1914020204 switch (op_id) {
1914120205 case IrUnOpInvalid:
......@@ -19146,26 +20210,26 @@ static IrInstruction *ir_analyze_instruction_un_op(IrAnalyze *ira, IrInstruction
1914620210 case IrUnOpNegationWrap:
1914720211 return ir_analyze_negation(ira, instruction);
1914820212 case IrUnOpDereference: {
19149 IrInstruction *ptr = instruction->value->child;
20213 IrInstGen *ptr = instruction->value->child;
1915020214 if (type_is_invalid(ptr->value->type))
19151 return ira->codegen->invalid_instruction;
20215 return ira->codegen->invalid_inst_gen;
1915220216 ZigType *ptr_type = ptr->value->type;
1915320217 if (ptr_type->id == ZigTypeIdPointer && ptr_type->data.pointer.ptr_len == PtrLenUnknown) {
19154 ir_add_error_node(ira, instruction->base.source_node,
20218 ir_add_error_node(ira, instruction->base.base.source_node,
1915520219 buf_sprintf("index syntax required for unknown-length pointer type '%s'",
1915620220 buf_ptr(&ptr_type->name)));
19157 return ira->codegen->invalid_instruction;
20221 return ira->codegen->invalid_inst_gen;
1915820222 }
1915920223
19160 IrInstruction *result = ir_get_deref(ira, &instruction->base, ptr, instruction->result_loc);
19161 if (result == ira->codegen->invalid_instruction)
19162 return ira->codegen->invalid_instruction;
20224 IrInstGen *result = ir_get_deref(ira, &instruction->base.base, ptr, instruction->result_loc);
20225 if (type_is_invalid(result->value->type))
20226 return ira->codegen->invalid_inst_gen;
1916320227
1916420228 // If the result needs to be an lvalue, type check it
1916520229 if (instruction->lval == LValPtr && result->value->type->id != ZigTypeIdPointer) {
19166 ir_add_error(ira, &instruction->base,
20230 ir_add_error(ira, &instruction->base.base,
1916720231 buf_sprintf("attempt to dereference non-pointer type '%s'", buf_ptr(&result->value->type->name)));
19168 return ira->codegen->invalid_instruction;
20232 return ira->codegen->invalid_inst_gen;
1916920233 }
1917020234
1917120235 return result;
......@@ -19177,42 +20241,40 @@ static IrInstruction *ir_analyze_instruction_un_op(IrAnalyze *ira, IrInstruction
1917720241}
1917820242
1917920243static void ir_push_resume(IrAnalyze *ira, IrSuspendPosition pos) {
19180 IrBasicBlock *old_bb = ira->old_irb.exec->basic_block_list.at(pos.basic_block_index);
20244 IrBasicBlockSrc *old_bb = ira->old_irb.exec->basic_block_list.at(pos.basic_block_index);
1918120245 if (old_bb->in_resume_stack) return;
1918220246 ira->resume_stack.append(pos);
1918320247 old_bb->in_resume_stack = true;
1918420248}
1918520249
19186static void ir_push_resume_block(IrAnalyze *ira, IrBasicBlock *old_bb) {
20250static void ir_push_resume_block(IrAnalyze *ira, IrBasicBlockSrc *old_bb) {
1918720251 if (ira->resume_stack.length != 0) {
1918820252 ir_push_resume(ira, {old_bb->index, 0});
1918920253 }
1919020254}
1919120255
19192static IrInstruction *ir_analyze_instruction_br(IrAnalyze *ira, IrInstructionBr *br_instruction) {
19193 IrBasicBlock *old_dest_block = br_instruction->dest_block;
20256static IrInstGen *ir_analyze_instruction_br(IrAnalyze *ira, IrInstSrcBr *br_instruction) {
20257 IrBasicBlockSrc *old_dest_block = br_instruction->dest_block;
1919420258
1919520259 bool is_comptime;
1919620260 if (!ir_resolve_comptime(ira, br_instruction->is_comptime->child, &is_comptime))
1919720261 return ir_unreach_error(ira);
1919820262
1919920263 if (is_comptime || (old_dest_block->ref_count == 1 && old_dest_block->suspend_instruction_ref == nullptr))
19200 return ir_inline_bb(ira, &br_instruction->base, old_dest_block);
20264 return ir_inline_bb(ira, &br_instruction->base.base, old_dest_block);
1920120265
19202 IrBasicBlock *new_bb = ir_get_new_bb_runtime(ira, old_dest_block, &br_instruction->base);
20266 IrBasicBlockGen *new_bb = ir_get_new_bb_runtime(ira, old_dest_block, &br_instruction->base.base);
1920320267 if (new_bb == nullptr)
1920420268 return ir_unreach_error(ira);
1920520269
1920620270 ir_push_resume_block(ira, old_dest_block);
1920720271
19208 IrInstruction *result = ir_build_br(&ira->new_irb,
19209 br_instruction->base.scope, br_instruction->base.source_node, new_bb, nullptr);
19210 result->value->type = ira->codegen->builtin_types.entry_unreachable;
20272 IrInstGen *result = ir_build_br_gen(ira, &br_instruction->base.base, new_bb);
1921120273 return ir_finish_anal(ira, result);
1921220274}
1921320275
19214static IrInstruction *ir_analyze_instruction_cond_br(IrAnalyze *ira, IrInstructionCondBr *cond_br_instruction) {
19215 IrInstruction *condition = cond_br_instruction->condition->child;
20276static IrInstGen *ir_analyze_instruction_cond_br(IrAnalyze *ira, IrInstSrcCondBr *cond_br_instruction) {
20277 IrInstGen *condition = cond_br_instruction->condition->child;
1921620278 if (type_is_invalid(condition->value->type))
1921720279 return ir_unreach_error(ira);
1921820280
......@@ -19221,7 +20283,7 @@ static IrInstruction *ir_analyze_instruction_cond_br(IrAnalyze *ira, IrInstructi
1922120283 return ir_unreach_error(ira);
1922220284
1922320285 ZigType *bool_type = ira->codegen->builtin_types.entry_bool;
19224 IrInstruction *casted_condition = ir_implicit_cast(ira, condition, bool_type);
20286 IrInstGen *casted_condition = ir_implicit_cast(ira, condition, bool_type);
1922520287 if (type_is_invalid(casted_condition->value->type))
1922620288 return ir_unreach_error(ira);
1922720289
......@@ -19230,67 +20292,61 @@ static IrInstruction *ir_analyze_instruction_cond_br(IrAnalyze *ira, IrInstructi
1923020292 if (!ir_resolve_bool(ira, casted_condition, &cond_is_true))
1923120293 return ir_unreach_error(ira);
1923220294
19233 IrBasicBlock *old_dest_block = cond_is_true ?
20295 IrBasicBlockSrc *old_dest_block = cond_is_true ?
1923420296 cond_br_instruction->then_block : cond_br_instruction->else_block;
1923520297
1923620298 if (is_comptime || (old_dest_block->ref_count == 1 && old_dest_block->suspend_instruction_ref == nullptr))
19237 return ir_inline_bb(ira, &cond_br_instruction->base, old_dest_block);
20299 return ir_inline_bb(ira, &cond_br_instruction->base.base, old_dest_block);
1923820300
19239 IrBasicBlock *new_dest_block = ir_get_new_bb_runtime(ira, old_dest_block, &cond_br_instruction->base);
20301 IrBasicBlockGen *new_dest_block = ir_get_new_bb_runtime(ira, old_dest_block, &cond_br_instruction->base.base);
1924020302 if (new_dest_block == nullptr)
1924120303 return ir_unreach_error(ira);
1924220304
1924320305 ir_push_resume_block(ira, old_dest_block);
1924420306
19245 IrInstruction *result = ir_build_br(&ira->new_irb,
19246 cond_br_instruction->base.scope, cond_br_instruction->base.source_node, new_dest_block, nullptr);
19247 result->value->type = ira->codegen->builtin_types.entry_unreachable;
20307 IrInstGen *result = ir_build_br_gen(ira, &cond_br_instruction->base.base, new_dest_block);
1924820308 return ir_finish_anal(ira, result);
1924920309 }
1925020310
1925120311 assert(cond_br_instruction->then_block != cond_br_instruction->else_block);
19252 IrBasicBlock *new_then_block = ir_get_new_bb_runtime(ira, cond_br_instruction->then_block, &cond_br_instruction->base);
20312 IrBasicBlockGen *new_then_block = ir_get_new_bb_runtime(ira, cond_br_instruction->then_block, &cond_br_instruction->base.base);
1925320313 if (new_then_block == nullptr)
1925420314 return ir_unreach_error(ira);
1925520315
19256 IrBasicBlock *new_else_block = ir_get_new_bb_runtime(ira, cond_br_instruction->else_block, &cond_br_instruction->base);
20316 IrBasicBlockGen *new_else_block = ir_get_new_bb_runtime(ira, cond_br_instruction->else_block, &cond_br_instruction->base.base);
1925720317 if (new_else_block == nullptr)
1925820318 return ir_unreach_error(ira);
1925920319
1926020320 ir_push_resume_block(ira, cond_br_instruction->else_block);
1926120321 ir_push_resume_block(ira, cond_br_instruction->then_block);
1926220322
19263 IrInstruction *result = ir_build_cond_br(&ira->new_irb,
19264 cond_br_instruction->base.scope, cond_br_instruction->base.source_node,
19265 casted_condition, new_then_block, new_else_block, nullptr);
19266 result->value->type = ira->codegen->builtin_types.entry_unreachable;
20323 IrInstGen *result = ir_build_cond_br_gen(ira, &cond_br_instruction->base.base,
20324 casted_condition, new_then_block, new_else_block);
1926720325 return ir_finish_anal(ira, result);
1926820326}
1926920327
19270static IrInstruction *ir_analyze_instruction_unreachable(IrAnalyze *ira,
19271 IrInstructionUnreachable *unreachable_instruction)
20328static IrInstGen *ir_analyze_instruction_unreachable(IrAnalyze *ira,
20329 IrInstSrcUnreachable *unreachable_instruction)
1927220330{
19273 IrInstruction *result = ir_build_unreachable(&ira->new_irb,
19274 unreachable_instruction->base.scope, unreachable_instruction->base.source_node);
19275 result->value->type = ira->codegen->builtin_types.entry_unreachable;
20331 IrInstGen *result = ir_build_unreachable_gen(ira, &unreachable_instruction->base.base);
1927620332 return ir_finish_anal(ira, result);
1927720333}
1927820334
19279static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPhi *phi_instruction) {
20335static IrInstGen *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstSrcPhi *phi_instruction) {
1928020336 Error err;
1928120337
1928220338 if (ira->const_predecessor_bb) {
1928320339 for (size_t i = 0; i < phi_instruction->incoming_count; i += 1) {
19284 IrBasicBlock *predecessor = phi_instruction->incoming_blocks[i];
20340 IrBasicBlockSrc *predecessor = phi_instruction->incoming_blocks[i];
1928520341 if (predecessor != ira->const_predecessor_bb)
1928620342 continue;
19287 IrInstruction *value = phi_instruction->incoming_values[i]->child;
20343 IrInstGen *value = phi_instruction->incoming_values[i]->child;
1928820344 assert(value->value->type);
1928920345 if (type_is_invalid(value->value->type))
19290 return ira->codegen->invalid_instruction;
20346 return ira->codegen->invalid_inst_gen;
1929120347
1929220348 if (value->value->special != ConstValSpecialRuntime) {
19293 IrInstruction *result = ir_const(ira, &phi_instruction->base, nullptr);
20349 IrInstGen *result = ir_const(ira, &phi_instruction->base.base, nullptr);
1929420350 copy_const_val(result->value, value->value);
1929520351 return result;
1929620352 } else {
......@@ -19305,17 +20361,17 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1930520361 peer_parent->peers.length >= 2)
1930620362 {
1930720363 if (peer_parent->resolved_type == nullptr) {
19308 IrInstruction **instructions = allocate<IrInstruction *>(peer_parent->peers.length);
20364 IrInstGen **instructions = allocate<IrInstGen *>(peer_parent->peers.length);
1930920365 for (size_t i = 0; i < peer_parent->peers.length; i += 1) {
1931020366 ResultLocPeer *this_peer = peer_parent->peers.at(i);
1931120367
19312 IrInstruction *gen_instruction = this_peer->base.gen_instruction;
20368 IrInstGen *gen_instruction = this_peer->base.gen_instruction;
1931320369 if (gen_instruction == nullptr) {
1931420370 // unreachable instructions will cause implicit_elem_type to be null
1931520371 if (this_peer->base.implicit_elem_type == nullptr) {
19316 instructions[i] = ir_const_unreachable(ira, this_peer->base.source_instruction);
20372 instructions[i] = ir_const_unreachable(ira, &this_peer->base.source_instruction->base);
1931720373 } else {
19318 instructions[i] = ir_const(ira, this_peer->base.source_instruction,
20374 instructions[i] = ir_const(ira, &this_peer->base.source_instruction->base,
1931920375 this_peer->base.implicit_elem_type);
1932020376 instructions[i]->value->special = ConstValSpecialRuntime;
1932120377 }
......@@ -19324,34 +20380,34 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1932420380 }
1932520381
1932620382 }
19327 ZigType *expected_type = ir_result_loc_expected_type(ira, &phi_instruction->base, peer_parent->parent);
20383 ZigType *expected_type = ir_result_loc_expected_type(ira, &phi_instruction->base.base, peer_parent->parent);
1932820384 peer_parent->resolved_type = ir_resolve_peer_types(ira,
19329 peer_parent->base.source_instruction->source_node, expected_type, instructions,
20385 peer_parent->base.source_instruction->base.source_node, expected_type, instructions,
1933020386 peer_parent->peers.length);
1933120387 if (type_is_invalid(peer_parent->resolved_type))
19332 return ira->codegen->invalid_instruction;
20388 return ira->codegen->invalid_inst_gen;
1933320389
1933420390 // the logic below assumes there are no instructions in the new current basic block yet
19335 ir_assert(ira->new_irb.current_basic_block->instruction_list.length == 0, &phi_instruction->base);
20391 ir_assert(ira->new_irb.current_basic_block->instruction_list.length == 0, &phi_instruction->base.base);
1933620392
1933720393 // In case resolving the parent activates a suspend, do it now
19338 IrInstruction *parent_result_loc = ir_resolve_result(ira, &phi_instruction->base, peer_parent->parent,
19339 peer_parent->resolved_type, nullptr, false, false, true);
20394 IrInstGen *parent_result_loc = ir_resolve_result(ira, &phi_instruction->base.base, peer_parent->parent,
20395 peer_parent->resolved_type, nullptr, false, true);
1934020396 if (parent_result_loc != nullptr &&
19341 (type_is_invalid(parent_result_loc->value->type) || instr_is_unreachable(parent_result_loc)))
20397 (type_is_invalid(parent_result_loc->value->type) || parent_result_loc->value->type->id == ZigTypeIdUnreachable))
1934220398 {
1934320399 return parent_result_loc;
1934420400 }
1934520401 // If the above code generated any instructions in the current basic block, we need
1934620402 // to move them to the peer parent predecessor.
19347 ZigList<IrInstruction *> instrs_to_move = {};
20403 ZigList<IrInstGen *> instrs_to_move = {};
1934820404 while (ira->new_irb.current_basic_block->instruction_list.length != 0) {
1934920405 instrs_to_move.append(ira->new_irb.current_basic_block->instruction_list.pop());
1935020406 }
1935120407 if (instrs_to_move.length != 0) {
19352 IrBasicBlock *predecessor = peer_parent->base.source_instruction->child->owner_bb;
19353 IrInstruction *branch_instruction = predecessor->instruction_list.pop();
19354 ir_assert(branch_instruction->value->type->id == ZigTypeIdUnreachable, &phi_instruction->base);
20408 IrBasicBlockGen *predecessor = peer_parent->base.source_instruction->child->owner_bb;
20409 IrInstGen *branch_instruction = predecessor->instruction_list.pop();
20410 ir_assert(branch_instruction->value->type->id == ZigTypeIdUnreachable, &phi_instruction->base.base);
1935520411 while (instrs_to_move.length != 0) {
1935620412 predecessor->instruction_list.append(instrs_to_move.pop());
1935720413 }
......@@ -19360,7 +20416,7 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1936020416 }
1936120417
1936220418 IrSuspendPosition suspend_pos;
19363 ira_suspend(ira, &phi_instruction->base, nullptr, &suspend_pos);
20419 ira_suspend(ira, &phi_instruction->base.base, nullptr, &suspend_pos);
1936420420 ir_push_resume(ira, suspend_pos);
1936520421
1936620422 for (size_t i = 0; i < peer_parent->peers.length; i += 1) {
......@@ -19376,34 +20432,32 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1937620432 return ira_resume(ira);
1937720433 }
1937820434
19379 ZigList<IrBasicBlock*> new_incoming_blocks = {0};
19380 ZigList<IrInstruction*> new_incoming_values = {0};
20435 ZigList<IrBasicBlockGen*> new_incoming_blocks = {0};
20436 ZigList<IrInstGen*> new_incoming_values = {0};
1938120437
1938220438 for (size_t i = 0; i < phi_instruction->incoming_count; i += 1) {
19383 IrBasicBlock *predecessor = phi_instruction->incoming_blocks[i];
20439 IrBasicBlockSrc *predecessor = phi_instruction->incoming_blocks[i];
1938420440 if (predecessor->ref_count == 0)
1938520441 continue;
1938620442
1938720443
19388 IrInstruction *old_value = phi_instruction->incoming_values[i];
20444 IrInstSrc *old_value = phi_instruction->incoming_values[i];
1938920445 assert(old_value);
19390 IrInstruction *new_value = old_value->child;
19391 if (!new_value || new_value->value->type->id == ZigTypeIdUnreachable || predecessor->other == nullptr)
20446 IrInstGen *new_value = old_value->child;
20447 if (!new_value || new_value->value->type->id == ZigTypeIdUnreachable || predecessor->child == nullptr)
1939220448 continue;
1939320449
1939420450 if (type_is_invalid(new_value->value->type))
19395 return ira->codegen->invalid_instruction;
20451 return ira->codegen->invalid_inst_gen;
1939620452
1939720453
19398 assert(predecessor->other);
19399 new_incoming_blocks.append(predecessor->other);
20454 assert(predecessor->child);
20455 new_incoming_blocks.append(predecessor->child);
1940020456 new_incoming_values.append(new_value);
1940120457 }
1940220458
1940320459 if (new_incoming_blocks.length == 0) {
19404 IrInstruction *result = ir_build_unreachable(&ira->new_irb,
19405 phi_instruction->base.scope, phi_instruction->base.source_node);
19406 result->value->type = ira->codegen->builtin_types.entry_unreachable;
20460 IrInstGen *result = ir_build_unreachable_gen(ira, &phi_instruction->base.base);
1940720461 return ir_finish_anal(ira, result);
1940820462 }
1940920463
......@@ -19415,7 +20469,7 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1941520469 if (peer_parent != nullptr) {
1941620470 bool peer_parent_has_type;
1941720471 if ((err = ir_result_has_type(ira, peer_parent->parent, &peer_parent_has_type)))
19418 return ira->codegen->invalid_instruction;
20472 return ira->codegen->invalid_inst_gen;
1941920473 if (peer_parent_has_type) {
1942020474 if (peer_parent->parent->id == ResultLocIdReturn) {
1942120475 resolved_type = ira->explicit_return_type;
......@@ -19423,27 +20477,27 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1942320477 resolved_type = ir_resolve_type(ira, peer_parent->parent->source_instruction->child);
1942420478 } else if (peer_parent->parent->resolved_loc) {
1942520479 ZigType *resolved_loc_ptr_type = peer_parent->parent->resolved_loc->value->type;
19426 ir_assert(resolved_loc_ptr_type->id == ZigTypeIdPointer, &phi_instruction->base);
20480 ir_assert(resolved_loc_ptr_type->id == ZigTypeIdPointer, &phi_instruction->base.base);
1942720481 resolved_type = resolved_loc_ptr_type->data.pointer.child_type;
1942820482 }
1942920483
1943020484 if (resolved_type != nullptr && type_is_invalid(resolved_type))
19431 return ira->codegen->invalid_instruction;
20485 return ira->codegen->invalid_inst_gen;
1943220486 }
1943320487 }
1943420488
1943520489 if (resolved_type == nullptr) {
19436 resolved_type = ir_resolve_peer_types(ira, phi_instruction->base.source_node, nullptr,
20490 resolved_type = ir_resolve_peer_types(ira, phi_instruction->base.base.source_node, nullptr,
1943720491 new_incoming_values.items, new_incoming_values.length);
1943820492 if (type_is_invalid(resolved_type))
19439 return ira->codegen->invalid_instruction;
20493 return ira->codegen->invalid_inst_gen;
1944020494 }
1944120495
1944220496 switch (type_has_one_possible_value(ira->codegen, resolved_type)) {
1944320497 case OnePossibleValueInvalid:
19444 return ira->codegen->invalid_instruction;
20498 return ira->codegen->invalid_inst_gen;
1944520499 case OnePossibleValueYes:
19446 return ir_const_move(ira, &phi_instruction->base,
20500 return ir_const_move(ira, &phi_instruction->base.base,
1944720501 get_the_one_possible_value(ira->codegen, resolved_type));
1944820502 case OnePossibleValueNo:
1944920503 break;
......@@ -19451,11 +20505,11 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1945120505
1945220506 switch (type_requires_comptime(ira->codegen, resolved_type)) {
1945320507 case ReqCompTimeInvalid:
19454 return ira->codegen->invalid_instruction;
20508 return ira->codegen->invalid_inst_gen;
1945520509 case ReqCompTimeYes:
19456 ir_add_error_node(ira, phi_instruction->base.source_node,
20510 ir_add_error(ira, &phi_instruction->base.base,
1945720511 buf_sprintf("values of type '%s' must be comptime known", buf_ptr(&resolved_type->name)));
19458 return ira->codegen->invalid_instruction;
20512 return ira->codegen->invalid_inst_gen;
1945920513 case ReqCompTimeNo:
1946020514 break;
1946120515 }
......@@ -19465,16 +20519,16 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1946520519 // cast all values to the resolved type. however we can't put cast instructions in front of the phi instruction.
1946620520 // so we go back and insert the casts as the last instruction in the corresponding predecessor blocks, and
1946720521 // then make sure the branch instruction is preserved.
19468 IrBasicBlock *cur_bb = ira->new_irb.current_basic_block;
20522 IrBasicBlockGen *cur_bb = ira->new_irb.current_basic_block;
1946920523 for (size_t i = 0; i < new_incoming_values.length; i += 1) {
19470 IrInstruction *new_value = new_incoming_values.at(i);
19471 IrBasicBlock *predecessor = new_incoming_blocks.at(i);
19472 ir_assert(predecessor->instruction_list.length != 0, &phi_instruction->base);
19473 IrInstruction *branch_instruction = predecessor->instruction_list.pop();
19474 ir_set_cursor_at_end(&ira->new_irb, predecessor);
19475 IrInstruction *casted_value = ir_implicit_cast(ira, new_value, resolved_type);
20524 IrInstGen *new_value = new_incoming_values.at(i);
20525 IrBasicBlockGen *predecessor = new_incoming_blocks.at(i);
20526 ir_assert(predecessor->instruction_list.length != 0, &phi_instruction->base.base);
20527 IrInstGen *branch_instruction = predecessor->instruction_list.pop();
20528 ir_set_cursor_at_end_gen(&ira->new_irb, predecessor);
20529 IrInstGen *casted_value = ir_implicit_cast(ira, new_value, resolved_type);
1947620530 if (type_is_invalid(casted_value->value->type)) {
19477 return ira->codegen->invalid_instruction;
20531 return ira->codegen->invalid_inst_gen;
1947820532 }
1947920533 new_incoming_values.items[i] = casted_value;
1948020534 predecessor->instruction_list.append(branch_instruction);
......@@ -19485,12 +20539,10 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1948520539 all_stack_ptrs = false;
1948620540 }
1948720541 }
19488 ir_set_cursor_at_end(&ira->new_irb, cur_bb);
20542 ir_set_cursor_at_end_gen(&ira->new_irb, cur_bb);
1948920543
19490 IrInstruction *result = ir_build_phi(&ira->new_irb,
19491 phi_instruction->base.scope, phi_instruction->base.source_node,
19492 new_incoming_blocks.length, new_incoming_blocks.items, new_incoming_values.items, nullptr);
19493 result->value->type = resolved_type;
20544 IrInstGen *result = ir_build_phi_gen(ira, &phi_instruction->base.base,
20545 new_incoming_blocks.length, new_incoming_blocks.items, new_incoming_values.items, resolved_type);
1949420546
1949520547 if (all_stack_ptrs) {
1949620548 assert(result->value->special == ConstValSpecialRuntime);
......@@ -19500,17 +20552,17 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1950020552 return result;
1950120553}
1950220554
19503static IrInstruction *ir_analyze_instruction_var_ptr(IrAnalyze *ira, IrInstructionVarPtr *instruction) {
20555static IrInstGen *ir_analyze_instruction_var_ptr(IrAnalyze *ira, IrInstSrcVarPtr *instruction) {
1950420556 ZigVar *var = instruction->var;
19505 IrInstruction *result = ir_get_var_ptr(ira, &instruction->base, var);
20557 IrInstGen *result = ir_get_var_ptr(ira, &instruction->base.base, var);
1950620558 if (instruction->crossed_fndef_scope != nullptr && !instr_is_comptime(result)) {
19507 ErrorMsg *msg = ir_add_error(ira, &instruction->base,
20559 ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
1950820560 buf_sprintf("'%s' not accessible from inner function", var->name));
1950920561 add_error_note(ira->codegen, msg, instruction->crossed_fndef_scope->base.source_node,
1951020562 buf_sprintf("crossed function definition here"));
1951120563 add_error_note(ira->codegen, msg, var->decl_node,
1951220564 buf_sprintf("declared here"));
19513 return ira->codegen->invalid_instruction;
20565 return ira->codegen->invalid_inst_gen;
1951420566 }
1951520567 return result;
1951620568}
......@@ -19561,17 +20613,17 @@ static ZigType *adjust_ptr_len(CodeGen *g, ZigType *ptr_type, PtrLen ptr_len) {
1956120613 ptr_type->data.pointer.allow_zero);
1956220614}
1956320615
19564static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstructionElemPtr *elem_ptr_instruction) {
20616static IrInstGen *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstSrcElemPtr *elem_ptr_instruction) {
1956520617 Error err;
19566 IrInstruction *array_ptr = elem_ptr_instruction->array_ptr->child;
20618 IrInstGen *array_ptr = elem_ptr_instruction->array_ptr->child;
1956720619 if (type_is_invalid(array_ptr->value->type))
19568 return ira->codegen->invalid_instruction;
20620 return ira->codegen->invalid_inst_gen;
1956920621
1957020622 ZigValue *orig_array_ptr_val = array_ptr->value;
1957120623
19572 IrInstruction *elem_index = elem_ptr_instruction->elem_index->child;
20624 IrInstGen *elem_index = elem_ptr_instruction->elem_index->child;
1957320625 if (type_is_invalid(elem_index->value->type))
19574 return ira->codegen->invalid_instruction;
20626 return ira->codegen->invalid_inst_gen;
1957520627
1957620628 ZigType *ptr_type = orig_array_ptr_val->type;
1957720629 assert(ptr_type->id == ZigTypeIdPointer);
......@@ -19583,7 +20635,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1958320635 ZigType *return_type;
1958420636
1958520637 if (type_is_invalid(array_type)) {
19586 return ira->codegen->invalid_instruction;
20638 return ira->codegen->invalid_inst_gen;
1958720639 } else if (array_type->id == ZigTypeIdArray ||
1958820640 (array_type->id == ZigTypeIdPointer &&
1958920641 array_type->data.pointer.ptr_len == PtrLenSingle &&
......@@ -19594,15 +20646,15 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1959420646 ptr_type = ptr_type->data.pointer.child_type;
1959520647 if (orig_array_ptr_val->special != ConstValSpecialRuntime) {
1959620648 orig_array_ptr_val = const_ptr_pointee(ira, ira->codegen, orig_array_ptr_val,
19597 elem_ptr_instruction->base.source_node);
20649 elem_ptr_instruction->base.base.source_node);
1959820650 if (orig_array_ptr_val == nullptr)
19599 return ira->codegen->invalid_instruction;
20651 return ira->codegen->invalid_inst_gen;
1960020652 }
1960120653 }
1960220654 if (array_type->data.array.len == 0) {
19603 ir_add_error_node(ira, elem_ptr_instruction->base.source_node,
20655 ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
1960420656 buf_sprintf("index 0 outside array of size 0"));
19605 return ira->codegen->invalid_instruction;
20657 return ira->codegen->invalid_inst_gen;
1960620658 }
1960720659 ZigType *child_type = array_type->data.array.child_type;
1960820660 if (ptr_type->data.pointer.host_int_bytes == 0) {
......@@ -19613,7 +20665,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1961320665 } else {
1961420666 uint64_t elem_val_scalar;
1961520667 if (!ir_resolve_usize(ira, elem_index, &elem_val_scalar))
19616 return ira->codegen->invalid_instruction;
20668 return ira->codegen->invalid_inst_gen;
1961720669
1961820670 size_t bit_width = type_size_bits(ira->codegen, child_type);
1961920671 size_t bit_offset = bit_width * elem_val_scalar;
......@@ -19625,9 +20677,9 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1962520677 }
1962620678 } else if (array_type->id == ZigTypeIdPointer) {
1962720679 if (array_type->data.pointer.ptr_len == PtrLenSingle) {
19628 ir_add_error_node(ira, elem_ptr_instruction->base.source_node,
20680 ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
1962920681 buf_sprintf("index of single-item pointer"));
19630 return ira->codegen->invalid_instruction;
20682 return ira->codegen->invalid_inst_gen;
1963120683 }
1963220684 return_type = adjust_ptr_len(ira->codegen, array_type, elem_ptr_instruction->ptr_len);
1963320685 } else if (is_slice(array_type)) {
......@@ -19641,38 +20693,38 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1964120693 array_type->data.structure.resolve_status == ResolveStatusBeingInferred)
1964220694 {
1964320695 ZigType *usize = ira->codegen->builtin_types.entry_usize;
19644 IrInstruction *casted_elem_index = ir_implicit_cast(ira, elem_index, usize);
20696 IrInstGen *casted_elem_index = ir_implicit_cast(ira, elem_index, usize);
1964520697 if (type_is_invalid(casted_elem_index->value->type))
19646 return ira->codegen->invalid_instruction;
19647 ir_assert(instr_is_comptime(casted_elem_index), &elem_ptr_instruction->base);
20698 return ira->codegen->invalid_inst_gen;
20699 ir_assert(instr_is_comptime(casted_elem_index), &elem_ptr_instruction->base.base);
1964820700 Buf *field_name = buf_alloc();
1964920701 bigint_append_buf(field_name, &casted_elem_index->value->data.x_bigint, 10);
19650 return ir_analyze_inferred_field_ptr(ira, field_name, &elem_ptr_instruction->base,
20702 return ir_analyze_inferred_field_ptr(ira, field_name, &elem_ptr_instruction->base.base,
1965120703 array_ptr, array_type);
1965220704 } else if (is_tuple(array_type)) {
1965320705 uint64_t elem_index_scalar;
1965420706 if (!ir_resolve_usize(ira, elem_index, &elem_index_scalar))
19655 return ira->codegen->invalid_instruction;
20707 return ira->codegen->invalid_inst_gen;
1965620708 if (elem_index_scalar >= array_type->data.structure.src_field_count) {
19657 ir_add_error(ira, &elem_ptr_instruction->base, buf_sprintf(
20709 ir_add_error(ira, &elem_ptr_instruction->base.base, buf_sprintf(
1965820710 "field index %" ZIG_PRI_u64 " outside tuple '%s' which has %" PRIu32 " fields",
1965920711 elem_index_scalar, buf_ptr(&array_type->name),
1966020712 array_type->data.structure.src_field_count));
19661 return ira->codegen->invalid_instruction;
20713 return ira->codegen->invalid_inst_gen;
1966220714 }
1966320715 TypeStructField *field = array_type->data.structure.fields[elem_index_scalar];
19664 return ir_analyze_struct_field_ptr(ira, &elem_ptr_instruction->base, field, array_ptr,
20716 return ir_analyze_struct_field_ptr(ira, &elem_ptr_instruction->base.base, field, array_ptr,
1966520717 array_type, false);
1966620718 } else {
19667 ir_add_error_node(ira, elem_ptr_instruction->base.source_node,
20719 ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
1966820720 buf_sprintf("array access of non-array type '%s'", buf_ptr(&array_type->name)));
19669 return ira->codegen->invalid_instruction;
20721 return ira->codegen->invalid_inst_gen;
1967020722 }
1967120723
1967220724 ZigType *usize = ira->codegen->builtin_types.entry_usize;
19673 IrInstruction *casted_elem_index = ir_implicit_cast(ira, elem_index, usize);
19674 if (casted_elem_index == ira->codegen->invalid_instruction)
19675 return ira->codegen->invalid_instruction;
20725 IrInstGen *casted_elem_index = ir_implicit_cast(ira, elem_index, usize);
20726 if (type_is_invalid(casted_elem_index->value->type))
20727 return ira->codegen->invalid_inst_gen;
1967620728
1967720729 bool safety_check_on = elem_ptr_instruction->safety_check_on;
1967820730 if (instr_is_comptime(casted_elem_index)) {
......@@ -19681,15 +20733,15 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1968120733 uint64_t array_len = array_type->data.array.len;
1968220734 if (index == array_len && array_type->data.array.sentinel != nullptr) {
1968320735 ZigType *elem_type = array_type->data.array.child_type;
19684 IrInstruction *sentinel_elem = ir_const(ira, &elem_ptr_instruction->base, elem_type);
20736 IrInstGen *sentinel_elem = ir_const(ira, &elem_ptr_instruction->base.base, elem_type);
1968520737 copy_const_val(sentinel_elem->value, array_type->data.array.sentinel);
19686 return ir_get_ref(ira, &elem_ptr_instruction->base, sentinel_elem, true, false);
20738 return ir_get_ref(ira, &elem_ptr_instruction->base.base, sentinel_elem, true, false);
1968720739 }
1968820740 if (index >= array_len) {
19689 ir_add_error_node(ira, elem_ptr_instruction->base.source_node,
20741 ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
1969020742 buf_sprintf("index %" ZIG_PRI_u64 " outside array of size %" ZIG_PRI_u64,
1969120743 index, array_len));
19692 return ira->codegen->invalid_instruction;
20744 return ira->codegen->invalid_inst_gen;
1969320745 }
1969420746 safety_check_on = false;
1969520747 }
......@@ -19705,7 +20757,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1970520757 // figure out the largest alignment possible
1970620758
1970720759 if ((err = type_resolve(ira->codegen, return_type->data.pointer.child_type, ResolveStatusSizeKnown)))
19708 return ira->codegen->invalid_instruction;
20760 return ira->codegen->invalid_inst_gen;
1970920761
1971020762 uint64_t elem_size = type_size(ira->codegen, return_type->data.pointer.child_type);
1971120763 uint64_t abi_align = get_abi_alignment(ira->codegen, return_type->data.pointer.child_type);
......@@ -19729,15 +20781,17 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1972920781 return_type = adjust_ptr_align(ira->codegen, return_type, chosen_align);
1973020782 }
1973120783
20784 // TODO The `array_type->id == ZigTypeIdArray` exception here should not be an exception;
20785 // the `orig_array_ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar` clause should be omitted completely.
20786 // However there are bugs to fix before this improvement can be made.
1973220787 if (orig_array_ptr_val->special != ConstValSpecialRuntime &&
1973320788 orig_array_ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr &&
19734 (orig_array_ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar ||
19735 array_type->id == ZigTypeIdArray))
20789 (orig_array_ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar || array_type->id == ZigTypeIdArray))
1973620790 {
1973720791 ZigValue *array_ptr_val = const_ptr_pointee(ira, ira->codegen, orig_array_ptr_val,
19738 elem_ptr_instruction->base.source_node);
20792 elem_ptr_instruction->base.base.source_node);
1973920793 if (array_ptr_val == nullptr)
19740 return ira->codegen->invalid_instruction;
20794 return ira->codegen->invalid_inst_gen;
1974120795
1974220796 if (array_ptr_val->special == ConstValSpecialUndef &&
1974320797 elem_ptr_instruction->init_array_type_source_node != nullptr)
......@@ -19755,16 +20809,16 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1975520809 elem_val->parent.data.p_array.elem_index = i;
1975620810 }
1975720811 } else if (is_slice(array_type)) {
19758 ir_assert(array_ptr->value->type->id == ZigTypeIdPointer, &elem_ptr_instruction->base);
20812 ir_assert(array_ptr->value->type->id == ZigTypeIdPointer, &elem_ptr_instruction->base.base);
1975920813 ZigType *actual_array_type = array_ptr->value->type->data.pointer.child_type;
1976020814
1976120815 if (type_is_invalid(actual_array_type))
19762 return ira->codegen->invalid_instruction;
20816 return ira->codegen->invalid_inst_gen;
1976320817 if (actual_array_type->id != ZigTypeIdArray) {
1976420818 ir_add_error_node(ira, elem_ptr_instruction->init_array_type_source_node,
1976520819 buf_sprintf("array literal requires address-of operator to coerce to slice type '%s'",
1976620820 buf_ptr(&actual_array_type->name)));
19767 return ira->codegen->invalid_instruction;
20821 return ira->codegen->invalid_inst_gen;
1976820822 }
1976920823
1977020824 ZigValue *array_init_val = create_const_vals(1);
......@@ -19789,7 +20843,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1978920843 ir_add_error_node(ira, elem_ptr_instruction->init_array_type_source_node,
1979020844 buf_sprintf("expected array type or [_], found '%s'",
1979120845 buf_ptr(&array_type->name)));
19792 return ira->codegen->invalid_instruction;
20846 return ira->codegen->invalid_inst_gen;
1979320847 }
1979420848 }
1979520849
......@@ -19797,8 +20851,13 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1979720851 (array_type->id != ZigTypeIdPointer ||
1979820852 array_ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr))
1979920853 {
20854 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec,
20855 elem_ptr_instruction->base.base.source_node, array_ptr_val, UndefOk)))
20856 {
20857 return ira->codegen->invalid_inst_gen;
20858 }
1980020859 if (array_type->id == ZigTypeIdPointer) {
19801 IrInstruction *result = ir_const(ira, &elem_ptr_instruction->base, return_type);
20860 IrInstGen *result = ir_const(ira, &elem_ptr_instruction->base.base, return_type);
1980220861 ZigValue *out_val = result->value;
1980320862 out_val->data.x_ptr.mut = array_ptr_val->data.x_ptr.mut;
1980420863 size_t new_index;
......@@ -19867,33 +20926,31 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1986720926 zig_panic("TODO elem ptr on a null pointer");
1986820927 }
1986920928 if (new_index >= mem_size) {
19870 ir_add_error_node(ira, elem_ptr_instruction->base.source_node,
20929 ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
1987120930 buf_sprintf("index %" ZIG_PRI_u64 " outside pointer of size %" ZIG_PRI_usize "", index, old_size));
19872 return ira->codegen->invalid_instruction;
20931 return ira->codegen->invalid_inst_gen;
1987320932 }
1987420933 return result;
1987520934 } else if (is_slice(array_type)) {
1987620935 ZigValue *ptr_field = array_ptr_val->data.x_struct.fields[slice_ptr_index];
19877 ir_assert(ptr_field != nullptr, &elem_ptr_instruction->base);
20936 ir_assert(ptr_field != nullptr, &elem_ptr_instruction->base.base);
1987820937 if (ptr_field->data.x_ptr.special == ConstPtrSpecialHardCodedAddr) {
19879 IrInstruction *result = ir_build_elem_ptr(&ira->new_irb, elem_ptr_instruction->base.scope,
19880 elem_ptr_instruction->base.source_node, array_ptr, casted_elem_index, false,
19881 elem_ptr_instruction->ptr_len, nullptr);
19882 result->value->type = return_type;
19883 return result;
20938 return ir_build_elem_ptr_gen(ira, elem_ptr_instruction->base.base.scope,
20939 elem_ptr_instruction->base.base.source_node, array_ptr, casted_elem_index, false,
20940 return_type);
1988420941 }
1988520942 ZigValue *len_field = array_ptr_val->data.x_struct.fields[slice_len_index];
19886 IrInstruction *result = ir_const(ira, &elem_ptr_instruction->base, return_type);
20943 IrInstGen *result = ir_const(ira, &elem_ptr_instruction->base.base, return_type);
1988720944 ZigValue *out_val = result->value;
1988820945 ZigType *slice_ptr_type = array_type->data.structure.fields[slice_ptr_index]->type_entry;
1988920946 uint64_t slice_len = bigint_as_u64(&len_field->data.x_bigint);
1989020947 uint64_t full_slice_len = slice_len +
1989120948 ((slice_ptr_type->data.pointer.sentinel != nullptr) ? 1 : 0);
1989220949 if (index >= full_slice_len) {
19893 ir_add_error_node(ira, elem_ptr_instruction->base.source_node,
20950 ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
1989420951 buf_sprintf("index %" ZIG_PRI_u64 " outside slice of size %" ZIG_PRI_u64,
1989520952 index, slice_len));
19896 return ira->codegen->invalid_instruction;
20953 return ira->codegen->invalid_inst_gen;
1989720954 }
1989820955 out_val->data.x_ptr.mut = ptr_field->data.x_ptr.mut;
1989920956 switch (ptr_field->data.x_ptr.special) {
......@@ -19913,7 +20970,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1991320970 {
1991420971 ir_assert(new_index <
1991520972 ptr_field->data.x_ptr.data.base_array.array_val->type->data.array.len,
19916 &elem_ptr_instruction->base);
20973 &elem_ptr_instruction->base.base);
1991720974 }
1991820975 out_val->data.x_ptr.special = ConstPtrSpecialBaseArray;
1991920976 out_val->data.x_ptr.data.base_array.array_val =
......@@ -19938,15 +20995,14 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1993820995 }
1993920996 return result;
1994020997 } else if (array_type->id == ZigTypeIdArray || array_type->id == ZigTypeIdVector) {
19941 IrInstruction *result;
20998 IrInstGen *result;
1994220999 if (orig_array_ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
19943 result = ir_build_elem_ptr(&ira->new_irb, elem_ptr_instruction->base.scope,
19944 elem_ptr_instruction->base.source_node, array_ptr, casted_elem_index,
19945 false, elem_ptr_instruction->ptr_len, nullptr);
19946 result->value->type = return_type;
21000 result = ir_build_elem_ptr_gen(ira, elem_ptr_instruction->base.base.scope,
21001 elem_ptr_instruction->base.base.source_node, array_ptr, casted_elem_index,
21002 false, return_type);
1994721003 result->value->special = ConstValSpecialStatic;
1994821004 } else {
19949 result = ir_const(ira, &elem_ptr_instruction->base, return_type);
21005 result = ir_const(ira, &elem_ptr_instruction->base.base, return_type);
1995021006 }
1995121007 ZigValue *out_val = result->value;
1995221008 out_val->data.x_ptr.special = ConstPtrSpecialBaseArray;
......@@ -19972,19 +21028,19 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1997221028 // runtime known element index
1997321029 switch (type_requires_comptime(ira->codegen, return_type)) {
1997421030 case ReqCompTimeYes:
19975 ir_add_error(ira, elem_index,
21031 ir_add_error(ira, &elem_index->base,
1997621032 buf_sprintf("values of type '%s' must be comptime known, but index value is runtime known",
1997721033 buf_ptr(&return_type->data.pointer.child_type->name)));
19978 return ira->codegen->invalid_instruction;
21034 return ira->codegen->invalid_inst_gen;
1997921035 case ReqCompTimeInvalid:
19980 return ira->codegen->invalid_instruction;
21036 return ira->codegen->invalid_inst_gen;
1998121037 case ReqCompTimeNo:
1998221038 break;
1998321039 }
1998421040
1998521041 if (return_type->data.pointer.explicit_alignment != 0) {
1998621042 if ((err = type_resolve(ira->codegen, return_type->data.pointer.child_type, ResolveStatusSizeKnown)))
19987 return ira->codegen->invalid_instruction;
21043 return ira->codegen->invalid_inst_gen;
1998821044
1998921045 uint64_t elem_size = type_size(ira->codegen, return_type->data.pointer.child_type);
1999021046 uint64_t abi_align = get_abi_alignment(ira->codegen, return_type->data.pointer.child_type);
......@@ -20002,16 +21058,13 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
2000221058 }
2000321059 }
2000421060
20005 IrInstruction *result = ir_build_elem_ptr(&ira->new_irb, elem_ptr_instruction->base.scope,
20006 elem_ptr_instruction->base.source_node, array_ptr, casted_elem_index, safety_check_on,
20007 elem_ptr_instruction->ptr_len, nullptr);
20008 result->value->type = return_type;
20009 return result;
21061 return ir_build_elem_ptr_gen(ira, elem_ptr_instruction->base.base.scope,
21062 elem_ptr_instruction->base.base.source_node, array_ptr, casted_elem_index, safety_check_on, return_type);
2001021063}
2001121064
20012static IrInstruction *ir_analyze_container_member_access_inner(IrAnalyze *ira,
20013 ZigType *bare_struct_type, Buf *field_name, IrInstruction *source_instr,
20014 IrInstruction *container_ptr, ZigType *container_type)
21065static IrInstGen *ir_analyze_container_member_access_inner(IrAnalyze *ira,
21066 ZigType *bare_struct_type, Buf *field_name, IrInst* source_instr,
21067 IrInstGen *container_ptr, IrInst *container_ptr_src, ZigType *container_type)
2001521068{
2001621069 if (!is_slice(bare_struct_type)) {
2001721070 ScopeDecls *container_scope = get_container_scope(bare_struct_type);
......@@ -20021,29 +21074,39 @@ static IrInstruction *ir_analyze_container_member_access_inner(IrAnalyze *ira,
2002121074 if (tld->id == TldIdFn) {
2002221075 resolve_top_level_decl(ira->codegen, tld, source_instr->source_node, false);
2002321076 if (tld->resolution == TldResolutionInvalid)
20024 return ira->codegen->invalid_instruction;
21077 return ira->codegen->invalid_inst_gen;
21078 if (tld->resolution == TldResolutionResolving)
21079 return ir_error_dependency_loop(ira, source_instr);
21080
2002521081 TldFn *tld_fn = (TldFn *)tld;
2002621082 ZigFn *fn_entry = tld_fn->fn_entry;
21083 assert(fn_entry != nullptr);
21084
2002721085 if (type_is_invalid(fn_entry->type_entry))
20028 return ira->codegen->invalid_instruction;
21086 return ira->codegen->invalid_inst_gen;
2002921087
20030 IrInstruction *bound_fn_value = ir_build_const_bound_fn(&ira->new_irb, source_instr->scope,
20031 source_instr->source_node, fn_entry, container_ptr);
21088 IrInstGen *bound_fn_value = ir_const_bound_fn(ira, source_instr, fn_entry, container_ptr,
21089 container_ptr_src);
2003221090 return ir_get_ref(ira, source_instr, bound_fn_value, true, false);
2003321091 } else if (tld->id == TldIdVar) {
2003421092 resolve_top_level_decl(ira->codegen, tld, source_instr->source_node, false);
2003521093 if (tld->resolution == TldResolutionInvalid)
20036 return ira->codegen->invalid_instruction;
21094 return ira->codegen->invalid_inst_gen;
21095 if (tld->resolution == TldResolutionResolving)
21096 return ir_error_dependency_loop(ira, source_instr);
21097
2003721098 TldVar *tld_var = (TldVar *)tld;
2003821099 ZigVar *var = tld_var->var;
21100 assert(var != nullptr);
21101
2003921102 if (type_is_invalid(var->var_type))
20040 return ira->codegen->invalid_instruction;
21103 return ira->codegen->invalid_inst_gen;
2004121104
2004221105 if (var->const_value->type->id == ZigTypeIdFn) {
2004321106 ir_assert(var->const_value->data.x_ptr.special == ConstPtrSpecialFunction, source_instr);
2004421107 ZigFn *fn = var->const_value->data.x_ptr.data.fn.fn_entry;
20045 IrInstruction *bound_fn_value = ir_build_const_bound_fn(&ira->new_irb, source_instr->scope,
20046 source_instr->source_node, fn, container_ptr);
21108 IrInstGen *bound_fn_value = ir_const_bound_fn(ira, source_instr, fn, container_ptr,
21109 container_ptr_src);
2004721110 return ir_get_ref(ira, source_instr, bound_fn_value, true, false);
2004821111 }
2004921112 }
......@@ -20063,7 +21126,7 @@ static IrInstruction *ir_analyze_container_member_access_inner(IrAnalyze *ira,
2006321126 }
2006421127 ir_add_error_node(ira, source_instr->source_node,
2006521128 buf_sprintf("no member named '%s' in %s'%s'", buf_ptr(field_name), prefix_name, buf_ptr(&bare_struct_type->name)));
20066 return ira->codegen->invalid_instruction;
21129 return ira->codegen->invalid_inst_gen;
2006721130}
2006821131
2006921132static void memoize_field_init_val(CodeGen *codegen, ZigType *container_type, TypeStructField *field) {
......@@ -20078,24 +21141,24 @@ static void memoize_field_init_val(CodeGen *codegen, ZigType *container_type, Ty
2007821141 field->type_entry, nullptr, UndefOk);
2007921142}
2008021143
20081static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction *source_instr,
20082 TypeStructField *field, IrInstruction *struct_ptr, ZigType *struct_type, bool initializing)
21144static IrInstGen *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInst* source_instr,
21145 TypeStructField *field, IrInstGen *struct_ptr, ZigType *struct_type, bool initializing)
2008321146{
2008421147 Error err;
2008521148 ZigType *field_type = resolve_struct_field_type(ira->codegen, field);
2008621149 if (field_type == nullptr)
20087 return ira->codegen->invalid_instruction;
21150 return ira->codegen->invalid_inst_gen;
2008821151 if (field->is_comptime) {
20089 IrInstruction *elem = ir_const(ira, source_instr, field_type);
21152 IrInstGen *elem = ir_const(ira, source_instr, field_type);
2009021153 memoize_field_init_val(ira->codegen, struct_type, field);
2009121154 copy_const_val(elem->value, field->init_val);
20092 return ir_get_ref(ira, source_instr, elem, true, false);
21155 return ir_get_ref2(ira, source_instr, elem, field_type, true, false);
2009321156 }
2009421157 switch (type_has_one_possible_value(ira->codegen, field_type)) {
2009521158 case OnePossibleValueInvalid:
20096 return ira->codegen->invalid_instruction;
21159 return ira->codegen->invalid_inst_gen;
2009721160 case OnePossibleValueYes: {
20098 IrInstruction *elem = ir_const_move(ira, source_instr,
21161 IrInstGen *elem = ir_const_move(ira, source_instr,
2009921162 get_the_one_possible_value(ira->codegen, field_type));
2010021163 return ir_get_ref(ira, source_instr, elem, false, false);
2010121164 }
......@@ -20113,7 +21176,7 @@ static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction
2011321176 (struct_type->data.structure.layout == ContainerLayoutAuto) ?
2011421177 ResolveStatusZeroBitsKnown : ResolveStatusSizeKnown;
2011521178 if ((err = type_resolve(ira->codegen, struct_type, needed_resolve_status)))
20116 return ira->codegen->invalid_instruction;
21179 return ira->codegen->invalid_inst_gen;
2011721180 assert(struct_ptr->value->type->id == ZigTypeIdPointer);
2011821181 uint32_t ptr_bit_offset = struct_ptr->value->type->data.pointer.bit_offset_in_host;
2011921182 uint32_t ptr_host_int_bytes = struct_ptr->value->type->data.pointer.host_int_bytes;
......@@ -20127,14 +21190,14 @@ static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction
2012721190 if (instr_is_comptime(struct_ptr)) {
2012821191 ZigValue *ptr_val = ir_resolve_const(ira, struct_ptr, UndefBad);
2012921192 if (!ptr_val)
20130 return ira->codegen->invalid_instruction;
21193 return ira->codegen->invalid_inst_gen;
2013121194
2013221195 if (ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {
2013321196 ZigValue *struct_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);
2013421197 if (struct_val == nullptr)
20135 return ira->codegen->invalid_instruction;
21198 return ira->codegen->invalid_inst_gen;
2013621199 if (type_is_invalid(struct_val->type))
20137 return ira->codegen->invalid_instruction;
21200 return ira->codegen->invalid_inst_gen;
2013821201 if (initializing && struct_val->special == ConstValSpecialUndef) {
2013921202 struct_val->data.x_struct.fields = alloc_const_vals_ptrs(struct_type->data.structure.src_field_count);
2014021203 struct_val->special = ConstValSpecialStatic;
......@@ -20148,11 +21211,9 @@ static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction
2014821211 field_val->parent.data.p_struct.field_index = i;
2014921212 }
2015021213 }
20151 IrInstruction *result;
21214 IrInstGen *result;
2015221215 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
20153 result = ir_build_struct_field_ptr(&ira->new_irb, source_instr->scope,
20154 source_instr->source_node, struct_ptr, field);
20155 result->value->type = ptr_type;
21216 result = ir_build_struct_field_ptr(ira, source_instr, struct_ptr, field, ptr_type);
2015621217 result->value->special = ConstValSpecialStatic;
2015721218 } else {
2015821219 result = ir_const(ira, source_instr, ptr_type);
......@@ -20165,14 +21226,11 @@ static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction
2016521226 return result;
2016621227 }
2016721228 }
20168 IrInstruction *result = ir_build_struct_field_ptr(&ira->new_irb, source_instr->scope, source_instr->source_node,
20169 struct_ptr, field);
20170 result->value->type = ptr_type;
20171 return result;
21229 return ir_build_struct_field_ptr(ira, source_instr, struct_ptr, field, ptr_type);
2017221230}
2017321231
20174static IrInstruction *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_name,
20175 IrInstruction *source_instr, IrInstruction *container_ptr, ZigType *container_type)
21232static IrInstGen *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_name,
21233 IrInst* source_instr, IrInstGen *container_ptr, ZigType *container_type)
2017621234{
2017721235 // The type of the field is not available until a store using this pointer happens.
2017821236 // So, here we create a special pointer type which has the inferred struct type and
......@@ -20195,12 +21253,11 @@ static IrInstruction *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_n
2019521253 if (instr_is_comptime(container_ptr)) {
2019621254 ZigValue *ptr_val = ir_resolve_const(ira, container_ptr, UndefBad);
2019721255 if (ptr_val == nullptr)
20198 return ira->codegen->invalid_instruction;
21256 return ira->codegen->invalid_inst_gen;
2019921257
20200 IrInstruction *result;
21258 IrInstGen *result;
2020121259 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
20202 result = ir_build_cast(&ira->new_irb, source_instr->scope,
20203 source_instr->source_node, container_ptr_type, container_ptr, CastOpNoop);
21260 result = ir_build_cast(ira, source_instr, container_ptr_type, container_ptr, CastOpNoop);
2020421261 } else {
2020521262 result = ir_const(ira, source_instr, field_ptr_type);
2020621263 }
......@@ -20209,14 +21266,12 @@ static IrInstruction *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_n
2020921266 return result;
2021021267 }
2021121268
20212 IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope,
20213 source_instr->source_node, field_ptr_type, container_ptr, CastOpNoop);
20214 result->value->type = field_ptr_type;
20215 return result;
21269 return ir_build_cast(ira, source_instr, field_ptr_type, container_ptr, CastOpNoop);
2021621270}
2021721271
20218static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_name,
20219 IrInstruction *source_instr, IrInstruction *container_ptr, ZigType *container_type, bool initializing)
21272static IrInstGen *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_name,
21273 IrInst* source_instr, IrInstGen *container_ptr, IrInst *container_ptr_src,
21274 ZigType *container_type, bool initializing)
2022021275{
2022121276 Error err;
2022221277
......@@ -20229,7 +21284,7 @@ static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_
2022921284 }
2023021285
2023121286 if ((err = type_resolve(ira->codegen, bare_type, ResolveStatusZeroBitsKnown)))
20232 return ira->codegen->invalid_instruction;
21287 return ira->codegen->invalid_inst_gen;
2023321288
2023421289 assert(container_ptr->value->type->id == ZigTypeIdPointer);
2023521290 if (bare_type->id == ZigTypeIdStruct) {
......@@ -20238,13 +21293,13 @@ static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_
2023821293 return ir_analyze_struct_field_ptr(ira, source_instr, field, container_ptr, bare_type, initializing);
2023921294 } else {
2024021295 return ir_analyze_container_member_access_inner(ira, bare_type, field_name,
20241 source_instr, container_ptr, container_type);
21296 source_instr, container_ptr, container_ptr_src, container_type);
2024221297 }
2024321298 }
2024421299
2024521300 if (bare_type->id == ZigTypeIdEnum) {
2024621301 return ir_analyze_container_member_access_inner(ira, bare_type, field_name,
20247 source_instr, container_ptr, container_type);
21302 source_instr, container_ptr, container_ptr_src, container_type);
2024821303 }
2024921304
2025021305 if (bare_type->id == ZigTypeIdUnion) {
......@@ -20254,27 +21309,27 @@ static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_
2025421309 TypeUnionField *field = find_union_type_field(bare_type, field_name);
2025521310 if (field == nullptr) {
2025621311 return ir_analyze_container_member_access_inner(ira, bare_type, field_name,
20257 source_instr, container_ptr, container_type);
21312 source_instr, container_ptr, container_ptr_src, container_type);
2025821313 }
2025921314
2026021315 ZigType *field_type = resolve_union_field_type(ira->codegen, field);
2026121316 if (field_type == nullptr)
20262 return ira->codegen->invalid_instruction;
21317 return ira->codegen->invalid_inst_gen;
2026321318
2026421319 ZigType *ptr_type = get_pointer_to_type_extra(ira->codegen, field_type,
2026521320 is_const, is_volatile, PtrLenSingle, 0, 0, 0, false);
2026621321 if (instr_is_comptime(container_ptr)) {
2026721322 ZigValue *ptr_val = ir_resolve_const(ira, container_ptr, UndefBad);
2026821323 if (!ptr_val)
20269 return ira->codegen->invalid_instruction;
21324 return ira->codegen->invalid_inst_gen;
2027021325
2027121326 if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar &&
2027221327 ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {
2027321328 ZigValue *union_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);
2027421329 if (union_val == nullptr)
20275 return ira->codegen->invalid_instruction;
21330 return ira->codegen->invalid_inst_gen;
2027621331 if (type_is_invalid(union_val->type))
20277 return ira->codegen->invalid_instruction;
21332 return ira->codegen->invalid_inst_gen;
2027821333
2027921334 if (initializing) {
2028021335 ZigValue *payload_val = create_const_vals(1);
......@@ -20295,17 +21350,16 @@ static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_
2029521350 ir_add_error_node(ira, source_instr->source_node,
2029621351 buf_sprintf("accessing union field '%s' while field '%s' is set", buf_ptr(field_name),
2029721352 buf_ptr(actual_field->name)));
20298 return ira->codegen->invalid_instruction;
21353 return ira->codegen->invalid_inst_gen;
2029921354 }
2030021355 }
2030121356
2030221357 ZigValue *payload_val = union_val->data.x_union.payload;
2030321358
20304 IrInstruction *result;
21359 IrInstGen *result;
2030521360 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
20306 result = ir_build_union_field_ptr(&ira->new_irb, source_instr->scope,
20307 source_instr->source_node, container_ptr, field, true, initializing);
20308 result->value->type = ptr_type;
21361 result = ir_build_union_field_ptr(ira, source_instr, container_ptr, field, true,
21362 initializing, ptr_type);
2030921363 result->value->special = ConstValSpecialStatic;
2031021364 } else {
2031121365 result = ir_const(ira, source_instr, ptr_type);
......@@ -20318,10 +21372,7 @@ static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_
2031821372 }
2031921373 }
2032021374
20321 IrInstruction *result = ir_build_union_field_ptr(&ira->new_irb, source_instr->scope,
20322 source_instr->source_node, container_ptr, field, true, initializing);
20323 result->value->type = ptr_type;
20324 return result;
21375 return ir_build_union_field_ptr(ira, source_instr, container_ptr, field, true, initializing, ptr_type);
2032521376 }
2032621377
2032721378 zig_unreachable();
......@@ -20362,16 +21413,18 @@ static void add_link_lib_symbol(IrAnalyze *ira, Buf *lib_name, Buf *symbol_name,
2036221413 link_lib->symbols.append(symbol_name);
2036321414}
2036421415
20365static IrInstruction *ir_error_dependency_loop(IrAnalyze *ira, IrInstruction *source_instr) {
21416static IrInstGen *ir_error_dependency_loop(IrAnalyze *ira, IrInst* source_instr) {
2036621417 ir_add_error(ira, source_instr, buf_sprintf("dependency loop detected"));
20367 return ira->codegen->invalid_instruction;
21418 return ira->codegen->invalid_inst_gen;
2036821419}
2036921420
20370static IrInstruction *ir_analyze_decl_ref(IrAnalyze *ira, IrInstruction *source_instruction, Tld *tld) {
21421static IrInstGen *ir_analyze_decl_ref(IrAnalyze *ira, IrInst* source_instruction, Tld *tld) {
2037121422 resolve_top_level_decl(ira->codegen, tld, source_instruction->source_node, true);
2037221423 if (tld->resolution == TldResolutionInvalid) {
20373 return ira->codegen->invalid_instruction;
21424 return ira->codegen->invalid_inst_gen;
2037421425 }
21426 if (tld->resolution == TldResolutionResolving)
21427 return ir_error_dependency_loop(ira, source_instruction);
2037521428
2037621429 switch (tld->id) {
2037721430 case TldIdContainer:
......@@ -20381,9 +21434,8 @@ static IrInstruction *ir_analyze_decl_ref(IrAnalyze *ira, IrInstruction *source_
2038121434 case TldIdVar: {
2038221435 TldVar *tld_var = (TldVar *)tld;
2038321436 ZigVar *var = tld_var->var;
20384 if (var == nullptr) {
20385 return ir_error_dependency_loop(ira, source_instruction);
20386 }
21437 assert(var != nullptr);
21438
2038721439 if (tld_var->extern_lib_name != nullptr) {
2038821440 add_link_lib_symbol(ira, tld_var->extern_lib_name, buf_create_from_str(var->name),
2038921441 source_instruction->source_node);
......@@ -20394,17 +21446,16 @@ static IrInstruction *ir_analyze_decl_ref(IrAnalyze *ira, IrInstruction *source_
2039421446 case TldIdFn: {
2039521447 TldFn *tld_fn = (TldFn *)tld;
2039621448 ZigFn *fn_entry = tld_fn->fn_entry;
20397 assert(fn_entry->type_entry);
21449 assert(fn_entry->type_entry != nullptr);
2039821450
2039921451 if (type_is_invalid(fn_entry->type_entry))
20400 return ira->codegen->invalid_instruction;
21452 return ira->codegen->invalid_inst_gen;
2040121453
2040221454 if (tld_fn->extern_lib_name != nullptr) {
2040321455 add_link_lib_symbol(ira, tld_fn->extern_lib_name, &fn_entry->symbol_name, source_instruction->source_node);
2040421456 }
2040521457
20406 IrInstruction *fn_inst = ir_create_const_fn(&ira->new_irb, source_instruction->scope,
20407 source_instruction->source_node, fn_entry);
21458 IrInstGen *fn_inst = ir_const_fn(ira, source_instruction, fn_entry);
2040821459 return ir_get_ref(ira, source_instruction, fn_inst, true, false);
2040921460 }
2041021461 }
......@@ -20422,40 +21473,44 @@ static ErrorTableEntry *find_err_table_entry(ZigType *err_set_type, Buf *field_n
2042221473 return nullptr;
2042321474}
2042421475
20425static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstructionFieldPtr *field_ptr_instruction) {
21476static IrInstGen *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstSrcFieldPtr *field_ptr_instruction) {
2042621477 Error err;
20427 IrInstruction *container_ptr = field_ptr_instruction->container_ptr->child;
21478 IrInstGen *container_ptr = field_ptr_instruction->container_ptr->child;
2042821479 if (type_is_invalid(container_ptr->value->type))
20429 return ira->codegen->invalid_instruction;
21480 return ira->codegen->invalid_inst_gen;
2043021481
2043121482 ZigType *container_type = container_ptr->value->type->data.pointer.child_type;
2043221483
2043321484 Buf *field_name = field_ptr_instruction->field_name_buffer;
2043421485 if (!field_name) {
20435 IrInstruction *field_name_expr = field_ptr_instruction->field_name_expr->child;
21486 IrInstGen *field_name_expr = field_ptr_instruction->field_name_expr->child;
2043621487 field_name = ir_resolve_str(ira, field_name_expr);
2043721488 if (!field_name)
20438 return ira->codegen->invalid_instruction;
21489 return ira->codegen->invalid_inst_gen;
2043921490 }
2044021491
2044121492
20442 AstNode *source_node = field_ptr_instruction->base.source_node;
21493 AstNode *source_node = field_ptr_instruction->base.base.source_node;
2044321494
2044421495 if (type_is_invalid(container_type)) {
20445 return ira->codegen->invalid_instruction;
21496 return ira->codegen->invalid_inst_gen;
2044621497 } else if (is_tuple(container_type) && !field_ptr_instruction->initializing && buf_eql_str(field_name, "len")) {
20447 IrInstruction *len_inst = ir_const_unsigned(ira, &field_ptr_instruction->base,
21498 IrInstGen *len_inst = ir_const_unsigned(ira, &field_ptr_instruction->base.base,
2044821499 container_type->data.structure.src_field_count);
20449 return ir_get_ref(ira, &field_ptr_instruction->base, len_inst, true, false);
21500 return ir_get_ref(ira, &field_ptr_instruction->base.base, len_inst, true, false);
2045021501 } else if (is_slice(container_type) || is_container_ref(container_type)) {
2045121502 assert(container_ptr->value->type->id == ZigTypeIdPointer);
2045221503 if (container_type->id == ZigTypeIdPointer) {
2045321504 ZigType *bare_type = container_ref_type(container_type);
20454 IrInstruction *container_child = ir_get_deref(ira, &field_ptr_instruction->base, container_ptr, nullptr);
20455 IrInstruction *result = ir_analyze_container_field_ptr(ira, field_name, &field_ptr_instruction->base, container_child, bare_type, field_ptr_instruction->initializing);
21505 IrInstGen *container_child = ir_get_deref(ira, &field_ptr_instruction->base.base, container_ptr, nullptr);
21506 IrInstGen *result = ir_analyze_container_field_ptr(ira, field_name, &field_ptr_instruction->base.base,
21507 container_child, &field_ptr_instruction->container_ptr->base, bare_type,
21508 field_ptr_instruction->initializing);
2045621509 return result;
2045721510 } else {
20458 IrInstruction *result = ir_analyze_container_field_ptr(ira, field_name, &field_ptr_instruction->base, container_ptr, container_type, field_ptr_instruction->initializing);
21511 IrInstGen *result = ir_analyze_container_field_ptr(ira, field_name, &field_ptr_instruction->base.base,
21512 container_ptr, &field_ptr_instruction->container_ptr->base, container_type,
21513 field_ptr_instruction->initializing);
2045921514 return result;
2046021515 }
2046121516 } else if (is_array_ref(container_type) && !field_ptr_instruction->initializing) {
......@@ -20470,42 +21525,42 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
2047021525 ZigType *usize = ira->codegen->builtin_types.entry_usize;
2047121526 bool ptr_is_const = true;
2047221527 bool ptr_is_volatile = false;
20473 return ir_get_const_ptr(ira, &field_ptr_instruction->base, len_val,
21528 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base, len_val,
2047421529 usize, ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2047521530 } else {
2047621531 ir_add_error_node(ira, source_node,
2047721532 buf_sprintf("no member named '%s' in '%s'", buf_ptr(field_name),
2047821533 buf_ptr(&container_type->name)));
20479 return ira->codegen->invalid_instruction;
21534 return ira->codegen->invalid_inst_gen;
2048021535 }
2048121536 } else if (container_type->id == ZigTypeIdMetaType) {
2048221537 ZigValue *container_ptr_val = ir_resolve_const(ira, container_ptr, UndefBad);
2048321538 if (!container_ptr_val)
20484 return ira->codegen->invalid_instruction;
21539 return ira->codegen->invalid_inst_gen;
2048521540
2048621541 assert(container_ptr->value->type->id == ZigTypeIdPointer);
2048721542 ZigValue *child_val = const_ptr_pointee(ira, ira->codegen, container_ptr_val, source_node);
2048821543 if (child_val == nullptr)
20489 return ira->codegen->invalid_instruction;
21544 return ira->codegen->invalid_inst_gen;
2049021545 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec,
20491 field_ptr_instruction->base.source_node, child_val, UndefBad)))
21546 field_ptr_instruction->base.base.source_node, child_val, UndefBad)))
2049221547 {
20493 return ira->codegen->invalid_instruction;
21548 return ira->codegen->invalid_inst_gen;
2049421549 }
2049521550 ZigType *child_type = child_val->data.x_type;
2049621551
2049721552 if (type_is_invalid(child_type)) {
20498 return ira->codegen->invalid_instruction;
21553 return ira->codegen->invalid_inst_gen;
2049921554 } else if (is_container(child_type)) {
2050021555 if (child_type->id == ZigTypeIdEnum) {
2050121556 if ((err = type_resolve(ira->codegen, child_type, ResolveStatusSizeKnown)))
20502 return ira->codegen->invalid_instruction;
21557 return ira->codegen->invalid_inst_gen;
2050321558
2050421559 TypeEnumField *field = find_enum_type_field(child_type, field_name);
2050521560 if (field) {
2050621561 bool ptr_is_const = true;
2050721562 bool ptr_is_volatile = false;
20508 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21563 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2050921564 create_const_enum(child_type, &field->value), child_type,
2051021565 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2051121566 }
......@@ -20514,37 +21569,37 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
2051421569 Tld *tld = find_container_decl(ira->codegen, container_scope, field_name);
2051521570 if (tld) {
2051621571 if (tld->visib_mod == VisibModPrivate &&
20517 tld->import != get_scope_import(field_ptr_instruction->base.scope))
21572 tld->import != get_scope_import(field_ptr_instruction->base.base.scope))
2051821573 {
20519 ErrorMsg *msg = ir_add_error(ira, &field_ptr_instruction->base,
21574 ErrorMsg *msg = ir_add_error(ira, &field_ptr_instruction->base.base,
2052021575 buf_sprintf("'%s' is private", buf_ptr(field_name)));
2052121576 add_error_note(ira->codegen, msg, tld->source_node, buf_sprintf("declared here"));
20522 return ira->codegen->invalid_instruction;
21577 return ira->codegen->invalid_inst_gen;
2052321578 }
20524 return ir_analyze_decl_ref(ira, &field_ptr_instruction->base, tld);
21579 return ir_analyze_decl_ref(ira, &field_ptr_instruction->base.base, tld);
2052521580 }
2052621581 if (child_type->id == ZigTypeIdUnion &&
2052721582 (child_type->data.unionation.decl_node->data.container_decl.init_arg_expr != nullptr ||
2052821583 child_type->data.unionation.decl_node->data.container_decl.auto_enum))
2052921584 {
2053021585 if ((err = type_resolve(ira->codegen, child_type, ResolveStatusSizeKnown)))
20531 return ira->codegen->invalid_instruction;
21586 return ira->codegen->invalid_inst_gen;
2053221587 TypeUnionField *field = find_union_type_field(child_type, field_name);
2053321588 if (field) {
2053421589 ZigType *enum_type = child_type->data.unionation.tag_type;
2053521590 bool ptr_is_const = true;
2053621591 bool ptr_is_volatile = false;
20537 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21592 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2053821593 create_const_enum(enum_type, &field->enum_field->value), enum_type,
2053921594 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2054021595 }
2054121596 }
2054221597 const char *container_name = (child_type == ira->codegen->root_import) ?
2054321598 "root source file" : buf_ptr(buf_sprintf("container '%s'", buf_ptr(&child_type->name)));
20544 ir_add_error(ira, &field_ptr_instruction->base,
21599 ir_add_error(ira, &field_ptr_instruction->base.base,
2054521600 buf_sprintf("%s has no member called '%s'",
2054621601 container_name, buf_ptr(field_name)));
20547 return ira->codegen->invalid_instruction;
21602 return ira->codegen->invalid_inst_gen;
2054821603 } else if (child_type->id == ZigTypeIdErrorSet) {
2054921604 ErrorTableEntry *err_entry;
2055021605 ZigType *err_set_type;
......@@ -20554,7 +21609,7 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
2055421609 err_entry = existing_entry->value;
2055521610 } else {
2055621611 err_entry = allocate<ErrorTableEntry>(1);
20557 err_entry->decl_node = field_ptr_instruction->base.source_node;
21612 err_entry->decl_node = field_ptr_instruction->base.base.source_node;
2055821613 buf_init_from_buf(&err_entry->name, field_name);
2055921614 size_t error_value_count = ira->codegen->errors_by_index.length;
2056021615 assert((uint32_t)error_value_count < (((uint32_t)1) << (uint32_t)ira->codegen->err_tag_type->data.integral.bit_count));
......@@ -20564,19 +21619,19 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
2056421619 }
2056521620 if (err_entry->set_with_only_this_in_it == nullptr) {
2056621621 err_entry->set_with_only_this_in_it = make_err_set_with_one_item(ira->codegen,
20567 field_ptr_instruction->base.scope, field_ptr_instruction->base.source_node,
21622 field_ptr_instruction->base.base.scope, field_ptr_instruction->base.base.source_node,
2056821623 err_entry);
2056921624 }
2057021625 err_set_type = err_entry->set_with_only_this_in_it;
2057121626 } else {
20572 if (!resolve_inferred_error_set(ira->codegen, child_type, field_ptr_instruction->base.source_node)) {
20573 return ira->codegen->invalid_instruction;
21627 if (!resolve_inferred_error_set(ira->codegen, child_type, field_ptr_instruction->base.base.source_node)) {
21628 return ira->codegen->invalid_inst_gen;
2057421629 }
2057521630 err_entry = find_err_table_entry(child_type, field_name);
2057621631 if (err_entry == nullptr) {
20577 ir_add_error(ira, &field_ptr_instruction->base,
21632 ir_add_error(ira, &field_ptr_instruction->base.base,
2057821633 buf_sprintf("no error named '%s' in '%s'", buf_ptr(field_name), buf_ptr(&child_type->name)));
20579 return ira->codegen->invalid_instruction;
21634 return ira->codegen->invalid_inst_gen;
2058021635 }
2058121636 err_set_type = child_type;
2058221637 }
......@@ -20587,13 +21642,13 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
2058721642
2058821643 bool ptr_is_const = true;
2058921644 bool ptr_is_volatile = false;
20590 return ir_get_const_ptr(ira, &field_ptr_instruction->base, const_val,
21645 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base, const_val,
2059121646 err_set_type, ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2059221647 } else if (child_type->id == ZigTypeIdInt) {
2059321648 if (buf_eql_str(field_name, "bit_count")) {
2059421649 bool ptr_is_const = true;
2059521650 bool ptr_is_volatile = false;
20596 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21651 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2059721652 create_const_unsigned_negative(ira->codegen->builtin_types.entry_num_lit_int,
2059821653 child_type->data.integral.bit_count, false),
2059921654 ira->codegen->builtin_types.entry_num_lit_int,
......@@ -20601,36 +21656,36 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
2060121656 } else if (buf_eql_str(field_name, "is_signed")) {
2060221657 bool ptr_is_const = true;
2060321658 bool ptr_is_volatile = false;
20604 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21659 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2060521660 create_const_bool(ira->codegen, child_type->data.integral.is_signed),
2060621661 ira->codegen->builtin_types.entry_bool,
2060721662 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2060821663 } else {
20609 ir_add_error(ira, &field_ptr_instruction->base,
21664 ir_add_error(ira, &field_ptr_instruction->base.base,
2061021665 buf_sprintf("type '%s' has no member called '%s'",
2061121666 buf_ptr(&child_type->name), buf_ptr(field_name)));
20612 return ira->codegen->invalid_instruction;
21667 return ira->codegen->invalid_inst_gen;
2061321668 }
2061421669 } else if (child_type->id == ZigTypeIdFloat) {
2061521670 if (buf_eql_str(field_name, "bit_count")) {
2061621671 bool ptr_is_const = true;
2061721672 bool ptr_is_volatile = false;
20618 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21673 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2061921674 create_const_unsigned_negative(ira->codegen->builtin_types.entry_num_lit_int,
2062021675 child_type->data.floating.bit_count, false),
2062121676 ira->codegen->builtin_types.entry_num_lit_int,
2062221677 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2062321678 } else {
20624 ir_add_error(ira, &field_ptr_instruction->base,
21679 ir_add_error(ira, &field_ptr_instruction->base.base,
2062521680 buf_sprintf("type '%s' has no member called '%s'",
2062621681 buf_ptr(&child_type->name), buf_ptr(field_name)));
20627 return ira->codegen->invalid_instruction;
21682 return ira->codegen->invalid_inst_gen;
2062821683 }
2062921684 } else if (child_type->id == ZigTypeIdPointer) {
2063021685 if (buf_eql_str(field_name, "Child")) {
2063121686 bool ptr_is_const = true;
2063221687 bool ptr_is_volatile = false;
20633 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21688 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2063421689 create_const_type(ira->codegen, child_type->data.pointer.child_type),
2063521690 ira->codegen->builtin_types.entry_type,
2063621691 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
......@@ -20640,75 +21695,75 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
2064021695 if ((err = type_resolve(ira->codegen, child_type->data.pointer.child_type,
2064121696 ResolveStatusAlignmentKnown)))
2064221697 {
20643 return ira->codegen->invalid_instruction;
21698 return ira->codegen->invalid_inst_gen;
2064421699 }
20645 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21700 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2064621701 create_const_unsigned_negative(ira->codegen->builtin_types.entry_num_lit_int,
2064721702 get_ptr_align(ira->codegen, child_type), false),
2064821703 ira->codegen->builtin_types.entry_num_lit_int,
2064921704 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2065021705 } else {
20651 ir_add_error(ira, &field_ptr_instruction->base,
21706 ir_add_error(ira, &field_ptr_instruction->base.base,
2065221707 buf_sprintf("type '%s' has no member called '%s'",
2065321708 buf_ptr(&child_type->name), buf_ptr(field_name)));
20654 return ira->codegen->invalid_instruction;
21709 return ira->codegen->invalid_inst_gen;
2065521710 }
2065621711 } else if (child_type->id == ZigTypeIdArray) {
2065721712 if (buf_eql_str(field_name, "Child")) {
2065821713 bool ptr_is_const = true;
2065921714 bool ptr_is_volatile = false;
20660 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21715 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2066121716 create_const_type(ira->codegen, child_type->data.array.child_type),
2066221717 ira->codegen->builtin_types.entry_type,
2066321718 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2066421719 } else if (buf_eql_str(field_name, "len")) {
2066521720 bool ptr_is_const = true;
2066621721 bool ptr_is_volatile = false;
20667 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21722 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2066821723 create_const_unsigned_negative(ira->codegen->builtin_types.entry_num_lit_int,
2066921724 child_type->data.array.len, false),
2067021725 ira->codegen->builtin_types.entry_num_lit_int,
2067121726 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2067221727 } else {
20673 ir_add_error(ira, &field_ptr_instruction->base,
21728 ir_add_error(ira, &field_ptr_instruction->base.base,
2067421729 buf_sprintf("type '%s' has no member called '%s'",
2067521730 buf_ptr(&child_type->name), buf_ptr(field_name)));
20676 return ira->codegen->invalid_instruction;
21731 return ira->codegen->invalid_inst_gen;
2067721732 }
2067821733 } else if (child_type->id == ZigTypeIdErrorUnion) {
2067921734 if (buf_eql_str(field_name, "Payload")) {
2068021735 bool ptr_is_const = true;
2068121736 bool ptr_is_volatile = false;
20682 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21737 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2068321738 create_const_type(ira->codegen, child_type->data.error_union.payload_type),
2068421739 ira->codegen->builtin_types.entry_type,
2068521740 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2068621741 } else if (buf_eql_str(field_name, "ErrorSet")) {
2068721742 bool ptr_is_const = true;
2068821743 bool ptr_is_volatile = false;
20689 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21744 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2069021745 create_const_type(ira->codegen, child_type->data.error_union.err_set_type),
2069121746 ira->codegen->builtin_types.entry_type,
2069221747 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2069321748 } else {
20694 ir_add_error(ira, &field_ptr_instruction->base,
21749 ir_add_error(ira, &field_ptr_instruction->base.base,
2069521750 buf_sprintf("type '%s' has no member called '%s'",
2069621751 buf_ptr(&child_type->name), buf_ptr(field_name)));
20697 return ira->codegen->invalid_instruction;
21752 return ira->codegen->invalid_inst_gen;
2069821753 }
2069921754 } else if (child_type->id == ZigTypeIdOptional) {
2070021755 if (buf_eql_str(field_name, "Child")) {
2070121756 bool ptr_is_const = true;
2070221757 bool ptr_is_volatile = false;
20703 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21758 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2070421759 create_const_type(ira->codegen, child_type->data.maybe.child_type),
2070521760 ira->codegen->builtin_types.entry_type,
2070621761 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2070721762 } else {
20708 ir_add_error(ira, &field_ptr_instruction->base,
21763 ir_add_error(ira, &field_ptr_instruction->base.base,
2070921764 buf_sprintf("type '%s' has no member called '%s'",
2071021765 buf_ptr(&child_type->name), buf_ptr(field_name)));
20711 return ira->codegen->invalid_instruction;
21766 return ira->codegen->invalid_inst_gen;
2071221767 }
2071321768 } else if (child_type->id == ZigTypeIdFn) {
2071421769 if (buf_eql_str(field_name, "ReturnType")) {
......@@ -20716,121 +21771,121 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
2071621771 // Return type can only ever be null, if the function is generic
2071721772 assert(child_type->data.fn.is_generic);
2071821773
20719 ir_add_error(ira, &field_ptr_instruction->base,
21774 ir_add_error(ira, &field_ptr_instruction->base.base,
2072021775 buf_sprintf("ReturnType has not been resolved because '%s' is generic", buf_ptr(&child_type->name)));
20721 return ira->codegen->invalid_instruction;
21776 return ira->codegen->invalid_inst_gen;
2072221777 }
2072321778
2072421779 bool ptr_is_const = true;
2072521780 bool ptr_is_volatile = false;
20726 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21781 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2072721782 create_const_type(ira->codegen, child_type->data.fn.fn_type_id.return_type),
2072821783 ira->codegen->builtin_types.entry_type,
2072921784 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2073021785 } else if (buf_eql_str(field_name, "is_var_args")) {
2073121786 bool ptr_is_const = true;
2073221787 bool ptr_is_volatile = false;
20733 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21788 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2073421789 create_const_bool(ira->codegen, child_type->data.fn.fn_type_id.is_var_args),
2073521790 ira->codegen->builtin_types.entry_bool,
2073621791 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2073721792 } else if (buf_eql_str(field_name, "arg_count")) {
2073821793 bool ptr_is_const = true;
2073921794 bool ptr_is_volatile = false;
20740 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21795 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2074121796 create_const_usize(ira->codegen, child_type->data.fn.fn_type_id.param_count),
2074221797 ira->codegen->builtin_types.entry_usize,
2074321798 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2074421799 } else {
20745 ir_add_error(ira, &field_ptr_instruction->base,
21800 ir_add_error(ira, &field_ptr_instruction->base.base,
2074621801 buf_sprintf("type '%s' has no member called '%s'",
2074721802 buf_ptr(&child_type->name), buf_ptr(field_name)));
20748 return ira->codegen->invalid_instruction;
21803 return ira->codegen->invalid_inst_gen;
2074921804 }
2075021805 } else {
20751 ir_add_error(ira, &field_ptr_instruction->base,
21806 ir_add_error(ira, &field_ptr_instruction->base.base,
2075221807 buf_sprintf("type '%s' does not support field access", buf_ptr(&child_type->name)));
20753 return ira->codegen->invalid_instruction;
21808 return ira->codegen->invalid_inst_gen;
2075421809 }
2075521810 } else if (field_ptr_instruction->initializing) {
20756 ir_add_error(ira, &field_ptr_instruction->base,
21811 ir_add_error(ira, &field_ptr_instruction->base.base,
2075721812 buf_sprintf("type '%s' does not support struct initialization syntax", buf_ptr(&container_type->name)));
20758 return ira->codegen->invalid_instruction;
21813 return ira->codegen->invalid_inst_gen;
2075921814 } else {
20760 ir_add_error_node(ira, field_ptr_instruction->base.source_node,
21815 ir_add_error_node(ira, field_ptr_instruction->base.base.source_node,
2076121816 buf_sprintf("type '%s' does not support field access", buf_ptr(&container_type->name)));
20762 return ira->codegen->invalid_instruction;
21817 return ira->codegen->invalid_inst_gen;
2076321818 }
2076421819}
2076521820
20766static IrInstruction *ir_analyze_instruction_store_ptr(IrAnalyze *ira, IrInstructionStorePtr *instruction) {
20767 IrInstruction *ptr = instruction->ptr->child;
21821static IrInstGen *ir_analyze_instruction_store_ptr(IrAnalyze *ira, IrInstSrcStorePtr *instruction) {
21822 IrInstGen *ptr = instruction->ptr->child;
2076821823 if (type_is_invalid(ptr->value->type))
20769 return ira->codegen->invalid_instruction;
21824 return ira->codegen->invalid_inst_gen;
2077021825
20771 IrInstruction *value = instruction->value->child;
21826 IrInstGen *value = instruction->value->child;
2077221827 if (type_is_invalid(value->value->type))
20773 return ira->codegen->invalid_instruction;
21828 return ira->codegen->invalid_inst_gen;
2077421829
20775 return ir_analyze_store_ptr(ira, &instruction->base, ptr, value, instruction->allow_write_through_const);
21830 return ir_analyze_store_ptr(ira, &instruction->base.base, ptr, value, instruction->allow_write_through_const);
2077621831}
2077721832
20778static IrInstruction *ir_analyze_instruction_load_ptr(IrAnalyze *ira, IrInstructionLoadPtr *instruction) {
20779 IrInstruction *ptr = instruction->ptr->child;
21833static IrInstGen *ir_analyze_instruction_load_ptr(IrAnalyze *ira, IrInstSrcLoadPtr *instruction) {
21834 IrInstGen *ptr = instruction->ptr->child;
2078021835 if (type_is_invalid(ptr->value->type))
20781 return ira->codegen->invalid_instruction;
20782 return ir_get_deref(ira, &instruction->base, ptr, nullptr);
21836 return ira->codegen->invalid_inst_gen;
21837 return ir_get_deref(ira, &instruction->base.base, ptr, nullptr);
2078321838}
2078421839
20785static IrInstruction *ir_analyze_instruction_typeof(IrAnalyze *ira, IrInstructionTypeOf *typeof_instruction) {
20786 IrInstruction *expr_value = typeof_instruction->value->child;
21840static IrInstGen *ir_analyze_instruction_typeof(IrAnalyze *ira, IrInstSrcTypeOf *typeof_instruction) {
21841 IrInstGen *expr_value = typeof_instruction->value->child;
2078721842 ZigType *type_entry = expr_value->value->type;
2078821843 if (type_is_invalid(type_entry))
20789 return ira->codegen->invalid_instruction;
20790 return ir_const_type(ira, &typeof_instruction->base, type_entry);
21844 return ira->codegen->invalid_inst_gen;
21845 return ir_const_type(ira, &typeof_instruction->base.base, type_entry);
2079121846}
2079221847
20793static IrInstruction *ir_analyze_instruction_set_cold(IrAnalyze *ira, IrInstructionSetCold *instruction) {
21848static IrInstGen *ir_analyze_instruction_set_cold(IrAnalyze *ira, IrInstSrcSetCold *instruction) {
2079421849 if (ira->new_irb.exec->is_inline) {
2079521850 // ignore setCold when running functions at compile time
20796 return ir_const_void(ira, &instruction->base);
21851 return ir_const_void(ira, &instruction->base.base);
2079721852 }
2079821853
20799 IrInstruction *is_cold_value = instruction->is_cold->child;
21854 IrInstGen *is_cold_value = instruction->is_cold->child;
2080021855 bool want_cold;
2080121856 if (!ir_resolve_bool(ira, is_cold_value, &want_cold))
20802 return ira->codegen->invalid_instruction;
21857 return ira->codegen->invalid_inst_gen;
2080321858
20804 ZigFn *fn_entry = scope_fn_entry(instruction->base.scope);
21859 ZigFn *fn_entry = scope_fn_entry(instruction->base.base.scope);
2080521860 if (fn_entry == nullptr) {
20806 ir_add_error(ira, &instruction->base, buf_sprintf("@setCold outside function"));
20807 return ira->codegen->invalid_instruction;
21861 ir_add_error(ira, &instruction->base.base, buf_sprintf("@setCold outside function"));
21862 return ira->codegen->invalid_inst_gen;
2080821863 }
2080921864
2081021865 if (fn_entry->set_cold_node != nullptr) {
20811 ErrorMsg *msg = ir_add_error(ira, &instruction->base, buf_sprintf("cold set twice in same function"));
21866 ErrorMsg *msg = ir_add_error(ira, &instruction->base.base, buf_sprintf("cold set twice in same function"));
2081221867 add_error_note(ira->codegen, msg, fn_entry->set_cold_node, buf_sprintf("first set here"));
20813 return ira->codegen->invalid_instruction;
21868 return ira->codegen->invalid_inst_gen;
2081421869 }
2081521870
20816 fn_entry->set_cold_node = instruction->base.source_node;
21871 fn_entry->set_cold_node = instruction->base.base.source_node;
2081721872 fn_entry->is_cold = want_cold;
2081821873
20819 return ir_const_void(ira, &instruction->base);
21874 return ir_const_void(ira, &instruction->base.base);
2082021875}
2082121876
20822static IrInstruction *ir_analyze_instruction_set_runtime_safety(IrAnalyze *ira,
20823 IrInstructionSetRuntimeSafety *set_runtime_safety_instruction)
21877static IrInstGen *ir_analyze_instruction_set_runtime_safety(IrAnalyze *ira,
21878 IrInstSrcSetRuntimeSafety *set_runtime_safety_instruction)
2082421879{
2082521880 if (ira->new_irb.exec->is_inline) {
2082621881 // ignore setRuntimeSafety when running functions at compile time
20827 return ir_const_void(ira, &set_runtime_safety_instruction->base);
21882 return ir_const_void(ira, &set_runtime_safety_instruction->base.base);
2082821883 }
2082921884
2083021885 bool *safety_off_ptr;
2083121886 AstNode **safety_set_node_ptr;
2083221887
20833 Scope *scope = set_runtime_safety_instruction->base.scope;
21888 Scope *scope = set_runtime_safety_instruction->base.base.scope;
2083421889 while (scope != nullptr) {
2083521890 if (scope->id == ScopeIdBlock) {
2083621891 ScopeBlock *block_scope = (ScopeBlock *)scope;
......@@ -20856,36 +21911,36 @@ static IrInstruction *ir_analyze_instruction_set_runtime_safety(IrAnalyze *ira,
2085621911 }
2085721912 assert(scope != nullptr);
2085821913
20859 IrInstruction *safety_on_value = set_runtime_safety_instruction->safety_on->child;
21914 IrInstGen *safety_on_value = set_runtime_safety_instruction->safety_on->child;
2086021915 bool want_runtime_safety;
2086121916 if (!ir_resolve_bool(ira, safety_on_value, &want_runtime_safety))
20862 return ira->codegen->invalid_instruction;
21917 return ira->codegen->invalid_inst_gen;
2086321918
20864 AstNode *source_node = set_runtime_safety_instruction->base.source_node;
21919 AstNode *source_node = set_runtime_safety_instruction->base.base.source_node;
2086521920 if (*safety_set_node_ptr) {
2086621921 ErrorMsg *msg = ir_add_error_node(ira, source_node,
2086721922 buf_sprintf("runtime safety set twice for same scope"));
2086821923 add_error_note(ira->codegen, msg, *safety_set_node_ptr, buf_sprintf("first set here"));
20869 return ira->codegen->invalid_instruction;
21924 return ira->codegen->invalid_inst_gen;
2087021925 }
2087121926 *safety_set_node_ptr = source_node;
2087221927 *safety_off_ptr = !want_runtime_safety;
2087321928
20874 return ir_const_void(ira, &set_runtime_safety_instruction->base);
21929 return ir_const_void(ira, &set_runtime_safety_instruction->base.base);
2087521930}
2087621931
20877static IrInstruction *ir_analyze_instruction_set_float_mode(IrAnalyze *ira,
20878 IrInstructionSetFloatMode *instruction)
21932static IrInstGen *ir_analyze_instruction_set_float_mode(IrAnalyze *ira,
21933 IrInstSrcSetFloatMode *instruction)
2087921934{
2088021935 if (ira->new_irb.exec->is_inline) {
2088121936 // ignore setFloatMode when running functions at compile time
20882 return ir_const_void(ira, &instruction->base);
21937 return ir_const_void(ira, &instruction->base.base);
2088321938 }
2088421939
2088521940 bool *fast_math_on_ptr;
2088621941 AstNode **fast_math_set_node_ptr;
2088721942
20888 Scope *scope = instruction->base.scope;
21943 Scope *scope = instruction->base.base.scope;
2088921944 while (scope != nullptr) {
2089021945 if (scope->id == ScopeIdBlock) {
2089121946 ScopeBlock *block_scope = (ScopeBlock *)scope;
......@@ -20911,42 +21966,38 @@ static IrInstruction *ir_analyze_instruction_set_float_mode(IrAnalyze *ira,
2091121966 }
2091221967 assert(scope != nullptr);
2091321968
20914 IrInstruction *float_mode_value = instruction->mode_value->child;
21969 IrInstGen *float_mode_value = instruction->mode_value->child;
2091521970 FloatMode float_mode_scalar;
2091621971 if (!ir_resolve_float_mode(ira, float_mode_value, &float_mode_scalar))
20917 return ira->codegen->invalid_instruction;
21972 return ira->codegen->invalid_inst_gen;
2091821973
20919 AstNode *source_node = instruction->base.source_node;
21974 AstNode *source_node = instruction->base.base.source_node;
2092021975 if (*fast_math_set_node_ptr) {
2092121976 ErrorMsg *msg = ir_add_error_node(ira, source_node,
2092221977 buf_sprintf("float mode set twice for same scope"));
2092321978 add_error_note(ira->codegen, msg, *fast_math_set_node_ptr, buf_sprintf("first set here"));
20924 return ira->codegen->invalid_instruction;
21979 return ira->codegen->invalid_inst_gen;
2092521980 }
2092621981 *fast_math_set_node_ptr = source_node;
2092721982 *fast_math_on_ptr = (float_mode_scalar == FloatModeOptimized);
2092821983
20929 return ir_const_void(ira, &instruction->base);
21984 return ir_const_void(ira, &instruction->base.base);
2093021985}
2093121986
20932static IrInstruction *ir_analyze_instruction_any_frame_type(IrAnalyze *ira,
20933 IrInstructionAnyFrameType *instruction)
20934{
21987static IrInstGen *ir_analyze_instruction_any_frame_type(IrAnalyze *ira, IrInstSrcAnyFrameType *instruction) {
2093521988 ZigType *payload_type = nullptr;
2093621989 if (instruction->payload_type != nullptr) {
2093721990 payload_type = ir_resolve_type(ira, instruction->payload_type->child);
2093821991 if (type_is_invalid(payload_type))
20939 return ira->codegen->invalid_instruction;
21992 return ira->codegen->invalid_inst_gen;
2094021993 }
2094121994
2094221995 ZigType *any_frame_type = get_any_frame_type(ira->codegen, payload_type);
20943 return ir_const_type(ira, &instruction->base, any_frame_type);
21996 return ir_const_type(ira, &instruction->base.base, any_frame_type);
2094421997}
2094521998
20946static IrInstruction *ir_analyze_instruction_slice_type(IrAnalyze *ira,
20947 IrInstructionSliceType *slice_type_instruction)
20948{
20949 IrInstruction *result = ir_const(ira, &slice_type_instruction->base, ira->codegen->builtin_types.entry_type);
21999static IrInstGen *ir_analyze_instruction_slice_type(IrAnalyze *ira, IrInstSrcSliceType *slice_type_instruction) {
22000 IrInstGen *result = ir_const(ira, &slice_type_instruction->base.base, ira->codegen->builtin_types.entry_type);
2095022001 result->value->special = ConstValSpecialLazy;
2095122002
2095222003 LazyValueSliceType *lazy_slice_type = allocate<LazyValueSliceType>(1, "LazyValueSliceType");
......@@ -20957,18 +22008,18 @@ static IrInstruction *ir_analyze_instruction_slice_type(IrAnalyze *ira,
2095722008 if (slice_type_instruction->align_value != nullptr) {
2095822009 lazy_slice_type->align_inst = slice_type_instruction->align_value->child;
2095922010 if (ir_resolve_const(ira, lazy_slice_type->align_inst, LazyOk) == nullptr)
20960 return ira->codegen->invalid_instruction;
22011 return ira->codegen->invalid_inst_gen;
2096122012 }
2096222013
2096322014 if (slice_type_instruction->sentinel != nullptr) {
2096422015 lazy_slice_type->sentinel = slice_type_instruction->sentinel->child;
2096522016 if (ir_resolve_const(ira, lazy_slice_type->sentinel, LazyOk) == nullptr)
20966 return ira->codegen->invalid_instruction;
22017 return ira->codegen->invalid_inst_gen;
2096722018 }
2096822019
2096922020 lazy_slice_type->elem_type = slice_type_instruction->child_type->child;
2097022021 if (ir_resolve_type_lazy(ira, lazy_slice_type->elem_type) == nullptr)
20971 return ira->codegen->invalid_instruction;
22022 return ira->codegen->invalid_inst_gen;
2097222023
2097322024 lazy_slice_type->is_const = slice_type_instruction->is_const;
2097422025 lazy_slice_type->is_volatile = slice_type_instruction->is_volatile;
......@@ -20977,31 +22028,31 @@ static IrInstruction *ir_analyze_instruction_slice_type(IrAnalyze *ira,
2097722028 return result;
2097822029}
2097922030
20980static IrInstruction *ir_analyze_instruction_asm(IrAnalyze *ira, IrInstructionAsmSrc *asm_instruction) {
22031static IrInstGen *ir_analyze_instruction_asm(IrAnalyze *ira, IrInstSrcAsm *asm_instruction) {
2098122032 Error err;
2098222033
20983 assert(asm_instruction->base.source_node->type == NodeTypeAsmExpr);
22034 assert(asm_instruction->base.base.source_node->type == NodeTypeAsmExpr);
2098422035
20985 AstNode *node = asm_instruction->base.source_node;
20986 AstNodeAsmExpr *asm_expr = &asm_instruction->base.source_node->data.asm_expr;
22036 AstNode *node = asm_instruction->base.base.source_node;
22037 AstNodeAsmExpr *asm_expr = &asm_instruction->base.base.source_node->data.asm_expr;
2098722038
2098822039 Buf *template_buf = ir_resolve_str(ira, asm_instruction->asm_template->child);
2098922040 if (template_buf == nullptr)
20990 return ira->codegen->invalid_instruction;
22041 return ira->codegen->invalid_inst_gen;
2099122042
2099222043 if (asm_instruction->is_global) {
2099322044 buf_append_char(&ira->codegen->global_asm, '\n');
2099422045 buf_append_buf(&ira->codegen->global_asm, template_buf);
2099522046
20996 return ir_const_void(ira, &asm_instruction->base);
22047 return ir_const_void(ira, &asm_instruction->base.base);
2099722048 }
2099822049
20999 if (!ir_emit_global_runtime_side_effect(ira, &asm_instruction->base))
21000 return ira->codegen->invalid_instruction;
22050 if (!ir_emit_global_runtime_side_effect(ira, &asm_instruction->base.base))
22051 return ira->codegen->invalid_inst_gen;
2100122052
2100222053 ZigList<AsmToken> tok_list = {};
2100322054 if ((err = parse_asm_template(ira, node, template_buf, &tok_list))) {
21004 return ira->codegen->invalid_instruction;
22055 return ira->codegen->invalid_inst_gen;
2100522056 }
2100622057
2100722058 for (size_t token_i = 0; token_i < tok_list.length; token_i += 1) {
......@@ -21015,15 +22066,15 @@ static IrInstruction *ir_analyze_instruction_asm(IrAnalyze *ira, IrInstructionAs
2101522066 add_node_error(ira->codegen, node,
2101622067 buf_sprintf("could not find '%.*s' in the inputs or outputs",
2101722068 len, ptr));
21018 return ira->codegen->invalid_instruction;
22069 return ira->codegen->invalid_inst_gen;
2101922070 }
2102022071 }
2102122072 }
2102222073
2102322074 // TODO validate the output types and variable types
2102422075
21025 IrInstruction **input_list = allocate<IrInstruction *>(asm_expr->input_list.length);
21026 IrInstruction **output_types = allocate<IrInstruction *>(asm_expr->output_list.length);
22076 IrInstGen **input_list = allocate<IrInstGen *>(asm_expr->input_list.length);
22077 IrInstGen **output_types = allocate<IrInstGen *>(asm_expr->output_list.length);
2102722078
2102822079 ZigType *return_type = ira->codegen->builtin_types.entry_void;
2102922080 for (size_t i = 0; i < asm_expr->output_list.length; i += 1) {
......@@ -21032,39 +22083,34 @@ static IrInstruction *ir_analyze_instruction_asm(IrAnalyze *ira, IrInstructionAs
2103222083 output_types[i] = asm_instruction->output_types[i]->child;
2103322084 return_type = ir_resolve_type(ira, output_types[i]);
2103422085 if (type_is_invalid(return_type))
21035 return ira->codegen->invalid_instruction;
22086 return ira->codegen->invalid_inst_gen;
2103622087 }
2103722088 }
2103822089
2103922090 for (size_t i = 0; i < asm_expr->input_list.length; i += 1) {
21040 IrInstruction *const input_value = asm_instruction->input_list[i]->child;
22091 IrInstGen *const input_value = asm_instruction->input_list[i]->child;
2104122092 if (type_is_invalid(input_value->value->type))
21042 return ira->codegen->invalid_instruction;
22093 return ira->codegen->invalid_inst_gen;
2104322094
2104422095 if (instr_is_comptime(input_value) &&
2104522096 (input_value->value->type->id == ZigTypeIdComptimeInt ||
2104622097 input_value->value->type->id == ZigTypeIdComptimeFloat)) {
21047 ir_add_error_node(ira, input_value->source_node,
22098 ir_add_error(ira, &input_value->base,
2104822099 buf_sprintf("expected sized integer or sized float, found %s", buf_ptr(&input_value->value->type->name)));
21049 return ira->codegen->invalid_instruction;
22100 return ira->codegen->invalid_inst_gen;
2105022101 }
2105122102
2105222103 input_list[i] = input_value;
2105322104 }
2105422105
21055 IrInstruction *result = ir_build_asm_gen(ira,
21056 asm_instruction->base.scope, asm_instruction->base.source_node,
22106 return ir_build_asm_gen(ira, &asm_instruction->base.base,
2105722107 template_buf, tok_list.items, tok_list.length,
2105822108 input_list, output_types, asm_instruction->output_vars, asm_instruction->return_count,
21059 asm_instruction->has_side_effects);
21060 result->value->type = return_type;
21061 return result;
22109 asm_instruction->has_side_effects, return_type);
2106222110}
2106322111
21064static IrInstruction *ir_analyze_instruction_array_type(IrAnalyze *ira,
21065 IrInstructionArrayType *array_type_instruction)
21066{
21067 IrInstruction *result = ir_const(ira, &array_type_instruction->base, ira->codegen->builtin_types.entry_type);
22112static IrInstGen *ir_analyze_instruction_array_type(IrAnalyze *ira, IrInstSrcArrayType *array_type_instruction) {
22113 IrInstGen *result = ir_const(ira, &array_type_instruction->base.base, ira->codegen->builtin_types.entry_type);
2106822114 result->value->special = ConstValSpecialLazy;
2106922115
2107022116 LazyValueArrayType *lazy_array_type = allocate<LazyValueArrayType>(1, "LazyValueArrayType");
......@@ -21074,22 +22120,22 @@ static IrInstruction *ir_analyze_instruction_array_type(IrAnalyze *ira,
2107422120
2107522121 lazy_array_type->elem_type = array_type_instruction->child_type->child;
2107622122 if (ir_resolve_type_lazy(ira, lazy_array_type->elem_type) == nullptr)
21077 return ira->codegen->invalid_instruction;
22123 return ira->codegen->invalid_inst_gen;
2107822124
2107922125 if (!ir_resolve_usize(ira, array_type_instruction->size->child, &lazy_array_type->length))
21080 return ira->codegen->invalid_instruction;
22126 return ira->codegen->invalid_inst_gen;
2108122127
2108222128 if (array_type_instruction->sentinel != nullptr) {
2108322129 lazy_array_type->sentinel = array_type_instruction->sentinel->child;
2108422130 if (ir_resolve_const(ira, lazy_array_type->sentinel, LazyOk) == nullptr)
21085 return ira->codegen->invalid_instruction;
22131 return ira->codegen->invalid_inst_gen;
2108622132 }
2108722133
2108822134 return result;
2108922135}
2109022136
21091static IrInstruction *ir_analyze_instruction_size_of(IrAnalyze *ira, IrInstructionSizeOf *instruction) {
21092 IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_num_lit_int);
22137static IrInstGen *ir_analyze_instruction_size_of(IrAnalyze *ira, IrInstSrcSizeOf *instruction) {
22138 IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_num_lit_int);
2109322139 result->value->special = ConstValSpecialLazy;
2109422140
2109522141 LazyValueSizeOf *lazy_size_of = allocate<LazyValueSizeOf>(1, "LazyValueSizeOf");
......@@ -21100,19 +22146,19 @@ static IrInstruction *ir_analyze_instruction_size_of(IrAnalyze *ira, IrInstructi
2110022146
2110122147 lazy_size_of->target_type = instruction->type_value->child;
2110222148 if (ir_resolve_type_lazy(ira, lazy_size_of->target_type) == nullptr)
21103 return ira->codegen->invalid_instruction;
22149 return ira->codegen->invalid_inst_gen;
2110422150
2110522151 return result;
2110622152}
2110722153
21108static IrInstruction *ir_analyze_test_non_null(IrAnalyze *ira, IrInstruction *source_inst, IrInstruction *value) {
22154static IrInstGen *ir_analyze_test_non_null(IrAnalyze *ira, IrInst *source_inst, IrInstGen *value) {
2110922155 ZigType *type_entry = value->value->type;
2111022156
2111122157 if (type_entry->id == ZigTypeIdPointer && type_entry->data.pointer.allow_zero) {
2111222158 if (instr_is_comptime(value)) {
2111322159 ZigValue *c_ptr_val = ir_resolve_const(ira, value, UndefOk);
2111422160 if (c_ptr_val == nullptr)
21115 return ira->codegen->invalid_instruction;
22161 return ira->codegen->invalid_inst_gen;
2111622162 if (c_ptr_val->special == ConstValSpecialUndef)
2111722163 return ir_const_undef(ira, source_inst, ira->codegen->builtin_types.entry_bool);
2111822164 bool is_null = c_ptr_val->data.x_ptr.special == ConstPtrSpecialNull ||
......@@ -21121,25 +22167,19 @@ static IrInstruction *ir_analyze_test_non_null(IrAnalyze *ira, IrInstruction *so
2112122167 return ir_const_bool(ira, source_inst, !is_null);
2112222168 }
2112322169
21124 IrInstruction *result = ir_build_test_nonnull(&ira->new_irb,
21125 source_inst->scope, source_inst->source_node, value);
21126 result->value->type = ira->codegen->builtin_types.entry_bool;
21127 return result;
22170 return ir_build_test_non_null_gen(ira, source_inst, value);
2112822171 } else if (type_entry->id == ZigTypeIdOptional) {
2112922172 if (instr_is_comptime(value)) {
2113022173 ZigValue *maybe_val = ir_resolve_const(ira, value, UndefOk);
2113122174 if (maybe_val == nullptr)
21132 return ira->codegen->invalid_instruction;
22175 return ira->codegen->invalid_inst_gen;
2113322176 if (maybe_val->special == ConstValSpecialUndef)
2113422177 return ir_const_undef(ira, source_inst, ira->codegen->builtin_types.entry_bool);
2113522178
2113622179 return ir_const_bool(ira, source_inst, !optional_value_is_null(maybe_val));
2113722180 }
2113822181
21139 IrInstruction *result = ir_build_test_nonnull(&ira->new_irb,
21140 source_inst->scope, source_inst->source_node, value);
21141 result->value->type = ira->codegen->builtin_types.entry_bool;
21142 return result;
22182 return ir_build_test_non_null_gen(ira, source_inst, value);
2114322183 } else if (type_entry->id == ZigTypeIdNull) {
2114422184 return ir_const_bool(ira, source_inst, false);
2114522185 } else {
......@@ -21147,51 +22187,53 @@ static IrInstruction *ir_analyze_test_non_null(IrAnalyze *ira, IrInstruction *so
2114722187 }
2114822188}
2114922189
21150static IrInstruction *ir_analyze_instruction_test_non_null(IrAnalyze *ira, IrInstructionTestNonNull *instruction) {
21151 IrInstruction *value = instruction->value->child;
22190static IrInstGen *ir_analyze_instruction_test_non_null(IrAnalyze *ira, IrInstSrcTestNonNull *instruction) {
22191 IrInstGen *value = instruction->value->child;
2115222192 if (type_is_invalid(value->value->type))
21153 return ira->codegen->invalid_instruction;
22193 return ira->codegen->invalid_inst_gen;
2115422194
21155 return ir_analyze_test_non_null(ira, &instruction->base, value);
22195 return ir_analyze_test_non_null(ira, &instruction->base.base, value);
2115622196}
2115722197
21158static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstruction *source_instr,
21159 IrInstruction *base_ptr, bool safety_check_on, bool initializing)
22198static IrInstGen *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInst* source_instr,
22199 IrInstGen *base_ptr, bool safety_check_on, bool initializing)
2116022200{
22201 Error err;
22202
2116122203 ZigType *type_entry = get_ptr_elem_type(ira->codegen, base_ptr);
2116222204 if (type_is_invalid(type_entry))
21163 return ira->codegen->invalid_instruction;
22205 return ira->codegen->invalid_inst_gen;
2116422206
2116522207 if (type_entry->id == ZigTypeIdPointer && type_entry->data.pointer.ptr_len == PtrLenC) {
2116622208 if (instr_is_comptime(base_ptr)) {
2116722209 ZigValue *val = ir_resolve_const(ira, base_ptr, UndefBad);
2116822210 if (!val)
21169 return ira->codegen->invalid_instruction;
22211 return ira->codegen->invalid_inst_gen;
2117022212 if (val->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
2117122213 ZigValue *c_ptr_val = const_ptr_pointee(ira, ira->codegen, val, source_instr->source_node);
2117222214 if (c_ptr_val == nullptr)
21173 return ira->codegen->invalid_instruction;
22215 return ira->codegen->invalid_inst_gen;
2117422216 bool is_null = c_ptr_val->data.x_ptr.special == ConstPtrSpecialNull ||
2117522217 (c_ptr_val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr &&
2117622218 c_ptr_val->data.x_ptr.data.hard_coded_addr.addr == 0);
2117722219 if (is_null) {
2117822220 ir_add_error(ira, source_instr, buf_sprintf("unable to unwrap null"));
21179 return ira->codegen->invalid_instruction;
22221 return ira->codegen->invalid_inst_gen;
2118022222 }
2118122223 return base_ptr;
2118222224 }
2118322225 }
2118422226 if (!safety_check_on)
2118522227 return base_ptr;
21186 IrInstruction *c_ptr_val = ir_get_deref(ira, source_instr, base_ptr, nullptr);
22228 IrInstGen *c_ptr_val = ir_get_deref(ira, source_instr, base_ptr, nullptr);
2118722229 ir_build_assert_non_null(ira, source_instr, c_ptr_val);
2118822230 return base_ptr;
2118922231 }
2119022232
2119122233 if (type_entry->id != ZigTypeIdOptional) {
21192 ir_add_error_node(ira, base_ptr->source_node,
22234 ir_add_error(ira, &base_ptr->base,
2119322235 buf_sprintf("expected optional type, found '%s'", buf_ptr(&type_entry->name)));
21194 return ira->codegen->invalid_instruction;
22236 return ira->codegen->invalid_inst_gen;
2119522237 }
2119622238
2119722239 ZigType *child_type = type_entry->data.maybe.child_type;
......@@ -21203,17 +22245,17 @@ static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstr
2120322245
2120422246 if (instr_is_comptime(base_ptr)) {
2120522247 ZigValue *ptr_val = ir_resolve_const(ira, base_ptr, UndefBad);
21206 if (!ptr_val)
21207 return ira->codegen->invalid_instruction;
22248 if (ptr_val == nullptr)
22249 return ira->codegen->invalid_inst_gen;
2120822250 if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
2120922251 ZigValue *optional_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);
2121022252 if (optional_val == nullptr)
21211 return ira->codegen->invalid_instruction;
22253 return ira->codegen->invalid_inst_gen;
2121222254
2121322255 if (initializing) {
2121422256 switch (type_has_one_possible_value(ira->codegen, child_type)) {
2121522257 case OnePossibleValueInvalid:
21216 return ira->codegen->invalid_instruction;
22258 return ira->codegen->invalid_inst_gen;
2121722259 case OnePossibleValueNo:
2121822260 if (!same_comptime_repr) {
2121922261 ZigValue *payload_val = create_const_vals(1);
......@@ -21227,27 +22269,25 @@ static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstr
2122722269 }
2122822270 break;
2122922271 case OnePossibleValueYes: {
21230 ZigValue *pointee = create_const_vals(1);
21231 pointee->special = ConstValSpecialStatic;
21232 pointee->type = child_type;
21233 pointee->parent.id = ConstParentIdOptionalPayload;
21234 pointee->parent.data.p_optional_payload.optional_val = optional_val;
21235
2123622272 optional_val->special = ConstValSpecialStatic;
21237 optional_val->data.x_optional = pointee;
22273 optional_val->data.x_optional = get_the_one_possible_value(ira->codegen, child_type);
2123822274 break;
2123922275 }
2124022276 }
21241 } else if (optional_value_is_null(optional_val)) {
21242 ir_add_error(ira, source_instr, buf_sprintf("unable to unwrap null"));
21243 return ira->codegen->invalid_instruction;
22277 } else {
22278 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec,
22279 source_instr->source_node, optional_val, UndefBad)))
22280 return ira->codegen->invalid_inst_gen;
22281 if (optional_value_is_null(optional_val)) {
22282 ir_add_error(ira, source_instr, buf_sprintf("unable to unwrap null"));
22283 return ira->codegen->invalid_inst_gen;
22284 }
2124422285 }
2124522286
21246 IrInstruction *result;
22287 IrInstGen *result;
2124722288 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
21248 result = ir_build_optional_unwrap_ptr(&ira->new_irb, source_instr->scope,
21249 source_instr->source_node, base_ptr, false, initializing);
21250 result->value->type = result_type;
22289 result = ir_build_optional_unwrap_ptr_gen(ira, source_instr, base_ptr, false,
22290 initializing, result_type);
2125122291 result->value->special = ConstValSpecialStatic;
2125222292 } else {
2125322293 result = ir_const(ira, source_instr, result_type);
......@@ -21257,7 +22297,7 @@ static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstr
2125722297 result_val->data.x_ptr.mut = ptr_val->data.x_ptr.mut;
2125822298 switch (type_has_one_possible_value(ira->codegen, child_type)) {
2125922299 case OnePossibleValueInvalid:
21260 return ira->codegen->invalid_instruction;
22300 return ira->codegen->invalid_inst_gen;
2126122301 case OnePossibleValueNo:
2126222302 if (same_comptime_repr) {
2126322303 result_val->data.x_ptr.data.ref.pointee = optional_val;
......@@ -21275,131 +22315,120 @@ static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstr
2127522315 }
2127622316 }
2127722317
21278 IrInstruction *result = ir_build_optional_unwrap_ptr(&ira->new_irb, source_instr->scope,
21279 source_instr->source_node, base_ptr, safety_check_on, initializing);
21280 result->value->type = result_type;
21281 return result;
22318 return ir_build_optional_unwrap_ptr_gen(ira, source_instr, base_ptr, safety_check_on,
22319 initializing, result_type);
2128222320}
2128322321
21284static IrInstruction *ir_analyze_instruction_optional_unwrap_ptr(IrAnalyze *ira,
21285 IrInstructionOptionalUnwrapPtr *instruction)
22322static IrInstGen *ir_analyze_instruction_optional_unwrap_ptr(IrAnalyze *ira,
22323 IrInstSrcOptionalUnwrapPtr *instruction)
2128622324{
21287 IrInstruction *base_ptr = instruction->base_ptr->child;
22325 IrInstGen *base_ptr = instruction->base_ptr->child;
2128822326 if (type_is_invalid(base_ptr->value->type))
21289 return ira->codegen->invalid_instruction;
22327 return ira->codegen->invalid_inst_gen;
2129022328
21291 return ir_analyze_unwrap_optional_payload(ira, &instruction->base, base_ptr,
22329 return ir_analyze_unwrap_optional_payload(ira, &instruction->base.base, base_ptr,
2129222330 instruction->safety_check_on, false);
2129322331}
2129422332
21295static IrInstruction *ir_analyze_instruction_ctz(IrAnalyze *ira, IrInstructionCtz *instruction) {
22333static IrInstGen *ir_analyze_instruction_ctz(IrAnalyze *ira, IrInstSrcCtz *instruction) {
2129622334 ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
2129722335 if (type_is_invalid(int_type))
21298 return ira->codegen->invalid_instruction;
22336 return ira->codegen->invalid_inst_gen;
2129922337
21300 IrInstruction *op = ir_implicit_cast(ira, instruction->op->child, int_type);
22338 IrInstGen *op = ir_implicit_cast(ira, instruction->op->child, int_type);
2130122339 if (type_is_invalid(op->value->type))
21302 return ira->codegen->invalid_instruction;
22340 return ira->codegen->invalid_inst_gen;
2130322341
2130422342 if (int_type->data.integral.bit_count == 0)
21305 return ir_const_unsigned(ira, &instruction->base, 0);
22343 return ir_const_unsigned(ira, &instruction->base.base, 0);
2130622344
2130722345 if (instr_is_comptime(op)) {
2130822346 ZigValue *val = ir_resolve_const(ira, op, UndefOk);
2130922347 if (val == nullptr)
21310 return ira->codegen->invalid_instruction;
22348 return ira->codegen->invalid_inst_gen;
2131122349 if (val->special == ConstValSpecialUndef)
21312 return ir_const_undef(ira, &instruction->base, ira->codegen->builtin_types.entry_num_lit_int);
22350 return ir_const_undef(ira, &instruction->base.base, ira->codegen->builtin_types.entry_num_lit_int);
2131322351 size_t result_usize = bigint_ctz(&op->value->data.x_bigint, int_type->data.integral.bit_count);
21314 return ir_const_unsigned(ira, &instruction->base, result_usize);
22352 return ir_const_unsigned(ira, &instruction->base.base, result_usize);
2131522353 }
2131622354
2131722355 ZigType *return_type = get_smallest_unsigned_int_type(ira->codegen, int_type->data.integral.bit_count);
21318 IrInstruction *result = ir_build_ctz(&ira->new_irb, instruction->base.scope,
21319 instruction->base.source_node, nullptr, op);
21320 result->value->type = return_type;
21321 return result;
22356 return ir_build_ctz_gen(ira, &instruction->base.base, return_type, op);
2132222357}
2132322358
21324static IrInstruction *ir_analyze_instruction_clz(IrAnalyze *ira, IrInstructionClz *instruction) {
22359static IrInstGen *ir_analyze_instruction_clz(IrAnalyze *ira, IrInstSrcClz *instruction) {
2132522360 ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
2132622361 if (type_is_invalid(int_type))
21327 return ira->codegen->invalid_instruction;
22362 return ira->codegen->invalid_inst_gen;
2132822363
21329 IrInstruction *op = ir_implicit_cast(ira, instruction->op->child, int_type);
22364 IrInstGen *op = ir_implicit_cast(ira, instruction->op->child, int_type);
2133022365 if (type_is_invalid(op->value->type))
21331 return ira->codegen->invalid_instruction;
22366 return ira->codegen->invalid_inst_gen;
2133222367
2133322368 if (int_type->data.integral.bit_count == 0)
21334 return ir_const_unsigned(ira, &instruction->base, 0);
22369 return ir_const_unsigned(ira, &instruction->base.base, 0);
2133522370
2133622371 if (instr_is_comptime(op)) {
2133722372 ZigValue *val = ir_resolve_const(ira, op, UndefOk);
2133822373 if (val == nullptr)
21339 return ira->codegen->invalid_instruction;
22374 return ira->codegen->invalid_inst_gen;
2134022375 if (val->special == ConstValSpecialUndef)
21341 return ir_const_undef(ira, &instruction->base, ira->codegen->builtin_types.entry_num_lit_int);
22376 return ir_const_undef(ira, &instruction->base.base, ira->codegen->builtin_types.entry_num_lit_int);
2134222377 size_t result_usize = bigint_clz(&op->value->data.x_bigint, int_type->data.integral.bit_count);
21343 return ir_const_unsigned(ira, &instruction->base, result_usize);
22378 return ir_const_unsigned(ira, &instruction->base.base, result_usize);
2134422379 }
2134522380
2134622381 ZigType *return_type = get_smallest_unsigned_int_type(ira->codegen, int_type->data.integral.bit_count);
21347 IrInstruction *result = ir_build_clz(&ira->new_irb, instruction->base.scope,
21348 instruction->base.source_node, nullptr, op);
21349 result->value->type = return_type;
21350 return result;
22382 return ir_build_clz_gen(ira, &instruction->base.base, return_type, op);
2135122383}
2135222384
21353static IrInstruction *ir_analyze_instruction_pop_count(IrAnalyze *ira, IrInstructionPopCount *instruction) {
22385static IrInstGen *ir_analyze_instruction_pop_count(IrAnalyze *ira, IrInstSrcPopCount *instruction) {
2135422386 ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
2135522387 if (type_is_invalid(int_type))
21356 return ira->codegen->invalid_instruction;
22388 return ira->codegen->invalid_inst_gen;
2135722389
21358 IrInstruction *op = ir_implicit_cast(ira, instruction->op->child, int_type);
22390 IrInstGen *op = ir_implicit_cast(ira, instruction->op->child, int_type);
2135922391 if (type_is_invalid(op->value->type))
21360 return ira->codegen->invalid_instruction;
22392 return ira->codegen->invalid_inst_gen;
2136122393
2136222394 if (int_type->data.integral.bit_count == 0)
21363 return ir_const_unsigned(ira, &instruction->base, 0);
22395 return ir_const_unsigned(ira, &instruction->base.base, 0);
2136422396
2136522397 if (instr_is_comptime(op)) {
2136622398 ZigValue *val = ir_resolve_const(ira, op, UndefOk);
2136722399 if (val == nullptr)
21368 return ira->codegen->invalid_instruction;
22400 return ira->codegen->invalid_inst_gen;
2136922401 if (val->special == ConstValSpecialUndef)
21370 return ir_const_undef(ira, &instruction->base, ira->codegen->builtin_types.entry_num_lit_int);
22402 return ir_const_undef(ira, &instruction->base.base, ira->codegen->builtin_types.entry_num_lit_int);
2137122403
2137222404 if (bigint_cmp_zero(&val->data.x_bigint) != CmpLT) {
2137322405 size_t result = bigint_popcount_unsigned(&val->data.x_bigint);
21374 return ir_const_unsigned(ira, &instruction->base, result);
22406 return ir_const_unsigned(ira, &instruction->base.base, result);
2137522407 }
2137622408 size_t result = bigint_popcount_signed(&val->data.x_bigint, int_type->data.integral.bit_count);
21377 return ir_const_unsigned(ira, &instruction->base, result);
22409 return ir_const_unsigned(ira, &instruction->base.base, result);
2137822410 }
2137922411
2138022412 ZigType *return_type = get_smallest_unsigned_int_type(ira->codegen, int_type->data.integral.bit_count);
21381 IrInstruction *result = ir_build_pop_count(&ira->new_irb, instruction->base.scope,
21382 instruction->base.source_node, nullptr, op);
21383 result->value->type = return_type;
21384 return result;
22413 return ir_build_pop_count_gen(ira, &instruction->base.base, return_type, op);
2138522414}
2138622415
21387static IrInstruction *ir_analyze_union_tag(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value) {
22416static IrInstGen *ir_analyze_union_tag(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value, bool is_gen) {
2138822417 if (type_is_invalid(value->value->type))
21389 return ira->codegen->invalid_instruction;
22418 return ira->codegen->invalid_inst_gen;
2139022419
2139122420 if (value->value->type->id != ZigTypeIdUnion) {
21392 ir_add_error(ira, value,
22421 ir_add_error(ira, &value->base,
2139322422 buf_sprintf("expected enum or union type, found '%s'", buf_ptr(&value->value->type->name)));
21394 return ira->codegen->invalid_instruction;
22423 return ira->codegen->invalid_inst_gen;
2139522424 }
21396 if (!value->value->type->data.unionation.have_explicit_tag_type && !source_instr->is_gen) {
22425 if (!value->value->type->data.unionation.have_explicit_tag_type && !is_gen) {
2139722426 ErrorMsg *msg = ir_add_error(ira, source_instr, buf_sprintf("union has no associated enum"));
2139822427 if (value->value->type->data.unionation.decl_node != nullptr) {
2139922428 add_error_note(ira->codegen, msg, value->value->type->data.unionation.decl_node,
2140022429 buf_sprintf("declared here"));
2140122430 }
21402 return ira->codegen->invalid_instruction;
22431 return ira->codegen->invalid_inst_gen;
2140322432 }
2140422433
2140522434 ZigType *tag_type = value->value->type->data.unionation.tag_type;
......@@ -21408,9 +22437,9 @@ static IrInstruction *ir_analyze_union_tag(IrAnalyze *ira, IrInstruction *source
2140822437 if (instr_is_comptime(value)) {
2140922438 ZigValue *val = ir_resolve_const(ira, value, UndefBad);
2141022439 if (!val)
21411 return ira->codegen->invalid_instruction;
22440 return ira->codegen->invalid_inst_gen;
2141222441
21413 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
22442 IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
2141422443 source_instr->scope, source_instr->source_node);
2141522444 const_instruction->base.value->type = tag_type;
2141622445 const_instruction->base.value->special = ConstValSpecialStatic;
......@@ -21418,15 +22447,13 @@ static IrInstruction *ir_analyze_union_tag(IrAnalyze *ira, IrInstruction *source
2141822447 return &const_instruction->base;
2141922448 }
2142022449
21421 IrInstruction *result = ir_build_union_tag(&ira->new_irb, source_instr->scope, source_instr->source_node, value);
21422 result->value->type = tag_type;
21423 return result;
22450 return ir_build_union_tag(ira, source_instr, value, tag_type);
2142422451}
2142522452
21426static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,
21427 IrInstructionSwitchBr *switch_br_instruction)
22453static IrInstGen *ir_analyze_instruction_switch_br(IrAnalyze *ira,
22454 IrInstSrcSwitchBr *switch_br_instruction)
2142822455{
21429 IrInstruction *target_value = switch_br_instruction->target_value->child;
22456 IrInstGen *target_value = switch_br_instruction->target_value->child;
2143022457 if (type_is_invalid(target_value->value->type))
2143122458 return ir_unreach_error(ira);
2143222459
......@@ -21441,21 +22468,21 @@ static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,
2144122468
2144222469 bool is_comptime;
2144322470 if (!ir_resolve_comptime(ira, switch_br_instruction->is_comptime->child, &is_comptime))
21444 return ira->codegen->invalid_instruction;
22471 return ira->codegen->invalid_inst_gen;
2144522472
2144622473 if (is_comptime || instr_is_comptime(target_value)) {
2144722474 ZigValue *target_val = ir_resolve_const(ira, target_value, UndefBad);
2144822475 if (!target_val)
2144922476 return ir_unreach_error(ira);
2145022477
21451 IrBasicBlock *old_dest_block = switch_br_instruction->else_block;
22478 IrBasicBlockSrc *old_dest_block = switch_br_instruction->else_block;
2145222479 for (size_t i = 0; i < case_count; i += 1) {
21453 IrInstructionSwitchBrCase *old_case = &switch_br_instruction->cases[i];
21454 IrInstruction *case_value = old_case->value->child;
22480 IrInstSrcSwitchBrCase *old_case = &switch_br_instruction->cases[i];
22481 IrInstGen *case_value = old_case->value->child;
2145522482 if (type_is_invalid(case_value->value->type))
2145622483 return ir_unreach_error(ira);
2145722484
21458 IrInstruction *casted_case_value = ir_implicit_cast(ira, case_value, target_value->value->type);
22485 IrInstGen *casted_case_value = ir_implicit_cast(ira, case_value, target_value->value->type);
2145922486 if (type_is_invalid(casted_case_value->value->type))
2146022487 return ir_unreach_error(ira);
2146122488
......@@ -21470,23 +22497,20 @@ static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,
2147022497 }
2147122498
2147222499 if (is_comptime || old_dest_block->ref_count == 1) {
21473 return ir_inline_bb(ira, &switch_br_instruction->base, old_dest_block);
22500 return ir_inline_bb(ira, &switch_br_instruction->base.base, old_dest_block);
2147422501 } else {
21475 IrBasicBlock *new_dest_block = ir_get_new_bb(ira, old_dest_block, &switch_br_instruction->base);
21476 IrInstruction *result = ir_build_br(&ira->new_irb,
21477 switch_br_instruction->base.scope, switch_br_instruction->base.source_node,
21478 new_dest_block, nullptr);
21479 result->value->type = ira->codegen->builtin_types.entry_unreachable;
22502 IrBasicBlockGen *new_dest_block = ir_get_new_bb(ira, old_dest_block, &switch_br_instruction->base.base);
22503 IrInstGen *result = ir_build_br_gen(ira, &switch_br_instruction->base.base, new_dest_block);
2148022504 return ir_finish_anal(ira, result);
2148122505 }
2148222506 }
2148322507
21484 IrInstructionSwitchBrCase *cases = allocate<IrInstructionSwitchBrCase>(case_count);
22508 IrInstGenSwitchBrCase *cases = allocate<IrInstGenSwitchBrCase>(case_count);
2148522509 for (size_t i = 0; i < case_count; i += 1) {
21486 IrInstructionSwitchBrCase *old_case = &switch_br_instruction->cases[i];
21487 IrInstructionSwitchBrCase *new_case = &cases[i];
21488 new_case->block = ir_get_new_bb(ira, old_case->block, &switch_br_instruction->base);
21489 new_case->value = ira->codegen->invalid_instruction;
22510 IrInstSrcSwitchBrCase *old_case = &switch_br_instruction->cases[i];
22511 IrInstGenSwitchBrCase *new_case = &cases[i];
22512 new_case->block = ir_get_new_bb(ira, old_case->block, &switch_br_instruction->base.base);
22513 new_case->value = ira->codegen->invalid_inst_gen;
2149022514
2149122515 // Calling ir_get_new_bb set the ref_instruction on the new basic block.
2149222516 // However a switch br may branch to the same basic block which would trigger an
......@@ -21494,12 +22518,12 @@ static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,
2149422518 // it back after the loop.
2149522519 new_case->block->ref_instruction = nullptr;
2149622520
21497 IrInstruction *old_value = old_case->value;
21498 IrInstruction *new_value = old_value->child;
22521 IrInstSrc *old_value = old_case->value;
22522 IrInstGen *new_value = old_value->child;
2149922523 if (type_is_invalid(new_value->value->type))
2150022524 continue;
2150122525
21502 IrInstruction *casted_new_value = ir_implicit_cast(ira, new_value, target_value->value->type);
22526 IrInstGen *casted_new_value = ir_implicit_cast(ira, new_value, target_value->value->type);
2150322527 if (type_is_invalid(casted_new_value->value->type))
2150422528 continue;
2150522529
......@@ -21510,47 +22534,45 @@ static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,
2151022534 }
2151122535
2151222536 for (size_t i = 0; i < case_count; i += 1) {
21513 IrInstructionSwitchBrCase *new_case = &cases[i];
21514 if (new_case->value == ira->codegen->invalid_instruction)
22537 IrInstGenSwitchBrCase *new_case = &cases[i];
22538 if (type_is_invalid(new_case->value->value->type))
2151522539 return ir_unreach_error(ira);
21516 new_case->block->ref_instruction = &switch_br_instruction->base;
22540 new_case->block->ref_instruction = &switch_br_instruction->base.base;
2151722541 }
2151822542
21519 IrBasicBlock *new_else_block = ir_get_new_bb(ira, switch_br_instruction->else_block, &switch_br_instruction->base);
21520 IrInstructionSwitchBr *switch_br = ir_build_switch_br(&ira->new_irb,
21521 switch_br_instruction->base.scope, switch_br_instruction->base.source_node,
21522 target_value, new_else_block, case_count, cases, nullptr, nullptr);
21523 switch_br->base.value->type = ira->codegen->builtin_types.entry_unreachable;
22543 IrBasicBlockGen *new_else_block = ir_get_new_bb(ira, switch_br_instruction->else_block, &switch_br_instruction->base.base);
22544 IrInstGenSwitchBr *switch_br = ir_build_switch_br_gen(ira, &switch_br_instruction->base.base,
22545 target_value, new_else_block, case_count, cases);
2152422546 return ir_finish_anal(ira, &switch_br->base);
2152522547}
2152622548
21527static IrInstruction *ir_analyze_instruction_switch_target(IrAnalyze *ira,
21528 IrInstructionSwitchTarget *switch_target_instruction)
22549static IrInstGen *ir_analyze_instruction_switch_target(IrAnalyze *ira,
22550 IrInstSrcSwitchTarget *switch_target_instruction)
2152922551{
2153022552 Error err;
21531 IrInstruction *target_value_ptr = switch_target_instruction->target_value_ptr->child;
22553 IrInstGen *target_value_ptr = switch_target_instruction->target_value_ptr->child;
2153222554 if (type_is_invalid(target_value_ptr->value->type))
21533 return ira->codegen->invalid_instruction;
22555 return ira->codegen->invalid_inst_gen;
2153422556
2153522557 if (target_value_ptr->value->type->id == ZigTypeIdMetaType) {
2153622558 assert(instr_is_comptime(target_value_ptr));
2153722559 ZigType *ptr_type = target_value_ptr->value->data.x_type;
2153822560 assert(ptr_type->id == ZigTypeIdPointer);
21539 return ir_const_type(ira, &switch_target_instruction->base, ptr_type->data.pointer.child_type);
22561 return ir_const_type(ira, &switch_target_instruction->base.base, ptr_type->data.pointer.child_type);
2154022562 }
2154122563
2154222564 ZigType *target_type = target_value_ptr->value->type->data.pointer.child_type;
2154322565 ZigValue *pointee_val = nullptr;
2154422566 if (instr_is_comptime(target_value_ptr) && target_value_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
21545 pointee_val = const_ptr_pointee(ira, ira->codegen, target_value_ptr->value, target_value_ptr->source_node);
22567 pointee_val = const_ptr_pointee(ira, ira->codegen, target_value_ptr->value, target_value_ptr->base.source_node);
2154622568 if (pointee_val == nullptr)
21547 return ira->codegen->invalid_instruction;
22569 return ira->codegen->invalid_inst_gen;
2154822570
2154922571 if (pointee_val->special == ConstValSpecialRuntime)
2155022572 pointee_val = nullptr;
2155122573 }
2155222574 if ((err = type_resolve(ira->codegen, target_type, ResolveStatusSizeKnown)))
21553 return ira->codegen->invalid_instruction;
22575 return ira->codegen->invalid_inst_gen;
2155422576
2155522577 switch (target_type->id) {
2155622578 case ZigTypeIdInvalid:
......@@ -21567,13 +22589,13 @@ static IrInstruction *ir_analyze_instruction_switch_target(IrAnalyze *ira,
2156722589 case ZigTypeIdFn:
2156822590 case ZigTypeIdErrorSet: {
2156922591 if (pointee_val) {
21570 IrInstruction *result = ir_const(ira, &switch_target_instruction->base, nullptr);
22592 IrInstGen *result = ir_const(ira, &switch_target_instruction->base.base, nullptr);
2157122593 copy_const_val(result->value, pointee_val);
2157222594 result->value->type = target_type;
2157322595 return result;
2157422596 }
2157522597
21576 IrInstruction *result = ir_get_deref(ira, &switch_target_instruction->base, target_value_ptr, nullptr);
22598 IrInstGen *result = ir_get_deref(ira, &switch_target_instruction->base.base, target_value_ptr, nullptr);
2157722599 result->value->type = target_type;
2157822600 return result;
2157922601 }
......@@ -21582,52 +22604,49 @@ static IrInstruction *ir_analyze_instruction_switch_target(IrAnalyze *ira,
2158222604 if (!decl_node->data.container_decl.auto_enum &&
2158322605 decl_node->data.container_decl.init_arg_expr == nullptr)
2158422606 {
21585 ErrorMsg *msg = ir_add_error(ira, target_value_ptr,
22607 ErrorMsg *msg = ir_add_error(ira, &target_value_ptr->base,
2158622608 buf_sprintf("switch on union which has no attached enum"));
2158722609 add_error_note(ira->codegen, msg, decl_node,
2158822610 buf_sprintf("consider 'union(enum)' here"));
21589 return ira->codegen->invalid_instruction;
22611 return ira->codegen->invalid_inst_gen;
2159022612 }
2159122613 ZigType *tag_type = target_type->data.unionation.tag_type;
2159222614 assert(tag_type != nullptr);
2159322615 assert(tag_type->id == ZigTypeIdEnum);
2159422616 if (pointee_val) {
21595 IrInstruction *result = ir_const(ira, &switch_target_instruction->base, tag_type);
22617 IrInstGen *result = ir_const(ira, &switch_target_instruction->base.base, tag_type);
2159622618 bigint_init_bigint(&result->value->data.x_enum_tag, &pointee_val->data.x_union.tag);
2159722619 return result;
2159822620 }
2159922621 if (tag_type->data.enumeration.src_field_count == 1) {
21600 IrInstruction *result = ir_const(ira, &switch_target_instruction->base, tag_type);
22622 IrInstGen *result = ir_const(ira, &switch_target_instruction->base.base, tag_type);
2160122623 TypeEnumField *only_field = &tag_type->data.enumeration.fields[0];
2160222624 bigint_init_bigint(&result->value->data.x_enum_tag, &only_field->value);
2160322625 return result;
2160422626 }
2160522627
21606 IrInstruction *union_value = ir_get_deref(ira, &switch_target_instruction->base, target_value_ptr, nullptr);
22628 IrInstGen *union_value = ir_get_deref(ira, &switch_target_instruction->base.base, target_value_ptr, nullptr);
2160722629 union_value->value->type = target_type;
2160822630
21609 IrInstruction *union_tag_inst = ir_build_union_tag(&ira->new_irb, switch_target_instruction->base.scope,
21610 switch_target_instruction->base.source_node, union_value);
21611 union_tag_inst->value->type = tag_type;
21612 return union_tag_inst;
22631 return ir_build_union_tag(ira, &switch_target_instruction->base.base, union_value, tag_type);
2161322632 }
2161422633 case ZigTypeIdEnum: {
2161522634 if ((err = type_resolve(ira->codegen, target_type, ResolveStatusZeroBitsKnown)))
21616 return ira->codegen->invalid_instruction;
22635 return ira->codegen->invalid_inst_gen;
2161722636 if (target_type->data.enumeration.src_field_count == 1) {
2161822637 TypeEnumField *only_field = &target_type->data.enumeration.fields[0];
21619 IrInstruction *result = ir_const(ira, &switch_target_instruction->base, target_type);
22638 IrInstGen *result = ir_const(ira, &switch_target_instruction->base.base, target_type);
2162022639 bigint_init_bigint(&result->value->data.x_enum_tag, &only_field->value);
2162122640 return result;
2162222641 }
2162322642
2162422643 if (pointee_val) {
21625 IrInstruction *result = ir_const(ira, &switch_target_instruction->base, target_type);
22644 IrInstGen *result = ir_const(ira, &switch_target_instruction->base.base, target_type);
2162622645 bigint_init_bigint(&result->value->data.x_enum_tag, &pointee_val->data.x_enum_tag);
2162722646 return result;
2162822647 }
2162922648
21630 IrInstruction *enum_value = ir_get_deref(ira, &switch_target_instruction->base, target_value_ptr, nullptr);
22649 IrInstGen *enum_value = ir_get_deref(ira, &switch_target_instruction->base.base, target_value_ptr, nullptr);
2163122650 enum_value->value->type = target_type;
2163222651 return enum_value;
2163322652 }
......@@ -21643,17 +22662,17 @@ static IrInstruction *ir_analyze_instruction_switch_target(IrAnalyze *ira,
2164322662 case ZigTypeIdVector:
2164422663 case ZigTypeIdFnFrame:
2164522664 case ZigTypeIdAnyFrame:
21646 ir_add_error(ira, &switch_target_instruction->base,
22665 ir_add_error(ira, &switch_target_instruction->base.base,
2164722666 buf_sprintf("invalid switch target type '%s'", buf_ptr(&target_type->name)));
21648 return ira->codegen->invalid_instruction;
22667 return ira->codegen->invalid_inst_gen;
2164922668 }
2165022669 zig_unreachable();
2165122670}
2165222671
21653static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstructionSwitchVar *instruction) {
21654 IrInstruction *target_value_ptr = instruction->target_value_ptr->child;
22672static IrInstGen *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstSrcSwitchVar *instruction) {
22673 IrInstGen *target_value_ptr = instruction->target_value_ptr->child;
2165522674 if (type_is_invalid(target_value_ptr->value->type))
21656 return ira->codegen->invalid_instruction;
22675 return ira->codegen->invalid_inst_gen;
2165722676
2165822677 ZigType *ref_type = target_value_ptr->value->type;
2165922678 assert(ref_type->id == ZigTypeIdPointer);
......@@ -21664,62 +22683,62 @@ static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstru
2166422683 assert(enum_type->id == ZigTypeIdEnum);
2166522684 assert(instruction->prongs_len > 0);
2166622685
21667 IrInstruction *first_prong_value = instruction->prongs_ptr[0]->child;
22686 IrInstGen *first_prong_value = instruction->prongs_ptr[0]->child;
2166822687 if (type_is_invalid(first_prong_value->value->type))
21669 return ira->codegen->invalid_instruction;
22688 return ira->codegen->invalid_inst_gen;
2167022689
21671 IrInstruction *first_casted_prong_value = ir_implicit_cast(ira, first_prong_value, enum_type);
22690 IrInstGen *first_casted_prong_value = ir_implicit_cast(ira, first_prong_value, enum_type);
2167222691 if (type_is_invalid(first_casted_prong_value->value->type))
21673 return ira->codegen->invalid_instruction;
22692 return ira->codegen->invalid_inst_gen;
2167422693
2167522694 ZigValue *first_prong_val = ir_resolve_const(ira, first_casted_prong_value, UndefBad);
2167622695 if (first_prong_val == nullptr)
21677 return ira->codegen->invalid_instruction;
22696 return ira->codegen->invalid_inst_gen;
2167822697
2167922698 TypeUnionField *first_field = find_union_field_by_tag(target_type, &first_prong_val->data.x_enum_tag);
2168022699
2168122700 ErrorMsg *invalid_payload_msg = nullptr;
2168222701 for (size_t prong_i = 1; prong_i < instruction->prongs_len; prong_i += 1) {
21683 IrInstruction *this_prong_inst = instruction->prongs_ptr[prong_i]->child;
22702 IrInstGen *this_prong_inst = instruction->prongs_ptr[prong_i]->child;
2168422703 if (type_is_invalid(this_prong_inst->value->type))
21685 return ira->codegen->invalid_instruction;
22704 return ira->codegen->invalid_inst_gen;
2168622705
21687 IrInstruction *this_casted_prong_value = ir_implicit_cast(ira, this_prong_inst, enum_type);
22706 IrInstGen *this_casted_prong_value = ir_implicit_cast(ira, this_prong_inst, enum_type);
2168822707 if (type_is_invalid(this_casted_prong_value->value->type))
21689 return ira->codegen->invalid_instruction;
22708 return ira->codegen->invalid_inst_gen;
2169022709
2169122710 ZigValue *this_prong = ir_resolve_const(ira, this_casted_prong_value, UndefBad);
2169222711 if (this_prong == nullptr)
21693 return ira->codegen->invalid_instruction;
22712 return ira->codegen->invalid_inst_gen;
2169422713
2169522714 TypeUnionField *payload_field = find_union_field_by_tag(target_type, &this_prong->data.x_enum_tag);
2169622715 ZigType *payload_type = payload_field->type_entry;
2169722716 if (first_field->type_entry != payload_type) {
2169822717 if (invalid_payload_msg == nullptr) {
21699 invalid_payload_msg = ir_add_error(ira, &instruction->base,
22718 invalid_payload_msg = ir_add_error(ira, &instruction->base.base,
2170022719 buf_sprintf("capture group with incompatible types"));
21701 add_error_note(ira->codegen, invalid_payload_msg, first_prong_value->source_node,
22720 add_error_note(ira->codegen, invalid_payload_msg, first_prong_value->base.source_node,
2170222721 buf_sprintf("type '%s' here", buf_ptr(&first_field->type_entry->name)));
2170322722 }
21704 add_error_note(ira->codegen, invalid_payload_msg, this_prong_inst->source_node,
22723 add_error_note(ira->codegen, invalid_payload_msg, this_prong_inst->base.source_node,
2170522724 buf_sprintf("type '%s' here", buf_ptr(&payload_field->type_entry->name)));
2170622725 }
2170722726 }
2170822727
2170922728 if (invalid_payload_msg != nullptr) {
21710 return ira->codegen->invalid_instruction;
22729 return ira->codegen->invalid_inst_gen;
2171122730 }
2171222731
2171322732 if (instr_is_comptime(target_value_ptr)) {
2171422733 ZigValue *target_val_ptr = ir_resolve_const(ira, target_value_ptr, UndefBad);
2171522734 if (!target_value_ptr)
21716 return ira->codegen->invalid_instruction;
22735 return ira->codegen->invalid_inst_gen;
2171722736
21718 ZigValue *pointee_val = const_ptr_pointee(ira, ira->codegen, target_val_ptr, instruction->base.source_node);
22737 ZigValue *pointee_val = const_ptr_pointee(ira, ira->codegen, target_val_ptr, instruction->base.base.source_node);
2171922738 if (pointee_val == nullptr)
21720 return ira->codegen->invalid_instruction;
22739 return ira->codegen->invalid_inst_gen;
2172122740
21722 IrInstruction *result = ir_const(ira, &instruction->base,
22741 IrInstGen *result = ir_const(ira, &instruction->base.base,
2172322742 get_pointer_to_type(ira->codegen, first_field->type_entry,
2172422743 target_val_ptr->type->data.pointer.is_const));
2172522744 ZigValue *out_val = result->value;
......@@ -21729,11 +22748,10 @@ static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstru
2172922748 return result;
2173022749 }
2173122750
21732 IrInstruction *result = ir_build_union_field_ptr(&ira->new_irb,
21733 instruction->base.scope, instruction->base.source_node, target_value_ptr, first_field, false, false);
21734 result->value->type = get_pointer_to_type(ira->codegen, first_field->type_entry,
22751 ZigType *result_type = get_pointer_to_type(ira->codegen, first_field->type_entry,
2173522752 target_value_ptr->value->type->data.pointer.is_const);
21736 return result;
22753 return ir_build_union_field_ptr(ira, &instruction->base.base, target_value_ptr, first_field,
22754 false, false, result_type);
2173722755 } else if (target_type->id == ZigTypeIdErrorSet) {
2173822756 // construct an error set from the prong values
2173922757 ZigType *err_set_type = new_type_table_entry(ZigTypeIdErrorSet);
......@@ -21746,7 +22764,7 @@ static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstru
2174622764 for (size_t i = 0; i < instruction->prongs_len; i += 1) {
2174722765 ErrorTableEntry *err = ir_resolve_error(ira, instruction->prongs_ptr[i]->child);
2174822766 if (err == nullptr)
21749 return ira->codegen->invalid_instruction;
22767 return ira->codegen->invalid_inst_gen;
2175022768 error_list.append(err);
2175122769 buf_appendf(&err_set_type->name, "%s,", buf_ptr(&err->name));
2175222770 }
......@@ -21762,29 +22780,29 @@ static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstru
2176222780 ref_type->data.pointer.explicit_alignment,
2176322781 ref_type->data.pointer.bit_offset_in_host, ref_type->data.pointer.host_int_bytes,
2176422782 ref_type->data.pointer.allow_zero);
21765 return ir_analyze_ptr_cast(ira, &instruction->base, target_value_ptr, new_target_value_ptr_type,
21766 &instruction->base, false);
22783 return ir_analyze_ptr_cast(ira, &instruction->base.base, target_value_ptr,
22784 &instruction->target_value_ptr->base, new_target_value_ptr_type, &instruction->base.base, false);
2176722785 } else {
21768 ir_add_error(ira, &instruction->base,
22786 ir_add_error(ira, &instruction->base.base,
2176922787 buf_sprintf("switch on type '%s' provides no expression parameter", buf_ptr(&target_type->name)));
21770 return ira->codegen->invalid_instruction;
22788 return ira->codegen->invalid_inst_gen;
2177122789 }
2177222790}
2177322791
21774static IrInstruction *ir_analyze_instruction_switch_else_var(IrAnalyze *ira,
21775 IrInstructionSwitchElseVar *instruction)
22792static IrInstGen *ir_analyze_instruction_switch_else_var(IrAnalyze *ira,
22793 IrInstSrcSwitchElseVar *instruction)
2177622794{
21777 IrInstruction *target_value_ptr = instruction->target_value_ptr->child;
22795 IrInstGen *target_value_ptr = instruction->target_value_ptr->child;
2177822796 if (type_is_invalid(target_value_ptr->value->type))
21779 return ira->codegen->invalid_instruction;
22797 return ira->codegen->invalid_inst_gen;
2178022798
2178122799 ZigType *ref_type = target_value_ptr->value->type;
2178222800 assert(ref_type->id == ZigTypeIdPointer);
2178322801 ZigType *target_type = target_value_ptr->value->type->data.pointer.child_type;
2178422802 if (target_type->id == ZigTypeIdErrorSet) {
2178522803 // make a new set that has the other cases removed
21786 if (!resolve_inferred_error_set(ira->codegen, target_type, instruction->base.source_node)) {
21787 return ira->codegen->invalid_instruction;
22804 if (!resolve_inferred_error_set(ira->codegen, target_type, instruction->base.base.source_node)) {
22805 return ira->codegen->invalid_inst_gen;
2178822806 }
2178922807 if (type_is_global_error_set(target_type)) {
2179022808 // the type of the else capture variable still has to be the global error set.
......@@ -21793,18 +22811,20 @@ static IrInstruction *ir_analyze_instruction_switch_else_var(IrAnalyze *ira,
2179322811 }
2179422812 // Make note of the errors handled by other cases
2179522813 ErrorTableEntry **errors = allocate<ErrorTableEntry *>(ira->codegen->errors_by_index.length);
21796 for (size_t case_i = 0; case_i < instruction->switch_br->case_count; case_i += 1) {
21797 IrInstructionSwitchBrCase *br_case = &instruction->switch_br->cases[case_i];
21798 IrInstruction *case_expr = br_case->value->child;
22814 // We may not have any case in the switch if this is a lone else
22815 const size_t switch_cases = instruction->switch_br ? instruction->switch_br->case_count : 0;
22816 for (size_t case_i = 0; case_i < switch_cases; case_i += 1) {
22817 IrInstSrcSwitchBrCase *br_case = &instruction->switch_br->cases[case_i];
22818 IrInstGen *case_expr = br_case->value->child;
2179922819 if (case_expr->value->type->id == ZigTypeIdErrorSet) {
2180022820 ErrorTableEntry *err = ir_resolve_error(ira, case_expr);
2180122821 if (err == nullptr)
21802 return ira->codegen->invalid_instruction;
22822 return ira->codegen->invalid_inst_gen;
2180322823 errors[err->value] = err;
2180422824 } else if (case_expr->value->type->id == ZigTypeIdMetaType) {
2180522825 ZigType *err_set_type = ir_resolve_type(ira, case_expr);
2180622826 if (type_is_invalid(err_set_type))
21807 return ira->codegen->invalid_instruction;
22827 return ira->codegen->invalid_inst_gen;
2180822828 populate_error_set_table(errors, err_set_type);
2180922829 } else {
2181022830 zig_unreachable();
......@@ -21843,27 +22863,22 @@ static IrInstruction *ir_analyze_instruction_switch_else_var(IrAnalyze *ira,
2184322863 ref_type->data.pointer.explicit_alignment,
2184422864 ref_type->data.pointer.bit_offset_in_host, ref_type->data.pointer.host_int_bytes,
2184522865 ref_type->data.pointer.allow_zero);
21846 return ir_analyze_ptr_cast(ira, &instruction->base, target_value_ptr, new_target_value_ptr_type,
21847 &instruction->base, false);
22866 return ir_analyze_ptr_cast(ira, &instruction->base.base, target_value_ptr,
22867 &instruction->target_value_ptr->base, new_target_value_ptr_type, &instruction->base.base, false);
2184822868 }
2184922869
2185022870 return target_value_ptr;
2185122871}
2185222872
21853static IrInstruction *ir_analyze_instruction_union_tag(IrAnalyze *ira, IrInstructionUnionTag *instruction) {
21854 IrInstruction *value = instruction->value->child;
21855 return ir_analyze_union_tag(ira, &instruction->base, value);
21856}
21857
21858static IrInstruction *ir_analyze_instruction_import(IrAnalyze *ira, IrInstructionImport *import_instruction) {
22873static IrInstGen *ir_analyze_instruction_import(IrAnalyze *ira, IrInstSrcImport *import_instruction) {
2185922874 Error err;
2186022875
21861 IrInstruction *name_value = import_instruction->name->child;
22876 IrInstGen *name_value = import_instruction->name->child;
2186222877 Buf *import_target_str = ir_resolve_str(ira, name_value);
2186322878 if (!import_target_str)
21864 return ira->codegen->invalid_instruction;
22879 return ira->codegen->invalid_inst_gen;
2186522880
21866 AstNode *source_node = import_instruction->base.source_node;
22881 AstNode *source_node = import_instruction->base.base.source_node;
2186722882 ZigType *import = source_node->owner;
2186822883
2186922884 ZigType *target_import;
......@@ -21876,48 +22891,48 @@ static IrInstruction *ir_analyze_instruction_import(IrAnalyze *ira, IrInstructio
2187622891 ir_add_error_node(ira, source_node,
2187722892 buf_sprintf("import of file outside package path: '%s'",
2187822893 buf_ptr(import_target_path)));
21879 return ira->codegen->invalid_instruction;
22894 return ira->codegen->invalid_inst_gen;
2188022895 } else if (err == ErrorFileNotFound) {
2188122896 ir_add_error_node(ira, source_node,
2188222897 buf_sprintf("unable to find '%s'", buf_ptr(import_target_path)));
21883 return ira->codegen->invalid_instruction;
22898 return ira->codegen->invalid_inst_gen;
2188422899 } else {
2188522900 ir_add_error_node(ira, source_node,
2188622901 buf_sprintf("unable to open '%s': %s", buf_ptr(&full_path), err_str(err)));
21887 return ira->codegen->invalid_instruction;
22902 return ira->codegen->invalid_inst_gen;
2188822903 }
2188922904 }
2189022905
21891 return ir_const_type(ira, &import_instruction->base, target_import);
22906 return ir_const_type(ira, &import_instruction->base.base, target_import);
2189222907}
2189322908
21894static IrInstruction *ir_analyze_instruction_ref(IrAnalyze *ira, IrInstructionRef *ref_instruction) {
21895 IrInstruction *value = ref_instruction->value->child;
22909static IrInstGen *ir_analyze_instruction_ref(IrAnalyze *ira, IrInstSrcRef *ref_instruction) {
22910 IrInstGen *value = ref_instruction->value->child;
2189622911 if (type_is_invalid(value->value->type))
21897 return ira->codegen->invalid_instruction;
21898 return ir_get_ref(ira, &ref_instruction->base, value, ref_instruction->is_const, ref_instruction->is_volatile);
22912 return ira->codegen->invalid_inst_gen;
22913 return ir_get_ref(ira, &ref_instruction->base.base, value, ref_instruction->is_const, ref_instruction->is_volatile);
2189922914}
2190022915
21901static IrInstruction *ir_analyze_union_init(IrAnalyze *ira, IrInstruction *source_instruction,
21902 AstNode *field_source_node, ZigType *union_type, Buf *field_name, IrInstruction *field_result_loc,
21903 IrInstruction *result_loc)
22916static IrInstGen *ir_analyze_union_init(IrAnalyze *ira, IrInst* source_instruction,
22917 AstNode *field_source_node, ZigType *union_type, Buf *field_name, IrInstGen *field_result_loc,
22918 IrInstGen *result_loc)
2190422919{
2190522920 Error err;
2190622921 assert(union_type->id == ZigTypeIdUnion);
2190722922
2190822923 if ((err = type_resolve(ira->codegen, union_type, ResolveStatusSizeKnown)))
21909 return ira->codegen->invalid_instruction;
22924 return ira->codegen->invalid_inst_gen;
2191022925
2191122926 TypeUnionField *type_field = find_union_type_field(union_type, field_name);
2191222927 if (type_field == nullptr) {
2191322928 ir_add_error_node(ira, field_source_node,
2191422929 buf_sprintf("no member named '%s' in union '%s'",
2191522930 buf_ptr(field_name), buf_ptr(&union_type->name)));
21916 return ira->codegen->invalid_instruction;
22931 return ira->codegen->invalid_inst_gen;
2191722932 }
2191822933
2191922934 if (type_is_invalid(type_field->type_entry))
21920 return ira->codegen->invalid_instruction;
22935 return ira->codegen->invalid_inst_gen;
2192122936
2192222937 if (result_loc->value->data.x_ptr.mut == ConstPtrMutInfer) {
2192322938 if (instr_is_comptime(field_result_loc) &&
......@@ -21929,42 +22944,42 @@ static IrInstruction *ir_analyze_union_init(IrAnalyze *ira, IrInstruction *sourc
2192922944 }
2193022945 }
2193122946
21932 bool is_comptime = ir_should_inline(ira->new_irb.exec, source_instruction->scope)
22947 bool is_comptime = ir_should_inline(ira->old_irb.exec, source_instruction->scope)
2193322948 || type_requires_comptime(ira->codegen, union_type) == ReqCompTimeYes;
2193422949
21935 IrInstruction *result = ir_get_deref(ira, source_instruction, result_loc, nullptr);
22950 IrInstGen *result = ir_get_deref(ira, source_instruction, result_loc, nullptr);
2193622951 if (is_comptime && !instr_is_comptime(result)) {
21937 ir_add_error(ira, field_result_loc,
22952 ir_add_error(ira, &field_result_loc->base,
2193822953 buf_sprintf("unable to evaluate constant expression"));
21939 return ira->codegen->invalid_instruction;
22954 return ira->codegen->invalid_inst_gen;
2194022955 }
2194122956 return result;
2194222957}
2194322958
21944static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruction *instruction,
21945 ZigType *container_type, size_t instr_field_count, IrInstructionContainerInitFieldsField *fields,
21946 IrInstruction *result_loc)
22959static IrInstGen *ir_analyze_container_init_fields(IrAnalyze *ira, IrInst *source_instr,
22960 ZigType *container_type, size_t instr_field_count, IrInstSrcContainerInitFieldsField *fields,
22961 IrInstGen *result_loc)
2194722962{
2194822963 Error err;
2194922964 if (container_type->id == ZigTypeIdUnion) {
2195022965 if (instr_field_count != 1) {
21951 ir_add_error(ira, instruction,
22966 ir_add_error(ira, source_instr,
2195222967 buf_sprintf("union initialization expects exactly one field"));
21953 return ira->codegen->invalid_instruction;
22968 return ira->codegen->invalid_inst_gen;
2195422969 }
21955 IrInstructionContainerInitFieldsField *field = &fields[0];
21956 IrInstruction *field_result_loc = field->result_loc->child;
22970 IrInstSrcContainerInitFieldsField *field = &fields[0];
22971 IrInstGen *field_result_loc = field->result_loc->child;
2195722972 if (type_is_invalid(field_result_loc->value->type))
21958 return ira->codegen->invalid_instruction;
22973 return ira->codegen->invalid_inst_gen;
2195922974
21960 return ir_analyze_union_init(ira, instruction, field->source_node, container_type, field->name,
22975 return ir_analyze_union_init(ira, source_instr, field->source_node, container_type, field->name,
2196122976 field_result_loc, result_loc);
2196222977 }
2196322978 if (container_type->id != ZigTypeIdStruct || is_slice(container_type)) {
21964 ir_add_error(ira, instruction,
22979 ir_add_error(ira, source_instr,
2196522980 buf_sprintf("type '%s' does not support struct initialization syntax",
2196622981 buf_ptr(&container_type->name)));
21967 return ira->codegen->invalid_instruction;
22982 return ira->codegen->invalid_inst_gen;
2196822983 }
2196922984
2197022985 if (container_type->data.structure.resolve_status == ResolveStatusBeingInferred) {
......@@ -21973,16 +22988,16 @@ static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruc
2197322988 }
2197422989
2197522990 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))
21976 return ira->codegen->invalid_instruction;
22991 return ira->codegen->invalid_inst_gen;
2197722992
2197822993 size_t actual_field_count = container_type->data.structure.src_field_count;
2197922994
21980 IrInstruction *first_non_const_instruction = nullptr;
22995 IrInstGen *first_non_const_instruction = nullptr;
2198122996
2198222997 AstNode **field_assign_nodes = allocate<AstNode *>(actual_field_count);
21983 ZigList<IrInstruction *> const_ptrs = {};
22998 ZigList<IrInstGen *> const_ptrs = {};
2198422999
21985 bool is_comptime = ir_should_inline(ira->new_irb.exec, instruction->scope)
23000 bool is_comptime = ir_should_inline(ira->old_irb.exec, source_instr->scope)
2198623001 || type_requires_comptime(ira->codegen, container_type) == ReqCompTimeYes;
2198723002
2198823003
......@@ -21998,29 +23013,29 @@ static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruc
2199823013 // comptime-known values.
2199923014
2200023015 for (size_t i = 0; i < instr_field_count; i += 1) {
22001 IrInstructionContainerInitFieldsField *field = &fields[i];
23016 IrInstSrcContainerInitFieldsField *field = &fields[i];
2200223017
22003 IrInstruction *field_result_loc = field->result_loc->child;
23018 IrInstGen *field_result_loc = field->result_loc->child;
2200423019 if (type_is_invalid(field_result_loc->value->type))
22005 return ira->codegen->invalid_instruction;
23020 return ira->codegen->invalid_inst_gen;
2200623021
2200723022 TypeStructField *type_field = find_struct_type_field(container_type, field->name);
2200823023 if (!type_field) {
2200923024 ir_add_error_node(ira, field->source_node,
2201023025 buf_sprintf("no member named '%s' in struct '%s'",
2201123026 buf_ptr(field->name), buf_ptr(&container_type->name)));
22012 return ira->codegen->invalid_instruction;
23027 return ira->codegen->invalid_inst_gen;
2201323028 }
2201423029
2201523030 if (type_is_invalid(type_field->type_entry))
22016 return ira->codegen->invalid_instruction;
23031 return ira->codegen->invalid_inst_gen;
2201723032
2201823033 size_t field_index = type_field->src_index;
2201923034 AstNode *existing_assign_node = field_assign_nodes[field_index];
2202023035 if (existing_assign_node) {
2202123036 ErrorMsg *msg = ir_add_error_node(ira, field->source_node, buf_sprintf("duplicate field"));
2202223037 add_error_note(ira->codegen, msg, existing_assign_node, buf_sprintf("other field here"));
22023 return ira->codegen->invalid_instruction;
23038 return ira->codegen->invalid_inst_gen;
2202423039 }
2202523040 field_assign_nodes[field_index] = field->source_node;
2202623041
......@@ -22041,20 +23056,20 @@ static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruc
2204123056 TypeStructField *field = container_type->data.structure.fields[i];
2204223057 memoize_field_init_val(ira->codegen, container_type, field);
2204323058 if (field->init_val == nullptr) {
22044 ir_add_error_node(ira, instruction->source_node,
23059 ir_add_error(ira, source_instr,
2204523060 buf_sprintf("missing field: '%s'", buf_ptr(container_type->data.structure.fields[i]->name)));
2204623061 any_missing = true;
2204723062 continue;
2204823063 }
2204923064 if (type_is_invalid(field->init_val->type))
22050 return ira->codegen->invalid_instruction;
23065 return ira->codegen->invalid_inst_gen;
2205123066
22052 IrInstruction *runtime_inst = ir_const(ira, instruction, field->init_val->type);
23067 IrInstGen *runtime_inst = ir_const(ira, source_instr, field->init_val->type);
2205323068 copy_const_val(runtime_inst->value, field->init_val);
2205423069
22055 IrInstruction *field_ptr = ir_analyze_struct_field_ptr(ira, instruction, field, result_loc,
23070 IrInstGen *field_ptr = ir_analyze_struct_field_ptr(ira, source_instr, field, result_loc,
2205623071 container_type, true);
22057 ir_analyze_store_ptr(ira, instruction, field_ptr, runtime_inst, false);
23072 ir_analyze_store_ptr(ira, source_instr, field_ptr, runtime_inst, false);
2205823073 if (instr_is_comptime(field_ptr) && field_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
2205923074 const_ptrs.append(field_ptr);
2206023075 } else {
......@@ -22062,39 +23077,39 @@ static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruc
2206223077 }
2206323078 }
2206423079 if (any_missing)
22065 return ira->codegen->invalid_instruction;
23080 return ira->codegen->invalid_inst_gen;
2206623081
2206723082 if (result_loc->value->data.x_ptr.mut == ConstPtrMutInfer) {
2206823083 if (const_ptrs.length != actual_field_count) {
2206923084 result_loc->value->special = ConstValSpecialRuntime;
2207023085 for (size_t i = 0; i < const_ptrs.length; i += 1) {
22071 IrInstruction *field_result_loc = const_ptrs.at(i);
22072 IrInstruction *deref = ir_get_deref(ira, field_result_loc, field_result_loc, nullptr);
23086 IrInstGen *field_result_loc = const_ptrs.at(i);
23087 IrInstGen *deref = ir_get_deref(ira, &field_result_loc->base, field_result_loc, nullptr);
2207323088 field_result_loc->value->special = ConstValSpecialRuntime;
22074 ir_analyze_store_ptr(ira, field_result_loc, field_result_loc, deref, false);
23089 ir_analyze_store_ptr(ira, &field_result_loc->base, field_result_loc, deref, false);
2207523090 }
2207623091 }
2207723092 }
2207823093
22079 IrInstruction *result = ir_get_deref(ira, instruction, result_loc, nullptr);
23094 IrInstGen *result = ir_get_deref(ira, source_instr, result_loc, nullptr);
2208023095
2208123096 if (is_comptime && !instr_is_comptime(result)) {
22082 ir_add_error_node(ira, first_non_const_instruction->source_node,
23097 ir_add_error_node(ira, first_non_const_instruction->base.source_node,
2208323098 buf_sprintf("unable to evaluate constant expression"));
22084 return ira->codegen->invalid_instruction;
23099 return ira->codegen->invalid_inst_gen;
2208523100 }
2208623101
2208723102 return result;
2208823103}
2208923104
22090static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
22091 IrInstructionContainerInitList *instruction)
23105static IrInstGen *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
23106 IrInstSrcContainerInitList *instruction)
2209223107{
22093 ir_assert(instruction->result_loc != nullptr, &instruction->base);
22094 IrInstruction *result_loc = instruction->result_loc->child;
23108 ir_assert(instruction->result_loc != nullptr, &instruction->base.base);
23109 IrInstGen *result_loc = instruction->result_loc->child;
2209523110 if (type_is_invalid(result_loc->value->type))
2209623111 return result_loc;
22097 ir_assert(result_loc->value->type->id == ZigTypeIdPointer, &instruction->base);
23112 ir_assert(result_loc->value->type->id == ZigTypeIdPointer, &instruction->base.base);
2209823113
2209923114 ZigType *container_type = result_loc->value->type->data.pointer.child_type;
2210023115
......@@ -22104,24 +23119,24 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
2210423119 ir_add_error_node(ira, instruction->init_array_type_source_node,
2210523120 buf_sprintf("array literal requires address-of operator to coerce to slice type '%s'",
2210623121 buf_ptr(&container_type->name)));
22107 return ira->codegen->invalid_instruction;
23122 return ira->codegen->invalid_inst_gen;
2210823123 }
2210923124
2211023125 if (container_type->id == ZigTypeIdVoid) {
2211123126 if (elem_count != 0) {
22112 ir_add_error_node(ira, instruction->base.source_node,
23127 ir_add_error_node(ira, instruction->base.base.source_node,
2211323128 buf_sprintf("void expression expects no arguments"));
22114 return ira->codegen->invalid_instruction;
23129 return ira->codegen->invalid_inst_gen;
2211523130 }
22116 return ir_const_void(ira, &instruction->base);
23131 return ir_const_void(ira, &instruction->base.base);
2211723132 }
2211823133
2211923134 if (container_type->id == ZigTypeIdStruct && elem_count == 0) {
22120 ir_assert(instruction->result_loc != nullptr, &instruction->base);
22121 IrInstruction *result_loc = instruction->result_loc->child;
23135 ir_assert(instruction->result_loc != nullptr, &instruction->base.base);
23136 IrInstGen *result_loc = instruction->result_loc->child;
2212223137 if (type_is_invalid(result_loc->value->type))
2212323138 return result_loc;
22124 return ir_analyze_container_init_fields(ira, &instruction->base, container_type, 0, nullptr, result_loc);
23139 return ir_analyze_container_init_fields(ira, &instruction->base.base, container_type, 0, nullptr, result_loc);
2212523140 }
2212623141
2212723142 if (container_type->id == ZigTypeIdArray) {
......@@ -22129,10 +23144,10 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
2212923144 if (container_type->data.array.len != elem_count) {
2213023145 ZigType *literal_type = get_array_type(ira->codegen, child_type, elem_count, nullptr);
2213123146
22132 ir_add_error(ira, &instruction->base,
23147 ir_add_error(ira, &instruction->base.base,
2213323148 buf_sprintf("expected %s literal, found %s literal",
2213423149 buf_ptr(&container_type->name), buf_ptr(&literal_type->name)));
22135 return ira->codegen->invalid_instruction;
23150 return ira->codegen->invalid_inst_gen;
2213623151 }
2213723152 } else if (container_type->id == ZigTypeIdStruct &&
2213823153 container_type->data.structure.resolve_status == ResolveStatusBeingInferred)
......@@ -22142,17 +23157,17 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
2214223157 } else if (container_type->id == ZigTypeIdVector) {
2214323158 // OK
2214423159 } else {
22145 ir_add_error_node(ira, instruction->base.source_node,
23160 ir_add_error(ira, &instruction->base.base,
2214623161 buf_sprintf("type '%s' does not support array initialization",
2214723162 buf_ptr(&container_type->name)));
22148 return ira->codegen->invalid_instruction;
23163 return ira->codegen->invalid_inst_gen;
2214923164 }
2215023165
2215123166 switch (type_has_one_possible_value(ira->codegen, container_type)) {
2215223167 case OnePossibleValueInvalid:
22153 return ira->codegen->invalid_instruction;
23168 return ira->codegen->invalid_inst_gen;
2215423169 case OnePossibleValueYes:
22155 return ir_const_move(ira, &instruction->base,
23170 return ir_const_move(ira, &instruction->base.base,
2215623171 get_the_one_possible_value(ira->codegen, container_type));
2215723172 case OnePossibleValueNo:
2215823173 break;
......@@ -22161,16 +23176,16 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
2216123176 bool is_comptime;
2216223177 switch (type_requires_comptime(ira->codegen, container_type)) {
2216323178 case ReqCompTimeInvalid:
22164 return ira->codegen->invalid_instruction;
23179 return ira->codegen->invalid_inst_gen;
2216523180 case ReqCompTimeNo:
22166 is_comptime = ir_should_inline(ira->new_irb.exec, instruction->base.scope);
23181 is_comptime = ir_should_inline(ira->old_irb.exec, instruction->base.base.scope);
2216723182 break;
2216823183 case ReqCompTimeYes:
2216923184 is_comptime = true;
2217023185 break;
2217123186 }
2217223187
22173 IrInstruction *first_non_const_instruction = nullptr;
23188 IrInstGen *first_non_const_instruction = nullptr;
2217423189
2217523190 // The Result Location Mechanism has already emitted runtime instructions to
2217623191 // initialize runtime elements and has omitted instructions for the comptime
......@@ -22179,12 +23194,12 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
2217923194 // array initialization can be a comptime value, overwrite ConstPtrMutInfer with
2218023195 // ConstPtrMutComptimeConst. Otherwise, emit instructions to runtime-initialize the
2218123196 // elements that have comptime-known values.
22182 ZigList<IrInstruction *> const_ptrs = {};
23197 ZigList<IrInstGen *> const_ptrs = {};
2218323198
2218423199 for (size_t i = 0; i < elem_count; i += 1) {
22185 IrInstruction *elem_result_loc = instruction->elem_result_loc_list[i]->child;
23200 IrInstGen *elem_result_loc = instruction->elem_result_loc_list[i]->child;
2218623201 if (type_is_invalid(elem_result_loc->value->type))
22187 return ira->codegen->invalid_instruction;
23202 return ira->codegen->invalid_inst_gen;
2218823203
2218923204 assert(elem_result_loc->value->type->id == ZigTypeIdPointer);
2219023205
......@@ -22201,81 +23216,79 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
2220123216 if (const_ptrs.length != elem_count) {
2220223217 result_loc->value->special = ConstValSpecialRuntime;
2220323218 for (size_t i = 0; i < const_ptrs.length; i += 1) {
22204 IrInstruction *elem_result_loc = const_ptrs.at(i);
23219 IrInstGen *elem_result_loc = const_ptrs.at(i);
2220523220 assert(elem_result_loc->value->special == ConstValSpecialStatic);
2220623221 if (elem_result_loc->value->type->data.pointer.inferred_struct_field != nullptr) {
2220723222 // This field will be generated comptime; no need to do this.
2220823223 continue;
2220923224 }
22210 IrInstruction *deref = ir_get_deref(ira, elem_result_loc, elem_result_loc, nullptr);
23225 IrInstGen *deref = ir_get_deref(ira, &elem_result_loc->base, elem_result_loc, nullptr);
2221123226 elem_result_loc->value->special = ConstValSpecialRuntime;
22212 ir_analyze_store_ptr(ira, elem_result_loc, elem_result_loc, deref, false);
23227 ir_analyze_store_ptr(ira, &elem_result_loc->base, elem_result_loc, deref, false);
2221323228 }
2221423229 }
2221523230 }
2221623231
22217 IrInstruction *result = ir_get_deref(ira, &instruction->base, result_loc, nullptr);
23232 IrInstGen *result = ir_get_deref(ira, &instruction->base.base, result_loc, nullptr);
2221823233 if (instr_is_comptime(result))
2221923234 return result;
2222023235
2222123236 if (is_comptime) {
22222 ir_add_error_node(ira, first_non_const_instruction->source_node,
23237 ir_add_error(ira, &first_non_const_instruction->base,
2222323238 buf_sprintf("unable to evaluate constant expression"));
22224 return ira->codegen->invalid_instruction;
23239 return ira->codegen->invalid_inst_gen;
2222523240 }
2222623241
2222723242 ZigType *result_elem_type = result_loc->value->type->data.pointer.child_type;
2222823243 if (is_slice(result_elem_type)) {
22229 ErrorMsg *msg = ir_add_error(ira, &instruction->base,
23244 ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
2223023245 buf_sprintf("runtime-initialized array cannot be casted to slice type '%s'",
2223123246 buf_ptr(&result_elem_type->name)));
22232 add_error_note(ira->codegen, msg, first_non_const_instruction->source_node,
23247 add_error_note(ira->codegen, msg, first_non_const_instruction->base.source_node,
2223323248 buf_sprintf("this value is not comptime-known"));
22234 return ira->codegen->invalid_instruction;
23249 return ira->codegen->invalid_inst_gen;
2223523250 }
2223623251 return result;
2223723252}
2223823253
22239static IrInstruction *ir_analyze_instruction_container_init_fields(IrAnalyze *ira,
22240 IrInstructionContainerInitFields *instruction)
23254static IrInstGen *ir_analyze_instruction_container_init_fields(IrAnalyze *ira,
23255 IrInstSrcContainerInitFields *instruction)
2224123256{
22242 ir_assert(instruction->result_loc != nullptr, &instruction->base);
22243 IrInstruction *result_loc = instruction->result_loc->child;
23257 ir_assert(instruction->result_loc != nullptr, &instruction->base.base);
23258 IrInstGen *result_loc = instruction->result_loc->child;
2224423259 if (type_is_invalid(result_loc->value->type))
2224523260 return result_loc;
2224623261
22247 ir_assert(result_loc->value->type->id == ZigTypeIdPointer, &instruction->base);
23262 ir_assert(result_loc->value->type->id == ZigTypeIdPointer, &instruction->base.base);
2224823263 ZigType *container_type = result_loc->value->type->data.pointer.child_type;
2224923264
22250 return ir_analyze_container_init_fields(ira, &instruction->base, container_type,
23265 return ir_analyze_container_init_fields(ira, &instruction->base.base, container_type,
2225123266 instruction->field_count, instruction->fields, result_loc);
2225223267}
2225323268
22254static IrInstruction *ir_analyze_instruction_compile_err(IrAnalyze *ira,
22255 IrInstructionCompileErr *instruction)
22256{
22257 IrInstruction *msg_value = instruction->msg->child;
23269static IrInstGen *ir_analyze_instruction_compile_err(IrAnalyze *ira, IrInstSrcCompileErr *instruction) {
23270 IrInstGen *msg_value = instruction->msg->child;
2225823271 Buf *msg_buf = ir_resolve_str(ira, msg_value);
2225923272 if (!msg_buf)
22260 return ira->codegen->invalid_instruction;
23273 return ira->codegen->invalid_inst_gen;
2226123274
22262 ir_add_error(ira, &instruction->base, msg_buf);
23275 ir_add_error(ira, &instruction->base.base, msg_buf);
2226323276
22264 return ira->codegen->invalid_instruction;
23277 return ira->codegen->invalid_inst_gen;
2226523278}
2226623279
22267static IrInstruction *ir_analyze_instruction_compile_log(IrAnalyze *ira, IrInstructionCompileLog *instruction) {
23280static IrInstGen *ir_analyze_instruction_compile_log(IrAnalyze *ira, IrInstSrcCompileLog *instruction) {
2226823281 Buf buf = BUF_INIT;
2226923282 fprintf(stderr, "| ");
2227023283 for (size_t i = 0; i < instruction->msg_count; i += 1) {
22271 IrInstruction *msg = instruction->msg_list[i]->child;
23284 IrInstGen *msg = instruction->msg_list[i]->child;
2227223285 if (type_is_invalid(msg->value->type))
22273 return ira->codegen->invalid_instruction;
23286 return ira->codegen->invalid_inst_gen;
2227423287 buf_resize(&buf, 0);
2227523288 if (msg->value->special == ConstValSpecialLazy) {
2227623289 // Resolve any lazy value that's passed, we need its value
22277 if (ir_resolve_lazy(ira->codegen, msg->source_node, msg->value))
22278 return ira->codegen->invalid_instruction;
23290 if (ir_resolve_lazy(ira->codegen, msg->base.source_node, msg->value))
23291 return ira->codegen->invalid_inst_gen;
2227923292 }
2228023293 render_const_value(ira->codegen, &buf, msg->value);
2228123294 const char *comma_str = (i != 0) ? ", " : "";
......@@ -22283,25 +23296,25 @@ static IrInstruction *ir_analyze_instruction_compile_log(IrAnalyze *ira, IrInstr
2228323296 }
2228423297 fprintf(stderr, "\n");
2228523298
22286 auto *expr = &instruction->base.source_node->data.fn_call_expr;
23299 auto *expr = &instruction->base.base.source_node->data.fn_call_expr;
2228723300 if (!expr->seen) {
2228823301 // Here we bypass higher level functions such as ir_add_error because we do not want
2228923302 // invalidate_exec to be called.
22290 add_node_error(ira->codegen, instruction->base.source_node, buf_sprintf("found compile log statement"));
23303 add_node_error(ira->codegen, instruction->base.base.source_node, buf_sprintf("found compile log statement"));
2229123304 }
2229223305 expr->seen = true;
2229323306
22294 return ir_const_void(ira, &instruction->base);
23307 return ir_const_void(ira, &instruction->base.base);
2229523308}
2229623309
22297static IrInstruction *ir_analyze_instruction_err_name(IrAnalyze *ira, IrInstructionErrName *instruction) {
22298 IrInstruction *value = instruction->value->child;
23310static IrInstGen *ir_analyze_instruction_err_name(IrAnalyze *ira, IrInstSrcErrName *instruction) {
23311 IrInstGen *value = instruction->value->child;
2229923312 if (type_is_invalid(value->value->type))
22300 return ira->codegen->invalid_instruction;
23313 return ira->codegen->invalid_inst_gen;
2230123314
22302 IrInstruction *casted_value = ir_implicit_cast(ira, value, ira->codegen->builtin_types.entry_global_error_set);
23315 IrInstGen *casted_value = ir_implicit_cast(ira, value, ira->codegen->builtin_types.entry_global_error_set);
2230323316 if (type_is_invalid(casted_value->value->type))
22304 return ira->codegen->invalid_instruction;
23317 return ira->codegen->invalid_inst_gen;
2230523318
2230623319 ZigType *u8_ptr_type = get_pointer_to_type_extra(ira->codegen, ira->codegen->builtin_types.entry_u8,
2230723320 true, false, PtrLenUnknown, 0, 0, 0, false);
......@@ -22309,13 +23322,13 @@ static IrInstruction *ir_analyze_instruction_err_name(IrAnalyze *ira, IrInstruct
2230923322 if (instr_is_comptime(casted_value)) {
2231023323 ZigValue *val = ir_resolve_const(ira, casted_value, UndefBad);
2231123324 if (val == nullptr)
22312 return ira->codegen->invalid_instruction;
23325 return ira->codegen->invalid_inst_gen;
2231323326 ErrorTableEntry *err = casted_value->value->data.x_err_set;
2231423327 if (!err->cached_error_name_val) {
2231523328 ZigValue *array_val = create_const_str_lit(ira->codegen, &err->name)->data.x_ptr.data.ref.pointee;
2231623329 err->cached_error_name_val = create_const_slice(ira->codegen, array_val, 0, buf_len(&err->name), true);
2231723330 }
22318 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
23331 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
2231923332 copy_const_val(result->value, err->cached_error_name_val);
2232023333 result->value->type = str_type;
2232123334 return result;
......@@ -22323,20 +23336,17 @@ static IrInstruction *ir_analyze_instruction_err_name(IrAnalyze *ira, IrInstruct
2232323336
2232423337 ira->codegen->generate_error_name_table = true;
2232523338
22326 IrInstruction *result = ir_build_err_name(&ira->new_irb,
22327 instruction->base.scope, instruction->base.source_node, value);
22328 result->value->type = str_type;
22329 return result;
23339 return ir_build_err_name_gen(ira, &instruction->base.base, value, str_type);
2233023340}
2233123341
22332static IrInstruction *ir_analyze_instruction_enum_tag_name(IrAnalyze *ira, IrInstructionTagName *instruction) {
23342static IrInstGen *ir_analyze_instruction_enum_tag_name(IrAnalyze *ira, IrInstSrcTagName *instruction) {
2233323343 Error err;
22334 IrInstruction *target = instruction->target->child;
23344 IrInstGen *target = instruction->target->child;
2233523345 if (type_is_invalid(target->value->type))
22336 return ira->codegen->invalid_instruction;
23346 return ira->codegen->invalid_inst_gen;
2233723347
2233823348 if (target->value->type->id == ZigTypeIdEnumLiteral) {
22339 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
23349 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
2234023350 Buf *field_name = target->value->data.x_enum_literal;
2234123351 ZigValue *array_val = create_const_str_lit(ira->codegen, field_name)->data.x_ptr.data.ref.pointee;
2234223352 init_const_slice(ira->codegen, result->value, array_val, 0, buf_len(field_name), true);
......@@ -22344,86 +23354,88 @@ static IrInstruction *ir_analyze_instruction_enum_tag_name(IrAnalyze *ira, IrIns
2234423354 }
2234523355
2234623356 if (target->value->type->id == ZigTypeIdUnion) {
22347 target = ir_analyze_union_tag(ira, &instruction->base, target);
23357 target = ir_analyze_union_tag(ira, &instruction->base.base, target, instruction->base.is_gen);
2234823358 if (type_is_invalid(target->value->type))
22349 return ira->codegen->invalid_instruction;
23359 return ira->codegen->invalid_inst_gen;
2235023360 }
2235123361
22352 assert(target->value->type->id == ZigTypeIdEnum);
23362 if (target->value->type->id != ZigTypeIdEnum) {
23363 ir_add_error(ira, &target->base,
23364 buf_sprintf("expected enum tag, found '%s'", buf_ptr(&target->value->type->name)));
23365 return ira->codegen->invalid_inst_gen;
23366 }
2235323367
2235423368 if (target->value->type->data.enumeration.src_field_count == 1 &&
2235523369 !target->value->type->data.enumeration.non_exhaustive) {
2235623370 TypeEnumField *only_field = &target->value->type->data.enumeration.fields[0];
2235723371 ZigValue *array_val = create_const_str_lit(ira->codegen, only_field->name)->data.x_ptr.data.ref.pointee;
22358 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
23372 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
2235923373 init_const_slice(ira->codegen, result->value, array_val, 0, buf_len(only_field->name), true);
2236023374 return result;
2236123375 }
2236223376
2236323377 if (instr_is_comptime(target)) {
2236423378 if ((err = type_resolve(ira->codegen, target->value->type, ResolveStatusZeroBitsKnown)))
22365 return ira->codegen->invalid_instruction;
23379 return ira->codegen->invalid_inst_gen;
2236623380 if (target->value->type->data.enumeration.non_exhaustive) {
22367 add_node_error(ira->codegen, instruction->base.source_node,
23381 ir_add_error(ira, &instruction->base.base,
2236823382 buf_sprintf("TODO @tagName on non-exhaustive enum https://github.com/ziglang/zig/issues/3991"));
22369 return ira->codegen->invalid_instruction;
23383 return ira->codegen->invalid_inst_gen;
2237023384 }
2237123385 TypeEnumField *field = find_enum_field_by_tag(target->value->type, &target->value->data.x_bigint);
2237223386 ZigValue *array_val = create_const_str_lit(ira->codegen, field->name)->data.x_ptr.data.ref.pointee;
22373 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
23387 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
2237423388 init_const_slice(ira->codegen, result->value, array_val, 0, buf_len(field->name), true);
2237523389 return result;
2237623390 }
2237723391
22378 IrInstruction *result = ir_build_tag_name(&ira->new_irb, instruction->base.scope,
22379 instruction->base.source_node, target);
2238023392 ZigType *u8_ptr_type = get_pointer_to_type_extra(
2238123393 ira->codegen, ira->codegen->builtin_types.entry_u8,
2238223394 true, false, PtrLenUnknown,
2238323395 0, 0, 0, false);
22384 result->value->type = get_slice_type(ira->codegen, u8_ptr_type);
22385 return result;
23396 ZigType *result_type = get_slice_type(ira->codegen, u8_ptr_type);
23397 return ir_build_tag_name_gen(ira, &instruction->base.base, target, result_type);
2238623398}
2238723399
22388static IrInstruction *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,
22389 IrInstructionFieldParentPtr *instruction)
23400static IrInstGen *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,
23401 IrInstSrcFieldParentPtr *instruction)
2239023402{
2239123403 Error err;
22392 IrInstruction *type_value = instruction->type_value->child;
23404 IrInstGen *type_value = instruction->type_value->child;
2239323405 ZigType *container_type = ir_resolve_type(ira, type_value);
2239423406 if (type_is_invalid(container_type))
22395 return ira->codegen->invalid_instruction;
23407 return ira->codegen->invalid_inst_gen;
2239623408
22397 IrInstruction *field_name_value = instruction->field_name->child;
23409 IrInstGen *field_name_value = instruction->field_name->child;
2239823410 Buf *field_name = ir_resolve_str(ira, field_name_value);
2239923411 if (!field_name)
22400 return ira->codegen->invalid_instruction;
23412 return ira->codegen->invalid_inst_gen;
2240123413
22402 IrInstruction *field_ptr = instruction->field_ptr->child;
23414 IrInstGen *field_ptr = instruction->field_ptr->child;
2240323415 if (type_is_invalid(field_ptr->value->type))
22404 return ira->codegen->invalid_instruction;
23416 return ira->codegen->invalid_inst_gen;
2240523417
2240623418 if (container_type->id != ZigTypeIdStruct) {
22407 ir_add_error(ira, type_value,
23419 ir_add_error(ira, &type_value->base,
2240823420 buf_sprintf("expected struct type, found '%s'", buf_ptr(&container_type->name)));
22409 return ira->codegen->invalid_instruction;
23421 return ira->codegen->invalid_inst_gen;
2241023422 }
2241123423
2241223424 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))
22413 return ira->codegen->invalid_instruction;
23425 return ira->codegen->invalid_inst_gen;
2241423426
2241523427 TypeStructField *field = find_struct_type_field(container_type, field_name);
2241623428 if (field == nullptr) {
22417 ir_add_error(ira, field_name_value,
23429 ir_add_error(ira, &field_name_value->base,
2241823430 buf_sprintf("struct '%s' has no field '%s'",
2241923431 buf_ptr(&container_type->name), buf_ptr(field_name)));
22420 return ira->codegen->invalid_instruction;
23432 return ira->codegen->invalid_inst_gen;
2242123433 }
2242223434
2242323435 if (field_ptr->value->type->id != ZigTypeIdPointer) {
22424 ir_add_error(ira, field_ptr,
23436 ir_add_error(ira, &field_ptr->base,
2242523437 buf_sprintf("expected pointer, found '%s'", buf_ptr(&field_ptr->value->type->name)));
22426 return ira->codegen->invalid_instruction;
23438 return ira->codegen->invalid_inst_gen;
2242723439 }
2242823440
2242923441 bool is_packed = (container_type->data.structure.layout == ContainerLayoutPacked);
......@@ -22435,9 +23447,9 @@ static IrInstruction *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,
2243523447 field_ptr->value->type->data.pointer.is_volatile,
2243623448 PtrLenSingle,
2243723449 field_ptr_align, 0, 0, false);
22438 IrInstruction *casted_field_ptr = ir_implicit_cast(ira, field_ptr, field_ptr_type);
23450 IrInstGen *casted_field_ptr = ir_implicit_cast(ira, field_ptr, field_ptr_type);
2243923451 if (type_is_invalid(casted_field_ptr->value->type))
22440 return ira->codegen->invalid_instruction;
23452 return ira->codegen->invalid_inst_gen;
2244123453
2244223454 ZigType *result_type = get_pointer_to_type_extra(ira->codegen, container_type,
2244323455 casted_field_ptr->value->type->data.pointer.is_const,
......@@ -22448,23 +23460,23 @@ static IrInstruction *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,
2244823460 if (instr_is_comptime(casted_field_ptr)) {
2244923461 ZigValue *field_ptr_val = ir_resolve_const(ira, casted_field_ptr, UndefBad);
2245023462 if (!field_ptr_val)
22451 return ira->codegen->invalid_instruction;
23463 return ira->codegen->invalid_inst_gen;
2245223464
2245323465 if (field_ptr_val->data.x_ptr.special != ConstPtrSpecialBaseStruct) {
22454 ir_add_error(ira, field_ptr, buf_sprintf("pointer value not based on parent struct"));
22455 return ira->codegen->invalid_instruction;
23466 ir_add_error(ira, &field_ptr->base, buf_sprintf("pointer value not based on parent struct"));
23467 return ira->codegen->invalid_inst_gen;
2245623468 }
2245723469
2245823470 size_t ptr_field_index = field_ptr_val->data.x_ptr.data.base_struct.field_index;
2245923471 if (ptr_field_index != field->src_index) {
22460 ir_add_error(ira, &instruction->base,
23472 ir_add_error(ira, &instruction->base.base,
2246123473 buf_sprintf("field '%s' has index %" ZIG_PRI_usize " but pointer value is index %" ZIG_PRI_usize " of struct '%s'",
2246223474 buf_ptr(field->name), field->src_index,
2246323475 ptr_field_index, buf_ptr(&container_type->name)));
22464 return ira->codegen->invalid_instruction;
23476 return ira->codegen->invalid_inst_gen;
2246523477 }
2246623478
22467 IrInstruction *result = ir_const(ira, &instruction->base, result_type);
23479 IrInstGen *result = ir_const(ira, &instruction->base.base, result_type);
2246823480 ZigValue *out_val = result->value;
2246923481 out_val->data.x_ptr.special = ConstPtrSpecialRef;
2247023482 out_val->data.x_ptr.data.ref.pointee = field_ptr_val->data.x_ptr.data.base_struct.struct_val;
......@@ -22472,15 +23484,12 @@ static IrInstruction *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,
2247223484 return result;
2247323485 }
2247423486
22475 IrInstruction *result = ir_build_field_parent_ptr(&ira->new_irb, instruction->base.scope,
22476 instruction->base.source_node, type_value, field_name_value, casted_field_ptr, field);
22477 result->value->type = result_type;
22478 return result;
23487 return ir_build_field_parent_ptr_gen(ira, &instruction->base.base, casted_field_ptr, field, result_type);
2247923488}
2248023489
2248123490static TypeStructField *validate_byte_offset(IrAnalyze *ira,
22482 IrInstruction *type_value,
22483 IrInstruction *field_name_value,
23491 IrInstGen *type_value,
23492 IrInstGen *field_name_value,
2248423493 size_t *byte_offset)
2248523494{
2248623495 ZigType *container_type = ir_resolve_type(ira, type_value);
......@@ -22496,21 +23505,21 @@ static TypeStructField *validate_byte_offset(IrAnalyze *ira,
2249623505 return nullptr;
2249723506
2249823507 if (container_type->id != ZigTypeIdStruct) {
22499 ir_add_error(ira, type_value,
23508 ir_add_error(ira, &type_value->base,
2250023509 buf_sprintf("expected struct type, found '%s'", buf_ptr(&container_type->name)));
2250123510 return nullptr;
2250223511 }
2250323512
2250423513 TypeStructField *field = find_struct_type_field(container_type, field_name);
2250523514 if (field == nullptr) {
22506 ir_add_error(ira, field_name_value,
23515 ir_add_error(ira, &field_name_value->base,
2250723516 buf_sprintf("struct '%s' has no field '%s'",
2250823517 buf_ptr(&container_type->name), buf_ptr(field_name)));
2250923518 return nullptr;
2251023519 }
2251123520
2251223521 if (!type_has_bits(field->type_entry)) {
22513 ir_add_error(ira, field_name_value,
23522 ir_add_error(ira, &field_name_value->base,
2251423523 buf_sprintf("zero-bit field '%s' in struct '%s' has no offset",
2251523524 buf_ptr(field_name), buf_ptr(&container_type->name)));
2251623525 return nullptr;
......@@ -22520,36 +23529,32 @@ static TypeStructField *validate_byte_offset(IrAnalyze *ira,
2252023529 return field;
2252123530}
2252223531
22523static IrInstruction *ir_analyze_instruction_byte_offset_of(IrAnalyze *ira,
22524 IrInstructionByteOffsetOf *instruction)
22525{
22526 IrInstruction *type_value = instruction->type_value->child;
23532static IrInstGen *ir_analyze_instruction_byte_offset_of(IrAnalyze *ira, IrInstSrcByteOffsetOf *instruction) {
23533 IrInstGen *type_value = instruction->type_value->child;
2252723534 if (type_is_invalid(type_value->value->type))
22528 return ira->codegen->invalid_instruction;
23535 return ira->codegen->invalid_inst_gen;
2252923536
22530 IrInstruction *field_name_value = instruction->field_name->child;
23537 IrInstGen *field_name_value = instruction->field_name->child;
2253123538 size_t byte_offset = 0;
2253223539 if (!validate_byte_offset(ira, type_value, field_name_value, &byte_offset))
22533 return ira->codegen->invalid_instruction;
23540 return ira->codegen->invalid_inst_gen;
2253423541
2253523542
22536 return ir_const_unsigned(ira, &instruction->base, byte_offset);
23543 return ir_const_unsigned(ira, &instruction->base.base, byte_offset);
2253723544}
2253823545
22539static IrInstruction *ir_analyze_instruction_bit_offset_of(IrAnalyze *ira,
22540 IrInstructionBitOffsetOf *instruction)
22541{
22542 IrInstruction *type_value = instruction->type_value->child;
23546static IrInstGen *ir_analyze_instruction_bit_offset_of(IrAnalyze *ira, IrInstSrcBitOffsetOf *instruction) {
23547 IrInstGen *type_value = instruction->type_value->child;
2254323548 if (type_is_invalid(type_value->value->type))
22544 return ira->codegen->invalid_instruction;
22545 IrInstruction *field_name_value = instruction->field_name->child;
23549 return ira->codegen->invalid_inst_gen;
23550 IrInstGen *field_name_value = instruction->field_name->child;
2254623551 size_t byte_offset = 0;
2254723552 TypeStructField *field = nullptr;
2254823553 if (!(field = validate_byte_offset(ira, type_value, field_name_value, &byte_offset)))
22549 return ira->codegen->invalid_instruction;
23554 return ira->codegen->invalid_inst_gen;
2255023555
2255123556 size_t bit_offset = byte_offset * 8 + field->bit_offset_in_host;
22552 return ir_const_unsigned(ira, &instruction->base, bit_offset);
23557 return ir_const_unsigned(ira, &instruction->base.base, bit_offset);
2255323558}
2255423559
2255523560static void ensure_field_index(ZigType *type, const char *field_name, size_t index) {
......@@ -22597,7 +23602,7 @@ static ZigType *ir_type_info_get_type(IrAnalyze *ira, const char *type_name, Zig
2259723602 return ir_resolve_const_type(ira->codegen, ira->new_irb.exec, nullptr, var->const_value);
2259823603}
2259923604
22600static Error ir_make_type_info_decls(IrAnalyze *ira, IrInstruction *source_instr, ZigValue *out_val,
23605static Error ir_make_type_info_decls(IrAnalyze *ira, IrInst* source_instr, ZigValue *out_val,
2260123606 ScopeDecls *decls_scope)
2260223607{
2260323608 Error err;
......@@ -22628,11 +23633,14 @@ static Error ir_make_type_info_decls(IrAnalyze *ira, IrInstruction *source_instr
2262823633
2262923634 while ((curr_entry = decl_it.next()) != nullptr) {
2263023635 // If the declaration is unresolved, force it to be resolved again.
22631 if (curr_entry->value->resolution == TldResolutionUnresolved) {
22632 resolve_top_level_decl(ira->codegen, curr_entry->value, curr_entry->value->source_node, false);
22633 if (curr_entry->value->resolution != TldResolutionOk) {
22634 return ErrorSemanticAnalyzeFail;
22635 }
23636 resolve_top_level_decl(ira->codegen, curr_entry->value, curr_entry->value->source_node, false);
23637 if (curr_entry->value->resolution == TldResolutionInvalid) {
23638 return ErrorSemanticAnalyzeFail;
23639 }
23640
23641 if (curr_entry->value->resolution == TldResolutionResolving) {
23642 ir_error_dependency_loop(ira, source_instr);
23643 return ErrorSemanticAnalyzeFail;
2263623644 }
2263723645
2263823646 // Skip comptime blocks and test functions.
......@@ -22689,6 +23697,8 @@ static Error ir_make_type_info_decls(IrAnalyze *ira, IrInstruction *source_instr
2268923697 case TldIdVar:
2269023698 {
2269123699 ZigVar *var = ((TldVar *)curr_entry->value)->var;
23700 assert(var != nullptr);
23701
2269223702 if ((err = type_resolve(ira->codegen, var->const_value->type, ResolveStatusSizeKnown)))
2269323703 return ErrorSemanticAnalyzeFail;
2269423704
......@@ -22719,11 +23729,7 @@ static Error ir_make_type_info_decls(IrAnalyze *ira, IrInstruction *source_instr
2271923729
2272023730 ZigFn *fn_entry = ((TldFn *)curr_entry->value)->fn_entry;
2272123731 assert(!fn_entry->is_test);
22722
22723 if (fn_entry->type_entry == nullptr) {
22724 ir_error_dependency_loop(ira, source_instr);
22725 return ErrorSemanticAnalyzeFail;
22726 }
23732 assert(fn_entry->type_entry != nullptr);
2272723733
2272823734 AstNodeFnProto *fn_node = &fn_entry->proto_node->data.fn_proto;
2272923735
......@@ -22955,7 +23961,7 @@ static void make_enum_field_val(IrAnalyze *ira, ZigValue *enum_field_val, TypeEn
2295523961 enum_field_val->data.x_struct.fields = inner_fields;
2295623962}
2295723963
22958static Error ir_make_type_info_value(IrAnalyze *ira, IrInstruction *source_instr, ZigType *type_entry,
23964static Error ir_make_type_info_value(IrAnalyze *ira, IrInst* source_instr, ZigType *type_entry,
2295923965 ZigValue **out)
2296023966{
2296123967 Error err;
......@@ -23543,22 +24549,20 @@ static Error ir_make_type_info_value(IrAnalyze *ira, IrInstruction *source_instr
2354324549 return ErrorNone;
2354424550}
2354524551
23546static IrInstruction *ir_analyze_instruction_type_info(IrAnalyze *ira,
23547 IrInstructionTypeInfo *instruction)
23548{
24552static IrInstGen *ir_analyze_instruction_type_info(IrAnalyze *ira, IrInstSrcTypeInfo *instruction) {
2354924553 Error err;
23550 IrInstruction *type_value = instruction->type_value->child;
24554 IrInstGen *type_value = instruction->type_value->child;
2355124555 ZigType *type_entry = ir_resolve_type(ira, type_value);
2355224556 if (type_is_invalid(type_entry))
23553 return ira->codegen->invalid_instruction;
24557 return ira->codegen->invalid_inst_gen;
2355424558
2355524559 ZigType *result_type = ir_type_info_get_type(ira, nullptr, nullptr);
2355624560
2355724561 ZigValue *payload;
23558 if ((err = ir_make_type_info_value(ira, &instruction->base, type_entry, &payload)))
23559 return ira->codegen->invalid_instruction;
24562 if ((err = ir_make_type_info_value(ira, &instruction->base.base, type_entry, &payload)))
24563 return ira->codegen->invalid_inst_gen;
2356024564
23561 IrInstruction *result = ir_const(ira, &instruction->base, result_type);
24565 IrInstGen *result = ir_const(ira, &instruction->base.base, result_type);
2356224566 ZigValue *out_val = result->value;
2356324567 bigint_init_unsigned(&out_val->data.x_union.tag, type_id_index(type_entry));
2356424568 out_val->data.x_union.payload = payload;
......@@ -23582,15 +24586,15 @@ static ZigValue *get_const_field(IrAnalyze *ira, AstNode *source_node, ZigValue
2358224586 return val;
2358324587}
2358424588
23585static Error get_const_field_sentinel(IrAnalyze *ira, IrInstruction *source_instr, ZigValue *struct_value,
24589static Error get_const_field_sentinel(IrAnalyze *ira, IrInst* source_instr, ZigValue *struct_value,
2358624590 const char *name, size_t field_index, ZigType *elem_type, ZigValue **result)
2358724591{
2358824592 ZigValue *field_val = get_const_field(ira, source_instr->source_node, struct_value, name, field_index);
2358924593 if (field_val == nullptr)
2359024594 return ErrorSemanticAnalyzeFail;
2359124595
23592 IrInstruction *field_inst = ir_const_move(ira, source_instr, field_val);
23593 IrInstruction *casted_field_inst = ir_implicit_cast(ira, field_inst,
24596 IrInstGen *field_inst = ir_const_move(ira, source_instr, field_val);
24597 IrInstGen *casted_field_inst = ir_implicit_cast(ira, field_inst,
2359424598 get_optional_type(ira->codegen, elem_type));
2359524599 if (type_is_invalid(casted_field_inst->value->type))
2359624600 return ErrorSemanticAnalyzeFail;
......@@ -23629,12 +24633,12 @@ static ZigType *get_const_field_meta_type(IrAnalyze *ira, AstNode *source_node,
2362924633{
2363024634 ZigValue *value = get_const_field(ira, source_node, struct_value, name, field_index);
2363124635 if (value == nullptr)
23632 return ira->codegen->invalid_instruction->value->type;
24636 return ira->codegen->invalid_inst_gen->value->type;
2363324637 assert(value->type == ira->codegen->builtin_types.entry_type);
2363424638 return value->data.x_type;
2363524639}
2363624640
23637static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, ZigTypeId tagTypeId, ZigValue *payload) {
24641static ZigType *type_info_to_type(IrAnalyze *ira, IrInst *source_instr, ZigTypeId tagTypeId, ZigValue *payload) {
2363824642 Error err;
2363924643 switch (tagTypeId) {
2364024644 case ZigTypeIdInvalid:
......@@ -23650,21 +24654,21 @@ static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, Zi
2365024654 case ZigTypeIdInt: {
2365124655 assert(payload->special == ConstValSpecialStatic);
2365224656 assert(payload->type == ir_type_info_get_type(ira, "Int", nullptr));
23653 BigInt *bi = get_const_field_lit_int(ira, instruction->source_node, payload, "bits", 1);
24657 BigInt *bi = get_const_field_lit_int(ira, source_instr->source_node, payload, "bits", 1);
2365424658 if (bi == nullptr)
23655 return ira->codegen->invalid_instruction->value->type;
24659 return ira->codegen->invalid_inst_gen->value->type;
2365624660 bool is_signed;
23657 if ((err = get_const_field_bool(ira, instruction->source_node, payload, "is_signed", 0, &is_signed)))
23658 return ira->codegen->invalid_instruction->value->type;
24661 if ((err = get_const_field_bool(ira, source_instr->source_node, payload, "is_signed", 0, &is_signed)))
24662 return ira->codegen->invalid_inst_gen->value->type;
2365924663 return get_int_type(ira->codegen, is_signed, bigint_as_u32(bi));
2366024664 }
2366124665 case ZigTypeIdFloat:
2366224666 {
2366324667 assert(payload->special == ConstValSpecialStatic);
2366424668 assert(payload->type == ir_type_info_get_type(ira, "Float", nullptr));
23665 BigInt *bi = get_const_field_lit_int(ira, instruction->source_node, payload, "bits", 0);
24669 BigInt *bi = get_const_field_lit_int(ira, source_instr->source_node, payload, "bits", 0);
2366624670 if (bi == nullptr)
23667 return ira->codegen->invalid_instruction->value->type;
24671 return ira->codegen->invalid_inst_gen->value->type;
2366824672 uint32_t bits = bigint_as_u32(bi);
2366924673 switch (bits) {
2367024674 case 16: return ira->codegen->builtin_types.entry_f16;
......@@ -23672,48 +24676,47 @@ static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, Zi
2367224676 case 64: return ira->codegen->builtin_types.entry_f64;
2367324677 case 128: return ira->codegen->builtin_types.entry_f128;
2367424678 }
23675 ir_add_error(ira, instruction,
23676 buf_sprintf("%d-bit float unsupported", bits));
23677 return ira->codegen->invalid_instruction->value->type;
24679 ir_add_error(ira, source_instr, buf_sprintf("%d-bit float unsupported", bits));
24680 return ira->codegen->invalid_inst_gen->value->type;
2367824681 }
2367924682 case ZigTypeIdPointer:
2368024683 {
2368124684 ZigType *type_info_pointer_type = ir_type_info_get_type(ira, "Pointer", nullptr);
2368224685 assert(payload->special == ConstValSpecialStatic);
2368324686 assert(payload->type == type_info_pointer_type);
23684 ZigValue *size_value = get_const_field(ira, instruction->source_node, payload, "size", 0);
24687 ZigValue *size_value = get_const_field(ira, source_instr->source_node, payload, "size", 0);
2368524688 assert(size_value->type == ir_type_info_get_type(ira, "Size", type_info_pointer_type));
2368624689 BuiltinPtrSize size_enum_index = (BuiltinPtrSize)bigint_as_u32(&size_value->data.x_enum_tag);
2368724690 PtrLen ptr_len = size_enum_index_to_ptr_len(size_enum_index);
23688 ZigType *elem_type = get_const_field_meta_type(ira, instruction->source_node, payload, "child", 4);
24691 ZigType *elem_type = get_const_field_meta_type(ira, source_instr->source_node, payload, "child", 4);
2368924692 if (type_is_invalid(elem_type))
23690 return ira->codegen->invalid_instruction->value->type;
24693 return ira->codegen->invalid_inst_gen->value->type;
2369124694 ZigValue *sentinel;
23692 if ((err = get_const_field_sentinel(ira, instruction, payload, "sentinel", 6,
24695 if ((err = get_const_field_sentinel(ira, source_instr, payload, "sentinel", 6,
2369324696 elem_type, &sentinel)))
2369424697 {
23695 return ira->codegen->invalid_instruction->value->type;
24698 return ira->codegen->invalid_inst_gen->value->type;
2369624699 }
23697 BigInt *bi = get_const_field_lit_int(ira, instruction->source_node, payload, "alignment", 3);
24700 BigInt *bi = get_const_field_lit_int(ira, source_instr->source_node, payload, "alignment", 3);
2369824701 if (bi == nullptr)
23699 return ira->codegen->invalid_instruction->value->type;
24702 return ira->codegen->invalid_inst_gen->value->type;
2370024703
2370124704 bool is_const;
23702 if ((err = get_const_field_bool(ira, instruction->source_node, payload, "is_const", 1, &is_const)))
23703 return ira->codegen->invalid_instruction->value->type;
24705 if ((err = get_const_field_bool(ira, source_instr->source_node, payload, "is_const", 1, &is_const)))
24706 return ira->codegen->invalid_inst_gen->value->type;
2370424707
2370524708 bool is_volatile;
23706 if ((err = get_const_field_bool(ira, instruction->source_node, payload, "is_volatile", 2,
24709 if ((err = get_const_field_bool(ira, source_instr->source_node, payload, "is_volatile", 2,
2370724710 &is_volatile)))
2370824711 {
23709 return ira->codegen->invalid_instruction->value->type;
24712 return ira->codegen->invalid_inst_gen->value->type;
2371024713 }
2371124714
2371224715 bool is_allowzero;
23713 if ((err = get_const_field_bool(ira, instruction->source_node, payload, "is_allowzero", 5,
24716 if ((err = get_const_field_bool(ira, source_instr->source_node, payload, "is_allowzero", 5,
2371424717 &is_allowzero)))
2371524718 {
23716 return ira->codegen->invalid_instruction->value->type;
24719 return ira->codegen->invalid_inst_gen->value->type;
2371724720 }
2371824721
2371924722
......@@ -23734,18 +24737,18 @@ static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, Zi
2373424737 case ZigTypeIdArray: {
2373524738 assert(payload->special == ConstValSpecialStatic);
2373624739 assert(payload->type == ir_type_info_get_type(ira, "Array", nullptr));
23737 ZigType *elem_type = get_const_field_meta_type(ira, instruction->source_node, payload, "child", 1);
24740 ZigType *elem_type = get_const_field_meta_type(ira, source_instr->source_node, payload, "child", 1);
2373824741 if (type_is_invalid(elem_type))
23739 return ira->codegen->invalid_instruction->value->type;
24742 return ira->codegen->invalid_inst_gen->value->type;
2374024743 ZigValue *sentinel;
23741 if ((err = get_const_field_sentinel(ira, instruction, payload, "sentinel", 2,
24744 if ((err = get_const_field_sentinel(ira, source_instr, payload, "sentinel", 2,
2374224745 elem_type, &sentinel)))
2374324746 {
23744 return ira->codegen->invalid_instruction->value->type;
24747 return ira->codegen->invalid_inst_gen->value->type;
2374524748 }
23746 BigInt *bi = get_const_field_lit_int(ira, instruction->source_node, payload, "len", 0);
24749 BigInt *bi = get_const_field_lit_int(ira, source_instr->source_node, payload, "len", 0);
2374724750 if (bi == nullptr)
23748 return ira->codegen->invalid_instruction->value->type;
24751 return ira->codegen->invalid_inst_gen->value->type;
2374924752 return get_array_type(ira->codegen, elem_type, bigint_as_u64(bi), sentinel);
2375024753 }
2375124754 case ZigTypeIdComptimeFloat:
......@@ -23765,78 +24768,77 @@ static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, Zi
2376524768 case ZigTypeIdAnyFrame:
2376624769 case ZigTypeIdVector:
2376724770 case ZigTypeIdEnumLiteral:
23768 ir_add_error(ira, instruction, buf_sprintf(
24771 ir_add_error(ira, source_instr, buf_sprintf(
2376924772 "TODO implement @Type for 'TypeInfo.%s': see https://github.com/ziglang/zig/issues/2907", type_id_name(tagTypeId)));
23770 return ira->codegen->invalid_instruction->value->type;
24773 return ira->codegen->invalid_inst_gen->value->type;
2377124774 case ZigTypeIdUnion:
2377224775 case ZigTypeIdFn:
2377324776 case ZigTypeIdBoundFn:
2377424777 case ZigTypeIdStruct:
23775 ir_add_error(ira, instruction, buf_sprintf(
24778 ir_add_error(ira, source_instr, buf_sprintf(
2377624779 "@Type not availble for 'TypeInfo.%s'", type_id_name(tagTypeId)));
23777 return ira->codegen->invalid_instruction->value->type;
24780 return ira->codegen->invalid_inst_gen->value->type;
2377824781 }
2377924782 zig_unreachable();
2378024783}
2378124784
23782static IrInstruction *ir_analyze_instruction_type(IrAnalyze *ira, IrInstructionType *instruction) {
23783 IrInstruction *type_info_ir = instruction->type_info->child;
23784 if (type_is_invalid(type_info_ir->value->type))
23785 return ira->codegen->invalid_instruction;
24785static IrInstGen *ir_analyze_instruction_type(IrAnalyze *ira, IrInstSrcType *instruction) {
24786 IrInstGen *uncasted_type_info = instruction->type_info->child;
24787 if (type_is_invalid(uncasted_type_info->value->type))
24788 return ira->codegen->invalid_inst_gen;
2378624789
23787 IrInstruction *casted_ir = ir_implicit_cast(ira, type_info_ir, ir_type_info_get_type(ira, nullptr, nullptr));
23788 if (type_is_invalid(casted_ir->value->type))
23789 return ira->codegen->invalid_instruction;
24790 IrInstGen *type_info = ir_implicit_cast(ira, uncasted_type_info, ir_type_info_get_type(ira, nullptr, nullptr));
24791 if (type_is_invalid(type_info->value->type))
24792 return ira->codegen->invalid_inst_gen;
2379024793
23791 ZigValue *type_info_value = ir_resolve_const(ira, casted_ir, UndefBad);
23792 if (!type_info_value)
23793 return ira->codegen->invalid_instruction;
23794 ZigTypeId typeId = type_id_at_index(bigint_as_usize(&type_info_value->data.x_union.tag));
23795 ZigType *type = type_info_to_type(ira, type_info_ir, typeId, type_info_value->data.x_union.payload);
24794 ZigValue *type_info_val = ir_resolve_const(ira, type_info, UndefBad);
24795 if (type_info_val == nullptr)
24796 return ira->codegen->invalid_inst_gen;
24797 ZigTypeId type_id_tag = type_id_at_index(bigint_as_usize(&type_info_val->data.x_union.tag));
24798 ZigType *type = type_info_to_type(ira, &uncasted_type_info->base, type_id_tag,
24799 type_info_val->data.x_union.payload);
2379624800 if (type_is_invalid(type))
23797 return ira->codegen->invalid_instruction;
23798 return ir_const_type(ira, &instruction->base, type);
24801 return ira->codegen->invalid_inst_gen;
24802 return ir_const_type(ira, &instruction->base.base, type);
2379924803}
2380024804
23801static IrInstruction *ir_analyze_instruction_type_id(IrAnalyze *ira,
23802 IrInstructionTypeId *instruction)
23803{
23804 IrInstruction *type_value = instruction->type_value->child;
24805static IrInstGen *ir_analyze_instruction_type_id(IrAnalyze *ira, IrInstSrcTypeId *instruction) {
24806 IrInstGen *type_value = instruction->type_value->child;
2380524807 ZigType *type_entry = ir_resolve_type(ira, type_value);
2380624808 if (type_is_invalid(type_entry))
23807 return ira->codegen->invalid_instruction;
24809 return ira->codegen->invalid_inst_gen;
2380824810
2380924811 ZigType *result_type = get_builtin_type(ira->codegen, "TypeId");
2381024812
23811 IrInstruction *result = ir_const(ira, &instruction->base, result_type);
24813 IrInstGen *result = ir_const(ira, &instruction->base.base, result_type);
2381224814 bigint_init_unsigned(&result->value->data.x_enum_tag, type_id_index(type_entry));
2381324815 return result;
2381424816}
2381524817
23816static IrInstruction *ir_analyze_instruction_set_eval_branch_quota(IrAnalyze *ira,
23817 IrInstructionSetEvalBranchQuota *instruction)
24818static IrInstGen *ir_analyze_instruction_set_eval_branch_quota(IrAnalyze *ira,
24819 IrInstSrcSetEvalBranchQuota *instruction)
2381824820{
2381924821 uint64_t new_quota;
2382024822 if (!ir_resolve_usize(ira, instruction->new_quota->child, &new_quota))
23821 return ira->codegen->invalid_instruction;
24823 return ira->codegen->invalid_inst_gen;
2382224824
2382324825 if (new_quota > *ira->new_irb.exec->backward_branch_quota) {
2382424826 *ira->new_irb.exec->backward_branch_quota = new_quota;
2382524827 }
2382624828
23827 return ir_const_void(ira, &instruction->base);
24829 return ir_const_void(ira, &instruction->base.base);
2382824830}
2382924831
23830static IrInstruction *ir_analyze_instruction_type_name(IrAnalyze *ira, IrInstructionTypeName *instruction) {
23831 IrInstruction *type_value = instruction->type_value->child;
24832static IrInstGen *ir_analyze_instruction_type_name(IrAnalyze *ira, IrInstSrcTypeName *instruction) {
24833 IrInstGen *type_value = instruction->type_value->child;
2383224834 ZigType *type_entry = ir_resolve_type(ira, type_value);
2383324835 if (type_is_invalid(type_entry))
23834 return ira->codegen->invalid_instruction;
24836 return ira->codegen->invalid_inst_gen;
2383524837
2383624838 if (!type_entry->cached_const_name_val) {
2383724839 type_entry->cached_const_name_val = create_const_str_lit(ira->codegen, type_bare_name(type_entry));
2383824840 }
23839 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
24841 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
2384024842 copy_const_val(result->value, type_entry->cached_const_name_val);
2384124843 return result;
2384224844}
......@@ -23848,23 +24850,30 @@ static void ir_cimport_cache_paths(Buf *cache_dir, Buf *tmp_c_file_digest, Buf *
2384824850 buf_ptr(cache_dir), buf_ptr(tmp_c_file_digest));
2384924851 buf_appendf(out_zig_path, "%s" OS_SEP "cimport.zig", buf_ptr(out_zig_dir));
2385024852}
23851static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstructionCImport *instruction) {
24853static IrInstGen *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstSrcCImport *instruction) {
2385224854 Error err;
23853 AstNode *node = instruction->base.source_node;
24855 AstNode *node = instruction->base.base.source_node;
2385424856 assert(node->type == NodeTypeFnCallExpr);
2385524857 AstNode *block_node = node->data.fn_call_expr.params.at(0);
2385624858
23857 ScopeCImport *cimport_scope = create_cimport_scope(ira->codegen, node, instruction->base.scope);
24859 ScopeCImport *cimport_scope = create_cimport_scope(ira->codegen, node, instruction->base.base.scope);
2385824860
2385924861 // Execute the C import block like an inline function
2386024862 ZigType *void_type = ira->codegen->builtin_types.entry_void;
23861 ZigValue *cimport_result = ir_eval_const_value(ira->codegen, &cimport_scope->base, block_node, void_type,
24863 ZigValue *cimport_result;
24864 ZigValue *result_ptr;
24865 create_result_ptr(ira->codegen, void_type, &cimport_result, &result_ptr);
24866 if ((err = ir_eval_const_value(ira->codegen, &cimport_scope->base, block_node, result_ptr,
2386224867 ira->new_irb.exec->backward_branch_count, ira->new_irb.exec->backward_branch_quota, nullptr,
23863 &cimport_scope->buf, block_node, nullptr, nullptr, nullptr, UndefBad);
24868 &cimport_scope->buf, block_node, nullptr, nullptr, nullptr, UndefBad)))
24869 {
24870 return ira->codegen->invalid_inst_gen;
24871 }
2386424872 if (type_is_invalid(cimport_result->type))
23865 return ira->codegen->invalid_instruction;
24873 return ira->codegen->invalid_inst_gen;
24874 destroy(result_ptr, "ZigValue");
2386624875
23867 ZigPackage *cur_scope_pkg = scope_package(instruction->base.scope);
24876 ZigPackage *cur_scope_pkg = scope_package(instruction->base.base.scope);
2386824877 Buf *namespace_name = buf_sprintf("%s.cimport:%" ZIG_PRI_usize ":%" ZIG_PRI_usize,
2386924878 buf_ptr(&cur_scope_pkg->pkg_path), node->line + 1, node->column + 1);
2387024879
......@@ -23876,7 +24885,7 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
2387624885 CacheHash *cache_hash;
2387724886 if ((err = create_c_object_cache(ira->codegen, &cache_hash, false))) {
2387824887 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to create cache: %s", err_str(err)));
23879 return ira->codegen->invalid_instruction;
24888 return ira->codegen->invalid_inst_gen;
2388024889 }
2388124890 cache_buf(cache_hash, &cimport_scope->buf);
2388224891
......@@ -23888,7 +24897,7 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
2388824897 if ((err = cache_hit(cache_hash, &tmp_c_file_digest))) {
2388924898 if (err != ErrorInvalidFormat) {
2389024899 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to check cache: %s", err_str(err)));
23891 return ira->codegen->invalid_instruction;
24900 return ira->codegen->invalid_inst_gen;
2389224901 }
2389324902 }
2389424903 ira->codegen->caches_to_release.append(cache_hash);
......@@ -23907,12 +24916,12 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
2390724916
2390824917 if ((err = os_make_path(tmp_c_file_dir))) {
2390924918 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to make dir: %s", err_str(err)));
23910 return ira->codegen->invalid_instruction;
24919 return ira->codegen->invalid_inst_gen;
2391124920 }
2391224921
2391324922 if ((err = os_write_file(&tmp_c_file_path, &cimport_scope->buf))) {
2391424923 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to write .h file: %s", err_str(err)));
23915 return ira->codegen->invalid_instruction;
24924 return ira->codegen->invalid_inst_gen;
2391624925 }
2391724926 if (ira->codegen->verbose_cimport) {
2391824927 fprintf(stderr, "@cImport source: %s\n", buf_ptr(&tmp_c_file_path));
......@@ -23947,7 +24956,7 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
2394724956 {
2394824957 if (err != ErrorCCompileErrors) {
2394924958 ir_add_error_node(ira, node, buf_sprintf("C import failed: %s", err_str(err)));
23950 return ira->codegen->invalid_instruction;
24959 return ira->codegen->invalid_inst_gen;
2395124960 }
2395224961
2395324962 ErrorMsg *parent_err_msg = ir_add_error_node(ira, node, buf_sprintf("C import failed"));
......@@ -23968,7 +24977,7 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
2396824977 }
2396924978 }
2397024979
23971 return ira->codegen->invalid_instruction;
24980 return ira->codegen->invalid_inst_gen;
2397224981 }
2397324982 if (ira->codegen->verbose_cimport) {
2397424983 fprintf(stderr, "@cImport .d file: %s\n", buf_ptr(tmp_dep_file));
......@@ -23976,29 +24985,29 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
2397624985
2397724986 if ((err = cache_add_dep_file(cache_hash, tmp_dep_file, false))) {
2397824987 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to parse .d file: %s", err_str(err)));
23979 return ira->codegen->invalid_instruction;
24988 return ira->codegen->invalid_inst_gen;
2398024989 }
2398124990 if ((err = cache_final(cache_hash, &tmp_c_file_digest))) {
2398224991 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to finalize cache: %s", err_str(err)));
23983 return ira->codegen->invalid_instruction;
24992 return ira->codegen->invalid_inst_gen;
2398424993 }
2398524994
2398624995 ir_cimport_cache_paths(ira->codegen->cache_dir, &tmp_c_file_digest, out_zig_dir, out_zig_path);
2398724996 if ((err = os_make_path(out_zig_dir))) {
2398824997 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to make output dir: %s", err_str(err)));
23989 return ira->codegen->invalid_instruction;
24998 return ira->codegen->invalid_inst_gen;
2399024999 }
2399125000 FILE *out_file = fopen(buf_ptr(out_zig_path), "wb");
2399225001 if (out_file == nullptr) {
2399325002 ir_add_error_node(ira, node,
2399425003 buf_sprintf("C import failed: unable to open output file: %s", strerror(errno)));
23995 return ira->codegen->invalid_instruction;
25004 return ira->codegen->invalid_inst_gen;
2399625005 }
2399725006 stage2_render_ast(ast, out_file);
2399825007 if (fclose(out_file) != 0) {
2399925008 ir_add_error_node(ira, node,
2400025009 buf_sprintf("C import failed: unable to write to output file: %s", strerror(errno)));
24001 return ira->codegen->invalid_instruction;
25010 return ira->codegen->invalid_inst_gen;
2400225011 }
2400325012
2400425013 if (ira->codegen->verbose_cimport) {
......@@ -24017,90 +25026,90 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
2401725026 if ((err = file_fetch(ira->codegen, out_zig_path, import_code))) {
2401825027 ir_add_error_node(ira, node,
2401925028 buf_sprintf("unable to open '%s': %s", buf_ptr(out_zig_path), err_str(err)));
24020 return ira->codegen->invalid_instruction;
25029 return ira->codegen->invalid_inst_gen;
2402125030 }
2402225031 ZigType *child_import = add_source_file(ira->codegen, cimport_pkg, out_zig_path,
2402325032 import_code, SourceKindCImport);
24024 return ir_const_type(ira, &instruction->base, child_import);
25033 return ir_const_type(ira, &instruction->base.base, child_import);
2402525034}
2402625035
24027static IrInstruction *ir_analyze_instruction_c_include(IrAnalyze *ira, IrInstructionCInclude *instruction) {
24028 IrInstruction *name_value = instruction->name->child;
25036static IrInstGen *ir_analyze_instruction_c_include(IrAnalyze *ira, IrInstSrcCInclude *instruction) {
25037 IrInstGen *name_value = instruction->name->child;
2402925038 if (type_is_invalid(name_value->value->type))
24030 return ira->codegen->invalid_instruction;
25039 return ira->codegen->invalid_inst_gen;
2403125040
2403225041 Buf *include_name = ir_resolve_str(ira, name_value);
2403325042 if (!include_name)
24034 return ira->codegen->invalid_instruction;
25043 return ira->codegen->invalid_inst_gen;
2403525044
24036 Buf *c_import_buf = exec_c_import_buf(ira->new_irb.exec);
25045 Buf *c_import_buf = ira->new_irb.exec->c_import_buf;
2403725046 // We check for this error in pass1
2403825047 assert(c_import_buf);
2403925048
2404025049 buf_appendf(c_import_buf, "#include <%s>\n", buf_ptr(include_name));
2404125050
24042 return ir_const_void(ira, &instruction->base);
25051 return ir_const_void(ira, &instruction->base.base);
2404325052}
2404425053
24045static IrInstruction *ir_analyze_instruction_c_define(IrAnalyze *ira, IrInstructionCDefine *instruction) {
24046 IrInstruction *name = instruction->name->child;
25054static IrInstGen *ir_analyze_instruction_c_define(IrAnalyze *ira, IrInstSrcCDefine *instruction) {
25055 IrInstGen *name = instruction->name->child;
2404725056 if (type_is_invalid(name->value->type))
24048 return ira->codegen->invalid_instruction;
25057 return ira->codegen->invalid_inst_gen;
2404925058
2405025059 Buf *define_name = ir_resolve_str(ira, name);
2405125060 if (!define_name)
24052 return ira->codegen->invalid_instruction;
25061 return ira->codegen->invalid_inst_gen;
2405325062
24054 IrInstruction *value = instruction->value->child;
25063 IrInstGen *value = instruction->value->child;
2405525064 if (type_is_invalid(value->value->type))
24056 return ira->codegen->invalid_instruction;
25065 return ira->codegen->invalid_inst_gen;
2405725066
2405825067 Buf *define_value = nullptr;
2405925068 // The second parameter is either a string or void (equivalent to "")
2406025069 if (value->value->type->id != ZigTypeIdVoid) {
2406125070 define_value = ir_resolve_str(ira, value);
2406225071 if (!define_value)
24063 return ira->codegen->invalid_instruction;
25072 return ira->codegen->invalid_inst_gen;
2406425073 }
2406525074
24066 Buf *c_import_buf = exec_c_import_buf(ira->new_irb.exec);
25075 Buf *c_import_buf = ira->new_irb.exec->c_import_buf;
2406725076 // We check for this error in pass1
2406825077 assert(c_import_buf);
2406925078
2407025079 buf_appendf(c_import_buf, "#define %s %s\n", buf_ptr(define_name),
2407125080 define_value ? buf_ptr(define_value) : "");
2407225081
24073 return ir_const_void(ira, &instruction->base);
25082 return ir_const_void(ira, &instruction->base.base);
2407425083}
2407525084
24076static IrInstruction *ir_analyze_instruction_c_undef(IrAnalyze *ira, IrInstructionCUndef *instruction) {
24077 IrInstruction *name = instruction->name->child;
25085static IrInstGen *ir_analyze_instruction_c_undef(IrAnalyze *ira, IrInstSrcCUndef *instruction) {
25086 IrInstGen *name = instruction->name->child;
2407825087 if (type_is_invalid(name->value->type))
24079 return ira->codegen->invalid_instruction;
25088 return ira->codegen->invalid_inst_gen;
2408025089
2408125090 Buf *undef_name = ir_resolve_str(ira, name);
2408225091 if (!undef_name)
24083 return ira->codegen->invalid_instruction;
25092 return ira->codegen->invalid_inst_gen;
2408425093
24085 Buf *c_import_buf = exec_c_import_buf(ira->new_irb.exec);
25094 Buf *c_import_buf = ira->new_irb.exec->c_import_buf;
2408625095 // We check for this error in pass1
2408725096 assert(c_import_buf);
2408825097
2408925098 buf_appendf(c_import_buf, "#undef %s\n", buf_ptr(undef_name));
2409025099
24091 return ir_const_void(ira, &instruction->base);
25100 return ir_const_void(ira, &instruction->base.base);
2409225101}
2409325102
24094static IrInstruction *ir_analyze_instruction_embed_file(IrAnalyze *ira, IrInstructionEmbedFile *instruction) {
24095 IrInstruction *name = instruction->name->child;
25103static IrInstGen *ir_analyze_instruction_embed_file(IrAnalyze *ira, IrInstSrcEmbedFile *instruction) {
25104 IrInstGen *name = instruction->name->child;
2409625105 if (type_is_invalid(name->value->type))
24097 return ira->codegen->invalid_instruction;
25106 return ira->codegen->invalid_inst_gen;
2409825107
2409925108 Buf *rel_file_path = ir_resolve_str(ira, name);
2410025109 if (!rel_file_path)
24101 return ira->codegen->invalid_instruction;
25110 return ira->codegen->invalid_inst_gen;
2410225111
24103 ZigType *import = get_scope_import(instruction->base.scope);
25112 ZigType *import = get_scope_import(instruction->base.base.scope);
2410425113 // figure out absolute path to resource
2410525114 Buf source_dir_path = BUF_INIT;
2410625115 os_path_dirname(import->data.structure.root_struct->path, &source_dir_path);
......@@ -24117,93 +25126,95 @@ static IrInstruction *ir_analyze_instruction_embed_file(IrAnalyze *ira, IrInstru
2411725126 Error err;
2411825127 if ((err = file_fetch(ira->codegen, file_path, file_contents))) {
2411925128 if (err == ErrorFileNotFound) {
24120 ir_add_error(ira, instruction->name, buf_sprintf("unable to find '%s'", buf_ptr(file_path)));
24121 return ira->codegen->invalid_instruction;
25129 ir_add_error(ira, &instruction->name->base,
25130 buf_sprintf("unable to find '%s'", buf_ptr(file_path)));
25131 return ira->codegen->invalid_inst_gen;
2412225132 } else {
24123 ir_add_error(ira, instruction->name, buf_sprintf("unable to open '%s': %s", buf_ptr(file_path), err_str(err)));
24124 return ira->codegen->invalid_instruction;
25133 ir_add_error(ira, &instruction->name->base,
25134 buf_sprintf("unable to open '%s': %s", buf_ptr(file_path), err_str(err)));
25135 return ira->codegen->invalid_inst_gen;
2412525136 }
2412625137 }
2412725138
2412825139 ZigType *result_type = get_array_type(ira->codegen,
2412925140 ira->codegen->builtin_types.entry_u8, buf_len(file_contents), nullptr);
24130 IrInstruction *result = ir_const(ira, &instruction->base, result_type);
25141 IrInstGen *result = ir_const(ira, &instruction->base.base, result_type);
2413125142 init_const_str_lit(ira->codegen, result->value, file_contents);
2413225143 return result;
2413325144}
2413425145
24135static IrInstruction *ir_analyze_instruction_cmpxchg(IrAnalyze *ira, IrInstructionCmpxchgSrc *instruction) {
25146static IrInstGen *ir_analyze_instruction_cmpxchg(IrAnalyze *ira, IrInstSrcCmpxchg *instruction) {
2413625147 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->type_value->child);
2413725148 if (type_is_invalid(operand_type))
24138 return ira->codegen->invalid_instruction;
25149 return ira->codegen->invalid_inst_gen;
2413925150
2414025151 if (operand_type->id == ZigTypeIdFloat) {
24141 ir_add_error(ira, instruction->type_value->child,
25152 ir_add_error(ira, &instruction->type_value->child->base,
2414225153 buf_sprintf("expected integer, enum or pointer type, found '%s'", buf_ptr(&operand_type->name)));
24143 return ira->codegen->invalid_instruction;
25154 return ira->codegen->invalid_inst_gen;
2414425155 }
2414525156
24146 IrInstruction *ptr = instruction->ptr->child;
25157 IrInstGen *ptr = instruction->ptr->child;
2414725158 if (type_is_invalid(ptr->value->type))
24148 return ira->codegen->invalid_instruction;
25159 return ira->codegen->invalid_inst_gen;
2414925160
2415025161 // TODO let this be volatile
2415125162 ZigType *ptr_type = get_pointer_to_type(ira->codegen, operand_type, false);
24152 IrInstruction *casted_ptr = ir_implicit_cast(ira, ptr, ptr_type);
25163 IrInstGen *casted_ptr = ir_implicit_cast2(ira, &instruction->ptr->base, ptr, ptr_type);
2415325164 if (type_is_invalid(casted_ptr->value->type))
24154 return ira->codegen->invalid_instruction;
25165 return ira->codegen->invalid_inst_gen;
2415525166
24156 IrInstruction *cmp_value = instruction->cmp_value->child;
25167 IrInstGen *cmp_value = instruction->cmp_value->child;
2415725168 if (type_is_invalid(cmp_value->value->type))
24158 return ira->codegen->invalid_instruction;
25169 return ira->codegen->invalid_inst_gen;
2415925170
24160 IrInstruction *new_value = instruction->new_value->child;
25171 IrInstGen *new_value = instruction->new_value->child;
2416125172 if (type_is_invalid(new_value->value->type))
24162 return ira->codegen->invalid_instruction;
25173 return ira->codegen->invalid_inst_gen;
2416325174
24164 IrInstruction *success_order_value = instruction->success_order_value->child;
25175 IrInstGen *success_order_value = instruction->success_order_value->child;
2416525176 if (type_is_invalid(success_order_value->value->type))
24166 return ira->codegen->invalid_instruction;
25177 return ira->codegen->invalid_inst_gen;
2416725178
2416825179 AtomicOrder success_order;
2416925180 if (!ir_resolve_atomic_order(ira, success_order_value, &success_order))
24170 return ira->codegen->invalid_instruction;
25181 return ira->codegen->invalid_inst_gen;
2417125182
24172 IrInstruction *failure_order_value = instruction->failure_order_value->child;
25183 IrInstGen *failure_order_value = instruction->failure_order_value->child;
2417325184 if (type_is_invalid(failure_order_value->value->type))
24174 return ira->codegen->invalid_instruction;
25185 return ira->codegen->invalid_inst_gen;
2417525186
2417625187 AtomicOrder failure_order;
2417725188 if (!ir_resolve_atomic_order(ira, failure_order_value, &failure_order))
24178 return ira->codegen->invalid_instruction;
25189 return ira->codegen->invalid_inst_gen;
2417925190
24180 IrInstruction *casted_cmp_value = ir_implicit_cast(ira, cmp_value, operand_type);
25191 IrInstGen *casted_cmp_value = ir_implicit_cast2(ira, &instruction->cmp_value->base, cmp_value, operand_type);
2418125192 if (type_is_invalid(casted_cmp_value->value->type))
24182 return ira->codegen->invalid_instruction;
25193 return ira->codegen->invalid_inst_gen;
2418325194
24184 IrInstruction *casted_new_value = ir_implicit_cast(ira, new_value, operand_type);
25195 IrInstGen *casted_new_value = ir_implicit_cast2(ira, &instruction->new_value->base, new_value, operand_type);
2418525196 if (type_is_invalid(casted_new_value->value->type))
24186 return ira->codegen->invalid_instruction;
25197 return ira->codegen->invalid_inst_gen;
2418725198
2418825199 if (success_order < AtomicOrderMonotonic) {
24189 ir_add_error(ira, success_order_value,
25200 ir_add_error(ira, &success_order_value->base,
2419025201 buf_sprintf("success atomic ordering must be Monotonic or stricter"));
24191 return ira->codegen->invalid_instruction;
25202 return ira->codegen->invalid_inst_gen;
2419225203 }
2419325204 if (failure_order < AtomicOrderMonotonic) {
24194 ir_add_error(ira, failure_order_value,
25205 ir_add_error(ira, &failure_order_value->base,
2419525206 buf_sprintf("failure atomic ordering must be Monotonic or stricter"));
24196 return ira->codegen->invalid_instruction;
25207 return ira->codegen->invalid_inst_gen;
2419725208 }
2419825209 if (failure_order > success_order) {
24199 ir_add_error(ira, failure_order_value,
25210 ir_add_error(ira, &failure_order_value->base,
2420025211 buf_sprintf("failure atomic ordering must be no stricter than success"));
24201 return ira->codegen->invalid_instruction;
25212 return ira->codegen->invalid_inst_gen;
2420225213 }
2420325214 if (failure_order == AtomicOrderRelease || failure_order == AtomicOrderAcqRel) {
24204 ir_add_error(ira, failure_order_value,
25215 ir_add_error(ira, &failure_order_value->base,
2420525216 buf_sprintf("failure atomic ordering must not be Release or AcqRel"));
24206 return ira->codegen->invalid_instruction;
25217 return ira->codegen->invalid_inst_gen;
2420725218 }
2420825219
2420925220 if (instr_is_comptime(casted_ptr) && casted_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar &&
......@@ -24212,152 +25223,146 @@ static IrInstruction *ir_analyze_instruction_cmpxchg(IrAnalyze *ira, IrInstructi
2421225223 }
2421325224
2421425225 ZigType *result_type = get_optional_type(ira->codegen, operand_type);
24215 IrInstruction *result_loc;
25226 IrInstGen *result_loc;
2421625227 if (handle_is_ptr(result_type)) {
24217 result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,
24218 result_type, nullptr, true, false, true);
24219 if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {
25228 result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
25229 result_type, nullptr, true, true);
25230 if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
2422025231 return result_loc;
2422125232 }
2422225233 } else {
2422325234 result_loc = nullptr;
2422425235 }
2422525236
24226 return ir_build_cmpxchg_gen(ira, &instruction->base, result_type,
25237 return ir_build_cmpxchg_gen(ira, &instruction->base.base, result_type,
2422725238 casted_ptr, casted_cmp_value, casted_new_value,
2422825239 success_order, failure_order, instruction->is_weak, result_loc);
2422925240}
2423025241
24231static IrInstruction *ir_analyze_instruction_fence(IrAnalyze *ira, IrInstructionFence *instruction) {
24232 IrInstruction *order_value = instruction->order_value->child;
24233 if (type_is_invalid(order_value->value->type))
24234 return ira->codegen->invalid_instruction;
25242static IrInstGen *ir_analyze_instruction_fence(IrAnalyze *ira, IrInstSrcFence *instruction) {
25243 IrInstGen *order_inst = instruction->order->child;
25244 if (type_is_invalid(order_inst->value->type))
25245 return ira->codegen->invalid_inst_gen;
2423525246
2423625247 AtomicOrder order;
24237 if (!ir_resolve_atomic_order(ira, order_value, &order))
24238 return ira->codegen->invalid_instruction;
25248 if (!ir_resolve_atomic_order(ira, order_inst, &order))
25249 return ira->codegen->invalid_inst_gen;
2423925250
2424025251 if (order < AtomicOrderAcquire) {
24241 ir_add_error(ira, order_value,
25252 ir_add_error(ira, &order_inst->base,
2424225253 buf_sprintf("atomic ordering must be Acquire or stricter"));
24243 return ira->codegen->invalid_instruction;
25254 return ira->codegen->invalid_inst_gen;
2424425255 }
2424525256
24246 IrInstruction *result = ir_build_fence(&ira->new_irb,
24247 instruction->base.scope, instruction->base.source_node, order_value, order);
24248 result->value->type = ira->codegen->builtin_types.entry_void;
24249 return result;
25257 return ir_build_fence_gen(ira, &instruction->base.base, order);
2425025258}
2425125259
24252static IrInstruction *ir_analyze_instruction_truncate(IrAnalyze *ira, IrInstructionTruncate *instruction) {
24253 IrInstruction *dest_type_value = instruction->dest_type->child;
25260static IrInstGen *ir_analyze_instruction_truncate(IrAnalyze *ira, IrInstSrcTruncate *instruction) {
25261 IrInstGen *dest_type_value = instruction->dest_type->child;
2425425262 ZigType *dest_type = ir_resolve_type(ira, dest_type_value);
2425525263 if (type_is_invalid(dest_type))
24256 return ira->codegen->invalid_instruction;
25264 return ira->codegen->invalid_inst_gen;
2425725265
2425825266 if (dest_type->id != ZigTypeIdInt &&
2425925267 dest_type->id != ZigTypeIdComptimeInt)
2426025268 {
24261 ir_add_error(ira, dest_type_value, buf_sprintf("expected integer type, found '%s'", buf_ptr(&dest_type->name)));
24262 return ira->codegen->invalid_instruction;
25269 ir_add_error(ira, &dest_type_value->base, buf_sprintf("expected integer type, found '%s'", buf_ptr(&dest_type->name)));
25270 return ira->codegen->invalid_inst_gen;
2426325271 }
2426425272
24265 IrInstruction *target = instruction->target->child;
25273 IrInstGen *target = instruction->target->child;
2426625274 ZigType *src_type = target->value->type;
2426725275 if (type_is_invalid(src_type))
24268 return ira->codegen->invalid_instruction;
25276 return ira->codegen->invalid_inst_gen;
2426925277
2427025278 if (src_type->id != ZigTypeIdInt &&
2427125279 src_type->id != ZigTypeIdComptimeInt)
2427225280 {
24273 ir_add_error(ira, target, buf_sprintf("expected integer type, found '%s'", buf_ptr(&src_type->name)));
24274 return ira->codegen->invalid_instruction;
25281 ir_add_error(ira, &target->base, buf_sprintf("expected integer type, found '%s'", buf_ptr(&src_type->name)));
25282 return ira->codegen->invalid_inst_gen;
2427525283 }
2427625284
2427725285 if (dest_type->id == ZigTypeIdComptimeInt) {
24278 return ir_implicit_cast(ira, target, dest_type);
25286 return ir_implicit_cast2(ira, &instruction->target->base, target, dest_type);
2427925287 }
2428025288
2428125289 if (instr_is_comptime(target)) {
2428225290 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
2428325291 if (val == nullptr)
24284 return ira->codegen->invalid_instruction;
25292 return ira->codegen->invalid_inst_gen;
2428525293
24286 IrInstruction *result = ir_const(ira, &instruction->base, dest_type);
25294 IrInstGen *result = ir_const(ira, &instruction->base.base, dest_type);
2428725295 bigint_truncate(&result->value->data.x_bigint, &val->data.x_bigint,
2428825296 dest_type->data.integral.bit_count, dest_type->data.integral.is_signed);
2428925297 return result;
2429025298 }
2429125299
2429225300 if (src_type->data.integral.bit_count == 0 || dest_type->data.integral.bit_count == 0) {
24293 IrInstruction *result = ir_const(ira, &instruction->base, dest_type);
25301 IrInstGen *result = ir_const(ira, &instruction->base.base, dest_type);
2429425302 bigint_init_unsigned(&result->value->data.x_bigint, 0);
2429525303 return result;
2429625304 }
2429725305
2429825306 if (src_type->data.integral.is_signed != dest_type->data.integral.is_signed) {
2429925307 const char *sign_str = dest_type->data.integral.is_signed ? "signed" : "unsigned";
24300 ir_add_error(ira, target, buf_sprintf("expected %s integer type, found '%s'", sign_str, buf_ptr(&src_type->name)));
24301 return ira->codegen->invalid_instruction;
25308 ir_add_error(ira, &target->base, buf_sprintf("expected %s integer type, found '%s'", sign_str, buf_ptr(&src_type->name)));
25309 return ira->codegen->invalid_inst_gen;
2430225310 } else if (src_type->data.integral.bit_count < dest_type->data.integral.bit_count) {
24303 ir_add_error(ira, target, buf_sprintf("type '%s' has fewer bits than destination type '%s'",
25311 ir_add_error(ira, &target->base, buf_sprintf("type '%s' has fewer bits than destination type '%s'",
2430425312 buf_ptr(&src_type->name), buf_ptr(&dest_type->name)));
24305 return ira->codegen->invalid_instruction;
25313 return ira->codegen->invalid_inst_gen;
2430625314 }
2430725315
24308 IrInstruction *new_instruction = ir_build_truncate(&ira->new_irb, instruction->base.scope,
24309 instruction->base.source_node, dest_type_value, target);
24310 new_instruction->value->type = dest_type;
24311 return new_instruction;
25316 return ir_build_truncate_gen(ira, &instruction->base.base, dest_type, target);
2431225317}
2431325318
24314static IrInstruction *ir_analyze_instruction_int_cast(IrAnalyze *ira, IrInstructionIntCast *instruction) {
25319static IrInstGen *ir_analyze_instruction_int_cast(IrAnalyze *ira, IrInstSrcIntCast *instruction) {
2431525320 ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);
2431625321 if (type_is_invalid(dest_type))
24317 return ira->codegen->invalid_instruction;
25322 return ira->codegen->invalid_inst_gen;
2431825323
2431925324 if (dest_type->id != ZigTypeIdInt && dest_type->id != ZigTypeIdComptimeInt) {
24320 ir_add_error(ira, instruction->dest_type, buf_sprintf("expected integer type, found '%s'", buf_ptr(&dest_type->name)));
24321 return ira->codegen->invalid_instruction;
25325 ir_add_error(ira, &instruction->dest_type->base, buf_sprintf("expected integer type, found '%s'", buf_ptr(&dest_type->name)));
25326 return ira->codegen->invalid_inst_gen;
2432225327 }
2432325328
24324 IrInstruction *target = instruction->target->child;
25329 IrInstGen *target = instruction->target->child;
2432525330 if (type_is_invalid(target->value->type))
24326 return ira->codegen->invalid_instruction;
25331 return ira->codegen->invalid_inst_gen;
2432725332
2432825333 if (target->value->type->id != ZigTypeIdInt && target->value->type->id != ZigTypeIdComptimeInt) {
24329 ir_add_error(ira, instruction->target, buf_sprintf("expected integer type, found '%s'",
25334 ir_add_error(ira, &instruction->target->base, buf_sprintf("expected integer type, found '%s'",
2433025335 buf_ptr(&target->value->type->name)));
24331 return ira->codegen->invalid_instruction;
25336 return ira->codegen->invalid_inst_gen;
2433225337 }
2433325338
2433425339 if (instr_is_comptime(target)) {
24335 return ir_implicit_cast(ira, target, dest_type);
25340 return ir_implicit_cast2(ira, &instruction->target->base, target, dest_type);
2433625341 }
2433725342
2433825343 if (dest_type->id == ZigTypeIdComptimeInt) {
24339 ir_add_error(ira, instruction->target, buf_sprintf("attempt to cast runtime value to '%s'",
25344 ir_add_error(ira, &instruction->target->base, buf_sprintf("attempt to cast runtime value to '%s'",
2434025345 buf_ptr(&dest_type->name)));
24341 return ira->codegen->invalid_instruction;
25346 return ira->codegen->invalid_inst_gen;
2434225347 }
2434325348
24344 return ir_analyze_widen_or_shorten(ira, &instruction->base, target, dest_type);
25349 return ir_analyze_widen_or_shorten(ira, &instruction->base.base, target, dest_type);
2434525350}
2434625351
24347static IrInstruction *ir_analyze_instruction_float_cast(IrAnalyze *ira, IrInstructionFloatCast *instruction) {
25352static IrInstGen *ir_analyze_instruction_float_cast(IrAnalyze *ira, IrInstSrcFloatCast *instruction) {
2434825353 ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);
2434925354 if (type_is_invalid(dest_type))
24350 return ira->codegen->invalid_instruction;
25355 return ira->codegen->invalid_inst_gen;
2435125356
2435225357 if (dest_type->id != ZigTypeIdFloat) {
24353 ir_add_error(ira, instruction->dest_type,
25358 ir_add_error(ira, &instruction->dest_type->base,
2435425359 buf_sprintf("expected float type, found '%s'", buf_ptr(&dest_type->name)));
24355 return ira->codegen->invalid_instruction;
25360 return ira->codegen->invalid_inst_gen;
2435625361 }
2435725362
24358 IrInstruction *target = instruction->target->child;
25363 IrInstGen *target = instruction->target->child;
2435925364 if (type_is_invalid(target->value->type))
24360 return ira->codegen->invalid_instruction;
25365 return ira->codegen->invalid_inst_gen;
2436125366
2436225367 if (target->value->type->id == ZigTypeIdComptimeInt ||
2436325368 target->value->type->id == ZigTypeIdComptimeFloat)
......@@ -24369,55 +25374,55 @@ static IrInstruction *ir_analyze_instruction_float_cast(IrAnalyze *ira, IrInstru
2436925374 } else {
2437025375 op = CastOpNumLitToConcrete;
2437125376 }
24372 return ir_resolve_cast(ira, &instruction->base, target, dest_type, op);
25377 return ir_resolve_cast(ira, &instruction->base.base, target, dest_type, op);
2437325378 } else {
24374 return ira->codegen->invalid_instruction;
25379 return ira->codegen->invalid_inst_gen;
2437525380 }
2437625381 }
2437725382
2437825383 if (target->value->type->id != ZigTypeIdFloat) {
24379 ir_add_error(ira, instruction->target, buf_sprintf("expected float type, found '%s'",
25384 ir_add_error(ira, &instruction->target->base, buf_sprintf("expected float type, found '%s'",
2438025385 buf_ptr(&target->value->type->name)));
24381 return ira->codegen->invalid_instruction;
25386 return ira->codegen->invalid_inst_gen;
2438225387 }
2438325388
24384 return ir_analyze_widen_or_shorten(ira, &instruction->base, target, dest_type);
25389 return ir_analyze_widen_or_shorten(ira, &instruction->base.base, target, dest_type);
2438525390}
2438625391
24387static IrInstruction *ir_analyze_instruction_err_set_cast(IrAnalyze *ira, IrInstructionErrSetCast *instruction) {
25392static IrInstGen *ir_analyze_instruction_err_set_cast(IrAnalyze *ira, IrInstSrcErrSetCast *instruction) {
2438825393 ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);
2438925394 if (type_is_invalid(dest_type))
24390 return ira->codegen->invalid_instruction;
25395 return ira->codegen->invalid_inst_gen;
2439125396
2439225397 if (dest_type->id != ZigTypeIdErrorSet) {
24393 ir_add_error(ira, instruction->dest_type,
25398 ir_add_error(ira, &instruction->dest_type->base,
2439425399 buf_sprintf("expected error set type, found '%s'", buf_ptr(&dest_type->name)));
24395 return ira->codegen->invalid_instruction;
25400 return ira->codegen->invalid_inst_gen;
2439625401 }
2439725402
24398 IrInstruction *target = instruction->target->child;
25403 IrInstGen *target = instruction->target->child;
2439925404 if (type_is_invalid(target->value->type))
24400 return ira->codegen->invalid_instruction;
25405 return ira->codegen->invalid_inst_gen;
2440125406
2440225407 if (target->value->type->id != ZigTypeIdErrorSet) {
24403 ir_add_error(ira, instruction->target,
25408 ir_add_error(ira, &instruction->target->base,
2440425409 buf_sprintf("expected error set type, found '%s'", buf_ptr(&target->value->type->name)));
24405 return ira->codegen->invalid_instruction;
25410 return ira->codegen->invalid_inst_gen;
2440625411 }
2440725412
24408 return ir_analyze_err_set_cast(ira, &instruction->base, target, dest_type);
25413 return ir_analyze_err_set_cast(ira, &instruction->base.base, target, dest_type);
2440925414}
2441025415
24411static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstructionFromBytes *instruction) {
25416static IrInstGen *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstSrcFromBytes *instruction) {
2441225417 Error err;
2441325418
2441425419 ZigType *dest_child_type = ir_resolve_type(ira, instruction->dest_child_type->child);
2441525420 if (type_is_invalid(dest_child_type))
24416 return ira->codegen->invalid_instruction;
25421 return ira->codegen->invalid_inst_gen;
2441725422
24418 IrInstruction *target = instruction->target->child;
25423 IrInstGen *target = instruction->target->child;
2441925424 if (type_is_invalid(target->value->type))
24420 return ira->codegen->invalid_instruction;
25425 return ira->codegen->invalid_inst_gen;
2442125426
2442225427 bool src_ptr_const;
2442325428 bool src_ptr_volatile;
......@@ -24427,27 +25432,27 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru
2442725432 src_ptr_volatile = target->value->type->data.pointer.is_volatile;
2442825433
2442925434 if ((err = resolve_ptr_align(ira, target->value->type, &src_ptr_align)))
24430 return ira->codegen->invalid_instruction;
25435 return ira->codegen->invalid_inst_gen;
2443125436 } else if (is_slice(target->value->type)) {
2443225437 ZigType *src_ptr_type = target->value->type->data.structure.fields[slice_ptr_index]->type_entry;
2443325438 src_ptr_const = src_ptr_type->data.pointer.is_const;
2443425439 src_ptr_volatile = src_ptr_type->data.pointer.is_volatile;
2443525440
2443625441 if ((err = resolve_ptr_align(ira, src_ptr_type, &src_ptr_align)))
24437 return ira->codegen->invalid_instruction;
25442 return ira->codegen->invalid_inst_gen;
2443825443 } else {
2443925444 src_ptr_const = true;
2444025445 src_ptr_volatile = false;
2444125446
2444225447 if ((err = type_resolve(ira->codegen, target->value->type, ResolveStatusAlignmentKnown)))
24443 return ira->codegen->invalid_instruction;
25448 return ira->codegen->invalid_inst_gen;
2444425449
2444525450 src_ptr_align = get_abi_alignment(ira->codegen, target->value->type);
2444625451 }
2444725452
2444825453 if (src_ptr_align != 0) {
2444925454 if ((err = type_resolve(ira->codegen, dest_child_type, ResolveStatusAlignmentKnown)))
24450 return ira->codegen->invalid_instruction;
25455 return ira->codegen->invalid_inst_gen;
2445125456 }
2445225457
2445325458 ZigType *dest_ptr_type = get_pointer_to_type_extra(ira->codegen, dest_child_type,
......@@ -24460,9 +25465,9 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru
2446025465 src_ptr_align, 0, 0, false);
2446125466 ZigType *u8_slice = get_slice_type(ira->codegen, u8_ptr);
2446225467
24463 IrInstruction *casted_value = ir_implicit_cast(ira, target, u8_slice);
25468 IrInstGen *casted_value = ir_implicit_cast2(ira, &instruction->target->base, target, u8_slice);
2446425469 if (type_is_invalid(casted_value->value->type))
24465 return ira->codegen->invalid_instruction;
25470 return ira->codegen->invalid_inst_gen;
2446625471
2446725472 bool have_known_len = false;
2446825473 uint64_t known_len;
......@@ -24470,7 +25475,7 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru
2447025475 if (instr_is_comptime(casted_value)) {
2447125476 ZigValue *val = ir_resolve_const(ira, casted_value, UndefBad);
2447225477 if (!val)
24473 return ira->codegen->invalid_instruction;
25478 return ira->codegen->invalid_inst_gen;
2447425479
2447525480 ZigValue *len_val = val->data.x_struct.fields[slice_len_index];
2447625481 if (value_is_comptime(len_val)) {
......@@ -24479,9 +25484,9 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru
2447925484 }
2448025485 }
2448125486
24482 IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,
24483 dest_slice_type, nullptr, true, false, true);
24484 if (result_loc != nullptr && (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc))) {
25487 IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
25488 dest_slice_type, nullptr, true, true);
25489 if (result_loc != nullptr && (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable)) {
2448525490 return result_loc;
2448625491 }
2448725492
......@@ -24498,41 +25503,41 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru
2449825503
2449925504 if (have_known_len) {
2450025505 if ((err = type_resolve(ira->codegen, dest_child_type, ResolveStatusSizeKnown)))
24501 return ira->codegen->invalid_instruction;
25506 return ira->codegen->invalid_inst_gen;
2450225507 uint64_t child_type_size = type_size(ira->codegen, dest_child_type);
2450325508 uint64_t remainder = known_len % child_type_size;
2450425509 if (remainder != 0) {
24505 ErrorMsg *msg = ir_add_error(ira, &instruction->base,
25510 ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
2450625511 buf_sprintf("unable to convert [%" ZIG_PRI_u64 "]u8 to %s: size mismatch",
2450725512 known_len, buf_ptr(&dest_slice_type->name)));
24508 add_error_note(ira->codegen, msg, instruction->dest_child_type->source_node,
25513 add_error_note(ira->codegen, msg, instruction->dest_child_type->base.source_node,
2450925514 buf_sprintf("%s has size %" ZIG_PRI_u64 "; remaining bytes: %" ZIG_PRI_u64,
2451025515 buf_ptr(&dest_child_type->name), child_type_size, remainder));
24511 return ira->codegen->invalid_instruction;
25516 return ira->codegen->invalid_inst_gen;
2451225517 }
2451325518 }
2451425519
24515 return ir_build_resize_slice(ira, &instruction->base, casted_value, dest_slice_type, result_loc);
25520 return ir_build_resize_slice(ira, &instruction->base.base, casted_value, dest_slice_type, result_loc);
2451625521}
2451725522
24518static IrInstruction *ir_analyze_instruction_to_bytes(IrAnalyze *ira, IrInstructionToBytes *instruction) {
25523static IrInstGen *ir_analyze_instruction_to_bytes(IrAnalyze *ira, IrInstSrcToBytes *instruction) {
2451925524 Error err;
2452025525
24521 IrInstruction *target = instruction->target->child;
25526 IrInstGen *target = instruction->target->child;
2452225527 if (type_is_invalid(target->value->type))
24523 return ira->codegen->invalid_instruction;
25528 return ira->codegen->invalid_inst_gen;
2452425529
2452525530 if (!is_slice(target->value->type)) {
24526 ir_add_error(ira, instruction->target,
25531 ir_add_error(ira, &instruction->target->base,
2452725532 buf_sprintf("expected slice, found '%s'", buf_ptr(&target->value->type->name)));
24528 return ira->codegen->invalid_instruction;
25533 return ira->codegen->invalid_inst_gen;
2452925534 }
2453025535
2453125536 ZigType *src_ptr_type = target->value->type->data.structure.fields[slice_ptr_index]->type_entry;
2453225537
2453325538 uint32_t alignment;
2453425539 if ((err = resolve_ptr_align(ira, src_ptr_type, &alignment)))
24535 return ira->codegen->invalid_instruction;
25540 return ira->codegen->invalid_inst_gen;
2453625541
2453725542 ZigType *dest_ptr_type = get_pointer_to_type_extra(ira->codegen, ira->codegen->builtin_types.entry_u8,
2453825543 src_ptr_type->data.pointer.is_const, src_ptr_type->data.pointer.is_volatile, PtrLenUnknown,
......@@ -24542,9 +25547,9 @@ static IrInstruction *ir_analyze_instruction_to_bytes(IrAnalyze *ira, IrInstruct
2454225547 if (instr_is_comptime(target)) {
2454325548 ZigValue *target_val = ir_resolve_const(ira, target, UndefBad);
2454425549 if (target_val == nullptr)
24545 return ira->codegen->invalid_instruction;
25550 return ira->codegen->invalid_inst_gen;
2454625551
24547 IrInstruction *result = ir_const(ira, &instruction->base, dest_slice_type);
25552 IrInstGen *result = ir_const(ira, &instruction->base.base, dest_slice_type);
2454825553 result->value->data.x_struct.fields = alloc_const_vals_ptrs(2);
2454925554
2455025555 ZigValue *ptr_val = result->value->data.x_struct.fields[slice_ptr_index];
......@@ -24564,13 +25569,13 @@ static IrInstruction *ir_analyze_instruction_to_bytes(IrAnalyze *ira, IrInstruct
2456425569 return result;
2456525570 }
2456625571
24567 IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,
24568 dest_slice_type, nullptr, true, false, true);
24569 if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {
25572 IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
25573 dest_slice_type, nullptr, true, true);
25574 if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
2457025575 return result_loc;
2457125576 }
2457225577
24573 return ir_build_resize_slice(ira, &instruction->base, target, dest_slice_type, result_loc);
25578 return ir_build_resize_slice(ira, &instruction->base.base, target, dest_slice_type, result_loc);
2457425579}
2457525580
2457625581static Error resolve_ptr_align(IrAnalyze *ira, ZigType *ty, uint32_t *result_align) {
......@@ -24587,26 +25592,26 @@ static Error resolve_ptr_align(IrAnalyze *ira, ZigType *ty, uint32_t *result_ali
2458725592 return ErrorNone;
2458825593}
2458925594
24590static IrInstruction *ir_analyze_instruction_int_to_float(IrAnalyze *ira, IrInstructionIntToFloat *instruction) {
25595static IrInstGen *ir_analyze_instruction_int_to_float(IrAnalyze *ira, IrInstSrcIntToFloat *instruction) {
2459125596 ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);
2459225597 if (type_is_invalid(dest_type))
24593 return ira->codegen->invalid_instruction;
25598 return ira->codegen->invalid_inst_gen;
2459425599
24595 IrInstruction *target = instruction->target->child;
25600 IrInstGen *target = instruction->target->child;
2459625601 if (type_is_invalid(target->value->type))
24597 return ira->codegen->invalid_instruction;
25602 return ira->codegen->invalid_inst_gen;
2459825603
2459925604 if (target->value->type->id != ZigTypeIdInt && target->value->type->id != ZigTypeIdComptimeInt) {
24600 ir_add_error(ira, instruction->target, buf_sprintf("expected int type, found '%s'",
25605 ir_add_error(ira, &instruction->target->base, buf_sprintf("expected int type, found '%s'",
2460125606 buf_ptr(&target->value->type->name)));
24602 return ira->codegen->invalid_instruction;
25607 return ira->codegen->invalid_inst_gen;
2460325608 }
2460425609
24605 return ir_resolve_cast(ira, &instruction->base, target, dest_type, CastOpIntToFloat);
25610 return ir_resolve_cast(ira, &instruction->base.base, target, dest_type, CastOpIntToFloat);
2460625611}
2460725612
24608static IrInstruction *ir_analyze_float_to_int(IrAnalyze *ira, IrInstruction *source_instr,
24609 ZigType *dest_type, IrInstruction *operand, AstNode *operand_source_node)
25613static IrInstGen *ir_analyze_float_to_int(IrAnalyze *ira, IrInst* source_instr,
25614 ZigType *dest_type, IrInstGen *operand, AstNode *operand_source_node)
2461025615{
2461125616 if (operand->value->type->id == ZigTypeIdComptimeInt) {
2461225617 return ir_implicit_cast(ira, operand, dest_type);
......@@ -24615,106 +25620,107 @@ static IrInstruction *ir_analyze_float_to_int(IrAnalyze *ira, IrInstruction *sou
2461525620 if (operand->value->type->id != ZigTypeIdFloat && operand->value->type->id != ZigTypeIdComptimeFloat) {
2461625621 ir_add_error_node(ira, operand_source_node, buf_sprintf("expected float type, found '%s'",
2461725622 buf_ptr(&operand->value->type->name)));
24618 return ira->codegen->invalid_instruction;
25623 return ira->codegen->invalid_inst_gen;
2461925624 }
2462025625
2462125626 return ir_resolve_cast(ira, source_instr, operand, dest_type, CastOpFloatToInt);
2462225627}
2462325628
24624static IrInstruction *ir_analyze_instruction_float_to_int(IrAnalyze *ira, IrInstructionFloatToInt *instruction) {
25629static IrInstGen *ir_analyze_instruction_float_to_int(IrAnalyze *ira, IrInstSrcFloatToInt *instruction) {
2462525630 ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);
2462625631 if (type_is_invalid(dest_type))
24627 return ira->codegen->invalid_instruction;
25632 return ira->codegen->invalid_inst_gen;
2462825633
24629 IrInstruction *operand = instruction->target->child;
25634 IrInstGen *operand = instruction->target->child;
2463025635 if (type_is_invalid(operand->value->type))
24631 return ira->codegen->invalid_instruction;
25636 return ira->codegen->invalid_inst_gen;
2463225637
24633 return ir_analyze_float_to_int(ira, &instruction->base, dest_type, operand, instruction->target->source_node);
25638 return ir_analyze_float_to_int(ira, &instruction->base.base, dest_type, operand,
25639 instruction->target->base.source_node);
2463425640}
2463525641
24636static IrInstruction *ir_analyze_instruction_err_to_int(IrAnalyze *ira, IrInstructionErrToInt *instruction) {
24637 IrInstruction *target = instruction->target->child;
25642static IrInstGen *ir_analyze_instruction_err_to_int(IrAnalyze *ira, IrInstSrcErrToInt *instruction) {
25643 IrInstGen *target = instruction->target->child;
2463825644 if (type_is_invalid(target->value->type))
24639 return ira->codegen->invalid_instruction;
25645 return ira->codegen->invalid_inst_gen;
2464025646
24641 IrInstruction *casted_target;
25647 IrInstGen *casted_target;
2464225648 if (target->value->type->id == ZigTypeIdErrorSet) {
2464325649 casted_target = target;
2464425650 } else {
2464525651 casted_target = ir_implicit_cast(ira, target, ira->codegen->builtin_types.entry_global_error_set);
2464625652 if (type_is_invalid(casted_target->value->type))
24647 return ira->codegen->invalid_instruction;
25653 return ira->codegen->invalid_inst_gen;
2464825654 }
2464925655
24650 return ir_analyze_err_to_int(ira, &instruction->base, casted_target, ira->codegen->err_tag_type);
25656 return ir_analyze_err_to_int(ira, &instruction->base.base, casted_target, ira->codegen->err_tag_type);
2465125657}
2465225658
24653static IrInstruction *ir_analyze_instruction_int_to_err(IrAnalyze *ira, IrInstructionIntToErr *instruction) {
24654 IrInstruction *target = instruction->target->child;
25659static IrInstGen *ir_analyze_instruction_int_to_err(IrAnalyze *ira, IrInstSrcIntToErr *instruction) {
25660 IrInstGen *target = instruction->target->child;
2465525661 if (type_is_invalid(target->value->type))
24656 return ira->codegen->invalid_instruction;
25662 return ira->codegen->invalid_inst_gen;
2465725663
24658 IrInstruction *casted_target = ir_implicit_cast(ira, target, ira->codegen->err_tag_type);
25664 IrInstGen *casted_target = ir_implicit_cast(ira, target, ira->codegen->err_tag_type);
2465925665 if (type_is_invalid(casted_target->value->type))
24660 return ira->codegen->invalid_instruction;
25666 return ira->codegen->invalid_inst_gen;
2466125667
24662 return ir_analyze_int_to_err(ira, &instruction->base, casted_target, ira->codegen->builtin_types.entry_global_error_set);
25668 return ir_analyze_int_to_err(ira, &instruction->base.base, casted_target, ira->codegen->builtin_types.entry_global_error_set);
2466325669}
2466425670
24665static IrInstruction *ir_analyze_instruction_bool_to_int(IrAnalyze *ira, IrInstructionBoolToInt *instruction) {
24666 IrInstruction *target = instruction->target->child;
25671static IrInstGen *ir_analyze_instruction_bool_to_int(IrAnalyze *ira, IrInstSrcBoolToInt *instruction) {
25672 IrInstGen *target = instruction->target->child;
2466725673 if (type_is_invalid(target->value->type))
24668 return ira->codegen->invalid_instruction;
25674 return ira->codegen->invalid_inst_gen;
2466925675
2467025676 if (target->value->type->id != ZigTypeIdBool) {
24671 ir_add_error(ira, instruction->target, buf_sprintf("expected bool, found '%s'",
25677 ir_add_error(ira, &instruction->target->base, buf_sprintf("expected bool, found '%s'",
2467225678 buf_ptr(&target->value->type->name)));
24673 return ira->codegen->invalid_instruction;
25679 return ira->codegen->invalid_inst_gen;
2467425680 }
2467525681
2467625682 if (instr_is_comptime(target)) {
2467725683 bool is_true;
2467825684 if (!ir_resolve_bool(ira, target, &is_true))
24679 return ira->codegen->invalid_instruction;
25685 return ira->codegen->invalid_inst_gen;
2468025686
24681 return ir_const_unsigned(ira, &instruction->base, is_true ? 1 : 0);
25687 return ir_const_unsigned(ira, &instruction->base.base, is_true ? 1 : 0);
2468225688 }
2468325689
2468425690 ZigType *u1_type = get_int_type(ira->codegen, false, 1);
24685 return ir_resolve_cast(ira, &instruction->base, target, u1_type, CastOpBoolToInt);
25691 return ir_resolve_cast(ira, &instruction->base.base, target, u1_type, CastOpBoolToInt);
2468625692}
2468725693
24688static IrInstruction *ir_analyze_instruction_int_type(IrAnalyze *ira, IrInstructionIntType *instruction) {
24689 IrInstruction *is_signed_value = instruction->is_signed->child;
25694static IrInstGen *ir_analyze_instruction_int_type(IrAnalyze *ira, IrInstSrcIntType *instruction) {
25695 IrInstGen *is_signed_value = instruction->is_signed->child;
2469025696 bool is_signed;
2469125697 if (!ir_resolve_bool(ira, is_signed_value, &is_signed))
24692 return ira->codegen->invalid_instruction;
25698 return ira->codegen->invalid_inst_gen;
2469325699
24694 IrInstruction *bit_count_value = instruction->bit_count->child;
25700 IrInstGen *bit_count_value = instruction->bit_count->child;
2469525701 uint64_t bit_count;
2469625702 if (!ir_resolve_unsigned(ira, bit_count_value, ira->codegen->builtin_types.entry_u16, &bit_count))
24697 return ira->codegen->invalid_instruction;
25703 return ira->codegen->invalid_inst_gen;
2469825704
24699 return ir_const_type(ira, &instruction->base, get_int_type(ira->codegen, is_signed, (uint32_t)bit_count));
25705 return ir_const_type(ira, &instruction->base.base, get_int_type(ira->codegen, is_signed, (uint32_t)bit_count));
2470025706}
2470125707
24702static IrInstruction *ir_analyze_instruction_vector_type(IrAnalyze *ira, IrInstructionVectorType *instruction) {
25708static IrInstGen *ir_analyze_instruction_vector_type(IrAnalyze *ira, IrInstSrcVectorType *instruction) {
2470325709 uint64_t len;
2470425710 if (!ir_resolve_unsigned(ira, instruction->len->child, ira->codegen->builtin_types.entry_u32, &len))
24705 return ira->codegen->invalid_instruction;
25711 return ira->codegen->invalid_inst_gen;
2470625712
2470725713 ZigType *elem_type = ir_resolve_vector_elem_type(ira, instruction->elem_type->child);
2470825714 if (type_is_invalid(elem_type))
24709 return ira->codegen->invalid_instruction;
25715 return ira->codegen->invalid_inst_gen;
2471025716
2471125717 ZigType *vector_type = get_vector_type(ira->codegen, len, elem_type);
2471225718
24713 return ir_const_type(ira, &instruction->base, vector_type);
25719 return ir_const_type(ira, &instruction->base.base, vector_type);
2471425720}
2471525721
24716static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *source_instr,
24717 ZigType *scalar_type, IrInstruction *a, IrInstruction *b, IrInstruction *mask)
25722static IrInstGen *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInst* source_instr,
25723 ZigType *scalar_type, IrInstGen *a, IrInstGen *b, IrInstGen *mask)
2471825724{
2471925725 ir_assert(source_instr && scalar_type && a && b && mask, source_instr);
2472025726 ir_assert(is_valid_vector_elem_type(scalar_type), source_instr);
......@@ -24725,15 +25731,15 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
2472525731 } else if (mask->value->type->id == ZigTypeIdArray) {
2472625732 len_mask = mask->value->type->data.array.len;
2472725733 } else {
24728 ir_add_error(ira, mask,
25734 ir_add_error(ira, &mask->base,
2472925735 buf_sprintf("expected vector or array, found '%s'",
2473025736 buf_ptr(&mask->value->type->name)));
24731 return ira->codegen->invalid_instruction;
25737 return ira->codegen->invalid_inst_gen;
2473225738 }
2473325739 mask = ir_implicit_cast(ira, mask, get_vector_type(ira->codegen, len_mask,
2473425740 ira->codegen->builtin_types.entry_i32));
2473525741 if (type_is_invalid(mask->value->type))
24736 return ira->codegen->invalid_instruction;
25742 return ira->codegen->invalid_inst_gen;
2473725743
2473825744 uint32_t len_a;
2473925745 if (a->value->type->id == ZigTypeIdVector) {
......@@ -24743,11 +25749,11 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
2474325749 } else if (a->value->type->id == ZigTypeIdUndefined) {
2474425750 len_a = UINT32_MAX;
2474525751 } else {
24746 ir_add_error(ira, a,
25752 ir_add_error(ira, &a->base,
2474725753 buf_sprintf("expected vector or array with element type '%s', found '%s'",
2474825754 buf_ptr(&scalar_type->name),
2474925755 buf_ptr(&a->value->type->name)));
24750 return ira->codegen->invalid_instruction;
25756 return ira->codegen->invalid_inst_gen;
2475125757 }
2475225758
2475325759 uint32_t len_b;
......@@ -24758,38 +25764,38 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
2475825764 } else if (b->value->type->id == ZigTypeIdUndefined) {
2475925765 len_b = UINT32_MAX;
2476025766 } else {
24761 ir_add_error(ira, b,
25767 ir_add_error(ira, &b->base,
2476225768 buf_sprintf("expected vector or array with element type '%s', found '%s'",
2476325769 buf_ptr(&scalar_type->name),
2476425770 buf_ptr(&b->value->type->name)));
24765 return ira->codegen->invalid_instruction;
25771 return ira->codegen->invalid_inst_gen;
2476625772 }
2476725773
2476825774 if (len_a == UINT32_MAX && len_b == UINT32_MAX) {
24769 return ir_const_undef(ira, a, get_vector_type(ira->codegen, len_mask, scalar_type));
25775 return ir_const_undef(ira, &a->base, get_vector_type(ira->codegen, len_mask, scalar_type));
2477025776 }
2477125777
2477225778 if (len_a == UINT32_MAX) {
2477325779 len_a = len_b;
24774 a = ir_const_undef(ira, a, get_vector_type(ira->codegen, len_a, scalar_type));
25780 a = ir_const_undef(ira, &a->base, get_vector_type(ira->codegen, len_a, scalar_type));
2477525781 } else {
2477625782 a = ir_implicit_cast(ira, a, get_vector_type(ira->codegen, len_a, scalar_type));
2477725783 if (type_is_invalid(a->value->type))
24778 return ira->codegen->invalid_instruction;
25784 return ira->codegen->invalid_inst_gen;
2477925785 }
2478025786
2478125787 if (len_b == UINT32_MAX) {
2478225788 len_b = len_a;
24783 b = ir_const_undef(ira, b, get_vector_type(ira->codegen, len_b, scalar_type));
25789 b = ir_const_undef(ira, &b->base, get_vector_type(ira->codegen, len_b, scalar_type));
2478425790 } else {
2478525791 b = ir_implicit_cast(ira, b, get_vector_type(ira->codegen, len_b, scalar_type));
2478625792 if (type_is_invalid(b->value->type))
24787 return ira->codegen->invalid_instruction;
25793 return ira->codegen->invalid_inst_gen;
2478825794 }
2478925795
2479025796 ZigValue *mask_val = ir_resolve_const(ira, mask, UndefOk);
2479125797 if (mask_val == nullptr)
24792 return ira->codegen->invalid_instruction;
25798 return ira->codegen->invalid_inst_gen;
2479325799
2479425800 expand_undef_array(ira->codegen, mask_val);
2479525801
......@@ -24799,7 +25805,7 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
2479925805 continue;
2480025806 int32_t v_i32 = bigint_as_signed(&mask_elem_val->data.x_bigint);
2480125807 uint32_t v;
24802 IrInstruction *chosen_operand;
25808 IrInstGen *chosen_operand;
2480325809 if (v_i32 >= 0) {
2480425810 v = (uint32_t)v_i32;
2480525811 chosen_operand = a;
......@@ -24808,16 +25814,16 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
2480825814 chosen_operand = b;
2480925815 }
2481025816 if (v >= chosen_operand->value->type->data.vector.len) {
24811 ErrorMsg *msg = ir_add_error(ira, mask,
25817 ErrorMsg *msg = ir_add_error(ira, &mask->base,
2481225818 buf_sprintf("mask index '%u' has out-of-bounds selection", i));
24813 add_error_note(ira->codegen, msg, chosen_operand->source_node,
25819 add_error_note(ira->codegen, msg, chosen_operand->base.source_node,
2481425820 buf_sprintf("selected index '%u' out of bounds of %s", v,
2481525821 buf_ptr(&chosen_operand->value->type->name)));
2481625822 if (chosen_operand == a && v < len_a + len_b) {
24817 add_error_note(ira->codegen, msg, b->source_node,
25823 add_error_note(ira->codegen, msg, b->base.source_node,
2481825824 buf_create_from_str("selections from the second vector are specified with negative numbers"));
2481925825 }
24820 return ira->codegen->invalid_instruction;
25826 return ira->codegen->invalid_inst_gen;
2482125827 }
2482225828 }
2482325829
......@@ -24825,16 +25831,16 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
2482525831 if (instr_is_comptime(a) && instr_is_comptime(b)) {
2482625832 ZigValue *a_val = ir_resolve_const(ira, a, UndefOk);
2482725833 if (a_val == nullptr)
24828 return ira->codegen->invalid_instruction;
25834 return ira->codegen->invalid_inst_gen;
2482925835
2483025836 ZigValue *b_val = ir_resolve_const(ira, b, UndefOk);
2483125837 if (b_val == nullptr)
24832 return ira->codegen->invalid_instruction;
25838 return ira->codegen->invalid_inst_gen;
2483325839
2483425840 expand_undef_array(ira->codegen, a_val);
2483525841 expand_undef_array(ira->codegen, b_val);
2483625842
24837 IrInstruction *result = ir_const(ira, source_instr, result_type);
25843 IrInstGen *result = ir_const(ira, source_instr, result_type);
2483825844 result->value->data.x_array.data.s_none.elements = create_const_vals(len_mask);
2483925845 for (uint32_t i = 0; i < mask_val->type->data.vector.len; i += 1) {
2484025846 ZigValue *mask_elem_val = &mask_val->data.x_array.data.s_none.elements[i];
......@@ -24866,7 +25872,7 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
2486625872 uint32_t len_min = min(len_a, len_b);
2486725873 uint32_t len_max = max(len_a, len_b);
2486825874
24869 IrInstruction *expand_mask = ir_const(ira, mask,
25875 IrInstGen *expand_mask = ir_const(ira, &mask->base,
2487025876 get_vector_type(ira->codegen, len_max, ira->codegen->builtin_types.entry_i32));
2487125877 expand_mask->value->data.x_array.data.s_none.elements = create_const_vals(len_max);
2487225878 uint32_t i = 0;
......@@ -24875,7 +25881,7 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
2487525881 for (; i < len_max; i += 1)
2487625882 bigint_init_signed(&expand_mask->value->data.x_array.data.s_none.elements[i].data.x_bigint, -1);
2487725883
24878 IrInstruction *undef = ir_const_undef(ira, source_instr,
25884 IrInstGen *undef = ir_const_undef(ira, source_instr,
2487925885 get_vector_type(ira->codegen, len_min, scalar_type));
2488025886
2488125887 if (len_b < len_a) {
......@@ -24885,62 +25891,59 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
2488525891 }
2488625892 }
2488725893
24888 IrInstruction *result = ir_build_shuffle_vector(&ira->new_irb,
24889 source_instr->scope, source_instr->source_node,
24890 nullptr, a, b, mask);
24891 result->value->type = result_type;
24892 return result;
25894 return ir_build_shuffle_vector_gen(ira, source_instr->scope, source_instr->source_node,
25895 result_type, a, b, mask);
2489325896}
2489425897
24895static IrInstruction *ir_analyze_instruction_shuffle_vector(IrAnalyze *ira, IrInstructionShuffleVector *instruction) {
24896 ZigType *scalar_type = ir_resolve_vector_elem_type(ira, instruction->scalar_type);
25898static IrInstGen *ir_analyze_instruction_shuffle_vector(IrAnalyze *ira, IrInstSrcShuffleVector *instruction) {
25899 ZigType *scalar_type = ir_resolve_vector_elem_type(ira, instruction->scalar_type->child);
2489725900 if (type_is_invalid(scalar_type))
24898 return ira->codegen->invalid_instruction;
25901 return ira->codegen->invalid_inst_gen;
2489925902
24900 IrInstruction *a = instruction->a->child;
25903 IrInstGen *a = instruction->a->child;
2490125904 if (type_is_invalid(a->value->type))
24902 return ira->codegen->invalid_instruction;
25905 return ira->codegen->invalid_inst_gen;
2490325906
24904 IrInstruction *b = instruction->b->child;
25907 IrInstGen *b = instruction->b->child;
2490525908 if (type_is_invalid(b->value->type))
24906 return ira->codegen->invalid_instruction;
25909 return ira->codegen->invalid_inst_gen;
2490725910
24908 IrInstruction *mask = instruction->mask->child;
25911 IrInstGen *mask = instruction->mask->child;
2490925912 if (type_is_invalid(mask->value->type))
24910 return ira->codegen->invalid_instruction;
25913 return ira->codegen->invalid_inst_gen;
2491125914
24912 return ir_analyze_shuffle_vector(ira, &instruction->base, scalar_type, a, b, mask);
25915 return ir_analyze_shuffle_vector(ira, &instruction->base.base, scalar_type, a, b, mask);
2491325916}
2491425917
24915static IrInstruction *ir_analyze_instruction_splat(IrAnalyze *ira, IrInstructionSplatSrc *instruction) {
25918static IrInstGen *ir_analyze_instruction_splat(IrAnalyze *ira, IrInstSrcSplat *instruction) {
2491625919 Error err;
2491725920
24918 IrInstruction *len = instruction->len->child;
25921 IrInstGen *len = instruction->len->child;
2491925922 if (type_is_invalid(len->value->type))
24920 return ira->codegen->invalid_instruction;
25923 return ira->codegen->invalid_inst_gen;
2492125924
24922 IrInstruction *scalar = instruction->scalar->child;
25925 IrInstGen *scalar = instruction->scalar->child;
2492325926 if (type_is_invalid(scalar->value->type))
24924 return ira->codegen->invalid_instruction;
25927 return ira->codegen->invalid_inst_gen;
2492525928
2492625929 uint64_t len_u64;
2492725930 if (!ir_resolve_unsigned(ira, len, ira->codegen->builtin_types.entry_u32, &len_u64))
24928 return ira->codegen->invalid_instruction;
25931 return ira->codegen->invalid_inst_gen;
2492925932 uint32_t len_int = len_u64;
2493025933
24931 if ((err = ir_validate_vector_elem_type(ira, scalar, scalar->value->type)))
24932 return ira->codegen->invalid_instruction;
25934 if ((err = ir_validate_vector_elem_type(ira, scalar->base.source_node, scalar->value->type)))
25935 return ira->codegen->invalid_inst_gen;
2493325936
2493425937 ZigType *return_type = get_vector_type(ira->codegen, len_int, scalar->value->type);
2493525938
2493625939 if (instr_is_comptime(scalar)) {
2493725940 ZigValue *scalar_val = ir_resolve_const(ira, scalar, UndefOk);
2493825941 if (scalar_val == nullptr)
24939 return ira->codegen->invalid_instruction;
25942 return ira->codegen->invalid_inst_gen;
2494025943 if (scalar_val->special == ConstValSpecialUndef)
24941 return ir_const_undef(ira, &instruction->base, return_type);
25944 return ir_const_undef(ira, &instruction->base.base, return_type);
2494225945
24943 IrInstruction *result = ir_const(ira, &instruction->base, return_type);
25946 IrInstGen *result = ir_const(ira, &instruction->base.base, return_type);
2494425947 result->value->data.x_array.data.s_none.elements = create_const_vals(len_int);
2494525948 for (uint32_t i = 0; i < len_int; i += 1) {
2494625949 copy_const_val(&result->value->data.x_array.data.s_none.elements[i], scalar_val);
......@@ -24948,48 +25951,45 @@ static IrInstruction *ir_analyze_instruction_splat(IrAnalyze *ira, IrInstruction
2494825951 return result;
2494925952 }
2495025953
24951 return ir_build_splat_gen(ira, &instruction->base, return_type, scalar);
25954 return ir_build_splat_gen(ira, &instruction->base.base, return_type, scalar);
2495225955}
2495325956
24954static IrInstruction *ir_analyze_instruction_bool_not(IrAnalyze *ira, IrInstructionBoolNot *instruction) {
24955 IrInstruction *value = instruction->value->child;
25957static IrInstGen *ir_analyze_instruction_bool_not(IrAnalyze *ira, IrInstSrcBoolNot *instruction) {
25958 IrInstGen *value = instruction->value->child;
2495625959 if (type_is_invalid(value->value->type))
24957 return ira->codegen->invalid_instruction;
25960 return ira->codegen->invalid_inst_gen;
2495825961
2495925962 ZigType *bool_type = ira->codegen->builtin_types.entry_bool;
2496025963
24961 IrInstruction *casted_value = ir_implicit_cast(ira, value, bool_type);
25964 IrInstGen *casted_value = ir_implicit_cast(ira, value, bool_type);
2496225965 if (type_is_invalid(casted_value->value->type))
24963 return ira->codegen->invalid_instruction;
25966 return ira->codegen->invalid_inst_gen;
2496425967
2496525968 if (instr_is_comptime(casted_value)) {
2496625969 ZigValue *value = ir_resolve_const(ira, casted_value, UndefBad);
2496725970 if (value == nullptr)
24968 return ira->codegen->invalid_instruction;
25971 return ira->codegen->invalid_inst_gen;
2496925972
24970 return ir_const_bool(ira, &instruction->base, !value->data.x_bool);
25973 return ir_const_bool(ira, &instruction->base.base, !value->data.x_bool);
2497125974 }
2497225975
24973 IrInstruction *result = ir_build_bool_not(&ira->new_irb, instruction->base.scope,
24974 instruction->base.source_node, casted_value);
24975 result->value->type = bool_type;
24976 return result;
25976 return ir_build_bool_not_gen(ira, &instruction->base.base, casted_value);
2497725977}
2497825978
24979static IrInstruction *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstructionMemset *instruction) {
25979static IrInstGen *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstSrcMemset *instruction) {
2498025980 Error err;
2498125981
24982 IrInstruction *dest_ptr = instruction->dest_ptr->child;
25982 IrInstGen *dest_ptr = instruction->dest_ptr->child;
2498325983 if (type_is_invalid(dest_ptr->value->type))
24984 return ira->codegen->invalid_instruction;
25984 return ira->codegen->invalid_inst_gen;
2498525985
24986 IrInstruction *byte_value = instruction->byte->child;
25986 IrInstGen *byte_value = instruction->byte->child;
2498725987 if (type_is_invalid(byte_value->value->type))
24988 return ira->codegen->invalid_instruction;
25988 return ira->codegen->invalid_inst_gen;
2498925989
24990 IrInstruction *count_value = instruction->count->child;
25990 IrInstGen *count_value = instruction->count->child;
2499125991 if (type_is_invalid(count_value->value->type))
24992 return ira->codegen->invalid_instruction;
25992 return ira->codegen->invalid_inst_gen;
2499325993
2499425994 ZigType *dest_uncasted_type = dest_ptr->value->type;
2499525995 bool dest_is_volatile = (dest_uncasted_type->id == ZigTypeIdPointer) &&
......@@ -25000,24 +26000,24 @@ static IrInstruction *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstructio
2500026000 uint32_t dest_align;
2500126001 if (dest_uncasted_type->id == ZigTypeIdPointer) {
2500226002 if ((err = resolve_ptr_align(ira, dest_uncasted_type, &dest_align)))
25003 return ira->codegen->invalid_instruction;
26003 return ira->codegen->invalid_inst_gen;
2500426004 } else {
2500526005 dest_align = get_abi_alignment(ira->codegen, u8);
2500626006 }
2500726007 ZigType *u8_ptr = get_pointer_to_type_extra(ira->codegen, u8, false, dest_is_volatile,
2500826008 PtrLenUnknown, dest_align, 0, 0, false);
2500926009
25010 IrInstruction *casted_dest_ptr = ir_implicit_cast(ira, dest_ptr, u8_ptr);
26010 IrInstGen *casted_dest_ptr = ir_implicit_cast(ira, dest_ptr, u8_ptr);
2501126011 if (type_is_invalid(casted_dest_ptr->value->type))
25012 return ira->codegen->invalid_instruction;
26012 return ira->codegen->invalid_inst_gen;
2501326013
25014 IrInstruction *casted_byte = ir_implicit_cast(ira, byte_value, u8);
26014 IrInstGen *casted_byte = ir_implicit_cast(ira, byte_value, u8);
2501526015 if (type_is_invalid(casted_byte->value->type))
25016 return ira->codegen->invalid_instruction;
26016 return ira->codegen->invalid_inst_gen;
2501726017
25018 IrInstruction *casted_count = ir_implicit_cast(ira, count_value, usize);
26018 IrInstGen *casted_count = ir_implicit_cast(ira, count_value, usize);
2501926019 if (type_is_invalid(casted_count->value->type))
25020 return ira->codegen->invalid_instruction;
26020 return ira->codegen->invalid_inst_gen;
2502126021
2502226022 // TODO test this at comptime with u8 and non-u8 types
2502326023 if (instr_is_comptime(casted_dest_ptr) &&
......@@ -25026,15 +26026,15 @@ static IrInstruction *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstructio
2502626026 {
2502726027 ZigValue *dest_ptr_val = ir_resolve_const(ira, casted_dest_ptr, UndefBad);
2502826028 if (dest_ptr_val == nullptr)
25029 return ira->codegen->invalid_instruction;
26029 return ira->codegen->invalid_inst_gen;
2503026030
2503126031 ZigValue *byte_val = ir_resolve_const(ira, casted_byte, UndefOk);
2503226032 if (byte_val == nullptr)
25033 return ira->codegen->invalid_instruction;
26033 return ira->codegen->invalid_inst_gen;
2503426034
2503526035 ZigValue *count_val = ir_resolve_const(ira, casted_count, UndefBad);
2503626036 if (count_val == nullptr)
25037 return ira->codegen->invalid_instruction;
26037 return ira->codegen->invalid_inst_gen;
2503826038
2503926039 if (casted_dest_ptr->value->data.x_ptr.special != ConstPtrSpecialHardCodedAddr &&
2504026040 casted_dest_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar)
......@@ -25079,38 +26079,35 @@ static IrInstruction *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstructio
2507926079 size_t count = bigint_as_usize(&count_val->data.x_bigint);
2508026080 size_t end = start + count;
2508126081 if (end > bound_end) {
25082 ir_add_error(ira, count_value, buf_sprintf("out of bounds pointer access"));
25083 return ira->codegen->invalid_instruction;
26082 ir_add_error(ira, &count_value->base, buf_sprintf("out of bounds pointer access"));
26083 return ira->codegen->invalid_inst_gen;
2508426084 }
2508526085
2508626086 for (size_t i = start; i < end; i += 1) {
2508726087 copy_const_val(&dest_elements[i], byte_val);
2508826088 }
2508926089
25090 return ir_const_void(ira, &instruction->base);
26090 return ir_const_void(ira, &instruction->base.base);
2509126091 }
2509226092 }
2509326093
25094 IrInstruction *result = ir_build_memset(&ira->new_irb, instruction->base.scope, instruction->base.source_node,
25095 casted_dest_ptr, casted_byte, casted_count);
25096 result->value->type = ira->codegen->builtin_types.entry_void;
25097 return result;
26094 return ir_build_memset_gen(ira, &instruction->base.base, casted_dest_ptr, casted_byte, casted_count);
2509826095}
2509926096
25100static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructionMemcpy *instruction) {
26097static IrInstGen *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstSrcMemcpy *instruction) {
2510126098 Error err;
2510226099
25103 IrInstruction *dest_ptr = instruction->dest_ptr->child;
26100 IrInstGen *dest_ptr = instruction->dest_ptr->child;
2510426101 if (type_is_invalid(dest_ptr->value->type))
25105 return ira->codegen->invalid_instruction;
26102 return ira->codegen->invalid_inst_gen;
2510626103
25107 IrInstruction *src_ptr = instruction->src_ptr->child;
26104 IrInstGen *src_ptr = instruction->src_ptr->child;
2510826105 if (type_is_invalid(src_ptr->value->type))
25109 return ira->codegen->invalid_instruction;
26106 return ira->codegen->invalid_inst_gen;
2511026107
25111 IrInstruction *count_value = instruction->count->child;
26108 IrInstGen *count_value = instruction->count->child;
2511226109 if (type_is_invalid(count_value->value->type))
25113 return ira->codegen->invalid_instruction;
26110 return ira->codegen->invalid_inst_gen;
2511426111
2511526112 ZigType *u8 = ira->codegen->builtin_types.entry_u8;
2511626113 ZigType *dest_uncasted_type = dest_ptr->value->type;
......@@ -25123,7 +26120,7 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
2512326120 uint32_t dest_align;
2512426121 if (dest_uncasted_type->id == ZigTypeIdPointer) {
2512526122 if ((err = resolve_ptr_align(ira, dest_uncasted_type, &dest_align)))
25126 return ira->codegen->invalid_instruction;
26123 return ira->codegen->invalid_inst_gen;
2512726124 } else {
2512826125 dest_align = get_abi_alignment(ira->codegen, u8);
2512926126 }
......@@ -25131,7 +26128,7 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
2513126128 uint32_t src_align;
2513226129 if (src_uncasted_type->id == ZigTypeIdPointer) {
2513326130 if ((err = resolve_ptr_align(ira, src_uncasted_type, &src_align)))
25134 return ira->codegen->invalid_instruction;
26131 return ira->codegen->invalid_inst_gen;
2513526132 } else {
2513626133 src_align = get_abi_alignment(ira->codegen, u8);
2513726134 }
......@@ -25142,17 +26139,17 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
2514226139 ZigType *u8_ptr_const = get_pointer_to_type_extra(ira->codegen, u8, true, src_is_volatile,
2514326140 PtrLenUnknown, src_align, 0, 0, false);
2514426141
25145 IrInstruction *casted_dest_ptr = ir_implicit_cast(ira, dest_ptr, u8_ptr_mut);
26142 IrInstGen *casted_dest_ptr = ir_implicit_cast(ira, dest_ptr, u8_ptr_mut);
2514626143 if (type_is_invalid(casted_dest_ptr->value->type))
25147 return ira->codegen->invalid_instruction;
26144 return ira->codegen->invalid_inst_gen;
2514826145
25149 IrInstruction *casted_src_ptr = ir_implicit_cast(ira, src_ptr, u8_ptr_const);
26146 IrInstGen *casted_src_ptr = ir_implicit_cast(ira, src_ptr, u8_ptr_const);
2515026147 if (type_is_invalid(casted_src_ptr->value->type))
25151 return ira->codegen->invalid_instruction;
26148 return ira->codegen->invalid_inst_gen;
2515226149
25153 IrInstruction *casted_count = ir_implicit_cast(ira, count_value, usize);
26150 IrInstGen *casted_count = ir_implicit_cast(ira, count_value, usize);
2515426151 if (type_is_invalid(casted_count->value->type))
25155 return ira->codegen->invalid_instruction;
26152 return ira->codegen->invalid_inst_gen;
2515626153
2515726154 // TODO test this at comptime with u8 and non-u8 types
2515826155 // TODO test with dest ptr being a global runtime variable
......@@ -25162,15 +26159,15 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
2516226159 {
2516326160 ZigValue *dest_ptr_val = ir_resolve_const(ira, casted_dest_ptr, UndefBad);
2516426161 if (dest_ptr_val == nullptr)
25165 return ira->codegen->invalid_instruction;
26162 return ira->codegen->invalid_inst_gen;
2516626163
2516726164 ZigValue *src_ptr_val = ir_resolve_const(ira, casted_src_ptr, UndefBad);
2516826165 if (src_ptr_val == nullptr)
25169 return ira->codegen->invalid_instruction;
26166 return ira->codegen->invalid_inst_gen;
2517026167
2517126168 ZigValue *count_val = ir_resolve_const(ira, casted_count, UndefBad);
2517226169 if (count_val == nullptr)
25173 return ira->codegen->invalid_instruction;
26170 return ira->codegen->invalid_inst_gen;
2517426171
2517526172 if (dest_ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {
2517626173 size_t count = bigint_as_usize(&count_val->data.x_bigint);
......@@ -25213,8 +26210,8 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
2521326210 }
2521426211
2521526212 if (dest_start + count > dest_end) {
25216 ir_add_error(ira, &instruction->base, buf_sprintf("out of bounds pointer access"));
25217 return ira->codegen->invalid_instruction;
26213 ir_add_error(ira, &instruction->base.base, buf_sprintf("out of bounds pointer access"));
26214 return ira->codegen->invalid_inst_gen;
2521826215 }
2521926216
2522026217 ZigValue *src_elements;
......@@ -25256,8 +26253,8 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
2525626253 }
2525726254
2525826255 if (src_start + count > src_end) {
25259 ir_add_error(ira, &instruction->base, buf_sprintf("out of bounds pointer access"));
25260 return ira->codegen->invalid_instruction;
26256 ir_add_error(ira, &instruction->base.base, buf_sprintf("out of bounds pointer access"));
26257 return ira->codegen->invalid_inst_gen;
2526126258 }
2526226259
2526326260 // TODO check for noalias violations - this should be generalized to work for any function
......@@ -25266,42 +26263,39 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
2526626263 copy_const_val(&dest_elements[dest_start + i], &src_elements[src_start + i]);
2526726264 }
2526826265
25269 return ir_const_void(ira, &instruction->base);
26266 return ir_const_void(ira, &instruction->base.base);
2527026267 }
2527126268 }
2527226269
25273 IrInstruction *result = ir_build_memcpy(&ira->new_irb, instruction->base.scope, instruction->base.source_node,
25274 casted_dest_ptr, casted_src_ptr, casted_count);
25275 result->value->type = ira->codegen->builtin_types.entry_void;
25276 return result;
26270 return ir_build_memcpy_gen(ira, &instruction->base.base, casted_dest_ptr, casted_src_ptr, casted_count);
2527726271}
2527826272
25279static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstructionSliceSrc *instruction) {
25280 IrInstruction *ptr_ptr = instruction->ptr->child;
26273static IrInstGen *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstSrcSlice *instruction) {
26274 IrInstGen *ptr_ptr = instruction->ptr->child;
2528126275 if (type_is_invalid(ptr_ptr->value->type))
25282 return ira->codegen->invalid_instruction;
26276 return ira->codegen->invalid_inst_gen;
2528326277
2528426278 ZigType *ptr_ptr_type = ptr_ptr->value->type;
2528526279 assert(ptr_ptr_type->id == ZigTypeIdPointer);
2528626280 ZigType *array_type = ptr_ptr_type->data.pointer.child_type;
2528726281
25288 IrInstruction *start = instruction->start->child;
26282 IrInstGen *start = instruction->start->child;
2528926283 if (type_is_invalid(start->value->type))
25290 return ira->codegen->invalid_instruction;
26284 return ira->codegen->invalid_inst_gen;
2529126285
2529226286 ZigType *usize = ira->codegen->builtin_types.entry_usize;
25293 IrInstruction *casted_start = ir_implicit_cast(ira, start, usize);
26287 IrInstGen *casted_start = ir_implicit_cast(ira, start, usize);
2529426288 if (type_is_invalid(casted_start->value->type))
25295 return ira->codegen->invalid_instruction;
26289 return ira->codegen->invalid_inst_gen;
2529626290
25297 IrInstruction *end;
26291 IrInstGen *end;
2529826292 if (instruction->end) {
2529926293 end = instruction->end->child;
2530026294 if (type_is_invalid(end->value->type))
25301 return ira->codegen->invalid_instruction;
26295 return ira->codegen->invalid_inst_gen;
2530226296 end = ir_implicit_cast(ira, end, usize);
2530326297 if (type_is_invalid(end->value->type))
25304 return ira->codegen->invalid_instruction;
26298 return ira->codegen->invalid_inst_gen;
2530526299 } else {
2530626300 end = nullptr;
2530726301 }
......@@ -25329,8 +26323,8 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
2532926323 PtrLenUnknown,
2533026324 array_type->data.pointer.explicit_alignment, 0, 0, false);
2533126325 } else {
25332 ir_add_error(ira, &instruction->base, buf_sprintf("slice of single-item pointer"));
25333 return ira->codegen->invalid_instruction;
26326 ir_add_error(ira, &instruction->base.base, buf_sprintf("slice of single-item pointer"));
26327 return ira->codegen->invalid_inst_gen;
2533426328 }
2533526329 } else {
2533626330 elem_type = array_type->data.pointer.child_type;
......@@ -25340,8 +26334,8 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
2534026334 ZigType *maybe_sentineled_slice_ptr_type = array_type;
2534126335 non_sentinel_slice_ptr_type = adjust_ptr_sentinel(ira->codegen, maybe_sentineled_slice_ptr_type, nullptr);
2534226336 if (!end) {
25343 ir_add_error(ira, &instruction->base, buf_sprintf("slice of pointer must include end value"));
25344 return ira->codegen->invalid_instruction;
26337 ir_add_error(ira, &instruction->base.base, buf_sprintf("slice of pointer must include end value"));
26338 return ira->codegen->invalid_inst_gen;
2534526339 }
2534626340 }
2534726341 } else if (is_slice(array_type)) {
......@@ -25349,23 +26343,23 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
2534926343 non_sentinel_slice_ptr_type = adjust_ptr_sentinel(ira->codegen, maybe_sentineled_slice_ptr_type, nullptr);
2535026344 elem_type = non_sentinel_slice_ptr_type->data.pointer.child_type;
2535126345 } else {
25352 ir_add_error(ira, &instruction->base,
26346 ir_add_error(ira, &instruction->base.base,
2535326347 buf_sprintf("slice of non-array type '%s'", buf_ptr(&array_type->name)));
25354 return ira->codegen->invalid_instruction;
26348 return ira->codegen->invalid_inst_gen;
2535526349 }
2535626350
2535726351 ZigType *return_type;
2535826352 ZigValue *sentinel_val = nullptr;
2535926353 if (instruction->sentinel) {
25360 IrInstruction *uncasted_sentinel = instruction->sentinel->child;
26354 IrInstGen *uncasted_sentinel = instruction->sentinel->child;
2536126355 if (type_is_invalid(uncasted_sentinel->value->type))
25362 return ira->codegen->invalid_instruction;
25363 IrInstruction *sentinel = ir_implicit_cast(ira, uncasted_sentinel, elem_type);
26356 return ira->codegen->invalid_inst_gen;
26357 IrInstGen *sentinel = ir_implicit_cast(ira, uncasted_sentinel, elem_type);
2536426358 if (type_is_invalid(sentinel->value->type))
25365 return ira->codegen->invalid_instruction;
26359 return ira->codegen->invalid_inst_gen;
2536626360 sentinel_val = ir_resolve_const(ira, sentinel, UndefBad);
2536726361 if (sentinel_val == nullptr)
25368 return ira->codegen->invalid_instruction;
26362 return ira->codegen->invalid_inst_gen;
2536926363 ZigType *slice_ptr_type = adjust_ptr_sentinel(ira->codegen, non_sentinel_slice_ptr_type, sentinel_val);
2537026364 return_type = get_slice_type(ira->codegen, slice_ptr_type);
2537126365 } else {
......@@ -25387,9 +26381,9 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
2538726381 if (array_type->id == ZigTypeIdPointer) {
2538826382 ZigType *child_array_type = array_type->data.pointer.child_type;
2538926383 assert(child_array_type->id == ZigTypeIdArray);
25390 parent_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.source_node);
26384 parent_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.base.source_node);
2539126385 if (parent_ptr == nullptr)
25392 return ira->codegen->invalid_instruction;
26386 return ira->codegen->invalid_inst_gen;
2539326387
2539426388
2539526389 if (parent_ptr->special == ConstValSpecialUndef) {
......@@ -25398,26 +26392,26 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
2539826392 rel_end = SIZE_MAX;
2539926393 ptr_is_undef = true;
2540026394 } else {
25401 array_val = const_ptr_pointee(ira, ira->codegen, parent_ptr, instruction->base.source_node);
26395 array_val = const_ptr_pointee(ira, ira->codegen, parent_ptr, instruction->base.base.source_node);
2540226396 if (array_val == nullptr)
25403 return ira->codegen->invalid_instruction;
26397 return ira->codegen->invalid_inst_gen;
2540426398
2540526399 rel_end = child_array_type->data.array.len;
2540626400 abs_offset = 0;
2540726401 }
2540826402 } else {
25409 array_val = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.source_node);
26403 array_val = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.base.source_node);
2541026404 if (array_val == nullptr)
25411 return ira->codegen->invalid_instruction;
26405 return ira->codegen->invalid_inst_gen;
2541226406 rel_end = array_type->data.array.len;
2541326407 parent_ptr = nullptr;
2541426408 abs_offset = 0;
2541526409 }
2541626410 } else if (array_type->id == ZigTypeIdPointer) {
2541726411 assert(array_type->data.pointer.ptr_len == PtrLenUnknown);
25418 parent_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.source_node);
26412 parent_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.base.source_node);
2541926413 if (parent_ptr == nullptr)
25420 return ira->codegen->invalid_instruction;
26414 return ira->codegen->invalid_inst_gen;
2542126415
2542226416 if (parent_ptr->special == ConstValSpecialUndef) {
2542326417 array_val = nullptr;
......@@ -25463,19 +26457,19 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
2546326457 zig_panic("TODO slice of null ptr");
2546426458 }
2546526459 } else if (is_slice(array_type)) {
25466 ZigValue *slice_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.source_node);
26460 ZigValue *slice_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.base.source_node);
2546726461 if (slice_ptr == nullptr)
25468 return ira->codegen->invalid_instruction;
26462 return ira->codegen->invalid_inst_gen;
2546926463
2547026464 if (slice_ptr->special == ConstValSpecialUndef) {
25471 ir_add_error(ira, &instruction->base, buf_sprintf("slice of undefined"));
25472 return ira->codegen->invalid_instruction;
26465 ir_add_error(ira, &instruction->base.base, buf_sprintf("slice of undefined"));
26466 return ira->codegen->invalid_inst_gen;
2547326467 }
2547426468
2547526469 parent_ptr = slice_ptr->data.x_struct.fields[slice_ptr_index];
2547626470 if (parent_ptr->special == ConstValSpecialUndef) {
25477 ir_add_error(ira, &instruction->base, buf_sprintf("slice of undefined"));
25478 return ira->codegen->invalid_instruction;
26471 ir_add_error(ira, &instruction->base.base, buf_sprintf("slice of undefined"));
26472 return ira->codegen->invalid_inst_gen;
2547926473 }
2548026474
2548126475 ZigValue *len_val = slice_ptr->data.x_struct.fields[slice_len_index];
......@@ -25518,37 +26512,37 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
2551826512
2551926513 ZigValue *start_val = ir_resolve_const(ira, casted_start, UndefBad);
2552026514 if (!start_val)
25521 return ira->codegen->invalid_instruction;
26515 return ira->codegen->invalid_inst_gen;
2552226516
2552326517 uint64_t start_scalar = bigint_as_u64(&start_val->data.x_bigint);
2552426518 if (!ptr_is_undef && start_scalar > rel_end) {
25525 ir_add_error(ira, &instruction->base, buf_sprintf("out of bounds slice"));
25526 return ira->codegen->invalid_instruction;
26519 ir_add_error(ira, &instruction->base.base, buf_sprintf("out of bounds slice"));
26520 return ira->codegen->invalid_inst_gen;
2552726521 }
2552826522
2552926523 uint64_t end_scalar = rel_end;
2553026524 if (end) {
2553126525 ZigValue *end_val = ir_resolve_const(ira, end, UndefBad);
2553226526 if (!end_val)
25533 return ira->codegen->invalid_instruction;
26527 return ira->codegen->invalid_inst_gen;
2553426528 end_scalar = bigint_as_u64(&end_val->data.x_bigint);
2553526529 }
2553626530 if (!ptr_is_undef) {
2553726531 if (end_scalar > rel_end) {
25538 ir_add_error(ira, &instruction->base, buf_sprintf("out of bounds slice"));
25539 return ira->codegen->invalid_instruction;
26532 ir_add_error(ira, &instruction->base.base, buf_sprintf("out of bounds slice"));
26533 return ira->codegen->invalid_inst_gen;
2554026534 }
2554126535 if (start_scalar > end_scalar) {
25542 ir_add_error(ira, &instruction->base, buf_sprintf("slice start is greater than end"));
25543 return ira->codegen->invalid_instruction;
26536 ir_add_error(ira, &instruction->base.base, buf_sprintf("slice start is greater than end"));
26537 return ira->codegen->invalid_inst_gen;
2554426538 }
2554526539 }
2554626540 if (ptr_is_undef && start_scalar != end_scalar) {
25547 ir_add_error(ira, &instruction->base, buf_sprintf("non-zero length slice of undefined pointer"));
25548 return ira->codegen->invalid_instruction;
26541 ir_add_error(ira, &instruction->base.base, buf_sprintf("non-zero length slice of undefined pointer"));
26542 return ira->codegen->invalid_inst_gen;
2554926543 }
2555026544
25551 IrInstruction *result = ir_const(ira, &instruction->base, return_type);
26545 IrInstGen *result = ir_const(ira, &instruction->base.base, return_type);
2555226546 ZigValue *out_val = result->value;
2555326547 out_val->data.x_struct.fields = alloc_const_vals_ptrs(2);
2555426548
......@@ -25605,28 +26599,28 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
2560526599 return result;
2560626600 }
2560726601
25608 IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,
25609 return_type, nullptr, true, false, true);
25610 if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {
26602 IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
26603 return_type, nullptr, true, true);
26604 if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
2561126605 return result_loc;
2561226606 }
25613 return ir_build_slice_gen(ira, &instruction->base, return_type,
26607 return ir_build_slice_gen(ira, &instruction->base.base, return_type,
2561426608 ptr_ptr, casted_start, end, instruction->safety_check_on, result_loc);
2561526609}
2561626610
25617static IrInstruction *ir_analyze_instruction_member_count(IrAnalyze *ira, IrInstructionMemberCount *instruction) {
26611static IrInstGen *ir_analyze_instruction_member_count(IrAnalyze *ira, IrInstSrcMemberCount *instruction) {
2561826612 Error err;
25619 IrInstruction *container = instruction->container->child;
26613 IrInstGen *container = instruction->container->child;
2562026614 if (type_is_invalid(container->value->type))
25621 return ira->codegen->invalid_instruction;
26615 return ira->codegen->invalid_inst_gen;
2562226616 ZigType *container_type = ir_resolve_type(ira, container);
2562326617
2562426618 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))
25625 return ira->codegen->invalid_instruction;
26619 return ira->codegen->invalid_inst_gen;
2562626620
2562726621 uint64_t result;
2562826622 if (type_is_invalid(container_type)) {
25629 return ira->codegen->invalid_instruction;
26623 return ira->codegen->invalid_inst_gen;
2563026624 } else if (container_type->id == ZigTypeIdEnum) {
2563126625 result = container_type->data.enumeration.src_field_count;
2563226626 } else if (container_type->id == ZigTypeIdStruct) {
......@@ -25634,135 +26628,135 @@ static IrInstruction *ir_analyze_instruction_member_count(IrAnalyze *ira, IrInst
2563426628 } else if (container_type->id == ZigTypeIdUnion) {
2563526629 result = container_type->data.unionation.src_field_count;
2563626630 } else if (container_type->id == ZigTypeIdErrorSet) {
25637 if (!resolve_inferred_error_set(ira->codegen, container_type, instruction->base.source_node)) {
25638 return ira->codegen->invalid_instruction;
26631 if (!resolve_inferred_error_set(ira->codegen, container_type, instruction->base.base.source_node)) {
26632 return ira->codegen->invalid_inst_gen;
2563926633 }
2564026634 if (type_is_global_error_set(container_type)) {
25641 ir_add_error(ira, &instruction->base, buf_sprintf("global error set member count not available at comptime"));
25642 return ira->codegen->invalid_instruction;
26635 ir_add_error(ira, &instruction->base.base, buf_sprintf("global error set member count not available at comptime"));
26636 return ira->codegen->invalid_inst_gen;
2564326637 }
2564426638 result = container_type->data.error_set.err_count;
2564526639 } else {
25646 ir_add_error(ira, &instruction->base, buf_sprintf("no value count available for type '%s'", buf_ptr(&container_type->name)));
25647 return ira->codegen->invalid_instruction;
26640 ir_add_error(ira, &instruction->base.base, buf_sprintf("no value count available for type '%s'", buf_ptr(&container_type->name)));
26641 return ira->codegen->invalid_inst_gen;
2564826642 }
2564926643
25650 return ir_const_unsigned(ira, &instruction->base, result);
26644 return ir_const_unsigned(ira, &instruction->base.base, result);
2565126645}
2565226646
25653static IrInstruction *ir_analyze_instruction_member_type(IrAnalyze *ira, IrInstructionMemberType *instruction) {
26647static IrInstGen *ir_analyze_instruction_member_type(IrAnalyze *ira, IrInstSrcMemberType *instruction) {
2565426648 Error err;
25655 IrInstruction *container_type_value = instruction->container_type->child;
26649 IrInstGen *container_type_value = instruction->container_type->child;
2565626650 ZigType *container_type = ir_resolve_type(ira, container_type_value);
2565726651 if (type_is_invalid(container_type))
25658 return ira->codegen->invalid_instruction;
26652 return ira->codegen->invalid_inst_gen;
2565926653
2566026654 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))
25661 return ira->codegen->invalid_instruction;
26655 return ira->codegen->invalid_inst_gen;
2566226656
2566326657
2566426658 uint64_t member_index;
25665 IrInstruction *index_value = instruction->member_index->child;
26659 IrInstGen *index_value = instruction->member_index->child;
2566626660 if (!ir_resolve_usize(ira, index_value, &member_index))
25667 return ira->codegen->invalid_instruction;
26661 return ira->codegen->invalid_inst_gen;
2566826662
2566926663 if (container_type->id == ZigTypeIdStruct) {
2567026664 if (member_index >= container_type->data.structure.src_field_count) {
25671 ir_add_error(ira, index_value,
26665 ir_add_error(ira, &index_value->base,
2567226666 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",
2567326667 member_index, buf_ptr(&container_type->name), container_type->data.structure.src_field_count));
25674 return ira->codegen->invalid_instruction;
26668 return ira->codegen->invalid_inst_gen;
2567526669 }
2567626670 TypeStructField *field = container_type->data.structure.fields[member_index];
2567726671
25678 return ir_const_type(ira, &instruction->base, field->type_entry);
26672 return ir_const_type(ira, &instruction->base.base, field->type_entry);
2567926673 } else if (container_type->id == ZigTypeIdUnion) {
2568026674 if (member_index >= container_type->data.unionation.src_field_count) {
25681 ir_add_error(ira, index_value,
26675 ir_add_error(ira, &index_value->base,
2568226676 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",
2568326677 member_index, buf_ptr(&container_type->name), container_type->data.unionation.src_field_count));
25684 return ira->codegen->invalid_instruction;
26678 return ira->codegen->invalid_inst_gen;
2568526679 }
2568626680 TypeUnionField *field = &container_type->data.unionation.fields[member_index];
2568726681
25688 return ir_const_type(ira, &instruction->base, field->type_entry);
26682 return ir_const_type(ira, &instruction->base.base, field->type_entry);
2568926683 } else {
25690 ir_add_error(ira, container_type_value,
26684 ir_add_error(ira, &container_type_value->base,
2569126685 buf_sprintf("type '%s' does not support @memberType", buf_ptr(&container_type->name)));
25692 return ira->codegen->invalid_instruction;
26686 return ira->codegen->invalid_inst_gen;
2569326687 }
2569426688}
2569526689
25696static IrInstruction *ir_analyze_instruction_member_name(IrAnalyze *ira, IrInstructionMemberName *instruction) {
26690static IrInstGen *ir_analyze_instruction_member_name(IrAnalyze *ira, IrInstSrcMemberName *instruction) {
2569726691 Error err;
25698 IrInstruction *container_type_value = instruction->container_type->child;
26692 IrInstGen *container_type_value = instruction->container_type->child;
2569926693 ZigType *container_type = ir_resolve_type(ira, container_type_value);
2570026694 if (type_is_invalid(container_type))
25701 return ira->codegen->invalid_instruction;
26695 return ira->codegen->invalid_inst_gen;
2570226696
2570326697 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))
25704 return ira->codegen->invalid_instruction;
26698 return ira->codegen->invalid_inst_gen;
2570526699
2570626700 uint64_t member_index;
25707 IrInstruction *index_value = instruction->member_index->child;
26701 IrInstGen *index_value = instruction->member_index->child;
2570826702 if (!ir_resolve_usize(ira, index_value, &member_index))
25709 return ira->codegen->invalid_instruction;
26703 return ira->codegen->invalid_inst_gen;
2571026704
2571126705 if (container_type->id == ZigTypeIdStruct) {
2571226706 if (member_index >= container_type->data.structure.src_field_count) {
25713 ir_add_error(ira, index_value,
26707 ir_add_error(ira, &index_value->base,
2571426708 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",
2571526709 member_index, buf_ptr(&container_type->name), container_type->data.structure.src_field_count));
25716 return ira->codegen->invalid_instruction;
26710 return ira->codegen->invalid_inst_gen;
2571726711 }
2571826712 TypeStructField *field = container_type->data.structure.fields[member_index];
2571926713
25720 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
26714 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
2572126715 init_const_str_lit(ira->codegen, result->value, field->name);
2572226716 return result;
2572326717 } else if (container_type->id == ZigTypeIdEnum) {
2572426718 if (member_index >= container_type->data.enumeration.src_field_count) {
25725 ir_add_error(ira, index_value,
26719 ir_add_error(ira, &index_value->base,
2572626720 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",
2572726721 member_index, buf_ptr(&container_type->name), container_type->data.enumeration.src_field_count));
25728 return ira->codegen->invalid_instruction;
26722 return ira->codegen->invalid_inst_gen;
2572926723 }
2573026724 TypeEnumField *field = &container_type->data.enumeration.fields[member_index];
2573126725
25732 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
26726 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
2573326727 init_const_str_lit(ira->codegen, result->value, field->name);
2573426728 return result;
2573526729 } else if (container_type->id == ZigTypeIdUnion) {
2573626730 if (member_index >= container_type->data.unionation.src_field_count) {
25737 ir_add_error(ira, index_value,
26731 ir_add_error(ira, &index_value->base,
2573826732 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",
2573926733 member_index, buf_ptr(&container_type->name), container_type->data.unionation.src_field_count));
25740 return ira->codegen->invalid_instruction;
26734 return ira->codegen->invalid_inst_gen;
2574126735 }
2574226736 TypeUnionField *field = &container_type->data.unionation.fields[member_index];
2574326737
25744 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
26738 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
2574526739 init_const_str_lit(ira->codegen, result->value, field->name);
2574626740 return result;
2574726741 } else {
25748 ir_add_error(ira, container_type_value,
26742 ir_add_error(ira, &container_type_value->base,
2574926743 buf_sprintf("type '%s' does not support @memberName", buf_ptr(&container_type->name)));
25750 return ira->codegen->invalid_instruction;
26744 return ira->codegen->invalid_inst_gen;
2575126745 }
2575226746}
2575326747
25754static IrInstruction *ir_analyze_instruction_has_field(IrAnalyze *ira, IrInstructionHasField *instruction) {
26748static IrInstGen *ir_analyze_instruction_has_field(IrAnalyze *ira, IrInstSrcHasField *instruction) {
2575526749 Error err;
2575626750 ZigType *container_type = ir_resolve_type(ira, instruction->container_type->child);
2575726751 if (type_is_invalid(container_type))
25758 return ira->codegen->invalid_instruction;
26752 return ira->codegen->invalid_inst_gen;
2575926753
2576026754 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusZeroBitsKnown)))
25761 return ira->codegen->invalid_instruction;
26755 return ira->codegen->invalid_inst_gen;
2576226756
2576326757 Buf *field_name = ir_resolve_str(ira, instruction->field_name->child);
2576426758 if (field_name == nullptr)
25765 return ira->codegen->invalid_instruction;
26759 return ira->codegen->invalid_inst_gen;
2576626760
2576726761 bool result;
2576826762 if (container_type->id == ZigTypeIdStruct) {
......@@ -25772,91 +26766,77 @@ static IrInstruction *ir_analyze_instruction_has_field(IrAnalyze *ira, IrInstruc
2577226766 } else if (container_type->id == ZigTypeIdUnion) {
2577326767 result = find_union_type_field(container_type, field_name) != nullptr;
2577426768 } else {
25775 ir_add_error(ira, instruction->container_type,
26769 ir_add_error(ira, &instruction->container_type->base,
2577626770 buf_sprintf("type '%s' does not support @hasField", buf_ptr(&container_type->name)));
25777 return ira->codegen->invalid_instruction;
26771 return ira->codegen->invalid_inst_gen;
2577826772 }
25779 return ir_const_bool(ira, &instruction->base, result);
26773 return ir_const_bool(ira, &instruction->base.base, result);
2578026774}
2578126775
25782static IrInstruction *ir_analyze_instruction_breakpoint(IrAnalyze *ira, IrInstructionBreakpoint *instruction) {
25783 IrInstruction *result = ir_build_breakpoint(&ira->new_irb,
25784 instruction->base.scope, instruction->base.source_node);
25785 result->value->type = ira->codegen->builtin_types.entry_void;
25786 return result;
26776static IrInstGen *ir_analyze_instruction_breakpoint(IrAnalyze *ira, IrInstSrcBreakpoint *instruction) {
26777 return ir_build_breakpoint_gen(ira, &instruction->base.base);
2578726778}
2578826779
25789static IrInstruction *ir_analyze_instruction_return_address(IrAnalyze *ira, IrInstructionReturnAddress *instruction) {
25790 IrInstruction *result = ir_build_return_address(&ira->new_irb,
25791 instruction->base.scope, instruction->base.source_node);
25792 result->value->type = ira->codegen->builtin_types.entry_usize;
25793 return result;
26780static IrInstGen *ir_analyze_instruction_return_address(IrAnalyze *ira, IrInstSrcReturnAddress *instruction) {
26781 return ir_build_return_address_gen(ira, &instruction->base.base);
2579426782}
2579526783
25796static IrInstruction *ir_analyze_instruction_frame_address(IrAnalyze *ira, IrInstructionFrameAddress *instruction) {
25797 IrInstruction *result = ir_build_frame_address(&ira->new_irb,
25798 instruction->base.scope, instruction->base.source_node);
25799 result->value->type = ira->codegen->builtin_types.entry_usize;
25800 return result;
26784static IrInstGen *ir_analyze_instruction_frame_address(IrAnalyze *ira, IrInstSrcFrameAddress *instruction) {
26785 return ir_build_frame_address_gen(ira, &instruction->base.base);
2580126786}
2580226787
25803static IrInstruction *ir_analyze_instruction_frame_handle(IrAnalyze *ira, IrInstructionFrameHandle *instruction) {
25804 ZigFn *fn = exec_fn_entry(ira->new_irb.exec);
25805 ir_assert(fn != nullptr, &instruction->base);
26788static IrInstGen *ir_analyze_instruction_frame_handle(IrAnalyze *ira, IrInstSrcFrameHandle *instruction) {
26789 ZigFn *fn = ira->new_irb.exec->fn_entry;
26790 ir_assert(fn != nullptr, &instruction->base.base);
2580626791
2580726792 if (fn->inferred_async_node == nullptr) {
25808 fn->inferred_async_node = instruction->base.source_node;
26793 fn->inferred_async_node = instruction->base.base.source_node;
2580926794 }
2581026795
2581126796 ZigType *frame_type = get_fn_frame_type(ira->codegen, fn);
2581226797 ZigType *ptr_frame_type = get_pointer_to_type(ira->codegen, frame_type, false);
2581326798
25814 IrInstruction *result = ir_build_handle(&ira->new_irb, instruction->base.scope, instruction->base.source_node);
25815 result->value->type = ptr_frame_type;
25816 return result;
26799 return ir_build_handle_gen(ira, &instruction->base.base, ptr_frame_type);
2581726800}
2581826801
25819static IrInstruction *ir_analyze_instruction_frame_type(IrAnalyze *ira, IrInstructionFrameType *instruction) {
26802static IrInstGen *ir_analyze_instruction_frame_type(IrAnalyze *ira, IrInstSrcFrameType *instruction) {
2582026803 ZigFn *fn = ir_resolve_fn(ira, instruction->fn->child);
2582126804 if (fn == nullptr)
25822 return ira->codegen->invalid_instruction;
26805 return ira->codegen->invalid_inst_gen;
2582326806
2582426807 if (fn->type_entry->data.fn.is_generic) {
25825 ir_add_error(ira, &instruction->base,
26808 ir_add_error(ira, &instruction->base.base,
2582626809 buf_sprintf("@Frame() of generic function"));
25827 return ira->codegen->invalid_instruction;
26810 return ira->codegen->invalid_inst_gen;
2582826811 }
2582926812
2583026813 ZigType *ty = get_fn_frame_type(ira->codegen, fn);
25831 return ir_const_type(ira, &instruction->base, ty);
26814 return ir_const_type(ira, &instruction->base.base, ty);
2583226815}
2583326816
25834static IrInstruction *ir_analyze_instruction_frame_size(IrAnalyze *ira, IrInstructionFrameSizeSrc *instruction) {
25835 IrInstruction *fn = instruction->fn->child;
26817static IrInstGen *ir_analyze_instruction_frame_size(IrAnalyze *ira, IrInstSrcFrameSize *instruction) {
26818 IrInstGen *fn = instruction->fn->child;
2583626819 if (type_is_invalid(fn->value->type))
25837 return ira->codegen->invalid_instruction;
26820 return ira->codegen->invalid_inst_gen;
2583826821
2583926822 if (fn->value->type->id != ZigTypeIdFn) {
25840 ir_add_error(ira, fn,
26823 ir_add_error(ira, &fn->base,
2584126824 buf_sprintf("expected function, found '%s'", buf_ptr(&fn->value->type->name)));
25842 return ira->codegen->invalid_instruction;
26825 return ira->codegen->invalid_inst_gen;
2584326826 }
2584426827
2584526828 ira->codegen->need_frame_size_prefix_data = true;
2584626829
25847 IrInstruction *result = ir_build_frame_size_gen(&ira->new_irb, instruction->base.scope,
25848 instruction->base.source_node, fn);
25849 result->value->type = ira->codegen->builtin_types.entry_usize;
25850 return result;
26830 return ir_build_frame_size_gen(ira, &instruction->base.base, fn);
2585126831}
2585226832
25853static IrInstruction *ir_analyze_instruction_align_of(IrAnalyze *ira, IrInstructionAlignOf *instruction) {
26833static IrInstGen *ir_analyze_instruction_align_of(IrAnalyze *ira, IrInstSrcAlignOf *instruction) {
2585426834 // Here we create a lazy value in order to avoid resolving the alignment of the type
2585526835 // immediately. This avoids false positive dependency loops such as:
2585626836 // const Node = struct {
2585726837 // field: []align(@alignOf(Node)) Node,
2585826838 // };
25859 IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_num_lit_int);
26839 IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_num_lit_int);
2586026840 result->value->special = ConstValSpecialLazy;
2586126841
2586226842 LazyValueAlignOf *lazy_align_of = allocate<LazyValueAlignOf>(1, "LazyValueAlignOf");
......@@ -25866,41 +26846,41 @@ static IrInstruction *ir_analyze_instruction_align_of(IrAnalyze *ira, IrInstruct
2586626846
2586726847 lazy_align_of->target_type = instruction->type_value->child;
2586826848 if (ir_resolve_type_lazy(ira, lazy_align_of->target_type) == nullptr)
25869 return ira->codegen->invalid_instruction;
26849 return ira->codegen->invalid_inst_gen;
2587026850
2587126851 return result;
2587226852}
2587326853
25874static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstructionOverflowOp *instruction) {
26854static IrInstGen *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstSrcOverflowOp *instruction) {
2587526855 Error err;
2587626856
25877 IrInstruction *type_value = instruction->type_value->child;
26857 IrInstGen *type_value = instruction->type_value->child;
2587826858 if (type_is_invalid(type_value->value->type))
25879 return ira->codegen->invalid_instruction;
26859 return ira->codegen->invalid_inst_gen;
2588026860
2588126861 ZigType *dest_type = ir_resolve_type(ira, type_value);
2588226862 if (type_is_invalid(dest_type))
25883 return ira->codegen->invalid_instruction;
26863 return ira->codegen->invalid_inst_gen;
2588426864
2588526865 if (dest_type->id != ZigTypeIdInt) {
25886 ir_add_error(ira, type_value,
26866 ir_add_error(ira, &type_value->base,
2588726867 buf_sprintf("expected integer type, found '%s'", buf_ptr(&dest_type->name)));
25888 return ira->codegen->invalid_instruction;
26868 return ira->codegen->invalid_inst_gen;
2588926869 }
2589026870
25891 IrInstruction *op1 = instruction->op1->child;
26871 IrInstGen *op1 = instruction->op1->child;
2589226872 if (type_is_invalid(op1->value->type))
25893 return ira->codegen->invalid_instruction;
26873 return ira->codegen->invalid_inst_gen;
2589426874
25895 IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, dest_type);
26875 IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, dest_type);
2589626876 if (type_is_invalid(casted_op1->value->type))
25897 return ira->codegen->invalid_instruction;
26877 return ira->codegen->invalid_inst_gen;
2589826878
25899 IrInstruction *op2 = instruction->op2->child;
26879 IrInstGen *op2 = instruction->op2->child;
2590026880 if (type_is_invalid(op2->value->type))
25901 return ira->codegen->invalid_instruction;
26881 return ira->codegen->invalid_inst_gen;
2590226882
25903 IrInstruction *casted_op2;
26883 IrInstGen *casted_op2;
2590426884 if (instruction->op == IrOverflowOpShl) {
2590526885 ZigType *shift_amt_type = get_smallest_unsigned_int_type(ira->codegen,
2590626886 dest_type->data.integral.bit_count - 1);
......@@ -25909,17 +26889,17 @@ static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstr
2590926889 casted_op2 = ir_implicit_cast(ira, op2, dest_type);
2591026890 }
2591126891 if (type_is_invalid(casted_op2->value->type))
25912 return ira->codegen->invalid_instruction;
26892 return ira->codegen->invalid_inst_gen;
2591326893
25914 IrInstruction *result_ptr = instruction->result_ptr->child;
26894 IrInstGen *result_ptr = instruction->result_ptr->child;
2591526895 if (type_is_invalid(result_ptr->value->type))
25916 return ira->codegen->invalid_instruction;
26896 return ira->codegen->invalid_inst_gen;
2591726897
2591826898 ZigType *expected_ptr_type;
2591926899 if (result_ptr->value->type->id == ZigTypeIdPointer) {
2592026900 uint32_t alignment;
2592126901 if ((err = resolve_ptr_align(ira, result_ptr->value->type, &alignment)))
25922 return ira->codegen->invalid_instruction;
26902 return ira->codegen->invalid_inst_gen;
2592326903 expected_ptr_type = get_pointer_to_type_extra(ira->codegen, dest_type,
2592426904 false, result_ptr->value->type->data.pointer.is_volatile,
2592526905 PtrLenSingle,
......@@ -25928,9 +26908,9 @@ static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstr
2592826908 expected_ptr_type = get_pointer_to_type(ira->codegen, dest_type, false);
2592926909 }
2593026910
25931 IrInstruction *casted_result_ptr = ir_implicit_cast(ira, result_ptr, expected_ptr_type);
26911 IrInstGen *casted_result_ptr = ir_implicit_cast(ira, result_ptr, expected_ptr_type);
2593226912 if (type_is_invalid(casted_result_ptr->value->type))
25933 return ira->codegen->invalid_instruction;
26913 return ira->codegen->invalid_inst_gen;
2593426914
2593526915 if (instr_is_comptime(casted_op1) &&
2593626916 instr_is_comptime(casted_op2) &&
......@@ -25938,22 +26918,22 @@ static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstr
2593826918 {
2593926919 ZigValue *op1_val = ir_resolve_const(ira, casted_op1, UndefBad);
2594026920 if (op1_val == nullptr)
25941 return ira->codegen->invalid_instruction;
26921 return ira->codegen->invalid_inst_gen;
2594226922
2594326923 ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);
2594426924 if (op2_val == nullptr)
25945 return ira->codegen->invalid_instruction;
26925 return ira->codegen->invalid_inst_gen;
2594626926
2594726927 ZigValue *result_val = ir_resolve_const(ira, casted_result_ptr, UndefBad);
2594826928 if (result_val == nullptr)
25949 return ira->codegen->invalid_instruction;
26929 return ira->codegen->invalid_inst_gen;
2595026930
2595126931 BigInt *op1_bigint = &op1_val->data.x_bigint;
2595226932 BigInt *op2_bigint = &op2_val->data.x_bigint;
2595326933 ZigValue *pointee_val = const_ptr_pointee(ira, ira->codegen, result_val,
25954 casted_result_ptr->source_node);
26934 casted_result_ptr->base.source_node);
2595526935 if (pointee_val == nullptr)
25956 return ira->codegen->invalid_instruction;
26936 return ira->codegen->invalid_inst_gen;
2595726937 BigInt *dest_bigint = &pointee_val->data.x_bigint;
2595826938 switch (instruction->op) {
2595926939 case IrOverflowOpAdd:
......@@ -25980,17 +26960,14 @@ static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstr
2598026960 dest_type->data.integral.is_signed);
2598126961 }
2598226962 pointee_val->special = ConstValSpecialStatic;
25983 return ir_const_bool(ira, &instruction->base, result_bool);
26963 return ir_const_bool(ira, &instruction->base.base, result_bool);
2598426964 }
2598526965
25986 IrInstruction *result = ir_build_overflow_op(&ira->new_irb,
25987 instruction->base.scope, instruction->base.source_node,
25988 instruction->op, type_value, casted_op1, casted_op2, casted_result_ptr, dest_type);
25989 result->value->type = ira->codegen->builtin_types.entry_bool;
25990 return result;
26966 return ir_build_overflow_op_gen(ira, &instruction->base.base, instruction->op,
26967 casted_op1, casted_op2, casted_result_ptr, dest_type);
2599126968}
2599226969
25993static void ir_eval_mul_add(IrAnalyze *ira, IrInstructionMulAdd *source_instr, ZigType *float_type,
26970static void ir_eval_mul_add(IrAnalyze *ira, IrInstSrcMulAdd *source_instr, ZigType *float_type,
2599426971 ZigValue *op1, ZigValue *op2, ZigValue *op3, ZigValue *out_val) {
2599526972 if (float_type->id == ZigTypeIdComptimeFloat) {
2599626973 f128M_mulAdd(&out_val->data.x_bigfloat.value, &op1->data.x_bigfloat.value, &op2->data.x_bigfloat.value,
......@@ -26017,61 +26994,61 @@ static void ir_eval_mul_add(IrAnalyze *ira, IrInstructionMulAdd *source_instr, Z
2601726994 }
2601826995}
2601926996
26020static IrInstruction *ir_analyze_instruction_mul_add(IrAnalyze *ira, IrInstructionMulAdd *instruction) {
26021 IrInstruction *type_value = instruction->type_value->child;
26997static IrInstGen *ir_analyze_instruction_mul_add(IrAnalyze *ira, IrInstSrcMulAdd *instruction) {
26998 IrInstGen *type_value = instruction->type_value->child;
2602226999 if (type_is_invalid(type_value->value->type))
26023 return ira->codegen->invalid_instruction;
27000 return ira->codegen->invalid_inst_gen;
2602427001
2602527002 ZigType *expr_type = ir_resolve_type(ira, type_value);
2602627003 if (type_is_invalid(expr_type))
26027 return ira->codegen->invalid_instruction;
27004 return ira->codegen->invalid_inst_gen;
2602827005
2602927006 // Only allow float types, and vectors of floats.
2603027007 ZigType *float_type = (expr_type->id == ZigTypeIdVector) ? expr_type->data.vector.elem_type : expr_type;
2603127008 if (float_type->id != ZigTypeIdFloat) {
26032 ir_add_error(ira, type_value,
27009 ir_add_error(ira, &type_value->base,
2603327010 buf_sprintf("expected float or vector of float type, found '%s'", buf_ptr(&float_type->name)));
26034 return ira->codegen->invalid_instruction;
27011 return ira->codegen->invalid_inst_gen;
2603527012 }
2603627013
26037 IrInstruction *op1 = instruction->op1->child;
27014 IrInstGen *op1 = instruction->op1->child;
2603827015 if (type_is_invalid(op1->value->type))
26039 return ira->codegen->invalid_instruction;
27016 return ira->codegen->invalid_inst_gen;
2604027017
26041 IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, expr_type);
27018 IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, expr_type);
2604227019 if (type_is_invalid(casted_op1->value->type))
26043 return ira->codegen->invalid_instruction;
27020 return ira->codegen->invalid_inst_gen;
2604427021
26045 IrInstruction *op2 = instruction->op2->child;
27022 IrInstGen *op2 = instruction->op2->child;
2604627023 if (type_is_invalid(op2->value->type))
26047 return ira->codegen->invalid_instruction;
27024 return ira->codegen->invalid_inst_gen;
2604827025
26049 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, expr_type);
27026 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, expr_type);
2605027027 if (type_is_invalid(casted_op2->value->type))
26051 return ira->codegen->invalid_instruction;
27028 return ira->codegen->invalid_inst_gen;
2605227029
26053 IrInstruction *op3 = instruction->op3->child;
27030 IrInstGen *op3 = instruction->op3->child;
2605427031 if (type_is_invalid(op3->value->type))
26055 return ira->codegen->invalid_instruction;
27032 return ira->codegen->invalid_inst_gen;
2605627033
26057 IrInstruction *casted_op3 = ir_implicit_cast(ira, op3, expr_type);
27034 IrInstGen *casted_op3 = ir_implicit_cast(ira, op3, expr_type);
2605827035 if (type_is_invalid(casted_op3->value->type))
26059 return ira->codegen->invalid_instruction;
27036 return ira->codegen->invalid_inst_gen;
2606027037
2606127038 if (instr_is_comptime(casted_op1) &&
2606227039 instr_is_comptime(casted_op2) &&
2606327040 instr_is_comptime(casted_op3)) {
2606427041 ZigValue *op1_const = ir_resolve_const(ira, casted_op1, UndefBad);
2606527042 if (!op1_const)
26066 return ira->codegen->invalid_instruction;
27043 return ira->codegen->invalid_inst_gen;
2606727044 ZigValue *op2_const = ir_resolve_const(ira, casted_op2, UndefBad);
2606827045 if (!op2_const)
26069 return ira->codegen->invalid_instruction;
27046 return ira->codegen->invalid_inst_gen;
2607027047 ZigValue *op3_const = ir_resolve_const(ira, casted_op3, UndefBad);
2607127048 if (!op3_const)
26072 return ira->codegen->invalid_instruction;
27049 return ira->codegen->invalid_inst_gen;
2607327050
26074 IrInstruction *result = ir_const(ira, &instruction->base, expr_type);
27051 IrInstGen *result = ir_const(ira, &instruction->base.base, expr_type);
2607527052 ZigValue *out_val = result->value;
2607627053
2607727054 if (expr_type->id == ZigTypeIdVector) {
......@@ -26102,63 +27079,59 @@ static IrInstruction *ir_analyze_instruction_mul_add(IrAnalyze *ira, IrInstructi
2610227079 return result;
2610327080 }
2610427081
26105 IrInstruction *result = ir_build_mul_add(&ira->new_irb,
26106 instruction->base.scope, instruction->base.source_node,
26107 type_value, casted_op1, casted_op2, casted_op3);
26108 result->value->type = expr_type;
26109 return result;
27082 return ir_build_mul_add_gen(ira, &instruction->base.base, casted_op1, casted_op2, casted_op3, expr_type);
2611027083}
2611127084
26112static IrInstruction *ir_analyze_instruction_test_err(IrAnalyze *ira, IrInstructionTestErrSrc *instruction) {
26113 IrInstruction *base_ptr = instruction->base_ptr->child;
27085static IrInstGen *ir_analyze_instruction_test_err(IrAnalyze *ira, IrInstSrcTestErr *instruction) {
27086 IrInstGen *base_ptr = instruction->base_ptr->child;
2611427087 if (type_is_invalid(base_ptr->value->type))
26115 return ira->codegen->invalid_instruction;
27088 return ira->codegen->invalid_inst_gen;
2611627089
26117 IrInstruction *value;
27090 IrInstGen *value;
2611827091 if (instruction->base_ptr_is_payload) {
2611927092 value = base_ptr;
2612027093 } else {
26121 value = ir_get_deref(ira, &instruction->base, base_ptr, nullptr);
27094 value = ir_get_deref(ira, &instruction->base.base, base_ptr, nullptr);
2612227095 }
2612327096
2612427097 ZigType *type_entry = value->value->type;
2612527098 if (type_is_invalid(type_entry))
26126 return ira->codegen->invalid_instruction;
27099 return ira->codegen->invalid_inst_gen;
2612727100 if (type_entry->id == ZigTypeIdErrorUnion) {
2612827101 if (instr_is_comptime(value)) {
2612927102 ZigValue *err_union_val = ir_resolve_const(ira, value, UndefBad);
2613027103 if (!err_union_val)
26131 return ira->codegen->invalid_instruction;
27104 return ira->codegen->invalid_inst_gen;
2613227105
2613327106 if (err_union_val->special != ConstValSpecialRuntime) {
2613427107 ErrorTableEntry *err = err_union_val->data.x_err_union.error_set->data.x_err_set;
26135 return ir_const_bool(ira, &instruction->base, (err != nullptr));
27108 return ir_const_bool(ira, &instruction->base.base, (err != nullptr));
2613627109 }
2613727110 }
2613827111
2613927112 if (instruction->resolve_err_set) {
2614027113 ZigType *err_set_type = type_entry->data.error_union.err_set_type;
26141 if (!resolve_inferred_error_set(ira->codegen, err_set_type, instruction->base.source_node)) {
26142 return ira->codegen->invalid_instruction;
27114 if (!resolve_inferred_error_set(ira->codegen, err_set_type, instruction->base.base.source_node)) {
27115 return ira->codegen->invalid_inst_gen;
2614327116 }
2614427117 if (!type_is_global_error_set(err_set_type) &&
2614527118 err_set_type->data.error_set.err_count == 0)
2614627119 {
2614727120 assert(!err_set_type->data.error_set.incomplete);
26148 return ir_const_bool(ira, &instruction->base, false);
27121 return ir_const_bool(ira, &instruction->base.base, false);
2614927122 }
2615027123 }
2615127124
26152 return ir_build_test_err_gen(ira, &instruction->base, value);
27125 return ir_build_test_err_gen(ira, &instruction->base.base, value);
2615327126 } else if (type_entry->id == ZigTypeIdErrorSet) {
26154 return ir_const_bool(ira, &instruction->base, true);
27127 return ir_const_bool(ira, &instruction->base.base, true);
2615527128 } else {
26156 return ir_const_bool(ira, &instruction->base, false);
27129 return ir_const_bool(ira, &instruction->base.base, false);
2615727130 }
2615827131}
2615927132
26160static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *source_instr,
26161 IrInstruction *base_ptr, bool initializing)
27133static IrInstGen *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInst* source_instr,
27134 IrInstGen *base_ptr, bool initializing)
2616227135{
2616327136 ZigType *ptr_type = base_ptr->value->type;
2616427137
......@@ -26167,12 +27140,12 @@ static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *
2616727140
2616827141 ZigType *type_entry = ptr_type->data.pointer.child_type;
2616927142 if (type_is_invalid(type_entry))
26170 return ira->codegen->invalid_instruction;
27143 return ira->codegen->invalid_inst_gen;
2617127144
2617227145 if (type_entry->id != ZigTypeIdErrorUnion) {
26173 ir_add_error(ira, base_ptr,
27146 ir_add_error(ira, &base_ptr->base,
2617427147 buf_sprintf("expected error union type, found '%s'", buf_ptr(&type_entry->name)));
26175 return ira->codegen->invalid_instruction;
27148 return ira->codegen->invalid_inst_gen;
2617627149 }
2617727150
2617827151 ZigType *err_set_type = type_entry->data.error_union.err_set_type;
......@@ -26183,13 +27156,13 @@ static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *
2618327156 if (instr_is_comptime(base_ptr)) {
2618427157 ZigValue *ptr_val = ir_resolve_const(ira, base_ptr, UndefBad);
2618527158 if (!ptr_val)
26186 return ira->codegen->invalid_instruction;
27159 return ira->codegen->invalid_inst_gen;
2618727160 if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar &&
2618827161 ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr)
2618927162 {
2619027163 ZigValue *err_union_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);
2619127164 if (err_union_val == nullptr)
26192 return ira->codegen->invalid_instruction;
27165 return ira->codegen->invalid_inst_gen;
2619327166
2619427167 if (initializing && err_union_val->special == ConstValSpecialUndef) {
2619527168 ZigValue *vals = create_const_vals(2);
......@@ -26212,11 +27185,10 @@ static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *
2621227185 }
2621327186 ir_assert(err_union_val->special != ConstValSpecialRuntime, source_instr);
2621427187
26215 IrInstruction *result;
27188 IrInstGen *result;
2621627189 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
26217 result = ir_build_unwrap_err_code(&ira->new_irb, source_instr->scope,
26218 source_instr->source_node, base_ptr);
26219 result->value->type = result_type;
27190 result = ir_build_unwrap_err_code_gen(ira, source_instr->scope,
27191 source_instr->source_node, base_ptr, result_type);
2622027192 result->value->special = ConstValSpecialStatic;
2622127193 } else {
2622227194 result = ir_const(ira, source_instr, result_type);
......@@ -26229,23 +27201,18 @@ static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *
2622927201 }
2623027202 }
2623127203
26232 IrInstruction *result = ir_build_unwrap_err_code(&ira->new_irb,
26233 source_instr->scope, source_instr->source_node, base_ptr);
26234 result->value->type = result_type;
26235 return result;
27204 return ir_build_unwrap_err_code_gen(ira, source_instr->scope, source_instr->source_node, base_ptr, result_type);
2623627205}
2623727206
26238static IrInstruction *ir_analyze_instruction_unwrap_err_code(IrAnalyze *ira,
26239 IrInstructionUnwrapErrCode *instruction)
26240{
26241 IrInstruction *base_ptr = instruction->err_union_ptr->child;
27207static IrInstGen *ir_analyze_instruction_unwrap_err_code(IrAnalyze *ira, IrInstSrcUnwrapErrCode *instruction) {
27208 IrInstGen *base_ptr = instruction->err_union_ptr->child;
2624227209 if (type_is_invalid(base_ptr->value->type))
26243 return ira->codegen->invalid_instruction;
26244 return ir_analyze_unwrap_err_code(ira, &instruction->base, base_ptr, false);
27210 return ira->codegen->invalid_inst_gen;
27211 return ir_analyze_unwrap_err_code(ira, &instruction->base.base, base_ptr, false);
2624527212}
2624627213
26247static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruction *source_instr,
26248 IrInstruction *base_ptr, bool safety_check_on, bool initializing)
27214static IrInstGen *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInst* source_instr,
27215 IrInstGen *base_ptr, bool safety_check_on, bool initializing)
2624927216{
2625027217 ZigType *ptr_type = base_ptr->value->type;
2625127218
......@@ -26254,17 +27221,17 @@ static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruct
2625427221
2625527222 ZigType *type_entry = ptr_type->data.pointer.child_type;
2625627223 if (type_is_invalid(type_entry))
26257 return ira->codegen->invalid_instruction;
27224 return ira->codegen->invalid_inst_gen;
2625827225
2625927226 if (type_entry->id != ZigTypeIdErrorUnion) {
26260 ir_add_error(ira, base_ptr,
27227 ir_add_error(ira, &base_ptr->base,
2626127228 buf_sprintf("expected error union type, found '%s'", buf_ptr(&type_entry->name)));
26262 return ira->codegen->invalid_instruction;
27229 return ira->codegen->invalid_inst_gen;
2626327230 }
2626427231
2626527232 ZigType *payload_type = type_entry->data.error_union.payload_type;
2626627233 if (type_is_invalid(payload_type))
26267 return ira->codegen->invalid_instruction;
27234 return ira->codegen->invalid_inst_gen;
2626827235
2626927236 ZigType *result_type = get_pointer_to_type_extra(ira->codegen, payload_type,
2627027237 ptr_type->data.pointer.is_const, ptr_type->data.pointer.is_volatile,
......@@ -26273,11 +27240,11 @@ static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruct
2627327240 if (instr_is_comptime(base_ptr)) {
2627427241 ZigValue *ptr_val = ir_resolve_const(ira, base_ptr, UndefBad);
2627527242 if (!ptr_val)
26276 return ira->codegen->invalid_instruction;
27243 return ira->codegen->invalid_inst_gen;
2627727244 if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
2627827245 ZigValue *err_union_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);
2627927246 if (err_union_val == nullptr)
26280 return ira->codegen->invalid_instruction;
27247 return ira->codegen->invalid_inst_gen;
2628127248 if (initializing && err_union_val->special == ConstValSpecialUndef) {
2628227249 ZigValue *vals = create_const_vals(2);
2628327250 ZigValue *err_set_val = &vals[0];
......@@ -26300,14 +27267,13 @@ static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruct
2630027267 if (err != nullptr) {
2630127268 ir_add_error(ira, source_instr,
2630227269 buf_sprintf("caught unexpected error '%s'", buf_ptr(&err->name)));
26303 return ira->codegen->invalid_instruction;
27270 return ira->codegen->invalid_inst_gen;
2630427271 }
2630527272
26306 IrInstruction *result;
27273 IrInstGen *result;
2630727274 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
26308 result = ir_build_unwrap_err_payload(&ira->new_irb, source_instr->scope,
26309 source_instr->source_node, base_ptr, safety_check_on, initializing);
26310 result->value->type = result_type;
27275 result = ir_build_unwrap_err_payload_gen(ira, source_instr->scope,
27276 source_instr->source_node, base_ptr, safety_check_on, initializing, result_type);
2631127277 result->value->special = ConstValSpecialStatic;
2631227278 } else {
2631327279 result = ir_const(ira, source_instr, result_type);
......@@ -26320,28 +27286,26 @@ static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruct
2632027286 }
2632127287 }
2632227288
26323 IrInstruction *result = ir_build_unwrap_err_payload(&ira->new_irb, source_instr->scope,
26324 source_instr->source_node, base_ptr, safety_check_on, initializing);
26325 result->value->type = result_type;
26326 return result;
27289 return ir_build_unwrap_err_payload_gen(ira, source_instr->scope, source_instr->source_node,
27290 base_ptr, safety_check_on, initializing, result_type);
2632727291}
2632827292
26329static IrInstruction *ir_analyze_instruction_unwrap_err_payload(IrAnalyze *ira,
26330 IrInstructionUnwrapErrPayload *instruction)
27293static IrInstGen *ir_analyze_instruction_unwrap_err_payload(IrAnalyze *ira,
27294 IrInstSrcUnwrapErrPayload *instruction)
2633127295{
2633227296 assert(instruction->value->child);
26333 IrInstruction *value = instruction->value->child;
27297 IrInstGen *value = instruction->value->child;
2633427298 if (type_is_invalid(value->value->type))
26335 return ira->codegen->invalid_instruction;
27299 return ira->codegen->invalid_inst_gen;
2633627300
26337 return ir_analyze_unwrap_error_payload(ira, &instruction->base, value, instruction->safety_check_on, false);
27301 return ir_analyze_unwrap_error_payload(ira, &instruction->base.base, value, instruction->safety_check_on, false);
2633827302}
2633927303
26340static IrInstruction *ir_analyze_instruction_fn_proto(IrAnalyze *ira, IrInstructionFnProto *instruction) {
26341 AstNode *proto_node = instruction->base.source_node;
27304static IrInstGen *ir_analyze_instruction_fn_proto(IrAnalyze *ira, IrInstSrcFnProto *instruction) {
27305 AstNode *proto_node = instruction->base.base.source_node;
2634227306 assert(proto_node->type == NodeTypeFnProto);
2634327307
26344 IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_type);
27308 IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_type);
2634527309 result->value->special = ConstValSpecialLazy;
2634627310
2634727311 LazyValueFnType *lazy_fn_type = allocate<LazyValueFnType>(1, "LazyValueFnType");
......@@ -26350,29 +27314,29 @@ static IrInstruction *ir_analyze_instruction_fn_proto(IrAnalyze *ira, IrInstruct
2635027314 lazy_fn_type->base.id = LazyValueIdFnType;
2635127315
2635227316 if (proto_node->data.fn_proto.auto_err_set) {
26353 ir_add_error(ira, &instruction->base,
27317 ir_add_error(ira, &instruction->base.base,
2635427318 buf_sprintf("inferring error set of return type valid only for function definitions"));
26355 return ira->codegen->invalid_instruction;
27319 return ira->codegen->invalid_inst_gen;
2635627320 }
2635727321
2635827322 lazy_fn_type->cc = cc_from_fn_proto(&proto_node->data.fn_proto);
2635927323 if (instruction->callconv_value != nullptr) {
2636027324 ZigType *cc_enum_type = get_builtin_type(ira->codegen, "CallingConvention");
2636127325
26362 IrInstruction *casted_value = ir_implicit_cast(ira, instruction->callconv_value, cc_enum_type);
27326 IrInstGen *casted_value = ir_implicit_cast(ira, instruction->callconv_value->child, cc_enum_type);
2636327327 if (type_is_invalid(casted_value->value->type))
26364 return ira->codegen->invalid_instruction;
27328 return ira->codegen->invalid_inst_gen;
2636527329
2636627330 ZigValue *const_value = ir_resolve_const(ira, casted_value, UndefBad);
2636727331 if (const_value == nullptr)
26368 return ira->codegen->invalid_instruction;
27332 return ira->codegen->invalid_inst_gen;
2636927333
2637027334 lazy_fn_type->cc = (CallingConvention)bigint_as_u32(&const_value->data.x_enum_tag);
2637127335 }
2637227336
2637327337 size_t param_count = proto_node->data.fn_proto.params.length;
2637427338 lazy_fn_type->proto_node = proto_node;
26375 lazy_fn_type->param_types = allocate<IrInstruction *>(param_count);
27339 lazy_fn_type->param_types = allocate<IrInstGen *>(param_count);
2637627340
2637727341 for (size_t param_index = 0; param_index < param_count; param_index += 1) {
2637827342 AstNode *param_node = proto_node->data.fn_proto.params.at(param_index);
......@@ -26397,63 +27361,63 @@ static IrInstruction *ir_analyze_instruction_fn_proto(IrAnalyze *ira, IrInstruct
2639727361 return result;
2639827362 }
2639927363
26400 IrInstruction *param_type_value = instruction->param_types[param_index]->child;
27364 IrInstGen *param_type_value = instruction->param_types[param_index]->child;
2640127365 if (type_is_invalid(param_type_value->value->type))
26402 return ira->codegen->invalid_instruction;
27366 return ira->codegen->invalid_inst_gen;
2640327367 if (ir_resolve_const(ira, param_type_value, LazyOk) == nullptr)
26404 return ira->codegen->invalid_instruction;
27368 return ira->codegen->invalid_inst_gen;
2640527369 lazy_fn_type->param_types[param_index] = param_type_value;
2640627370 }
2640727371
2640827372 if (instruction->align_value != nullptr) {
2640927373 lazy_fn_type->align_inst = instruction->align_value->child;
2641027374 if (ir_resolve_const(ira, lazy_fn_type->align_inst, LazyOk) == nullptr)
26411 return ira->codegen->invalid_instruction;
27375 return ira->codegen->invalid_inst_gen;
2641227376 }
2641327377
2641427378 lazy_fn_type->return_type = instruction->return_type->child;
2641527379 if (ir_resolve_const(ira, lazy_fn_type->return_type, LazyOk) == nullptr)
26416 return ira->codegen->invalid_instruction;
27380 return ira->codegen->invalid_inst_gen;
2641727381
2641827382 return result;
2641927383}
2642027384
26421static IrInstruction *ir_analyze_instruction_test_comptime(IrAnalyze *ira, IrInstructionTestComptime *instruction) {
26422 IrInstruction *value = instruction->value->child;
27385static IrInstGen *ir_analyze_instruction_test_comptime(IrAnalyze *ira, IrInstSrcTestComptime *instruction) {
27386 IrInstGen *value = instruction->value->child;
2642327387 if (type_is_invalid(value->value->type))
26424 return ira->codegen->invalid_instruction;
27388 return ira->codegen->invalid_inst_gen;
2642527389
26426 return ir_const_bool(ira, &instruction->base, instr_is_comptime(value));
27390 return ir_const_bool(ira, &instruction->base.base, instr_is_comptime(value));
2642727391}
2642827392
26429static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
26430 IrInstructionCheckSwitchProngs *instruction)
27393static IrInstGen *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
27394 IrInstSrcCheckSwitchProngs *instruction)
2643127395{
26432 IrInstruction *target_value = instruction->target_value->child;
27396 IrInstGen *target_value = instruction->target_value->child;
2643327397 ZigType *switch_type = target_value->value->type;
2643427398 if (type_is_invalid(switch_type))
26435 return ira->codegen->invalid_instruction;
27399 return ira->codegen->invalid_inst_gen;
2643627400
2643727401 if (switch_type->id == ZigTypeIdEnum) {
2643827402 HashMap<BigInt, AstNode *, bigint_hash, bigint_eql> field_prev_uses = {};
2643927403 field_prev_uses.init(switch_type->data.enumeration.src_field_count);
2644027404
2644127405 for (size_t range_i = 0; range_i < instruction->range_count; range_i += 1) {
26442 IrInstructionCheckSwitchProngsRange *range = &instruction->ranges[range_i];
27406 IrInstSrcCheckSwitchProngsRange *range = &instruction->ranges[range_i];
2644327407
26444 IrInstruction *start_value_uncasted = range->start->child;
27408 IrInstGen *start_value_uncasted = range->start->child;
2644527409 if (type_is_invalid(start_value_uncasted->value->type))
26446 return ira->codegen->invalid_instruction;
26447 IrInstruction *start_value = ir_implicit_cast(ira, start_value_uncasted, switch_type);
27410 return ira->codegen->invalid_inst_gen;
27411 IrInstGen *start_value = ir_implicit_cast(ira, start_value_uncasted, switch_type);
2644827412 if (type_is_invalid(start_value->value->type))
26449 return ira->codegen->invalid_instruction;
27413 return ira->codegen->invalid_inst_gen;
2645027414
26451 IrInstruction *end_value_uncasted = range->end->child;
27415 IrInstGen *end_value_uncasted = range->end->child;
2645227416 if (type_is_invalid(end_value_uncasted->value->type))
26453 return ira->codegen->invalid_instruction;
26454 IrInstruction *end_value = ir_implicit_cast(ira, end_value_uncasted, switch_type);
27417 return ira->codegen->invalid_inst_gen;
27418 IrInstGen *end_value = ir_implicit_cast(ira, end_value_uncasted, switch_type);
2645527419 if (type_is_invalid(end_value->value->type))
26456 return ira->codegen->invalid_instruction;
27420 return ira->codegen->invalid_inst_gen;
2645727421
2645827422 assert(start_value->value->type->id == ZigTypeIdEnum);
2645927423 BigInt start_index;
......@@ -26464,7 +27428,7 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
2646427428 bigint_init_bigint(&end_index, &end_value->value->data.x_enum_tag);
2646527429
2646627430 if (bigint_cmp(&start_index, &end_index) == CmpGT) {
26467 ir_add_error(ira, start_value,
27431 ir_add_error(ira, &start_value->base,
2646827432 buf_sprintf("range start value is greater than the end value"));
2646927433 }
2647027434
......@@ -26475,12 +27439,12 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
2647527439 if (cmp == CmpGT) {
2647627440 break;
2647727441 }
26478 auto entry = field_prev_uses.put_unique(field_index, start_value->source_node);
27442 auto entry = field_prev_uses.put_unique(field_index, start_value->base.source_node);
2647927443 if (entry) {
2648027444 AstNode *prev_node = entry->value;
2648127445 TypeEnumField *enum_field = find_enum_field_by_tag(switch_type, &field_index);
2648227446 assert(enum_field != nullptr);
26483 ErrorMsg *msg = ir_add_error(ira, start_value,
27447 ErrorMsg *msg = ir_add_error(ira, &start_value->base,
2648427448 buf_sprintf("duplicate switch value: '%s.%s'", buf_ptr(&switch_type->name),
2648527449 buf_ptr(enum_field->name)));
2648627450 add_error_note(ira->codegen, msg, prev_node, buf_sprintf("other value is here"));
......@@ -26490,7 +27454,7 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
2649027454 }
2649127455 if (instruction->have_underscore_prong) {
2649227456 if (!switch_type->data.enumeration.non_exhaustive){
26493 ir_add_error(ira, &instruction->base,
27457 ir_add_error(ira, &instruction->base.base,
2649427458 buf_sprintf("switch on non-exhaustive enum has `_` prong"));
2649527459 }
2649627460 for (uint32_t i = 0; i < switch_type->data.enumeration.src_field_count; i += 1) {
......@@ -26500,14 +27464,14 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
2650027464
2650127465 auto entry = field_prev_uses.maybe_get(enum_field->value);
2650227466 if (!entry) {
26503 ir_add_error(ira, &instruction->base,
27467 ir_add_error(ira, &instruction->base.base,
2650427468 buf_sprintf("enumeration value '%s.%s' not handled in switch", buf_ptr(&switch_type->name),
2650527469 buf_ptr(enum_field->name)));
2650627470 }
2650727471 }
2650827472 } else if (!instruction->have_else_prong) {
2650927473 if (switch_type->data.enumeration.non_exhaustive) {
26510 ir_add_error(ira, &instruction->base,
27474 ir_add_error(ira, &instruction->base.base,
2651127475 buf_sprintf("switch on non-exhaustive enum must include `else` or `_` prong"));
2651227476 }
2651327477 for (uint32_t i = 0; i < switch_type->data.enumeration.src_field_count; i += 1) {
......@@ -26515,69 +27479,69 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
2651527479
2651627480 auto entry = field_prev_uses.maybe_get(enum_field->value);
2651727481 if (!entry) {
26518 ir_add_error(ira, &instruction->base,
27482 ir_add_error(ira, &instruction->base.base,
2651927483 buf_sprintf("enumeration value '%s.%s' not handled in switch", buf_ptr(&switch_type->name),
2652027484 buf_ptr(enum_field->name)));
2652127485 }
2652227486 }
2652327487 }
2652427488 } else if (switch_type->id == ZigTypeIdErrorSet) {
26525 if (!resolve_inferred_error_set(ira->codegen, switch_type, target_value->source_node)) {
26526 return ira->codegen->invalid_instruction;
27489 if (!resolve_inferred_error_set(ira->codegen, switch_type, target_value->base.source_node)) {
27490 return ira->codegen->invalid_inst_gen;
2652727491 }
2652827492
2652927493 size_t field_prev_uses_count = ira->codegen->errors_by_index.length;
2653027494 AstNode **field_prev_uses = allocate<AstNode *>(field_prev_uses_count, "AstNode *");
2653127495
2653227496 for (size_t range_i = 0; range_i < instruction->range_count; range_i += 1) {
26533 IrInstructionCheckSwitchProngsRange *range = &instruction->ranges[range_i];
27497 IrInstSrcCheckSwitchProngsRange *range = &instruction->ranges[range_i];
2653427498
26535 IrInstruction *start_value_uncasted = range->start->child;
27499 IrInstGen *start_value_uncasted = range->start->child;
2653627500 if (type_is_invalid(start_value_uncasted->value->type))
26537 return ira->codegen->invalid_instruction;
26538 IrInstruction *start_value = ir_implicit_cast(ira, start_value_uncasted, switch_type);
27501 return ira->codegen->invalid_inst_gen;
27502 IrInstGen *start_value = ir_implicit_cast(ira, start_value_uncasted, switch_type);
2653927503 if (type_is_invalid(start_value->value->type))
26540 return ira->codegen->invalid_instruction;
27504 return ira->codegen->invalid_inst_gen;
2654127505
26542 IrInstruction *end_value_uncasted = range->end->child;
27506 IrInstGen *end_value_uncasted = range->end->child;
2654327507 if (type_is_invalid(end_value_uncasted->value->type))
26544 return ira->codegen->invalid_instruction;
26545 IrInstruction *end_value = ir_implicit_cast(ira, end_value_uncasted, switch_type);
27508 return ira->codegen->invalid_inst_gen;
27509 IrInstGen *end_value = ir_implicit_cast(ira, end_value_uncasted, switch_type);
2654627510 if (type_is_invalid(end_value->value->type))
26547 return ira->codegen->invalid_instruction;
27511 return ira->codegen->invalid_inst_gen;
2654827512
26549 ir_assert(start_value->value->type->id == ZigTypeIdErrorSet, &instruction->base);
27513 ir_assert(start_value->value->type->id == ZigTypeIdErrorSet, &instruction->base.base);
2655027514 uint32_t start_index = start_value->value->data.x_err_set->value;
2655127515
26552 ir_assert(end_value->value->type->id == ZigTypeIdErrorSet, &instruction->base);
27516 ir_assert(end_value->value->type->id == ZigTypeIdErrorSet, &instruction->base.base);
2655327517 uint32_t end_index = end_value->value->data.x_err_set->value;
2655427518
2655527519 if (start_index != end_index) {
26556 ir_add_error(ira, end_value, buf_sprintf("ranges not allowed when switching on errors"));
26557 return ira->codegen->invalid_instruction;
27520 ir_add_error(ira, &end_value->base, buf_sprintf("ranges not allowed when switching on errors"));
27521 return ira->codegen->invalid_inst_gen;
2655827522 }
2655927523
2656027524 AstNode *prev_node = field_prev_uses[start_index];
2656127525 if (prev_node != nullptr) {
2656227526 Buf *err_name = &ira->codegen->errors_by_index.at(start_index)->name;
26563 ErrorMsg *msg = ir_add_error(ira, start_value,
27527 ErrorMsg *msg = ir_add_error(ira, &start_value->base,
2656427528 buf_sprintf("duplicate switch value: '%s.%s'", buf_ptr(&switch_type->name), buf_ptr(err_name)));
2656527529 add_error_note(ira->codegen, msg, prev_node, buf_sprintf("other value is here"));
2656627530 }
26567 field_prev_uses[start_index] = start_value->source_node;
27531 field_prev_uses[start_index] = start_value->base.source_node;
2656827532 }
2656927533 if (!instruction->have_else_prong) {
2657027534 if (type_is_global_error_set(switch_type)) {
26571 ir_add_error(ira, &instruction->base,
27535 ir_add_error(ira, &instruction->base.base,
2657227536 buf_sprintf("else prong required when switching on type 'anyerror'"));
26573 return ira->codegen->invalid_instruction;
27537 return ira->codegen->invalid_inst_gen;
2657427538 } else {
2657527539 for (uint32_t i = 0; i < switch_type->data.error_set.err_count; i += 1) {
2657627540 ErrorTableEntry *err_entry = switch_type->data.error_set.errors[i];
2657727541
2657827542 AstNode *prev_node = field_prev_uses[err_entry->value];
2657927543 if (prev_node == nullptr) {
26580 ir_add_error(ira, &instruction->base,
27544 ir_add_error(ira, &instruction->base.base,
2658127545 buf_sprintf("error.%s not handled in switch", buf_ptr(&err_entry->name)));
2658227546 }
2658327547 }
......@@ -26588,44 +27552,44 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
2658827552 } else if (switch_type->id == ZigTypeIdInt) {
2658927553 RangeSet rs = {0};
2659027554 for (size_t range_i = 0; range_i < instruction->range_count; range_i += 1) {
26591 IrInstructionCheckSwitchProngsRange *range = &instruction->ranges[range_i];
27555 IrInstSrcCheckSwitchProngsRange *range = &instruction->ranges[range_i];
2659227556
26593 IrInstruction *start_value = range->start->child;
27557 IrInstGen *start_value = range->start->child;
2659427558 if (type_is_invalid(start_value->value->type))
26595 return ira->codegen->invalid_instruction;
26596 IrInstruction *casted_start_value = ir_implicit_cast(ira, start_value, switch_type);
27559 return ira->codegen->invalid_inst_gen;
27560 IrInstGen *casted_start_value = ir_implicit_cast(ira, start_value, switch_type);
2659727561 if (type_is_invalid(casted_start_value->value->type))
26598 return ira->codegen->invalid_instruction;
27562 return ira->codegen->invalid_inst_gen;
2659927563
26600 IrInstruction *end_value = range->end->child;
27564 IrInstGen *end_value = range->end->child;
2660127565 if (type_is_invalid(end_value->value->type))
26602 return ira->codegen->invalid_instruction;
26603 IrInstruction *casted_end_value = ir_implicit_cast(ira, end_value, switch_type);
27566 return ira->codegen->invalid_inst_gen;
27567 IrInstGen *casted_end_value = ir_implicit_cast(ira, end_value, switch_type);
2660427568 if (type_is_invalid(casted_end_value->value->type))
26605 return ira->codegen->invalid_instruction;
27569 return ira->codegen->invalid_inst_gen;
2660627570
2660727571 ZigValue *start_val = ir_resolve_const(ira, casted_start_value, UndefBad);
2660827572 if (!start_val)
26609 return ira->codegen->invalid_instruction;
27573 return ira->codegen->invalid_inst_gen;
2661027574
2661127575 ZigValue *end_val = ir_resolve_const(ira, casted_end_value, UndefBad);
2661227576 if (!end_val)
26613 return ira->codegen->invalid_instruction;
27577 return ira->codegen->invalid_inst_gen;
2661427578
2661527579 assert(start_val->type->id == ZigTypeIdInt || start_val->type->id == ZigTypeIdComptimeInt);
2661627580 assert(end_val->type->id == ZigTypeIdInt || end_val->type->id == ZigTypeIdComptimeInt);
2661727581
2661827582 if (bigint_cmp(&start_val->data.x_bigint, &end_val->data.x_bigint) == CmpGT) {
26619 ir_add_error(ira, start_value,
27583 ir_add_error(ira, &start_value->base,
2662027584 buf_sprintf("range start value is greater than the end value"));
2662127585 }
2662227586
2662327587 AstNode *prev_node = rangeset_add_range(&rs, &start_val->data.x_bigint, &end_val->data.x_bigint,
26624 start_value->source_node);
27588 start_value->base.source_node);
2662527589 if (prev_node != nullptr) {
26626 ErrorMsg *msg = ir_add_error(ira, start_value, buf_sprintf("duplicate switch value"));
27590 ErrorMsg *msg = ir_add_error(ira, &start_value->base, buf_sprintf("duplicate switch value"));
2662727591 add_error_note(ira->codegen, msg, prev_node, buf_sprintf("previous value is here"));
26628 return ira->codegen->invalid_instruction;
27592 return ira->codegen->invalid_inst_gen;
2662927593 }
2663027594 }
2663127595 if (!instruction->have_else_prong) {
......@@ -26634,25 +27598,25 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
2663427598 BigInt max_val;
2663527599 eval_min_max_value_int(ira->codegen, switch_type, &max_val, true);
2663627600 if (!rangeset_spans(&rs, &min_val, &max_val)) {
26637 ir_add_error(ira, &instruction->base, buf_sprintf("switch must handle all possibilities"));
26638 return ira->codegen->invalid_instruction;
27601 ir_add_error(ira, &instruction->base.base, buf_sprintf("switch must handle all possibilities"));
27602 return ira->codegen->invalid_inst_gen;
2663927603 }
2664027604 }
2664127605 } else if (switch_type->id == ZigTypeIdBool) {
2664227606 int seenTrue = 0;
2664327607 int seenFalse = 0;
2664427608 for (size_t range_i = 0; range_i < instruction->range_count; range_i += 1) {
26645 IrInstructionCheckSwitchProngsRange *range = &instruction->ranges[range_i];
27609 IrInstSrcCheckSwitchProngsRange *range = &instruction->ranges[range_i];
2664627610
26647 IrInstruction *value = range->start->child;
27611 IrInstGen *value = range->start->child;
2664827612
26649 IrInstruction *casted_value = ir_implicit_cast(ira, value, switch_type);
27613 IrInstGen *casted_value = ir_implicit_cast(ira, value, switch_type);
2665027614 if (type_is_invalid(casted_value->value->type))
26651 return ira->codegen->invalid_instruction;
27615 return ira->codegen->invalid_inst_gen;
2665227616
2665327617 ZigValue *const_expr_val = ir_resolve_const(ira, casted_value, UndefBad);
2665427618 if (!const_expr_val)
26655 return ira->codegen->invalid_instruction;
27619 return ira->codegen->invalid_inst_gen;
2665627620
2665727621 assert(const_expr_val->type->id == ZigTypeIdBool);
2665827622
......@@ -26663,60 +27627,59 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
2666327627 }
2666427628
2666527629 if ((seenTrue > 1) || (seenFalse > 1)) {
26666 ir_add_error(ira, value, buf_sprintf("duplicate switch value"));
26667 return ira->codegen->invalid_instruction;
27630 ir_add_error(ira, &value->base, buf_sprintf("duplicate switch value"));
27631 return ira->codegen->invalid_inst_gen;
2666827632 }
2666927633 }
2667027634 if (((seenTrue < 1) || (seenFalse < 1)) && !instruction->have_else_prong) {
26671 ir_add_error(ira, &instruction->base, buf_sprintf("switch must handle all possibilities"));
26672 return ira->codegen->invalid_instruction;
27635 ir_add_error(ira, &instruction->base.base, buf_sprintf("switch must handle all possibilities"));
27636 return ira->codegen->invalid_inst_gen;
2667327637 }
2667427638 } else if (!instruction->have_else_prong) {
26675 ir_add_error(ira, &instruction->base,
27639 ir_add_error(ira, &instruction->base.base,
2667627640 buf_sprintf("else prong required when switching on type '%s'", buf_ptr(&switch_type->name)));
26677 return ira->codegen->invalid_instruction;
27641 return ira->codegen->invalid_inst_gen;
2667827642 }
26679 return ir_const_void(ira, &instruction->base);
27643 return ir_const_void(ira, &instruction->base.base);
2668027644}
2668127645
26682static IrInstruction *ir_analyze_instruction_check_statement_is_void(IrAnalyze *ira,
26683 IrInstructionCheckStatementIsVoid *instruction)
27646static IrInstGen *ir_analyze_instruction_check_statement_is_void(IrAnalyze *ira,
27647 IrInstSrcCheckStatementIsVoid *instruction)
2668427648{
26685 IrInstruction *statement_value = instruction->statement_value->child;
27649 IrInstGen *statement_value = instruction->statement_value->child;
2668627650 ZigType *statement_type = statement_value->value->type;
2668727651 if (type_is_invalid(statement_type))
26688 return ira->codegen->invalid_instruction;
27652 return ira->codegen->invalid_inst_gen;
2668927653
2669027654 if (statement_type->id != ZigTypeIdVoid && statement_type->id != ZigTypeIdUnreachable) {
26691 ir_add_error(ira, &instruction->base, buf_sprintf("expression value is ignored"));
27655 ir_add_error(ira, &instruction->base.base, buf_sprintf("expression value is ignored"));
2669227656 }
2669327657
26694 return ir_const_void(ira, &instruction->base);
27658 return ir_const_void(ira, &instruction->base.base);
2669527659}
2669627660
26697static IrInstruction *ir_analyze_instruction_panic(IrAnalyze *ira, IrInstructionPanic *instruction) {
26698 IrInstruction *msg = instruction->msg->child;
27661static IrInstGen *ir_analyze_instruction_panic(IrAnalyze *ira, IrInstSrcPanic *instruction) {
27662 IrInstGen *msg = instruction->msg->child;
2669927663 if (type_is_invalid(msg->value->type))
2670027664 return ir_unreach_error(ira);
2670127665
26702 if (ir_should_inline(ira->new_irb.exec, instruction->base.scope)) {
26703 ir_add_error(ira, &instruction->base, buf_sprintf("encountered @panic at compile-time"));
27666 if (ir_should_inline(ira->old_irb.exec, instruction->base.base.scope)) {
27667 ir_add_error(ira, &instruction->base.base, buf_sprintf("encountered @panic at compile-time"));
2670427668 return ir_unreach_error(ira);
2670527669 }
2670627670
2670727671 ZigType *u8_ptr_type = get_pointer_to_type_extra(ira->codegen, ira->codegen->builtin_types.entry_u8,
2670827672 true, false, PtrLenUnknown, 0, 0, 0, false);
2670927673 ZigType *str_type = get_slice_type(ira->codegen, u8_ptr_type);
26710 IrInstruction *casted_msg = ir_implicit_cast(ira, msg, str_type);
27674 IrInstGen *casted_msg = ir_implicit_cast(ira, msg, str_type);
2671127675 if (type_is_invalid(casted_msg->value->type))
2671227676 return ir_unreach_error(ira);
2671327677
26714 IrInstruction *new_instruction = ir_build_panic(&ira->new_irb, instruction->base.scope,
26715 instruction->base.source_node, casted_msg);
27678 IrInstGen *new_instruction = ir_build_panic_gen(ira, &instruction->base.base, casted_msg);
2671627679 return ir_finish_anal(ira, new_instruction);
2671727680}
2671827681
26719static IrInstruction *ir_align_cast(IrAnalyze *ira, IrInstruction *target, uint32_t align_bytes, bool safety_check_on) {
27682static IrInstGen *ir_align_cast(IrAnalyze *ira, IrInstGen *target, uint32_t align_bytes, bool safety_check_on) {
2672027683 Error err;
2672127684
2672227685 ZigType *target_type = target->value->type;
......@@ -26728,7 +27691,7 @@ static IrInstruction *ir_align_cast(IrAnalyze *ira, IrInstruction *target, uint3
2672827691 if (target_type->id == ZigTypeIdPointer) {
2672927692 result_type = adjust_ptr_align(ira->codegen, target_type, align_bytes);
2673027693 if ((err = resolve_ptr_align(ira, target_type, &old_align_bytes)))
26731 return ira->codegen->invalid_instruction;
27694 return ira->codegen->invalid_inst_gen;
2673227695 } else if (target_type->id == ZigTypeIdFn) {
2673327696 FnTypeId fn_type_id = target_type->data.fn.fn_type_id;
2673427697 old_align_bytes = fn_type_id.alignment;
......@@ -26739,7 +27702,7 @@ static IrInstruction *ir_align_cast(IrAnalyze *ira, IrInstruction *target, uint3
2673927702 {
2674027703 ZigType *ptr_type = target_type->data.maybe.child_type;
2674127704 if ((err = resolve_ptr_align(ira, ptr_type, &old_align_bytes)))
26742 return ira->codegen->invalid_instruction;
27705 return ira->codegen->invalid_inst_gen;
2674327706 ZigType *better_ptr_type = adjust_ptr_align(ira->codegen, ptr_type, align_bytes);
2674427707
2674527708 result_type = get_optional_type(ira->codegen, better_ptr_type);
......@@ -26754,47 +27717,44 @@ static IrInstruction *ir_align_cast(IrAnalyze *ira, IrInstruction *target, uint3
2675427717 } else if (is_slice(target_type)) {
2675527718 ZigType *slice_ptr_type = target_type->data.structure.fields[slice_ptr_index]->type_entry;
2675627719 if ((err = resolve_ptr_align(ira, slice_ptr_type, &old_align_bytes)))
26757 return ira->codegen->invalid_instruction;
27720 return ira->codegen->invalid_inst_gen;
2675827721 ZigType *result_ptr_type = adjust_ptr_align(ira->codegen, slice_ptr_type, align_bytes);
2675927722 result_type = get_slice_type(ira->codegen, result_ptr_type);
2676027723 } else {
26761 ir_add_error(ira, target,
27724 ir_add_error(ira, &target->base,
2676227725 buf_sprintf("expected pointer or slice, found '%s'", buf_ptr(&target_type->name)));
26763 return ira->codegen->invalid_instruction;
27726 return ira->codegen->invalid_inst_gen;
2676427727 }
2676527728
2676627729 if (instr_is_comptime(target)) {
2676727730 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
2676827731 if (!val)
26769 return ira->codegen->invalid_instruction;
27732 return ira->codegen->invalid_inst_gen;
2677027733
2677127734 if (val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr &&
2677227735 val->data.x_ptr.data.hard_coded_addr.addr % align_bytes != 0)
2677327736 {
26774 ir_add_error(ira, target,
27737 ir_add_error(ira, &target->base,
2677527738 buf_sprintf("pointer address 0x%" ZIG_PRI_x64 " is not aligned to %" PRIu32 " bytes",
2677627739 val->data.x_ptr.data.hard_coded_addr.addr, align_bytes));
26777 return ira->codegen->invalid_instruction;
27740 return ira->codegen->invalid_inst_gen;
2677827741 }
2677927742
26780 IrInstruction *result = ir_const(ira, target, result_type);
27743 IrInstGen *result = ir_const(ira, &target->base, result_type);
2678127744 copy_const_val(result->value, val);
2678227745 result->value->type = result_type;
2678327746 return result;
2678427747 }
2678527748
26786 IrInstruction *result;
2678727749 if (safety_check_on && align_bytes > old_align_bytes && align_bytes != 1) {
26788 result = ir_build_align_cast(&ira->new_irb, target->scope, target->source_node, nullptr, target);
27750 return ir_build_align_cast_gen(ira, target->base.scope, target->base.source_node, target, result_type);
2678927751 } else {
26790 result = ir_build_cast(&ira->new_irb, target->scope, target->source_node, result_type, target, CastOpNoop);
27752 return ir_build_cast(ira, &target->base, result_type, target, CastOpNoop);
2679127753 }
26792 result->value->type = result_type;
26793 return result;
2679427754}
2679527755
26796static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *ptr,
26797 ZigType *dest_type, IrInstruction *dest_type_src, bool safety_check_on)
27756static IrInstGen *ir_analyze_ptr_cast(IrAnalyze *ira, IrInst* source_instr, IrInstGen *ptr,
27757 IrInst *ptr_src, ZigType *dest_type, IrInst *dest_type_src, bool safety_check_on)
2679827758{
2679927759 Error err;
2680027760
......@@ -26810,52 +27770,52 @@ static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_
2681027770
2681127771 ZigType *src_ptr_type = get_src_ptr_type(src_type);
2681227772 if (src_ptr_type == nullptr) {
26813 ir_add_error(ira, ptr, buf_sprintf("expected pointer, found '%s'", buf_ptr(&src_type->name)));
26814 return ira->codegen->invalid_instruction;
27773 ir_add_error(ira, ptr_src, buf_sprintf("expected pointer, found '%s'", buf_ptr(&src_type->name)));
27774 return ira->codegen->invalid_inst_gen;
2681527775 }
2681627776
2681727777 ZigType *dest_ptr_type = get_src_ptr_type(dest_type);
2681827778 if (dest_ptr_type == nullptr) {
2681927779 ir_add_error(ira, dest_type_src,
2682027780 buf_sprintf("expected pointer, found '%s'", buf_ptr(&dest_type->name)));
26821 return ira->codegen->invalid_instruction;
27781 return ira->codegen->invalid_inst_gen;
2682227782 }
2682327783
2682427784 if (get_ptr_const(src_type) && !get_ptr_const(dest_type)) {
2682527785 ir_add_error(ira, source_instr, buf_sprintf("cast discards const qualifier"));
26826 return ira->codegen->invalid_instruction;
27786 return ira->codegen->invalid_inst_gen;
2682727787 }
2682827788 uint32_t src_align_bytes;
2682927789 if ((err = resolve_ptr_align(ira, src_type, &src_align_bytes)))
26830 return ira->codegen->invalid_instruction;
27790 return ira->codegen->invalid_inst_gen;
2683127791
2683227792 uint32_t dest_align_bytes;
2683327793 if ((err = resolve_ptr_align(ira, dest_type, &dest_align_bytes)))
26834 return ira->codegen->invalid_instruction;
27794 return ira->codegen->invalid_inst_gen;
2683527795
2683627796 if ((err = type_resolve(ira->codegen, dest_type, ResolveStatusZeroBitsKnown)))
26837 return ira->codegen->invalid_instruction;
27797 return ira->codegen->invalid_inst_gen;
2683827798
2683927799 if ((err = type_resolve(ira->codegen, src_type, ResolveStatusZeroBitsKnown)))
26840 return ira->codegen->invalid_instruction;
27800 return ira->codegen->invalid_inst_gen;
2684127801
26842 if (type_has_bits(dest_type) && !type_has_bits(src_type)) {
27802 if (type_has_bits(dest_type) && !type_has_bits(src_type) && safety_check_on) {
2684327803 ErrorMsg *msg = ir_add_error(ira, source_instr,
2684427804 buf_sprintf("'%s' and '%s' do not have the same in-memory representation",
2684527805 buf_ptr(&src_type->name), buf_ptr(&dest_type->name)));
26846 add_error_note(ira->codegen, msg, ptr->source_node,
27806 add_error_note(ira->codegen, msg, ptr_src->source_node,
2684727807 buf_sprintf("'%s' has no in-memory bits", buf_ptr(&src_type->name)));
2684827808 add_error_note(ira->codegen, msg, dest_type_src->source_node,
2684927809 buf_sprintf("'%s' has in-memory bits", buf_ptr(&dest_type->name)));
26850 return ira->codegen->invalid_instruction;
27810 return ira->codegen->invalid_inst_gen;
2685127811 }
2685227812
2685327813 if (instr_is_comptime(ptr)) {
2685427814 bool dest_allows_addr_zero = ptr_allows_addr_zero(dest_type);
2685527815 UndefAllowed is_undef_allowed = dest_allows_addr_zero ? UndefOk : UndefBad;
2685627816 ZigValue *val = ir_resolve_const(ira, ptr, is_undef_allowed);
26857 if (!val)
26858 return ira->codegen->invalid_instruction;
27817 if (val == nullptr)
27818 return ira->codegen->invalid_inst_gen;
2685927819
2686027820 if (value_is_comptime(val) && val->special != ConstValSpecialUndef) {
2686127821 bool is_addr_zero = val->data.x_ptr.special == ConstPtrSpecialNull ||
......@@ -26864,20 +27824,36 @@ static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_
2686427824 if (is_addr_zero && !dest_allows_addr_zero) {
2686527825 ir_add_error(ira, source_instr,
2686627826 buf_sprintf("null pointer casted to type '%s'", buf_ptr(&dest_type->name)));
26867 return ira->codegen->invalid_instruction;
27827 return ira->codegen->invalid_inst_gen;
2686827828 }
2686927829 }
2687027830
26871 IrInstruction *result;
26872 if (ptr->value->data.x_ptr.mut == ConstPtrMutInfer) {
27831 IrInstGen *result;
27832 if (val->data.x_ptr.mut == ConstPtrMutInfer) {
2687327833 result = ir_build_ptr_cast_gen(ira, source_instr, dest_type, ptr, safety_check_on);
26874
26875 if ((err = type_resolve(ira->codegen, dest_type, ResolveStatusZeroBitsKnown)))
26876 return ira->codegen->invalid_instruction;
2687727834 } else {
2687827835 result = ir_const(ira, source_instr, dest_type);
2687927836 }
26880 copy_const_val(result->value, val);
27837 InferredStructField *isf = (val->type->id == ZigTypeIdPointer) ?
27838 val->type->data.pointer.inferred_struct_field : nullptr;
27839 if (isf == nullptr) {
27840 copy_const_val(result->value, val);
27841 } else {
27842 // The destination value should have x_ptr struct pointing to underlying struct value
27843 result->value->data.x_ptr.mut = val->data.x_ptr.mut;
27844 TypeStructField *field = find_struct_type_field(isf->inferred_struct_type, isf->field_name);
27845 assert(field != nullptr);
27846 if (field->is_comptime) {
27847 result->value->data.x_ptr.special = ConstPtrSpecialRef;
27848 result->value->data.x_ptr.data.ref.pointee = field->init_val;
27849 } else {
27850 assert(val->data.x_ptr.special == ConstPtrSpecialRef);
27851 result->value->data.x_ptr.special = ConstPtrSpecialBaseStruct;
27852 result->value->data.x_ptr.data.base_struct.struct_val = val->data.x_ptr.data.ref.pointee;
27853 result->value->data.x_ptr.data.base_struct.field_index = field->src_index;
27854 }
27855 result->value->special = ConstValSpecialStatic;
27856 }
2688127857 result->value->type = dest_type;
2688227858
2688327859 // Keep the bigger alignment, it can only help-
......@@ -26891,41 +27867,41 @@ static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_
2689127867
2689227868 if (dest_align_bytes > src_align_bytes) {
2689327869 ErrorMsg *msg = ir_add_error(ira, source_instr, buf_sprintf("cast increases pointer alignment"));
26894 add_error_note(ira->codegen, msg, ptr->source_node,
27870 add_error_note(ira->codegen, msg, ptr_src->source_node,
2689527871 buf_sprintf("'%s' has alignment %" PRIu32, buf_ptr(&src_type->name), src_align_bytes));
2689627872 add_error_note(ira->codegen, msg, dest_type_src->source_node,
2689727873 buf_sprintf("'%s' has alignment %" PRIu32, buf_ptr(&dest_type->name), dest_align_bytes));
26898 return ira->codegen->invalid_instruction;
27874 return ira->codegen->invalid_inst_gen;
2689927875 }
2690027876
26901 IrInstruction *casted_ptr = ir_build_ptr_cast_gen(ira, source_instr, dest_type, ptr, safety_check_on);
27877 IrInstGen *casted_ptr = ir_build_ptr_cast_gen(ira, source_instr, dest_type, ptr, safety_check_on);
2690227878
2690327879 // Keep the bigger alignment, it can only help-
2690427880 // unless the target is zero bits.
26905 IrInstruction *result;
27881 IrInstGen *result;
2690627882 if (src_align_bytes > dest_align_bytes && type_has_bits(dest_type)) {
2690727883 result = ir_align_cast(ira, casted_ptr, src_align_bytes, false);
2690827884 if (type_is_invalid(result->value->type))
26909 return ira->codegen->invalid_instruction;
27885 return ira->codegen->invalid_inst_gen;
2691027886 } else {
2691127887 result = casted_ptr;
2691227888 }
2691327889 return result;
2691427890}
2691527891
26916static IrInstruction *ir_analyze_instruction_ptr_cast(IrAnalyze *ira, IrInstructionPtrCastSrc *instruction) {
26917 IrInstruction *dest_type_value = instruction->dest_type->child;
27892static IrInstGen *ir_analyze_instruction_ptr_cast(IrAnalyze *ira, IrInstSrcPtrCast *instruction) {
27893 IrInstGen *dest_type_value = instruction->dest_type->child;
2691827894 ZigType *dest_type = ir_resolve_type(ira, dest_type_value);
2691927895 if (type_is_invalid(dest_type))
26920 return ira->codegen->invalid_instruction;
27896 return ira->codegen->invalid_inst_gen;
2692127897
26922 IrInstruction *ptr = instruction->ptr->child;
27898 IrInstGen *ptr = instruction->ptr->child;
2692327899 ZigType *src_type = ptr->value->type;
2692427900 if (type_is_invalid(src_type))
26925 return ira->codegen->invalid_instruction;
27901 return ira->codegen->invalid_inst_gen;
2692627902
26927 return ir_analyze_ptr_cast(ira, &instruction->base, ptr, dest_type, dest_type_value,
26928 instruction->safety_check_on);
27903 return ir_analyze_ptr_cast(ira, &instruction->base.base, ptr, &instruction->ptr->base,
27904 dest_type, &dest_type_value->base, instruction->safety_check_on);
2692927905}
2693027906
2693127907static void buf_write_value_bytes_array(CodeGen *codegen, uint8_t *buf, ZigValue *val, size_t len) {
......@@ -27255,7 +28231,7 @@ static Error buf_read_value_bytes(IrAnalyze *ira, CodeGen *codegen, AstNode *sou
2725528231 zig_unreachable();
2725628232}
2725728233
27258static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,
28234static IrInstGen *ir_analyze_bit_cast(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value,
2725928235 ZigType *dest_type)
2726028236{
2726128237 Error err;
......@@ -27271,14 +28247,14 @@ static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_
2727128247 buf_sprintf("cannot cast a value of type '%s'", buf_ptr(&dest_type->name)));
2727228248 add_error_note(ira->codegen, msg, source_instr->source_node,
2727328249 buf_sprintf("use @intToEnum for type coercion"));
27274 return ira->codegen->invalid_instruction;
28250 return ira->codegen->invalid_inst_gen;
2727528251 }
2727628252
2727728253 if ((err = type_resolve(ira->codegen, dest_type, ResolveStatusSizeKnown)))
27278 return ira->codegen->invalid_instruction;
28254 return ira->codegen->invalid_inst_gen;
2727928255
2728028256 if ((err = type_resolve(ira->codegen, src_type, ResolveStatusSizeKnown)))
27281 return ira->codegen->invalid_instruction;
28257 return ira->codegen->invalid_inst_gen;
2728228258
2728328259 uint64_t dest_size_bytes = type_size(ira->codegen, dest_type);
2728428260 uint64_t src_size_bytes = type_size(ira->codegen, src_type);
......@@ -27287,7 +28263,7 @@ static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_
2728728263 buf_sprintf("destination type '%s' has size %" ZIG_PRI_u64 " but source type '%s' has size %" ZIG_PRI_u64,
2728828264 buf_ptr(&dest_type->name), dest_size_bytes,
2728928265 buf_ptr(&src_type->name), src_size_bytes));
27290 return ira->codegen->invalid_instruction;
28266 return ira->codegen->invalid_inst_gen;
2729128267 }
2729228268
2729328269 uint64_t dest_size_bits = type_size_bits(ira->codegen, dest_type);
......@@ -27297,26 +28273,26 @@ static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_
2729728273 buf_sprintf("destination type '%s' has %" ZIG_PRI_u64 " bits but source type '%s' has %" ZIG_PRI_u64 " bits",
2729828274 buf_ptr(&dest_type->name), dest_size_bits,
2729928275 buf_ptr(&src_type->name), src_size_bits));
27300 return ira->codegen->invalid_instruction;
28276 return ira->codegen->invalid_inst_gen;
2730128277 }
2730228278
2730328279 if (instr_is_comptime(value)) {
2730428280 ZigValue *val = ir_resolve_const(ira, value, UndefBad);
2730528281 if (!val)
27306 return ira->codegen->invalid_instruction;
28282 return ira->codegen->invalid_inst_gen;
2730728283
27308 IrInstruction *result = ir_const(ira, source_instr, dest_type);
28284 IrInstGen *result = ir_const(ira, source_instr, dest_type);
2730928285 uint8_t *buf = allocate_nonzero<uint8_t>(src_size_bytes);
2731028286 buf_write_value_bytes(ira->codegen, buf, val);
2731128287 if ((err = buf_read_value_bytes(ira, ira->codegen, source_instr->source_node, buf, result->value)))
27312 return ira->codegen->invalid_instruction;
28288 return ira->codegen->invalid_inst_gen;
2731328289 return result;
2731428290 }
2731528291
2731628292 return ir_build_bit_cast_gen(ira, source_instr, value, dest_type);
2731728293}
2731828294
27319static IrInstruction *ir_analyze_int_to_ptr(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target,
28295static IrInstGen *ir_analyze_int_to_ptr(IrAnalyze *ira, IrInst* source_instr, IrInstGen *target,
2732028296 ZigType *ptr_type)
2732128297{
2732228298 Error err;
......@@ -27324,136 +28300,128 @@ static IrInstruction *ir_analyze_int_to_ptr(IrAnalyze *ira, IrInstruction *sourc
2732428300 ir_assert(get_src_ptr_type(ptr_type) != nullptr, source_instr);
2732528301 ir_assert(type_has_bits(ptr_type), source_instr);
2732628302
27327 IrInstruction *casted_int = ir_implicit_cast(ira, target, ira->codegen->builtin_types.entry_usize);
28303 IrInstGen *casted_int = ir_implicit_cast(ira, target, ira->codegen->builtin_types.entry_usize);
2732828304 if (type_is_invalid(casted_int->value->type))
27329 return ira->codegen->invalid_instruction;
28305 return ira->codegen->invalid_inst_gen;
2733028306
2733128307 if (instr_is_comptime(casted_int)) {
2733228308 ZigValue *val = ir_resolve_const(ira, casted_int, UndefBad);
2733328309 if (!val)
27334 return ira->codegen->invalid_instruction;
28310 return ira->codegen->invalid_inst_gen;
2733528311
2733628312 uint64_t addr = bigint_as_u64(&val->data.x_bigint);
2733728313 if (!ptr_allows_addr_zero(ptr_type) && addr == 0) {
2733828314 ir_add_error(ira, source_instr,
2733928315 buf_sprintf("pointer type '%s' does not allow address zero", buf_ptr(&ptr_type->name)));
27340 return ira->codegen->invalid_instruction;
28316 return ira->codegen->invalid_inst_gen;
2734128317 }
2734228318
2734328319 uint32_t align_bytes;
2734428320 if ((err = resolve_ptr_align(ira, ptr_type, &align_bytes)))
27345 return ira->codegen->invalid_instruction;
28321 return ira->codegen->invalid_inst_gen;
2734628322
2734728323 if (addr != 0 && addr % align_bytes != 0) {
2734828324 ir_add_error(ira, source_instr,
2734928325 buf_sprintf("pointer type '%s' requires aligned address",
2735028326 buf_ptr(&ptr_type->name)));
27351 return ira->codegen->invalid_instruction;
28327 return ira->codegen->invalid_inst_gen;
2735228328 }
2735328329
27354 IrInstruction *result = ir_const(ira, source_instr, ptr_type);
28330 IrInstGen *result = ir_const(ira, source_instr, ptr_type);
2735528331 result->value->data.x_ptr.special = ConstPtrSpecialHardCodedAddr;
2735628332 result->value->data.x_ptr.mut = ConstPtrMutRuntimeVar;
2735728333 result->value->data.x_ptr.data.hard_coded_addr.addr = addr;
2735828334 return result;
2735928335 }
2736028336
27361 IrInstruction *result = ir_build_int_to_ptr(&ira->new_irb, source_instr->scope,
27362 source_instr->source_node, nullptr, casted_int);
27363 result->value->type = ptr_type;
27364 return result;
28337 return ir_build_int_to_ptr_gen(ira, source_instr->scope, source_instr->source_node, casted_int, ptr_type);
2736528338}
2736628339
27367static IrInstruction *ir_analyze_instruction_int_to_ptr(IrAnalyze *ira, IrInstructionIntToPtr *instruction) {
28340static IrInstGen *ir_analyze_instruction_int_to_ptr(IrAnalyze *ira, IrInstSrcIntToPtr *instruction) {
2736828341 Error err;
27369 IrInstruction *dest_type_value = instruction->dest_type->child;
28342 IrInstGen *dest_type_value = instruction->dest_type->child;
2737028343 ZigType *dest_type = ir_resolve_type(ira, dest_type_value);
2737128344 if (type_is_invalid(dest_type))
27372 return ira->codegen->invalid_instruction;
28345 return ira->codegen->invalid_inst_gen;
2737328346
2737428347 // We explicitly check for the size, so we can use get_src_ptr_type
2737528348 if (get_src_ptr_type(dest_type) == nullptr) {
27376 ir_add_error(ira, dest_type_value, buf_sprintf("expected pointer, found '%s'", buf_ptr(&dest_type->name)));
27377 return ira->codegen->invalid_instruction;
28349 ir_add_error(ira, &dest_type_value->base, buf_sprintf("expected pointer, found '%s'", buf_ptr(&dest_type->name)));
28350 return ira->codegen->invalid_inst_gen;
2737828351 }
2737928352
2738028353 bool has_bits;
2738128354 if ((err = type_has_bits2(ira->codegen, dest_type, &has_bits)))
27382 return ira->codegen->invalid_instruction;
28355 return ira->codegen->invalid_inst_gen;
2738328356
2738428357 if (!has_bits) {
27385 ir_add_error(ira, dest_type_value,
28358 ir_add_error(ira, &dest_type_value->base,
2738628359 buf_sprintf("type '%s' has 0 bits and cannot store information", buf_ptr(&dest_type->name)));
27387 return ira->codegen->invalid_instruction;
28360 return ira->codegen->invalid_inst_gen;
2738828361 }
2738928362
27390 IrInstruction *target = instruction->target->child;
28363 IrInstGen *target = instruction->target->child;
2739128364 if (type_is_invalid(target->value->type))
27392 return ira->codegen->invalid_instruction;
28365 return ira->codegen->invalid_inst_gen;
2739328366
27394 return ir_analyze_int_to_ptr(ira, &instruction->base, target, dest_type);
28367 return ir_analyze_int_to_ptr(ira, &instruction->base.base, target, dest_type);
2739528368}
2739628369
27397static IrInstruction *ir_analyze_instruction_decl_ref(IrAnalyze *ira,
27398 IrInstructionDeclRef *instruction)
27399{
27400 IrInstruction *ref_instruction = ir_analyze_decl_ref(ira, &instruction->base, instruction->tld);
28370static IrInstGen *ir_analyze_instruction_decl_ref(IrAnalyze *ira, IrInstSrcDeclRef *instruction) {
28371 IrInstGen *ref_instruction = ir_analyze_decl_ref(ira, &instruction->base.base, instruction->tld);
2740128372 if (type_is_invalid(ref_instruction->value->type)) {
27402 return ira->codegen->invalid_instruction;
28373 return ira->codegen->invalid_inst_gen;
2740328374 }
2740428375
2740528376 if (instruction->lval == LValPtr) {
2740628377 return ref_instruction;
2740728378 } else {
27408 return ir_get_deref(ira, &instruction->base, ref_instruction, nullptr);
28379 return ir_get_deref(ira, &instruction->base.base, ref_instruction, nullptr);
2740928380 }
2741028381}
2741128382
27412static IrInstruction *ir_analyze_instruction_ptr_to_int(IrAnalyze *ira, IrInstructionPtrToInt *instruction) {
28383static IrInstGen *ir_analyze_instruction_ptr_to_int(IrAnalyze *ira, IrInstSrcPtrToInt *instruction) {
2741328384 Error err;
27414 IrInstruction *target = instruction->target->child;
28385 IrInstGen *target = instruction->target->child;
2741528386 if (type_is_invalid(target->value->type))
27416 return ira->codegen->invalid_instruction;
28387 return ira->codegen->invalid_inst_gen;
2741728388
2741828389 ZigType *usize = ira->codegen->builtin_types.entry_usize;
2741928390
2742028391 // We check size explicitly so we can use get_src_ptr_type here.
2742128392 if (get_src_ptr_type(target->value->type) == nullptr) {
27422 ir_add_error(ira, target,
28393 ir_add_error(ira, &target->base,
2742328394 buf_sprintf("expected pointer, found '%s'", buf_ptr(&target->value->type->name)));
27424 return ira->codegen->invalid_instruction;
28395 return ira->codegen->invalid_inst_gen;
2742528396 }
2742628397
2742728398 bool has_bits;
2742828399 if ((err = type_has_bits2(ira->codegen, target->value->type, &has_bits)))
27429 return ira->codegen->invalid_instruction;
28400 return ira->codegen->invalid_inst_gen;
2743028401
2743128402 if (!has_bits) {
27432 ir_add_error(ira, target,
28403 ir_add_error(ira, &target->base,
2743328404 buf_sprintf("pointer to size 0 type has no address"));
27434 return ira->codegen->invalid_instruction;
28405 return ira->codegen->invalid_inst_gen;
2743528406 }
2743628407
2743728408 if (instr_is_comptime(target)) {
2743828409 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
2743928410 if (!val)
27440 return ira->codegen->invalid_instruction;
28411 return ira->codegen->invalid_inst_gen;
2744128412 if (val->type->id == ZigTypeIdPointer && val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr) {
27442 IrInstruction *result = ir_const(ira, &instruction->base, usize);
28413 IrInstGen *result = ir_const(ira, &instruction->base.base, usize);
2744328414 bigint_init_unsigned(&result->value->data.x_bigint, val->data.x_ptr.data.hard_coded_addr.addr);
2744428415 result->value->type = usize;
2744528416 return result;
2744628417 }
2744728418 }
2744828419
27449 IrInstruction *result = ir_build_ptr_to_int(&ira->new_irb, instruction->base.scope,
27450 instruction->base.source_node, target);
27451 result->value->type = usize;
27452 return result;
28420 return ir_build_ptr_to_int_gen(ira, &instruction->base.base, target);
2745328421}
2745428422
27455static IrInstruction *ir_analyze_instruction_ptr_type(IrAnalyze *ira, IrInstructionPtrType *instruction) {
27456 IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_type);
28423static IrInstGen *ir_analyze_instruction_ptr_type(IrAnalyze *ira, IrInstSrcPtrType *instruction) {
28424 IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_type);
2745728425 result->value->special = ConstValSpecialLazy;
2745828426
2745928427 LazyValuePtrType *lazy_ptr_type = allocate<LazyValuePtrType>(1, "LazyValuePtrType");
......@@ -27464,17 +28432,17 @@ static IrInstruction *ir_analyze_instruction_ptr_type(IrAnalyze *ira, IrInstruct
2746428432 if (instruction->sentinel != nullptr) {
2746528433 lazy_ptr_type->sentinel = instruction->sentinel->child;
2746628434 if (ir_resolve_const(ira, lazy_ptr_type->sentinel, LazyOk) == nullptr)
27467 return ira->codegen->invalid_instruction;
28435 return ira->codegen->invalid_inst_gen;
2746828436 }
2746928437
2747028438 lazy_ptr_type->elem_type = instruction->child_type->child;
2747128439 if (ir_resolve_type_lazy(ira, lazy_ptr_type->elem_type) == nullptr)
27472 return ira->codegen->invalid_instruction;
28440 return ira->codegen->invalid_inst_gen;
2747328441
2747428442 if (instruction->align_value != nullptr) {
2747528443 lazy_ptr_type->align_inst = instruction->align_value->child;
2747628444 if (ir_resolve_const(ira, lazy_ptr_type->align_inst, LazyOk) == nullptr)
27477 return ira->codegen->invalid_instruction;
28445 return ira->codegen->invalid_inst_gen;
2747828446 }
2747928447
2748028448 lazy_ptr_type->ptr_len = instruction->ptr_len;
......@@ -27487,10 +28455,10 @@ static IrInstruction *ir_analyze_instruction_ptr_type(IrAnalyze *ira, IrInstruct
2748728455 return result;
2748828456}
2748928457
27490static IrInstruction *ir_analyze_instruction_align_cast(IrAnalyze *ira, IrInstructionAlignCast *instruction) {
27491 IrInstruction *target = instruction->target->child;
28458static IrInstGen *ir_analyze_instruction_align_cast(IrAnalyze *ira, IrInstSrcAlignCast *instruction) {
28459 IrInstGen *target = instruction->target->child;
2749228460 if (type_is_invalid(target->value->type))
27493 return ira->codegen->invalid_instruction;
28461 return ira->codegen->invalid_inst_gen;
2749428462
2749528463 ZigType *elem_type = nullptr;
2749628464 if (is_slice(target->value->type)) {
......@@ -27501,192 +28469,192 @@ static IrInstruction *ir_analyze_instruction_align_cast(IrAnalyze *ira, IrInstru
2750128469 }
2750228470
2750328471 uint32_t align_bytes;
27504 IrInstruction *align_bytes_inst = instruction->align_bytes->child;
28472 IrInstGen *align_bytes_inst = instruction->align_bytes->child;
2750528473 if (!ir_resolve_align(ira, align_bytes_inst, elem_type, &align_bytes))
27506 return ira->codegen->invalid_instruction;
28474 return ira->codegen->invalid_inst_gen;
2750728475
27508 IrInstruction *result = ir_align_cast(ira, target, align_bytes, true);
28476 IrInstGen *result = ir_align_cast(ira, target, align_bytes, true);
2750928477 if (type_is_invalid(result->value->type))
27510 return ira->codegen->invalid_instruction;
28478 return ira->codegen->invalid_inst_gen;
2751128479
2751228480 return result;
2751328481}
2751428482
27515static IrInstruction *ir_analyze_instruction_opaque_type(IrAnalyze *ira, IrInstructionOpaqueType *instruction) {
28483static IrInstGen *ir_analyze_instruction_opaque_type(IrAnalyze *ira, IrInstSrcOpaqueType *instruction) {
2751628484 Buf *bare_name = buf_alloc();
27517 Buf *full_name = get_anon_type_name(ira->codegen, ira->new_irb.exec, "opaque",
27518 instruction->base.scope, instruction->base.source_node, bare_name);
27519 ZigType *result_type = get_opaque_type(ira->codegen, instruction->base.scope, instruction->base.source_node,
27520 buf_ptr(full_name), bare_name);
27521 return ir_const_type(ira, &instruction->base, result_type);
28485 Buf *full_name = get_anon_type_name(ira->codegen, ira->old_irb.exec, "opaque",
28486 instruction->base.base.scope, instruction->base.base.source_node, bare_name);
28487 ZigType *result_type = get_opaque_type(ira->codegen, instruction->base.base.scope,
28488 instruction->base.base.source_node, buf_ptr(full_name), bare_name);
28489 return ir_const_type(ira, &instruction->base.base, result_type);
2752228490}
2752328491
27524static IrInstruction *ir_analyze_instruction_set_align_stack(IrAnalyze *ira, IrInstructionSetAlignStack *instruction) {
28492static IrInstGen *ir_analyze_instruction_set_align_stack(IrAnalyze *ira, IrInstSrcSetAlignStack *instruction) {
2752528493 uint32_t align_bytes;
27526 IrInstruction *align_bytes_inst = instruction->align_bytes->child;
28494 IrInstGen *align_bytes_inst = instruction->align_bytes->child;
2752728495 if (!ir_resolve_align(ira, align_bytes_inst, nullptr, &align_bytes))
27528 return ira->codegen->invalid_instruction;
28496 return ira->codegen->invalid_inst_gen;
2752928497
2753028498 if (align_bytes > 256) {
27531 ir_add_error(ira, &instruction->base, buf_sprintf("attempt to @setAlignStack(%" PRIu32 "); maximum is 256", align_bytes));
27532 return ira->codegen->invalid_instruction;
28499 ir_add_error(ira, &instruction->base.base, buf_sprintf("attempt to @setAlignStack(%" PRIu32 "); maximum is 256", align_bytes));
28500 return ira->codegen->invalid_inst_gen;
2753328501 }
2753428502
27535 ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);
28503 ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
2753628504 if (fn_entry == nullptr) {
27537 ir_add_error(ira, &instruction->base, buf_sprintf("@setAlignStack outside function"));
27538 return ira->codegen->invalid_instruction;
28505 ir_add_error(ira, &instruction->base.base, buf_sprintf("@setAlignStack outside function"));
28506 return ira->codegen->invalid_inst_gen;
2753928507 }
2754028508 if (fn_entry->type_entry->data.fn.fn_type_id.cc == CallingConventionNaked) {
27541 ir_add_error(ira, &instruction->base, buf_sprintf("@setAlignStack in naked function"));
27542 return ira->codegen->invalid_instruction;
28509 ir_add_error(ira, &instruction->base.base, buf_sprintf("@setAlignStack in naked function"));
28510 return ira->codegen->invalid_inst_gen;
2754328511 }
2754428512
2754528513 if (fn_entry->fn_inline == FnInlineAlways) {
27546 ir_add_error(ira, &instruction->base, buf_sprintf("@setAlignStack in inline function"));
27547 return ira->codegen->invalid_instruction;
28514 ir_add_error(ira, &instruction->base.base, buf_sprintf("@setAlignStack in inline function"));
28515 return ira->codegen->invalid_inst_gen;
2754828516 }
2754928517
2755028518 if (fn_entry->set_alignstack_node != nullptr) {
27551 ErrorMsg *msg = ir_add_error_node(ira, instruction->base.source_node,
28519 ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
2755228520 buf_sprintf("alignstack set twice"));
2755328521 add_error_note(ira->codegen, msg, fn_entry->set_alignstack_node, buf_sprintf("first set here"));
27554 return ira->codegen->invalid_instruction;
28522 return ira->codegen->invalid_inst_gen;
2755528523 }
2755628524
27557 fn_entry->set_alignstack_node = instruction->base.source_node;
28525 fn_entry->set_alignstack_node = instruction->base.base.source_node;
2755828526 fn_entry->alignstack_value = align_bytes;
2755928527
27560 return ir_const_void(ira, &instruction->base);
28528 return ir_const_void(ira, &instruction->base.base);
2756128529}
2756228530
27563static IrInstruction *ir_analyze_instruction_arg_type(IrAnalyze *ira, IrInstructionArgType *instruction) {
27564 IrInstruction *fn_type_inst = instruction->fn_type->child;
28531static IrInstGen *ir_analyze_instruction_arg_type(IrAnalyze *ira, IrInstSrcArgType *instruction) {
28532 IrInstGen *fn_type_inst = instruction->fn_type->child;
2756528533 ZigType *fn_type = ir_resolve_type(ira, fn_type_inst);
2756628534 if (type_is_invalid(fn_type))
27567 return ira->codegen->invalid_instruction;
28535 return ira->codegen->invalid_inst_gen;
2756828536
27569 IrInstruction *arg_index_inst = instruction->arg_index->child;
28537 IrInstGen *arg_index_inst = instruction->arg_index->child;
2757028538 uint64_t arg_index;
2757128539 if (!ir_resolve_usize(ira, arg_index_inst, &arg_index))
27572 return ira->codegen->invalid_instruction;
28540 return ira->codegen->invalid_inst_gen;
2757328541
2757428542 if (fn_type->id == ZigTypeIdBoundFn) {
2757528543 fn_type = fn_type->data.bound_fn.fn_type;
2757628544 arg_index += 1;
2757728545 }
2757828546 if (fn_type->id != ZigTypeIdFn) {
27579 ir_add_error(ira, fn_type_inst, buf_sprintf("expected function, found '%s'", buf_ptr(&fn_type->name)));
27580 return ira->codegen->invalid_instruction;
28547 ir_add_error(ira, &fn_type_inst->base, buf_sprintf("expected function, found '%s'", buf_ptr(&fn_type->name)));
28548 return ira->codegen->invalid_inst_gen;
2758128549 }
2758228550
2758328551 FnTypeId *fn_type_id = &fn_type->data.fn.fn_type_id;
2758428552 if (arg_index >= fn_type_id->param_count) {
2758528553 if (instruction->allow_var) {
2758628554 // TODO remove this with var args
27587 return ir_const_type(ira, &instruction->base, ira->codegen->builtin_types.entry_var);
28555 return ir_const_type(ira, &instruction->base.base, ira->codegen->builtin_types.entry_var);
2758828556 }
27589 ir_add_error(ira, arg_index_inst,
28557 ir_add_error(ira, &arg_index_inst->base,
2759028558 buf_sprintf("arg index %" ZIG_PRI_u64 " out of bounds; '%s' has %" ZIG_PRI_usize " arguments",
2759128559 arg_index, buf_ptr(&fn_type->name), fn_type_id->param_count));
27592 return ira->codegen->invalid_instruction;
28560 return ira->codegen->invalid_inst_gen;
2759328561 }
2759428562
2759528563 ZigType *result_type = fn_type_id->param_info[arg_index].type;
2759628564 if (result_type == nullptr) {
2759728565 // Args are only unresolved if our function is generic.
27598 ir_assert(fn_type->data.fn.is_generic, &instruction->base);
28566 ir_assert(fn_type->data.fn.is_generic, &instruction->base.base);
2759928567
2760028568 if (instruction->allow_var) {
27601 return ir_const_type(ira, &instruction->base, ira->codegen->builtin_types.entry_var);
28569 return ir_const_type(ira, &instruction->base.base, ira->codegen->builtin_types.entry_var);
2760228570 } else {
27603 ir_add_error(ira, arg_index_inst,
28571 ir_add_error(ira, &arg_index_inst->base,
2760428572 buf_sprintf("@ArgType could not resolve the type of arg %" ZIG_PRI_u64 " because '%s' is generic",
2760528573 arg_index, buf_ptr(&fn_type->name)));
27606 return ira->codegen->invalid_instruction;
28574 return ira->codegen->invalid_inst_gen;
2760728575 }
2760828576 }
27609 return ir_const_type(ira, &instruction->base, result_type);
28577 return ir_const_type(ira, &instruction->base.base, result_type);
2761028578}
2761128579
27612static IrInstruction *ir_analyze_instruction_tag_type(IrAnalyze *ira, IrInstructionTagType *instruction) {
28580static IrInstGen *ir_analyze_instruction_tag_type(IrAnalyze *ira, IrInstSrcTagType *instruction) {
2761328581 Error err;
27614 IrInstruction *target_inst = instruction->target->child;
28582 IrInstGen *target_inst = instruction->target->child;
2761528583 ZigType *enum_type = ir_resolve_type(ira, target_inst);
2761628584 if (type_is_invalid(enum_type))
27617 return ira->codegen->invalid_instruction;
28585 return ira->codegen->invalid_inst_gen;
2761828586
2761928587 if (enum_type->id == ZigTypeIdEnum) {
2762028588 if ((err = type_resolve(ira->codegen, enum_type, ResolveStatusSizeKnown)))
27621 return ira->codegen->invalid_instruction;
28589 return ira->codegen->invalid_inst_gen;
2762228590
27623 return ir_const_type(ira, &instruction->base, enum_type->data.enumeration.tag_int_type);
28591 return ir_const_type(ira, &instruction->base.base, enum_type->data.enumeration.tag_int_type);
2762428592 } else if (enum_type->id == ZigTypeIdUnion) {
27625 ZigType *tag_type = ir_resolve_union_tag_type(ira, instruction->target, enum_type);
28593 ZigType *tag_type = ir_resolve_union_tag_type(ira, instruction->target->base.source_node, enum_type);
2762628594 if (type_is_invalid(tag_type))
27627 return ira->codegen->invalid_instruction;
27628 return ir_const_type(ira, &instruction->base, tag_type);
28595 return ira->codegen->invalid_inst_gen;
28596 return ir_const_type(ira, &instruction->base.base, tag_type);
2762928597 } else {
27630 ir_add_error(ira, target_inst, buf_sprintf("expected enum or union, found '%s'",
28598 ir_add_error(ira, &target_inst->base, buf_sprintf("expected enum or union, found '%s'",
2763128599 buf_ptr(&enum_type->name)));
27632 return ira->codegen->invalid_instruction;
28600 return ira->codegen->invalid_inst_gen;
2763328601 }
2763428602}
2763528603
27636static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstruction *op) {
28604static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op) {
2763728605 ZigType *operand_type = ir_resolve_type(ira, op);
2763828606 if (type_is_invalid(operand_type))
2763928607 return ira->codegen->builtin_types.entry_invalid;
2764028608
2764128609 if (operand_type->id == ZigTypeIdInt) {
2764228610 if (operand_type->data.integral.bit_count < 8) {
27643 ir_add_error(ira, op,
28611 ir_add_error(ira, &op->base,
2764428612 buf_sprintf("expected integer type 8 bits or larger, found %" PRIu32 "-bit integer type",
2764528613 operand_type->data.integral.bit_count));
2764628614 return ira->codegen->builtin_types.entry_invalid;
2764728615 }
2764828616 uint32_t max_atomic_bits = target_arch_largest_atomic_bits(ira->codegen->zig_target->arch);
2764928617 if (operand_type->data.integral.bit_count > max_atomic_bits) {
27650 ir_add_error(ira, op,
28618 ir_add_error(ira, &op->base,
2765128619 buf_sprintf("expected %" PRIu32 "-bit integer type or smaller, found %" PRIu32 "-bit integer type",
2765228620 max_atomic_bits, operand_type->data.integral.bit_count));
2765328621 return ira->codegen->builtin_types.entry_invalid;
2765428622 }
2765528623 if (!is_power_of_2(operand_type->data.integral.bit_count)) {
27656 ir_add_error(ira, op,
28624 ir_add_error(ira, &op->base,
2765728625 buf_sprintf("%" PRIu32 "-bit integer type is not a power of 2", operand_type->data.integral.bit_count));
2765828626 return ira->codegen->builtin_types.entry_invalid;
2765928627 }
2766028628 } else if (operand_type->id == ZigTypeIdEnum) {
2766128629 ZigType *int_type = operand_type->data.enumeration.tag_int_type;
2766228630 if (int_type->data.integral.bit_count < 8) {
27663 ir_add_error(ira, op,
28631 ir_add_error(ira, &op->base,
2766428632 buf_sprintf("expected enum tag type 8 bits or larger, found %" PRIu32 "-bit tag type",
2766528633 int_type->data.integral.bit_count));
2766628634 return ira->codegen->builtin_types.entry_invalid;
2766728635 }
2766828636 uint32_t max_atomic_bits = target_arch_largest_atomic_bits(ira->codegen->zig_target->arch);
2766928637 if (int_type->data.integral.bit_count > max_atomic_bits) {
27670 ir_add_error(ira, op,
28638 ir_add_error(ira, &op->base,
2767128639 buf_sprintf("expected %" PRIu32 "-bit enum tag type or smaller, found %" PRIu32 "-bit tag type",
2767228640 max_atomic_bits, int_type->data.integral.bit_count));
2767328641 return ira->codegen->builtin_types.entry_invalid;
2767428642 }
2767528643 if (!is_power_of_2(int_type->data.integral.bit_count)) {
27676 ir_add_error(ira, op,
28644 ir_add_error(ira, &op->base,
2767728645 buf_sprintf("%" PRIu32 "-bit enum tag type is not a power of 2", int_type->data.integral.bit_count));
2767828646 return ira->codegen->builtin_types.entry_invalid;
2767928647 }
2768028648 } else if (operand_type->id == ZigTypeIdFloat) {
2768128649 uint32_t max_atomic_bits = target_arch_largest_atomic_bits(ira->codegen->zig_target->arch);
2768228650 if (operand_type->data.floating.bit_count > max_atomic_bits) {
27683 ir_add_error(ira, op,
28651 ir_add_error(ira, &op->base,
2768428652 buf_sprintf("expected %" PRIu32 "-bit float or smaller, found %" PRIu32 "-bit float",
2768528653 max_atomic_bits, (uint32_t) operand_type->data.floating.bit_count));
2768628654 return ira->codegen->builtin_types.entry_invalid;
2768728655 }
2768828656 } else if (get_codegen_ptr_type(operand_type) == nullptr) {
27689 ir_add_error(ira, op,
28657 ir_add_error(ira, &op->base,
2769028658 buf_sprintf("expected integer, float, enum or pointer type, found '%s'", buf_ptr(&operand_type->name)));
2769128659 return ira->codegen->builtin_types.entry_invalid;
2769228660 }
......@@ -27694,172 +28662,146 @@ static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstruction *op
2769428662 return operand_type;
2769528663}
2769628664
27697static IrInstruction *ir_analyze_instruction_atomic_rmw(IrAnalyze *ira, IrInstructionAtomicRmw *instruction) {
28665static IrInstGen *ir_analyze_instruction_atomic_rmw(IrAnalyze *ira, IrInstSrcAtomicRmw *instruction) {
2769828666 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child);
2769928667 if (type_is_invalid(operand_type))
27700 return ira->codegen->invalid_instruction;
28668 return ira->codegen->invalid_inst_gen;
2770128669
27702 IrInstruction *ptr_inst = instruction->ptr->child;
28670 IrInstGen *ptr_inst = instruction->ptr->child;
2770328671 if (type_is_invalid(ptr_inst->value->type))
27704 return ira->codegen->invalid_instruction;
28672 return ira->codegen->invalid_inst_gen;
2770528673
2770628674 // TODO let this be volatile
2770728675 ZigType *ptr_type = get_pointer_to_type(ira->codegen, operand_type, false);
27708 IrInstruction *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);
28676 IrInstGen *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);
2770928677 if (type_is_invalid(casted_ptr->value->type))
27710 return ira->codegen->invalid_instruction;
28678 return ira->codegen->invalid_inst_gen;
2771128679
2771228680 AtomicRmwOp op;
27713 if (instruction->op == nullptr) {
27714 op = instruction->resolved_op;
27715 } else {
27716 if (!ir_resolve_atomic_rmw_op(ira, instruction->op->child, &op)) {
27717 return ira->codegen->invalid_instruction;
27718 }
28681 if (!ir_resolve_atomic_rmw_op(ira, instruction->op->child, &op)) {
28682 return ira->codegen->invalid_inst_gen;
2771928683 }
2772028684
2772128685 if (operand_type->id == ZigTypeIdEnum && op != AtomicRmwOp_xchg) {
27722 ir_add_error(ira, instruction->op,
28686 ir_add_error(ira, &instruction->op->base,
2772328687 buf_sprintf("@atomicRmw on enum only works with .Xchg"));
27724 return ira->codegen->invalid_instruction;
28688 return ira->codegen->invalid_inst_gen;
2772528689 } else if (operand_type->id == ZigTypeIdFloat && op > AtomicRmwOp_sub) {
27726 ir_add_error(ira, instruction->op,
28690 ir_add_error(ira, &instruction->op->base,
2772728691 buf_sprintf("@atomicRmw with float only works with .Xchg, .Add and .Sub"));
27728 return ira->codegen->invalid_instruction;
28692 return ira->codegen->invalid_inst_gen;
2772928693 }
2773028694
27731 IrInstruction *operand = instruction->operand->child;
28695 IrInstGen *operand = instruction->operand->child;
2773228696 if (type_is_invalid(operand->value->type))
27733 return ira->codegen->invalid_instruction;
28697 return ira->codegen->invalid_inst_gen;
2773428698
27735 IrInstruction *casted_operand = ir_implicit_cast(ira, operand, operand_type);
28699 IrInstGen *casted_operand = ir_implicit_cast(ira, operand, operand_type);
2773628700 if (type_is_invalid(casted_operand->value->type))
27737 return ira->codegen->invalid_instruction;
28701 return ira->codegen->invalid_inst_gen;
2773828702
2773928703 AtomicOrder ordering;
27740 if (instruction->ordering == nullptr) {
27741 ordering = instruction->resolved_ordering;
27742 } else {
27743 if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
27744 return ira->codegen->invalid_instruction;
27745 if (ordering == AtomicOrderUnordered) {
27746 ir_add_error(ira, instruction->ordering,
27747 buf_sprintf("@atomicRmw atomic ordering must not be Unordered"));
27748 return ira->codegen->invalid_instruction;
27749 }
28704 if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
28705 return ira->codegen->invalid_inst_gen;
28706 if (ordering == AtomicOrderUnordered) {
28707 ir_add_error(ira, &instruction->ordering->base,
28708 buf_sprintf("@atomicRmw atomic ordering must not be Unordered"));
28709 return ira->codegen->invalid_inst_gen;
2775028710 }
2775128711
2775228712 if (instr_is_comptime(casted_operand) && instr_is_comptime(casted_ptr) && casted_ptr->value->data.x_ptr.mut == ConstPtrMutComptimeVar)
2775328713 {
27754 zig_panic("TODO compile-time execution of atomicRmw");
28714 ir_add_error(ira, &instruction->base.base,
28715 buf_sprintf("compiler bug: TODO compile-time execution of @atomicRmw"));
28716 return ira->codegen->invalid_inst_gen;
2775528717 }
2775628718
27757 IrInstruction *result = ir_build_atomic_rmw(&ira->new_irb, instruction->base.scope,
27758 instruction->base.source_node, nullptr, casted_ptr, nullptr, casted_operand, nullptr,
27759 op, ordering);
27760 result->value->type = operand_type;
27761 return result;
28719 return ir_build_atomic_rmw_gen(ira, &instruction->base.base, casted_ptr, casted_operand, op,
28720 ordering, operand_type);
2776228721}
2776328722
27764static IrInstruction *ir_analyze_instruction_atomic_load(IrAnalyze *ira, IrInstructionAtomicLoad *instruction) {
28723static IrInstGen *ir_analyze_instruction_atomic_load(IrAnalyze *ira, IrInstSrcAtomicLoad *instruction) {
2776528724 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child);
2776628725 if (type_is_invalid(operand_type))
27767 return ira->codegen->invalid_instruction;
28726 return ira->codegen->invalid_inst_gen;
2776828727
27769 IrInstruction *ptr_inst = instruction->ptr->child;
28728 IrInstGen *ptr_inst = instruction->ptr->child;
2777028729 if (type_is_invalid(ptr_inst->value->type))
27771 return ira->codegen->invalid_instruction;
28730 return ira->codegen->invalid_inst_gen;
2777228731
2777328732 ZigType *ptr_type = get_pointer_to_type(ira->codegen, operand_type, true);
27774 IrInstruction *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);
28733 IrInstGen *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);
2777528734 if (type_is_invalid(casted_ptr->value->type))
27776 return ira->codegen->invalid_instruction;
28735 return ira->codegen->invalid_inst_gen;
2777728736
2777828737 AtomicOrder ordering;
27779 if (instruction->ordering == nullptr) {
27780 ordering = instruction->resolved_ordering;
27781 } else {
27782 if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
27783 return ira->codegen->invalid_instruction;
27784 }
28738 if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
28739 return ira->codegen->invalid_inst_gen;
2778528740
2778628741 if (ordering == AtomicOrderRelease || ordering == AtomicOrderAcqRel) {
27787 ir_assert(instruction->ordering != nullptr, &instruction->base);
27788 ir_add_error(ira, instruction->ordering,
28742 ir_assert(instruction->ordering != nullptr, &instruction->base.base);
28743 ir_add_error(ira, &instruction->ordering->base,
2778928744 buf_sprintf("@atomicLoad atomic ordering must not be Release or AcqRel"));
27790 return ira->codegen->invalid_instruction;
28745 return ira->codegen->invalid_inst_gen;
2779128746 }
2779228747
2779328748 if (instr_is_comptime(casted_ptr)) {
27794 IrInstruction *result = ir_get_deref(ira, &instruction->base, casted_ptr, nullptr);
27795 ir_assert(result->value->type != nullptr, &instruction->base);
28749 IrInstGen *result = ir_get_deref(ira, &instruction->base.base, casted_ptr, nullptr);
28750 ir_assert(result->value->type != nullptr, &instruction->base.base);
2779628751 return result;
2779728752 }
2779828753
27799 IrInstruction *result = ir_build_atomic_load(&ira->new_irb, instruction->base.scope,
27800 instruction->base.source_node, nullptr, casted_ptr, nullptr, ordering);
27801 result->value->type = operand_type;
27802 return result;
28754 return ir_build_atomic_load_gen(ira, &instruction->base.base, casted_ptr, ordering, operand_type);
2780328755}
2780428756
27805static IrInstruction *ir_analyze_instruction_atomic_store(IrAnalyze *ira, IrInstructionAtomicStore *instruction) {
28757static IrInstGen *ir_analyze_instruction_atomic_store(IrAnalyze *ira, IrInstSrcAtomicStore *instruction) {
2780628758 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child);
2780728759 if (type_is_invalid(operand_type))
27808 return ira->codegen->invalid_instruction;
28760 return ira->codegen->invalid_inst_gen;
2780928761
27810 IrInstruction *ptr_inst = instruction->ptr->child;
28762 IrInstGen *ptr_inst = instruction->ptr->child;
2781128763 if (type_is_invalid(ptr_inst->value->type))
27812 return ira->codegen->invalid_instruction;
28764 return ira->codegen->invalid_inst_gen;
2781328765
2781428766 ZigType *ptr_type = get_pointer_to_type(ira->codegen, operand_type, false);
27815 IrInstruction *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);
28767 IrInstGen *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);
2781628768 if (type_is_invalid(casted_ptr->value->type))
27817 return ira->codegen->invalid_instruction;
28769 return ira->codegen->invalid_inst_gen;
2781828770
27819 IrInstruction *value = instruction->value->child;
28771 IrInstGen *value = instruction->value->child;
2782028772 if (type_is_invalid(value->value->type))
27821 return ira->codegen->invalid_instruction;
28773 return ira->codegen->invalid_inst_gen;
2782228774
27823 IrInstruction *casted_value = ir_implicit_cast(ira, value, operand_type);
28775 IrInstGen *casted_value = ir_implicit_cast(ira, value, operand_type);
2782428776 if (type_is_invalid(casted_value->value->type))
27825 return ira->codegen->invalid_instruction;
28777 return ira->codegen->invalid_inst_gen;
2782628778
2782728779
2782828780 AtomicOrder ordering;
27829 if (instruction->ordering == nullptr) {
27830 ordering = instruction->resolved_ordering;
27831 } else {
27832 if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
27833 return ira->codegen->invalid_instruction;
27834 }
28781 if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
28782 return ira->codegen->invalid_inst_gen;
2783528783
2783628784 if (ordering == AtomicOrderAcquire || ordering == AtomicOrderAcqRel) {
27837 ir_assert(instruction->ordering != nullptr, &instruction->base);
27838 ir_add_error(ira, instruction->ordering,
28785 ir_assert(instruction->ordering != nullptr, &instruction->base.base);
28786 ir_add_error(ira, &instruction->ordering->base,
2783928787 buf_sprintf("@atomicStore atomic ordering must not be Acquire or AcqRel"));
27840 return ira->codegen->invalid_instruction;
28788 return ira->codegen->invalid_inst_gen;
2784128789 }
2784228790
2784328791 if (instr_is_comptime(casted_value) && instr_is_comptime(casted_ptr)) {
27844 IrInstruction *result = ir_analyze_store_ptr(ira, &instruction->base, casted_ptr, value, false);
28792 IrInstGen *result = ir_analyze_store_ptr(ira, &instruction->base.base, casted_ptr, value, false);
2784528793 result->value->type = ira->codegen->builtin_types.entry_void;
2784628794 return result;
2784728795 }
2784828796
27849 IrInstruction *result = ir_build_atomic_store(&ira->new_irb, instruction->base.scope,
27850 instruction->base.source_node, nullptr, casted_ptr, casted_value, nullptr, ordering);
27851 result->value->type = ira->codegen->builtin_types.entry_void;
27852 return result;
28797 return ir_build_atomic_store_gen(ira, &instruction->base.base, casted_ptr, casted_value, ordering);
2785328798}
2785428799
27855static IrInstruction *ir_analyze_instruction_save_err_ret_addr(IrAnalyze *ira, IrInstructionSaveErrRetAddr *instruction) {
27856 IrInstruction *result = ir_build_save_err_ret_addr(&ira->new_irb, instruction->base.scope,
27857 instruction->base.source_node);
27858 result->value->type = ira->codegen->builtin_types.entry_void;
27859 return result;
28800static IrInstGen *ir_analyze_instruction_save_err_ret_addr(IrAnalyze *ira, IrInstSrcSaveErrRetAddr *instruction) {
28801 return ir_build_save_err_ret_addr_gen(ira, &instruction->base.base);
2786028802}
2786128803
27862static ErrorMsg *ir_eval_float_op(IrAnalyze *ira, IrInstruction *source_instr, BuiltinFnId fop, ZigType *float_type,
28804static ErrorMsg *ir_eval_float_op(IrAnalyze *ira, IrInst* source_instr, BuiltinFnId fop, ZigType *float_type,
2786328805 ZigValue *op, ZigValue *out_val)
2786428806{
2786528807 assert(ira && source_instr && float_type && out_val && op);
......@@ -28072,30 +29014,30 @@ static ErrorMsg *ir_eval_float_op(IrAnalyze *ira, IrInstruction *source_instr, B
2807229014 return nullptr;
2807329015}
2807429016
28075static IrInstruction *ir_analyze_instruction_float_op(IrAnalyze *ira, IrInstructionFloatOp *instruction) {
28076 IrInstruction *operand = instruction->operand->child;
29017static IrInstGen *ir_analyze_instruction_float_op(IrAnalyze *ira, IrInstSrcFloatOp *instruction) {
29018 IrInstGen *operand = instruction->operand->child;
2807729019 ZigType *operand_type = operand->value->type;
2807829020 if (type_is_invalid(operand_type))
28079 return ira->codegen->invalid_instruction;
29021 return ira->codegen->invalid_inst_gen;
2808029022
2808129023 // This instruction accepts floats and vectors of floats.
2808229024 ZigType *scalar_type = (operand_type->id == ZigTypeIdVector) ?
2808329025 operand_type->data.vector.elem_type : operand_type;
2808429026
2808529027 if (scalar_type->id != ZigTypeIdFloat && scalar_type->id != ZigTypeIdComptimeFloat) {
28086 ir_add_error(ira, operand,
29028 ir_add_error(ira, &operand->base,
2808729029 buf_sprintf("expected float type, found '%s'", buf_ptr(&scalar_type->name)));
28088 return ira->codegen->invalid_instruction;
29030 return ira->codegen->invalid_inst_gen;
2808929031 }
2809029032
2809129033 if (instr_is_comptime(operand)) {
2809229034 ZigValue *operand_val = ir_resolve_const(ira, operand, UndefOk);
2809329035 if (operand_val == nullptr)
28094 return ira->codegen->invalid_instruction;
29036 return ira->codegen->invalid_inst_gen;
2809529037 if (operand_val->special == ConstValSpecialUndef)
28096 return ir_const_undef(ira, &instruction->base, operand_type);
29038 return ir_const_undef(ira, &instruction->base.base, operand_type);
2809729039
28098 IrInstruction *result = ir_const(ira, &instruction->base, operand_type);
29040 IrInstGen *result = ir_const(ira, &instruction->base.base, operand_type);
2809929041 ZigValue *out_val = result->value;
2810029042
2810129043 if (operand_type->id == ZigTypeIdVector) {
......@@ -28106,47 +29048,44 @@ static IrInstruction *ir_analyze_instruction_float_op(IrAnalyze *ira, IrInstruct
2810629048 for (size_t i = 0; i < len; i += 1) {
2810729049 ZigValue *elem_operand = &operand_val->data.x_array.data.s_none.elements[i];
2810829050 ZigValue *float_out_val = &out_val->data.x_array.data.s_none.elements[i];
28109 ir_assert(elem_operand->type == scalar_type, &instruction->base);
28110 ir_assert(float_out_val->type == scalar_type, &instruction->base);
28111 ErrorMsg *msg = ir_eval_float_op(ira, &instruction->base, instruction->fn_id, scalar_type,
29051 ir_assert(elem_operand->type == scalar_type, &instruction->base.base);
29052 ir_assert(float_out_val->type == scalar_type, &instruction->base.base);
29053 ErrorMsg *msg = ir_eval_float_op(ira, &instruction->base.base, instruction->fn_id, scalar_type,
2811229054 elem_operand, float_out_val);
2811329055 if (msg != nullptr) {
28114 add_error_note(ira->codegen, msg, instruction->base.source_node,
29056 add_error_note(ira->codegen, msg, instruction->base.base.source_node,
2811529057 buf_sprintf("when computing vector element at index %" ZIG_PRI_usize, i));
28116 return ira->codegen->invalid_instruction;
29058 return ira->codegen->invalid_inst_gen;
2811729059 }
2811829060 float_out_val->type = scalar_type;
2811929061 }
2812029062 out_val->type = operand_type;
2812129063 out_val->special = ConstValSpecialStatic;
2812229064 } else {
28123 if (ir_eval_float_op(ira, &instruction->base, instruction->fn_id, scalar_type,
29065 if (ir_eval_float_op(ira, &instruction->base.base, instruction->fn_id, scalar_type,
2812429066 operand_val, out_val) != nullptr)
2812529067 {
28126 return ira->codegen->invalid_instruction;
29068 return ira->codegen->invalid_inst_gen;
2812729069 }
2812829070 }
2812929071 return result;
2813029072 }
2813129073
28132 ir_assert(scalar_type->id == ZigTypeIdFloat, &instruction->base);
29074 ir_assert(scalar_type->id == ZigTypeIdFloat, &instruction->base.base);
2813329075
28134 IrInstruction *result = ir_build_float_op(&ira->new_irb, instruction->base.scope,
28135 instruction->base.source_node, operand, instruction->fn_id);
28136 result->value->type = operand_type;
28137 return result;
29076 return ir_build_float_op_gen(ira, &instruction->base.base, operand, instruction->fn_id, operand_type);
2813829077}
2813929078
28140static IrInstruction *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstructionBswap *instruction) {
29079static IrInstGen *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstSrcBswap *instruction) {
2814129080 Error err;
2814229081
2814329082 ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
2814429083 if (type_is_invalid(int_type))
28145 return ira->codegen->invalid_instruction;
29084 return ira->codegen->invalid_inst_gen;
2814629085
28147 IrInstruction *uncasted_op = instruction->op->child;
29086 IrInstGen *uncasted_op = instruction->op->child;
2814829087 if (type_is_invalid(uncasted_op->value->type))
28149 return ira->codegen->invalid_instruction;
29088 return ira->codegen->invalid_inst_gen;
2815029089
2815129090 uint32_t vector_len; // UINT32_MAX means not a vector
2815229091 if (uncasted_op->value->type->id == ZigTypeIdArray &&
......@@ -28162,28 +29101,28 @@ static IrInstruction *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstruction
2816229101 bool is_vector = (vector_len != UINT32_MAX);
2816329102 ZigType *op_type = is_vector ? get_vector_type(ira->codegen, vector_len, int_type) : int_type;
2816429103
28165 IrInstruction *op = ir_implicit_cast(ira, uncasted_op, op_type);
29104 IrInstGen *op = ir_implicit_cast(ira, uncasted_op, op_type);
2816629105 if (type_is_invalid(op->value->type))
28167 return ira->codegen->invalid_instruction;
29106 return ira->codegen->invalid_inst_gen;
2816829107
2816929108 if (int_type->data.integral.bit_count == 8 || int_type->data.integral.bit_count == 0)
2817029109 return op;
2817129110
2817229111 if (int_type->data.integral.bit_count % 8 != 0) {
28173 ir_add_error(ira, instruction->op,
29112 ir_add_error(ira, &instruction->op->base,
2817429113 buf_sprintf("@byteSwap integer type '%s' has %" PRIu32 " bits which is not evenly divisible by 8",
2817529114 buf_ptr(&int_type->name), int_type->data.integral.bit_count));
28176 return ira->codegen->invalid_instruction;
29115 return ira->codegen->invalid_inst_gen;
2817729116 }
2817829117
2817929118 if (instr_is_comptime(op)) {
2818029119 ZigValue *val = ir_resolve_const(ira, op, UndefOk);
2818129120 if (val == nullptr)
28182 return ira->codegen->invalid_instruction;
29121 return ira->codegen->invalid_inst_gen;
2818329122 if (val->special == ConstValSpecialUndef)
28184 return ir_const_undef(ira, &instruction->base, op_type);
29123 return ir_const_undef(ira, &instruction->base.base, op_type);
2818529124
28186 IrInstruction *result = ir_const(ira, &instruction->base, op_type);
29125 IrInstGen *result = ir_const(ira, &instruction->base.base, op_type);
2818729126 size_t buf_size = int_type->data.integral.bit_count / 8;
2818829127 uint8_t *buf = allocate_nonzero<uint8_t>(buf_size);
2818929128 if (is_vector) {
......@@ -28191,10 +29130,10 @@ static IrInstruction *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstruction
2819129130 result->value->data.x_array.data.s_none.elements = create_const_vals(op_type->data.vector.len);
2819229131 for (unsigned i = 0; i < op_type->data.vector.len; i += 1) {
2819329132 ZigValue *op_elem_val = &val->data.x_array.data.s_none.elements[i];
28194 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, instruction->base.source_node,
29133 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, instruction->base.base.source_node,
2819529134 op_elem_val, UndefOk)))
2819629135 {
28197 return ira->codegen->invalid_instruction;
29136 return ira->codegen->invalid_inst_gen;
2819829137 }
2819929138 ZigValue *result_elem_val = &result->value->data.x_array.data.s_none.elements[i];
2820029139 result_elem_val->type = int_type;
......@@ -28216,23 +29155,20 @@ static IrInstruction *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstruction
2821629155 return result;
2821729156 }
2821829157
28219 IrInstruction *result = ir_build_bswap(&ira->new_irb, instruction->base.scope,
28220 instruction->base.source_node, nullptr, op);
28221 result->value->type = op_type;
28222 return result;
29158 return ir_build_bswap_gen(ira, &instruction->base.base, op_type, op);
2822329159}
2822429160
28225static IrInstruction *ir_analyze_instruction_bit_reverse(IrAnalyze *ira, IrInstructionBitReverse *instruction) {
29161static IrInstGen *ir_analyze_instruction_bit_reverse(IrAnalyze *ira, IrInstSrcBitReverse *instruction) {
2822629162 ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
2822729163 if (type_is_invalid(int_type))
28228 return ira->codegen->invalid_instruction;
29164 return ira->codegen->invalid_inst_gen;
2822929165
28230 IrInstruction *op = ir_implicit_cast(ira, instruction->op->child, int_type);
29166 IrInstGen *op = ir_implicit_cast(ira, instruction->op->child, int_type);
2823129167 if (type_is_invalid(op->value->type))
28232 return ira->codegen->invalid_instruction;
29168 return ira->codegen->invalid_inst_gen;
2823329169
2823429170 if (int_type->data.integral.bit_count == 0) {
28235 IrInstruction *result = ir_const(ira, &instruction->base, int_type);
29171 IrInstGen *result = ir_const(ira, &instruction->base.base, int_type);
2823629172 bigint_init_unsigned(&result->value->data.x_bigint, 0);
2823729173 return result;
2823829174 }
......@@ -28240,11 +29176,11 @@ static IrInstruction *ir_analyze_instruction_bit_reverse(IrAnalyze *ira, IrInstr
2824029176 if (instr_is_comptime(op)) {
2824129177 ZigValue *val = ir_resolve_const(ira, op, UndefOk);
2824229178 if (val == nullptr)
28243 return ira->codegen->invalid_instruction;
29179 return ira->codegen->invalid_inst_gen;
2824429180 if (val->special == ConstValSpecialUndef)
28245 return ir_const_undef(ira, &instruction->base, int_type);
29181 return ir_const_undef(ira, &instruction->base.base, int_type);
2824629182
28247 IrInstruction *result = ir_const(ira, &instruction->base, int_type);
29183 IrInstGen *result = ir_const(ira, &instruction->base.base, int_type);
2824829184 size_t num_bits = int_type->data.integral.bit_count;
2824929185 size_t buf_size = (num_bits + 7) / 8;
2825029186 uint8_t *comptime_buf = allocate_nonzero<uint8_t>(buf_size);
......@@ -28271,128 +29207,125 @@ static IrInstruction *ir_analyze_instruction_bit_reverse(IrAnalyze *ira, IrInstr
2827129207 return result;
2827229208 }
2827329209
28274 IrInstruction *result = ir_build_bit_reverse(&ira->new_irb, instruction->base.scope,
28275 instruction->base.source_node, nullptr, op);
28276 result->value->type = int_type;
28277 return result;
29210 return ir_build_bit_reverse_gen(ira, &instruction->base.base, int_type, op);
2827829211}
2827929212
2828029213
28281static IrInstruction *ir_analyze_instruction_enum_to_int(IrAnalyze *ira, IrInstructionEnumToInt *instruction) {
28282 IrInstruction *target = instruction->target->child;
29214static IrInstGen *ir_analyze_instruction_enum_to_int(IrAnalyze *ira, IrInstSrcEnumToInt *instruction) {
29215 IrInstGen *target = instruction->target->child;
2828329216 if (type_is_invalid(target->value->type))
28284 return ira->codegen->invalid_instruction;
29217 return ira->codegen->invalid_inst_gen;
2828529218
28286 return ir_analyze_enum_to_int(ira, &instruction->base, target);
29219 return ir_analyze_enum_to_int(ira, &instruction->base.base, target);
2828729220}
2828829221
28289static IrInstruction *ir_analyze_instruction_int_to_enum(IrAnalyze *ira, IrInstructionIntToEnum *instruction) {
29222static IrInstGen *ir_analyze_instruction_int_to_enum(IrAnalyze *ira, IrInstSrcIntToEnum *instruction) {
2829029223 Error err;
28291 IrInstruction *dest_type_value = instruction->dest_type->child;
29224 IrInstGen *dest_type_value = instruction->dest_type->child;
2829229225 ZigType *dest_type = ir_resolve_type(ira, dest_type_value);
2829329226 if (type_is_invalid(dest_type))
28294 return ira->codegen->invalid_instruction;
29227 return ira->codegen->invalid_inst_gen;
2829529228
2829629229 if (dest_type->id != ZigTypeIdEnum) {
28297 ir_add_error(ira, instruction->dest_type,
29230 ir_add_error(ira, &instruction->dest_type->base,
2829829231 buf_sprintf("expected enum, found type '%s'", buf_ptr(&dest_type->name)));
28299 return ira->codegen->invalid_instruction;
29232 return ira->codegen->invalid_inst_gen;
2830029233 }
2830129234
2830229235 if ((err = type_resolve(ira->codegen, dest_type, ResolveStatusZeroBitsKnown)))
28303 return ira->codegen->invalid_instruction;
29236 return ira->codegen->invalid_inst_gen;
2830429237
2830529238 ZigType *tag_type = dest_type->data.enumeration.tag_int_type;
2830629239
28307 IrInstruction *target = instruction->target->child;
29240 IrInstGen *target = instruction->target->child;
2830829241 if (type_is_invalid(target->value->type))
28309 return ira->codegen->invalid_instruction;
29242 return ira->codegen->invalid_inst_gen;
2831029243
28311 IrInstruction *casted_target = ir_implicit_cast(ira, target, tag_type);
29244 IrInstGen *casted_target = ir_implicit_cast(ira, target, tag_type);
2831229245 if (type_is_invalid(casted_target->value->type))
28313 return ira->codegen->invalid_instruction;
29246 return ira->codegen->invalid_inst_gen;
2831429247
28315 return ir_analyze_int_to_enum(ira, &instruction->base, casted_target, dest_type);
29248 return ir_analyze_int_to_enum(ira, &instruction->base.base, casted_target, dest_type);
2831629249}
2831729250
28318static IrInstruction *ir_analyze_instruction_check_runtime_scope(IrAnalyze *ira, IrInstructionCheckRuntimeScope *instruction) {
28319 IrInstruction *block_comptime_inst = instruction->scope_is_comptime->child;
29251static IrInstGen *ir_analyze_instruction_check_runtime_scope(IrAnalyze *ira, IrInstSrcCheckRuntimeScope *instruction) {
29252 IrInstGen *block_comptime_inst = instruction->scope_is_comptime->child;
2832029253 bool scope_is_comptime;
2832129254 if (!ir_resolve_bool(ira, block_comptime_inst, &scope_is_comptime))
28322 return ira->codegen->invalid_instruction;
29255 return ira->codegen->invalid_inst_gen;
2832329256
28324 IrInstruction *is_comptime_inst = instruction->is_comptime->child;
29257 IrInstGen *is_comptime_inst = instruction->is_comptime->child;
2832529258 bool is_comptime;
2832629259 if (!ir_resolve_bool(ira, is_comptime_inst, &is_comptime))
28327 return ira->codegen->invalid_instruction;
29260 return ira->codegen->invalid_inst_gen;
2832829261
2832929262 if (!scope_is_comptime && is_comptime) {
28330 ErrorMsg *msg = ir_add_error(ira, &instruction->base,
29263 ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
2833129264 buf_sprintf("comptime control flow inside runtime block"));
28332 add_error_note(ira->codegen, msg, block_comptime_inst->source_node,
29265 add_error_note(ira->codegen, msg, block_comptime_inst->base.source_node,
2833329266 buf_sprintf("runtime block created here"));
28334 return ira->codegen->invalid_instruction;
29267 return ira->codegen->invalid_inst_gen;
2833529268 }
2833629269
28337 return ir_const_void(ira, &instruction->base);
29270 return ir_const_void(ira, &instruction->base.base);
2833829271}
2833929272
28340static IrInstruction *ir_analyze_instruction_has_decl(IrAnalyze *ira, IrInstructionHasDecl *instruction) {
29273static IrInstGen *ir_analyze_instruction_has_decl(IrAnalyze *ira, IrInstSrcHasDecl *instruction) {
2834129274 ZigType *container_type = ir_resolve_type(ira, instruction->container->child);
2834229275 if (type_is_invalid(container_type))
28343 return ira->codegen->invalid_instruction;
29276 return ira->codegen->invalid_inst_gen;
2834429277
2834529278 Buf *name = ir_resolve_str(ira, instruction->name->child);
2834629279 if (name == nullptr)
28347 return ira->codegen->invalid_instruction;
29280 return ira->codegen->invalid_inst_gen;
2834829281
2834929282 if (!is_container(container_type)) {
28350 ir_add_error(ira, instruction->container,
29283 ir_add_error(ira, &instruction->container->base,
2835129284 buf_sprintf("expected struct, enum, or union; found '%s'", buf_ptr(&container_type->name)));
28352 return ira->codegen->invalid_instruction;
29285 return ira->codegen->invalid_inst_gen;
2835329286 }
2835429287
2835529288 ScopeDecls *container_scope = get_container_scope(container_type);
2835629289 Tld *tld = find_container_decl(ira->codegen, container_scope, name);
2835729290 if (tld == nullptr)
28358 return ir_const_bool(ira, &instruction->base, false);
29291 return ir_const_bool(ira, &instruction->base.base, false);
2835929292
28360 if (tld->visib_mod == VisibModPrivate && tld->import != get_scope_import(instruction->base.scope)) {
28361 return ir_const_bool(ira, &instruction->base, false);
29293 if (tld->visib_mod == VisibModPrivate && tld->import != get_scope_import(instruction->base.base.scope)) {
29294 return ir_const_bool(ira, &instruction->base.base, false);
2836229295 }
2836329296
28364 return ir_const_bool(ira, &instruction->base, true);
29297 return ir_const_bool(ira, &instruction->base.base, true);
2836529298}
2836629299
28367static IrInstruction *ir_analyze_instruction_undeclared_ident(IrAnalyze *ira, IrInstructionUndeclaredIdent *instruction) {
29300static IrInstGen *ir_analyze_instruction_undeclared_ident(IrAnalyze *ira, IrInstSrcUndeclaredIdent *instruction) {
2836829301 // put a variable of same name with invalid type in global scope
2836929302 // so that future references to this same name will find a variable with an invalid type
28370 populate_invalid_variable_in_scope(ira->codegen, instruction->base.scope, instruction->base.source_node,
28371 instruction->name);
28372 ir_add_error(ira, &instruction->base,
29303 populate_invalid_variable_in_scope(ira->codegen, instruction->base.base.scope,
29304 instruction->base.base.source_node, instruction->name);
29305 ir_add_error(ira, &instruction->base.base,
2837329306 buf_sprintf("use of undeclared identifier '%s'", buf_ptr(instruction->name)));
28374 return ira->codegen->invalid_instruction;
29307 return ira->codegen->invalid_inst_gen;
2837529308}
2837629309
28377static IrInstruction *ir_analyze_instruction_end_expr(IrAnalyze *ira, IrInstructionEndExpr *instruction) {
28378 IrInstruction *value = instruction->value->child;
29310static IrInstGen *ir_analyze_instruction_end_expr(IrAnalyze *ira, IrInstSrcEndExpr *instruction) {
29311 IrInstGen *value = instruction->value->child;
2837929312 if (type_is_invalid(value->value->type))
28380 return ira->codegen->invalid_instruction;
29313 return ira->codegen->invalid_inst_gen;
2838129314
2838229315 bool was_written = instruction->result_loc->written;
28383 IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,
28384 value->value->type, value, false, false, true);
29316 IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
29317 value->value->type, value, false, true);
2838529318 if (result_loc != nullptr) {
2838629319 if (type_is_invalid(result_loc->value->type))
28387 return ira->codegen->invalid_instruction;
29320 return ira->codegen->invalid_inst_gen;
2838829321 if (result_loc->value->type->id == ZigTypeIdUnreachable)
2838929322 return result_loc;
2839029323
2839129324 if (!was_written || instruction->result_loc->id == ResultLocIdPeer) {
28392 IrInstruction *store_ptr = ir_analyze_store_ptr(ira, &instruction->base, result_loc, value,
29325 IrInstGen *store_ptr = ir_analyze_store_ptr(ira, &instruction->base.base, result_loc, value,
2839329326 instruction->result_loc->allow_write_through_const);
2839429327 if (type_is_invalid(store_ptr->value->type)) {
28395 return ira->codegen->invalid_instruction;
29328 return ira->codegen->invalid_inst_gen;
2839629329 }
2839729330 }
2839829331
......@@ -28407,106 +29340,100 @@ static IrInstruction *ir_analyze_instruction_end_expr(IrAnalyze *ira, IrInstruct
2840729340 }
2840829341 }
2840929342
28410 return ir_const_void(ira, &instruction->base);
29343 return ir_const_void(ira, &instruction->base.base);
2841129344}
2841229345
28413static IrInstruction *ir_analyze_instruction_implicit_cast(IrAnalyze *ira, IrInstructionImplicitCast *instruction) {
28414 IrInstruction *operand = instruction->operand->child;
29346static IrInstGen *ir_analyze_instruction_implicit_cast(IrAnalyze *ira, IrInstSrcImplicitCast *instruction) {
29347 IrInstGen *operand = instruction->operand->child;
2841529348 if (type_is_invalid(operand->value->type))
2841629349 return operand;
2841729350
28418 IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base,
28419 &instruction->result_loc_cast->base, operand->value->type, operand, false, false, true);
28420 if (result_loc != nullptr && (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)))
28421 return result_loc;
28422
2842329351 ZigType *dest_type = ir_resolve_type(ira, instruction->result_loc_cast->base.source_instruction->child);
2842429352 if (type_is_invalid(dest_type))
28425 return ira->codegen->invalid_instruction;
28426 return ir_implicit_cast2(ira, &instruction->base, operand, dest_type);
29353 return ira->codegen->invalid_inst_gen;
29354 return ir_implicit_cast2(ira, &instruction->base.base, operand, dest_type);
2842729355}
2842829356
28429static IrInstruction *ir_analyze_instruction_bit_cast_src(IrAnalyze *ira, IrInstructionBitCastSrc *instruction) {
28430 IrInstruction *operand = instruction->operand->child;
29357static IrInstGen *ir_analyze_instruction_bit_cast_src(IrAnalyze *ira, IrInstSrcBitCast *instruction) {
29358 IrInstGen *operand = instruction->operand->child;
2843129359 if (type_is_invalid(operand->value->type))
2843229360 return operand;
2843329361
28434 IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base,
28435 &instruction->result_loc_bit_cast->base, operand->value->type, operand, false, false, true);
28436 if (result_loc != nullptr && (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)))
29362 IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base,
29363 &instruction->result_loc_bit_cast->base, operand->value->type, operand, false, true);
29364 if (result_loc != nullptr &&
29365 (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable))
29366 {
2843729367 return result_loc;
28438
28439 if (instruction->result_loc_bit_cast->parent->gen_instruction != nullptr) {
28440 return instruction->result_loc_bit_cast->parent->gen_instruction;
2844129368 }
2844229369
28443 return result_loc;
29370 ZigType *dest_type = ir_resolve_type(ira,
29371 instruction->result_loc_bit_cast->base.source_instruction->child);
29372 if (type_is_invalid(dest_type))
29373 return ira->codegen->invalid_inst_gen;
29374 return ir_analyze_bit_cast(ira, &instruction->base.base, operand, dest_type);
2844429375}
2844529376
28446static IrInstruction *ir_analyze_instruction_union_init_named_field(IrAnalyze *ira,
28447 IrInstructionUnionInitNamedField *instruction)
29377static IrInstGen *ir_analyze_instruction_union_init_named_field(IrAnalyze *ira,
29378 IrInstSrcUnionInitNamedField *instruction)
2844829379{
2844929380 ZigType *union_type = ir_resolve_type(ira, instruction->union_type->child);
2845029381 if (type_is_invalid(union_type))
28451 return ira->codegen->invalid_instruction;
29382 return ira->codegen->invalid_inst_gen;
2845229383
2845329384 if (union_type->id != ZigTypeIdUnion) {
28454 ir_add_error(ira, instruction->union_type,
29385 ir_add_error(ira, &instruction->union_type->base,
2845529386 buf_sprintf("non-union type '%s' passed to @unionInit", buf_ptr(&union_type->name)));
28456 return ira->codegen->invalid_instruction;
29387 return ira->codegen->invalid_inst_gen;
2845729388 }
2845829389
2845929390 Buf *field_name = ir_resolve_str(ira, instruction->field_name->child);
2846029391 if (field_name == nullptr)
28461 return ira->codegen->invalid_instruction;
29392 return ira->codegen->invalid_inst_gen;
2846229393
28463 IrInstruction *field_result_loc = instruction->field_result_loc->child;
29394 IrInstGen *field_result_loc = instruction->field_result_loc->child;
2846429395 if (type_is_invalid(field_result_loc->value->type))
28465 return ira->codegen->invalid_instruction;
29396 return ira->codegen->invalid_inst_gen;
2846629397
28467 IrInstruction *result_loc = instruction->result_loc->child;
29398 IrInstGen *result_loc = instruction->result_loc->child;
2846829399 if (type_is_invalid(result_loc->value->type))
28469 return ira->codegen->invalid_instruction;
29400 return ira->codegen->invalid_inst_gen;
2847029401
28471 return ir_analyze_union_init(ira, &instruction->base, instruction->base.source_node,
29402 return ir_analyze_union_init(ira, &instruction->base.base, instruction->base.base.source_node,
2847229403 union_type, field_name, field_result_loc, result_loc);
2847329404}
2847429405
28475static IrInstruction *ir_analyze_instruction_suspend_begin(IrAnalyze *ira, IrInstructionSuspendBegin *instruction) {
28476 IrInstructionSuspendBegin *result = ir_build_suspend_begin(&ira->new_irb, instruction->base.scope,
28477 instruction->base.source_node);
28478 return &result->base;
29406static IrInstGen *ir_analyze_instruction_suspend_begin(IrAnalyze *ira, IrInstSrcSuspendBegin *instruction) {
29407 return ir_build_suspend_begin_gen(ira, &instruction->base.base);
2847929408}
2848029409
28481static IrInstruction *ir_analyze_instruction_suspend_finish(IrAnalyze *ira,
28482 IrInstructionSuspendFinish *instruction)
28483{
28484 IrInstruction *begin_base = instruction->begin->base.child;
29410static IrInstGen *ir_analyze_instruction_suspend_finish(IrAnalyze *ira, IrInstSrcSuspendFinish *instruction) {
29411 IrInstGen *begin_base = instruction->begin->base.child;
2848529412 if (type_is_invalid(begin_base->value->type))
28486 return ira->codegen->invalid_instruction;
28487 ir_assert(begin_base->id == IrInstructionIdSuspendBegin, &instruction->base);
28488 IrInstructionSuspendBegin *begin = reinterpret_cast<IrInstructionSuspendBegin *>(begin_base);
29413 return ira->codegen->invalid_inst_gen;
29414 ir_assert(begin_base->id == IrInstGenIdSuspendBegin, &instruction->base.base);
29415 IrInstGenSuspendBegin *begin = reinterpret_cast<IrInstGenSuspendBegin *>(begin_base);
2848929416
28490 ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);
28491 ir_assert(fn_entry != nullptr, &instruction->base);
29417 ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
29418 ir_assert(fn_entry != nullptr, &instruction->base.base);
2849229419
2849329420 if (fn_entry->inferred_async_node == nullptr) {
28494 fn_entry->inferred_async_node = instruction->base.source_node;
29421 fn_entry->inferred_async_node = instruction->base.base.source_node;
2849529422 }
2849629423
28497 return ir_build_suspend_finish(&ira->new_irb, instruction->base.scope, instruction->base.source_node, begin);
29424 return ir_build_suspend_finish_gen(ira, &instruction->base.base, begin);
2849829425}
2849929426
28500static IrInstruction *analyze_frame_ptr_to_anyframe_T(IrAnalyze *ira, IrInstruction *source_instr,
28501 IrInstruction *frame_ptr, ZigFn **target_fn)
29427static IrInstGen *analyze_frame_ptr_to_anyframe_T(IrAnalyze *ira, IrInst* source_instr,
29428 IrInstGen *frame_ptr, ZigFn **target_fn)
2850229429{
2850329430 if (type_is_invalid(frame_ptr->value->type))
28504 return ira->codegen->invalid_instruction;
29431 return ira->codegen->invalid_inst_gen;
2850529432
2850629433 *target_fn = nullptr;
2850729434
2850829435 ZigType *result_type;
28509 IrInstruction *frame;
29436 IrInstGen *frame;
2851029437 if (frame_ptr->value->type->id == ZigTypeIdPointer &&
2851129438 frame_ptr->value->type->data.pointer.ptr_len == PtrLenSingle &&
2851229439 frame_ptr->value->type->data.pointer.child_type->id == ZigTypeIdFnFrame)
......@@ -28529,38 +29456,38 @@ static IrInstruction *analyze_frame_ptr_to_anyframe_T(IrAnalyze *ira, IrInstruct
2852929456 {
2853029457 ir_add_error(ira, source_instr,
2853129458 buf_sprintf("expected anyframe->T, found '%s'", buf_ptr(&frame->value->type->name)));
28532 return ira->codegen->invalid_instruction;
29459 return ira->codegen->invalid_inst_gen;
2853329460 } else {
2853429461 result_type = frame->value->type->data.any_frame.result_type;
2853529462 }
2853629463 }
2853729464
2853829465 ZigType *any_frame_type = get_any_frame_type(ira->codegen, result_type);
28539 IrInstruction *casted_frame = ir_implicit_cast(ira, frame, any_frame_type);
29466 IrInstGen *casted_frame = ir_implicit_cast(ira, frame, any_frame_type);
2854029467 if (type_is_invalid(casted_frame->value->type))
28541 return ira->codegen->invalid_instruction;
29468 return ira->codegen->invalid_inst_gen;
2854229469
2854329470 return casted_frame;
2854429471}
2854529472
28546static IrInstruction *ir_analyze_instruction_await(IrAnalyze *ira, IrInstructionAwaitSrc *instruction) {
28547 IrInstruction *operand = instruction->frame->child;
29473static IrInstGen *ir_analyze_instruction_await(IrAnalyze *ira, IrInstSrcAwait *instruction) {
29474 IrInstGen *operand = instruction->frame->child;
2854829475 if (type_is_invalid(operand->value->type))
28549 return ira->codegen->invalid_instruction;
29476 return ira->codegen->invalid_inst_gen;
2855029477 ZigFn *target_fn;
28551 IrInstruction *frame = analyze_frame_ptr_to_anyframe_T(ira, &instruction->base, operand, &target_fn);
29478 IrInstGen *frame = analyze_frame_ptr_to_anyframe_T(ira, &instruction->base.base, operand, &target_fn);
2855229479 if (type_is_invalid(frame->value->type))
28553 return ira->codegen->invalid_instruction;
29480 return ira->codegen->invalid_inst_gen;
2855429481
2855529482 ZigType *result_type = frame->value->type->data.any_frame.result_type;
2855629483
28557 ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);
28558 ir_assert(fn_entry != nullptr, &instruction->base);
29484 ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
29485 ir_assert(fn_entry != nullptr, &instruction->base.base);
2855929486
2856029487 // If it's not @Frame(func) then it's definitely a suspend point
2856129488 if (target_fn == nullptr) {
2856229489 if (fn_entry->inferred_async_node == nullptr) {
28563 fn_entry->inferred_async_node = instruction->base.source_node;
29490 fn_entry->inferred_async_node = instruction->base.base.source_node;
2856429491 }
2856529492 }
2856629493
......@@ -28568,402 +29495,368 @@ static IrInstruction *ir_analyze_instruction_await(IrAnalyze *ira, IrInstruction
2856829495 fn_entry->calls_or_awaits_errorable_fn = true;
2856929496 }
2857029497
28571 IrInstruction *result_loc;
29498 IrInstGen *result_loc;
2857229499 if (type_has_bits(result_type)) {
28573 result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,
28574 result_type, nullptr, true, true, true);
28575 if (result_loc != nullptr && (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)))
29500 result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
29501 result_type, nullptr, true, true);
29502 if (result_loc != nullptr &&
29503 (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable))
29504 {
2857629505 return result_loc;
29506 }
2857729507 } else {
2857829508 result_loc = nullptr;
2857929509 }
2858029510
28581 IrInstructionAwaitGen *result = ir_build_await_gen(ira, &instruction->base, frame, result_type, result_loc);
29511 IrInstGenAwait *result = ir_build_await_gen(ira, &instruction->base.base, frame, result_type, result_loc);
2858229512 result->target_fn = target_fn;
2858329513 fn_entry->await_list.append(result);
2858429514 return ir_finish_anal(ira, &result->base);
2858529515}
2858629516
28587static IrInstruction *ir_analyze_instruction_resume(IrAnalyze *ira, IrInstructionResume *instruction) {
28588 IrInstruction *frame_ptr = instruction->frame->child;
29517static IrInstGen *ir_analyze_instruction_resume(IrAnalyze *ira, IrInstSrcResume *instruction) {
29518 IrInstGen *frame_ptr = instruction->frame->child;
2858929519 if (type_is_invalid(frame_ptr->value->type))
28590 return ira->codegen->invalid_instruction;
29520 return ira->codegen->invalid_inst_gen;
2859129521
28592 IrInstruction *frame;
29522 IrInstGen *frame;
2859329523 if (frame_ptr->value->type->id == ZigTypeIdPointer &&
2859429524 frame_ptr->value->type->data.pointer.ptr_len == PtrLenSingle &&
2859529525 frame_ptr->value->type->data.pointer.child_type->id == ZigTypeIdFnFrame)
2859629526 {
2859729527 frame = frame_ptr;
2859829528 } else {
28599 frame = ir_get_deref(ira, &instruction->base, frame_ptr, nullptr);
29529 frame = ir_get_deref(ira, &instruction->base.base, frame_ptr, nullptr);
2860029530 }
2860129531
2860229532 ZigType *any_frame_type = get_any_frame_type(ira->codegen, nullptr);
28603 IrInstruction *casted_frame = ir_implicit_cast(ira, frame, any_frame_type);
29533 IrInstGen *casted_frame = ir_implicit_cast2(ira, &instruction->frame->base, frame, any_frame_type);
2860429534 if (type_is_invalid(casted_frame->value->type))
28605 return ira->codegen->invalid_instruction;
29535 return ira->codegen->invalid_inst_gen;
2860629536
28607 return ir_build_resume(&ira->new_irb, instruction->base.scope, instruction->base.source_node, casted_frame);
29537 return ir_build_resume_gen(ira, &instruction->base.base, casted_frame);
2860829538}
2860929539
28610static IrInstruction *ir_analyze_instruction_spill_begin(IrAnalyze *ira, IrInstructionSpillBegin *instruction) {
28611 if (ir_should_inline(ira->new_irb.exec, instruction->base.scope))
28612 return ir_const_void(ira, &instruction->base);
29540static IrInstGen *ir_analyze_instruction_spill_begin(IrAnalyze *ira, IrInstSrcSpillBegin *instruction) {
29541 if (ir_should_inline(ira->old_irb.exec, instruction->base.base.scope))
29542 return ir_const_void(ira, &instruction->base.base);
2861329543
28614 IrInstruction *operand = instruction->operand->child;
29544 IrInstGen *operand = instruction->operand->child;
2861529545 if (type_is_invalid(operand->value->type))
28616 return ira->codegen->invalid_instruction;
29546 return ira->codegen->invalid_inst_gen;
2861729547
2861829548 if (!type_has_bits(operand->value->type))
28619 return ir_const_void(ira, &instruction->base);
29549 return ir_const_void(ira, &instruction->base.base);
2862029550
28621 ir_assert(instruction->spill_id == SpillIdRetErrCode, &instruction->base);
29551 ir_assert(instruction->spill_id == SpillIdRetErrCode, &instruction->base.base);
2862229552 ira->new_irb.exec->need_err_code_spill = true;
2862329553
28624 IrInstructionSpillBegin *result = ir_build_spill_begin(&ira->new_irb, instruction->base.scope,
28625 instruction->base.source_node, operand, instruction->spill_id);
28626 return &result->base;
29554 return ir_build_spill_begin_gen(ira, &instruction->base.base, operand, instruction->spill_id);
2862729555}
2862829556
28629static IrInstruction *ir_analyze_instruction_spill_end(IrAnalyze *ira, IrInstructionSpillEnd *instruction) {
28630 IrInstruction *operand = instruction->begin->operand->child;
29557static IrInstGen *ir_analyze_instruction_spill_end(IrAnalyze *ira, IrInstSrcSpillEnd *instruction) {
29558 IrInstGen *operand = instruction->begin->operand->child;
2863129559 if (type_is_invalid(operand->value->type))
28632 return ira->codegen->invalid_instruction;
29560 return ira->codegen->invalid_inst_gen;
2863329561
28634 if (ir_should_inline(ira->new_irb.exec, instruction->base.scope) || !type_has_bits(operand->value->type))
29562 if (ir_should_inline(ira->old_irb.exec, instruction->base.base.scope) || !type_has_bits(operand->value->type))
2863529563 return operand;
2863629564
28637 ir_assert(instruction->begin->base.child->id == IrInstructionIdSpillBegin, &instruction->base);
28638 IrInstructionSpillBegin *begin = reinterpret_cast<IrInstructionSpillBegin *>(instruction->begin->base.child);
29565 ir_assert(instruction->begin->base.child->id == IrInstGenIdSpillBegin, &instruction->base.base);
29566 IrInstGenSpillBegin *begin = reinterpret_cast<IrInstGenSpillBegin *>(instruction->begin->base.child);
2863929567
28640 IrInstruction *result = ir_build_spill_end(&ira->new_irb, instruction->base.scope,
28641 instruction->base.source_node, begin);
28642 result->value->type = operand->value->type;
28643 return result;
29568 return ir_build_spill_end_gen(ira, &instruction->base.base, begin, operand->value->type);
2864429569}
2864529570
28646static IrInstruction *ir_analyze_instruction_base(IrAnalyze *ira, IrInstruction *instruction) {
29571static IrInstGen *ir_analyze_instruction_base(IrAnalyze *ira, IrInstSrc *instruction) {
2864729572 switch (instruction->id) {
28648 case IrInstructionIdInvalid:
28649 case IrInstructionIdWidenOrShorten:
28650 case IrInstructionIdStructFieldPtr:
28651 case IrInstructionIdUnionFieldPtr:
28652 case IrInstructionIdOptionalWrap:
28653 case IrInstructionIdErrWrapCode:
28654 case IrInstructionIdErrWrapPayload:
28655 case IrInstructionIdCast:
28656 case IrInstructionIdDeclVarGen:
28657 case IrInstructionIdPtrCastGen:
28658 case IrInstructionIdCmpxchgGen:
28659 case IrInstructionIdArrayToVector:
28660 case IrInstructionIdVectorToArray:
28661 case IrInstructionIdPtrOfArrayToSlice:
28662 case IrInstructionIdAssertZero:
28663 case IrInstructionIdAssertNonNull:
28664 case IrInstructionIdResizeSlice:
28665 case IrInstructionIdLoadPtrGen:
28666 case IrInstructionIdBitCastGen:
28667 case IrInstructionIdCallGen:
28668 case IrInstructionIdReturnPtr:
28669 case IrInstructionIdAllocaGen:
28670 case IrInstructionIdSliceGen:
28671 case IrInstructionIdRefGen:
28672 case IrInstructionIdTestErrGen:
28673 case IrInstructionIdFrameSizeGen:
28674 case IrInstructionIdAwaitGen:
28675 case IrInstructionIdSplatGen:
28676 case IrInstructionIdVectorExtractElem:
28677 case IrInstructionIdVectorStoreElem:
28678 case IrInstructionIdAsmGen:
29573 case IrInstSrcIdInvalid:
2867929574 zig_unreachable();
2868029575
28681 case IrInstructionIdReturn:
28682 return ir_analyze_instruction_return(ira, (IrInstructionReturn *)instruction);
28683 case IrInstructionIdConst:
28684 return ir_analyze_instruction_const(ira, (IrInstructionConst *)instruction);
28685 case IrInstructionIdUnOp:
28686 return ir_analyze_instruction_un_op(ira, (IrInstructionUnOp *)instruction);
28687 case IrInstructionIdBinOp:
28688 return ir_analyze_instruction_bin_op(ira, (IrInstructionBinOp *)instruction);
28689 case IrInstructionIdMergeErrSets:
28690 return ir_analyze_instruction_merge_err_sets(ira, (IrInstructionMergeErrSets *)instruction);
28691 case IrInstructionIdDeclVarSrc:
28692 return ir_analyze_instruction_decl_var(ira, (IrInstructionDeclVarSrc *)instruction);
28693 case IrInstructionIdLoadPtr:
28694 return ir_analyze_instruction_load_ptr(ira, (IrInstructionLoadPtr *)instruction);
28695 case IrInstructionIdStorePtr:
28696 return ir_analyze_instruction_store_ptr(ira, (IrInstructionStorePtr *)instruction);
28697 case IrInstructionIdElemPtr:
28698 return ir_analyze_instruction_elem_ptr(ira, (IrInstructionElemPtr *)instruction);
28699 case IrInstructionIdVarPtr:
28700 return ir_analyze_instruction_var_ptr(ira, (IrInstructionVarPtr *)instruction);
28701 case IrInstructionIdFieldPtr:
28702 return ir_analyze_instruction_field_ptr(ira, (IrInstructionFieldPtr *)instruction);
28703 case IrInstructionIdCallSrc:
28704 return ir_analyze_instruction_call(ira, (IrInstructionCallSrc *)instruction);
28705 case IrInstructionIdCallSrcArgs:
28706 return ir_analyze_instruction_call_args(ira, (IrInstructionCallSrcArgs *)instruction);
28707 case IrInstructionIdCallExtra:
28708 return ir_analyze_instruction_call_extra(ira, (IrInstructionCallExtra *)instruction);
28709 case IrInstructionIdBr:
28710 return ir_analyze_instruction_br(ira, (IrInstructionBr *)instruction);
28711 case IrInstructionIdCondBr:
28712 return ir_analyze_instruction_cond_br(ira, (IrInstructionCondBr *)instruction);
28713 case IrInstructionIdUnreachable:
28714 return ir_analyze_instruction_unreachable(ira, (IrInstructionUnreachable *)instruction);
28715 case IrInstructionIdPhi:
28716 return ir_analyze_instruction_phi(ira, (IrInstructionPhi *)instruction);
28717 case IrInstructionIdTypeOf:
28718 return ir_analyze_instruction_typeof(ira, (IrInstructionTypeOf *)instruction);
28719 case IrInstructionIdSetCold:
28720 return ir_analyze_instruction_set_cold(ira, (IrInstructionSetCold *)instruction);
28721 case IrInstructionIdSetRuntimeSafety:
28722 return ir_analyze_instruction_set_runtime_safety(ira, (IrInstructionSetRuntimeSafety *)instruction);
28723 case IrInstructionIdSetFloatMode:
28724 return ir_analyze_instruction_set_float_mode(ira, (IrInstructionSetFloatMode *)instruction);
28725 case IrInstructionIdAnyFrameType:
28726 return ir_analyze_instruction_any_frame_type(ira, (IrInstructionAnyFrameType *)instruction);
28727 case IrInstructionIdSliceType:
28728 return ir_analyze_instruction_slice_type(ira, (IrInstructionSliceType *)instruction);
28729 case IrInstructionIdAsmSrc:
28730 return ir_analyze_instruction_asm(ira, (IrInstructionAsmSrc *)instruction);
28731 case IrInstructionIdArrayType:
28732 return ir_analyze_instruction_array_type(ira, (IrInstructionArrayType *)instruction);
28733 case IrInstructionIdSizeOf:
28734 return ir_analyze_instruction_size_of(ira, (IrInstructionSizeOf *)instruction);
28735 case IrInstructionIdTestNonNull:
28736 return ir_analyze_instruction_test_non_null(ira, (IrInstructionTestNonNull *)instruction);
28737 case IrInstructionIdOptionalUnwrapPtr:
28738 return ir_analyze_instruction_optional_unwrap_ptr(ira, (IrInstructionOptionalUnwrapPtr *)instruction);
28739 case IrInstructionIdClz:
28740 return ir_analyze_instruction_clz(ira, (IrInstructionClz *)instruction);
28741 case IrInstructionIdCtz:
28742 return ir_analyze_instruction_ctz(ira, (IrInstructionCtz *)instruction);
28743 case IrInstructionIdPopCount:
28744 return ir_analyze_instruction_pop_count(ira, (IrInstructionPopCount *)instruction);
28745 case IrInstructionIdBswap:
28746 return ir_analyze_instruction_bswap(ira, (IrInstructionBswap *)instruction);
28747 case IrInstructionIdBitReverse:
28748 return ir_analyze_instruction_bit_reverse(ira, (IrInstructionBitReverse *)instruction);
28749 case IrInstructionIdSwitchBr:
28750 return ir_analyze_instruction_switch_br(ira, (IrInstructionSwitchBr *)instruction);
28751 case IrInstructionIdSwitchTarget:
28752 return ir_analyze_instruction_switch_target(ira, (IrInstructionSwitchTarget *)instruction);
28753 case IrInstructionIdSwitchVar:
28754 return ir_analyze_instruction_switch_var(ira, (IrInstructionSwitchVar *)instruction);
28755 case IrInstructionIdSwitchElseVar:
28756 return ir_analyze_instruction_switch_else_var(ira, (IrInstructionSwitchElseVar *)instruction);
28757 case IrInstructionIdUnionTag:
28758 return ir_analyze_instruction_union_tag(ira, (IrInstructionUnionTag *)instruction);
28759 case IrInstructionIdImport:
28760 return ir_analyze_instruction_import(ira, (IrInstructionImport *)instruction);
28761 case IrInstructionIdRef:
28762 return ir_analyze_instruction_ref(ira, (IrInstructionRef *)instruction);
28763 case IrInstructionIdContainerInitList:
28764 return ir_analyze_instruction_container_init_list(ira, (IrInstructionContainerInitList *)instruction);
28765 case IrInstructionIdContainerInitFields:
28766 return ir_analyze_instruction_container_init_fields(ira, (IrInstructionContainerInitFields *)instruction);
28767 case IrInstructionIdCompileErr:
28768 return ir_analyze_instruction_compile_err(ira, (IrInstructionCompileErr *)instruction);
28769 case IrInstructionIdCompileLog:
28770 return ir_analyze_instruction_compile_log(ira, (IrInstructionCompileLog *)instruction);
28771 case IrInstructionIdErrName:
28772 return ir_analyze_instruction_err_name(ira, (IrInstructionErrName *)instruction);
28773 case IrInstructionIdTypeName:
28774 return ir_analyze_instruction_type_name(ira, (IrInstructionTypeName *)instruction);
28775 case IrInstructionIdCImport:
28776 return ir_analyze_instruction_c_import(ira, (IrInstructionCImport *)instruction);
28777 case IrInstructionIdCInclude:
28778 return ir_analyze_instruction_c_include(ira, (IrInstructionCInclude *)instruction);
28779 case IrInstructionIdCDefine:
28780 return ir_analyze_instruction_c_define(ira, (IrInstructionCDefine *)instruction);
28781 case IrInstructionIdCUndef:
28782 return ir_analyze_instruction_c_undef(ira, (IrInstructionCUndef *)instruction);
28783 case IrInstructionIdEmbedFile:
28784 return ir_analyze_instruction_embed_file(ira, (IrInstructionEmbedFile *)instruction);
28785 case IrInstructionIdCmpxchgSrc:
28786 return ir_analyze_instruction_cmpxchg(ira, (IrInstructionCmpxchgSrc *)instruction);
28787 case IrInstructionIdFence:
28788 return ir_analyze_instruction_fence(ira, (IrInstructionFence *)instruction);
28789 case IrInstructionIdTruncate:
28790 return ir_analyze_instruction_truncate(ira, (IrInstructionTruncate *)instruction);
28791 case IrInstructionIdIntCast:
28792 return ir_analyze_instruction_int_cast(ira, (IrInstructionIntCast *)instruction);
28793 case IrInstructionIdFloatCast:
28794 return ir_analyze_instruction_float_cast(ira, (IrInstructionFloatCast *)instruction);
28795 case IrInstructionIdErrSetCast:
28796 return ir_analyze_instruction_err_set_cast(ira, (IrInstructionErrSetCast *)instruction);
28797 case IrInstructionIdFromBytes:
28798 return ir_analyze_instruction_from_bytes(ira, (IrInstructionFromBytes *)instruction);
28799 case IrInstructionIdToBytes:
28800 return ir_analyze_instruction_to_bytes(ira, (IrInstructionToBytes *)instruction);
28801 case IrInstructionIdIntToFloat:
28802 return ir_analyze_instruction_int_to_float(ira, (IrInstructionIntToFloat *)instruction);
28803 case IrInstructionIdFloatToInt:
28804 return ir_analyze_instruction_float_to_int(ira, (IrInstructionFloatToInt *)instruction);
28805 case IrInstructionIdBoolToInt:
28806 return ir_analyze_instruction_bool_to_int(ira, (IrInstructionBoolToInt *)instruction);
28807 case IrInstructionIdIntType:
28808 return ir_analyze_instruction_int_type(ira, (IrInstructionIntType *)instruction);
28809 case IrInstructionIdVectorType:
28810 return ir_analyze_instruction_vector_type(ira, (IrInstructionVectorType *)instruction);
28811 case IrInstructionIdShuffleVector:
28812 return ir_analyze_instruction_shuffle_vector(ira, (IrInstructionShuffleVector *)instruction);
28813 case IrInstructionIdSplatSrc:
28814 return ir_analyze_instruction_splat(ira, (IrInstructionSplatSrc *)instruction);
28815 case IrInstructionIdBoolNot:
28816 return ir_analyze_instruction_bool_not(ira, (IrInstructionBoolNot *)instruction);
28817 case IrInstructionIdMemset:
28818 return ir_analyze_instruction_memset(ira, (IrInstructionMemset *)instruction);
28819 case IrInstructionIdMemcpy:
28820 return ir_analyze_instruction_memcpy(ira, (IrInstructionMemcpy *)instruction);
28821 case IrInstructionIdSliceSrc:
28822 return ir_analyze_instruction_slice(ira, (IrInstructionSliceSrc *)instruction);
28823 case IrInstructionIdMemberCount:
28824 return ir_analyze_instruction_member_count(ira, (IrInstructionMemberCount *)instruction);
28825 case IrInstructionIdMemberType:
28826 return ir_analyze_instruction_member_type(ira, (IrInstructionMemberType *)instruction);
28827 case IrInstructionIdMemberName:
28828 return ir_analyze_instruction_member_name(ira, (IrInstructionMemberName *)instruction);
28829 case IrInstructionIdBreakpoint:
28830 return ir_analyze_instruction_breakpoint(ira, (IrInstructionBreakpoint *)instruction);
28831 case IrInstructionIdReturnAddress:
28832 return ir_analyze_instruction_return_address(ira, (IrInstructionReturnAddress *)instruction);
28833 case IrInstructionIdFrameAddress:
28834 return ir_analyze_instruction_frame_address(ira, (IrInstructionFrameAddress *)instruction);
28835 case IrInstructionIdFrameHandle:
28836 return ir_analyze_instruction_frame_handle(ira, (IrInstructionFrameHandle *)instruction);
28837 case IrInstructionIdFrameType:
28838 return ir_analyze_instruction_frame_type(ira, (IrInstructionFrameType *)instruction);
28839 case IrInstructionIdFrameSizeSrc:
28840 return ir_analyze_instruction_frame_size(ira, (IrInstructionFrameSizeSrc *)instruction);
28841 case IrInstructionIdAlignOf:
28842 return ir_analyze_instruction_align_of(ira, (IrInstructionAlignOf *)instruction);
28843 case IrInstructionIdOverflowOp:
28844 return ir_analyze_instruction_overflow_op(ira, (IrInstructionOverflowOp *)instruction);
28845 case IrInstructionIdTestErrSrc:
28846 return ir_analyze_instruction_test_err(ira, (IrInstructionTestErrSrc *)instruction);
28847 case IrInstructionIdUnwrapErrCode:
28848 return ir_analyze_instruction_unwrap_err_code(ira, (IrInstructionUnwrapErrCode *)instruction);
28849 case IrInstructionIdUnwrapErrPayload:
28850 return ir_analyze_instruction_unwrap_err_payload(ira, (IrInstructionUnwrapErrPayload *)instruction);
28851 case IrInstructionIdFnProto:
28852 return ir_analyze_instruction_fn_proto(ira, (IrInstructionFnProto *)instruction);
28853 case IrInstructionIdTestComptime:
28854 return ir_analyze_instruction_test_comptime(ira, (IrInstructionTestComptime *)instruction);
28855 case IrInstructionIdCheckSwitchProngs:
28856 return ir_analyze_instruction_check_switch_prongs(ira, (IrInstructionCheckSwitchProngs *)instruction);
28857 case IrInstructionIdCheckStatementIsVoid:
28858 return ir_analyze_instruction_check_statement_is_void(ira, (IrInstructionCheckStatementIsVoid *)instruction);
28859 case IrInstructionIdDeclRef:
28860 return ir_analyze_instruction_decl_ref(ira, (IrInstructionDeclRef *)instruction);
28861 case IrInstructionIdPanic:
28862 return ir_analyze_instruction_panic(ira, (IrInstructionPanic *)instruction);
28863 case IrInstructionIdPtrCastSrc:
28864 return ir_analyze_instruction_ptr_cast(ira, (IrInstructionPtrCastSrc *)instruction);
28865 case IrInstructionIdIntToPtr:
28866 return ir_analyze_instruction_int_to_ptr(ira, (IrInstructionIntToPtr *)instruction);
28867 case IrInstructionIdPtrToInt:
28868 return ir_analyze_instruction_ptr_to_int(ira, (IrInstructionPtrToInt *)instruction);
28869 case IrInstructionIdTagName:
28870 return ir_analyze_instruction_enum_tag_name(ira, (IrInstructionTagName *)instruction);
28871 case IrInstructionIdFieldParentPtr:
28872 return ir_analyze_instruction_field_parent_ptr(ira, (IrInstructionFieldParentPtr *)instruction);
28873 case IrInstructionIdByteOffsetOf:
28874 return ir_analyze_instruction_byte_offset_of(ira, (IrInstructionByteOffsetOf *)instruction);
28875 case IrInstructionIdBitOffsetOf:
28876 return ir_analyze_instruction_bit_offset_of(ira, (IrInstructionBitOffsetOf *)instruction);
28877 case IrInstructionIdTypeInfo:
28878 return ir_analyze_instruction_type_info(ira, (IrInstructionTypeInfo *) instruction);
28879 case IrInstructionIdType:
28880 return ir_analyze_instruction_type(ira, (IrInstructionType *)instruction);
28881 case IrInstructionIdHasField:
28882 return ir_analyze_instruction_has_field(ira, (IrInstructionHasField *) instruction);
28883 case IrInstructionIdTypeId:
28884 return ir_analyze_instruction_type_id(ira, (IrInstructionTypeId *)instruction);
28885 case IrInstructionIdSetEvalBranchQuota:
28886 return ir_analyze_instruction_set_eval_branch_quota(ira, (IrInstructionSetEvalBranchQuota *)instruction);
28887 case IrInstructionIdPtrType:
28888 return ir_analyze_instruction_ptr_type(ira, (IrInstructionPtrType *)instruction);
28889 case IrInstructionIdAlignCast:
28890 return ir_analyze_instruction_align_cast(ira, (IrInstructionAlignCast *)instruction);
28891 case IrInstructionIdImplicitCast:
28892 return ir_analyze_instruction_implicit_cast(ira, (IrInstructionImplicitCast *)instruction);
28893 case IrInstructionIdResolveResult:
28894 return ir_analyze_instruction_resolve_result(ira, (IrInstructionResolveResult *)instruction);
28895 case IrInstructionIdResetResult:
28896 return ir_analyze_instruction_reset_result(ira, (IrInstructionResetResult *)instruction);
28897 case IrInstructionIdOpaqueType:
28898 return ir_analyze_instruction_opaque_type(ira, (IrInstructionOpaqueType *)instruction);
28899 case IrInstructionIdSetAlignStack:
28900 return ir_analyze_instruction_set_align_stack(ira, (IrInstructionSetAlignStack *)instruction);
28901 case IrInstructionIdArgType:
28902 return ir_analyze_instruction_arg_type(ira, (IrInstructionArgType *)instruction);
28903 case IrInstructionIdTagType:
28904 return ir_analyze_instruction_tag_type(ira, (IrInstructionTagType *)instruction);
28905 case IrInstructionIdExport:
28906 return ir_analyze_instruction_export(ira, (IrInstructionExport *)instruction);
28907 case IrInstructionIdErrorReturnTrace:
28908 return ir_analyze_instruction_error_return_trace(ira, (IrInstructionErrorReturnTrace *)instruction);
28909 case IrInstructionIdErrorUnion:
28910 return ir_analyze_instruction_error_union(ira, (IrInstructionErrorUnion *)instruction);
28911 case IrInstructionIdAtomicRmw:
28912 return ir_analyze_instruction_atomic_rmw(ira, (IrInstructionAtomicRmw *)instruction);
28913 case IrInstructionIdAtomicLoad:
28914 return ir_analyze_instruction_atomic_load(ira, (IrInstructionAtomicLoad *)instruction);
28915 case IrInstructionIdAtomicStore:
28916 return ir_analyze_instruction_atomic_store(ira, (IrInstructionAtomicStore *)instruction);
28917 case IrInstructionIdSaveErrRetAddr:
28918 return ir_analyze_instruction_save_err_ret_addr(ira, (IrInstructionSaveErrRetAddr *)instruction);
28919 case IrInstructionIdAddImplicitReturnType:
28920 return ir_analyze_instruction_add_implicit_return_type(ira, (IrInstructionAddImplicitReturnType *)instruction);
28921 case IrInstructionIdFloatOp:
28922 return ir_analyze_instruction_float_op(ira, (IrInstructionFloatOp *)instruction);
28923 case IrInstructionIdMulAdd:
28924 return ir_analyze_instruction_mul_add(ira, (IrInstructionMulAdd *)instruction);
28925 case IrInstructionIdIntToErr:
28926 return ir_analyze_instruction_int_to_err(ira, (IrInstructionIntToErr *)instruction);
28927 case IrInstructionIdErrToInt:
28928 return ir_analyze_instruction_err_to_int(ira, (IrInstructionErrToInt *)instruction);
28929 case IrInstructionIdIntToEnum:
28930 return ir_analyze_instruction_int_to_enum(ira, (IrInstructionIntToEnum *)instruction);
28931 case IrInstructionIdEnumToInt:
28932 return ir_analyze_instruction_enum_to_int(ira, (IrInstructionEnumToInt *)instruction);
28933 case IrInstructionIdCheckRuntimeScope:
28934 return ir_analyze_instruction_check_runtime_scope(ira, (IrInstructionCheckRuntimeScope *)instruction);
28935 case IrInstructionIdHasDecl:
28936 return ir_analyze_instruction_has_decl(ira, (IrInstructionHasDecl *)instruction);
28937 case IrInstructionIdUndeclaredIdent:
28938 return ir_analyze_instruction_undeclared_ident(ira, (IrInstructionUndeclaredIdent *)instruction);
28939 case IrInstructionIdAllocaSrc:
29576 case IrInstSrcIdReturn:
29577 return ir_analyze_instruction_return(ira, (IrInstSrcReturn *)instruction);
29578 case IrInstSrcIdConst:
29579 return ir_analyze_instruction_const(ira, (IrInstSrcConst *)instruction);
29580 case IrInstSrcIdUnOp:
29581 return ir_analyze_instruction_un_op(ira, (IrInstSrcUnOp *)instruction);
29582 case IrInstSrcIdBinOp:
29583 return ir_analyze_instruction_bin_op(ira, (IrInstSrcBinOp *)instruction);
29584 case IrInstSrcIdMergeErrSets:
29585 return ir_analyze_instruction_merge_err_sets(ira, (IrInstSrcMergeErrSets *)instruction);
29586 case IrInstSrcIdDeclVar:
29587 return ir_analyze_instruction_decl_var(ira, (IrInstSrcDeclVar *)instruction);
29588 case IrInstSrcIdLoadPtr:
29589 return ir_analyze_instruction_load_ptr(ira, (IrInstSrcLoadPtr *)instruction);
29590 case IrInstSrcIdStorePtr:
29591 return ir_analyze_instruction_store_ptr(ira, (IrInstSrcStorePtr *)instruction);
29592 case IrInstSrcIdElemPtr:
29593 return ir_analyze_instruction_elem_ptr(ira, (IrInstSrcElemPtr *)instruction);
29594 case IrInstSrcIdVarPtr:
29595 return ir_analyze_instruction_var_ptr(ira, (IrInstSrcVarPtr *)instruction);
29596 case IrInstSrcIdFieldPtr:
29597 return ir_analyze_instruction_field_ptr(ira, (IrInstSrcFieldPtr *)instruction);
29598 case IrInstSrcIdCall:
29599 return ir_analyze_instruction_call(ira, (IrInstSrcCall *)instruction);
29600 case IrInstSrcIdCallArgs:
29601 return ir_analyze_instruction_call_args(ira, (IrInstSrcCallArgs *)instruction);
29602 case IrInstSrcIdCallExtra:
29603 return ir_analyze_instruction_call_extra(ira, (IrInstSrcCallExtra *)instruction);
29604 case IrInstSrcIdBr:
29605 return ir_analyze_instruction_br(ira, (IrInstSrcBr *)instruction);
29606 case IrInstSrcIdCondBr:
29607 return ir_analyze_instruction_cond_br(ira, (IrInstSrcCondBr *)instruction);
29608 case IrInstSrcIdUnreachable:
29609 return ir_analyze_instruction_unreachable(ira, (IrInstSrcUnreachable *)instruction);
29610 case IrInstSrcIdPhi:
29611 return ir_analyze_instruction_phi(ira, (IrInstSrcPhi *)instruction);
29612 case IrInstSrcIdTypeOf:
29613 return ir_analyze_instruction_typeof(ira, (IrInstSrcTypeOf *)instruction);
29614 case IrInstSrcIdSetCold:
29615 return ir_analyze_instruction_set_cold(ira, (IrInstSrcSetCold *)instruction);
29616 case IrInstSrcIdSetRuntimeSafety:
29617 return ir_analyze_instruction_set_runtime_safety(ira, (IrInstSrcSetRuntimeSafety *)instruction);
29618 case IrInstSrcIdSetFloatMode:
29619 return ir_analyze_instruction_set_float_mode(ira, (IrInstSrcSetFloatMode *)instruction);
29620 case IrInstSrcIdAnyFrameType:
29621 return ir_analyze_instruction_any_frame_type(ira, (IrInstSrcAnyFrameType *)instruction);
29622 case IrInstSrcIdSliceType:
29623 return ir_analyze_instruction_slice_type(ira, (IrInstSrcSliceType *)instruction);
29624 case IrInstSrcIdAsm:
29625 return ir_analyze_instruction_asm(ira, (IrInstSrcAsm *)instruction);
29626 case IrInstSrcIdArrayType:
29627 return ir_analyze_instruction_array_type(ira, (IrInstSrcArrayType *)instruction);
29628 case IrInstSrcIdSizeOf:
29629 return ir_analyze_instruction_size_of(ira, (IrInstSrcSizeOf *)instruction);
29630 case IrInstSrcIdTestNonNull:
29631 return ir_analyze_instruction_test_non_null(ira, (IrInstSrcTestNonNull *)instruction);
29632 case IrInstSrcIdOptionalUnwrapPtr:
29633 return ir_analyze_instruction_optional_unwrap_ptr(ira, (IrInstSrcOptionalUnwrapPtr *)instruction);
29634 case IrInstSrcIdClz:
29635 return ir_analyze_instruction_clz(ira, (IrInstSrcClz *)instruction);
29636 case IrInstSrcIdCtz:
29637 return ir_analyze_instruction_ctz(ira, (IrInstSrcCtz *)instruction);
29638 case IrInstSrcIdPopCount:
29639 return ir_analyze_instruction_pop_count(ira, (IrInstSrcPopCount *)instruction);
29640 case IrInstSrcIdBswap:
29641 return ir_analyze_instruction_bswap(ira, (IrInstSrcBswap *)instruction);
29642 case IrInstSrcIdBitReverse:
29643 return ir_analyze_instruction_bit_reverse(ira, (IrInstSrcBitReverse *)instruction);
29644 case IrInstSrcIdSwitchBr:
29645 return ir_analyze_instruction_switch_br(ira, (IrInstSrcSwitchBr *)instruction);
29646 case IrInstSrcIdSwitchTarget:
29647 return ir_analyze_instruction_switch_target(ira, (IrInstSrcSwitchTarget *)instruction);
29648 case IrInstSrcIdSwitchVar:
29649 return ir_analyze_instruction_switch_var(ira, (IrInstSrcSwitchVar *)instruction);
29650 case IrInstSrcIdSwitchElseVar:
29651 return ir_analyze_instruction_switch_else_var(ira, (IrInstSrcSwitchElseVar *)instruction);
29652 case IrInstSrcIdImport:
29653 return ir_analyze_instruction_import(ira, (IrInstSrcImport *)instruction);
29654 case IrInstSrcIdRef:
29655 return ir_analyze_instruction_ref(ira, (IrInstSrcRef *)instruction);
29656 case IrInstSrcIdContainerInitList:
29657 return ir_analyze_instruction_container_init_list(ira, (IrInstSrcContainerInitList *)instruction);
29658 case IrInstSrcIdContainerInitFields:
29659 return ir_analyze_instruction_container_init_fields(ira, (IrInstSrcContainerInitFields *)instruction);
29660 case IrInstSrcIdCompileErr:
29661 return ir_analyze_instruction_compile_err(ira, (IrInstSrcCompileErr *)instruction);
29662 case IrInstSrcIdCompileLog:
29663 return ir_analyze_instruction_compile_log(ira, (IrInstSrcCompileLog *)instruction);
29664 case IrInstSrcIdErrName:
29665 return ir_analyze_instruction_err_name(ira, (IrInstSrcErrName *)instruction);
29666 case IrInstSrcIdTypeName:
29667 return ir_analyze_instruction_type_name(ira, (IrInstSrcTypeName *)instruction);
29668 case IrInstSrcIdCImport:
29669 return ir_analyze_instruction_c_import(ira, (IrInstSrcCImport *)instruction);
29670 case IrInstSrcIdCInclude:
29671 return ir_analyze_instruction_c_include(ira, (IrInstSrcCInclude *)instruction);
29672 case IrInstSrcIdCDefine:
29673 return ir_analyze_instruction_c_define(ira, (IrInstSrcCDefine *)instruction);
29674 case IrInstSrcIdCUndef:
29675 return ir_analyze_instruction_c_undef(ira, (IrInstSrcCUndef *)instruction);
29676 case IrInstSrcIdEmbedFile:
29677 return ir_analyze_instruction_embed_file(ira, (IrInstSrcEmbedFile *)instruction);
29678 case IrInstSrcIdCmpxchg:
29679 return ir_analyze_instruction_cmpxchg(ira, (IrInstSrcCmpxchg *)instruction);
29680 case IrInstSrcIdFence:
29681 return ir_analyze_instruction_fence(ira, (IrInstSrcFence *)instruction);
29682 case IrInstSrcIdTruncate:
29683 return ir_analyze_instruction_truncate(ira, (IrInstSrcTruncate *)instruction);
29684 case IrInstSrcIdIntCast:
29685 return ir_analyze_instruction_int_cast(ira, (IrInstSrcIntCast *)instruction);
29686 case IrInstSrcIdFloatCast:
29687 return ir_analyze_instruction_float_cast(ira, (IrInstSrcFloatCast *)instruction);
29688 case IrInstSrcIdErrSetCast:
29689 return ir_analyze_instruction_err_set_cast(ira, (IrInstSrcErrSetCast *)instruction);
29690 case IrInstSrcIdFromBytes:
29691 return ir_analyze_instruction_from_bytes(ira, (IrInstSrcFromBytes *)instruction);
29692 case IrInstSrcIdToBytes:
29693 return ir_analyze_instruction_to_bytes(ira, (IrInstSrcToBytes *)instruction);
29694 case IrInstSrcIdIntToFloat:
29695 return ir_analyze_instruction_int_to_float(ira, (IrInstSrcIntToFloat *)instruction);
29696 case IrInstSrcIdFloatToInt:
29697 return ir_analyze_instruction_float_to_int(ira, (IrInstSrcFloatToInt *)instruction);
29698 case IrInstSrcIdBoolToInt:
29699 return ir_analyze_instruction_bool_to_int(ira, (IrInstSrcBoolToInt *)instruction);
29700 case IrInstSrcIdIntType:
29701 return ir_analyze_instruction_int_type(ira, (IrInstSrcIntType *)instruction);
29702 case IrInstSrcIdVectorType:
29703 return ir_analyze_instruction_vector_type(ira, (IrInstSrcVectorType *)instruction);
29704 case IrInstSrcIdShuffleVector:
29705 return ir_analyze_instruction_shuffle_vector(ira, (IrInstSrcShuffleVector *)instruction);
29706 case IrInstSrcIdSplat:
29707 return ir_analyze_instruction_splat(ira, (IrInstSrcSplat *)instruction);
29708 case IrInstSrcIdBoolNot:
29709 return ir_analyze_instruction_bool_not(ira, (IrInstSrcBoolNot *)instruction);
29710 case IrInstSrcIdMemset:
29711 return ir_analyze_instruction_memset(ira, (IrInstSrcMemset *)instruction);
29712 case IrInstSrcIdMemcpy:
29713 return ir_analyze_instruction_memcpy(ira, (IrInstSrcMemcpy *)instruction);
29714 case IrInstSrcIdSlice:
29715 return ir_analyze_instruction_slice(ira, (IrInstSrcSlice *)instruction);
29716 case IrInstSrcIdMemberCount:
29717 return ir_analyze_instruction_member_count(ira, (IrInstSrcMemberCount *)instruction);
29718 case IrInstSrcIdMemberType:
29719 return ir_analyze_instruction_member_type(ira, (IrInstSrcMemberType *)instruction);
29720 case IrInstSrcIdMemberName:
29721 return ir_analyze_instruction_member_name(ira, (IrInstSrcMemberName *)instruction);
29722 case IrInstSrcIdBreakpoint:
29723 return ir_analyze_instruction_breakpoint(ira, (IrInstSrcBreakpoint *)instruction);
29724 case IrInstSrcIdReturnAddress:
29725 return ir_analyze_instruction_return_address(ira, (IrInstSrcReturnAddress *)instruction);
29726 case IrInstSrcIdFrameAddress:
29727 return ir_analyze_instruction_frame_address(ira, (IrInstSrcFrameAddress *)instruction);
29728 case IrInstSrcIdFrameHandle:
29729 return ir_analyze_instruction_frame_handle(ira, (IrInstSrcFrameHandle *)instruction);
29730 case IrInstSrcIdFrameType:
29731 return ir_analyze_instruction_frame_type(ira, (IrInstSrcFrameType *)instruction);
29732 case IrInstSrcIdFrameSize:
29733 return ir_analyze_instruction_frame_size(ira, (IrInstSrcFrameSize *)instruction);
29734 case IrInstSrcIdAlignOf:
29735 return ir_analyze_instruction_align_of(ira, (IrInstSrcAlignOf *)instruction);
29736 case IrInstSrcIdOverflowOp:
29737 return ir_analyze_instruction_overflow_op(ira, (IrInstSrcOverflowOp *)instruction);
29738 case IrInstSrcIdTestErr:
29739 return ir_analyze_instruction_test_err(ira, (IrInstSrcTestErr *)instruction);
29740 case IrInstSrcIdUnwrapErrCode:
29741 return ir_analyze_instruction_unwrap_err_code(ira, (IrInstSrcUnwrapErrCode *)instruction);
29742 case IrInstSrcIdUnwrapErrPayload:
29743 return ir_analyze_instruction_unwrap_err_payload(ira, (IrInstSrcUnwrapErrPayload *)instruction);
29744 case IrInstSrcIdFnProto:
29745 return ir_analyze_instruction_fn_proto(ira, (IrInstSrcFnProto *)instruction);
29746 case IrInstSrcIdTestComptime:
29747 return ir_analyze_instruction_test_comptime(ira, (IrInstSrcTestComptime *)instruction);
29748 case IrInstSrcIdCheckSwitchProngs:
29749 return ir_analyze_instruction_check_switch_prongs(ira, (IrInstSrcCheckSwitchProngs *)instruction);
29750 case IrInstSrcIdCheckStatementIsVoid:
29751 return ir_analyze_instruction_check_statement_is_void(ira, (IrInstSrcCheckStatementIsVoid *)instruction);
29752 case IrInstSrcIdDeclRef:
29753 return ir_analyze_instruction_decl_ref(ira, (IrInstSrcDeclRef *)instruction);
29754 case IrInstSrcIdPanic:
29755 return ir_analyze_instruction_panic(ira, (IrInstSrcPanic *)instruction);
29756 case IrInstSrcIdPtrCast:
29757 return ir_analyze_instruction_ptr_cast(ira, (IrInstSrcPtrCast *)instruction);
29758 case IrInstSrcIdIntToPtr:
29759 return ir_analyze_instruction_int_to_ptr(ira, (IrInstSrcIntToPtr *)instruction);
29760 case IrInstSrcIdPtrToInt:
29761 return ir_analyze_instruction_ptr_to_int(ira, (IrInstSrcPtrToInt *)instruction);
29762 case IrInstSrcIdTagName:
29763 return ir_analyze_instruction_enum_tag_name(ira, (IrInstSrcTagName *)instruction);
29764 case IrInstSrcIdFieldParentPtr:
29765 return ir_analyze_instruction_field_parent_ptr(ira, (IrInstSrcFieldParentPtr *)instruction);
29766 case IrInstSrcIdByteOffsetOf:
29767 return ir_analyze_instruction_byte_offset_of(ira, (IrInstSrcByteOffsetOf *)instruction);
29768 case IrInstSrcIdBitOffsetOf:
29769 return ir_analyze_instruction_bit_offset_of(ira, (IrInstSrcBitOffsetOf *)instruction);
29770 case IrInstSrcIdTypeInfo:
29771 return ir_analyze_instruction_type_info(ira, (IrInstSrcTypeInfo *) instruction);
29772 case IrInstSrcIdType:
29773 return ir_analyze_instruction_type(ira, (IrInstSrcType *)instruction);
29774 case IrInstSrcIdHasField:
29775 return ir_analyze_instruction_has_field(ira, (IrInstSrcHasField *) instruction);
29776 case IrInstSrcIdTypeId:
29777 return ir_analyze_instruction_type_id(ira, (IrInstSrcTypeId *)instruction);
29778 case IrInstSrcIdSetEvalBranchQuota:
29779 return ir_analyze_instruction_set_eval_branch_quota(ira, (IrInstSrcSetEvalBranchQuota *)instruction);
29780 case IrInstSrcIdPtrType:
29781 return ir_analyze_instruction_ptr_type(ira, (IrInstSrcPtrType *)instruction);
29782 case IrInstSrcIdAlignCast:
29783 return ir_analyze_instruction_align_cast(ira, (IrInstSrcAlignCast *)instruction);
29784 case IrInstSrcIdImplicitCast:
29785 return ir_analyze_instruction_implicit_cast(ira, (IrInstSrcImplicitCast *)instruction);
29786 case IrInstSrcIdResolveResult:
29787 return ir_analyze_instruction_resolve_result(ira, (IrInstSrcResolveResult *)instruction);
29788 case IrInstSrcIdResetResult:
29789 return ir_analyze_instruction_reset_result(ira, (IrInstSrcResetResult *)instruction);
29790 case IrInstSrcIdOpaqueType:
29791 return ir_analyze_instruction_opaque_type(ira, (IrInstSrcOpaqueType *)instruction);
29792 case IrInstSrcIdSetAlignStack:
29793 return ir_analyze_instruction_set_align_stack(ira, (IrInstSrcSetAlignStack *)instruction);
29794 case IrInstSrcIdArgType:
29795 return ir_analyze_instruction_arg_type(ira, (IrInstSrcArgType *)instruction);
29796 case IrInstSrcIdTagType:
29797 return ir_analyze_instruction_tag_type(ira, (IrInstSrcTagType *)instruction);
29798 case IrInstSrcIdExport:
29799 return ir_analyze_instruction_export(ira, (IrInstSrcExport *)instruction);
29800 case IrInstSrcIdErrorReturnTrace:
29801 return ir_analyze_instruction_error_return_trace(ira, (IrInstSrcErrorReturnTrace *)instruction);
29802 case IrInstSrcIdErrorUnion:
29803 return ir_analyze_instruction_error_union(ira, (IrInstSrcErrorUnion *)instruction);
29804 case IrInstSrcIdAtomicRmw:
29805 return ir_analyze_instruction_atomic_rmw(ira, (IrInstSrcAtomicRmw *)instruction);
29806 case IrInstSrcIdAtomicLoad:
29807 return ir_analyze_instruction_atomic_load(ira, (IrInstSrcAtomicLoad *)instruction);
29808 case IrInstSrcIdAtomicStore:
29809 return ir_analyze_instruction_atomic_store(ira, (IrInstSrcAtomicStore *)instruction);
29810 case IrInstSrcIdSaveErrRetAddr:
29811 return ir_analyze_instruction_save_err_ret_addr(ira, (IrInstSrcSaveErrRetAddr *)instruction);
29812 case IrInstSrcIdAddImplicitReturnType:
29813 return ir_analyze_instruction_add_implicit_return_type(ira, (IrInstSrcAddImplicitReturnType *)instruction);
29814 case IrInstSrcIdFloatOp:
29815 return ir_analyze_instruction_float_op(ira, (IrInstSrcFloatOp *)instruction);
29816 case IrInstSrcIdMulAdd:
29817 return ir_analyze_instruction_mul_add(ira, (IrInstSrcMulAdd *)instruction);
29818 case IrInstSrcIdIntToErr:
29819 return ir_analyze_instruction_int_to_err(ira, (IrInstSrcIntToErr *)instruction);
29820 case IrInstSrcIdErrToInt:
29821 return ir_analyze_instruction_err_to_int(ira, (IrInstSrcErrToInt *)instruction);
29822 case IrInstSrcIdIntToEnum:
29823 return ir_analyze_instruction_int_to_enum(ira, (IrInstSrcIntToEnum *)instruction);
29824 case IrInstSrcIdEnumToInt:
29825 return ir_analyze_instruction_enum_to_int(ira, (IrInstSrcEnumToInt *)instruction);
29826 case IrInstSrcIdCheckRuntimeScope:
29827 return ir_analyze_instruction_check_runtime_scope(ira, (IrInstSrcCheckRuntimeScope *)instruction);
29828 case IrInstSrcIdHasDecl:
29829 return ir_analyze_instruction_has_decl(ira, (IrInstSrcHasDecl *)instruction);
29830 case IrInstSrcIdUndeclaredIdent:
29831 return ir_analyze_instruction_undeclared_ident(ira, (IrInstSrcUndeclaredIdent *)instruction);
29832 case IrInstSrcIdAlloca:
2894029833 return nullptr;
28941 case IrInstructionIdEndExpr:
28942 return ir_analyze_instruction_end_expr(ira, (IrInstructionEndExpr *)instruction);
28943 case IrInstructionIdBitCastSrc:
28944 return ir_analyze_instruction_bit_cast_src(ira, (IrInstructionBitCastSrc *)instruction);
28945 case IrInstructionIdUnionInitNamedField:
28946 return ir_analyze_instruction_union_init_named_field(ira, (IrInstructionUnionInitNamedField *)instruction);
28947 case IrInstructionIdSuspendBegin:
28948 return ir_analyze_instruction_suspend_begin(ira, (IrInstructionSuspendBegin *)instruction);
28949 case IrInstructionIdSuspendFinish:
28950 return ir_analyze_instruction_suspend_finish(ira, (IrInstructionSuspendFinish *)instruction);
28951 case IrInstructionIdResume:
28952 return ir_analyze_instruction_resume(ira, (IrInstructionResume *)instruction);
28953 case IrInstructionIdAwaitSrc:
28954 return ir_analyze_instruction_await(ira, (IrInstructionAwaitSrc *)instruction);
28955 case IrInstructionIdSpillBegin:
28956 return ir_analyze_instruction_spill_begin(ira, (IrInstructionSpillBegin *)instruction);
28957 case IrInstructionIdSpillEnd:
28958 return ir_analyze_instruction_spill_end(ira, (IrInstructionSpillEnd *)instruction);
29834 case IrInstSrcIdEndExpr:
29835 return ir_analyze_instruction_end_expr(ira, (IrInstSrcEndExpr *)instruction);
29836 case IrInstSrcIdBitCast:
29837 return ir_analyze_instruction_bit_cast_src(ira, (IrInstSrcBitCast *)instruction);
29838 case IrInstSrcIdUnionInitNamedField:
29839 return ir_analyze_instruction_union_init_named_field(ira, (IrInstSrcUnionInitNamedField *)instruction);
29840 case IrInstSrcIdSuspendBegin:
29841 return ir_analyze_instruction_suspend_begin(ira, (IrInstSrcSuspendBegin *)instruction);
29842 case IrInstSrcIdSuspendFinish:
29843 return ir_analyze_instruction_suspend_finish(ira, (IrInstSrcSuspendFinish *)instruction);
29844 case IrInstSrcIdResume:
29845 return ir_analyze_instruction_resume(ira, (IrInstSrcResume *)instruction);
29846 case IrInstSrcIdAwait:
29847 return ir_analyze_instruction_await(ira, (IrInstSrcAwait *)instruction);
29848 case IrInstSrcIdSpillBegin:
29849 return ir_analyze_instruction_spill_begin(ira, (IrInstSrcSpillBegin *)instruction);
29850 case IrInstSrcIdSpillEnd:
29851 return ir_analyze_instruction_spill_end(ira, (IrInstSrcSpillEnd *)instruction);
2895929852 }
2896029853 zig_unreachable();
2896129854}
2896229855
2896329856// This function attempts to evaluate IR code while doing type checking and other analysis.
28964// It emits a new IrExecutable which is partially evaluated IR code.
28965ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_exec,
28966 ZigType *expected_type, AstNode *expected_type_source_node)
29857// It emits to a new IrExecutableGen which is partially evaluated IR code.
29858ZigType *ir_analyze(CodeGen *codegen, IrExecutableSrc *old_exec, IrExecutableGen *new_exec,
29859 ZigType *expected_type, AstNode *expected_type_source_node, ZigValue *result_ptr)
2896729860{
2896829861 assert(old_exec->first_err_trace_msg == nullptr);
2896929862 assert(expected_type == nullptr || !type_is_invalid(expected_type));
......@@ -28982,24 +29875,31 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
2898229875 ira->new_irb.codegen = codegen;
2898329876 ira->new_irb.exec = new_exec;
2898429877
28985 ZigValue *vals = create_const_vals(ira->old_irb.exec->mem_slot_count);
28986 ira->exec_context.mem_slot_list.resize(ira->old_irb.exec->mem_slot_count);
28987 for (size_t i = 0; i < ira->exec_context.mem_slot_list.length; i += 1) {
28988 ira->exec_context.mem_slot_list.items[i] = &vals[i];
28989 }
28990
28991 IrBasicBlock *old_entry_bb = ira->old_irb.exec->basic_block_list.at(0);
28992 IrBasicBlock *new_entry_bb = ir_get_new_bb(ira, old_entry_bb, nullptr);
28993 ir_ref_bb(new_entry_bb);
29878 IrBasicBlockSrc *old_entry_bb = ira->old_irb.exec->basic_block_list.at(0);
29879 IrBasicBlockGen *new_entry_bb = ir_get_new_bb(ira, old_entry_bb, nullptr);
29880 ir_ref_bb_gen(new_entry_bb);
2899429881 ira->new_irb.current_basic_block = new_entry_bb;
2899529882 ira->old_bb_index = 0;
2899629883
2899729884 ir_start_bb(ira, old_entry_bb, nullptr);
2899829885
29886 if (result_ptr != nullptr) {
29887 assert(result_ptr->type->id == ZigTypeIdPointer);
29888 IrInstGenConst *const_inst = ir_create_inst_noval<IrInstGenConst>(
29889 &ira->new_irb, new_exec->begin_scope, new_exec->source_node);
29890 const_inst->base.value = result_ptr;
29891 ira->return_ptr = &const_inst->base;
29892 } else {
29893 assert(new_exec->begin_scope != nullptr);
29894 assert(new_exec->source_node != nullptr);
29895 ira->return_ptr = ir_build_return_ptr(ira, new_exec->begin_scope, new_exec->source_node,
29896 get_pointer_to_type(codegen, expected_type, false));
29897 }
29898
2899929899 while (ira->old_bb_index < ira->old_irb.exec->basic_block_list.length) {
29000 IrInstruction *old_instruction = ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index);
29900 IrInstSrc *old_instruction = ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index);
2900129901
29002 if (old_instruction->ref_count == 0 && !ir_has_side_effects(old_instruction)) {
29902 if (old_instruction->base.ref_count == 0 && !ir_inst_src_has_side_effects(old_instruction)) {
2900329903 ira->instruction_index += 1;
2900429904 continue;
2900529905 }
......@@ -29008,14 +29908,14 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
2900829908 fprintf(stderr, "~ ");
2900929909 old_instruction->src();
2901029910 fprintf(stderr, "~ ");
29011 ir_print_instruction(codegen, stderr, old_instruction, 0, IrPassSrc);
29911 ir_print_inst_src(codegen, stderr, old_instruction, 0);
2901229912 bool want_break = false;
29013 if (ira->break_debug_id == old_instruction->debug_id) {
29913 if (ira->break_debug_id == old_instruction->base.debug_id) {
2901429914 want_break = true;
29015 } else if (old_instruction->source_node != nullptr) {
29915 } else if (old_instruction->base.source_node != nullptr) {
2901629916 for (size_t i = 0; i < dbg_ir_breakpoints_count; i += 1) {
29017 if (dbg_ir_breakpoints_buf[i].line == old_instruction->source_node->line + 1 &&
29018 buf_ends_with_str(old_instruction->source_node->owner->data.structure.root_struct->path,
29917 if (dbg_ir_breakpoints_buf[i].line == old_instruction->base.source_node->line + 1 &&
29918 buf_ends_with_str(old_instruction->base.source_node->owner->data.structure.root_struct->path,
2901929919 dbg_ir_breakpoints_buf[i].src_file))
2902029920 {
2902129921 want_break = true;
......@@ -29024,9 +29924,9 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
2902429924 }
2902529925 if (want_break) BREAKPOINT;
2902629926 }
29027 IrInstruction *new_instruction = ir_analyze_instruction_base(ira, old_instruction);
29927 IrInstGen *new_instruction = ir_analyze_instruction_base(ira, old_instruction);
2902829928 if (new_instruction != nullptr) {
29029 ir_assert(new_instruction->value->type != nullptr || new_instruction->value->type != nullptr, old_instruction);
29929 ir_assert(new_instruction->value->type != nullptr || new_instruction->value->type != nullptr, &old_instruction->base);
2903029930 old_instruction->child = new_instruction;
2903129931
2903229932 if (type_is_invalid(new_instruction->value->type)) {
......@@ -29040,19 +29940,19 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
2904029940 new_exec->first_err_trace_msg = ira->codegen->trace_err;
2904129941 }
2904229942 if (new_exec->first_err_trace_msg != nullptr &&
29043 !old_instruction->source_node->already_traced_this_node)
29943 !old_instruction->base.source_node->already_traced_this_node)
2904429944 {
29045 old_instruction->source_node->already_traced_this_node = true;
29945 old_instruction->base.source_node->already_traced_this_node = true;
2904629946 new_exec->first_err_trace_msg = add_error_note(ira->codegen, new_exec->first_err_trace_msg,
29047 old_instruction->source_node, buf_create_from_str("referenced here"));
29947 old_instruction->base.source_node, buf_create_from_str("referenced here"));
2904829948 }
2904929949 return ira->codegen->builtin_types.entry_invalid;
2905029950 } else if (ira->codegen->verbose_ir) {
2905129951 fprintf(stderr, "-> ");
29052 if (instr_is_unreachable(new_instruction)) {
29952 if (new_instruction->value->type->id == ZigTypeIdUnreachable) {
2905329953 fprintf(stderr, "(noreturn)\n");
2905429954 } else {
29055 ir_print_instruction(codegen, stderr, new_instruction, 0, IrPassGen);
29955 ir_print_inst_gen(codegen, stderr, new_instruction, 0);
2905629956 }
2905729957 }
2905829958
......@@ -29092,204 +29992,280 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
2909229992 return res_type;
2909329993}
2909429994
29095bool ir_has_side_effects(IrInstruction *instruction) {
29995bool ir_inst_gen_has_side_effects(IrInstGen *instruction) {
2909629996 switch (instruction->id) {
29097 case IrInstructionIdInvalid:
29997 case IrInstGenIdInvalid:
2909829998 zig_unreachable();
29099 case IrInstructionIdBr:
29100 case IrInstructionIdCondBr:
29101 case IrInstructionIdSwitchBr:
29102 case IrInstructionIdDeclVarSrc:
29103 case IrInstructionIdDeclVarGen:
29104 case IrInstructionIdStorePtr:
29105 case IrInstructionIdVectorStoreElem:
29106 case IrInstructionIdCallExtra:
29107 case IrInstructionIdCallSrc:
29108 case IrInstructionIdCallSrcArgs:
29109 case IrInstructionIdCallGen:
29110 case IrInstructionIdReturn:
29111 case IrInstructionIdUnreachable:
29112 case IrInstructionIdSetCold:
29113 case IrInstructionIdSetRuntimeSafety:
29114 case IrInstructionIdSetFloatMode:
29115 case IrInstructionIdImport:
29116 case IrInstructionIdCompileErr:
29117 case IrInstructionIdCompileLog:
29118 case IrInstructionIdCImport:
29119 case IrInstructionIdCInclude:
29120 case IrInstructionIdCDefine:
29121 case IrInstructionIdCUndef:
29122 case IrInstructionIdFence:
29123 case IrInstructionIdMemset:
29124 case IrInstructionIdMemcpy:
29125 case IrInstructionIdBreakpoint:
29126 case IrInstructionIdOverflowOp: // TODO when we support multiple returns this can be side effect free
29127 case IrInstructionIdCheckSwitchProngs:
29128 case IrInstructionIdCheckStatementIsVoid:
29129 case IrInstructionIdCheckRuntimeScope:
29130 case IrInstructionIdPanic:
29131 case IrInstructionIdSetEvalBranchQuota:
29132 case IrInstructionIdPtrType:
29133 case IrInstructionIdSetAlignStack:
29134 case IrInstructionIdExport:
29135 case IrInstructionIdSaveErrRetAddr:
29136 case IrInstructionIdAddImplicitReturnType:
29137 case IrInstructionIdAtomicRmw:
29138 case IrInstructionIdAtomicStore:
29139 case IrInstructionIdCmpxchgGen:
29140 case IrInstructionIdCmpxchgSrc:
29141 case IrInstructionIdAssertZero:
29142 case IrInstructionIdAssertNonNull:
29143 case IrInstructionIdResizeSlice:
29144 case IrInstructionIdUndeclaredIdent:
29145 case IrInstructionIdEndExpr:
29146 case IrInstructionIdPtrOfArrayToSlice:
29147 case IrInstructionIdSliceGen:
29148 case IrInstructionIdOptionalWrap:
29149 case IrInstructionIdVectorToArray:
29150 case IrInstructionIdResetResult:
29151 case IrInstructionIdSuspendBegin:
29152 case IrInstructionIdSuspendFinish:
29153 case IrInstructionIdResume:
29154 case IrInstructionIdAwaitSrc:
29155 case IrInstructionIdAwaitGen:
29156 case IrInstructionIdSpillBegin:
29999 case IrInstGenIdBr:
30000 case IrInstGenIdCondBr:
30001 case IrInstGenIdSwitchBr:
30002 case IrInstGenIdDeclVar:
30003 case IrInstGenIdStorePtr:
30004 case IrInstGenIdVectorStoreElem:
30005 case IrInstGenIdCall:
30006 case IrInstGenIdReturn:
30007 case IrInstGenIdUnreachable:
30008 case IrInstGenIdFence:
30009 case IrInstGenIdMemset:
30010 case IrInstGenIdMemcpy:
30011 case IrInstGenIdBreakpoint:
30012 case IrInstGenIdOverflowOp: // TODO when we support multiple returns this can be side effect free
30013 case IrInstGenIdPanic:
30014 case IrInstGenIdSaveErrRetAddr:
30015 case IrInstGenIdAtomicRmw:
30016 case IrInstGenIdAtomicStore:
30017 case IrInstGenIdCmpxchg:
30018 case IrInstGenIdAssertZero:
30019 case IrInstGenIdAssertNonNull:
30020 case IrInstGenIdResizeSlice:
30021 case IrInstGenIdPtrOfArrayToSlice:
30022 case IrInstGenIdSlice:
30023 case IrInstGenIdOptionalWrap:
30024 case IrInstGenIdVectorToArray:
30025 case IrInstGenIdSuspendBegin:
30026 case IrInstGenIdSuspendFinish:
30027 case IrInstGenIdResume:
30028 case IrInstGenIdAwait:
30029 case IrInstGenIdSpillBegin:
2915730030 return true;
2915830031
29159 case IrInstructionIdPhi:
29160 case IrInstructionIdUnOp:
29161 case IrInstructionIdBinOp:
29162 case IrInstructionIdMergeErrSets:
29163 case IrInstructionIdLoadPtr:
29164 case IrInstructionIdConst:
29165 case IrInstructionIdCast:
29166 case IrInstructionIdContainerInitList:
29167 case IrInstructionIdContainerInitFields:
29168 case IrInstructionIdUnionInitNamedField:
29169 case IrInstructionIdFieldPtr:
29170 case IrInstructionIdElemPtr:
29171 case IrInstructionIdVarPtr:
29172 case IrInstructionIdReturnPtr:
29173 case IrInstructionIdTypeOf:
29174 case IrInstructionIdStructFieldPtr:
29175 case IrInstructionIdArrayType:
29176 case IrInstructionIdSliceType:
29177 case IrInstructionIdAnyFrameType:
29178 case IrInstructionIdSizeOf:
29179 case IrInstructionIdTestNonNull:
29180 case IrInstructionIdOptionalUnwrapPtr:
29181 case IrInstructionIdClz:
29182 case IrInstructionIdCtz:
29183 case IrInstructionIdPopCount:
29184 case IrInstructionIdBswap:
29185 case IrInstructionIdBitReverse:
29186 case IrInstructionIdSwitchVar:
29187 case IrInstructionIdSwitchElseVar:
29188 case IrInstructionIdSwitchTarget:
29189 case IrInstructionIdUnionTag:
29190 case IrInstructionIdRef:
29191 case IrInstructionIdEmbedFile:
29192 case IrInstructionIdTruncate:
29193 case IrInstructionIdIntType:
29194 case IrInstructionIdVectorType:
29195 case IrInstructionIdShuffleVector:
29196 case IrInstructionIdSplatSrc:
29197 case IrInstructionIdSplatGen:
29198 case IrInstructionIdBoolNot:
29199 case IrInstructionIdSliceSrc:
29200 case IrInstructionIdMemberCount:
29201 case IrInstructionIdMemberType:
29202 case IrInstructionIdMemberName:
29203 case IrInstructionIdAlignOf:
29204 case IrInstructionIdReturnAddress:
29205 case IrInstructionIdFrameAddress:
29206 case IrInstructionIdFrameHandle:
29207 case IrInstructionIdFrameType:
29208 case IrInstructionIdFrameSizeSrc:
29209 case IrInstructionIdFrameSizeGen:
29210 case IrInstructionIdTestErrSrc:
29211 case IrInstructionIdTestErrGen:
29212 case IrInstructionIdFnProto:
29213 case IrInstructionIdTestComptime:
29214 case IrInstructionIdPtrCastSrc:
29215 case IrInstructionIdPtrCastGen:
29216 case IrInstructionIdBitCastSrc:
29217 case IrInstructionIdBitCastGen:
29218 case IrInstructionIdWidenOrShorten:
29219 case IrInstructionIdPtrToInt:
29220 case IrInstructionIdIntToPtr:
29221 case IrInstructionIdIntToEnum:
29222 case IrInstructionIdIntToErr:
29223 case IrInstructionIdErrToInt:
29224 case IrInstructionIdDeclRef:
29225 case IrInstructionIdErrName:
29226 case IrInstructionIdTypeName:
29227 case IrInstructionIdTagName:
29228 case IrInstructionIdFieldParentPtr:
29229 case IrInstructionIdByteOffsetOf:
29230 case IrInstructionIdBitOffsetOf:
29231 case IrInstructionIdTypeInfo:
29232 case IrInstructionIdType:
29233 case IrInstructionIdHasField:
29234 case IrInstructionIdTypeId:
29235 case IrInstructionIdAlignCast:
29236 case IrInstructionIdImplicitCast:
29237 case IrInstructionIdResolveResult:
29238 case IrInstructionIdOpaqueType:
29239 case IrInstructionIdArgType:
29240 case IrInstructionIdTagType:
29241 case IrInstructionIdErrorReturnTrace:
29242 case IrInstructionIdErrorUnion:
29243 case IrInstructionIdFloatOp:
29244 case IrInstructionIdMulAdd:
29245 case IrInstructionIdAtomicLoad:
29246 case IrInstructionIdIntCast:
29247 case IrInstructionIdFloatCast:
29248 case IrInstructionIdErrSetCast:
29249 case IrInstructionIdIntToFloat:
29250 case IrInstructionIdFloatToInt:
29251 case IrInstructionIdBoolToInt:
29252 case IrInstructionIdFromBytes:
29253 case IrInstructionIdToBytes:
29254 case IrInstructionIdEnumToInt:
29255 case IrInstructionIdArrayToVector:
29256 case IrInstructionIdHasDecl:
29257 case IrInstructionIdAllocaSrc:
29258 case IrInstructionIdAllocaGen:
29259 case IrInstructionIdSpillEnd:
29260 case IrInstructionIdVectorExtractElem:
30032 case IrInstGenIdPhi:
30033 case IrInstGenIdBinOp:
30034 case IrInstGenIdConst:
30035 case IrInstGenIdCast:
30036 case IrInstGenIdElemPtr:
30037 case IrInstGenIdVarPtr:
30038 case IrInstGenIdReturnPtr:
30039 case IrInstGenIdStructFieldPtr:
30040 case IrInstGenIdTestNonNull:
30041 case IrInstGenIdClz:
30042 case IrInstGenIdCtz:
30043 case IrInstGenIdPopCount:
30044 case IrInstGenIdBswap:
30045 case IrInstGenIdBitReverse:
30046 case IrInstGenIdUnionTag:
30047 case IrInstGenIdTruncate:
30048 case IrInstGenIdShuffleVector:
30049 case IrInstGenIdSplat:
30050 case IrInstGenIdBoolNot:
30051 case IrInstGenIdReturnAddress:
30052 case IrInstGenIdFrameAddress:
30053 case IrInstGenIdFrameHandle:
30054 case IrInstGenIdFrameSize:
30055 case IrInstGenIdTestErr:
30056 case IrInstGenIdPtrCast:
30057 case IrInstGenIdBitCast:
30058 case IrInstGenIdWidenOrShorten:
30059 case IrInstGenIdPtrToInt:
30060 case IrInstGenIdIntToPtr:
30061 case IrInstGenIdIntToEnum:
30062 case IrInstGenIdIntToErr:
30063 case IrInstGenIdErrToInt:
30064 case IrInstGenIdErrName:
30065 case IrInstGenIdTagName:
30066 case IrInstGenIdFieldParentPtr:
30067 case IrInstGenIdAlignCast:
30068 case IrInstGenIdErrorReturnTrace:
30069 case IrInstGenIdFloatOp:
30070 case IrInstGenIdMulAdd:
30071 case IrInstGenIdAtomicLoad:
30072 case IrInstGenIdArrayToVector:
30073 case IrInstGenIdAlloca:
30074 case IrInstGenIdSpillEnd:
30075 case IrInstGenIdVectorExtractElem:
30076 case IrInstGenIdBinaryNot:
30077 case IrInstGenIdNegation:
30078 case IrInstGenIdNegationWrapping:
2926130079 return false;
2926230080
29263 case IrInstructionIdAsmSrc:
30081 case IrInstGenIdAsm:
2926430082 {
29265 IrInstructionAsmSrc *asm_instruction = (IrInstructionAsmSrc *)instruction;
30083 IrInstGenAsm *asm_instruction = (IrInstGenAsm *)instruction;
2926630084 return asm_instruction->has_side_effects;
2926730085 }
30086 case IrInstGenIdUnwrapErrPayload:
30087 {
30088 IrInstGenUnwrapErrPayload *unwrap_err_payload_instruction =
30089 (IrInstGenUnwrapErrPayload *)instruction;
30090 return unwrap_err_payload_instruction->safety_check_on ||
30091 unwrap_err_payload_instruction->initializing;
30092 }
30093 case IrInstGenIdUnwrapErrCode:
30094 return reinterpret_cast<IrInstGenUnwrapErrCode *>(instruction)->initializing;
30095 case IrInstGenIdUnionFieldPtr:
30096 return reinterpret_cast<IrInstGenUnionFieldPtr *>(instruction)->initializing;
30097 case IrInstGenIdOptionalUnwrapPtr:
30098 return reinterpret_cast<IrInstGenOptionalUnwrapPtr *>(instruction)->initializing;
30099 case IrInstGenIdErrWrapPayload:
30100 return reinterpret_cast<IrInstGenErrWrapPayload *>(instruction)->result_loc != nullptr;
30101 case IrInstGenIdErrWrapCode:
30102 return reinterpret_cast<IrInstGenErrWrapCode *>(instruction)->result_loc != nullptr;
30103 case IrInstGenIdLoadPtr:
30104 return reinterpret_cast<IrInstGenLoadPtr *>(instruction)->result_loc != nullptr;
30105 case IrInstGenIdRef:
30106 return reinterpret_cast<IrInstGenRef *>(instruction)->result_loc != nullptr;
30107 }
30108 zig_unreachable();
30109}
30110
30111bool ir_inst_src_has_side_effects(IrInstSrc *instruction) {
30112 switch (instruction->id) {
30113 case IrInstSrcIdInvalid:
30114 zig_unreachable();
30115 case IrInstSrcIdBr:
30116 case IrInstSrcIdCondBr:
30117 case IrInstSrcIdSwitchBr:
30118 case IrInstSrcIdDeclVar:
30119 case IrInstSrcIdStorePtr:
30120 case IrInstSrcIdCallExtra:
30121 case IrInstSrcIdCall:
30122 case IrInstSrcIdCallArgs:
30123 case IrInstSrcIdReturn:
30124 case IrInstSrcIdUnreachable:
30125 case IrInstSrcIdSetCold:
30126 case IrInstSrcIdSetRuntimeSafety:
30127 case IrInstSrcIdSetFloatMode:
30128 case IrInstSrcIdImport:
30129 case IrInstSrcIdCompileErr:
30130 case IrInstSrcIdCompileLog:
30131 case IrInstSrcIdCImport:
30132 case IrInstSrcIdCInclude:
30133 case IrInstSrcIdCDefine:
30134 case IrInstSrcIdCUndef:
30135 case IrInstSrcIdFence:
30136 case IrInstSrcIdMemset:
30137 case IrInstSrcIdMemcpy:
30138 case IrInstSrcIdBreakpoint:
30139 case IrInstSrcIdOverflowOp: // TODO when we support multiple returns this can be side effect free
30140 case IrInstSrcIdCheckSwitchProngs:
30141 case IrInstSrcIdCheckStatementIsVoid:
30142 case IrInstSrcIdCheckRuntimeScope:
30143 case IrInstSrcIdPanic:
30144 case IrInstSrcIdSetEvalBranchQuota:
30145 case IrInstSrcIdPtrType:
30146 case IrInstSrcIdSetAlignStack:
30147 case IrInstSrcIdExport:
30148 case IrInstSrcIdSaveErrRetAddr:
30149 case IrInstSrcIdAddImplicitReturnType:
30150 case IrInstSrcIdAtomicRmw:
30151 case IrInstSrcIdAtomicStore:
30152 case IrInstSrcIdCmpxchg:
30153 case IrInstSrcIdUndeclaredIdent:
30154 case IrInstSrcIdEndExpr:
30155 case IrInstSrcIdResetResult:
30156 case IrInstSrcIdSuspendBegin:
30157 case IrInstSrcIdSuspendFinish:
30158 case IrInstSrcIdResume:
30159 case IrInstSrcIdAwait:
30160 case IrInstSrcIdSpillBegin:
30161 return true;
30162
30163 case IrInstSrcIdPhi:
30164 case IrInstSrcIdUnOp:
30165 case IrInstSrcIdBinOp:
30166 case IrInstSrcIdMergeErrSets:
30167 case IrInstSrcIdLoadPtr:
30168 case IrInstSrcIdConst:
30169 case IrInstSrcIdContainerInitList:
30170 case IrInstSrcIdContainerInitFields:
30171 case IrInstSrcIdUnionInitNamedField:
30172 case IrInstSrcIdFieldPtr:
30173 case IrInstSrcIdElemPtr:
30174 case IrInstSrcIdVarPtr:
30175 case IrInstSrcIdTypeOf:
30176 case IrInstSrcIdArrayType:
30177 case IrInstSrcIdSliceType:
30178 case IrInstSrcIdAnyFrameType:
30179 case IrInstSrcIdSizeOf:
30180 case IrInstSrcIdTestNonNull:
30181 case IrInstSrcIdOptionalUnwrapPtr:
30182 case IrInstSrcIdClz:
30183 case IrInstSrcIdCtz:
30184 case IrInstSrcIdPopCount:
30185 case IrInstSrcIdBswap:
30186 case IrInstSrcIdBitReverse:
30187 case IrInstSrcIdSwitchVar:
30188 case IrInstSrcIdSwitchElseVar:
30189 case IrInstSrcIdSwitchTarget:
30190 case IrInstSrcIdRef:
30191 case IrInstSrcIdEmbedFile:
30192 case IrInstSrcIdTruncate:
30193 case IrInstSrcIdIntType:
30194 case IrInstSrcIdVectorType:
30195 case IrInstSrcIdShuffleVector:
30196 case IrInstSrcIdSplat:
30197 case IrInstSrcIdBoolNot:
30198 case IrInstSrcIdSlice:
30199 case IrInstSrcIdMemberCount:
30200 case IrInstSrcIdMemberType:
30201 case IrInstSrcIdMemberName:
30202 case IrInstSrcIdAlignOf:
30203 case IrInstSrcIdReturnAddress:
30204 case IrInstSrcIdFrameAddress:
30205 case IrInstSrcIdFrameHandle:
30206 case IrInstSrcIdFrameType:
30207 case IrInstSrcIdFrameSize:
30208 case IrInstSrcIdTestErr:
30209 case IrInstSrcIdFnProto:
30210 case IrInstSrcIdTestComptime:
30211 case IrInstSrcIdPtrCast:
30212 case IrInstSrcIdBitCast:
30213 case IrInstSrcIdPtrToInt:
30214 case IrInstSrcIdIntToPtr:
30215 case IrInstSrcIdIntToEnum:
30216 case IrInstSrcIdIntToErr:
30217 case IrInstSrcIdErrToInt:
30218 case IrInstSrcIdDeclRef:
30219 case IrInstSrcIdErrName:
30220 case IrInstSrcIdTypeName:
30221 case IrInstSrcIdTagName:
30222 case IrInstSrcIdFieldParentPtr:
30223 case IrInstSrcIdByteOffsetOf:
30224 case IrInstSrcIdBitOffsetOf:
30225 case IrInstSrcIdTypeInfo:
30226 case IrInstSrcIdType:
30227 case IrInstSrcIdHasField:
30228 case IrInstSrcIdTypeId:
30229 case IrInstSrcIdAlignCast:
30230 case IrInstSrcIdImplicitCast:
30231 case IrInstSrcIdResolveResult:
30232 case IrInstSrcIdOpaqueType:
30233 case IrInstSrcIdArgType:
30234 case IrInstSrcIdTagType:
30235 case IrInstSrcIdErrorReturnTrace:
30236 case IrInstSrcIdErrorUnion:
30237 case IrInstSrcIdFloatOp:
30238 case IrInstSrcIdMulAdd:
30239 case IrInstSrcIdAtomicLoad:
30240 case IrInstSrcIdIntCast:
30241 case IrInstSrcIdFloatCast:
30242 case IrInstSrcIdErrSetCast:
30243 case IrInstSrcIdIntToFloat:
30244 case IrInstSrcIdFloatToInt:
30245 case IrInstSrcIdBoolToInt:
30246 case IrInstSrcIdFromBytes:
30247 case IrInstSrcIdToBytes:
30248 case IrInstSrcIdEnumToInt:
30249 case IrInstSrcIdHasDecl:
30250 case IrInstSrcIdAlloca:
30251 case IrInstSrcIdSpillEnd:
30252 return false;
2926830253
29269 case IrInstructionIdAsmGen:
30254 case IrInstSrcIdAsm:
2927030255 {
29271 IrInstructionAsmGen *asm_instruction = (IrInstructionAsmGen *)instruction;
30256 IrInstSrcAsm *asm_instruction = (IrInstSrcAsm *)instruction;
2927230257 return asm_instruction->has_side_effects;
2927330258 }
29274 case IrInstructionIdUnwrapErrPayload:
30259
30260 case IrInstSrcIdUnwrapErrPayload:
2927530261 {
29276 IrInstructionUnwrapErrPayload *unwrap_err_payload_instruction =
29277 (IrInstructionUnwrapErrPayload *)instruction;
30262 IrInstSrcUnwrapErrPayload *unwrap_err_payload_instruction =
30263 (IrInstSrcUnwrapErrPayload *)instruction;
2927830264 return unwrap_err_payload_instruction->safety_check_on ||
2927930265 unwrap_err_payload_instruction->initializing;
2928030266 }
29281 case IrInstructionIdUnwrapErrCode:
29282 return reinterpret_cast<IrInstructionUnwrapErrCode *>(instruction)->initializing;
29283 case IrInstructionIdUnionFieldPtr:
29284 return reinterpret_cast<IrInstructionUnionFieldPtr *>(instruction)->initializing;
29285 case IrInstructionIdErrWrapPayload:
29286 return reinterpret_cast<IrInstructionErrWrapPayload *>(instruction)->result_loc != nullptr;
29287 case IrInstructionIdErrWrapCode:
29288 return reinterpret_cast<IrInstructionErrWrapCode *>(instruction)->result_loc != nullptr;
29289 case IrInstructionIdLoadPtrGen:
29290 return reinterpret_cast<IrInstructionLoadPtrGen *>(instruction)->result_loc != nullptr;
29291 case IrInstructionIdRefGen:
29292 return reinterpret_cast<IrInstructionRefGen *>(instruction)->result_loc != nullptr;
30267 case IrInstSrcIdUnwrapErrCode:
30268 return reinterpret_cast<IrInstSrcUnwrapErrCode *>(instruction)->initializing;
2929330269 }
2929430270 zig_unreachable();
2929530271}
......@@ -29323,14 +30299,14 @@ static ZigType *ir_resolve_lazy_fn_type(IrAnalyze *ira, AstNode *source_node, La
2932330299 param_info->type = nullptr;
2932430300 return get_generic_fn_type(ira->codegen, &fn_type_id);
2932530301 } else {
29326 IrInstruction *param_type_inst = lazy_fn_type->param_types[fn_type_id.next_param_index];
30302 IrInstGen *param_type_inst = lazy_fn_type->param_types[fn_type_id.next_param_index];
2932730303 ZigType *param_type = ir_resolve_type(ira, param_type_inst);
2932830304 if (type_is_invalid(param_type))
2932930305 return nullptr;
2933030306 switch (type_requires_comptime(ira->codegen, param_type)) {
2933130307 case ReqCompTimeYes:
2933230308 if (!calling_convention_allows_zig_types(fn_type_id.cc)) {
29333 ir_add_error(ira, param_type_inst,
30309 ir_add_error(ira, &param_type_inst->base,
2933430310 buf_sprintf("parameter of type '%s' not allowed in function with calling convention '%s'",
2933530311 buf_ptr(&param_type->name), calling_convention_name(fn_type_id.cc)));
2933630312 return nullptr;
......@@ -29348,7 +30324,7 @@ static ZigType *ir_resolve_lazy_fn_type(IrAnalyze *ira, AstNode *source_node, La
2934830324 if ((err = type_has_bits2(ira->codegen, param_type, &has_bits)))
2934930325 return nullptr;
2935030326 if (!has_bits) {
29351 ir_add_error(ira, param_type_inst,
30327 ir_add_error(ira, &param_type_inst->base,
2935230328 buf_sprintf("parameter of type '%s' has 0 bits; not allowed in function with calling convention '%s'",
2935330329 buf_ptr(&param_type->name), calling_convention_name(fn_type_id.cc)));
2935430330 return nullptr;
......@@ -29367,7 +30343,7 @@ static ZigType *ir_resolve_lazy_fn_type(IrAnalyze *ira, AstNode *source_node, La
2936730343 if (type_is_invalid(fn_type_id.return_type))
2936830344 return nullptr;
2936930345 if (fn_type_id.return_type->id == ZigTypeIdOpaque) {
29370 ir_add_error(ira, lazy_fn_type->return_type, buf_create_from_str("return type cannot be opaque"));
30346 ir_add_error(ira, &lazy_fn_type->return_type->base, buf_create_from_str("return type cannot be opaque"));
2937130347 return nullptr;
2937230348 }
2937330349
......@@ -29399,7 +30375,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
2939930375 case ZigTypeIdBoundFn:
2940030376 case ZigTypeIdVoid:
2940130377 case ZigTypeIdOpaque:
29402 ir_add_error(ira, lazy_align_of->target_type,
30378 ir_add_error(ira, &lazy_align_of->target_type->base,
2940330379 buf_sprintf("no align available for type '%s'",
2940430380 buf_ptr(&lazy_align_of->target_type->value->data.x_type->name)));
2940530381 return ErrorSemanticAnalyzeFail;
......@@ -29449,7 +30425,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
2944930425 case ZigTypeIdNull:
2945030426 case ZigTypeIdBoundFn:
2945130427 case ZigTypeIdOpaque:
29452 ir_add_error(ira, lazy_size_of->target_type,
30428 ir_add_error(ira, &lazy_size_of->target_type->base,
2945330429 buf_sprintf("no size available for type '%s'",
2945430430 buf_ptr(&lazy_size_of->target_type->value->data.x_type->name)));
2945530431 return ErrorSemanticAnalyzeFail;
......@@ -29507,7 +30483,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
2950730483 if (lazy_slice_type->sentinel != nullptr) {
2950830484 if (type_is_invalid(lazy_slice_type->sentinel->value->type))
2950930485 return ErrorSemanticAnalyzeFail;
29510 IrInstruction *sentinel = ir_implicit_cast(ira, lazy_slice_type->sentinel, elem_type);
30486 IrInstGen *sentinel = ir_implicit_cast(ira, lazy_slice_type->sentinel, elem_type);
2951130487 if (type_is_invalid(sentinel->value->type))
2951230488 return ErrorSemanticAnalyzeFail;
2951330489 sentinel_val = ir_resolve_const(ira, sentinel, UndefBad);
......@@ -29530,7 +30506,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
2953030506 case ZigTypeIdUndefined:
2953130507 case ZigTypeIdNull:
2953230508 case ZigTypeIdOpaque:
29533 ir_add_error(ira, lazy_slice_type->elem_type,
30509 ir_add_error(ira, &lazy_slice_type->elem_type->base,
2953430510 buf_sprintf("slice of type '%s' not allowed", buf_ptr(&elem_type->name)));
2953530511 return ErrorSemanticAnalyzeFail;
2953630512 case ZigTypeIdMetaType:
......@@ -29586,7 +30562,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
2958630562 if (lazy_ptr_type->sentinel != nullptr) {
2958730563 if (type_is_invalid(lazy_ptr_type->sentinel->value->type))
2958830564 return ErrorSemanticAnalyzeFail;
29589 IrInstruction *sentinel = ir_implicit_cast(ira, lazy_ptr_type->sentinel, elem_type);
30565 IrInstGen *sentinel = ir_implicit_cast(ira, lazy_ptr_type->sentinel, elem_type);
2959030566 if (type_is_invalid(sentinel->value->type))
2959130567 return ErrorSemanticAnalyzeFail;
2959230568 sentinel_val = ir_resolve_const(ira, sentinel, UndefBad);
......@@ -29603,11 +30579,11 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
2960330579 }
2960430580
2960530581 if (elem_type->id == ZigTypeIdUnreachable) {
29606 ir_add_error(ira, lazy_ptr_type->elem_type,
30582 ir_add_error(ira, &lazy_ptr_type->elem_type->base,
2960730583 buf_create_from_str("pointer to noreturn not allowed"));
2960830584 return ErrorSemanticAnalyzeFail;
2960930585 } else if (elem_type->id == ZigTypeIdOpaque && lazy_ptr_type->ptr_len == PtrLenUnknown) {
29610 ir_add_error(ira, lazy_ptr_type->elem_type,
30586 ir_add_error(ira, &lazy_ptr_type->elem_type->base,
2961130587 buf_create_from_str("unknown-length pointer to opaque"));
2961230588 return ErrorSemanticAnalyzeFail;
2961330589 } else if (lazy_ptr_type->ptr_len == PtrLenC) {
......@@ -29615,16 +30591,16 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
2961530591 if ((err = type_allowed_in_extern(ira->codegen, elem_type, &ok_type)))
2961630592 return err;
2961730593 if (!ok_type) {
29618 ir_add_error(ira, lazy_ptr_type->elem_type,
30594 ir_add_error(ira, &lazy_ptr_type->elem_type->base,
2961930595 buf_sprintf("C pointers cannot point to non-C-ABI-compatible type '%s'",
2962030596 buf_ptr(&elem_type->name)));
2962130597 return ErrorSemanticAnalyzeFail;
2962230598 } else if (elem_type->id == ZigTypeIdOpaque) {
29623 ir_add_error(ira, lazy_ptr_type->elem_type,
30599 ir_add_error(ira, &lazy_ptr_type->elem_type->base,
2962430600 buf_sprintf("C pointers cannot point opaque types"));
2962530601 return ErrorSemanticAnalyzeFail;
2962630602 } else if (lazy_ptr_type->is_allowzero) {
29627 ir_add_error(ira, lazy_ptr_type->elem_type,
30603 ir_add_error(ira, &lazy_ptr_type->elem_type->base,
2962830604 buf_sprintf("C pointers always allow address zero"));
2962930605 return ErrorSemanticAnalyzeFail;
2963030606 }
......@@ -29662,7 +30638,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
2966230638 case ZigTypeIdUndefined:
2966330639 case ZigTypeIdNull:
2966430640 case ZigTypeIdOpaque:
29665 ir_add_error(ira, lazy_array_type->elem_type,
30641 ir_add_error(ira, &lazy_array_type->elem_type->base,
2966630642 buf_sprintf("array of type '%s' not allowed",
2966730643 buf_ptr(&elem_type->name)));
2966830644 return ErrorSemanticAnalyzeFail;
......@@ -29697,7 +30673,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
2969730673 if (lazy_array_type->sentinel != nullptr) {
2969830674 if (type_is_invalid(lazy_array_type->sentinel->value->type))
2969930675 return ErrorSemanticAnalyzeFail;
29700 IrInstruction *sentinel = ir_implicit_cast(ira, lazy_array_type->sentinel, elem_type);
30676 IrInstGen *sentinel = ir_implicit_cast(ira, lazy_array_type->sentinel, elem_type);
2970130677 if (type_is_invalid(sentinel->value->type))
2970230678 return ErrorSemanticAnalyzeFail;
2970330679 sentinel_val = ir_resolve_const(ira, sentinel, UndefBad);
......@@ -29721,7 +30697,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
2972130697 return ErrorSemanticAnalyzeFail;
2972230698
2972330699 if (payload_type->id == ZigTypeIdOpaque || payload_type->id == ZigTypeIdUnreachable) {
29724 ir_add_error(ira, lazy_opt_type->payload_type,
30700 ir_add_error(ira, &lazy_opt_type->payload_type->base,
2972530701 buf_sprintf("type '%s' cannot be optional", buf_ptr(&payload_type->name)));
2972630702 return ErrorSemanticAnalyzeFail;
2972730703 }
......@@ -29763,7 +30739,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
2976330739 return ErrorSemanticAnalyzeFail;
2976430740
2976530741 if (err_set_type->id != ZigTypeIdErrorSet) {
29766 ir_add_error(ira, lazy_err_union_type->err_set_type,
30742 ir_add_error(ira, &lazy_err_union_type->err_set_type->base,
2976730743 buf_sprintf("expected error set type, found type '%s'",
2976830744 buf_ptr(&err_set_type->name)));
2976930745 return ErrorSemanticAnalyzeFail;
......@@ -29799,8 +30775,8 @@ Error ir_resolve_lazy(CodeGen *codegen, AstNode *source_node, ZigValue *val) {
2979930775 return ErrorNone;
2980030776}
2980130777
29802void IrInstruction::src() {
29803 IrInstruction *inst = this;
30778void IrInst::src() {
30779 IrInst *inst = this;
2980430780 if (inst->source_node != nullptr) {
2980530781 inst->source_node->src();
2980630782 } else {
......@@ -29808,26 +30784,45 @@ void IrInstruction::src() {
2980830784 }
2980930785}
2981030786
29811void IrInstruction::dump() {
29812 IrInstruction *inst = this;
30787void IrInst::dump() {
30788 this->src();
30789 fprintf(stderr, "IrInst(#%" PRIu32 ")\n", this->debug_id);
30790}
30791
30792void IrInstSrc::src() {
30793 this->base.src();
30794}
30795
30796void IrInstGen::src() {
30797 this->base.src();
30798}
30799
30800void IrInstSrc::dump() {
30801 IrInstSrc *inst = this;
2981330802 inst->src();
29814 IrPass pass = (inst->child == nullptr) ? IrPassGen : IrPassSrc;
29815 if (inst->scope == nullptr) {
30803 if (inst->base.scope == nullptr) {
2981630804 fprintf(stderr, "(null scope)\n");
2981730805 } else {
29818 ir_print_instruction(inst->scope->codegen, stderr, inst, 0, pass);
29819 if (pass == IrPassSrc) {
29820 fprintf(stderr, "-> ");
29821 ir_print_instruction(inst->scope->codegen, stderr, inst->child, 0, IrPassGen);
29822 }
30806 ir_print_inst_src(inst->base.scope->codegen, stderr, inst, 0);
30807 fprintf(stderr, "-> ");
30808 ir_print_inst_gen(inst->base.scope->codegen, stderr, inst->child, 0);
30809 }
30810}
30811void IrInstGen::dump() {
30812 IrInstGen *inst = this;
30813 inst->src();
30814 if (inst->base.scope == nullptr) {
30815 fprintf(stderr, "(null scope)\n");
30816 } else {
30817 ir_print_inst_gen(inst->base.scope->codegen, stderr, inst, 0);
2982330818 }
2982430819}
2982530820
2982630821void IrAnalyze::dump() {
29827 ir_print(this->codegen, stderr, this->new_irb.exec, 0, IrPassGen);
30822 ir_print_gen(this->codegen, stderr, this->new_irb.exec, 0);
2982830823 if (this->new_irb.current_basic_block != nullptr) {
2982930824 fprintf(stderr, "Current basic block:\n");
29830 ir_print_basic_block(this->codegen, stderr, this->new_irb.current_basic_block, 1, IrPassGen);
30825 ir_print_basic_block_gen(this->codegen, stderr, this->new_irb.current_basic_block, 1);
2983130826 }
2983230827}
2983330828
src/ir.hpp+13-13
......@@ -10,33 +10,33 @@
1010
1111#include "all_types.hpp"
1212
13enum IrPass {
14 IrPassSrc,
15 IrPassGen,
16};
17
18bool ir_gen(CodeGen *g, AstNode *node, Scope *scope, IrExecutable *ir_executable);
13bool ir_gen(CodeGen *g, AstNode *node, Scope *scope, IrExecutableSrc *ir_executable);
1914bool ir_gen_fn(CodeGen *g, ZigFn *fn_entry);
2015
21ZigValue *ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
22 ZigType *expected_type, size_t *backward_branch_count, size_t *backward_branch_quota,
16IrInstGen *ir_create_alloca(CodeGen *g, Scope *scope, AstNode *source_node, ZigFn *fn,
17 ZigType *var_type, const char *name_hint);
18
19Error ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
20 ZigValue *return_ptr, size_t *backward_branch_count, size_t *backward_branch_quota,
2321 ZigFn *fn_entry, Buf *c_import_buf, AstNode *source_node, Buf *exec_name,
24 IrExecutable *parent_exec, AstNode *expected_type_source_node, UndefAllowed undef);
22 IrExecutableGen *parent_exec, AstNode *expected_type_source_node, UndefAllowed undef);
2523
2624Error ir_resolve_lazy(CodeGen *codegen, AstNode *source_node, ZigValue *val);
2725
28ZigType *ir_analyze(CodeGen *g, IrExecutable *old_executable, IrExecutable *new_executable,
29 ZigType *expected_type, AstNode *expected_type_source_node);
26ZigType *ir_analyze(CodeGen *g, IrExecutableSrc *old_executable, IrExecutableGen *new_executable,
27 ZigType *expected_type, AstNode *expected_type_source_node, ZigValue *return_ptr);
3028
31bool ir_has_side_effects(IrInstruction *instruction);
29bool ir_inst_gen_has_side_effects(IrInstGen *inst);
30bool ir_inst_src_has_side_effects(IrInstSrc *inst);
3231
3332struct IrAnalyze;
3433ZigValue *const_ptr_pointee(IrAnalyze *ira, CodeGen *codegen, ZigValue *const_val,
3534 AstNode *source_node);
36const char *float_op_to_name(BuiltinFnId op);
3735
3836// for debugging purposes
3937void dbg_ir_break(const char *src_file, uint32_t line);
4038void dbg_ir_clear(void);
4139
40void destroy_instruction_gen(IrInstGen *inst);
41
4242#endif
src/ir_print.cpp+1998-1281
......@@ -10,19 +10,35 @@
1010#include "ir_print.hpp"
1111#include "os.hpp"
1212
13static uint32_t hash_instruction_ptr(IrInstruction* instruction) {
13static uint32_t hash_inst_src_ptr(IrInstSrc* instruction) {
1414 return (uint32_t)(uintptr_t)instruction;
1515}
1616
17static bool instruction_ptr_equal(IrInstruction* a, IrInstruction* b) {
17static uint32_t hash_inst_gen_ptr(IrInstGen* instruction) {
18 return (uint32_t)(uintptr_t)instruction;
19}
20
21static bool inst_src_ptr_eql(IrInstSrc* a, IrInstSrc* b) {
1822 return a == b;
1923}
2024
21using InstructionSet = HashMap<IrInstruction*, uint8_t, hash_instruction_ptr, instruction_ptr_equal>;
22using InstructionList = ZigList<IrInstruction*>;
25static bool inst_gen_ptr_eql(IrInstGen* a, IrInstGen* b) {
26 return a == b;
27}
28
29using InstSetSrc = HashMap<IrInstSrc*, uint8_t, hash_inst_src_ptr, inst_src_ptr_eql>;
30using InstSetGen = HashMap<IrInstGen*, uint8_t, hash_inst_gen_ptr, inst_gen_ptr_eql>;
31using InstListSrc = ZigList<IrInstSrc*>;
32using InstListGen = ZigList<IrInstGen*>;
33
34struct IrPrintSrc {
35 CodeGen *codegen;
36 FILE *f;
37 int indent;
38 int indent_size;
39};
2340
24struct IrPrint {
25 IrPass pass;
41struct IrPrintGen {
2642 CodeGen *codegen;
2743 FILE *f;
2844 int indent;
......@@ -32,417 +48,590 @@ struct IrPrint {
3248 // present in the instruction list. Thus we track which instructions
3349 // are printed (per executable) and after each pass 2 instruction those
3450 // var instructions are rendered in a trailing fashion.
35 InstructionSet printed;
36 InstructionList pending;
51 InstSetGen printed;
52 InstListGen pending;
3753};
3854
39static void ir_print_other_instruction(IrPrint *irp, IrInstruction *instruction);
55static void ir_print_other_inst_src(IrPrintSrc *irp, IrInstSrc *inst);
56static void ir_print_other_inst_gen(IrPrintGen *irp, IrInstGen *inst);
4057
41const char* ir_instruction_type_str(IrInstructionId id) {
58const char* ir_inst_src_type_str(IrInstSrcId id) {
4259 switch (id) {
43 case IrInstructionIdInvalid:
44 return "Invalid";
45 case IrInstructionIdShuffleVector:
46 return "Shuffle";
47 case IrInstructionIdSplatSrc:
48 return "SplatSrc";
49 case IrInstructionIdSplatGen:
50 return "SplatGen";
51 case IrInstructionIdDeclVarSrc:
52 return "DeclVarSrc";
53 case IrInstructionIdDeclVarGen:
54 return "DeclVarGen";
55 case IrInstructionIdBr:
56 return "Br";
57 case IrInstructionIdCondBr:
58 return "CondBr";
59 case IrInstructionIdSwitchBr:
60 return "SwitchBr";
61 case IrInstructionIdSwitchVar:
62 return "SwitchVar";
63 case IrInstructionIdSwitchElseVar:
64 return "SwitchElseVar";
65 case IrInstructionIdSwitchTarget:
66 return "SwitchTarget";
67 case IrInstructionIdPhi:
68 return "Phi";
69 case IrInstructionIdUnOp:
70 return "UnOp";
71 case IrInstructionIdBinOp:
72 return "BinOp";
73 case IrInstructionIdMergeErrSets:
74 return "MergeErrSets";
75 case IrInstructionIdLoadPtr:
76 return "LoadPtr";
77 case IrInstructionIdLoadPtrGen:
78 return "LoadPtrGen";
79 case IrInstructionIdStorePtr:
80 return "StorePtr";
81 case IrInstructionIdVectorStoreElem:
82 return "VectorStoreElem";
83 case IrInstructionIdFieldPtr:
84 return "FieldPtr";
85 case IrInstructionIdStructFieldPtr:
86 return "StructFieldPtr";
87 case IrInstructionIdUnionFieldPtr:
88 return "UnionFieldPtr";
89 case IrInstructionIdElemPtr:
90 return "ElemPtr";
91 case IrInstructionIdVarPtr:
92 return "VarPtr";
93 case IrInstructionIdReturnPtr:
94 return "ReturnPtr";
95 case IrInstructionIdCallExtra:
96 return "CallExtra";
97 case IrInstructionIdCallSrc:
98 return "CallSrc";
99 case IrInstructionIdCallSrcArgs:
100 return "CallSrcArgs";
101 case IrInstructionIdCallGen:
102 return "CallGen";
103 case IrInstructionIdConst:
104 return "Const";
105 case IrInstructionIdReturn:
106 return "Return";
107 case IrInstructionIdCast:
108 return "Cast";
109 case IrInstructionIdResizeSlice:
110 return "ResizeSlice";
111 case IrInstructionIdContainerInitList:
112 return "ContainerInitList";
113 case IrInstructionIdContainerInitFields:
114 return "ContainerInitFields";
115 case IrInstructionIdUnreachable:
116 return "Unreachable";
117 case IrInstructionIdTypeOf:
118 return "TypeOf";
119 case IrInstructionIdSetCold:
120 return "SetCold";
121 case IrInstructionIdSetRuntimeSafety:
122 return "SetRuntimeSafety";
123 case IrInstructionIdSetFloatMode:
124 return "SetFloatMode";
125 case IrInstructionIdArrayType:
126 return "ArrayType";
127 case IrInstructionIdAnyFrameType:
128 return "AnyFrameType";
129 case IrInstructionIdSliceType:
130 return "SliceType";
131 case IrInstructionIdAsmSrc:
132 return "AsmSrc";
133 case IrInstructionIdAsmGen:
134 return "AsmGen";
135 case IrInstructionIdSizeOf:
136 return "SizeOf";
137 case IrInstructionIdTestNonNull:
138 return "TestNonNull";
139 case IrInstructionIdOptionalUnwrapPtr:
140 return "OptionalUnwrapPtr";
141 case IrInstructionIdOptionalWrap:
142 return "OptionalWrap";
143 case IrInstructionIdUnionTag:
144 return "UnionTag";
145 case IrInstructionIdClz:
146 return "Clz";
147 case IrInstructionIdCtz:
148 return "Ctz";
149 case IrInstructionIdPopCount:
150 return "PopCount";
151 case IrInstructionIdBswap:
152 return "Bswap";
153 case IrInstructionIdBitReverse:
154 return "BitReverse";
155 case IrInstructionIdImport:
156 return "Import";
157 case IrInstructionIdCImport:
158 return "CImport";
159 case IrInstructionIdCInclude:
160 return "CInclude";
161 case IrInstructionIdCDefine:
162 return "CDefine";
163 case IrInstructionIdCUndef:
164 return "CUndef";
165 case IrInstructionIdRef:
166 return "Ref";
167 case IrInstructionIdRefGen:
168 return "RefGen";
169 case IrInstructionIdCompileErr:
170 return "CompileErr";
171 case IrInstructionIdCompileLog:
172 return "CompileLog";
173 case IrInstructionIdErrName:
174 return "ErrName";
175 case IrInstructionIdEmbedFile:
176 return "EmbedFile";
177 case IrInstructionIdCmpxchgSrc:
178 return "CmpxchgSrc";
179 case IrInstructionIdCmpxchgGen:
180 return "CmpxchgGen";
181 case IrInstructionIdFence:
182 return "Fence";
183 case IrInstructionIdTruncate:
184 return "Truncate";
185 case IrInstructionIdIntCast:
186 return "IntCast";
187 case IrInstructionIdFloatCast:
188 return "FloatCast";
189 case IrInstructionIdIntToFloat:
190 return "IntToFloat";
191 case IrInstructionIdFloatToInt:
192 return "FloatToInt";
193 case IrInstructionIdBoolToInt:
194 return "BoolToInt";
195 case IrInstructionIdIntType:
196 return "IntType";
197 case IrInstructionIdVectorType:
198 return "VectorType";
199 case IrInstructionIdBoolNot:
200 return "BoolNot";
201 case IrInstructionIdMemset:
202 return "Memset";
203 case IrInstructionIdMemcpy:
204 return "Memcpy";
205 case IrInstructionIdSliceSrc:
206 return "SliceSrc";
207 case IrInstructionIdSliceGen:
208 return "SliceGen";
209 case IrInstructionIdMemberCount:
210 return "MemberCount";
211 case IrInstructionIdMemberType:
212 return "MemberType";
213 case IrInstructionIdMemberName:
214 return "MemberName";
215 case IrInstructionIdBreakpoint:
216 return "Breakpoint";
217 case IrInstructionIdReturnAddress:
218 return "ReturnAddress";
219 case IrInstructionIdFrameAddress:
220 return "FrameAddress";
221 case IrInstructionIdFrameHandle:
222 return "FrameHandle";
223 case IrInstructionIdFrameType:
224 return "FrameType";
225 case IrInstructionIdFrameSizeSrc:
226 return "FrameSizeSrc";
227 case IrInstructionIdFrameSizeGen:
228 return "FrameSizeGen";
229 case IrInstructionIdAlignOf:
230 return "AlignOf";
231 case IrInstructionIdOverflowOp:
232 return "OverflowOp";
233 case IrInstructionIdTestErrSrc:
234 return "TestErrSrc";
235 case IrInstructionIdTestErrGen:
236 return "TestErrGen";
237 case IrInstructionIdMulAdd:
238 return "MulAdd";
239 case IrInstructionIdFloatOp:
240 return "FloatOp";
241 case IrInstructionIdUnwrapErrCode:
242 return "UnwrapErrCode";
243 case IrInstructionIdUnwrapErrPayload:
244 return "UnwrapErrPayload";
245 case IrInstructionIdErrWrapCode:
246 return "ErrWrapCode";
247 case IrInstructionIdErrWrapPayload:
248 return "ErrWrapPayload";
249 case IrInstructionIdFnProto:
250 return "FnProto";
251 case IrInstructionIdTestComptime:
252 return "TestComptime";
253 case IrInstructionIdPtrCastSrc:
254 return "PtrCastSrc";
255 case IrInstructionIdPtrCastGen:
256 return "PtrCastGen";
257 case IrInstructionIdBitCastSrc:
258 return "BitCastSrc";
259 case IrInstructionIdBitCastGen:
260 return "BitCastGen";
261 case IrInstructionIdWidenOrShorten:
262 return "WidenOrShorten";
263 case IrInstructionIdIntToPtr:
264 return "IntToPtr";
265 case IrInstructionIdPtrToInt:
266 return "PtrToInt";
267 case IrInstructionIdIntToEnum:
268 return "IntToEnum";
269 case IrInstructionIdEnumToInt:
270 return "EnumToInt";
271 case IrInstructionIdIntToErr:
272 return "IntToErr";
273 case IrInstructionIdErrToInt:
274 return "ErrToInt";
275 case IrInstructionIdCheckSwitchProngs:
276 return "CheckSwitchProngs";
277 case IrInstructionIdCheckStatementIsVoid:
278 return "CheckStatementIsVoid";
279 case IrInstructionIdTypeName:
280 return "TypeName";
281 case IrInstructionIdDeclRef:
282 return "DeclRef";
283 case IrInstructionIdPanic:
284 return "Panic";
285 case IrInstructionIdTagName:
286 return "TagName";
287 case IrInstructionIdTagType:
288 return "TagType";
289 case IrInstructionIdFieldParentPtr:
290 return "FieldParentPtr";
291 case IrInstructionIdByteOffsetOf:
292 return "ByteOffsetOf";
293 case IrInstructionIdBitOffsetOf:
294 return "BitOffsetOf";
295 case IrInstructionIdTypeInfo:
296 return "TypeInfo";
297 case IrInstructionIdType:
298 return "Type";
299 case IrInstructionIdHasField:
300 return "HasField";
301 case IrInstructionIdTypeId:
302 return "TypeId";
303 case IrInstructionIdSetEvalBranchQuota:
304 return "SetEvalBranchQuota";
305 case IrInstructionIdPtrType:
306 return "PtrType";
307 case IrInstructionIdAlignCast:
308 return "AlignCast";
309 case IrInstructionIdImplicitCast:
310 return "ImplicitCast";
311 case IrInstructionIdResolveResult:
312 return "ResolveResult";
313 case IrInstructionIdResetResult:
314 return "ResetResult";
315 case IrInstructionIdOpaqueType:
316 return "OpaqueType";
317 case IrInstructionIdSetAlignStack:
318 return "SetAlignStack";
319 case IrInstructionIdArgType:
320 return "ArgType";
321 case IrInstructionIdExport:
322 return "Export";
323 case IrInstructionIdErrorReturnTrace:
324 return "ErrorReturnTrace";
325 case IrInstructionIdErrorUnion:
326 return "ErrorUnion";
327 case IrInstructionIdAtomicRmw:
328 return "AtomicRmw";
329 case IrInstructionIdAtomicLoad:
330 return "AtomicLoad";
331 case IrInstructionIdAtomicStore:
332 return "AtomicStore";
333 case IrInstructionIdSaveErrRetAddr:
334 return "SaveErrRetAddr";
335 case IrInstructionIdAddImplicitReturnType:
336 return "AddImplicitReturnType";
337 case IrInstructionIdErrSetCast:
338 return "ErrSetCast";
339 case IrInstructionIdToBytes:
340 return "ToBytes";
341 case IrInstructionIdFromBytes:
342 return "FromBytes";
343 case IrInstructionIdCheckRuntimeScope:
344 return "CheckRuntimeScope";
345 case IrInstructionIdVectorToArray:
346 return "VectorToArray";
347 case IrInstructionIdArrayToVector:
348 return "ArrayToVector";
349 case IrInstructionIdAssertZero:
350 return "AssertZero";
351 case IrInstructionIdAssertNonNull:
352 return "AssertNonNull";
353 case IrInstructionIdHasDecl:
354 return "HasDecl";
355 case IrInstructionIdUndeclaredIdent:
356 return "UndeclaredIdent";
357 case IrInstructionIdAllocaSrc:
358 return "AllocaSrc";
359 case IrInstructionIdAllocaGen:
360 return "AllocaGen";
361 case IrInstructionIdEndExpr:
362 return "EndExpr";
363 case IrInstructionIdPtrOfArrayToSlice:
364 return "PtrOfArrayToSlice";
365 case IrInstructionIdUnionInitNamedField:
366 return "UnionInitNamedField";
367 case IrInstructionIdSuspendBegin:
368 return "SuspendBegin";
369 case IrInstructionIdSuspendFinish:
370 return "SuspendFinish";
371 case IrInstructionIdAwaitSrc:
372 return "AwaitSrc";
373 case IrInstructionIdAwaitGen:
374 return "AwaitGen";
375 case IrInstructionIdResume:
376 return "Resume";
377 case IrInstructionIdSpillBegin:
378 return "SpillBegin";
379 case IrInstructionIdSpillEnd:
380 return "SpillEnd";
381 case IrInstructionIdVectorExtractElem:
382 return "VectorExtractElem";
60 case IrInstSrcIdInvalid:
61 return "SrcInvalid";
62 case IrInstSrcIdShuffleVector:
63 return "SrcShuffle";
64 case IrInstSrcIdSplat:
65 return "SrcSplat";
66 case IrInstSrcIdDeclVar:
67 return "SrcDeclVar";
68 case IrInstSrcIdBr:
69 return "SrcBr";
70 case IrInstSrcIdCondBr:
71 return "SrcCondBr";
72 case IrInstSrcIdSwitchBr:
73 return "SrcSwitchBr";
74 case IrInstSrcIdSwitchVar:
75 return "SrcSwitchVar";
76 case IrInstSrcIdSwitchElseVar:
77 return "SrcSwitchElseVar";
78 case IrInstSrcIdSwitchTarget:
79 return "SrcSwitchTarget";
80 case IrInstSrcIdPhi:
81 return "SrcPhi";
82 case IrInstSrcIdUnOp:
83 return "SrcUnOp";
84 case IrInstSrcIdBinOp:
85 return "SrcBinOp";
86 case IrInstSrcIdMergeErrSets:
87 return "SrcMergeErrSets";
88 case IrInstSrcIdLoadPtr:
89 return "SrcLoadPtr";
90 case IrInstSrcIdStorePtr:
91 return "SrcStorePtr";
92 case IrInstSrcIdFieldPtr:
93 return "SrcFieldPtr";
94 case IrInstSrcIdElemPtr:
95 return "SrcElemPtr";
96 case IrInstSrcIdVarPtr:
97 return "SrcVarPtr";
98 case IrInstSrcIdCallExtra:
99 return "SrcCallExtra";
100 case IrInstSrcIdCall:
101 return "SrcCall";
102 case IrInstSrcIdCallArgs:
103 return "SrcCallArgs";
104 case IrInstSrcIdConst:
105 return "SrcConst";
106 case IrInstSrcIdReturn:
107 return "SrcReturn";
108 case IrInstSrcIdContainerInitList:
109 return "SrcContainerInitList";
110 case IrInstSrcIdContainerInitFields:
111 return "SrcContainerInitFields";
112 case IrInstSrcIdUnreachable:
113 return "SrcUnreachable";
114 case IrInstSrcIdTypeOf:
115 return "SrcTypeOf";
116 case IrInstSrcIdSetCold:
117 return "SrcSetCold";
118 case IrInstSrcIdSetRuntimeSafety:
119 return "SrcSetRuntimeSafety";
120 case IrInstSrcIdSetFloatMode:
121 return "SrcSetFloatMode";
122 case IrInstSrcIdArrayType:
123 return "SrcArrayType";
124 case IrInstSrcIdAnyFrameType:
125 return "SrcAnyFrameType";
126 case IrInstSrcIdSliceType:
127 return "SrcSliceType";
128 case IrInstSrcIdAsm:
129 return "SrcAsm";
130 case IrInstSrcIdSizeOf:
131 return "SrcSizeOf";
132 case IrInstSrcIdTestNonNull:
133 return "SrcTestNonNull";
134 case IrInstSrcIdOptionalUnwrapPtr:
135 return "SrcOptionalUnwrapPtr";
136 case IrInstSrcIdClz:
137 return "SrcClz";
138 case IrInstSrcIdCtz:
139 return "SrcCtz";
140 case IrInstSrcIdPopCount:
141 return "SrcPopCount";
142 case IrInstSrcIdBswap:
143 return "SrcBswap";
144 case IrInstSrcIdBitReverse:
145 return "SrcBitReverse";
146 case IrInstSrcIdImport:
147 return "SrcImport";
148 case IrInstSrcIdCImport:
149 return "SrcCImport";
150 case IrInstSrcIdCInclude:
151 return "SrcCInclude";
152 case IrInstSrcIdCDefine:
153 return "SrcCDefine";
154 case IrInstSrcIdCUndef:
155 return "SrcCUndef";
156 case IrInstSrcIdRef:
157 return "SrcRef";
158 case IrInstSrcIdCompileErr:
159 return "SrcCompileErr";
160 case IrInstSrcIdCompileLog:
161 return "SrcCompileLog";
162 case IrInstSrcIdErrName:
163 return "SrcErrName";
164 case IrInstSrcIdEmbedFile:
165 return "SrcEmbedFile";
166 case IrInstSrcIdCmpxchg:
167 return "SrcCmpxchg";
168 case IrInstSrcIdFence:
169 return "SrcFence";
170 case IrInstSrcIdTruncate:
171 return "SrcTruncate";
172 case IrInstSrcIdIntCast:
173 return "SrcIntCast";
174 case IrInstSrcIdFloatCast:
175 return "SrcFloatCast";
176 case IrInstSrcIdIntToFloat:
177 return "SrcIntToFloat";
178 case IrInstSrcIdFloatToInt:
179 return "SrcFloatToInt";
180 case IrInstSrcIdBoolToInt:
181 return "SrcBoolToInt";
182 case IrInstSrcIdIntType:
183 return "SrcIntType";
184 case IrInstSrcIdVectorType:
185 return "SrcVectorType";
186 case IrInstSrcIdBoolNot:
187 return "SrcBoolNot";
188 case IrInstSrcIdMemset:
189 return "SrcMemset";
190 case IrInstSrcIdMemcpy:
191 return "SrcMemcpy";
192 case IrInstSrcIdSlice:
193 return "SrcSlice";
194 case IrInstSrcIdMemberCount:
195 return "SrcMemberCount";
196 case IrInstSrcIdMemberType:
197 return "SrcMemberType";
198 case IrInstSrcIdMemberName:
199 return "SrcMemberName";
200 case IrInstSrcIdBreakpoint:
201 return "SrcBreakpoint";
202 case IrInstSrcIdReturnAddress:
203 return "SrcReturnAddress";
204 case IrInstSrcIdFrameAddress:
205 return "SrcFrameAddress";
206 case IrInstSrcIdFrameHandle:
207 return "SrcFrameHandle";
208 case IrInstSrcIdFrameType:
209 return "SrcFrameType";
210 case IrInstSrcIdFrameSize:
211 return "SrcFrameSize";
212 case IrInstSrcIdAlignOf:
213 return "SrcAlignOf";
214 case IrInstSrcIdOverflowOp:
215 return "SrcOverflowOp";
216 case IrInstSrcIdTestErr:
217 return "SrcTestErr";
218 case IrInstSrcIdMulAdd:
219 return "SrcMulAdd";
220 case IrInstSrcIdFloatOp:
221 return "SrcFloatOp";
222 case IrInstSrcIdUnwrapErrCode:
223 return "SrcUnwrapErrCode";
224 case IrInstSrcIdUnwrapErrPayload:
225 return "SrcUnwrapErrPayload";
226 case IrInstSrcIdFnProto:
227 return "SrcFnProto";
228 case IrInstSrcIdTestComptime:
229 return "SrcTestComptime";
230 case IrInstSrcIdPtrCast:
231 return "SrcPtrCast";
232 case IrInstSrcIdBitCast:
233 return "SrcBitCast";
234 case IrInstSrcIdIntToPtr:
235 return "SrcIntToPtr";
236 case IrInstSrcIdPtrToInt:
237 return "SrcPtrToInt";
238 case IrInstSrcIdIntToEnum:
239 return "SrcIntToEnum";
240 case IrInstSrcIdEnumToInt:
241 return "SrcEnumToInt";
242 case IrInstSrcIdIntToErr:
243 return "SrcIntToErr";
244 case IrInstSrcIdErrToInt:
245 return "SrcErrToInt";
246 case IrInstSrcIdCheckSwitchProngs:
247 return "SrcCheckSwitchProngs";
248 case IrInstSrcIdCheckStatementIsVoid:
249 return "SrcCheckStatementIsVoid";
250 case IrInstSrcIdTypeName:
251 return "SrcTypeName";
252 case IrInstSrcIdDeclRef:
253 return "SrcDeclRef";
254 case IrInstSrcIdPanic:
255 return "SrcPanic";
256 case IrInstSrcIdTagName:
257 return "SrcTagName";
258 case IrInstSrcIdTagType:
259 return "SrcTagType";
260 case IrInstSrcIdFieldParentPtr:
261 return "SrcFieldParentPtr";
262 case IrInstSrcIdByteOffsetOf:
263 return "SrcByteOffsetOf";
264 case IrInstSrcIdBitOffsetOf:
265 return "SrcBitOffsetOf";
266 case IrInstSrcIdTypeInfo:
267 return "SrcTypeInfo";
268 case IrInstSrcIdType:
269 return "SrcType";
270 case IrInstSrcIdHasField:
271 return "SrcHasField";
272 case IrInstSrcIdTypeId:
273 return "SrcTypeId";
274 case IrInstSrcIdSetEvalBranchQuota:
275 return "SrcSetEvalBranchQuota";
276 case IrInstSrcIdPtrType:
277 return "SrcPtrType";
278 case IrInstSrcIdAlignCast:
279 return "SrcAlignCast";
280 case IrInstSrcIdImplicitCast:
281 return "SrcImplicitCast";
282 case IrInstSrcIdResolveResult:
283 return "SrcResolveResult";
284 case IrInstSrcIdResetResult:
285 return "SrcResetResult";
286 case IrInstSrcIdOpaqueType:
287 return "SrcOpaqueType";
288 case IrInstSrcIdSetAlignStack:
289 return "SrcSetAlignStack";
290 case IrInstSrcIdArgType:
291 return "SrcArgType";
292 case IrInstSrcIdExport:
293 return "SrcExport";
294 case IrInstSrcIdErrorReturnTrace:
295 return "SrcErrorReturnTrace";
296 case IrInstSrcIdErrorUnion:
297 return "SrcErrorUnion";
298 case IrInstSrcIdAtomicRmw:
299 return "SrcAtomicRmw";
300 case IrInstSrcIdAtomicLoad:
301 return "SrcAtomicLoad";
302 case IrInstSrcIdAtomicStore:
303 return "SrcAtomicStore";
304 case IrInstSrcIdSaveErrRetAddr:
305 return "SrcSaveErrRetAddr";
306 case IrInstSrcIdAddImplicitReturnType:
307 return "SrcAddImplicitReturnType";
308 case IrInstSrcIdErrSetCast:
309 return "SrcErrSetCast";
310 case IrInstSrcIdToBytes:
311 return "SrcToBytes";
312 case IrInstSrcIdFromBytes:
313 return "SrcFromBytes";
314 case IrInstSrcIdCheckRuntimeScope:
315 return "SrcCheckRuntimeScope";
316 case IrInstSrcIdHasDecl:
317 return "SrcHasDecl";
318 case IrInstSrcIdUndeclaredIdent:
319 return "SrcUndeclaredIdent";
320 case IrInstSrcIdAlloca:
321 return "SrcAlloca";
322 case IrInstSrcIdEndExpr:
323 return "SrcEndExpr";
324 case IrInstSrcIdUnionInitNamedField:
325 return "SrcUnionInitNamedField";
326 case IrInstSrcIdSuspendBegin:
327 return "SrcSuspendBegin";
328 case IrInstSrcIdSuspendFinish:
329 return "SrcSuspendFinish";
330 case IrInstSrcIdAwait:
331 return "SrcAwaitSr";
332 case IrInstSrcIdResume:
333 return "SrcResume";
334 case IrInstSrcIdSpillBegin:
335 return "SrcSpillBegin";
336 case IrInstSrcIdSpillEnd:
337 return "SrcSpillEnd";
383338 }
384339 zig_unreachable();
385340}
386341
387static void ir_print_indent(IrPrint *irp) {
342const char* ir_inst_gen_type_str(IrInstGenId id) {
343 switch (id) {
344 case IrInstGenIdInvalid:
345 return "GenInvalid";
346 case IrInstGenIdShuffleVector:
347 return "GenShuffle";
348 case IrInstGenIdSplat:
349 return "GenSplat";
350 case IrInstGenIdDeclVar:
351 return "GenDeclVar";
352 case IrInstGenIdBr:
353 return "GenBr";
354 case IrInstGenIdCondBr:
355 return "GenCondBr";
356 case IrInstGenIdSwitchBr:
357 return "GenSwitchBr";
358 case IrInstGenIdPhi:
359 return "GenPhi";
360 case IrInstGenIdBinOp:
361 return "GenBinOp";
362 case IrInstGenIdLoadPtr:
363 return "GenLoadPtr";
364 case IrInstGenIdStorePtr:
365 return "GenStorePtr";
366 case IrInstGenIdVectorStoreElem:
367 return "GenVectorStoreElem";
368 case IrInstGenIdStructFieldPtr:
369 return "GenStructFieldPtr";
370 case IrInstGenIdUnionFieldPtr:
371 return "GenUnionFieldPtr";
372 case IrInstGenIdElemPtr:
373 return "GenElemPtr";
374 case IrInstGenIdVarPtr:
375 return "GenVarPtr";
376 case IrInstGenIdReturnPtr:
377 return "GenReturnPtr";
378 case IrInstGenIdCall:
379 return "GenCall";
380 case IrInstGenIdConst:
381 return "GenConst";
382 case IrInstGenIdReturn:
383 return "GenReturn";
384 case IrInstGenIdCast:
385 return "GenCast";
386 case IrInstGenIdResizeSlice:
387 return "GenResizeSlice";
388 case IrInstGenIdUnreachable:
389 return "GenUnreachable";
390 case IrInstGenIdAsm:
391 return "GenAsm";
392 case IrInstGenIdTestNonNull:
393 return "GenTestNonNull";
394 case IrInstGenIdOptionalUnwrapPtr:
395 return "GenOptionalUnwrapPtr";
396 case IrInstGenIdOptionalWrap:
397 return "GenOptionalWrap";
398 case IrInstGenIdUnionTag:
399 return "GenUnionTag";
400 case IrInstGenIdClz:
401 return "GenClz";
402 case IrInstGenIdCtz:
403 return "GenCtz";
404 case IrInstGenIdPopCount:
405 return "GenPopCount";
406 case IrInstGenIdBswap:
407 return "GenBswap";
408 case IrInstGenIdBitReverse:
409 return "GenBitReverse";
410 case IrInstGenIdRef:
411 return "GenRef";
412 case IrInstGenIdErrName:
413 return "GenErrName";
414 case IrInstGenIdCmpxchg:
415 return "GenCmpxchg";
416 case IrInstGenIdFence:
417 return "GenFence";
418 case IrInstGenIdTruncate:
419 return "GenTruncate";
420 case IrInstGenIdBoolNot:
421 return "GenBoolNot";
422 case IrInstGenIdMemset:
423 return "GenMemset";
424 case IrInstGenIdMemcpy:
425 return "GenMemcpy";
426 case IrInstGenIdSlice:
427 return "GenSlice";
428 case IrInstGenIdBreakpoint:
429 return "GenBreakpoint";
430 case IrInstGenIdReturnAddress:
431 return "GenReturnAddress";
432 case IrInstGenIdFrameAddress:
433 return "GenFrameAddress";
434 case IrInstGenIdFrameHandle:
435 return "GenFrameHandle";
436 case IrInstGenIdFrameSize:
437 return "GenFrameSize";
438 case IrInstGenIdOverflowOp:
439 return "GenOverflowOp";
440 case IrInstGenIdTestErr:
441 return "GenTestErr";
442 case IrInstGenIdMulAdd:
443 return "GenMulAdd";
444 case IrInstGenIdFloatOp:
445 return "GenFloatOp";
446 case IrInstGenIdUnwrapErrCode:
447 return "GenUnwrapErrCode";
448 case IrInstGenIdUnwrapErrPayload:
449 return "GenUnwrapErrPayload";
450 case IrInstGenIdErrWrapCode:
451 return "GenErrWrapCode";
452 case IrInstGenIdErrWrapPayload:
453 return "GenErrWrapPayload";
454 case IrInstGenIdPtrCast:
455 return "GenPtrCast";
456 case IrInstGenIdBitCast:
457 return "GenBitCast";
458 case IrInstGenIdWidenOrShorten:
459 return "GenWidenOrShorten";
460 case IrInstGenIdIntToPtr:
461 return "GenIntToPtr";
462 case IrInstGenIdPtrToInt:
463 return "GenPtrToInt";
464 case IrInstGenIdIntToEnum:
465 return "GenIntToEnum";
466 case IrInstGenIdIntToErr:
467 return "GenIntToErr";
468 case IrInstGenIdErrToInt:
469 return "GenErrToInt";
470 case IrInstGenIdPanic:
471 return "GenPanic";
472 case IrInstGenIdTagName:
473 return "GenTagName";
474 case IrInstGenIdFieldParentPtr:
475 return "GenFieldParentPtr";
476 case IrInstGenIdAlignCast:
477 return "GenAlignCast";
478 case IrInstGenIdErrorReturnTrace:
479 return "GenErrorReturnTrace";
480 case IrInstGenIdAtomicRmw:
481 return "GenAtomicRmw";
482 case IrInstGenIdAtomicLoad:
483 return "GenAtomicLoad";
484 case IrInstGenIdAtomicStore:
485 return "GenAtomicStore";
486 case IrInstGenIdSaveErrRetAddr:
487 return "GenSaveErrRetAddr";
488 case IrInstGenIdVectorToArray:
489 return "GenVectorToArray";
490 case IrInstGenIdArrayToVector:
491 return "GenArrayToVector";
492 case IrInstGenIdAssertZero:
493 return "GenAssertZero";
494 case IrInstGenIdAssertNonNull:
495 return "GenAssertNonNull";
496 case IrInstGenIdAlloca:
497 return "GenAlloca";
498 case IrInstGenIdPtrOfArrayToSlice:
499 return "GenPtrOfArrayToSlice";
500 case IrInstGenIdSuspendBegin:
501 return "GenSuspendBegin";
502 case IrInstGenIdSuspendFinish:
503 return "GenSuspendFinish";
504 case IrInstGenIdAwait:
505 return "GenAwait";
506 case IrInstGenIdResume:
507 return "GenResume";
508 case IrInstGenIdSpillBegin:
509 return "GenSpillBegin";
510 case IrInstGenIdSpillEnd:
511 return "GenSpillEnd";
512 case IrInstGenIdVectorExtractElem:
513 return "GenVectorExtractElem";
514 case IrInstGenIdBinaryNot:
515 return "GenBinaryNot";
516 case IrInstGenIdNegation:
517 return "GenNegation";
518 case IrInstGenIdNegationWrapping:
519 return "GenNegationWrapping";
520 }
521 zig_unreachable();
522}
523
524static void ir_print_indent_src(IrPrintSrc *irp) {
388525 for (int i = 0; i < irp->indent; i += 1) {
389526 fprintf(irp->f, " ");
390527 }
391528}
392529
393static void ir_print_prefix(IrPrint *irp, IrInstruction *instruction, bool trailing) {
394 ir_print_indent(irp);
530static void ir_print_indent_gen(IrPrintGen *irp) {
531 for (int i = 0; i < irp->indent; i += 1) {
532 fprintf(irp->f, " ");
533 }
534}
535
536static void ir_print_prefix_src(IrPrintSrc *irp, IrInstSrc *instruction, bool trailing) {
537 ir_print_indent_src(irp);
538 const char mark = trailing ? ':' : '#';
539 const char *type_name;
540 if (instruction->id == IrInstSrcIdConst) {
541 type_name = buf_ptr(&reinterpret_cast<IrInstSrcConst *>(instruction)->value->type->name);
542 } else if (instruction->is_noreturn) {
543 type_name = "noreturn";
544 } else {
545 type_name = "(unknown)";
546 }
547 const char *ref_count = ir_inst_src_has_side_effects(instruction) ?
548 "-" : buf_ptr(buf_sprintf("%" PRIu32 "", instruction->base.ref_count));
549 fprintf(irp->f, "%c%-3" PRIu32 "| %-22s| %-12s| %-2s| ", mark, instruction->base.debug_id,
550 ir_inst_src_type_str(instruction->id), type_name, ref_count);
551}
552
553static void ir_print_prefix_gen(IrPrintGen *irp, IrInstGen *instruction, bool trailing) {
554 ir_print_indent_gen(irp);
395555 const char mark = trailing ? ':' : '#';
396556 const char *type_name = instruction->value->type ? buf_ptr(&instruction->value->type->name) : "(unknown)";
397 const char *ref_count = ir_has_side_effects(instruction) ?
398 "-" : buf_ptr(buf_sprintf("%" PRIu32 "", instruction->ref_count));
399 fprintf(irp->f, "%c%-3" PRIu32 "| %-22s| %-12s| %-2s| ", mark, instruction->debug_id,
400 ir_instruction_type_str(instruction->id), type_name, ref_count);
557 const char *ref_count = ir_inst_gen_has_side_effects(instruction) ?
558 "-" : buf_ptr(buf_sprintf("%" PRIu32 "", instruction->base.ref_count));
559 fprintf(irp->f, "%c%-3" PRIu32 "| %-22s| %-12s| %-2s| ", mark, instruction->base.debug_id,
560 ir_inst_gen_type_str(instruction->id), type_name, ref_count);
401561}
402562
403static void ir_print_const_value(IrPrint *irp, ZigValue *const_val) {
404 Buf buf = BUF_INIT;
405 buf_resize(&buf, 0);
406 render_const_value(irp->codegen, &buf, const_val);
407 fprintf(irp->f, "%s", buf_ptr(&buf));
563static void ir_print_var_src(IrPrintSrc *irp, IrInstSrc *inst) {
564 fprintf(irp->f, "#%" PRIu32 "", inst->base.debug_id);
408565}
409566
410static void ir_print_var_instruction(IrPrint *irp, IrInstruction *instruction) {
411 fprintf(irp->f, "#%" PRIu32 "", instruction->debug_id);
412 if (irp->pass != IrPassSrc && irp->printed.maybe_get(instruction) == nullptr) {
413 irp->printed.put(instruction, 0);
414 irp->pending.append(instruction);
567static void ir_print_var_gen(IrPrintGen *irp, IrInstGen *inst) {
568 fprintf(irp->f, "#%" PRIu32 "", inst->base.debug_id);
569 if (irp->printed.maybe_get(inst) == nullptr) {
570 irp->printed.put(inst, 0);
571 irp->pending.append(inst);
415572 }
416573}
417574
418static void ir_print_other_instruction(IrPrint *irp, IrInstruction *instruction) {
419 if (instruction == nullptr) {
575static void ir_print_other_inst_src(IrPrintSrc *irp, IrInstSrc *inst) {
576 if (inst == nullptr) {
420577 fprintf(irp->f, "(null)");
421578 return;
422579 }
580 ir_print_var_src(irp, inst);
581}
582
583static void ir_print_const_value(CodeGen *g, FILE *f, ZigValue *const_val) {
584 Buf buf = BUF_INIT;
585 buf_resize(&buf, 0);
586 render_const_value(g, &buf, const_val);
587 fprintf(f, "%s", buf_ptr(&buf));
588}
589
590static void ir_print_other_inst_gen(IrPrintGen *irp, IrInstGen *inst) {
591 if (inst == nullptr) {
592 fprintf(irp->f, "(null)");
593 return;
594 }
595
596 if (inst->value->special != ConstValSpecialRuntime) {
597 ir_print_const_value(irp->codegen, irp->f, inst->value);
598 } else {
599 ir_print_var_gen(irp, inst);
600 }
601}
423602
424 if (instruction->value->special != ConstValSpecialRuntime) {
425 ir_print_const_value(irp, instruction->value);
603static void ir_print_other_block(IrPrintSrc *irp, IrBasicBlockSrc *bb) {
604 if (bb == nullptr) {
605 fprintf(irp->f, "(null block)");
426606 } else {
427 ir_print_var_instruction(irp, instruction);
607 fprintf(irp->f, "$%s_%" PRIu32 "", bb->name_hint, bb->debug_id);
428608 }
429609}
430610
431static void ir_print_other_block(IrPrint *irp, IrBasicBlock *bb) {
611static void ir_print_other_block_gen(IrPrintGen *irp, IrBasicBlockGen *bb) {
432612 if (bb == nullptr) {
433613 fprintf(irp->f, "(null block)");
434614 } else {
435 fprintf(irp->f, "$%s_%" ZIG_PRI_usize "", bb->name_hint, bb->debug_id);
615 fprintf(irp->f, "$%s_%" PRIu32 "", bb->name_hint, bb->debug_id);
436616 }
437617}
438618
439static void ir_print_return(IrPrint *irp, IrInstructionReturn *instruction) {
619static void ir_print_return_src(IrPrintSrc *irp, IrInstSrcReturn *inst) {
440620 fprintf(irp->f, "return ");
441 ir_print_other_instruction(irp, instruction->operand);
621 ir_print_other_inst_src(irp, inst->operand);
442622}
443623
444static void ir_print_const(IrPrint *irp, IrInstructionConst *const_instruction) {
445 ir_print_const_value(irp, const_instruction->base.value);
624static void ir_print_return_gen(IrPrintGen *irp, IrInstGenReturn *inst) {
625 fprintf(irp->f, "return ");
626 ir_print_other_inst_gen(irp, inst->operand);
627}
628
629static void ir_print_const(IrPrintSrc *irp, IrInstSrcConst *const_instruction) {
630 ir_print_const_value(irp->codegen, irp->f, const_instruction->value);
631}
632
633static void ir_print_const(IrPrintGen *irp, IrInstGenConst *const_instruction) {
634 ir_print_const_value(irp->codegen, irp->f, const_instruction->base.value);
446635}
447636
448637static const char *ir_bin_op_id_str(IrBinOp op_id) {
......@@ -531,89 +720,111 @@ static const char *ir_un_op_id_str(IrUnOp op_id) {
531720 zig_unreachable();
532721}
533722
534static void ir_print_un_op(IrPrint *irp, IrInstructionUnOp *un_op_instruction) {
535 fprintf(irp->f, "%s ", ir_un_op_id_str(un_op_instruction->op_id));
536 ir_print_other_instruction(irp, un_op_instruction->value);
723static void ir_print_un_op(IrPrintSrc *irp, IrInstSrcUnOp *inst) {
724 fprintf(irp->f, "%s ", ir_un_op_id_str(inst->op_id));
725 ir_print_other_inst_src(irp, inst->value);
726}
727
728static void ir_print_bin_op(IrPrintSrc *irp, IrInstSrcBinOp *bin_op_instruction) {
729 ir_print_other_inst_src(irp, bin_op_instruction->op1);
730 fprintf(irp->f, " %s ", ir_bin_op_id_str(bin_op_instruction->op_id));
731 ir_print_other_inst_src(irp, bin_op_instruction->op2);
732 if (!bin_op_instruction->safety_check_on) {
733 fprintf(irp->f, " // no safety");
734 }
537735}
538736
539static void ir_print_bin_op(IrPrint *irp, IrInstructionBinOp *bin_op_instruction) {
540 ir_print_other_instruction(irp, bin_op_instruction->op1);
737static void ir_print_bin_op(IrPrintGen *irp, IrInstGenBinOp *bin_op_instruction) {
738 ir_print_other_inst_gen(irp, bin_op_instruction->op1);
541739 fprintf(irp->f, " %s ", ir_bin_op_id_str(bin_op_instruction->op_id));
542 ir_print_other_instruction(irp, bin_op_instruction->op2);
740 ir_print_other_inst_gen(irp, bin_op_instruction->op2);
543741 if (!bin_op_instruction->safety_check_on) {
544742 fprintf(irp->f, " // no safety");
545743 }
546744}
547745
548static void ir_print_merge_err_sets(IrPrint *irp, IrInstructionMergeErrSets *instruction) {
549 ir_print_other_instruction(irp, instruction->op1);
746static void ir_print_merge_err_sets(IrPrintSrc *irp, IrInstSrcMergeErrSets *instruction) {
747 ir_print_other_inst_src(irp, instruction->op1);
550748 fprintf(irp->f, " || ");
551 ir_print_other_instruction(irp, instruction->op2);
749 ir_print_other_inst_src(irp, instruction->op2);
552750 if (instruction->type_name != nullptr) {
553751 fprintf(irp->f, " // name=%s", buf_ptr(instruction->type_name));
554752 }
555753}
556754
557static void ir_print_decl_var_src(IrPrint *irp, IrInstructionDeclVarSrc *decl_var_instruction) {
755static void ir_print_decl_var_src(IrPrintSrc *irp, IrInstSrcDeclVar *decl_var_instruction) {
558756 const char *var_or_const = decl_var_instruction->var->gen_is_const ? "const" : "var";
559757 const char *name = decl_var_instruction->var->name;
560758 if (decl_var_instruction->var_type) {
561759 fprintf(irp->f, "%s %s: ", var_or_const, name);
562 ir_print_other_instruction(irp, decl_var_instruction->var_type);
760 ir_print_other_inst_src(irp, decl_var_instruction->var_type);
563761 fprintf(irp->f, " ");
564762 } else {
565763 fprintf(irp->f, "%s %s ", var_or_const, name);
566764 }
567765 if (decl_var_instruction->align_value) {
568766 fprintf(irp->f, "align ");
569 ir_print_other_instruction(irp, decl_var_instruction->align_value);
767 ir_print_other_inst_src(irp, decl_var_instruction->align_value);
570768 fprintf(irp->f, " ");
571769 }
572770 fprintf(irp->f, "= ");
573 ir_print_other_instruction(irp, decl_var_instruction->ptr);
771 ir_print_other_inst_src(irp, decl_var_instruction->ptr);
574772 if (decl_var_instruction->var->is_comptime != nullptr) {
575773 fprintf(irp->f, " // comptime = ");
576 ir_print_other_instruction(irp, decl_var_instruction->var->is_comptime);
774 ir_print_other_inst_src(irp, decl_var_instruction->var->is_comptime);
577775 }
578776}
579777
580static void ir_print_cast(IrPrint *irp, IrInstructionCast *cast_instruction) {
581 fprintf(irp->f, "cast ");
582 ir_print_other_instruction(irp, cast_instruction->value);
583 fprintf(irp->f, " to %s", buf_ptr(&cast_instruction->dest_type->name));
778static const char *cast_op_str(CastOp op) {
779 switch (op) {
780 case CastOpNoCast: return "NoCast";
781 case CastOpNoop: return "NoOp";
782 case CastOpIntToFloat: return "IntToFloat";
783 case CastOpFloatToInt: return "FloatToInt";
784 case CastOpBoolToInt: return "BoolToInt";
785 case CastOpNumLitToConcrete: return "NumLitToConcrate";
786 case CastOpErrSet: return "ErrSet";
787 case CastOpBitCast: return "BitCast";
788 }
789 zig_unreachable();
790}
791
792static void ir_print_cast(IrPrintGen *irp, IrInstGenCast *cast_instruction) {
793 fprintf(irp->f, "%s cast ", cast_op_str(cast_instruction->cast_op));
794 ir_print_other_inst_gen(irp, cast_instruction->value);
584795}
585796
586static void ir_print_result_loc_var(IrPrint *irp, ResultLocVar *result_loc_var) {
797static void ir_print_result_loc_var(IrPrintSrc *irp, ResultLocVar *result_loc_var) {
587798 fprintf(irp->f, "var(");
588 ir_print_other_instruction(irp, result_loc_var->base.source_instruction);
799 ir_print_other_inst_src(irp, result_loc_var->base.source_instruction);
589800 fprintf(irp->f, ")");
590801}
591802
592static void ir_print_result_loc_instruction(IrPrint *irp, ResultLocInstruction *result_loc_inst) {
803static void ir_print_result_loc_instruction(IrPrintSrc *irp, ResultLocInstruction *result_loc_inst) {
593804 fprintf(irp->f, "inst(");
594 ir_print_other_instruction(irp, result_loc_inst->base.source_instruction);
805 ir_print_other_inst_src(irp, result_loc_inst->base.source_instruction);
595806 fprintf(irp->f, ")");
596807}
597808
598static void ir_print_result_loc_peer(IrPrint *irp, ResultLocPeer *result_loc_peer) {
809static void ir_print_result_loc_peer(IrPrintSrc *irp, ResultLocPeer *result_loc_peer) {
599810 fprintf(irp->f, "peer(next=");
600811 ir_print_other_block(irp, result_loc_peer->next_bb);
601812 fprintf(irp->f, ")");
602813}
603814
604static void ir_print_result_loc_bit_cast(IrPrint *irp, ResultLocBitCast *result_loc_bit_cast) {
815static void ir_print_result_loc_bit_cast(IrPrintSrc *irp, ResultLocBitCast *result_loc_bit_cast) {
605816 fprintf(irp->f, "bitcast(ty=");
606 ir_print_other_instruction(irp, result_loc_bit_cast->base.source_instruction);
817 ir_print_other_inst_src(irp, result_loc_bit_cast->base.source_instruction);
607818 fprintf(irp->f, ")");
608819}
609820
610static void ir_print_result_loc_cast(IrPrint *irp, ResultLocCast *result_loc_cast) {
821static void ir_print_result_loc_cast(IrPrintSrc *irp, ResultLocCast *result_loc_cast) {
611822 fprintf(irp->f, "cast(ty=");
612 ir_print_other_instruction(irp, result_loc_cast->base.source_instruction);
823 ir_print_other_inst_src(irp, result_loc_cast->base.source_instruction);
613824 fprintf(irp->f, ")");
614825}
615826
616static void ir_print_result_loc(IrPrint *irp, ResultLoc *result_loc) {
827static void ir_print_result_loc(IrPrintSrc *irp, ResultLoc *result_loc) {
617828 switch (result_loc->id) {
618829 case ResultLocIdInvalid:
619830 zig_unreachable();
......@@ -640,34 +851,34 @@ static void ir_print_result_loc(IrPrint *irp, ResultLoc *result_loc) {
640851 zig_unreachable();
641852}
642853
643static void ir_print_call_extra(IrPrint *irp, IrInstructionCallExtra *instruction) {
854static void ir_print_call_extra(IrPrintSrc *irp, IrInstSrcCallExtra *instruction) {
644855 fprintf(irp->f, "opts=");
645 ir_print_other_instruction(irp, instruction->options);
856 ir_print_other_inst_src(irp, instruction->options);
646857 fprintf(irp->f, ", fn=");
647 ir_print_other_instruction(irp, instruction->fn_ref);
858 ir_print_other_inst_src(irp, instruction->fn_ref);
648859 fprintf(irp->f, ", args=");
649 ir_print_other_instruction(irp, instruction->args);
860 ir_print_other_inst_src(irp, instruction->args);
650861 fprintf(irp->f, ", result=");
651862 ir_print_result_loc(irp, instruction->result_loc);
652863}
653864
654static void ir_print_call_src_args(IrPrint *irp, IrInstructionCallSrcArgs *instruction) {
865static void ir_print_call_args(IrPrintSrc *irp, IrInstSrcCallArgs *instruction) {
655866 fprintf(irp->f, "opts=");
656 ir_print_other_instruction(irp, instruction->options);
867 ir_print_other_inst_src(irp, instruction->options);
657868 fprintf(irp->f, ", fn=");
658 ir_print_other_instruction(irp, instruction->fn_ref);
869 ir_print_other_inst_src(irp, instruction->fn_ref);
659870 fprintf(irp->f, ", args=(");
660871 for (size_t i = 0; i < instruction->args_len; i += 1) {
661 IrInstruction *arg = instruction->args_ptr[i];
872 IrInstSrc *arg = instruction->args_ptr[i];
662873 if (i != 0)
663874 fprintf(irp->f, ", ");
664 ir_print_other_instruction(irp, arg);
875 ir_print_other_inst_src(irp, arg);
665876 }
666877 fprintf(irp->f, "), result=");
667878 ir_print_result_loc(irp, instruction->result_loc);
668879}
669880
670static void ir_print_call_src(IrPrint *irp, IrInstructionCallSrc *call_instruction) {
881static void ir_print_call_src(IrPrintSrc *irp, IrInstSrcCall *call_instruction) {
671882 switch (call_instruction->modifier) {
672883 case CallModifierNone:
673884 break;
......@@ -699,20 +910,20 @@ static void ir_print_call_src(IrPrint *irp, IrInstructionCallSrc *call_instructi
699910 fprintf(irp->f, "%s", buf_ptr(&call_instruction->fn_entry->symbol_name));
700911 } else {
701912 assert(call_instruction->fn_ref);
702 ir_print_other_instruction(irp, call_instruction->fn_ref);
913 ir_print_other_inst_src(irp, call_instruction->fn_ref);
703914 }
704915 fprintf(irp->f, "(");
705916 for (size_t i = 0; i < call_instruction->arg_count; i += 1) {
706 IrInstruction *arg = call_instruction->args[i];
917 IrInstSrc *arg = call_instruction->args[i];
707918 if (i != 0)
708919 fprintf(irp->f, ", ");
709 ir_print_other_instruction(irp, arg);
920 ir_print_other_inst_src(irp, arg);
710921 }
711922 fprintf(irp->f, ")result=");
712923 ir_print_result_loc(irp, call_instruction->result_loc);
713924}
714925
715static void ir_print_call_gen(IrPrint *irp, IrInstructionCallGen *call_instruction) {
926static void ir_print_call_gen(IrPrintGen *irp, IrInstGenCall *call_instruction) {
716927 switch (call_instruction->modifier) {
717928 case CallModifierNone:
718929 break;
......@@ -744,221 +955,291 @@ static void ir_print_call_gen(IrPrint *irp, IrInstructionCallGen *call_instructi
744955 fprintf(irp->f, "%s", buf_ptr(&call_instruction->fn_entry->symbol_name));
745956 } else {
746957 assert(call_instruction->fn_ref);
747 ir_print_other_instruction(irp, call_instruction->fn_ref);
958 ir_print_other_inst_gen(irp, call_instruction->fn_ref);
748959 }
749960 fprintf(irp->f, "(");
750961 for (size_t i = 0; i < call_instruction->arg_count; i += 1) {
751 IrInstruction *arg = call_instruction->args[i];
962 IrInstGen *arg = call_instruction->args[i];
752963 if (i != 0)
753964 fprintf(irp->f, ", ");
754 ir_print_other_instruction(irp, arg);
965 ir_print_other_inst_gen(irp, arg);
755966 }
756967 fprintf(irp->f, ")result=");
757 ir_print_other_instruction(irp, call_instruction->result_loc);
968 ir_print_other_inst_gen(irp, call_instruction->result_loc);
758969}
759970
760static void ir_print_cond_br(IrPrint *irp, IrInstructionCondBr *cond_br_instruction) {
971static void ir_print_cond_br(IrPrintSrc *irp, IrInstSrcCondBr *inst) {
761972 fprintf(irp->f, "if (");
762 ir_print_other_instruction(irp, cond_br_instruction->condition);
973 ir_print_other_inst_src(irp, inst->condition);
763974 fprintf(irp->f, ") ");
764 ir_print_other_block(irp, cond_br_instruction->then_block);
975 ir_print_other_block(irp, inst->then_block);
765976 fprintf(irp->f, " else ");
766 ir_print_other_block(irp, cond_br_instruction->else_block);
767 if (cond_br_instruction->is_comptime != nullptr) {
977 ir_print_other_block(irp, inst->else_block);
978 if (inst->is_comptime != nullptr) {
768979 fprintf(irp->f, " // comptime = ");
769 ir_print_other_instruction(irp, cond_br_instruction->is_comptime);
980 ir_print_other_inst_src(irp, inst->is_comptime);
770981 }
771982}
772983
773static void ir_print_br(IrPrint *irp, IrInstructionBr *br_instruction) {
984static void ir_print_cond_br(IrPrintGen *irp, IrInstGenCondBr *inst) {
985 fprintf(irp->f, "if (");
986 ir_print_other_inst_gen(irp, inst->condition);
987 fprintf(irp->f, ") ");
988 ir_print_other_block_gen(irp, inst->then_block);
989 fprintf(irp->f, " else ");
990 ir_print_other_block_gen(irp, inst->else_block);
991}
992
993static void ir_print_br(IrPrintSrc *irp, IrInstSrcBr *br_instruction) {
774994 fprintf(irp->f, "goto ");
775995 ir_print_other_block(irp, br_instruction->dest_block);
776996 if (br_instruction->is_comptime != nullptr) {
777997 fprintf(irp->f, " // comptime = ");
778 ir_print_other_instruction(irp, br_instruction->is_comptime);
998 ir_print_other_inst_src(irp, br_instruction->is_comptime);
779999 }
7801000}
7811001
782static void ir_print_phi(IrPrint *irp, IrInstructionPhi *phi_instruction) {
1002static void ir_print_br(IrPrintGen *irp, IrInstGenBr *inst) {
1003 fprintf(irp->f, "goto ");
1004 ir_print_other_block_gen(irp, inst->dest_block);
1005}
1006
1007static void ir_print_phi(IrPrintSrc *irp, IrInstSrcPhi *phi_instruction) {
7831008 assert(phi_instruction->incoming_count != 0);
7841009 assert(phi_instruction->incoming_count != SIZE_MAX);
7851010 for (size_t i = 0; i < phi_instruction->incoming_count; i += 1) {
786 IrBasicBlock *incoming_block = phi_instruction->incoming_blocks[i];
787 IrInstruction *incoming_value = phi_instruction->incoming_values[i];
1011 IrBasicBlockSrc *incoming_block = phi_instruction->incoming_blocks[i];
1012 IrInstSrc *incoming_value = phi_instruction->incoming_values[i];
7881013 if (i != 0)
7891014 fprintf(irp->f, " ");
7901015 ir_print_other_block(irp, incoming_block);
7911016 fprintf(irp->f, ":");
792 ir_print_other_instruction(irp, incoming_value);
1017 ir_print_other_inst_src(irp, incoming_value);
7931018 }
7941019}
7951020
796static void ir_print_container_init_list(IrPrint *irp, IrInstructionContainerInitList *instruction) {
1021static void ir_print_phi(IrPrintGen *irp, IrInstGenPhi *phi_instruction) {
1022 assert(phi_instruction->incoming_count != 0);
1023 assert(phi_instruction->incoming_count != SIZE_MAX);
1024 for (size_t i = 0; i < phi_instruction->incoming_count; i += 1) {
1025 IrBasicBlockGen *incoming_block = phi_instruction->incoming_blocks[i];
1026 IrInstGen *incoming_value = phi_instruction->incoming_values[i];
1027 if (i != 0)
1028 fprintf(irp->f, " ");
1029 ir_print_other_block_gen(irp, incoming_block);
1030 fprintf(irp->f, ":");
1031 ir_print_other_inst_gen(irp, incoming_value);
1032 }
1033}
1034
1035static void ir_print_container_init_list(IrPrintSrc *irp, IrInstSrcContainerInitList *instruction) {
7971036 fprintf(irp->f, "{");
7981037 if (instruction->item_count > 50) {
7991038 fprintf(irp->f, "...(%" ZIG_PRI_usize " items)...", instruction->item_count);
8001039 } else {
8011040 for (size_t i = 0; i < instruction->item_count; i += 1) {
802 IrInstruction *result_loc = instruction->elem_result_loc_list[i];
1041 IrInstSrc *result_loc = instruction->elem_result_loc_list[i];
8031042 if (i != 0)
8041043 fprintf(irp->f, ", ");
805 ir_print_other_instruction(irp, result_loc);
1044 ir_print_other_inst_src(irp, result_loc);
8061045 }
8071046 }
8081047 fprintf(irp->f, "}result=");
809 ir_print_other_instruction(irp, instruction->result_loc);
1048 ir_print_other_inst_src(irp, instruction->result_loc);
8101049}
8111050
812static void ir_print_container_init_fields(IrPrint *irp, IrInstructionContainerInitFields *instruction) {
1051static void ir_print_container_init_fields(IrPrintSrc *irp, IrInstSrcContainerInitFields *instruction) {
8131052 fprintf(irp->f, "{");
8141053 for (size_t i = 0; i < instruction->field_count; i += 1) {
815 IrInstructionContainerInitFieldsField *field = &instruction->fields[i];
1054 IrInstSrcContainerInitFieldsField *field = &instruction->fields[i];
8161055 const char *comma = (i == 0) ? "" : ", ";
8171056 fprintf(irp->f, "%s.%s = ", comma, buf_ptr(field->name));
818 ir_print_other_instruction(irp, field->result_loc);
1057 ir_print_other_inst_src(irp, field->result_loc);
8191058 }
8201059 fprintf(irp->f, "}result=");
821 ir_print_other_instruction(irp, instruction->result_loc);
1060 ir_print_other_inst_src(irp, instruction->result_loc);
1061}
1062
1063static void ir_print_unreachable(IrPrintSrc *irp, IrInstSrcUnreachable *instruction) {
1064 fprintf(irp->f, "unreachable");
8221065}
8231066
824static void ir_print_unreachable(IrPrint *irp, IrInstructionUnreachable *instruction) {
1067static void ir_print_unreachable(IrPrintGen *irp, IrInstGenUnreachable *instruction) {
8251068 fprintf(irp->f, "unreachable");
8261069}
8271070
828static void ir_print_elem_ptr(IrPrint *irp, IrInstructionElemPtr *instruction) {
1071static void ir_print_elem_ptr(IrPrintSrc *irp, IrInstSrcElemPtr *instruction) {
8291072 fprintf(irp->f, "&");
830 ir_print_other_instruction(irp, instruction->array_ptr);
1073 ir_print_other_inst_src(irp, instruction->array_ptr);
8311074 fprintf(irp->f, "[");
832 ir_print_other_instruction(irp, instruction->elem_index);
1075 ir_print_other_inst_src(irp, instruction->elem_index);
8331076 fprintf(irp->f, "]");
8341077 if (!instruction->safety_check_on) {
8351078 fprintf(irp->f, " // no safety");
8361079 }
8371080}
8381081
839static void ir_print_var_ptr(IrPrint *irp, IrInstructionVarPtr *instruction) {
1082static void ir_print_elem_ptr(IrPrintGen *irp, IrInstGenElemPtr *instruction) {
1083 fprintf(irp->f, "&");
1084 ir_print_other_inst_gen(irp, instruction->array_ptr);
1085 fprintf(irp->f, "[");
1086 ir_print_other_inst_gen(irp, instruction->elem_index);
1087 fprintf(irp->f, "]");
1088 if (!instruction->safety_check_on) {
1089 fprintf(irp->f, " // no safety");
1090 }
1091}
1092
1093static void ir_print_var_ptr(IrPrintSrc *irp, IrInstSrcVarPtr *instruction) {
1094 fprintf(irp->f, "&%s", instruction->var->name);
1095}
1096
1097static void ir_print_var_ptr(IrPrintGen *irp, IrInstGenVarPtr *instruction) {
8401098 fprintf(irp->f, "&%s", instruction->var->name);
8411099}
8421100
843static void ir_print_return_ptr(IrPrint *irp, IrInstructionReturnPtr *instruction) {
1101static void ir_print_return_ptr(IrPrintGen *irp, IrInstGenReturnPtr *instruction) {
8441102 fprintf(irp->f, "@ReturnPtr");
8451103}
8461104
847static void ir_print_load_ptr(IrPrint *irp, IrInstructionLoadPtr *instruction) {
848 ir_print_other_instruction(irp, instruction->ptr);
1105static void ir_print_load_ptr(IrPrintSrc *irp, IrInstSrcLoadPtr *instruction) {
1106 ir_print_other_inst_src(irp, instruction->ptr);
8491107 fprintf(irp->f, ".*");
8501108}
8511109
852static void ir_print_load_ptr_gen(IrPrint *irp, IrInstructionLoadPtrGen *instruction) {
1110static void ir_print_load_ptr_gen(IrPrintGen *irp, IrInstGenLoadPtr *instruction) {
8531111 fprintf(irp->f, "loadptr(");
854 ir_print_other_instruction(irp, instruction->ptr);
1112 ir_print_other_inst_gen(irp, instruction->ptr);
8551113 fprintf(irp->f, ")result=");
856 ir_print_other_instruction(irp, instruction->result_loc);
1114 ir_print_other_inst_gen(irp, instruction->result_loc);
1115}
1116
1117static void ir_print_store_ptr(IrPrintSrc *irp, IrInstSrcStorePtr *instruction) {
1118 fprintf(irp->f, "*");
1119 ir_print_var_src(irp, instruction->ptr);
1120 fprintf(irp->f, " = ");
1121 ir_print_other_inst_src(irp, instruction->value);
8571122}
8581123
859static void ir_print_store_ptr(IrPrint *irp, IrInstructionStorePtr *instruction) {
1124static void ir_print_store_ptr(IrPrintGen *irp, IrInstGenStorePtr *instruction) {
8601125 fprintf(irp->f, "*");
861 ir_print_var_instruction(irp, instruction->ptr);
1126 ir_print_var_gen(irp, instruction->ptr);
8621127 fprintf(irp->f, " = ");
863 ir_print_other_instruction(irp, instruction->value);
1128 ir_print_other_inst_gen(irp, instruction->value);
8641129}
8651130
866static void ir_print_vector_store_elem(IrPrint *irp, IrInstructionVectorStoreElem *instruction) {
1131static void ir_print_vector_store_elem(IrPrintGen *irp, IrInstGenVectorStoreElem *instruction) {
8671132 fprintf(irp->f, "vector_ptr=");
868 ir_print_var_instruction(irp, instruction->vector_ptr);
1133 ir_print_var_gen(irp, instruction->vector_ptr);
8691134 fprintf(irp->f, ",index=");
870 ir_print_var_instruction(irp, instruction->index);
1135 ir_print_var_gen(irp, instruction->index);
8711136 fprintf(irp->f, ",value=");
872 ir_print_other_instruction(irp, instruction->value);
1137 ir_print_other_inst_gen(irp, instruction->value);
8731138}
8741139
875static void ir_print_typeof(IrPrint *irp, IrInstructionTypeOf *instruction) {
1140static void ir_print_typeof(IrPrintSrc *irp, IrInstSrcTypeOf *instruction) {
8761141 fprintf(irp->f, "@TypeOf(");
877 ir_print_other_instruction(irp, instruction->value);
1142 ir_print_other_inst_src(irp, instruction->value);
8781143 fprintf(irp->f, ")");
8791144}
8801145
881static void ir_print_field_ptr(IrPrint *irp, IrInstructionFieldPtr *instruction) {
1146static void ir_print_binary_not(IrPrintGen *irp, IrInstGenBinaryNot *instruction) {
1147 fprintf(irp->f, "~");
1148 ir_print_other_inst_gen(irp, instruction->operand);
1149}
1150
1151static void ir_print_negation(IrPrintGen *irp, IrInstGenNegation *instruction) {
1152 fprintf(irp->f, "-");
1153 ir_print_other_inst_gen(irp, instruction->operand);
1154}
1155
1156static void ir_print_negation_wrapping(IrPrintGen *irp, IrInstGenNegationWrapping *instruction) {
1157 fprintf(irp->f, "-%%");
1158 ir_print_other_inst_gen(irp, instruction->operand);
1159}
1160
1161
1162static void ir_print_field_ptr(IrPrintSrc *irp, IrInstSrcFieldPtr *instruction) {
8821163 if (instruction->field_name_buffer) {
8831164 fprintf(irp->f, "fieldptr ");
884 ir_print_other_instruction(irp, instruction->container_ptr);
1165 ir_print_other_inst_src(irp, instruction->container_ptr);
8851166 fprintf(irp->f, ".%s", buf_ptr(instruction->field_name_buffer));
8861167 } else {
8871168 assert(instruction->field_name_expr);
8881169 fprintf(irp->f, "@field(");
889 ir_print_other_instruction(irp, instruction->container_ptr);
1170 ir_print_other_inst_src(irp, instruction->container_ptr);
8901171 fprintf(irp->f, ", ");
891 ir_print_other_instruction(irp, instruction->field_name_expr);
1172 ir_print_other_inst_src(irp, instruction->field_name_expr);
8921173 fprintf(irp->f, ")");
8931174 }
8941175}
8951176
896static void ir_print_struct_field_ptr(IrPrint *irp, IrInstructionStructFieldPtr *instruction) {
1177static void ir_print_struct_field_ptr(IrPrintGen *irp, IrInstGenStructFieldPtr *instruction) {
8971178 fprintf(irp->f, "@StructFieldPtr(&");
898 ir_print_other_instruction(irp, instruction->struct_ptr);
1179 ir_print_other_inst_gen(irp, instruction->struct_ptr);
8991180 fprintf(irp->f, ".%s", buf_ptr(instruction->field->name));
9001181 fprintf(irp->f, ")");
9011182}
9021183
903static void ir_print_union_field_ptr(IrPrint *irp, IrInstructionUnionFieldPtr *instruction) {
1184static void ir_print_union_field_ptr(IrPrintGen *irp, IrInstGenUnionFieldPtr *instruction) {
9041185 fprintf(irp->f, "@UnionFieldPtr(&");
905 ir_print_other_instruction(irp, instruction->union_ptr);
1186 ir_print_other_inst_gen(irp, instruction->union_ptr);
9061187 fprintf(irp->f, ".%s", buf_ptr(instruction->field->enum_field->name));
9071188 fprintf(irp->f, ")");
9081189}
9091190
910static void ir_print_set_cold(IrPrint *irp, IrInstructionSetCold *instruction) {
1191static void ir_print_set_cold(IrPrintSrc *irp, IrInstSrcSetCold *instruction) {
9111192 fprintf(irp->f, "@setCold(");
912 ir_print_other_instruction(irp, instruction->is_cold);
1193 ir_print_other_inst_src(irp, instruction->is_cold);
9131194 fprintf(irp->f, ")");
9141195}
9151196
916static void ir_print_set_runtime_safety(IrPrint *irp, IrInstructionSetRuntimeSafety *instruction) {
1197static void ir_print_set_runtime_safety(IrPrintSrc *irp, IrInstSrcSetRuntimeSafety *instruction) {
9171198 fprintf(irp->f, "@setRuntimeSafety(");
918 ir_print_other_instruction(irp, instruction->safety_on);
1199 ir_print_other_inst_src(irp, instruction->safety_on);
9191200 fprintf(irp->f, ")");
9201201}
9211202
922static void ir_print_set_float_mode(IrPrint *irp, IrInstructionSetFloatMode *instruction) {
1203static void ir_print_set_float_mode(IrPrintSrc *irp, IrInstSrcSetFloatMode *instruction) {
9231204 fprintf(irp->f, "@setFloatMode(");
924 ir_print_other_instruction(irp, instruction->scope_value);
1205 ir_print_other_inst_src(irp, instruction->scope_value);
9251206 fprintf(irp->f, ", ");
926 ir_print_other_instruction(irp, instruction->mode_value);
1207 ir_print_other_inst_src(irp, instruction->mode_value);
9271208 fprintf(irp->f, ")");
9281209}
9291210
930static void ir_print_array_type(IrPrint *irp, IrInstructionArrayType *instruction) {
1211static void ir_print_array_type(IrPrintSrc *irp, IrInstSrcArrayType *instruction) {
9311212 fprintf(irp->f, "[");
932 ir_print_other_instruction(irp, instruction->size);
1213 ir_print_other_inst_src(irp, instruction->size);
9331214 if (instruction->sentinel != nullptr) {
9341215 fprintf(irp->f, ":");
935 ir_print_other_instruction(irp, instruction->sentinel);
1216 ir_print_other_inst_src(irp, instruction->sentinel);
9361217 }
9371218 fprintf(irp->f, "]");
938 ir_print_other_instruction(irp, instruction->child_type);
1219 ir_print_other_inst_src(irp, instruction->child_type);
9391220}
9401221
941static void ir_print_slice_type(IrPrint *irp, IrInstructionSliceType *instruction) {
1222static void ir_print_slice_type(IrPrintSrc *irp, IrInstSrcSliceType *instruction) {
9421223 const char *const_kw = instruction->is_const ? "const " : "";
9431224 fprintf(irp->f, "[]%s", const_kw);
944 ir_print_other_instruction(irp, instruction->child_type);
1225 ir_print_other_inst_src(irp, instruction->child_type);
9451226}
9461227
947static void ir_print_any_frame_type(IrPrint *irp, IrInstructionAnyFrameType *instruction) {
1228static void ir_print_any_frame_type(IrPrintSrc *irp, IrInstSrcAnyFrameType *instruction) {
9481229 if (instruction->payload_type == nullptr) {
9491230 fprintf(irp->f, "anyframe");
9501231 } else {
9511232 fprintf(irp->f, "anyframe->");
952 ir_print_other_instruction(irp, instruction->payload_type);
1233 ir_print_other_inst_src(irp, instruction->payload_type);
9531234 }
9541235}
9551236
956static void ir_print_asm_src(IrPrint *irp, IrInstructionAsmSrc *instruction) {
957 assert(instruction->base.source_node->type == NodeTypeAsmExpr);
958 AstNodeAsmExpr *asm_expr = &instruction->base.source_node->data.asm_expr;
1237static void ir_print_asm_src(IrPrintSrc *irp, IrInstSrcAsm *instruction) {
1238 assert(instruction->base.base.source_node->type == NodeTypeAsmExpr);
1239 AstNodeAsmExpr *asm_expr = &instruction->base.base.source_node->data.asm_expr;
9591240 const char *volatile_kw = instruction->has_side_effects ? " volatile" : "";
9601241 fprintf(irp->f, "asm%s (", volatile_kw);
961 ir_print_other_instruction(irp, instruction->asm_template);
1242 ir_print_other_inst_src(irp, instruction->asm_template);
9621243
9631244 for (size_t i = 0; i < asm_expr->output_list.length; i += 1) {
9641245 AsmOutput *asm_output = asm_expr->output_list.at(i);
......@@ -969,7 +1250,7 @@ static void ir_print_asm_src(IrPrint *irp, IrInstructionAsmSrc *instruction) {
9691250 buf_ptr(asm_output->constraint));
9701251 if (asm_output->return_type) {
9711252 fprintf(irp->f, "-> ");
972 ir_print_other_instruction(irp, instruction->output_types[i]);
1253 ir_print_other_inst_src(irp, instruction->output_types[i]);
9731254 } else {
9741255 fprintf(irp->f, "%s", buf_ptr(asm_output->variable_name));
9751256 }
......@@ -984,7 +1265,7 @@ static void ir_print_asm_src(IrPrint *irp, IrInstructionAsmSrc *instruction) {
9841265 fprintf(irp->f, "[%s] \"%s\" (",
9851266 buf_ptr(asm_input->asm_symbolic_name),
9861267 buf_ptr(asm_input->constraint));
987 ir_print_other_instruction(irp, instruction->input_list[i]);
1268 ir_print_other_inst_src(irp, instruction->input_list[i]);
9881269 fprintf(irp->f, ")");
9891270 }
9901271 fprintf(irp->f, " : ");
......@@ -996,9 +1277,9 @@ static void ir_print_asm_src(IrPrint *irp, IrInstructionAsmSrc *instruction) {
9961277 fprintf(irp->f, ")");
9971278}
9981279
999static void ir_print_asm_gen(IrPrint *irp, IrInstructionAsmGen *instruction) {
1000 assert(instruction->base.source_node->type == NodeTypeAsmExpr);
1001 AstNodeAsmExpr *asm_expr = &instruction->base.source_node->data.asm_expr;
1280static void ir_print_asm_gen(IrPrintGen *irp, IrInstGenAsm *instruction) {
1281 assert(instruction->base.base.source_node->type == NodeTypeAsmExpr);
1282 AstNodeAsmExpr *asm_expr = &instruction->base.base.source_node->data.asm_expr;
10021283 const char *volatile_kw = instruction->has_side_effects ? " volatile" : "";
10031284 fprintf(irp->f, "asm%s (\"%s\") : ", volatile_kw, buf_ptr(instruction->asm_template));
10041285
......@@ -1011,7 +1292,7 @@ static void ir_print_asm_gen(IrPrint *irp, IrInstructionAsmGen *instruction) {
10111292 buf_ptr(asm_output->constraint));
10121293 if (asm_output->return_type) {
10131294 fprintf(irp->f, "-> ");
1014 ir_print_other_instruction(irp, instruction->output_types[i]);
1295 ir_print_other_inst_gen(irp, instruction->output_types[i]);
10151296 } else {
10161297 fprintf(irp->f, "%s", buf_ptr(asm_output->variable_name));
10171298 }
......@@ -1026,7 +1307,7 @@ static void ir_print_asm_gen(IrPrint *irp, IrInstructionAsmGen *instruction) {
10261307 fprintf(irp->f, "[%s] \"%s\" (",
10271308 buf_ptr(asm_input->asm_symbolic_name),
10281309 buf_ptr(asm_input->constraint));
1029 ir_print_other_instruction(irp, instruction->input_list[i]);
1310 ir_print_other_inst_gen(irp, instruction->input_list[i]);
10301311 fprintf(irp->f, ")");
10311312 }
10321313 fprintf(irp->f, " : ");
......@@ -1038,96 +1319,120 @@ static void ir_print_asm_gen(IrPrint *irp, IrInstructionAsmGen *instruction) {
10381319 fprintf(irp->f, ")");
10391320}
10401321
1041static void ir_print_size_of(IrPrint *irp, IrInstructionSizeOf *instruction) {
1322static void ir_print_size_of(IrPrintSrc *irp, IrInstSrcSizeOf *instruction) {
10421323 if (instruction->bit_size)
10431324 fprintf(irp->f, "@bitSizeOf(");
10441325 else
10451326 fprintf(irp->f, "@sizeOf(");
1046 ir_print_other_instruction(irp, instruction->type_value);
1327 ir_print_other_inst_src(irp, instruction->type_value);
10471328 fprintf(irp->f, ")");
10481329}
10491330
1050static void ir_print_test_non_null(IrPrint *irp, IrInstructionTestNonNull *instruction) {
1051 ir_print_other_instruction(irp, instruction->value);
1331static void ir_print_test_non_null(IrPrintSrc *irp, IrInstSrcTestNonNull *instruction) {
1332 ir_print_other_inst_src(irp, instruction->value);
1333 fprintf(irp->f, " != null");
1334}
1335
1336static void ir_print_test_non_null(IrPrintGen *irp, IrInstGenTestNonNull *instruction) {
1337 ir_print_other_inst_gen(irp, instruction->value);
10521338 fprintf(irp->f, " != null");
10531339}
10541340
1055static void ir_print_optional_unwrap_ptr(IrPrint *irp, IrInstructionOptionalUnwrapPtr *instruction) {
1341static void ir_print_optional_unwrap_ptr(IrPrintSrc *irp, IrInstSrcOptionalUnwrapPtr *instruction) {
10561342 fprintf(irp->f, "&");
1057 ir_print_other_instruction(irp, instruction->base_ptr);
1343 ir_print_other_inst_src(irp, instruction->base_ptr);
10581344 fprintf(irp->f, ".*.?");
10591345 if (!instruction->safety_check_on) {
10601346 fprintf(irp->f, " // no safety");
10611347 }
10621348}
10631349
1064static void ir_print_clz(IrPrint *irp, IrInstructionClz *instruction) {
1065 fprintf(irp->f, "@clz(");
1066 if (instruction->type != nullptr) {
1067 ir_print_other_instruction(irp, instruction->type);
1068 } else {
1069 fprintf(irp->f, "null");
1350static void ir_print_optional_unwrap_ptr(IrPrintGen *irp, IrInstGenOptionalUnwrapPtr *instruction) {
1351 fprintf(irp->f, "&");
1352 ir_print_other_inst_gen(irp, instruction->base_ptr);
1353 fprintf(irp->f, ".*.?");
1354 if (!instruction->safety_check_on) {
1355 fprintf(irp->f, " // no safety");
10701356 }
1357}
1358
1359static void ir_print_clz(IrPrintSrc *irp, IrInstSrcClz *instruction) {
1360 fprintf(irp->f, "@clz(");
1361 ir_print_other_inst_src(irp, instruction->type);
10711362 fprintf(irp->f, ",");
1072 ir_print_other_instruction(irp, instruction->op);
1363 ir_print_other_inst_src(irp, instruction->op);
10731364 fprintf(irp->f, ")");
10741365}
10751366
1076static void ir_print_ctz(IrPrint *irp, IrInstructionCtz *instruction) {
1367static void ir_print_clz(IrPrintGen *irp, IrInstGenClz *instruction) {
1368 fprintf(irp->f, "@clz(");
1369 ir_print_other_inst_gen(irp, instruction->op);
1370 fprintf(irp->f, ")");
1371}
1372
1373static void ir_print_ctz(IrPrintSrc *irp, IrInstSrcCtz *instruction) {
10771374 fprintf(irp->f, "@ctz(");
1078 if (instruction->type != nullptr) {
1079 ir_print_other_instruction(irp, instruction->type);
1080 } else {
1081 fprintf(irp->f, "null");
1082 }
1375 ir_print_other_inst_src(irp, instruction->type);
10831376 fprintf(irp->f, ",");
1084 ir_print_other_instruction(irp, instruction->op);
1377 ir_print_other_inst_src(irp, instruction->op);
10851378 fprintf(irp->f, ")");
10861379}
10871380
1088static void ir_print_pop_count(IrPrint *irp, IrInstructionPopCount *instruction) {
1381static void ir_print_ctz(IrPrintGen *irp, IrInstGenCtz *instruction) {
1382 fprintf(irp->f, "@ctz(");
1383 ir_print_other_inst_gen(irp, instruction->op);
1384 fprintf(irp->f, ")");
1385}
1386
1387static void ir_print_pop_count(IrPrintSrc *irp, IrInstSrcPopCount *instruction) {
10891388 fprintf(irp->f, "@popCount(");
1090 if (instruction->type != nullptr) {
1091 ir_print_other_instruction(irp, instruction->type);
1092 } else {
1093 fprintf(irp->f, "null");
1094 }
1389 ir_print_other_inst_src(irp, instruction->type);
10951390 fprintf(irp->f, ",");
1096 ir_print_other_instruction(irp, instruction->op);
1391 ir_print_other_inst_src(irp, instruction->op);
10971392 fprintf(irp->f, ")");
10981393}
10991394
1100static void ir_print_bswap(IrPrint *irp, IrInstructionBswap *instruction) {
1395static void ir_print_pop_count(IrPrintGen *irp, IrInstGenPopCount *instruction) {
1396 fprintf(irp->f, "@popCount(");
1397 ir_print_other_inst_gen(irp, instruction->op);
1398 fprintf(irp->f, ")");
1399}
1400
1401static void ir_print_bswap(IrPrintSrc *irp, IrInstSrcBswap *instruction) {
11011402 fprintf(irp->f, "@byteSwap(");
1102 if (instruction->type != nullptr) {
1103 ir_print_other_instruction(irp, instruction->type);
1104 } else {
1105 fprintf(irp->f, "null");
1106 }
1403 ir_print_other_inst_src(irp, instruction->type);
11071404 fprintf(irp->f, ",");
1108 ir_print_other_instruction(irp, instruction->op);
1405 ir_print_other_inst_src(irp, instruction->op);
11091406 fprintf(irp->f, ")");
11101407}
11111408
1112static void ir_print_bit_reverse(IrPrint *irp, IrInstructionBitReverse *instruction) {
1409static void ir_print_bswap(IrPrintGen *irp, IrInstGenBswap *instruction) {
1410 fprintf(irp->f, "@byteSwap(");
1411 ir_print_other_inst_gen(irp, instruction->op);
1412 fprintf(irp->f, ")");
1413}
1414
1415static void ir_print_bit_reverse(IrPrintSrc *irp, IrInstSrcBitReverse *instruction) {
11131416 fprintf(irp->f, "@bitReverse(");
1114 if (instruction->type != nullptr) {
1115 ir_print_other_instruction(irp, instruction->type);
1116 } else {
1117 fprintf(irp->f, "null");
1118 }
1417 ir_print_other_inst_src(irp, instruction->type);
11191418 fprintf(irp->f, ",");
1120 ir_print_other_instruction(irp, instruction->op);
1419 ir_print_other_inst_src(irp, instruction->op);
11211420 fprintf(irp->f, ")");
11221421}
11231422
1124static void ir_print_switch_br(IrPrint *irp, IrInstructionSwitchBr *instruction) {
1423static void ir_print_bit_reverse(IrPrintGen *irp, IrInstGenBitReverse *instruction) {
1424 fprintf(irp->f, "@bitReverse(");
1425 ir_print_other_inst_gen(irp, instruction->op);
1426 fprintf(irp->f, ")");
1427}
1428
1429static void ir_print_switch_br(IrPrintSrc *irp, IrInstSrcSwitchBr *instruction) {
11251430 fprintf(irp->f, "switch (");
1126 ir_print_other_instruction(irp, instruction->target_value);
1431 ir_print_other_inst_src(irp, instruction->target_value);
11271432 fprintf(irp->f, ") ");
11281433 for (size_t i = 0; i < instruction->case_count; i += 1) {
1129 IrInstructionSwitchBrCase *this_case = &instruction->cases[i];
1130 ir_print_other_instruction(irp, this_case->value);
1434 IrInstSrcSwitchBrCase *this_case = &instruction->cases[i];
1435 ir_print_other_inst_src(irp, this_case->value);
11311436 fprintf(irp->f, " => ");
11321437 ir_print_other_block(irp, this_case->block);
11331438 fprintf(irp->f, ", ");
......@@ -1136,359 +1441,453 @@ static void ir_print_switch_br(IrPrint *irp, IrInstructionSwitchBr *instruction)
11361441 ir_print_other_block(irp, instruction->else_block);
11371442 if (instruction->is_comptime != nullptr) {
11381443 fprintf(irp->f, " // comptime = ");
1139 ir_print_other_instruction(irp, instruction->is_comptime);
1444 ir_print_other_inst_src(irp, instruction->is_comptime);
1445 }
1446}
1447
1448static void ir_print_switch_br(IrPrintGen *irp, IrInstGenSwitchBr *instruction) {
1449 fprintf(irp->f, "switch (");
1450 ir_print_other_inst_gen(irp, instruction->target_value);
1451 fprintf(irp->f, ") ");
1452 for (size_t i = 0; i < instruction->case_count; i += 1) {
1453 IrInstGenSwitchBrCase *this_case = &instruction->cases[i];
1454 ir_print_other_inst_gen(irp, this_case->value);
1455 fprintf(irp->f, " => ");
1456 ir_print_other_block_gen(irp, this_case->block);
1457 fprintf(irp->f, ", ");
11401458 }
1459 fprintf(irp->f, "else => ");
1460 ir_print_other_block_gen(irp, instruction->else_block);
11411461}
11421462
1143static void ir_print_switch_var(IrPrint *irp, IrInstructionSwitchVar *instruction) {
1463static void ir_print_switch_var(IrPrintSrc *irp, IrInstSrcSwitchVar *instruction) {
11441464 fprintf(irp->f, "switchvar ");
1145 ir_print_other_instruction(irp, instruction->target_value_ptr);
1465 ir_print_other_inst_src(irp, instruction->target_value_ptr);
11461466 for (size_t i = 0; i < instruction->prongs_len; i += 1) {
11471467 fprintf(irp->f, ", ");
1148 ir_print_other_instruction(irp, instruction->prongs_ptr[i]);
1468 ir_print_other_inst_src(irp, instruction->prongs_ptr[i]);
11491469 }
11501470}
11511471
1152static void ir_print_switch_else_var(IrPrint *irp, IrInstructionSwitchElseVar *instruction) {
1472static void ir_print_switch_else_var(IrPrintSrc *irp, IrInstSrcSwitchElseVar *instruction) {
11531473 fprintf(irp->f, "switchelsevar ");
1154 ir_print_other_instruction(irp, &instruction->switch_br->base);
1474 ir_print_other_inst_src(irp, &instruction->switch_br->base);
11551475}
11561476
1157static void ir_print_switch_target(IrPrint *irp, IrInstructionSwitchTarget *instruction) {
1477static void ir_print_switch_target(IrPrintSrc *irp, IrInstSrcSwitchTarget *instruction) {
11581478 fprintf(irp->f, "switchtarget ");
1159 ir_print_other_instruction(irp, instruction->target_value_ptr);
1479 ir_print_other_inst_src(irp, instruction->target_value_ptr);
11601480}
11611481
1162static void ir_print_union_tag(IrPrint *irp, IrInstructionUnionTag *instruction) {
1482static void ir_print_union_tag(IrPrintGen *irp, IrInstGenUnionTag *instruction) {
11631483 fprintf(irp->f, "uniontag ");
1164 ir_print_other_instruction(irp, instruction->value);
1484 ir_print_other_inst_gen(irp, instruction->value);
11651485}
11661486
1167static void ir_print_import(IrPrint *irp, IrInstructionImport *instruction) {
1487static void ir_print_import(IrPrintSrc *irp, IrInstSrcImport *instruction) {
11681488 fprintf(irp->f, "@import(");
1169 ir_print_other_instruction(irp, instruction->name);
1489 ir_print_other_inst_src(irp, instruction->name);
11701490 fprintf(irp->f, ")");
11711491}
11721492
1173static void ir_print_ref(IrPrint *irp, IrInstructionRef *instruction) {
1493static void ir_print_ref(IrPrintSrc *irp, IrInstSrcRef *instruction) {
11741494 const char *const_str = instruction->is_const ? "const " : "";
11751495 const char *volatile_str = instruction->is_volatile ? "volatile " : "";
11761496 fprintf(irp->f, "%s%sref ", const_str, volatile_str);
1177 ir_print_other_instruction(irp, instruction->value);
1497 ir_print_other_inst_src(irp, instruction->value);
11781498}
11791499
1180static void ir_print_ref_gen(IrPrint *irp, IrInstructionRefGen *instruction) {
1500static void ir_print_ref_gen(IrPrintGen *irp, IrInstGenRef *instruction) {
11811501 fprintf(irp->f, "@ref(");
1182 ir_print_other_instruction(irp, instruction->operand);
1502 ir_print_other_inst_gen(irp, instruction->operand);
11831503 fprintf(irp->f, ")result=");
1184 ir_print_other_instruction(irp, instruction->result_loc);
1504 ir_print_other_inst_gen(irp, instruction->result_loc);
11851505}
11861506
1187static void ir_print_compile_err(IrPrint *irp, IrInstructionCompileErr *instruction) {
1507static void ir_print_compile_err(IrPrintSrc *irp, IrInstSrcCompileErr *instruction) {
11881508 fprintf(irp->f, "@compileError(");
1189 ir_print_other_instruction(irp, instruction->msg);
1509 ir_print_other_inst_src(irp, instruction->msg);
11901510 fprintf(irp->f, ")");
11911511}
11921512
1193static void ir_print_compile_log(IrPrint *irp, IrInstructionCompileLog *instruction) {
1513static void ir_print_compile_log(IrPrintSrc *irp, IrInstSrcCompileLog *instruction) {
11941514 fprintf(irp->f, "@compileLog(");
11951515 for (size_t i = 0; i < instruction->msg_count; i += 1) {
11961516 if (i != 0)
11971517 fprintf(irp->f, ",");
1198 IrInstruction *msg = instruction->msg_list[i];
1199 ir_print_other_instruction(irp, msg);
1518 IrInstSrc *msg = instruction->msg_list[i];
1519 ir_print_other_inst_src(irp, msg);
12001520 }
12011521 fprintf(irp->f, ")");
12021522}
12031523
1204static void ir_print_err_name(IrPrint *irp, IrInstructionErrName *instruction) {
1524static void ir_print_err_name(IrPrintSrc *irp, IrInstSrcErrName *instruction) {
12051525 fprintf(irp->f, "@errorName(");
1206 ir_print_other_instruction(irp, instruction->value);
1526 ir_print_other_inst_src(irp, instruction->value);
12071527 fprintf(irp->f, ")");
12081528}
12091529
1210static void ir_print_c_import(IrPrint *irp, IrInstructionCImport *instruction) {
1530static void ir_print_err_name(IrPrintGen *irp, IrInstGenErrName *instruction) {
1531 fprintf(irp->f, "@errorName(");
1532 ir_print_other_inst_gen(irp, instruction->value);
1533 fprintf(irp->f, ")");
1534}
1535
1536static void ir_print_c_import(IrPrintSrc *irp, IrInstSrcCImport *instruction) {
12111537 fprintf(irp->f, "@cImport(...)");
12121538}
12131539
1214static void ir_print_c_include(IrPrint *irp, IrInstructionCInclude *instruction) {
1540static void ir_print_c_include(IrPrintSrc *irp, IrInstSrcCInclude *instruction) {
12151541 fprintf(irp->f, "@cInclude(");
1216 ir_print_other_instruction(irp, instruction->name);
1542 ir_print_other_inst_src(irp, instruction->name);
12171543 fprintf(irp->f, ")");
12181544}
12191545
1220static void ir_print_c_define(IrPrint *irp, IrInstructionCDefine *instruction) {
1546static void ir_print_c_define(IrPrintSrc *irp, IrInstSrcCDefine *instruction) {
12211547 fprintf(irp->f, "@cDefine(");
1222 ir_print_other_instruction(irp, instruction->name);
1548 ir_print_other_inst_src(irp, instruction->name);
12231549 fprintf(irp->f, ", ");
1224 ir_print_other_instruction(irp, instruction->value);
1550 ir_print_other_inst_src(irp, instruction->value);
12251551 fprintf(irp->f, ")");
12261552}
12271553
1228static void ir_print_c_undef(IrPrint *irp, IrInstructionCUndef *instruction) {
1554static void ir_print_c_undef(IrPrintSrc *irp, IrInstSrcCUndef *instruction) {
12291555 fprintf(irp->f, "@cUndef(");
1230 ir_print_other_instruction(irp, instruction->name);
1556 ir_print_other_inst_src(irp, instruction->name);
12311557 fprintf(irp->f, ")");
12321558}
12331559
1234static void ir_print_embed_file(IrPrint *irp, IrInstructionEmbedFile *instruction) {
1560static void ir_print_embed_file(IrPrintSrc *irp, IrInstSrcEmbedFile *instruction) {
12351561 fprintf(irp->f, "@embedFile(");
1236 ir_print_other_instruction(irp, instruction->name);
1562 ir_print_other_inst_src(irp, instruction->name);
12371563 fprintf(irp->f, ")");
12381564}
12391565
1240static void ir_print_cmpxchg_src(IrPrint *irp, IrInstructionCmpxchgSrc *instruction) {
1566static void ir_print_cmpxchg_src(IrPrintSrc *irp, IrInstSrcCmpxchg *instruction) {
12411567 fprintf(irp->f, "@cmpxchg(");
1242 ir_print_other_instruction(irp, instruction->ptr);
1568 ir_print_other_inst_src(irp, instruction->ptr);
12431569 fprintf(irp->f, ", ");
1244 ir_print_other_instruction(irp, instruction->cmp_value);
1570 ir_print_other_inst_src(irp, instruction->cmp_value);
12451571 fprintf(irp->f, ", ");
1246 ir_print_other_instruction(irp, instruction->new_value);
1572 ir_print_other_inst_src(irp, instruction->new_value);
12471573 fprintf(irp->f, ", ");
1248 ir_print_other_instruction(irp, instruction->success_order_value);
1574 ir_print_other_inst_src(irp, instruction->success_order_value);
12491575 fprintf(irp->f, ", ");
1250 ir_print_other_instruction(irp, instruction->failure_order_value);
1576 ir_print_other_inst_src(irp, instruction->failure_order_value);
12511577 fprintf(irp->f, ")result=");
12521578 ir_print_result_loc(irp, instruction->result_loc);
12531579}
12541580
1255static void ir_print_cmpxchg_gen(IrPrint *irp, IrInstructionCmpxchgGen *instruction) {
1581static void ir_print_cmpxchg_gen(IrPrintGen *irp, IrInstGenCmpxchg *instruction) {
12561582 fprintf(irp->f, "@cmpxchg(");
1257 ir_print_other_instruction(irp, instruction->ptr);
1583 ir_print_other_inst_gen(irp, instruction->ptr);
12581584 fprintf(irp->f, ", ");
1259 ir_print_other_instruction(irp, instruction->cmp_value);
1585 ir_print_other_inst_gen(irp, instruction->cmp_value);
12601586 fprintf(irp->f, ", ");
1261 ir_print_other_instruction(irp, instruction->new_value);
1587 ir_print_other_inst_gen(irp, instruction->new_value);
12621588 fprintf(irp->f, ", TODO print atomic orders)result=");
1263 ir_print_other_instruction(irp, instruction->result_loc);
1589 ir_print_other_inst_gen(irp, instruction->result_loc);
12641590}
12651591
1266static void ir_print_fence(IrPrint *irp, IrInstructionFence *instruction) {
1592static void ir_print_fence(IrPrintSrc *irp, IrInstSrcFence *instruction) {
12671593 fprintf(irp->f, "@fence(");
1268 ir_print_other_instruction(irp, instruction->order_value);
1594 ir_print_other_inst_src(irp, instruction->order);
12691595 fprintf(irp->f, ")");
12701596}
12711597
1272static void ir_print_truncate(IrPrint *irp, IrInstructionTruncate *instruction) {
1598static const char *atomic_order_str(AtomicOrder order) {
1599 switch (order) {
1600 case AtomicOrderUnordered: return "Unordered";
1601 case AtomicOrderMonotonic: return "Monotonic";
1602 case AtomicOrderAcquire: return "Acquire";
1603 case AtomicOrderRelease: return "Release";
1604 case AtomicOrderAcqRel: return "AcqRel";
1605 case AtomicOrderSeqCst: return "SeqCst";
1606 }
1607 zig_unreachable();
1608}
1609
1610static void ir_print_fence(IrPrintGen *irp, IrInstGenFence *instruction) {
1611 fprintf(irp->f, "fence %s", atomic_order_str(instruction->order));
1612}
1613
1614static void ir_print_truncate(IrPrintSrc *irp, IrInstSrcTruncate *instruction) {
12731615 fprintf(irp->f, "@truncate(");
1274 ir_print_other_instruction(irp, instruction->dest_type);
1616 ir_print_other_inst_src(irp, instruction->dest_type);
12751617 fprintf(irp->f, ", ");
1276 ir_print_other_instruction(irp, instruction->target);
1618 ir_print_other_inst_src(irp, instruction->target);
12771619 fprintf(irp->f, ")");
12781620}
12791621
1280static void ir_print_int_cast(IrPrint *irp, IrInstructionIntCast *instruction) {
1622static void ir_print_truncate(IrPrintGen *irp, IrInstGenTruncate *instruction) {
1623 fprintf(irp->f, "@truncate(");
1624 ir_print_other_inst_gen(irp, instruction->target);
1625 fprintf(irp->f, ")");
1626}
1627
1628static void ir_print_int_cast(IrPrintSrc *irp, IrInstSrcIntCast *instruction) {
12811629 fprintf(irp->f, "@intCast(");
1282 ir_print_other_instruction(irp, instruction->dest_type);
1630 ir_print_other_inst_src(irp, instruction->dest_type);
12831631 fprintf(irp->f, ", ");
1284 ir_print_other_instruction(irp, instruction->target);
1632 ir_print_other_inst_src(irp, instruction->target);
12851633 fprintf(irp->f, ")");
12861634}
12871635
1288static void ir_print_float_cast(IrPrint *irp, IrInstructionFloatCast *instruction) {
1636static void ir_print_float_cast(IrPrintSrc *irp, IrInstSrcFloatCast *instruction) {
12891637 fprintf(irp->f, "@floatCast(");
1290 ir_print_other_instruction(irp, instruction->dest_type);
1638 ir_print_other_inst_src(irp, instruction->dest_type);
12911639 fprintf(irp->f, ", ");
1292 ir_print_other_instruction(irp, instruction->target);
1640 ir_print_other_inst_src(irp, instruction->target);
12931641 fprintf(irp->f, ")");
12941642}
12951643
1296static void ir_print_err_set_cast(IrPrint *irp, IrInstructionErrSetCast *instruction) {
1644static void ir_print_err_set_cast(IrPrintSrc *irp, IrInstSrcErrSetCast *instruction) {
12971645 fprintf(irp->f, "@errSetCast(");
1298 ir_print_other_instruction(irp, instruction->dest_type);
1646 ir_print_other_inst_src(irp, instruction->dest_type);
12991647 fprintf(irp->f, ", ");
1300 ir_print_other_instruction(irp, instruction->target);
1648 ir_print_other_inst_src(irp, instruction->target);
13011649 fprintf(irp->f, ")");
13021650}
13031651
1304static void ir_print_from_bytes(IrPrint *irp, IrInstructionFromBytes *instruction) {
1652static void ir_print_from_bytes(IrPrintSrc *irp, IrInstSrcFromBytes *instruction) {
13051653 fprintf(irp->f, "@bytesToSlice(");
1306 ir_print_other_instruction(irp, instruction->dest_child_type);
1654 ir_print_other_inst_src(irp, instruction->dest_child_type);
13071655 fprintf(irp->f, ", ");
1308 ir_print_other_instruction(irp, instruction->target);
1656 ir_print_other_inst_src(irp, instruction->target);
13091657 fprintf(irp->f, ")");
13101658}
13111659
1312static void ir_print_to_bytes(IrPrint *irp, IrInstructionToBytes *instruction) {
1660static void ir_print_to_bytes(IrPrintSrc *irp, IrInstSrcToBytes *instruction) {
13131661 fprintf(irp->f, "@sliceToBytes(");
1314 ir_print_other_instruction(irp, instruction->target);
1662 ir_print_other_inst_src(irp, instruction->target);
13151663 fprintf(irp->f, ")");
13161664}
13171665
1318static void ir_print_int_to_float(IrPrint *irp, IrInstructionIntToFloat *instruction) {
1666static void ir_print_int_to_float(IrPrintSrc *irp, IrInstSrcIntToFloat *instruction) {
13191667 fprintf(irp->f, "@intToFloat(");
1320 ir_print_other_instruction(irp, instruction->dest_type);
1668 ir_print_other_inst_src(irp, instruction->dest_type);
13211669 fprintf(irp->f, ", ");
1322 ir_print_other_instruction(irp, instruction->target);
1670 ir_print_other_inst_src(irp, instruction->target);
13231671 fprintf(irp->f, ")");
13241672}
13251673
1326static void ir_print_float_to_int(IrPrint *irp, IrInstructionFloatToInt *instruction) {
1674static void ir_print_float_to_int(IrPrintSrc *irp, IrInstSrcFloatToInt *instruction) {
13271675 fprintf(irp->f, "@floatToInt(");
1328 ir_print_other_instruction(irp, instruction->dest_type);
1676 ir_print_other_inst_src(irp, instruction->dest_type);
13291677 fprintf(irp->f, ", ");
1330 ir_print_other_instruction(irp, instruction->target);
1678 ir_print_other_inst_src(irp, instruction->target);
13311679 fprintf(irp->f, ")");
13321680}
13331681
1334static void ir_print_bool_to_int(IrPrint *irp, IrInstructionBoolToInt *instruction) {
1682static void ir_print_bool_to_int(IrPrintSrc *irp, IrInstSrcBoolToInt *instruction) {
13351683 fprintf(irp->f, "@boolToInt(");
1336 ir_print_other_instruction(irp, instruction->target);
1684 ir_print_other_inst_src(irp, instruction->target);
13371685 fprintf(irp->f, ")");
13381686}
13391687
1340static void ir_print_int_type(IrPrint *irp, IrInstructionIntType *instruction) {
1688static void ir_print_int_type(IrPrintSrc *irp, IrInstSrcIntType *instruction) {
13411689 fprintf(irp->f, "@IntType(");
1342 ir_print_other_instruction(irp, instruction->is_signed);
1690 ir_print_other_inst_src(irp, instruction->is_signed);
13431691 fprintf(irp->f, ", ");
1344 ir_print_other_instruction(irp, instruction->bit_count);
1692 ir_print_other_inst_src(irp, instruction->bit_count);
13451693 fprintf(irp->f, ")");
13461694}
13471695
1348static void ir_print_vector_type(IrPrint *irp, IrInstructionVectorType *instruction) {
1696static void ir_print_vector_type(IrPrintSrc *irp, IrInstSrcVectorType *instruction) {
13491697 fprintf(irp->f, "@Vector(");
1350 ir_print_other_instruction(irp, instruction->len);
1698 ir_print_other_inst_src(irp, instruction->len);
13511699 fprintf(irp->f, ", ");
1352 ir_print_other_instruction(irp, instruction->elem_type);
1700 ir_print_other_inst_src(irp, instruction->elem_type);
13531701 fprintf(irp->f, ")");
13541702}
13551703
1356static void ir_print_shuffle_vector(IrPrint *irp, IrInstructionShuffleVector *instruction) {
1704static void ir_print_shuffle_vector(IrPrintSrc *irp, IrInstSrcShuffleVector *instruction) {
13571705 fprintf(irp->f, "@shuffle(");
1358 ir_print_other_instruction(irp, instruction->scalar_type);
1706 ir_print_other_inst_src(irp, instruction->scalar_type);
13591707 fprintf(irp->f, ", ");
1360 ir_print_other_instruction(irp, instruction->a);
1708 ir_print_other_inst_src(irp, instruction->a);
13611709 fprintf(irp->f, ", ");
1362 ir_print_other_instruction(irp, instruction->b);
1710 ir_print_other_inst_src(irp, instruction->b);
13631711 fprintf(irp->f, ", ");
1364 ir_print_other_instruction(irp, instruction->mask);
1712 ir_print_other_inst_src(irp, instruction->mask);
13651713 fprintf(irp->f, ")");
13661714}
13671715
1368static void ir_print_splat_src(IrPrint *irp, IrInstructionSplatSrc *instruction) {
1716static void ir_print_shuffle_vector(IrPrintGen *irp, IrInstGenShuffleVector *instruction) {
1717 fprintf(irp->f, "@shuffle(");
1718 ir_print_other_inst_gen(irp, instruction->a);
1719 fprintf(irp->f, ", ");
1720 ir_print_other_inst_gen(irp, instruction->b);
1721 fprintf(irp->f, ", ");
1722 ir_print_other_inst_gen(irp, instruction->mask);
1723 fprintf(irp->f, ")");
1724}
1725
1726static void ir_print_splat_src(IrPrintSrc *irp, IrInstSrcSplat *instruction) {
13691727 fprintf(irp->f, "@splat(");
1370 ir_print_other_instruction(irp, instruction->len);
1728 ir_print_other_inst_src(irp, instruction->len);
13711729 fprintf(irp->f, ", ");
1372 ir_print_other_instruction(irp, instruction->scalar);
1730 ir_print_other_inst_src(irp, instruction->scalar);
13731731 fprintf(irp->f, ")");
13741732}
13751733
1376static void ir_print_splat_gen(IrPrint *irp, IrInstructionSplatGen *instruction) {
1734static void ir_print_splat_gen(IrPrintGen *irp, IrInstGenSplat *instruction) {
13771735 fprintf(irp->f, "@splat(");
1378 ir_print_other_instruction(irp, instruction->scalar);
1736 ir_print_other_inst_gen(irp, instruction->scalar);
13791737 fprintf(irp->f, ")");
13801738}
13811739
1382static void ir_print_bool_not(IrPrint *irp, IrInstructionBoolNot *instruction) {
1740static void ir_print_bool_not(IrPrintSrc *irp, IrInstSrcBoolNot *instruction) {
1741 fprintf(irp->f, "! ");
1742 ir_print_other_inst_src(irp, instruction->value);
1743}
1744
1745static void ir_print_bool_not(IrPrintGen *irp, IrInstGenBoolNot *instruction) {
13831746 fprintf(irp->f, "! ");
1384 ir_print_other_instruction(irp, instruction->value);
1747 ir_print_other_inst_gen(irp, instruction->value);
13851748}
13861749
1387static void ir_print_memset(IrPrint *irp, IrInstructionMemset *instruction) {
1750static void ir_print_memset(IrPrintSrc *irp, IrInstSrcMemset *instruction) {
13881751 fprintf(irp->f, "@memset(");
1389 ir_print_other_instruction(irp, instruction->dest_ptr);
1752 ir_print_other_inst_src(irp, instruction->dest_ptr);
1753 fprintf(irp->f, ", ");
1754 ir_print_other_inst_src(irp, instruction->byte);
1755 fprintf(irp->f, ", ");
1756 ir_print_other_inst_src(irp, instruction->count);
1757 fprintf(irp->f, ")");
1758}
1759
1760static void ir_print_memset(IrPrintGen *irp, IrInstGenMemset *instruction) {
1761 fprintf(irp->f, "@memset(");
1762 ir_print_other_inst_gen(irp, instruction->dest_ptr);
1763 fprintf(irp->f, ", ");
1764 ir_print_other_inst_gen(irp, instruction->byte);
1765 fprintf(irp->f, ", ");
1766 ir_print_other_inst_gen(irp, instruction->count);
1767 fprintf(irp->f, ")");
1768}
1769
1770static void ir_print_memcpy(IrPrintSrc *irp, IrInstSrcMemcpy *instruction) {
1771 fprintf(irp->f, "@memcpy(");
1772 ir_print_other_inst_src(irp, instruction->dest_ptr);
13901773 fprintf(irp->f, ", ");
1391 ir_print_other_instruction(irp, instruction->byte);
1774 ir_print_other_inst_src(irp, instruction->src_ptr);
13921775 fprintf(irp->f, ", ");
1393 ir_print_other_instruction(irp, instruction->count);
1776 ir_print_other_inst_src(irp, instruction->count);
13941777 fprintf(irp->f, ")");
13951778}
13961779
1397static void ir_print_memcpy(IrPrint *irp, IrInstructionMemcpy *instruction) {
1780static void ir_print_memcpy(IrPrintGen *irp, IrInstGenMemcpy *instruction) {
13981781 fprintf(irp->f, "@memcpy(");
1399 ir_print_other_instruction(irp, instruction->dest_ptr);
1782 ir_print_other_inst_gen(irp, instruction->dest_ptr);
14001783 fprintf(irp->f, ", ");
1401 ir_print_other_instruction(irp, instruction->src_ptr);
1784 ir_print_other_inst_gen(irp, instruction->src_ptr);
14021785 fprintf(irp->f, ", ");
1403 ir_print_other_instruction(irp, instruction->count);
1786 ir_print_other_inst_gen(irp, instruction->count);
14041787 fprintf(irp->f, ")");
14051788}
14061789
1407static void ir_print_slice_src(IrPrint *irp, IrInstructionSliceSrc *instruction) {
1408 ir_print_other_instruction(irp, instruction->ptr);
1790static void ir_print_slice_src(IrPrintSrc *irp, IrInstSrcSlice *instruction) {
1791 ir_print_other_inst_src(irp, instruction->ptr);
14091792 fprintf(irp->f, "[");
1410 ir_print_other_instruction(irp, instruction->start);
1793 ir_print_other_inst_src(irp, instruction->start);
14111794 fprintf(irp->f, "..");
14121795 if (instruction->end)
1413 ir_print_other_instruction(irp, instruction->end);
1796 ir_print_other_inst_src(irp, instruction->end);
14141797 fprintf(irp->f, "]result=");
14151798 ir_print_result_loc(irp, instruction->result_loc);
14161799}
14171800
1418static void ir_print_slice_gen(IrPrint *irp, IrInstructionSliceGen *instruction) {
1419 ir_print_other_instruction(irp, instruction->ptr);
1801static void ir_print_slice_gen(IrPrintGen *irp, IrInstGenSlice *instruction) {
1802 ir_print_other_inst_gen(irp, instruction->ptr);
14201803 fprintf(irp->f, "[");
1421 ir_print_other_instruction(irp, instruction->start);
1804 ir_print_other_inst_gen(irp, instruction->start);
14221805 fprintf(irp->f, "..");
14231806 if (instruction->end)
1424 ir_print_other_instruction(irp, instruction->end);
1807 ir_print_other_inst_gen(irp, instruction->end);
14251808 fprintf(irp->f, "]result=");
1426 ir_print_other_instruction(irp, instruction->result_loc);
1809 ir_print_other_inst_gen(irp, instruction->result_loc);
14271810}
14281811
1429static void ir_print_member_count(IrPrint *irp, IrInstructionMemberCount *instruction) {
1812static void ir_print_member_count(IrPrintSrc *irp, IrInstSrcMemberCount *instruction) {
14301813 fprintf(irp->f, "@memberCount(");
1431 ir_print_other_instruction(irp, instruction->container);
1814 ir_print_other_inst_src(irp, instruction->container);
14321815 fprintf(irp->f, ")");
14331816}
14341817
1435static void ir_print_member_type(IrPrint *irp, IrInstructionMemberType *instruction) {
1818static void ir_print_member_type(IrPrintSrc *irp, IrInstSrcMemberType *instruction) {
14361819 fprintf(irp->f, "@memberType(");
1437 ir_print_other_instruction(irp, instruction->container_type);
1820 ir_print_other_inst_src(irp, instruction->container_type);
14381821 fprintf(irp->f, ", ");
1439 ir_print_other_instruction(irp, instruction->member_index);
1822 ir_print_other_inst_src(irp, instruction->member_index);
14401823 fprintf(irp->f, ")");
14411824}
14421825
1443static void ir_print_member_name(IrPrint *irp, IrInstructionMemberName *instruction) {
1826static void ir_print_member_name(IrPrintSrc *irp, IrInstSrcMemberName *instruction) {
14441827 fprintf(irp->f, "@memberName(");
1445 ir_print_other_instruction(irp, instruction->container_type);
1828 ir_print_other_inst_src(irp, instruction->container_type);
14461829 fprintf(irp->f, ", ");
1447 ir_print_other_instruction(irp, instruction->member_index);
1830 ir_print_other_inst_src(irp, instruction->member_index);
14481831 fprintf(irp->f, ")");
14491832}
14501833
1451static void ir_print_breakpoint(IrPrint *irp, IrInstructionBreakpoint *instruction) {
1834static void ir_print_breakpoint(IrPrintSrc *irp, IrInstSrcBreakpoint *instruction) {
1835 fprintf(irp->f, "@breakpoint()");
1836}
1837
1838static void ir_print_breakpoint(IrPrintGen *irp, IrInstGenBreakpoint *instruction) {
14521839 fprintf(irp->f, "@breakpoint()");
14531840}
14541841
1455static void ir_print_frame_address(IrPrint *irp, IrInstructionFrameAddress *instruction) {
1842static void ir_print_frame_address(IrPrintSrc *irp, IrInstSrcFrameAddress *instruction) {
1843 fprintf(irp->f, "@frameAddress()");
1844}
1845
1846static void ir_print_frame_address(IrPrintGen *irp, IrInstGenFrameAddress *instruction) {
14561847 fprintf(irp->f, "@frameAddress()");
14571848}
14581849
1459static void ir_print_handle(IrPrint *irp, IrInstructionFrameHandle *instruction) {
1850static void ir_print_handle(IrPrintSrc *irp, IrInstSrcFrameHandle *instruction) {
14601851 fprintf(irp->f, "@frame()");
14611852}
14621853
1463static void ir_print_frame_type(IrPrint *irp, IrInstructionFrameType *instruction) {
1854static void ir_print_handle(IrPrintGen *irp, IrInstGenFrameHandle *instruction) {
1855 fprintf(irp->f, "@frame()");
1856}
1857
1858static void ir_print_frame_type(IrPrintSrc *irp, IrInstSrcFrameType *instruction) {
14641859 fprintf(irp->f, "@Frame(");
1465 ir_print_other_instruction(irp, instruction->fn);
1860 ir_print_other_inst_src(irp, instruction->fn);
14661861 fprintf(irp->f, ")");
14671862}
14681863
1469static void ir_print_frame_size_src(IrPrint *irp, IrInstructionFrameSizeSrc *instruction) {
1864static void ir_print_frame_size_src(IrPrintSrc *irp, IrInstSrcFrameSize *instruction) {
14701865 fprintf(irp->f, "@frameSize(");
1471 ir_print_other_instruction(irp, instruction->fn);
1866 ir_print_other_inst_src(irp, instruction->fn);
14721867 fprintf(irp->f, ")");
14731868}
14741869
1475static void ir_print_frame_size_gen(IrPrint *irp, IrInstructionFrameSizeGen *instruction) {
1870static void ir_print_frame_size_gen(IrPrintGen *irp, IrInstGenFrameSize *instruction) {
14761871 fprintf(irp->f, "@frameSize(");
1477 ir_print_other_instruction(irp, instruction->fn);
1872 ir_print_other_inst_gen(irp, instruction->fn);
14781873 fprintf(irp->f, ")");
14791874}
14801875
1481static void ir_print_return_address(IrPrint *irp, IrInstructionReturnAddress *instruction) {
1876static void ir_print_return_address(IrPrintSrc *irp, IrInstSrcReturnAddress *instruction) {
1877 fprintf(irp->f, "@returnAddress()");
1878}
1879
1880static void ir_print_return_address(IrPrintGen *irp, IrInstGenReturnAddress *instruction) {
14821881 fprintf(irp->f, "@returnAddress()");
14831882}
14841883
1485static void ir_print_align_of(IrPrint *irp, IrInstructionAlignOf *instruction) {
1884static void ir_print_align_of(IrPrintSrc *irp, IrInstSrcAlignOf *instruction) {
14861885 fprintf(irp->f, "@alignOf(");
1487 ir_print_other_instruction(irp, instruction->type_value);
1886 ir_print_other_inst_src(irp, instruction->type_value);
14881887 fprintf(irp->f, ")");
14891888}
14901889
1491static void ir_print_overflow_op(IrPrint *irp, IrInstructionOverflowOp *instruction) {
1890static void ir_print_overflow_op(IrPrintSrc *irp, IrInstSrcOverflowOp *instruction) {
14921891 switch (instruction->op) {
14931892 case IrOverflowOpAdd:
14941893 fprintf(irp->f, "@addWithOverflow(");
......@@ -1503,1146 +1902,1457 @@ static void ir_print_overflow_op(IrPrint *irp, IrInstructionOverflowOp *instruct
15031902 fprintf(irp->f, "@shlWithOverflow(");
15041903 break;
15051904 }
1506 ir_print_other_instruction(irp, instruction->type_value);
1905 ir_print_other_inst_src(irp, instruction->type_value);
15071906 fprintf(irp->f, ", ");
1508 ir_print_other_instruction(irp, instruction->op1);
1907 ir_print_other_inst_src(irp, instruction->op1);
1908 fprintf(irp->f, ", ");
1909 ir_print_other_inst_src(irp, instruction->op2);
1910 fprintf(irp->f, ", ");
1911 ir_print_other_inst_src(irp, instruction->result_ptr);
1912 fprintf(irp->f, ")");
1913}
1914
1915static void ir_print_overflow_op(IrPrintGen *irp, IrInstGenOverflowOp *instruction) {
1916 switch (instruction->op) {
1917 case IrOverflowOpAdd:
1918 fprintf(irp->f, "@addWithOverflow(");
1919 break;
1920 case IrOverflowOpSub:
1921 fprintf(irp->f, "@subWithOverflow(");
1922 break;
1923 case IrOverflowOpMul:
1924 fprintf(irp->f, "@mulWithOverflow(");
1925 break;
1926 case IrOverflowOpShl:
1927 fprintf(irp->f, "@shlWithOverflow(");
1928 break;
1929 }
1930 ir_print_other_inst_gen(irp, instruction->op1);
15091931 fprintf(irp->f, ", ");
1510 ir_print_other_instruction(irp, instruction->op2);
1932 ir_print_other_inst_gen(irp, instruction->op2);
15111933 fprintf(irp->f, ", ");
1512 ir_print_other_instruction(irp, instruction->result_ptr);
1934 ir_print_other_inst_gen(irp, instruction->result_ptr);
15131935 fprintf(irp->f, ")");
15141936}
15151937
1516static void ir_print_test_err_src(IrPrint *irp, IrInstructionTestErrSrc *instruction) {
1938static void ir_print_test_err_src(IrPrintSrc *irp, IrInstSrcTestErr *instruction) {
15171939 fprintf(irp->f, "@testError(");
1518 ir_print_other_instruction(irp, instruction->base_ptr);
1940 ir_print_other_inst_src(irp, instruction->base_ptr);
15191941 fprintf(irp->f, ")");
15201942}
15211943
1522static void ir_print_test_err_gen(IrPrint *irp, IrInstructionTestErrGen *instruction) {
1944static void ir_print_test_err_gen(IrPrintGen *irp, IrInstGenTestErr *instruction) {
15231945 fprintf(irp->f, "@testError(");
1524 ir_print_other_instruction(irp, instruction->err_union);
1946 ir_print_other_inst_gen(irp, instruction->err_union);
1947 fprintf(irp->f, ")");
1948}
1949
1950static void ir_print_unwrap_err_code(IrPrintSrc *irp, IrInstSrcUnwrapErrCode *instruction) {
1951 fprintf(irp->f, "UnwrapErrorCode(");
1952 ir_print_other_inst_src(irp, instruction->err_union_ptr);
15251953 fprintf(irp->f, ")");
15261954}
15271955
1528static void ir_print_unwrap_err_code(IrPrint *irp, IrInstructionUnwrapErrCode *instruction) {
1956static void ir_print_unwrap_err_code(IrPrintGen *irp, IrInstGenUnwrapErrCode *instruction) {
15291957 fprintf(irp->f, "UnwrapErrorCode(");
1530 ir_print_other_instruction(irp, instruction->err_union_ptr);
1958 ir_print_other_inst_gen(irp, instruction->err_union_ptr);
15311959 fprintf(irp->f, ")");
15321960}
15331961
1534static void ir_print_unwrap_err_payload(IrPrint *irp, IrInstructionUnwrapErrPayload *instruction) {
1962static void ir_print_unwrap_err_payload(IrPrintSrc *irp, IrInstSrcUnwrapErrPayload *instruction) {
1963 fprintf(irp->f, "ErrorUnionFieldPayload(");
1964 ir_print_other_inst_src(irp, instruction->value);
1965 fprintf(irp->f, ")safety=%d,init=%d",instruction->safety_check_on, instruction->initializing);
1966}
1967
1968static void ir_print_unwrap_err_payload(IrPrintGen *irp, IrInstGenUnwrapErrPayload *instruction) {
15351969 fprintf(irp->f, "ErrorUnionFieldPayload(");
1536 ir_print_other_instruction(irp, instruction->value);
1970 ir_print_other_inst_gen(irp, instruction->value);
15371971 fprintf(irp->f, ")safety=%d,init=%d",instruction->safety_check_on, instruction->initializing);
15381972}
15391973
1540static void ir_print_optional_wrap(IrPrint *irp, IrInstructionOptionalWrap *instruction) {
1974static void ir_print_optional_wrap(IrPrintGen *irp, IrInstGenOptionalWrap *instruction) {
15411975 fprintf(irp->f, "@optionalWrap(");
1542 ir_print_other_instruction(irp, instruction->operand);
1976 ir_print_other_inst_gen(irp, instruction->operand);
15431977 fprintf(irp->f, ")result=");
1544 ir_print_other_instruction(irp, instruction->result_loc);
1978 ir_print_other_inst_gen(irp, instruction->result_loc);
15451979}
15461980
1547static void ir_print_err_wrap_code(IrPrint *irp, IrInstructionErrWrapCode *instruction) {
1981static void ir_print_err_wrap_code(IrPrintGen *irp, IrInstGenErrWrapCode *instruction) {
15481982 fprintf(irp->f, "@errWrapCode(");
1549 ir_print_other_instruction(irp, instruction->operand);
1983 ir_print_other_inst_gen(irp, instruction->operand);
15501984 fprintf(irp->f, ")result=");
1551 ir_print_other_instruction(irp, instruction->result_loc);
1985 ir_print_other_inst_gen(irp, instruction->result_loc);
15521986}
15531987
1554static void ir_print_err_wrap_payload(IrPrint *irp, IrInstructionErrWrapPayload *instruction) {
1988static void ir_print_err_wrap_payload(IrPrintGen *irp, IrInstGenErrWrapPayload *instruction) {
15551989 fprintf(irp->f, "@errWrapPayload(");
1556 ir_print_other_instruction(irp, instruction->operand);
1990 ir_print_other_inst_gen(irp, instruction->operand);
15571991 fprintf(irp->f, ")result=");
1558 ir_print_other_instruction(irp, instruction->result_loc);
1992 ir_print_other_inst_gen(irp, instruction->result_loc);
15591993}
15601994
1561static void ir_print_fn_proto(IrPrint *irp, IrInstructionFnProto *instruction) {
1995static void ir_print_fn_proto(IrPrintSrc *irp, IrInstSrcFnProto *instruction) {
15621996 fprintf(irp->f, "fn(");
1563 for (size_t i = 0; i < instruction->base.source_node->data.fn_proto.params.length; i += 1) {
1997 for (size_t i = 0; i < instruction->base.base.source_node->data.fn_proto.params.length; i += 1) {
15641998 if (i != 0)
15651999 fprintf(irp->f, ",");
1566 if (instruction->is_var_args && i == instruction->base.source_node->data.fn_proto.params.length - 1) {
2000 if (instruction->is_var_args && i == instruction->base.base.source_node->data.fn_proto.params.length - 1) {
15672001 fprintf(irp->f, "...");
15682002 } else {
1569 ir_print_other_instruction(irp, instruction->param_types[i]);
2003 ir_print_other_inst_src(irp, instruction->param_types[i]);
15702004 }
15712005 }
15722006 fprintf(irp->f, ")");
15732007 if (instruction->align_value != nullptr) {
15742008 fprintf(irp->f, " align ");
1575 ir_print_other_instruction(irp, instruction->align_value);
2009 ir_print_other_inst_src(irp, instruction->align_value);
15762010 fprintf(irp->f, " ");
15772011 }
15782012 fprintf(irp->f, "->");
1579 ir_print_other_instruction(irp, instruction->return_type);
2013 ir_print_other_inst_src(irp, instruction->return_type);
15802014}
15812015
1582static void ir_print_test_comptime(IrPrint *irp, IrInstructionTestComptime *instruction) {
2016static void ir_print_test_comptime(IrPrintSrc *irp, IrInstSrcTestComptime *instruction) {
15832017 fprintf(irp->f, "@testComptime(");
1584 ir_print_other_instruction(irp, instruction->value);
2018 ir_print_other_inst_src(irp, instruction->value);
15852019 fprintf(irp->f, ")");
15862020}
15872021
1588static void ir_print_ptr_cast_src(IrPrint *irp, IrInstructionPtrCastSrc *instruction) {
2022static void ir_print_ptr_cast_src(IrPrintSrc *irp, IrInstSrcPtrCast *instruction) {
15892023 fprintf(irp->f, "@ptrCast(");
15902024 if (instruction->dest_type) {
1591 ir_print_other_instruction(irp, instruction->dest_type);
2025 ir_print_other_inst_src(irp, instruction->dest_type);
15922026 }
15932027 fprintf(irp->f, ",");
1594 ir_print_other_instruction(irp, instruction->ptr);
2028 ir_print_other_inst_src(irp, instruction->ptr);
15952029 fprintf(irp->f, ")");
15962030}
15972031
1598static void ir_print_ptr_cast_gen(IrPrint *irp, IrInstructionPtrCastGen *instruction) {
2032static void ir_print_ptr_cast_gen(IrPrintGen *irp, IrInstGenPtrCast *instruction) {
15992033 fprintf(irp->f, "@ptrCast(");
1600 ir_print_other_instruction(irp, instruction->ptr);
2034 ir_print_other_inst_gen(irp, instruction->ptr);
16012035 fprintf(irp->f, ")");
16022036}
16032037
1604static void ir_print_implicit_cast(IrPrint *irp, IrInstructionImplicitCast *instruction) {
2038static void ir_print_implicit_cast(IrPrintSrc *irp, IrInstSrcImplicitCast *instruction) {
16052039 fprintf(irp->f, "@implicitCast(");
1606 ir_print_other_instruction(irp, instruction->operand);
2040 ir_print_other_inst_src(irp, instruction->operand);
16072041 fprintf(irp->f, ")result=");
16082042 ir_print_result_loc(irp, &instruction->result_loc_cast->base);
16092043}
16102044
1611static void ir_print_bit_cast_src(IrPrint *irp, IrInstructionBitCastSrc *instruction) {
2045static void ir_print_bit_cast_src(IrPrintSrc *irp, IrInstSrcBitCast *instruction) {
16122046 fprintf(irp->f, "@bitCast(");
1613 ir_print_other_instruction(irp, instruction->operand);
2047 ir_print_other_inst_src(irp, instruction->operand);
16142048 fprintf(irp->f, ")result=");
16152049 ir_print_result_loc(irp, &instruction->result_loc_bit_cast->base);
16162050}
16172051
1618static void ir_print_bit_cast_gen(IrPrint *irp, IrInstructionBitCastGen *instruction) {
2052static void ir_print_bit_cast_gen(IrPrintGen *irp, IrInstGenBitCast *instruction) {
16192053 fprintf(irp->f, "@bitCast(");
1620 ir_print_other_instruction(irp, instruction->operand);
2054 ir_print_other_inst_gen(irp, instruction->operand);
16212055 fprintf(irp->f, ")");
16222056}
16232057
1624static void ir_print_widen_or_shorten(IrPrint *irp, IrInstructionWidenOrShorten *instruction) {
2058static void ir_print_widen_or_shorten(IrPrintGen *irp, IrInstGenWidenOrShorten *instruction) {
16252059 fprintf(irp->f, "WidenOrShorten(");
1626 ir_print_other_instruction(irp, instruction->target);
2060 ir_print_other_inst_gen(irp, instruction->target);
16272061 fprintf(irp->f, ")");
16282062}
16292063
1630static void ir_print_ptr_to_int(IrPrint *irp, IrInstructionPtrToInt *instruction) {
2064static void ir_print_ptr_to_int(IrPrintSrc *irp, IrInstSrcPtrToInt *instruction) {
16312065 fprintf(irp->f, "@ptrToInt(");
1632 ir_print_other_instruction(irp, instruction->target);
2066 ir_print_other_inst_src(irp, instruction->target);
16332067 fprintf(irp->f, ")");
16342068}
16352069
1636static void ir_print_int_to_ptr(IrPrint *irp, IrInstructionIntToPtr *instruction) {
2070static void ir_print_ptr_to_int(IrPrintGen *irp, IrInstGenPtrToInt *instruction) {
2071 fprintf(irp->f, "@ptrToInt(");
2072 ir_print_other_inst_gen(irp, instruction->target);
2073 fprintf(irp->f, ")");
2074}
2075
2076static void ir_print_int_to_ptr(IrPrintSrc *irp, IrInstSrcIntToPtr *instruction) {
16372077 fprintf(irp->f, "@intToPtr(");
1638 if (instruction->dest_type == nullptr) {
1639 fprintf(irp->f, "(null)");
1640 } else {
1641 ir_print_other_instruction(irp, instruction->dest_type);
1642 }
2078 ir_print_other_inst_src(irp, instruction->dest_type);
16432079 fprintf(irp->f, ",");
1644 ir_print_other_instruction(irp, instruction->target);
2080 ir_print_other_inst_src(irp, instruction->target);
16452081 fprintf(irp->f, ")");
16462082}
16472083
1648static void ir_print_int_to_enum(IrPrint *irp, IrInstructionIntToEnum *instruction) {
2084static void ir_print_int_to_ptr(IrPrintGen *irp, IrInstGenIntToPtr *instruction) {
2085 fprintf(irp->f, "@intToPtr(");
2086 ir_print_other_inst_gen(irp, instruction->target);
2087 fprintf(irp->f, ")");
2088}
2089
2090static void ir_print_int_to_enum(IrPrintSrc *irp, IrInstSrcIntToEnum *instruction) {
16492091 fprintf(irp->f, "@intToEnum(");
1650 if (instruction->dest_type == nullptr) {
1651 fprintf(irp->f, "(null)");
1652 } else {
1653 ir_print_other_instruction(irp, instruction->dest_type);
1654 }
1655 ir_print_other_instruction(irp, instruction->target);
2092 ir_print_other_inst_src(irp, instruction->dest_type);
2093 fprintf(irp->f, ",");
2094 ir_print_other_inst_src(irp, instruction->target);
16562095 fprintf(irp->f, ")");
16572096}
16582097
1659static void ir_print_enum_to_int(IrPrint *irp, IrInstructionEnumToInt *instruction) {
2098static void ir_print_int_to_enum(IrPrintGen *irp, IrInstGenIntToEnum *instruction) {
2099 fprintf(irp->f, "@intToEnum(");
2100 ir_print_other_inst_gen(irp, instruction->target);
2101 fprintf(irp->f, ")");
2102}
2103
2104static void ir_print_enum_to_int(IrPrintSrc *irp, IrInstSrcEnumToInt *instruction) {
16602105 fprintf(irp->f, "@enumToInt(");
1661 ir_print_other_instruction(irp, instruction->target);
2106 ir_print_other_inst_src(irp, instruction->target);
16622107 fprintf(irp->f, ")");
16632108}
16642109
1665static void ir_print_check_runtime_scope(IrPrint *irp, IrInstructionCheckRuntimeScope *instruction) {
2110static void ir_print_check_runtime_scope(IrPrintSrc *irp, IrInstSrcCheckRuntimeScope *instruction) {
16662111 fprintf(irp->f, "@checkRuntimeScope(");
1667 ir_print_other_instruction(irp, instruction->scope_is_comptime);
2112 ir_print_other_inst_src(irp, instruction->scope_is_comptime);
16682113 fprintf(irp->f, ",");
1669 ir_print_other_instruction(irp, instruction->is_comptime);
2114 ir_print_other_inst_src(irp, instruction->is_comptime);
16702115 fprintf(irp->f, ")");
16712116}
16722117
1673static void ir_print_array_to_vector(IrPrint *irp, IrInstructionArrayToVector *instruction) {
2118static void ir_print_array_to_vector(IrPrintGen *irp, IrInstGenArrayToVector *instruction) {
16742119 fprintf(irp->f, "ArrayToVector(");
1675 ir_print_other_instruction(irp, instruction->array);
2120 ir_print_other_inst_gen(irp, instruction->array);
16762121 fprintf(irp->f, ")");
16772122}
16782123
1679static void ir_print_vector_to_array(IrPrint *irp, IrInstructionVectorToArray *instruction) {
2124static void ir_print_vector_to_array(IrPrintGen *irp, IrInstGenVectorToArray *instruction) {
16802125 fprintf(irp->f, "VectorToArray(");
1681 ir_print_other_instruction(irp, instruction->vector);
2126 ir_print_other_inst_gen(irp, instruction->vector);
16822127 fprintf(irp->f, ")result=");
1683 ir_print_other_instruction(irp, instruction->result_loc);
2128 ir_print_other_inst_gen(irp, instruction->result_loc);
16842129}
16852130
1686static void ir_print_ptr_of_array_to_slice(IrPrint *irp, IrInstructionPtrOfArrayToSlice *instruction) {
2131static void ir_print_ptr_of_array_to_slice(IrPrintGen *irp, IrInstGenPtrOfArrayToSlice *instruction) {
16872132 fprintf(irp->f, "PtrOfArrayToSlice(");
1688 ir_print_other_instruction(irp, instruction->operand);
2133 ir_print_other_inst_gen(irp, instruction->operand);
16892134 fprintf(irp->f, ")result=");
1690 ir_print_other_instruction(irp, instruction->result_loc);
2135 ir_print_other_inst_gen(irp, instruction->result_loc);
16912136}
16922137
1693static void ir_print_assert_zero(IrPrint *irp, IrInstructionAssertZero *instruction) {
2138static void ir_print_assert_zero(IrPrintGen *irp, IrInstGenAssertZero *instruction) {
16942139 fprintf(irp->f, "AssertZero(");
1695 ir_print_other_instruction(irp, instruction->target);
2140 ir_print_other_inst_gen(irp, instruction->target);
16962141 fprintf(irp->f, ")");
16972142}
16982143
1699static void ir_print_assert_non_null(IrPrint *irp, IrInstructionAssertNonNull *instruction) {
2144static void ir_print_assert_non_null(IrPrintGen *irp, IrInstGenAssertNonNull *instruction) {
17002145 fprintf(irp->f, "AssertNonNull(");
1701 ir_print_other_instruction(irp, instruction->target);
2146 ir_print_other_inst_gen(irp, instruction->target);
17022147 fprintf(irp->f, ")");
17032148}
17042149
1705static void ir_print_resize_slice(IrPrint *irp, IrInstructionResizeSlice *instruction) {
2150static void ir_print_resize_slice(IrPrintGen *irp, IrInstGenResizeSlice *instruction) {
17062151 fprintf(irp->f, "@resizeSlice(");
1707 ir_print_other_instruction(irp, instruction->operand);
2152 ir_print_other_inst_gen(irp, instruction->operand);
17082153 fprintf(irp->f, ")result=");
1709 ir_print_other_instruction(irp, instruction->result_loc);
2154 ir_print_other_inst_gen(irp, instruction->result_loc);
17102155}
17112156
1712static void ir_print_alloca_src(IrPrint *irp, IrInstructionAllocaSrc *instruction) {
2157static void ir_print_alloca_src(IrPrintSrc *irp, IrInstSrcAlloca *instruction) {
17132158 fprintf(irp->f, "Alloca(align=");
1714 ir_print_other_instruction(irp, instruction->align);
2159 ir_print_other_inst_src(irp, instruction->align);
17152160 fprintf(irp->f, ",name=%s)", instruction->name_hint);
17162161}
17172162
1718static void ir_print_alloca_gen(IrPrint *irp, IrInstructionAllocaGen *instruction) {
2163static void ir_print_alloca_gen(IrPrintGen *irp, IrInstGenAlloca *instruction) {
17192164 fprintf(irp->f, "Alloca(align=%" PRIu32 ",name=%s)", instruction->align, instruction->name_hint);
17202165}
17212166
1722static void ir_print_end_expr(IrPrint *irp, IrInstructionEndExpr *instruction) {
2167static void ir_print_end_expr(IrPrintSrc *irp, IrInstSrcEndExpr *instruction) {
17232168 fprintf(irp->f, "EndExpr(result=");
17242169 ir_print_result_loc(irp, instruction->result_loc);
17252170 fprintf(irp->f, ",value=");
1726 ir_print_other_instruction(irp, instruction->value);
2171 ir_print_other_inst_src(irp, instruction->value);
17272172 fprintf(irp->f, ")");
17282173}
17292174
1730static void ir_print_int_to_err(IrPrint *irp, IrInstructionIntToErr *instruction) {
2175static void ir_print_int_to_err(IrPrintSrc *irp, IrInstSrcIntToErr *instruction) {
17312176 fprintf(irp->f, "inttoerr ");
1732 ir_print_other_instruction(irp, instruction->target);
2177 ir_print_other_inst_src(irp, instruction->target);
17332178}
17342179
1735static void ir_print_err_to_int(IrPrint *irp, IrInstructionErrToInt *instruction) {
2180static void ir_print_int_to_err(IrPrintGen *irp, IrInstGenIntToErr *instruction) {
2181 fprintf(irp->f, "inttoerr ");
2182 ir_print_other_inst_gen(irp, instruction->target);
2183}
2184
2185static void ir_print_err_to_int(IrPrintSrc *irp, IrInstSrcErrToInt *instruction) {
2186 fprintf(irp->f, "errtoint ");
2187 ir_print_other_inst_src(irp, instruction->target);
2188}
2189
2190static void ir_print_err_to_int(IrPrintGen *irp, IrInstGenErrToInt *instruction) {
17362191 fprintf(irp->f, "errtoint ");
1737 ir_print_other_instruction(irp, instruction->target);
2192 ir_print_other_inst_gen(irp, instruction->target);
17382193}
17392194
1740static void ir_print_check_switch_prongs(IrPrint *irp, IrInstructionCheckSwitchProngs *instruction) {
2195static void ir_print_check_switch_prongs(IrPrintSrc *irp, IrInstSrcCheckSwitchProngs *instruction) {
17412196 fprintf(irp->f, "@checkSwitchProngs(");
1742 ir_print_other_instruction(irp, instruction->target_value);
2197 ir_print_other_inst_src(irp, instruction->target_value);
17432198 fprintf(irp->f, ",");
17442199 for (size_t i = 0; i < instruction->range_count; i += 1) {
17452200 if (i != 0)
17462201 fprintf(irp->f, ",");
1747 ir_print_other_instruction(irp, instruction->ranges[i].start);
2202 ir_print_other_inst_src(irp, instruction->ranges[i].start);
17482203 fprintf(irp->f, "...");
1749 ir_print_other_instruction(irp, instruction->ranges[i].end);
2204 ir_print_other_inst_src(irp, instruction->ranges[i].end);
17502205 }
17512206 const char *have_else_str = instruction->have_else_prong ? "yes" : "no";
17522207 fprintf(irp->f, ")else:%s", have_else_str);
17532208}
17542209
1755static void ir_print_check_statement_is_void(IrPrint *irp, IrInstructionCheckStatementIsVoid *instruction) {
2210static void ir_print_check_statement_is_void(IrPrintSrc *irp, IrInstSrcCheckStatementIsVoid *instruction) {
17562211 fprintf(irp->f, "@checkStatementIsVoid(");
1757 ir_print_other_instruction(irp, instruction->statement_value);
2212 ir_print_other_inst_src(irp, instruction->statement_value);
17582213 fprintf(irp->f, ")");
17592214}
17602215
1761static void ir_print_type_name(IrPrint *irp, IrInstructionTypeName *instruction) {
2216static void ir_print_type_name(IrPrintSrc *irp, IrInstSrcTypeName *instruction) {
17622217 fprintf(irp->f, "typename ");
1763 ir_print_other_instruction(irp, instruction->type_value);
2218 ir_print_other_inst_src(irp, instruction->type_value);
2219}
2220
2221static void ir_print_tag_name(IrPrintSrc *irp, IrInstSrcTagName *instruction) {
2222 fprintf(irp->f, "tagname ");
2223 ir_print_other_inst_src(irp, instruction->target);
17642224}
17652225
1766static void ir_print_tag_name(IrPrint *irp, IrInstructionTagName *instruction) {
2226static void ir_print_tag_name(IrPrintGen *irp, IrInstGenTagName *instruction) {
17672227 fprintf(irp->f, "tagname ");
1768 ir_print_other_instruction(irp, instruction->target);
2228 ir_print_other_inst_gen(irp, instruction->target);
17692229}
17702230
1771static void ir_print_ptr_type(IrPrint *irp, IrInstructionPtrType *instruction) {
2231static void ir_print_ptr_type(IrPrintSrc *irp, IrInstSrcPtrType *instruction) {
17722232 fprintf(irp->f, "&");
17732233 if (instruction->align_value != nullptr) {
17742234 fprintf(irp->f, "align(");
1775 ir_print_other_instruction(irp, instruction->align_value);
2235 ir_print_other_inst_src(irp, instruction->align_value);
17762236 fprintf(irp->f, ")");
17772237 }
17782238 const char *const_str = instruction->is_const ? "const " : "";
17792239 const char *volatile_str = instruction->is_volatile ? "volatile " : "";
17802240 fprintf(irp->f, ":%" PRIu32 ":%" PRIu32 " %s%s", instruction->bit_offset_start, instruction->host_int_bytes,
17812241 const_str, volatile_str);
1782 ir_print_other_instruction(irp, instruction->child_type);
2242 ir_print_other_inst_src(irp, instruction->child_type);
17832243}
17842244
1785static void ir_print_decl_ref(IrPrint *irp, IrInstructionDeclRef *instruction) {
2245static void ir_print_decl_ref(IrPrintSrc *irp, IrInstSrcDeclRef *instruction) {
17862246 const char *ptr_str = (instruction->lval == LValPtr) ? "ptr " : "";
17872247 fprintf(irp->f, "declref %s%s", ptr_str, buf_ptr(instruction->tld->name));
17882248}
17892249
1790static void ir_print_panic(IrPrint *irp, IrInstructionPanic *instruction) {
2250static void ir_print_panic(IrPrintSrc *irp, IrInstSrcPanic *instruction) {
17912251 fprintf(irp->f, "@panic(");
1792 ir_print_other_instruction(irp, instruction->msg);
2252 ir_print_other_inst_src(irp, instruction->msg);
17932253 fprintf(irp->f, ")");
17942254}
17952255
1796static void ir_print_field_parent_ptr(IrPrint *irp, IrInstructionFieldParentPtr *instruction) {
2256static void ir_print_panic(IrPrintGen *irp, IrInstGenPanic *instruction) {
2257 fprintf(irp->f, "@panic(");
2258 ir_print_other_inst_gen(irp, instruction->msg);
2259 fprintf(irp->f, ")");
2260}
2261
2262static void ir_print_field_parent_ptr(IrPrintSrc *irp, IrInstSrcFieldParentPtr *instruction) {
17972263 fprintf(irp->f, "@fieldParentPtr(");
1798 ir_print_other_instruction(irp, instruction->type_value);
2264 ir_print_other_inst_src(irp, instruction->type_value);
17992265 fprintf(irp->f, ",");
1800 ir_print_other_instruction(irp, instruction->field_name);
2266 ir_print_other_inst_src(irp, instruction->field_name);
18012267 fprintf(irp->f, ",");
1802 ir_print_other_instruction(irp, instruction->field_ptr);
2268 ir_print_other_inst_src(irp, instruction->field_ptr);
18032269 fprintf(irp->f, ")");
18042270}
18052271
1806static void ir_print_byte_offset_of(IrPrint *irp, IrInstructionByteOffsetOf *instruction) {
2272static void ir_print_field_parent_ptr(IrPrintGen *irp, IrInstGenFieldParentPtr *instruction) {
2273 fprintf(irp->f, "@fieldParentPtr(%s,", buf_ptr(instruction->field->name));
2274 ir_print_other_inst_gen(irp, instruction->field_ptr);
2275 fprintf(irp->f, ")");
2276}
2277
2278static void ir_print_byte_offset_of(IrPrintSrc *irp, IrInstSrcByteOffsetOf *instruction) {
18072279 fprintf(irp->f, "@byte_offset_of(");
1808 ir_print_other_instruction(irp, instruction->type_value);
2280 ir_print_other_inst_src(irp, instruction->type_value);
18092281 fprintf(irp->f, ",");
1810 ir_print_other_instruction(irp, instruction->field_name);
2282 ir_print_other_inst_src(irp, instruction->field_name);
18112283 fprintf(irp->f, ")");
18122284}
18132285
1814static void ir_print_bit_offset_of(IrPrint *irp, IrInstructionBitOffsetOf *instruction) {
2286static void ir_print_bit_offset_of(IrPrintSrc *irp, IrInstSrcBitOffsetOf *instruction) {
18152287 fprintf(irp->f, "@bit_offset_of(");
1816 ir_print_other_instruction(irp, instruction->type_value);
2288 ir_print_other_inst_src(irp, instruction->type_value);
18172289 fprintf(irp->f, ",");
1818 ir_print_other_instruction(irp, instruction->field_name);
2290 ir_print_other_inst_src(irp, instruction->field_name);
18192291 fprintf(irp->f, ")");
18202292}
18212293
1822static void ir_print_type_info(IrPrint *irp, IrInstructionTypeInfo *instruction) {
2294static void ir_print_type_info(IrPrintSrc *irp, IrInstSrcTypeInfo *instruction) {
18232295 fprintf(irp->f, "@typeInfo(");
1824 ir_print_other_instruction(irp, instruction->type_value);
2296 ir_print_other_inst_src(irp, instruction->type_value);
18252297 fprintf(irp->f, ")");
18262298}
18272299
1828static void ir_print_type(IrPrint *irp, IrInstructionType *instruction) {
2300static void ir_print_type(IrPrintSrc *irp, IrInstSrcType *instruction) {
18292301 fprintf(irp->f, "@Type(");
1830 ir_print_other_instruction(irp, instruction->type_info);
2302 ir_print_other_inst_src(irp, instruction->type_info);
18312303 fprintf(irp->f, ")");
18322304}
18332305
1834static void ir_print_has_field(IrPrint *irp, IrInstructionHasField *instruction) {
2306static void ir_print_has_field(IrPrintSrc *irp, IrInstSrcHasField *instruction) {
18352307 fprintf(irp->f, "@hasField(");
1836 ir_print_other_instruction(irp, instruction->container_type);
2308 ir_print_other_inst_src(irp, instruction->container_type);
18372309 fprintf(irp->f, ",");
1838 ir_print_other_instruction(irp, instruction->field_name);
2310 ir_print_other_inst_src(irp, instruction->field_name);
18392311 fprintf(irp->f, ")");
18402312}
18412313
1842static void ir_print_type_id(IrPrint *irp, IrInstructionTypeId *instruction) {
2314static void ir_print_type_id(IrPrintSrc *irp, IrInstSrcTypeId *instruction) {
18432315 fprintf(irp->f, "@typeId(");
1844 ir_print_other_instruction(irp, instruction->type_value);
2316 ir_print_other_inst_src(irp, instruction->type_value);
18452317 fprintf(irp->f, ")");
18462318}
18472319
1848static void ir_print_set_eval_branch_quota(IrPrint *irp, IrInstructionSetEvalBranchQuota *instruction) {
2320static void ir_print_set_eval_branch_quota(IrPrintSrc *irp, IrInstSrcSetEvalBranchQuota *instruction) {
18492321 fprintf(irp->f, "@setEvalBranchQuota(");
1850 ir_print_other_instruction(irp, instruction->new_quota);
2322 ir_print_other_inst_src(irp, instruction->new_quota);
18512323 fprintf(irp->f, ")");
18522324}
18532325
1854static void ir_print_align_cast(IrPrint *irp, IrInstructionAlignCast *instruction) {
2326static void ir_print_align_cast(IrPrintSrc *irp, IrInstSrcAlignCast *instruction) {
18552327 fprintf(irp->f, "@alignCast(");
1856 if (instruction->align_bytes == nullptr) {
1857 fprintf(irp->f, "null");
1858 } else {
1859 ir_print_other_instruction(irp, instruction->align_bytes);
1860 }
2328 ir_print_other_inst_src(irp, instruction->align_bytes);
18612329 fprintf(irp->f, ",");
1862 ir_print_other_instruction(irp, instruction->target);
2330 ir_print_other_inst_src(irp, instruction->target);
2331 fprintf(irp->f, ")");
2332}
2333
2334static void ir_print_align_cast(IrPrintGen *irp, IrInstGenAlignCast *instruction) {
2335 fprintf(irp->f, "@alignCast(");
2336 ir_print_other_inst_gen(irp, instruction->target);
18632337 fprintf(irp->f, ")");
18642338}
18652339
1866static void ir_print_resolve_result(IrPrint *irp, IrInstructionResolveResult *instruction) {
2340static void ir_print_resolve_result(IrPrintSrc *irp, IrInstSrcResolveResult *instruction) {
18672341 fprintf(irp->f, "ResolveResult(");
18682342 ir_print_result_loc(irp, instruction->result_loc);
18692343 fprintf(irp->f, ")");
18702344}
18712345
1872static void ir_print_reset_result(IrPrint *irp, IrInstructionResetResult *instruction) {
2346static void ir_print_reset_result(IrPrintSrc *irp, IrInstSrcResetResult *instruction) {
18732347 fprintf(irp->f, "ResetResult(");
18742348 ir_print_result_loc(irp, instruction->result_loc);
18752349 fprintf(irp->f, ")");
18762350}
18772351
1878static void ir_print_opaque_type(IrPrint *irp, IrInstructionOpaqueType *instruction) {
2352static void ir_print_opaque_type(IrPrintSrc *irp, IrInstSrcOpaqueType *instruction) {
18792353 fprintf(irp->f, "@OpaqueType()");
18802354}
18812355
1882static void ir_print_set_align_stack(IrPrint *irp, IrInstructionSetAlignStack *instruction) {
2356static void ir_print_set_align_stack(IrPrintSrc *irp, IrInstSrcSetAlignStack *instruction) {
18832357 fprintf(irp->f, "@setAlignStack(");
1884 ir_print_other_instruction(irp, instruction->align_bytes);
2358 ir_print_other_inst_src(irp, instruction->align_bytes);
18852359 fprintf(irp->f, ")");
18862360}
18872361
1888static void ir_print_arg_type(IrPrint *irp, IrInstructionArgType *instruction) {
2362static void ir_print_arg_type(IrPrintSrc *irp, IrInstSrcArgType *instruction) {
18892363 fprintf(irp->f, "@ArgType(");
1890 ir_print_other_instruction(irp, instruction->fn_type);
2364 ir_print_other_inst_src(irp, instruction->fn_type);
18912365 fprintf(irp->f, ",");
1892 ir_print_other_instruction(irp, instruction->arg_index);
2366 ir_print_other_inst_src(irp, instruction->arg_index);
18932367 fprintf(irp->f, ")");
18942368}
18952369
1896static void ir_print_enum_tag_type(IrPrint *irp, IrInstructionTagType *instruction) {
2370static void ir_print_enum_tag_type(IrPrintSrc *irp, IrInstSrcTagType *instruction) {
18972371 fprintf(irp->f, "@TagType(");
1898 ir_print_other_instruction(irp, instruction->target);
2372 ir_print_other_inst_src(irp, instruction->target);
18992373 fprintf(irp->f, ")");
19002374}
19012375
1902static void ir_print_export(IrPrint *irp, IrInstructionExport *instruction) {
2376static void ir_print_export(IrPrintSrc *irp, IrInstSrcExport *instruction) {
19032377 fprintf(irp->f, "@export(");
1904 ir_print_other_instruction(irp, instruction->target);
2378 ir_print_other_inst_src(irp, instruction->target);
19052379 fprintf(irp->f, ",");
1906 ir_print_other_instruction(irp, instruction->options);
2380 ir_print_other_inst_src(irp, instruction->options);
2381 fprintf(irp->f, ")");
2382}
2383
2384static void ir_print_error_return_trace(IrPrintSrc *irp, IrInstSrcErrorReturnTrace *instruction) {
2385 fprintf(irp->f, "@errorReturnTrace(");
2386 switch (instruction->optional) {
2387 case IrInstErrorReturnTraceNull:
2388 fprintf(irp->f, "Null");
2389 break;
2390 case IrInstErrorReturnTraceNonNull:
2391 fprintf(irp->f, "NonNull");
2392 break;
2393 }
19072394 fprintf(irp->f, ")");
19082395}
19092396
1910static void ir_print_error_return_trace(IrPrint *irp, IrInstructionErrorReturnTrace *instruction) {
2397static void ir_print_error_return_trace(IrPrintGen *irp, IrInstGenErrorReturnTrace *instruction) {
19112398 fprintf(irp->f, "@errorReturnTrace(");
19122399 switch (instruction->optional) {
1913 case IrInstructionErrorReturnTrace::Null:
2400 case IrInstErrorReturnTraceNull:
19142401 fprintf(irp->f, "Null");
19152402 break;
1916 case IrInstructionErrorReturnTrace::NonNull:
2403 case IrInstErrorReturnTraceNonNull:
19172404 fprintf(irp->f, "NonNull");
19182405 break;
19192406 }
19202407 fprintf(irp->f, ")");
19212408}
19222409
1923static void ir_print_error_union(IrPrint *irp, IrInstructionErrorUnion *instruction) {
1924 ir_print_other_instruction(irp, instruction->err_set);
2410static void ir_print_error_union(IrPrintSrc *irp, IrInstSrcErrorUnion *instruction) {
2411 ir_print_other_inst_src(irp, instruction->err_set);
19252412 fprintf(irp->f, "!");
1926 ir_print_other_instruction(irp, instruction->payload);
2413 ir_print_other_inst_src(irp, instruction->payload);
19272414}
19282415
1929static void ir_print_atomic_rmw(IrPrint *irp, IrInstructionAtomicRmw *instruction) {
2416static void ir_print_atomic_rmw(IrPrintSrc *irp, IrInstSrcAtomicRmw *instruction) {
19302417 fprintf(irp->f, "@atomicRmw(");
1931 if (instruction->operand_type != nullptr) {
1932 ir_print_other_instruction(irp, instruction->operand_type);
1933 } else {
1934 fprintf(irp->f, "[TODO print]");
1935 }
2418 ir_print_other_inst_src(irp, instruction->operand_type);
19362419 fprintf(irp->f, ",");
1937 ir_print_other_instruction(irp, instruction->ptr);
2420 ir_print_other_inst_src(irp, instruction->ptr);
19382421 fprintf(irp->f, ",");
1939 if (instruction->op != nullptr) {
1940 ir_print_other_instruction(irp, instruction->op);
1941 } else {
1942 fprintf(irp->f, "[TODO print]");
1943 }
2422 ir_print_other_inst_src(irp, instruction->op);
19442423 fprintf(irp->f, ",");
1945 ir_print_other_instruction(irp, instruction->operand);
2424 ir_print_other_inst_src(irp, instruction->operand);
19462425 fprintf(irp->f, ",");
1947 if (instruction->ordering != nullptr) {
1948 ir_print_other_instruction(irp, instruction->ordering);
1949 } else {
1950 fprintf(irp->f, "[TODO print]");
1951 }
2426 ir_print_other_inst_src(irp, instruction->ordering);
19522427 fprintf(irp->f, ")");
19532428}
19542429
1955static void ir_print_atomic_load(IrPrint *irp, IrInstructionAtomicLoad *instruction) {
2430static void ir_print_atomic_rmw(IrPrintGen *irp, IrInstGenAtomicRmw *instruction) {
2431 fprintf(irp->f, "@atomicRmw(");
2432 ir_print_other_inst_gen(irp, instruction->ptr);
2433 fprintf(irp->f, ",[TODO print op],");
2434 ir_print_other_inst_gen(irp, instruction->operand);
2435 fprintf(irp->f, ",%s)", atomic_order_str(instruction->ordering));
2436}
2437
2438static void ir_print_atomic_load(IrPrintSrc *irp, IrInstSrcAtomicLoad *instruction) {
19562439 fprintf(irp->f, "@atomicLoad(");
1957 if (instruction->operand_type != nullptr) {
1958 ir_print_other_instruction(irp, instruction->operand_type);
1959 } else {
1960 fprintf(irp->f, "[TODO print]");
1961 }
2440 ir_print_other_inst_src(irp, instruction->operand_type);
19622441 fprintf(irp->f, ",");
1963 ir_print_other_instruction(irp, instruction->ptr);
2442 ir_print_other_inst_src(irp, instruction->ptr);
19642443 fprintf(irp->f, ",");
1965 if (instruction->ordering != nullptr) {
1966 ir_print_other_instruction(irp, instruction->ordering);
1967 } else {
1968 fprintf(irp->f, "[TODO print]");
1969 }
2444 ir_print_other_inst_src(irp, instruction->ordering);
19702445 fprintf(irp->f, ")");
19712446}
19722447
1973static void ir_print_atomic_store(IrPrint *irp, IrInstructionAtomicStore *instruction) {
2448static void ir_print_atomic_load(IrPrintGen *irp, IrInstGenAtomicLoad *instruction) {
2449 fprintf(irp->f, "@atomicLoad(");
2450 ir_print_other_inst_gen(irp, instruction->ptr);
2451 fprintf(irp->f, ",%s)", atomic_order_str(instruction->ordering));
2452}
2453
2454static void ir_print_atomic_store(IrPrintSrc *irp, IrInstSrcAtomicStore *instruction) {
19742455 fprintf(irp->f, "@atomicStore(");
1975 if (instruction->operand_type != nullptr) {
1976 ir_print_other_instruction(irp, instruction->operand_type);
1977 } else {
1978 fprintf(irp->f, "[TODO print]");
1979 }
2456 ir_print_other_inst_src(irp, instruction->operand_type);
19802457 fprintf(irp->f, ",");
1981 ir_print_other_instruction(irp, instruction->ptr);
2458 ir_print_other_inst_src(irp, instruction->ptr);
19822459 fprintf(irp->f, ",");
1983 ir_print_other_instruction(irp, instruction->value);
2460 ir_print_other_inst_src(irp, instruction->value);
19842461 fprintf(irp->f, ",");
1985 if (instruction->ordering != nullptr) {
1986 ir_print_other_instruction(irp, instruction->ordering);
1987 } else {
1988 fprintf(irp->f, "[TODO print]");
1989 }
2462 ir_print_other_inst_src(irp, instruction->ordering);
19902463 fprintf(irp->f, ")");
19912464}
19922465
2466static void ir_print_atomic_store(IrPrintGen *irp, IrInstGenAtomicStore *instruction) {
2467 fprintf(irp->f, "@atomicStore(");
2468 ir_print_other_inst_gen(irp, instruction->ptr);
2469 fprintf(irp->f, ",");
2470 ir_print_other_inst_gen(irp, instruction->value);
2471 fprintf(irp->f, ",%s)", atomic_order_str(instruction->ordering));
2472}
2473
2474
2475static void ir_print_save_err_ret_addr(IrPrintSrc *irp, IrInstSrcSaveErrRetAddr *instruction) {
2476 fprintf(irp->f, "@saveErrRetAddr()");
2477}
19932478
1994static void ir_print_save_err_ret_addr(IrPrint *irp, IrInstructionSaveErrRetAddr *instruction) {
2479static void ir_print_save_err_ret_addr(IrPrintGen *irp, IrInstGenSaveErrRetAddr *instruction) {
19952480 fprintf(irp->f, "@saveErrRetAddr()");
19962481}
19972482
1998static void ir_print_add_implicit_return_type(IrPrint *irp, IrInstructionAddImplicitReturnType *instruction) {
2483static void ir_print_add_implicit_return_type(IrPrintSrc *irp, IrInstSrcAddImplicitReturnType *instruction) {
19992484 fprintf(irp->f, "@addImplicitReturnType(");
2000 ir_print_other_instruction(irp, instruction->value);
2485 ir_print_other_inst_src(irp, instruction->value);
2486 fprintf(irp->f, ")");
2487}
2488
2489static void ir_print_float_op(IrPrintSrc *irp, IrInstSrcFloatOp *instruction) {
2490 fprintf(irp->f, "@%s(", float_op_to_name(instruction->fn_id));
2491 ir_print_other_inst_src(irp, instruction->operand);
20012492 fprintf(irp->f, ")");
20022493}
20032494
2004static void ir_print_float_op(IrPrint *irp, IrInstructionFloatOp *instruction) {
2495static void ir_print_float_op(IrPrintGen *irp, IrInstGenFloatOp *instruction) {
20052496 fprintf(irp->f, "@%s(", float_op_to_name(instruction->fn_id));
2006 ir_print_other_instruction(irp, instruction->operand);
2497 ir_print_other_inst_gen(irp, instruction->operand);
20072498 fprintf(irp->f, ")");
20082499}
20092500
2010static void ir_print_mul_add(IrPrint *irp, IrInstructionMulAdd *instruction) {
2501static void ir_print_mul_add(IrPrintSrc *irp, IrInstSrcMulAdd *instruction) {
20112502 fprintf(irp->f, "@mulAdd(");
2012 if (instruction->type_value != nullptr) {
2013 ir_print_other_instruction(irp, instruction->type_value);
2014 } else {
2015 fprintf(irp->f, "null");
2016 }
2503 ir_print_other_inst_src(irp, instruction->type_value);
20172504 fprintf(irp->f, ",");
2018 ir_print_other_instruction(irp, instruction->op1);
2505 ir_print_other_inst_src(irp, instruction->op1);
20192506 fprintf(irp->f, ",");
2020 ir_print_other_instruction(irp, instruction->op2);
2507 ir_print_other_inst_src(irp, instruction->op2);
20212508 fprintf(irp->f, ",");
2022 ir_print_other_instruction(irp, instruction->op3);
2509 ir_print_other_inst_src(irp, instruction->op3);
20232510 fprintf(irp->f, ")");
20242511}
20252512
2026static void ir_print_decl_var_gen(IrPrint *irp, IrInstructionDeclVarGen *decl_var_instruction) {
2513static void ir_print_mul_add(IrPrintGen *irp, IrInstGenMulAdd *instruction) {
2514 fprintf(irp->f, "@mulAdd(");
2515 ir_print_other_inst_gen(irp, instruction->op1);
2516 fprintf(irp->f, ",");
2517 ir_print_other_inst_gen(irp, instruction->op2);
2518 fprintf(irp->f, ",");
2519 ir_print_other_inst_gen(irp, instruction->op3);
2520 fprintf(irp->f, ")");
2521}
2522
2523static void ir_print_decl_var_gen(IrPrintGen *irp, IrInstGenDeclVar *decl_var_instruction) {
20272524 ZigVar *var = decl_var_instruction->var;
20282525 const char *var_or_const = decl_var_instruction->var->gen_is_const ? "const" : "var";
20292526 const char *name = decl_var_instruction->var->name;
20302527 fprintf(irp->f, "%s %s: %s align(%u) = ", var_or_const, name, buf_ptr(&var->var_type->name),
20312528 var->align_bytes);
20322529
2033 ir_print_other_instruction(irp, decl_var_instruction->var_ptr);
2034 if (decl_var_instruction->var->is_comptime != nullptr) {
2035 fprintf(irp->f, " // comptime = ");
2036 ir_print_other_instruction(irp, decl_var_instruction->var->is_comptime);
2037 }
2530 ir_print_other_inst_gen(irp, decl_var_instruction->var_ptr);
20382531}
20392532
2040static void ir_print_has_decl(IrPrint *irp, IrInstructionHasDecl *instruction) {
2533static void ir_print_has_decl(IrPrintSrc *irp, IrInstSrcHasDecl *instruction) {
20412534 fprintf(irp->f, "@hasDecl(");
2042 ir_print_other_instruction(irp, instruction->container);
2535 ir_print_other_inst_src(irp, instruction->container);
20432536 fprintf(irp->f, ",");
2044 ir_print_other_instruction(irp, instruction->name);
2537 ir_print_other_inst_src(irp, instruction->name);
20452538 fprintf(irp->f, ")");
20462539}
20472540
2048static void ir_print_undeclared_ident(IrPrint *irp, IrInstructionUndeclaredIdent *instruction) {
2541static void ir_print_undeclared_ident(IrPrintSrc *irp, IrInstSrcUndeclaredIdent *instruction) {
20492542 fprintf(irp->f, "@undeclaredIdent(%s)", buf_ptr(instruction->name));
20502543}
20512544
2052static void ir_print_union_init_named_field(IrPrint *irp, IrInstructionUnionInitNamedField *instruction) {
2545static void ir_print_union_init_named_field(IrPrintSrc *irp, IrInstSrcUnionInitNamedField *instruction) {
20532546 fprintf(irp->f, "@unionInit(");
2054 ir_print_other_instruction(irp, instruction->union_type);
2547 ir_print_other_inst_src(irp, instruction->union_type);
20552548 fprintf(irp->f, ", ");
2056 ir_print_other_instruction(irp, instruction->field_name);
2549 ir_print_other_inst_src(irp, instruction->field_name);
20572550 fprintf(irp->f, ", ");
2058 ir_print_other_instruction(irp, instruction->field_result_loc);
2551 ir_print_other_inst_src(irp, instruction->field_result_loc);
20592552 fprintf(irp->f, ", ");
2060 ir_print_other_instruction(irp, instruction->result_loc);
2553 ir_print_other_inst_src(irp, instruction->result_loc);
20612554 fprintf(irp->f, ")");
20622555}
20632556
2064static void ir_print_suspend_begin(IrPrint *irp, IrInstructionSuspendBegin *instruction) {
2557static void ir_print_suspend_begin(IrPrintSrc *irp, IrInstSrcSuspendBegin *instruction) {
2558 fprintf(irp->f, "@suspendBegin()");
2559}
2560
2561static void ir_print_suspend_begin(IrPrintGen *irp, IrInstGenSuspendBegin *instruction) {
20652562 fprintf(irp->f, "@suspendBegin()");
20662563}
20672564
2068static void ir_print_suspend_finish(IrPrint *irp, IrInstructionSuspendFinish *instruction) {
2565static void ir_print_suspend_finish(IrPrintSrc *irp, IrInstSrcSuspendFinish *instruction) {
2566 fprintf(irp->f, "@suspendFinish()");
2567}
2568
2569static void ir_print_suspend_finish(IrPrintGen *irp, IrInstGenSuspendFinish *instruction) {
20692570 fprintf(irp->f, "@suspendFinish()");
20702571}
20712572
2072static void ir_print_resume(IrPrint *irp, IrInstructionResume *instruction) {
2573static void ir_print_resume(IrPrintSrc *irp, IrInstSrcResume *instruction) {
20732574 fprintf(irp->f, "resume ");
2074 ir_print_other_instruction(irp, instruction->frame);
2575 ir_print_other_inst_src(irp, instruction->frame);
20752576}
20762577
2077static void ir_print_await_src(IrPrint *irp, IrInstructionAwaitSrc *instruction) {
2578static void ir_print_resume(IrPrintGen *irp, IrInstGenResume *instruction) {
2579 fprintf(irp->f, "resume ");
2580 ir_print_other_inst_gen(irp, instruction->frame);
2581}
2582
2583static void ir_print_await_src(IrPrintSrc *irp, IrInstSrcAwait *instruction) {
20782584 fprintf(irp->f, "@await(");
2079 ir_print_other_instruction(irp, instruction->frame);
2585 ir_print_other_inst_src(irp, instruction->frame);
20802586 fprintf(irp->f, ",");
20812587 ir_print_result_loc(irp, instruction->result_loc);
20822588 fprintf(irp->f, ")");
20832589}
20842590
2085static void ir_print_await_gen(IrPrint *irp, IrInstructionAwaitGen *instruction) {
2591static void ir_print_await_gen(IrPrintGen *irp, IrInstGenAwait *instruction) {
20862592 fprintf(irp->f, "@await(");
2087 ir_print_other_instruction(irp, instruction->frame);
2593 ir_print_other_inst_gen(irp, instruction->frame);
20882594 fprintf(irp->f, ",");
2089 ir_print_other_instruction(irp, instruction->result_loc);
2595 ir_print_other_inst_gen(irp, instruction->result_loc);
2596 fprintf(irp->f, ")");
2597}
2598
2599static void ir_print_spill_begin(IrPrintSrc *irp, IrInstSrcSpillBegin *instruction) {
2600 fprintf(irp->f, "@spillBegin(");
2601 ir_print_other_inst_src(irp, instruction->operand);
20902602 fprintf(irp->f, ")");
20912603}
20922604
2093static void ir_print_spill_begin(IrPrint *irp, IrInstructionSpillBegin *instruction) {
2605static void ir_print_spill_begin(IrPrintGen *irp, IrInstGenSpillBegin *instruction) {
20942606 fprintf(irp->f, "@spillBegin(");
2095 ir_print_other_instruction(irp, instruction->operand);
2607 ir_print_other_inst_gen(irp, instruction->operand);
20962608 fprintf(irp->f, ")");
20972609}
20982610
2099static void ir_print_spill_end(IrPrint *irp, IrInstructionSpillEnd *instruction) {
2611static void ir_print_spill_end(IrPrintSrc *irp, IrInstSrcSpillEnd *instruction) {
21002612 fprintf(irp->f, "@spillEnd(");
2101 ir_print_other_instruction(irp, &instruction->begin->base);
2613 ir_print_other_inst_src(irp, &instruction->begin->base);
21022614 fprintf(irp->f, ")");
21032615}
21042616
2105static void ir_print_vector_extract_elem(IrPrint *irp, IrInstructionVectorExtractElem *instruction) {
2617static void ir_print_spill_end(IrPrintGen *irp, IrInstGenSpillEnd *instruction) {
2618 fprintf(irp->f, "@spillEnd(");
2619 ir_print_other_inst_gen(irp, &instruction->begin->base);
2620 fprintf(irp->f, ")");
2621}
2622
2623static void ir_print_vector_extract_elem(IrPrintGen *irp, IrInstGenVectorExtractElem *instruction) {
21062624 fprintf(irp->f, "@vectorExtractElem(");
2107 ir_print_other_instruction(irp, instruction->vector);
2625 ir_print_other_inst_gen(irp, instruction->vector);
21082626 fprintf(irp->f, ",");
2109 ir_print_other_instruction(irp, instruction->index);
2627 ir_print_other_inst_gen(irp, instruction->index);
21102628 fprintf(irp->f, ")");
21112629}
21122630
2113static void ir_print_instruction(IrPrint *irp, IrInstruction *instruction, bool trailing) {
2114 ir_print_prefix(irp, instruction, trailing);
2631static void ir_print_inst_src(IrPrintSrc *irp, IrInstSrc *instruction, bool trailing) {
2632 ir_print_prefix_src(irp, instruction, trailing);
21152633 switch (instruction->id) {
2116 case IrInstructionIdInvalid:
2634 case IrInstSrcIdInvalid:
21172635 zig_unreachable();
2118 case IrInstructionIdReturn:
2119 ir_print_return(irp, (IrInstructionReturn *)instruction);
2636 case IrInstSrcIdReturn:
2637 ir_print_return_src(irp, (IrInstSrcReturn *)instruction);
2638 break;
2639 case IrInstSrcIdConst:
2640 ir_print_const(irp, (IrInstSrcConst *)instruction);
2641 break;
2642 case IrInstSrcIdBinOp:
2643 ir_print_bin_op(irp, (IrInstSrcBinOp *)instruction);
2644 break;
2645 case IrInstSrcIdMergeErrSets:
2646 ir_print_merge_err_sets(irp, (IrInstSrcMergeErrSets *)instruction);
2647 break;
2648 case IrInstSrcIdDeclVar:
2649 ir_print_decl_var_src(irp, (IrInstSrcDeclVar *)instruction);
2650 break;
2651 case IrInstSrcIdCallExtra:
2652 ir_print_call_extra(irp, (IrInstSrcCallExtra *)instruction);
2653 break;
2654 case IrInstSrcIdCall:
2655 ir_print_call_src(irp, (IrInstSrcCall *)instruction);
2656 break;
2657 case IrInstSrcIdCallArgs:
2658 ir_print_call_args(irp, (IrInstSrcCallArgs *)instruction);
2659 break;
2660 case IrInstSrcIdUnOp:
2661 ir_print_un_op(irp, (IrInstSrcUnOp *)instruction);
2662 break;
2663 case IrInstSrcIdCondBr:
2664 ir_print_cond_br(irp, (IrInstSrcCondBr *)instruction);
21202665 break;
2121 case IrInstructionIdConst:
2122 ir_print_const(irp, (IrInstructionConst *)instruction);
2666 case IrInstSrcIdBr:
2667 ir_print_br(irp, (IrInstSrcBr *)instruction);
21232668 break;
2124 case IrInstructionIdBinOp:
2125 ir_print_bin_op(irp, (IrInstructionBinOp *)instruction);
2669 case IrInstSrcIdPhi:
2670 ir_print_phi(irp, (IrInstSrcPhi *)instruction);
21262671 break;
2127 case IrInstructionIdMergeErrSets:
2128 ir_print_merge_err_sets(irp, (IrInstructionMergeErrSets *)instruction);
2672 case IrInstSrcIdContainerInitList:
2673 ir_print_container_init_list(irp, (IrInstSrcContainerInitList *)instruction);
21292674 break;
2130 case IrInstructionIdDeclVarSrc:
2131 ir_print_decl_var_src(irp, (IrInstructionDeclVarSrc *)instruction);
2675 case IrInstSrcIdContainerInitFields:
2676 ir_print_container_init_fields(irp, (IrInstSrcContainerInitFields *)instruction);
21322677 break;
2133 case IrInstructionIdCast:
2134 ir_print_cast(irp, (IrInstructionCast *)instruction);
2678 case IrInstSrcIdUnreachable:
2679 ir_print_unreachable(irp, (IrInstSrcUnreachable *)instruction);
21352680 break;
2136 case IrInstructionIdCallExtra:
2137 ir_print_call_extra(irp, (IrInstructionCallExtra *)instruction);
2681 case IrInstSrcIdElemPtr:
2682 ir_print_elem_ptr(irp, (IrInstSrcElemPtr *)instruction);
21382683 break;
2139 case IrInstructionIdCallSrc:
2140 ir_print_call_src(irp, (IrInstructionCallSrc *)instruction);
2684 case IrInstSrcIdVarPtr:
2685 ir_print_var_ptr(irp, (IrInstSrcVarPtr *)instruction);
21412686 break;
2142 case IrInstructionIdCallSrcArgs:
2143 ir_print_call_src_args(irp, (IrInstructionCallSrcArgs *)instruction);
2687 case IrInstSrcIdLoadPtr:
2688 ir_print_load_ptr(irp, (IrInstSrcLoadPtr *)instruction);
21442689 break;
2145 case IrInstructionIdCallGen:
2146 ir_print_call_gen(irp, (IrInstructionCallGen *)instruction);
2690 case IrInstSrcIdStorePtr:
2691 ir_print_store_ptr(irp, (IrInstSrcStorePtr *)instruction);
21472692 break;
2148 case IrInstructionIdUnOp:
2149 ir_print_un_op(irp, (IrInstructionUnOp *)instruction);
2693 case IrInstSrcIdTypeOf:
2694 ir_print_typeof(irp, (IrInstSrcTypeOf *)instruction);
21502695 break;
2151 case IrInstructionIdCondBr:
2152 ir_print_cond_br(irp, (IrInstructionCondBr *)instruction);
2696 case IrInstSrcIdFieldPtr:
2697 ir_print_field_ptr(irp, (IrInstSrcFieldPtr *)instruction);
21532698 break;
2154 case IrInstructionIdBr:
2155 ir_print_br(irp, (IrInstructionBr *)instruction);
2699 case IrInstSrcIdSetCold:
2700 ir_print_set_cold(irp, (IrInstSrcSetCold *)instruction);
21562701 break;
2157 case IrInstructionIdPhi:
2158 ir_print_phi(irp, (IrInstructionPhi *)instruction);
2702 case IrInstSrcIdSetRuntimeSafety:
2703 ir_print_set_runtime_safety(irp, (IrInstSrcSetRuntimeSafety *)instruction);
21592704 break;
2160 case IrInstructionIdContainerInitList:
2161 ir_print_container_init_list(irp, (IrInstructionContainerInitList *)instruction);
2705 case IrInstSrcIdSetFloatMode:
2706 ir_print_set_float_mode(irp, (IrInstSrcSetFloatMode *)instruction);
21622707 break;
2163 case IrInstructionIdContainerInitFields:
2164 ir_print_container_init_fields(irp, (IrInstructionContainerInitFields *)instruction);
2708 case IrInstSrcIdArrayType:
2709 ir_print_array_type(irp, (IrInstSrcArrayType *)instruction);
21652710 break;
2166 case IrInstructionIdUnreachable:
2167 ir_print_unreachable(irp, (IrInstructionUnreachable *)instruction);
2711 case IrInstSrcIdSliceType:
2712 ir_print_slice_type(irp, (IrInstSrcSliceType *)instruction);
21682713 break;
2169 case IrInstructionIdElemPtr:
2170 ir_print_elem_ptr(irp, (IrInstructionElemPtr *)instruction);
2714 case IrInstSrcIdAnyFrameType:
2715 ir_print_any_frame_type(irp, (IrInstSrcAnyFrameType *)instruction);
21712716 break;
2172 case IrInstructionIdVarPtr:
2173 ir_print_var_ptr(irp, (IrInstructionVarPtr *)instruction);
2717 case IrInstSrcIdAsm:
2718 ir_print_asm_src(irp, (IrInstSrcAsm *)instruction);
21742719 break;
2175 case IrInstructionIdReturnPtr:
2176 ir_print_return_ptr(irp, (IrInstructionReturnPtr *)instruction);
2720 case IrInstSrcIdSizeOf:
2721 ir_print_size_of(irp, (IrInstSrcSizeOf *)instruction);
21772722 break;
2178 case IrInstructionIdLoadPtr:
2179 ir_print_load_ptr(irp, (IrInstructionLoadPtr *)instruction);
2723 case IrInstSrcIdTestNonNull:
2724 ir_print_test_non_null(irp, (IrInstSrcTestNonNull *)instruction);
21802725 break;
2181 case IrInstructionIdLoadPtrGen:
2182 ir_print_load_ptr_gen(irp, (IrInstructionLoadPtrGen *)instruction);
2726 case IrInstSrcIdOptionalUnwrapPtr:
2727 ir_print_optional_unwrap_ptr(irp, (IrInstSrcOptionalUnwrapPtr *)instruction);
21832728 break;
2184 case IrInstructionIdStorePtr:
2185 ir_print_store_ptr(irp, (IrInstructionStorePtr *)instruction);
2729 case IrInstSrcIdPopCount:
2730 ir_print_pop_count(irp, (IrInstSrcPopCount *)instruction);
21862731 break;
2187 case IrInstructionIdVectorStoreElem:
2188 ir_print_vector_store_elem(irp, (IrInstructionVectorStoreElem *)instruction);
2732 case IrInstSrcIdCtz:
2733 ir_print_ctz(irp, (IrInstSrcCtz *)instruction);
21892734 break;
2190 case IrInstructionIdTypeOf:
2191 ir_print_typeof(irp, (IrInstructionTypeOf *)instruction);
2735 case IrInstSrcIdBswap:
2736 ir_print_bswap(irp, (IrInstSrcBswap *)instruction);
21922737 break;
2193 case IrInstructionIdFieldPtr:
2194 ir_print_field_ptr(irp, (IrInstructionFieldPtr *)instruction);
2738 case IrInstSrcIdBitReverse:
2739 ir_print_bit_reverse(irp, (IrInstSrcBitReverse *)instruction);
21952740 break;
2196 case IrInstructionIdStructFieldPtr:
2197 ir_print_struct_field_ptr(irp, (IrInstructionStructFieldPtr *)instruction);
2741 case IrInstSrcIdSwitchBr:
2742 ir_print_switch_br(irp, (IrInstSrcSwitchBr *)instruction);
21982743 break;
2199 case IrInstructionIdUnionFieldPtr:
2200 ir_print_union_field_ptr(irp, (IrInstructionUnionFieldPtr *)instruction);
2744 case IrInstSrcIdSwitchVar:
2745 ir_print_switch_var(irp, (IrInstSrcSwitchVar *)instruction);
22012746 break;
2202 case IrInstructionIdSetCold:
2203 ir_print_set_cold(irp, (IrInstructionSetCold *)instruction);
2747 case IrInstSrcIdSwitchElseVar:
2748 ir_print_switch_else_var(irp, (IrInstSrcSwitchElseVar *)instruction);
22042749 break;
2205 case IrInstructionIdSetRuntimeSafety:
2206 ir_print_set_runtime_safety(irp, (IrInstructionSetRuntimeSafety *)instruction);
2750 case IrInstSrcIdSwitchTarget:
2751 ir_print_switch_target(irp, (IrInstSrcSwitchTarget *)instruction);
22072752 break;
2208 case IrInstructionIdSetFloatMode:
2209 ir_print_set_float_mode(irp, (IrInstructionSetFloatMode *)instruction);
2753 case IrInstSrcIdImport:
2754 ir_print_import(irp, (IrInstSrcImport *)instruction);
22102755 break;
2211 case IrInstructionIdArrayType:
2212 ir_print_array_type(irp, (IrInstructionArrayType *)instruction);
2756 case IrInstSrcIdRef:
2757 ir_print_ref(irp, (IrInstSrcRef *)instruction);
22132758 break;
2214 case IrInstructionIdSliceType:
2215 ir_print_slice_type(irp, (IrInstructionSliceType *)instruction);
2759 case IrInstSrcIdCompileErr:
2760 ir_print_compile_err(irp, (IrInstSrcCompileErr *)instruction);
22162761 break;
2217 case IrInstructionIdAnyFrameType:
2218 ir_print_any_frame_type(irp, (IrInstructionAnyFrameType *)instruction);
2762 case IrInstSrcIdCompileLog:
2763 ir_print_compile_log(irp, (IrInstSrcCompileLog *)instruction);
22192764 break;
2220 case IrInstructionIdAsmSrc:
2221 ir_print_asm_src(irp, (IrInstructionAsmSrc *)instruction);
2765 case IrInstSrcIdErrName:
2766 ir_print_err_name(irp, (IrInstSrcErrName *)instruction);
22222767 break;
2223 case IrInstructionIdAsmGen:
2224 ir_print_asm_gen(irp, (IrInstructionAsmGen *)instruction);
2768 case IrInstSrcIdCImport:
2769 ir_print_c_import(irp, (IrInstSrcCImport *)instruction);
22252770 break;
2226 case IrInstructionIdSizeOf:
2227 ir_print_size_of(irp, (IrInstructionSizeOf *)instruction);
2771 case IrInstSrcIdCInclude:
2772 ir_print_c_include(irp, (IrInstSrcCInclude *)instruction);
22282773 break;
2229 case IrInstructionIdTestNonNull:
2230 ir_print_test_non_null(irp, (IrInstructionTestNonNull *)instruction);
2774 case IrInstSrcIdCDefine:
2775 ir_print_c_define(irp, (IrInstSrcCDefine *)instruction);
22312776 break;
2232 case IrInstructionIdOptionalUnwrapPtr:
2233 ir_print_optional_unwrap_ptr(irp, (IrInstructionOptionalUnwrapPtr *)instruction);
2777 case IrInstSrcIdCUndef:
2778 ir_print_c_undef(irp, (IrInstSrcCUndef *)instruction);
22342779 break;
2235 case IrInstructionIdPopCount:
2236 ir_print_pop_count(irp, (IrInstructionPopCount *)instruction);
2780 case IrInstSrcIdEmbedFile:
2781 ir_print_embed_file(irp, (IrInstSrcEmbedFile *)instruction);
22372782 break;
2238 case IrInstructionIdClz:
2239 ir_print_clz(irp, (IrInstructionClz *)instruction);
2783 case IrInstSrcIdCmpxchg:
2784 ir_print_cmpxchg_src(irp, (IrInstSrcCmpxchg *)instruction);
22402785 break;
2241 case IrInstructionIdCtz:
2242 ir_print_ctz(irp, (IrInstructionCtz *)instruction);
2786 case IrInstSrcIdFence:
2787 ir_print_fence(irp, (IrInstSrcFence *)instruction);
22432788 break;
2244 case IrInstructionIdBswap:
2245 ir_print_bswap(irp, (IrInstructionBswap *)instruction);
2789 case IrInstSrcIdTruncate:
2790 ir_print_truncate(irp, (IrInstSrcTruncate *)instruction);
22462791 break;
2247 case IrInstructionIdBitReverse:
2248 ir_print_bit_reverse(irp, (IrInstructionBitReverse *)instruction);
2792 case IrInstSrcIdIntCast:
2793 ir_print_int_cast(irp, (IrInstSrcIntCast *)instruction);
22492794 break;
2250 case IrInstructionIdSwitchBr:
2251 ir_print_switch_br(irp, (IrInstructionSwitchBr *)instruction);
2795 case IrInstSrcIdFloatCast:
2796 ir_print_float_cast(irp, (IrInstSrcFloatCast *)instruction);
22522797 break;
2253 case IrInstructionIdSwitchVar:
2254 ir_print_switch_var(irp, (IrInstructionSwitchVar *)instruction);
2798 case IrInstSrcIdErrSetCast:
2799 ir_print_err_set_cast(irp, (IrInstSrcErrSetCast *)instruction);
22552800 break;
2256 case IrInstructionIdSwitchElseVar:
2257 ir_print_switch_else_var(irp, (IrInstructionSwitchElseVar *)instruction);
2801 case IrInstSrcIdFromBytes:
2802 ir_print_from_bytes(irp, (IrInstSrcFromBytes *)instruction);
22582803 break;
2259 case IrInstructionIdSwitchTarget:
2260 ir_print_switch_target(irp, (IrInstructionSwitchTarget *)instruction);
2804 case IrInstSrcIdToBytes:
2805 ir_print_to_bytes(irp, (IrInstSrcToBytes *)instruction);
22612806 break;
2262 case IrInstructionIdUnionTag:
2263 ir_print_union_tag(irp, (IrInstructionUnionTag *)instruction);
2807 case IrInstSrcIdIntToFloat:
2808 ir_print_int_to_float(irp, (IrInstSrcIntToFloat *)instruction);
22642809 break;
2265 case IrInstructionIdImport:
2266 ir_print_import(irp, (IrInstructionImport *)instruction);
2810 case IrInstSrcIdFloatToInt:
2811 ir_print_float_to_int(irp, (IrInstSrcFloatToInt *)instruction);
22672812 break;
2268 case IrInstructionIdRef:
2269 ir_print_ref(irp, (IrInstructionRef *)instruction);
2813 case IrInstSrcIdBoolToInt:
2814 ir_print_bool_to_int(irp, (IrInstSrcBoolToInt *)instruction);
22702815 break;
2271 case IrInstructionIdRefGen:
2272 ir_print_ref_gen(irp, (IrInstructionRefGen *)instruction);
2816 case IrInstSrcIdIntType:
2817 ir_print_int_type(irp, (IrInstSrcIntType *)instruction);
22732818 break;
2274 case IrInstructionIdCompileErr:
2275 ir_print_compile_err(irp, (IrInstructionCompileErr *)instruction);
2819 case IrInstSrcIdVectorType:
2820 ir_print_vector_type(irp, (IrInstSrcVectorType *)instruction);
22762821 break;
2277 case IrInstructionIdCompileLog:
2278 ir_print_compile_log(irp, (IrInstructionCompileLog *)instruction);
2822 case IrInstSrcIdShuffleVector:
2823 ir_print_shuffle_vector(irp, (IrInstSrcShuffleVector *)instruction);
22792824 break;
2280 case IrInstructionIdErrName:
2281 ir_print_err_name(irp, (IrInstructionErrName *)instruction);
2825 case IrInstSrcIdSplat:
2826 ir_print_splat_src(irp, (IrInstSrcSplat *)instruction);
22822827 break;
2283 case IrInstructionIdCImport:
2284 ir_print_c_import(irp, (IrInstructionCImport *)instruction);
2828 case IrInstSrcIdBoolNot:
2829 ir_print_bool_not(irp, (IrInstSrcBoolNot *)instruction);
22852830 break;
2286 case IrInstructionIdCInclude:
2287 ir_print_c_include(irp, (IrInstructionCInclude *)instruction);
2831 case IrInstSrcIdMemset:
2832 ir_print_memset(irp, (IrInstSrcMemset *)instruction);
22882833 break;
2289 case IrInstructionIdCDefine:
2290 ir_print_c_define(irp, (IrInstructionCDefine *)instruction);
2834 case IrInstSrcIdMemcpy:
2835 ir_print_memcpy(irp, (IrInstSrcMemcpy *)instruction);
22912836 break;
2292 case IrInstructionIdCUndef:
2293 ir_print_c_undef(irp, (IrInstructionCUndef *)instruction);
2837 case IrInstSrcIdSlice:
2838 ir_print_slice_src(irp, (IrInstSrcSlice *)instruction);
22942839 break;
2295 case IrInstructionIdEmbedFile:
2296 ir_print_embed_file(irp, (IrInstructionEmbedFile *)instruction);
2840 case IrInstSrcIdMemberCount:
2841 ir_print_member_count(irp, (IrInstSrcMemberCount *)instruction);
22972842 break;
2298 case IrInstructionIdCmpxchgSrc:
2299 ir_print_cmpxchg_src(irp, (IrInstructionCmpxchgSrc *)instruction);
2843 case IrInstSrcIdMemberType:
2844 ir_print_member_type(irp, (IrInstSrcMemberType *)instruction);
23002845 break;
2301 case IrInstructionIdCmpxchgGen:
2302 ir_print_cmpxchg_gen(irp, (IrInstructionCmpxchgGen *)instruction);
2846 case IrInstSrcIdMemberName:
2847 ir_print_member_name(irp, (IrInstSrcMemberName *)instruction);
23032848 break;
2304 case IrInstructionIdFence:
2305 ir_print_fence(irp, (IrInstructionFence *)instruction);
2849 case IrInstSrcIdBreakpoint:
2850 ir_print_breakpoint(irp, (IrInstSrcBreakpoint *)instruction);
23062851 break;
2307 case IrInstructionIdTruncate:
2308 ir_print_truncate(irp, (IrInstructionTruncate *)instruction);
2852 case IrInstSrcIdReturnAddress:
2853 ir_print_return_address(irp, (IrInstSrcReturnAddress *)instruction);
23092854 break;
2310 case IrInstructionIdIntCast:
2311 ir_print_int_cast(irp, (IrInstructionIntCast *)instruction);
2855 case IrInstSrcIdFrameAddress:
2856 ir_print_frame_address(irp, (IrInstSrcFrameAddress *)instruction);
23122857 break;
2313 case IrInstructionIdFloatCast:
2314 ir_print_float_cast(irp, (IrInstructionFloatCast *)instruction);
2858 case IrInstSrcIdFrameHandle:
2859 ir_print_handle(irp, (IrInstSrcFrameHandle *)instruction);
23152860 break;
2316 case IrInstructionIdErrSetCast:
2317 ir_print_err_set_cast(irp, (IrInstructionErrSetCast *)instruction);
2861 case IrInstSrcIdFrameType:
2862 ir_print_frame_type(irp, (IrInstSrcFrameType *)instruction);
23182863 break;
2319 case IrInstructionIdFromBytes:
2320 ir_print_from_bytes(irp, (IrInstructionFromBytes *)instruction);
2864 case IrInstSrcIdFrameSize:
2865 ir_print_frame_size_src(irp, (IrInstSrcFrameSize *)instruction);
23212866 break;
2322 case IrInstructionIdToBytes:
2323 ir_print_to_bytes(irp, (IrInstructionToBytes *)instruction);
2867 case IrInstSrcIdAlignOf:
2868 ir_print_align_of(irp, (IrInstSrcAlignOf *)instruction);
23242869 break;
2325 case IrInstructionIdIntToFloat:
2326 ir_print_int_to_float(irp, (IrInstructionIntToFloat *)instruction);
2870 case IrInstSrcIdOverflowOp:
2871 ir_print_overflow_op(irp, (IrInstSrcOverflowOp *)instruction);
23272872 break;
2328 case IrInstructionIdFloatToInt:
2329 ir_print_float_to_int(irp, (IrInstructionFloatToInt *)instruction);
2873 case IrInstSrcIdTestErr:
2874 ir_print_test_err_src(irp, (IrInstSrcTestErr *)instruction);
23302875 break;
2331 case IrInstructionIdBoolToInt:
2332 ir_print_bool_to_int(irp, (IrInstructionBoolToInt *)instruction);
2876 case IrInstSrcIdUnwrapErrCode:
2877 ir_print_unwrap_err_code(irp, (IrInstSrcUnwrapErrCode *)instruction);
23332878 break;
2334 case IrInstructionIdIntType:
2335 ir_print_int_type(irp, (IrInstructionIntType *)instruction);
2879 case IrInstSrcIdUnwrapErrPayload:
2880 ir_print_unwrap_err_payload(irp, (IrInstSrcUnwrapErrPayload *)instruction);
23362881 break;
2337 case IrInstructionIdVectorType:
2338 ir_print_vector_type(irp, (IrInstructionVectorType *)instruction);
2882 case IrInstSrcIdFnProto:
2883 ir_print_fn_proto(irp, (IrInstSrcFnProto *)instruction);
23392884 break;
2340 case IrInstructionIdShuffleVector:
2341 ir_print_shuffle_vector(irp, (IrInstructionShuffleVector *)instruction);
2885 case IrInstSrcIdTestComptime:
2886 ir_print_test_comptime(irp, (IrInstSrcTestComptime *)instruction);
23422887 break;
2343 case IrInstructionIdSplatSrc:
2344 ir_print_splat_src(irp, (IrInstructionSplatSrc *)instruction);
2888 case IrInstSrcIdPtrCast:
2889 ir_print_ptr_cast_src(irp, (IrInstSrcPtrCast *)instruction);
23452890 break;
2346 case IrInstructionIdSplatGen:
2347 ir_print_splat_gen(irp, (IrInstructionSplatGen *)instruction);
2891 case IrInstSrcIdBitCast:
2892 ir_print_bit_cast_src(irp, (IrInstSrcBitCast *)instruction);
23482893 break;
2349 case IrInstructionIdBoolNot:
2350 ir_print_bool_not(irp, (IrInstructionBoolNot *)instruction);
2894 case IrInstSrcIdPtrToInt:
2895 ir_print_ptr_to_int(irp, (IrInstSrcPtrToInt *)instruction);
23512896 break;
2352 case IrInstructionIdMemset:
2353 ir_print_memset(irp, (IrInstructionMemset *)instruction);
2897 case IrInstSrcIdIntToPtr:
2898 ir_print_int_to_ptr(irp, (IrInstSrcIntToPtr *)instruction);
23542899 break;
2355 case IrInstructionIdMemcpy:
2356 ir_print_memcpy(irp, (IrInstructionMemcpy *)instruction);
2900 case IrInstSrcIdIntToEnum:
2901 ir_print_int_to_enum(irp, (IrInstSrcIntToEnum *)instruction);
23572902 break;
2358 case IrInstructionIdSliceSrc:
2359 ir_print_slice_src(irp, (IrInstructionSliceSrc *)instruction);
2903 case IrInstSrcIdIntToErr:
2904 ir_print_int_to_err(irp, (IrInstSrcIntToErr *)instruction);
23602905 break;
2361 case IrInstructionIdSliceGen:
2362 ir_print_slice_gen(irp, (IrInstructionSliceGen *)instruction);
2906 case IrInstSrcIdErrToInt:
2907 ir_print_err_to_int(irp, (IrInstSrcErrToInt *)instruction);
23632908 break;
2364 case IrInstructionIdMemberCount:
2365 ir_print_member_count(irp, (IrInstructionMemberCount *)instruction);
2909 case IrInstSrcIdCheckSwitchProngs:
2910 ir_print_check_switch_prongs(irp, (IrInstSrcCheckSwitchProngs *)instruction);
23662911 break;
2367 case IrInstructionIdMemberType:
2368 ir_print_member_type(irp, (IrInstructionMemberType *)instruction);
2912 case IrInstSrcIdCheckStatementIsVoid:
2913 ir_print_check_statement_is_void(irp, (IrInstSrcCheckStatementIsVoid *)instruction);
23692914 break;
2370 case IrInstructionIdMemberName:
2371 ir_print_member_name(irp, (IrInstructionMemberName *)instruction);
2915 case IrInstSrcIdTypeName:
2916 ir_print_type_name(irp, (IrInstSrcTypeName *)instruction);
23722917 break;
2373 case IrInstructionIdBreakpoint:
2374 ir_print_breakpoint(irp, (IrInstructionBreakpoint *)instruction);
2918 case IrInstSrcIdTagName:
2919 ir_print_tag_name(irp, (IrInstSrcTagName *)instruction);
23752920 break;
2376 case IrInstructionIdReturnAddress:
2377 ir_print_return_address(irp, (IrInstructionReturnAddress *)instruction);
2921 case IrInstSrcIdPtrType:
2922 ir_print_ptr_type(irp, (IrInstSrcPtrType *)instruction);
23782923 break;
2379 case IrInstructionIdFrameAddress:
2380 ir_print_frame_address(irp, (IrInstructionFrameAddress *)instruction);
2924 case IrInstSrcIdDeclRef:
2925 ir_print_decl_ref(irp, (IrInstSrcDeclRef *)instruction);
23812926 break;
2382 case IrInstructionIdFrameHandle:
2383 ir_print_handle(irp, (IrInstructionFrameHandle *)instruction);
2927 case IrInstSrcIdPanic:
2928 ir_print_panic(irp, (IrInstSrcPanic *)instruction);
23842929 break;
2385 case IrInstructionIdFrameType:
2386 ir_print_frame_type(irp, (IrInstructionFrameType *)instruction);
2930 case IrInstSrcIdFieldParentPtr:
2931 ir_print_field_parent_ptr(irp, (IrInstSrcFieldParentPtr *)instruction);
23872932 break;
2388 case IrInstructionIdFrameSizeSrc:
2389 ir_print_frame_size_src(irp, (IrInstructionFrameSizeSrc *)instruction);
2933 case IrInstSrcIdByteOffsetOf:
2934 ir_print_byte_offset_of(irp, (IrInstSrcByteOffsetOf *)instruction);
23902935 break;
2391 case IrInstructionIdFrameSizeGen:
2392 ir_print_frame_size_gen(irp, (IrInstructionFrameSizeGen *)instruction);
2936 case IrInstSrcIdBitOffsetOf:
2937 ir_print_bit_offset_of(irp, (IrInstSrcBitOffsetOf *)instruction);
23932938 break;
2394 case IrInstructionIdAlignOf:
2395 ir_print_align_of(irp, (IrInstructionAlignOf *)instruction);
2939 case IrInstSrcIdTypeInfo:
2940 ir_print_type_info(irp, (IrInstSrcTypeInfo *)instruction);
23962941 break;
2397 case IrInstructionIdOverflowOp:
2398 ir_print_overflow_op(irp, (IrInstructionOverflowOp *)instruction);
2942 case IrInstSrcIdType:
2943 ir_print_type(irp, (IrInstSrcType *)instruction);
23992944 break;
2400 case IrInstructionIdTestErrSrc:
2401 ir_print_test_err_src(irp, (IrInstructionTestErrSrc *)instruction);
2945 case IrInstSrcIdHasField:
2946 ir_print_has_field(irp, (IrInstSrcHasField *)instruction);
24022947 break;
2403 case IrInstructionIdTestErrGen:
2404 ir_print_test_err_gen(irp, (IrInstructionTestErrGen *)instruction);
2948 case IrInstSrcIdTypeId:
2949 ir_print_type_id(irp, (IrInstSrcTypeId *)instruction);
24052950 break;
2406 case IrInstructionIdUnwrapErrCode:
2407 ir_print_unwrap_err_code(irp, (IrInstructionUnwrapErrCode *)instruction);
2951 case IrInstSrcIdSetEvalBranchQuota:
2952 ir_print_set_eval_branch_quota(irp, (IrInstSrcSetEvalBranchQuota *)instruction);
24082953 break;
2409 case IrInstructionIdUnwrapErrPayload:
2410 ir_print_unwrap_err_payload(irp, (IrInstructionUnwrapErrPayload *)instruction);
2954 case IrInstSrcIdAlignCast:
2955 ir_print_align_cast(irp, (IrInstSrcAlignCast *)instruction);
24112956 break;
2412 case IrInstructionIdOptionalWrap:
2413 ir_print_optional_wrap(irp, (IrInstructionOptionalWrap *)instruction);
2957 case IrInstSrcIdImplicitCast:
2958 ir_print_implicit_cast(irp, (IrInstSrcImplicitCast *)instruction);
24142959 break;
2415 case IrInstructionIdErrWrapCode:
2416 ir_print_err_wrap_code(irp, (IrInstructionErrWrapCode *)instruction);
2960 case IrInstSrcIdResolveResult:
2961 ir_print_resolve_result(irp, (IrInstSrcResolveResult *)instruction);
24172962 break;
2418 case IrInstructionIdErrWrapPayload:
2419 ir_print_err_wrap_payload(irp, (IrInstructionErrWrapPayload *)instruction);
2963 case IrInstSrcIdResetResult:
2964 ir_print_reset_result(irp, (IrInstSrcResetResult *)instruction);
24202965 break;
2421 case IrInstructionIdFnProto:
2422 ir_print_fn_proto(irp, (IrInstructionFnProto *)instruction);
2966 case IrInstSrcIdOpaqueType:
2967 ir_print_opaque_type(irp, (IrInstSrcOpaqueType *)instruction);
24232968 break;
2424 case IrInstructionIdTestComptime:
2425 ir_print_test_comptime(irp, (IrInstructionTestComptime *)instruction);
2969 case IrInstSrcIdSetAlignStack:
2970 ir_print_set_align_stack(irp, (IrInstSrcSetAlignStack *)instruction);
24262971 break;
2427 case IrInstructionIdPtrCastSrc:
2428 ir_print_ptr_cast_src(irp, (IrInstructionPtrCastSrc *)instruction);
2972 case IrInstSrcIdArgType:
2973 ir_print_arg_type(irp, (IrInstSrcArgType *)instruction);
24292974 break;
2430 case IrInstructionIdPtrCastGen:
2431 ir_print_ptr_cast_gen(irp, (IrInstructionPtrCastGen *)instruction);
2975 case IrInstSrcIdTagType:
2976 ir_print_enum_tag_type(irp, (IrInstSrcTagType *)instruction);
24322977 break;
2433 case IrInstructionIdBitCastSrc:
2434 ir_print_bit_cast_src(irp, (IrInstructionBitCastSrc *)instruction);
2978 case IrInstSrcIdExport:
2979 ir_print_export(irp, (IrInstSrcExport *)instruction);
24352980 break;
2436 case IrInstructionIdBitCastGen:
2437 ir_print_bit_cast_gen(irp, (IrInstructionBitCastGen *)instruction);
2981 case IrInstSrcIdErrorReturnTrace:
2982 ir_print_error_return_trace(irp, (IrInstSrcErrorReturnTrace *)instruction);
24382983 break;
2439 case IrInstructionIdWidenOrShorten:
2440 ir_print_widen_or_shorten(irp, (IrInstructionWidenOrShorten *)instruction);
2984 case IrInstSrcIdErrorUnion:
2985 ir_print_error_union(irp, (IrInstSrcErrorUnion *)instruction);
24412986 break;
2442 case IrInstructionIdPtrToInt:
2443 ir_print_ptr_to_int(irp, (IrInstructionPtrToInt *)instruction);
2987 case IrInstSrcIdAtomicRmw:
2988 ir_print_atomic_rmw(irp, (IrInstSrcAtomicRmw *)instruction);
24442989 break;
2445 case IrInstructionIdIntToPtr:
2446 ir_print_int_to_ptr(irp, (IrInstructionIntToPtr *)instruction);
2990 case IrInstSrcIdSaveErrRetAddr:
2991 ir_print_save_err_ret_addr(irp, (IrInstSrcSaveErrRetAddr *)instruction);
2992 break;
2993 case IrInstSrcIdAddImplicitReturnType:
2994 ir_print_add_implicit_return_type(irp, (IrInstSrcAddImplicitReturnType *)instruction);
2995 break;
2996 case IrInstSrcIdFloatOp:
2997 ir_print_float_op(irp, (IrInstSrcFloatOp *)instruction);
2998 break;
2999 case IrInstSrcIdMulAdd:
3000 ir_print_mul_add(irp, (IrInstSrcMulAdd *)instruction);
3001 break;
3002 case IrInstSrcIdAtomicLoad:
3003 ir_print_atomic_load(irp, (IrInstSrcAtomicLoad *)instruction);
3004 break;
3005 case IrInstSrcIdAtomicStore:
3006 ir_print_atomic_store(irp, (IrInstSrcAtomicStore *)instruction);
3007 break;
3008 case IrInstSrcIdEnumToInt:
3009 ir_print_enum_to_int(irp, (IrInstSrcEnumToInt *)instruction);
3010 break;
3011 case IrInstSrcIdCheckRuntimeScope:
3012 ir_print_check_runtime_scope(irp, (IrInstSrcCheckRuntimeScope *)instruction);
3013 break;
3014 case IrInstSrcIdHasDecl:
3015 ir_print_has_decl(irp, (IrInstSrcHasDecl *)instruction);
3016 break;
3017 case IrInstSrcIdUndeclaredIdent:
3018 ir_print_undeclared_ident(irp, (IrInstSrcUndeclaredIdent *)instruction);
3019 break;
3020 case IrInstSrcIdAlloca:
3021 ir_print_alloca_src(irp, (IrInstSrcAlloca *)instruction);
3022 break;
3023 case IrInstSrcIdEndExpr:
3024 ir_print_end_expr(irp, (IrInstSrcEndExpr *)instruction);
3025 break;
3026 case IrInstSrcIdUnionInitNamedField:
3027 ir_print_union_init_named_field(irp, (IrInstSrcUnionInitNamedField *)instruction);
3028 break;
3029 case IrInstSrcIdSuspendBegin:
3030 ir_print_suspend_begin(irp, (IrInstSrcSuspendBegin *)instruction);
3031 break;
3032 case IrInstSrcIdSuspendFinish:
3033 ir_print_suspend_finish(irp, (IrInstSrcSuspendFinish *)instruction);
3034 break;
3035 case IrInstSrcIdResume:
3036 ir_print_resume(irp, (IrInstSrcResume *)instruction);
3037 break;
3038 case IrInstSrcIdAwait:
3039 ir_print_await_src(irp, (IrInstSrcAwait *)instruction);
3040 break;
3041 case IrInstSrcIdSpillBegin:
3042 ir_print_spill_begin(irp, (IrInstSrcSpillBegin *)instruction);
3043 break;
3044 case IrInstSrcIdSpillEnd:
3045 ir_print_spill_end(irp, (IrInstSrcSpillEnd *)instruction);
3046 break;
3047 case IrInstSrcIdClz:
3048 ir_print_clz(irp, (IrInstSrcClz *)instruction);
3049 break;
3050 }
3051 fprintf(irp->f, "\n");
3052}
3053
3054static void ir_print_inst_gen(IrPrintGen *irp, IrInstGen *instruction, bool trailing) {
3055 ir_print_prefix_gen(irp, instruction, trailing);
3056 switch (instruction->id) {
3057 case IrInstGenIdInvalid:
3058 zig_unreachable();
3059 case IrInstGenIdReturn:
3060 ir_print_return_gen(irp, (IrInstGenReturn *)instruction);
24473061 break;
2448 case IrInstructionIdIntToEnum:
2449 ir_print_int_to_enum(irp, (IrInstructionIntToEnum *)instruction);
3062 case IrInstGenIdConst:
3063 ir_print_const(irp, (IrInstGenConst *)instruction);
24503064 break;
2451 case IrInstructionIdIntToErr:
2452 ir_print_int_to_err(irp, (IrInstructionIntToErr *)instruction);
3065 case IrInstGenIdBinOp:
3066 ir_print_bin_op(irp, (IrInstGenBinOp *)instruction);
24533067 break;
2454 case IrInstructionIdErrToInt:
2455 ir_print_err_to_int(irp, (IrInstructionErrToInt *)instruction);
3068 case IrInstGenIdDeclVar:
3069 ir_print_decl_var_gen(irp, (IrInstGenDeclVar *)instruction);
24563070 break;
2457 case IrInstructionIdCheckSwitchProngs:
2458 ir_print_check_switch_prongs(irp, (IrInstructionCheckSwitchProngs *)instruction);
3071 case IrInstGenIdCast:
3072 ir_print_cast(irp, (IrInstGenCast *)instruction);
24593073 break;
2460 case IrInstructionIdCheckStatementIsVoid:
2461 ir_print_check_statement_is_void(irp, (IrInstructionCheckStatementIsVoid *)instruction);
3074 case IrInstGenIdCall:
3075 ir_print_call_gen(irp, (IrInstGenCall *)instruction);
24623076 break;
2463 case IrInstructionIdTypeName:
2464 ir_print_type_name(irp, (IrInstructionTypeName *)instruction);
3077 case IrInstGenIdCondBr:
3078 ir_print_cond_br(irp, (IrInstGenCondBr *)instruction);
24653079 break;
2466 case IrInstructionIdTagName:
2467 ir_print_tag_name(irp, (IrInstructionTagName *)instruction);
3080 case IrInstGenIdBr:
3081 ir_print_br(irp, (IrInstGenBr *)instruction);
24683082 break;
2469 case IrInstructionIdPtrType:
2470 ir_print_ptr_type(irp, (IrInstructionPtrType *)instruction);
3083 case IrInstGenIdPhi:
3084 ir_print_phi(irp, (IrInstGenPhi *)instruction);
24713085 break;
2472 case IrInstructionIdDeclRef:
2473 ir_print_decl_ref(irp, (IrInstructionDeclRef *)instruction);
3086 case IrInstGenIdUnreachable:
3087 ir_print_unreachable(irp, (IrInstGenUnreachable *)instruction);
24743088 break;
2475 case IrInstructionIdPanic:
2476 ir_print_panic(irp, (IrInstructionPanic *)instruction);
3089 case IrInstGenIdElemPtr:
3090 ir_print_elem_ptr(irp, (IrInstGenElemPtr *)instruction);
24773091 break;
2478 case IrInstructionIdFieldParentPtr:
2479 ir_print_field_parent_ptr(irp, (IrInstructionFieldParentPtr *)instruction);
3092 case IrInstGenIdVarPtr:
3093 ir_print_var_ptr(irp, (IrInstGenVarPtr *)instruction);
24803094 break;
2481 case IrInstructionIdByteOffsetOf:
2482 ir_print_byte_offset_of(irp, (IrInstructionByteOffsetOf *)instruction);
3095 case IrInstGenIdReturnPtr:
3096 ir_print_return_ptr(irp, (IrInstGenReturnPtr *)instruction);
24833097 break;
2484 case IrInstructionIdBitOffsetOf:
2485 ir_print_bit_offset_of(irp, (IrInstructionBitOffsetOf *)instruction);
3098 case IrInstGenIdLoadPtr:
3099 ir_print_load_ptr_gen(irp, (IrInstGenLoadPtr *)instruction);
24863100 break;
2487 case IrInstructionIdTypeInfo:
2488 ir_print_type_info(irp, (IrInstructionTypeInfo *)instruction);
3101 case IrInstGenIdStorePtr:
3102 ir_print_store_ptr(irp, (IrInstGenStorePtr *)instruction);
24893103 break;
2490 case IrInstructionIdType:
2491 ir_print_type(irp, (IrInstructionType *)instruction);
3104 case IrInstGenIdStructFieldPtr:
3105 ir_print_struct_field_ptr(irp, (IrInstGenStructFieldPtr *)instruction);
24923106 break;
2493 case IrInstructionIdHasField:
2494 ir_print_has_field(irp, (IrInstructionHasField *)instruction);
3107 case IrInstGenIdUnionFieldPtr:
3108 ir_print_union_field_ptr(irp, (IrInstGenUnionFieldPtr *)instruction);
24953109 break;
2496 case IrInstructionIdTypeId:
2497 ir_print_type_id(irp, (IrInstructionTypeId *)instruction);
3110 case IrInstGenIdAsm:
3111 ir_print_asm_gen(irp, (IrInstGenAsm *)instruction);
24983112 break;
2499 case IrInstructionIdSetEvalBranchQuota:
2500 ir_print_set_eval_branch_quota(irp, (IrInstructionSetEvalBranchQuota *)instruction);
3113 case IrInstGenIdTestNonNull:
3114 ir_print_test_non_null(irp, (IrInstGenTestNonNull *)instruction);
25013115 break;
2502 case IrInstructionIdAlignCast:
2503 ir_print_align_cast(irp, (IrInstructionAlignCast *)instruction);
3116 case IrInstGenIdOptionalUnwrapPtr:
3117 ir_print_optional_unwrap_ptr(irp, (IrInstGenOptionalUnwrapPtr *)instruction);
25043118 break;
2505 case IrInstructionIdImplicitCast:
2506 ir_print_implicit_cast(irp, (IrInstructionImplicitCast *)instruction);
3119 case IrInstGenIdPopCount:
3120 ir_print_pop_count(irp, (IrInstGenPopCount *)instruction);
25073121 break;
2508 case IrInstructionIdResolveResult:
2509 ir_print_resolve_result(irp, (IrInstructionResolveResult *)instruction);
3122 case IrInstGenIdClz:
3123 ir_print_clz(irp, (IrInstGenClz *)instruction);
25103124 break;
2511 case IrInstructionIdResetResult:
2512 ir_print_reset_result(irp, (IrInstructionResetResult *)instruction);
3125 case IrInstGenIdCtz:
3126 ir_print_ctz(irp, (IrInstGenCtz *)instruction);
25133127 break;
2514 case IrInstructionIdOpaqueType:
2515 ir_print_opaque_type(irp, (IrInstructionOpaqueType *)instruction);
3128 case IrInstGenIdBswap:
3129 ir_print_bswap(irp, (IrInstGenBswap *)instruction);
25163130 break;
2517 case IrInstructionIdSetAlignStack:
2518 ir_print_set_align_stack(irp, (IrInstructionSetAlignStack *)instruction);
3131 case IrInstGenIdBitReverse:
3132 ir_print_bit_reverse(irp, (IrInstGenBitReverse *)instruction);
25193133 break;
2520 case IrInstructionIdArgType:
2521 ir_print_arg_type(irp, (IrInstructionArgType *)instruction);
3134 case IrInstGenIdSwitchBr:
3135 ir_print_switch_br(irp, (IrInstGenSwitchBr *)instruction);
25223136 break;
2523 case IrInstructionIdTagType:
2524 ir_print_enum_tag_type(irp, (IrInstructionTagType *)instruction);
3137 case IrInstGenIdUnionTag:
3138 ir_print_union_tag(irp, (IrInstGenUnionTag *)instruction);
25253139 break;
2526 case IrInstructionIdExport:
2527 ir_print_export(irp, (IrInstructionExport *)instruction);
3140 case IrInstGenIdRef:
3141 ir_print_ref_gen(irp, (IrInstGenRef *)instruction);
25283142 break;
2529 case IrInstructionIdErrorReturnTrace:
2530 ir_print_error_return_trace(irp, (IrInstructionErrorReturnTrace *)instruction);
3143 case IrInstGenIdErrName:
3144 ir_print_err_name(irp, (IrInstGenErrName *)instruction);
25313145 break;
2532 case IrInstructionIdErrorUnion:
2533 ir_print_error_union(irp, (IrInstructionErrorUnion *)instruction);
3146 case IrInstGenIdCmpxchg:
3147 ir_print_cmpxchg_gen(irp, (IrInstGenCmpxchg *)instruction);
25343148 break;
2535 case IrInstructionIdAtomicRmw:
2536 ir_print_atomic_rmw(irp, (IrInstructionAtomicRmw *)instruction);
3149 case IrInstGenIdFence:
3150 ir_print_fence(irp, (IrInstGenFence *)instruction);
25373151 break;
2538 case IrInstructionIdSaveErrRetAddr:
2539 ir_print_save_err_ret_addr(irp, (IrInstructionSaveErrRetAddr *)instruction);
3152 case IrInstGenIdTruncate:
3153 ir_print_truncate(irp, (IrInstGenTruncate *)instruction);
25403154 break;
2541 case IrInstructionIdAddImplicitReturnType:
2542 ir_print_add_implicit_return_type(irp, (IrInstructionAddImplicitReturnType *)instruction);
3155 case IrInstGenIdShuffleVector:
3156 ir_print_shuffle_vector(irp, (IrInstGenShuffleVector *)instruction);
25433157 break;
2544 case IrInstructionIdFloatOp:
2545 ir_print_float_op(irp, (IrInstructionFloatOp *)instruction);
3158 case IrInstGenIdSplat:
3159 ir_print_splat_gen(irp, (IrInstGenSplat *)instruction);
25463160 break;
2547 case IrInstructionIdMulAdd:
2548 ir_print_mul_add(irp, (IrInstructionMulAdd *)instruction);
3161 case IrInstGenIdBoolNot:
3162 ir_print_bool_not(irp, (IrInstGenBoolNot *)instruction);
25493163 break;
2550 case IrInstructionIdAtomicLoad:
2551 ir_print_atomic_load(irp, (IrInstructionAtomicLoad *)instruction);
3164 case IrInstGenIdMemset:
3165 ir_print_memset(irp, (IrInstGenMemset *)instruction);
25523166 break;
2553 case IrInstructionIdAtomicStore:
2554 ir_print_atomic_store(irp, (IrInstructionAtomicStore *)instruction);
3167 case IrInstGenIdMemcpy:
3168 ir_print_memcpy(irp, (IrInstGenMemcpy *)instruction);
25553169 break;
2556 case IrInstructionIdEnumToInt:
2557 ir_print_enum_to_int(irp, (IrInstructionEnumToInt *)instruction);
3170 case IrInstGenIdSlice:
3171 ir_print_slice_gen(irp, (IrInstGenSlice *)instruction);
25583172 break;
2559 case IrInstructionIdCheckRuntimeScope:
2560 ir_print_check_runtime_scope(irp, (IrInstructionCheckRuntimeScope *)instruction);
3173 case IrInstGenIdBreakpoint:
3174 ir_print_breakpoint(irp, (IrInstGenBreakpoint *)instruction);
25613175 break;
2562 case IrInstructionIdDeclVarGen:
2563 ir_print_decl_var_gen(irp, (IrInstructionDeclVarGen *)instruction);
3176 case IrInstGenIdReturnAddress:
3177 ir_print_return_address(irp, (IrInstGenReturnAddress *)instruction);
25643178 break;
2565 case IrInstructionIdArrayToVector:
2566 ir_print_array_to_vector(irp, (IrInstructionArrayToVector *)instruction);
3179 case IrInstGenIdFrameAddress:
3180 ir_print_frame_address(irp, (IrInstGenFrameAddress *)instruction);
25673181 break;
2568 case IrInstructionIdVectorToArray:
2569 ir_print_vector_to_array(irp, (IrInstructionVectorToArray *)instruction);
3182 case IrInstGenIdFrameHandle:
3183 ir_print_handle(irp, (IrInstGenFrameHandle *)instruction);
25703184 break;
2571 case IrInstructionIdPtrOfArrayToSlice:
2572 ir_print_ptr_of_array_to_slice(irp, (IrInstructionPtrOfArrayToSlice *)instruction);
3185 case IrInstGenIdFrameSize:
3186 ir_print_frame_size_gen(irp, (IrInstGenFrameSize *)instruction);
25733187 break;
2574 case IrInstructionIdAssertZero:
2575 ir_print_assert_zero(irp, (IrInstructionAssertZero *)instruction);
3188 case IrInstGenIdOverflowOp:
3189 ir_print_overflow_op(irp, (IrInstGenOverflowOp *)instruction);
25763190 break;
2577 case IrInstructionIdAssertNonNull:
2578 ir_print_assert_non_null(irp, (IrInstructionAssertNonNull *)instruction);
3191 case IrInstGenIdTestErr:
3192 ir_print_test_err_gen(irp, (IrInstGenTestErr *)instruction);
25793193 break;
2580 case IrInstructionIdResizeSlice:
2581 ir_print_resize_slice(irp, (IrInstructionResizeSlice *)instruction);
3194 case IrInstGenIdUnwrapErrCode:
3195 ir_print_unwrap_err_code(irp, (IrInstGenUnwrapErrCode *)instruction);
25823196 break;
2583 case IrInstructionIdHasDecl:
2584 ir_print_has_decl(irp, (IrInstructionHasDecl *)instruction);
3197 case IrInstGenIdUnwrapErrPayload:
3198 ir_print_unwrap_err_payload(irp, (IrInstGenUnwrapErrPayload *)instruction);
25853199 break;
2586 case IrInstructionIdUndeclaredIdent:
2587 ir_print_undeclared_ident(irp, (IrInstructionUndeclaredIdent *)instruction);
3200 case IrInstGenIdOptionalWrap:
3201 ir_print_optional_wrap(irp, (IrInstGenOptionalWrap *)instruction);
25883202 break;
2589 case IrInstructionIdAllocaSrc:
2590 ir_print_alloca_src(irp, (IrInstructionAllocaSrc *)instruction);
3203 case IrInstGenIdErrWrapCode:
3204 ir_print_err_wrap_code(irp, (IrInstGenErrWrapCode *)instruction);
25913205 break;
2592 case IrInstructionIdAllocaGen:
2593 ir_print_alloca_gen(irp, (IrInstructionAllocaGen *)instruction);
3206 case IrInstGenIdErrWrapPayload:
3207 ir_print_err_wrap_payload(irp, (IrInstGenErrWrapPayload *)instruction);
25943208 break;
2595 case IrInstructionIdEndExpr:
2596 ir_print_end_expr(irp, (IrInstructionEndExpr *)instruction);
3209 case IrInstGenIdPtrCast:
3210 ir_print_ptr_cast_gen(irp, (IrInstGenPtrCast *)instruction);
25973211 break;
2598 case IrInstructionIdUnionInitNamedField:
2599 ir_print_union_init_named_field(irp, (IrInstructionUnionInitNamedField *)instruction);
3212 case IrInstGenIdBitCast:
3213 ir_print_bit_cast_gen(irp, (IrInstGenBitCast *)instruction);
26003214 break;
2601 case IrInstructionIdSuspendBegin:
2602 ir_print_suspend_begin(irp, (IrInstructionSuspendBegin *)instruction);
3215 case IrInstGenIdWidenOrShorten:
3216 ir_print_widen_or_shorten(irp, (IrInstGenWidenOrShorten *)instruction);
26033217 break;
2604 case IrInstructionIdSuspendFinish:
2605 ir_print_suspend_finish(irp, (IrInstructionSuspendFinish *)instruction);
3218 case IrInstGenIdPtrToInt:
3219 ir_print_ptr_to_int(irp, (IrInstGenPtrToInt *)instruction);
26063220 break;
2607 case IrInstructionIdResume:
2608 ir_print_resume(irp, (IrInstructionResume *)instruction);
3221 case IrInstGenIdIntToPtr:
3222 ir_print_int_to_ptr(irp, (IrInstGenIntToPtr *)instruction);
26093223 break;
2610 case IrInstructionIdAwaitSrc:
2611 ir_print_await_src(irp, (IrInstructionAwaitSrc *)instruction);
3224 case IrInstGenIdIntToEnum:
3225 ir_print_int_to_enum(irp, (IrInstGenIntToEnum *)instruction);
26123226 break;
2613 case IrInstructionIdAwaitGen:
2614 ir_print_await_gen(irp, (IrInstructionAwaitGen *)instruction);
3227 case IrInstGenIdIntToErr:
3228 ir_print_int_to_err(irp, (IrInstGenIntToErr *)instruction);
26153229 break;
2616 case IrInstructionIdSpillBegin:
2617 ir_print_spill_begin(irp, (IrInstructionSpillBegin *)instruction);
3230 case IrInstGenIdErrToInt:
3231 ir_print_err_to_int(irp, (IrInstGenErrToInt *)instruction);
26183232 break;
2619 case IrInstructionIdSpillEnd:
2620 ir_print_spill_end(irp, (IrInstructionSpillEnd *)instruction);
3233 case IrInstGenIdTagName:
3234 ir_print_tag_name(irp, (IrInstGenTagName *)instruction);
26213235 break;
2622 case IrInstructionIdVectorExtractElem:
2623 ir_print_vector_extract_elem(irp, (IrInstructionVectorExtractElem *)instruction);
3236 case IrInstGenIdPanic:
3237 ir_print_panic(irp, (IrInstGenPanic *)instruction);
3238 break;
3239 case IrInstGenIdFieldParentPtr:
3240 ir_print_field_parent_ptr(irp, (IrInstGenFieldParentPtr *)instruction);
3241 break;
3242 case IrInstGenIdAlignCast:
3243 ir_print_align_cast(irp, (IrInstGenAlignCast *)instruction);
3244 break;
3245 case IrInstGenIdErrorReturnTrace:
3246 ir_print_error_return_trace(irp, (IrInstGenErrorReturnTrace *)instruction);
3247 break;
3248 case IrInstGenIdAtomicRmw:
3249 ir_print_atomic_rmw(irp, (IrInstGenAtomicRmw *)instruction);
3250 break;
3251 case IrInstGenIdSaveErrRetAddr:
3252 ir_print_save_err_ret_addr(irp, (IrInstGenSaveErrRetAddr *)instruction);
3253 break;
3254 case IrInstGenIdFloatOp:
3255 ir_print_float_op(irp, (IrInstGenFloatOp *)instruction);
3256 break;
3257 case IrInstGenIdMulAdd:
3258 ir_print_mul_add(irp, (IrInstGenMulAdd *)instruction);
3259 break;
3260 case IrInstGenIdAtomicLoad:
3261 ir_print_atomic_load(irp, (IrInstGenAtomicLoad *)instruction);
3262 break;
3263 case IrInstGenIdAtomicStore:
3264 ir_print_atomic_store(irp, (IrInstGenAtomicStore *)instruction);
3265 break;
3266 case IrInstGenIdArrayToVector:
3267 ir_print_array_to_vector(irp, (IrInstGenArrayToVector *)instruction);
3268 break;
3269 case IrInstGenIdVectorToArray:
3270 ir_print_vector_to_array(irp, (IrInstGenVectorToArray *)instruction);
3271 break;
3272 case IrInstGenIdPtrOfArrayToSlice:
3273 ir_print_ptr_of_array_to_slice(irp, (IrInstGenPtrOfArrayToSlice *)instruction);
3274 break;
3275 case IrInstGenIdAssertZero:
3276 ir_print_assert_zero(irp, (IrInstGenAssertZero *)instruction);
3277 break;
3278 case IrInstGenIdAssertNonNull:
3279 ir_print_assert_non_null(irp, (IrInstGenAssertNonNull *)instruction);
3280 break;
3281 case IrInstGenIdResizeSlice:
3282 ir_print_resize_slice(irp, (IrInstGenResizeSlice *)instruction);
3283 break;
3284 case IrInstGenIdAlloca:
3285 ir_print_alloca_gen(irp, (IrInstGenAlloca *)instruction);
3286 break;
3287 case IrInstGenIdSuspendBegin:
3288 ir_print_suspend_begin(irp, (IrInstGenSuspendBegin *)instruction);
3289 break;
3290 case IrInstGenIdSuspendFinish:
3291 ir_print_suspend_finish(irp, (IrInstGenSuspendFinish *)instruction);
3292 break;
3293 case IrInstGenIdResume:
3294 ir_print_resume(irp, (IrInstGenResume *)instruction);
3295 break;
3296 case IrInstGenIdAwait:
3297 ir_print_await_gen(irp, (IrInstGenAwait *)instruction);
3298 break;
3299 case IrInstGenIdSpillBegin:
3300 ir_print_spill_begin(irp, (IrInstGenSpillBegin *)instruction);
3301 break;
3302 case IrInstGenIdSpillEnd:
3303 ir_print_spill_end(irp, (IrInstGenSpillEnd *)instruction);
3304 break;
3305 case IrInstGenIdVectorExtractElem:
3306 ir_print_vector_extract_elem(irp, (IrInstGenVectorExtractElem *)instruction);
3307 break;
3308 case IrInstGenIdVectorStoreElem:
3309 ir_print_vector_store_elem(irp, (IrInstGenVectorStoreElem *)instruction);
3310 break;
3311 case IrInstGenIdBinaryNot:
3312 ir_print_binary_not(irp, (IrInstGenBinaryNot *)instruction);
3313 break;
3314 case IrInstGenIdNegation:
3315 ir_print_negation(irp, (IrInstGenNegation *)instruction);
3316 break;
3317 case IrInstGenIdNegationWrapping:
3318 ir_print_negation_wrapping(irp, (IrInstGenNegationWrapping *)instruction);
26243319 break;
26253320 }
26263321 fprintf(irp->f, "\n");
26273322}
26283323
2629static void irp_print_basic_block(IrPrint *irp, IrBasicBlock *current_block) {
2630 fprintf(irp->f, "%s_%" ZIG_PRI_usize ":\n", current_block->name_hint, current_block->debug_id);
3324static void irp_print_basic_block_src(IrPrintSrc *irp, IrBasicBlockSrc *current_block) {
3325 fprintf(irp->f, "%s_%" PRIu32 ":\n", current_block->name_hint, current_block->debug_id);
26313326 for (size_t instr_i = 0; instr_i < current_block->instruction_list.length; instr_i += 1) {
2632 IrInstruction *instruction = current_block->instruction_list.at(instr_i);
2633 if (irp->pass != IrPassSrc) {
2634 irp->printed.put(instruction, 0);
2635 irp->pending.clear();
2636 }
2637 ir_print_instruction(irp, instruction, false);
3327 IrInstSrc *instruction = current_block->instruction_list.at(instr_i);
3328 ir_print_inst_src(irp, instruction, false);
3329 }
3330}
3331
3332static void irp_print_basic_block_gen(IrPrintGen *irp, IrBasicBlockGen *current_block) {
3333 fprintf(irp->f, "%s_%" PRIu32 ":\n", current_block->name_hint, current_block->debug_id);
3334 for (size_t instr_i = 0; instr_i < current_block->instruction_list.length; instr_i += 1) {
3335 IrInstGen *instruction = current_block->instruction_list.at(instr_i);
3336 irp->printed.put(instruction, 0);
3337 irp->pending.clear();
3338 ir_print_inst_gen(irp, instruction, false);
26383339 for (size_t j = 0; j < irp->pending.length; ++j)
2639 ir_print_instruction(irp, irp->pending.at(j), true);
3340 ir_print_inst_gen(irp, irp->pending.at(j), true);
26403341 }
26413342}
26423343
2643void ir_print_basic_block(CodeGen *codegen, FILE *f, IrBasicBlock *bb, int indent_size, IrPass pass) {
2644 IrPrint ir_print = {};
2645 ir_print.pass = pass;
3344void ir_print_basic_block_src(CodeGen *codegen, FILE *f, IrBasicBlockSrc *bb, int indent_size) {
3345 IrPrintSrc ir_print = {};
3346 ir_print.codegen = codegen;
3347 ir_print.f = f;
3348 ir_print.indent = indent_size;
3349 ir_print.indent_size = indent_size;
3350
3351 irp_print_basic_block_src(&ir_print, bb);
3352}
3353
3354void ir_print_basic_block_gen(CodeGen *codegen, FILE *f, IrBasicBlockGen *bb, int indent_size) {
3355 IrPrintGen ir_print = {};
26463356 ir_print.codegen = codegen;
26473357 ir_print.f = f;
26483358 ir_print.indent = indent_size;
......@@ -2651,16 +3361,28 @@ void ir_print_basic_block(CodeGen *codegen, FILE *f, IrBasicBlock *bb, int inden
26513361 ir_print.printed.init(64);
26523362 ir_print.pending = {};
26533363
2654 irp_print_basic_block(&ir_print, bb);
3364 irp_print_basic_block_gen(&ir_print, bb);
26553365
26563366 ir_print.pending.deinit();
26573367 ir_print.printed.deinit();
26583368}
26593369
2660void ir_print(CodeGen *codegen, FILE *f, IrExecutable *executable, int indent_size, IrPass pass) {
2661 IrPrint ir_print = {};
2662 IrPrint *irp = &ir_print;
2663 irp->pass = pass;
3370void ir_print_src(CodeGen *codegen, FILE *f, IrExecutableSrc *executable, int indent_size) {
3371 IrPrintSrc ir_print = {};
3372 IrPrintSrc *irp = &ir_print;
3373 irp->codegen = codegen;
3374 irp->f = f;
3375 irp->indent = indent_size;
3376 irp->indent_size = indent_size;
3377
3378 for (size_t bb_i = 0; bb_i < executable->basic_block_list.length; bb_i += 1) {
3379 irp_print_basic_block_src(irp, executable->basic_block_list.at(bb_i));
3380 }
3381}
3382
3383void ir_print_gen(CodeGen *codegen, FILE *f, IrExecutableGen *executable, int indent_size) {
3384 IrPrintGen ir_print = {};
3385 IrPrintGen *irp = &ir_print;
26643386 irp->codegen = codegen;
26653387 irp->f = f;
26663388 irp->indent = indent_size;
......@@ -2670,32 +3392,27 @@ void ir_print(CodeGen *codegen, FILE *f, IrExecutable *executable, int indent_si
26703392 irp->pending = {};
26713393
26723394 for (size_t bb_i = 0; bb_i < executable->basic_block_list.length; bb_i += 1) {
2673 irp_print_basic_block(irp, executable->basic_block_list.at(bb_i));
3395 irp_print_basic_block_gen(irp, executable->basic_block_list.at(bb_i));
26743396 }
26753397
26763398 irp->pending.deinit();
26773399 irp->printed.deinit();
26783400}
26793401
2680void ir_print_instruction(CodeGen *codegen, FILE *f, IrInstruction *instruction, int indent_size, IrPass pass) {
2681 IrPrint ir_print = {};
2682 IrPrint *irp = &ir_print;
2683 irp->pass = pass;
3402void ir_print_inst_src(CodeGen *codegen, FILE *f, IrInstSrc *instruction, int indent_size) {
3403 IrPrintSrc ir_print = {};
3404 IrPrintSrc *irp = &ir_print;
26843405 irp->codegen = codegen;
26853406 irp->f = f;
26863407 irp->indent = indent_size;
26873408 irp->indent_size = indent_size;
2688 irp->printed = {};
2689 irp->printed.init(4);
2690 irp->pending = {};
26913409
2692 ir_print_instruction(irp, instruction, false);
3410 ir_print_inst_src(irp, instruction, false);
26933411}
26943412
2695void ir_print_const_expr(CodeGen *codegen, FILE *f, ZigValue *value, int indent_size, IrPass pass) {
2696 IrPrint ir_print = {};
2697 IrPrint *irp = &ir_print;
2698 irp->pass = pass;
3413void ir_print_inst_gen(CodeGen *codegen, FILE *f, IrInstGen *instruction, int indent_size) {
3414 IrPrintGen ir_print = {};
3415 IrPrintGen *irp = &ir_print;
26993416 irp->codegen = codegen;
27003417 irp->f = f;
27013418 irp->indent = indent_size;
......@@ -2704,5 +3421,5 @@ void ir_print_const_expr(CodeGen *codegen, FILE *f, ZigValue *value, int indent_
27043421 irp->printed.init(4);
27053422 irp->pending = {};
27063423
2707 ir_print_const_value(irp, value);
3424 ir_print_inst_gen(irp, instruction, false);
27083425}
src/ir_print.hpp+8-5
......@@ -12,11 +12,14 @@
1212
1313#include <stdio.h>
1414
15void ir_print(CodeGen *codegen, FILE *f, IrExecutable *executable, int indent_size, IrPass pass);
16void ir_print_instruction(CodeGen *codegen, FILE *f, IrInstruction *instruction, int indent_size, IrPass pass);
17void ir_print_const_expr(CodeGen *codegen, FILE *f, ZigValue *value, int indent_size, IrPass pass);
18void ir_print_basic_block(CodeGen *codegen, FILE *f, IrBasicBlock *bb, int indent_size, IrPass pass);
15void ir_print_src(CodeGen *codegen, FILE *f, IrExecutableSrc *executable, int indent_size);
16void ir_print_gen(CodeGen *codegen, FILE *f, IrExecutableGen *executable, int indent_size);
17void ir_print_inst_src(CodeGen *codegen, FILE *f, IrInstSrc *inst, int indent_size);
18void ir_print_inst_gen(CodeGen *codegen, FILE *f, IrInstGen *inst, int indent_size);
19void ir_print_basic_block_src(CodeGen *codegen, FILE *f, IrBasicBlockSrc *bb, int indent_size);
20void ir_print_basic_block_gen(CodeGen *codegen, FILE *f, IrBasicBlockGen *bb, int indent_size);
1921
20const char* ir_instruction_type_str(IrInstructionId id);
22const char* ir_inst_src_type_str(IrInstSrcId id);
23const char* ir_inst_gen_type_str(IrInstGenId id);
2124
2225#endif
src/link.cpp+13
......@@ -1502,6 +1502,19 @@ static Buf *build_a_raw(CodeGen *parent_gen, const char *aname, Buf *full_path,
15021502 new_link_lib->provided_explicitly = parent_gen->libc_link_lib->provided_explicitly;
15031503 }
15041504
1505 // Override the inherited build mode parameter
1506 if (!parent_gen->is_test_build) {
1507 switch (parent_gen->build_mode) {
1508 case BuildModeDebug:
1509 case BuildModeFastRelease:
1510 case BuildModeSafeRelease:
1511 child_gen->build_mode = BuildModeFastRelease;
1512 break;
1513 case BuildModeSmallRelease:
1514 break;
1515 }
1516 }
1517
15051518 child_gen->function_sections = true;
15061519 child_gen->want_stack_check = WantStackCheckDisabled;
15071520
src/main.cpp+52-91
......@@ -93,6 +93,7 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) {
9393 " --verbose-llvm-ir enable compiler debug output for LLVM IR\n"
9494 " --verbose-cimport enable compiler debug output for C imports\n"
9595 " --verbose-cc enable compiler debug output for C compilation\n"
96 " --verbose-llvm-cpu-features enable compiler debug output for LLVM CPU features\n"
9697 " -dirafter [dir] add directory to AFTER include search path\n"
9798 " -isystem [dir] add directory to SYSTEM include search path\n"
9899 " -I[dir] add directory to include search path\n"
......@@ -100,6 +101,11 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) {
100101 " --override-lib-dir [arg] override path to Zig lib directory\n"
101102 " -ffunction-sections places each function in a separate section\n"
102103 " -D[macro]=[value] define C [macro] to [value] (1 if [value] omitted)\n"
104 " -target-cpu [cpu] target one specific CPU by name\n"
105 " -target-feature [features] specify the set of CPU features to target\n"
106 " -code-model [default|tiny| set target code model\n"
107 " small|kernel|\n"
108 " medium|large]\n"
103109 "\n"
104110 "Link Options:\n"
105111 " --bundle-compiler-rt for static libraries, include compiler-rt symbols\n"
......@@ -141,100 +147,18 @@ static int print_libc_usage(const char *arg0, FILE *file, int return_code) {
141147 "You can save this into a file and then edit the paths to create a cross\n"
142148 "compilation libc kit. Then you can pass `--libc [file]` for Zig to use it.\n"
143149 "\n"
144 "When compiling natively and no `--libc` argument provided, Zig automatically\n"
145 "creates zig-cache/native_libc.txt so that it does not have to detect libc\n"
146 "on every invocation. You can remove this file to have Zig re-detect the\n"
147 "native libc.\n"
150 "When compiling natively and no `--libc` argument provided, Zig will create\n"
151 "`%s/native_libc.txt`\n"
152 "so that it does not have to detect libc on every invocation. You can remove\n"
153 "this file to have Zig re-detect the native libc.\n"
148154 "\n\n"
149155 "Usage: %s libc [file]\n"
150156 "\n"
151157 "Parse a libc installation text file and validate it.\n"
152 , arg0, arg0);
158 , arg0, buf_ptr(get_global_cache_dir()), arg0);
153159 return return_code;
154160}
155161
156static bool arch_available_in_llvm(ZigLLVM_ArchType arch) {
157 LLVMTargetRef target_ref;
158 char *err_msg = nullptr;
159 char triple_string[128];
160 sprintf(triple_string, "%s-unknown-unknown-unknown", ZigLLVMGetArchTypeName(arch));
161 return !LLVMGetTargetFromTriple(triple_string, &target_ref, &err_msg);
162}
163
164static int print_target_list(FILE *f) {
165 ZigTarget native;
166 get_native_target(&native);
167
168 fprintf(f, "Architectures:\n");
169 size_t arch_count = target_arch_count();
170 for (size_t arch_i = 0; arch_i < arch_count; arch_i += 1) {
171 ZigLLVM_ArchType arch = target_arch_enum(arch_i);
172 if (!arch_available_in_llvm(arch))
173 continue;
174 const char *arch_name = target_arch_name(arch);
175 SubArchList sub_arch_list = target_subarch_list(arch);
176 size_t sub_count = target_subarch_count(sub_arch_list);
177 const char *arch_native_str = (native.arch == arch) ? " (native)" : "";
178 fprintf(f, " %s%s\n", arch_name, arch_native_str);
179 for (size_t sub_i = 0; sub_i < sub_count; sub_i += 1) {
180 ZigLLVM_SubArchType sub = target_subarch_enum(sub_arch_list, sub_i);
181 const char *sub_name = target_subarch_name(sub);
182 const char *sub_native_str = (native.arch == arch && native.sub_arch == sub) ? " (native)" : "";
183 fprintf(f, " %s%s\n", sub_name, sub_native_str);
184 }
185 }
186
187 fprintf(f, "\nOperating Systems:\n");
188 size_t os_count = target_os_count();
189 for (size_t i = 0; i < os_count; i += 1) {
190 Os os_type = target_os_enum(i);
191 const char *native_str = (native.os == os_type) ? " (native)" : "";
192 fprintf(f, " %s%s\n", target_os_name(os_type), native_str);
193 }
194
195 fprintf(f, "\nC ABIs:\n");
196 size_t abi_count = target_abi_count();
197 for (size_t i = 0; i < abi_count; i += 1) {
198 ZigLLVM_EnvironmentType abi = target_abi_enum(i);
199 const char *native_str = (native.abi == abi) ? " (native)" : "";
200 fprintf(f, " %s%s\n", target_abi_name(abi), native_str);
201 }
202
203 fprintf(f, "\nAvailable libcs:\n");
204 size_t libc_count = target_libc_count();
205 for (size_t i = 0; i < libc_count; i += 1) {
206 ZigTarget libc_target;
207 target_libc_enum(i, &libc_target);
208 bool is_native = native.arch == libc_target.arch &&
209 native.os == libc_target.os &&
210 native.abi == libc_target.abi;
211 const char *native_str = is_native ? " (native)" : "";
212 fprintf(f, " %s-%s-%s%s\n", target_arch_name(libc_target.arch),
213 target_os_name(libc_target.os), target_abi_name(libc_target.abi), native_str);
214 }
215
216 fprintf(f, "\nAvailable glibc versions:\n");
217 ZigGLibCAbi *glibc_abi;
218 Error err;
219 if ((err = glibc_load_metadata(&glibc_abi, get_zig_lib_dir(), true))) {
220 return EXIT_FAILURE;
221 }
222 for (size_t i = 0; i < glibc_abi->all_versions.length; i += 1) {
223 ZigGLibCVersion *this_ver = &glibc_abi->all_versions.at(i);
224 bool is_native = native.glibc_version != nullptr &&
225 native.glibc_version->major == this_ver->major &&
226 native.glibc_version->minor == this_ver->minor &&
227 native.glibc_version->patch == this_ver->patch;
228 const char *native_str = is_native ? " (native)" : "";
229 if (this_ver->patch == 0) {
230 fprintf(f, " %d.%d%s\n", this_ver->major, this_ver->minor, native_str);
231 } else {
232 fprintf(f, " %d.%d.%d%s\n", this_ver->major, this_ver->minor, this_ver->patch, native_str);
233 }
234 }
235 return EXIT_SUCCESS;
236}
237
238162enum Cmd {
239163 CmdNone,
240164 CmdBuild,
......@@ -478,6 +402,7 @@ int main(int argc, char **argv) {
478402 bool verbose_llvm_ir = false;
479403 bool verbose_cimport = false;
480404 bool verbose_cc = false;
405 bool verbose_llvm_cpu_features = false;
481406 bool link_eh_frame_hdr = false;
482407 ErrColor color = ErrColorAuto;
483408 CacheOpt enable_cache = CacheOptAuto;
......@@ -528,6 +453,9 @@ int main(int argc, char **argv) {
528453 WantStackCheck want_stack_check = WantStackCheckAuto;
529454 WantCSanitize want_sanitize_c = WantCSanitizeAuto;
530455 bool function_sections = false;
456 const char *cpu = nullptr;
457 const char *features = nullptr;
458 CodeModel code_model = CodeModelDefault;
531459
532460 ZigList<const char *> llvm_argv = {0};
533461 llvm_argv.append("zig (LLVM option parsing)");
......@@ -692,6 +620,8 @@ int main(int argc, char **argv) {
692620 verbose_cimport = true;
693621 } else if (strcmp(arg, "--verbose-cc") == 0) {
694622 verbose_cc = true;
623 } else if (strcmp(arg, "--verbose-llvm-cpu-features") == 0) {
624 verbose_llvm_cpu_features = true;
695625 } else if (strcmp(arg, "-rdynamic") == 0) {
696626 rdynamic = true;
697627 } else if (strcmp(arg, "--each-lib-rpath") == 0) {
......@@ -842,6 +772,23 @@ int main(int argc, char **argv) {
842772 clang_argv.append(argv[i]);
843773
844774 llvm_argv.append(argv[i]);
775 } else if (strcmp(arg, "-code-model") == 0) {
776 if (strcmp(argv[i], "default") == 0) {
777 code_model = CodeModelDefault;
778 } else if (strcmp(argv[i], "tiny") == 0) {
779 code_model = CodeModelTiny;
780 } else if (strcmp(argv[i], "small") == 0) {
781 code_model = CodeModelSmall;
782 } else if (strcmp(argv[i], "kernel") == 0) {
783 code_model = CodeModelKernel;
784 } else if (strcmp(argv[i], "medium") == 0) {
785 code_model = CodeModelMedium;
786 } else if (strcmp(argv[i], "large") == 0) {
787 code_model = CodeModelLarge;
788 } else {
789 fprintf(stderr, "-code-model options are 'default', 'tiny', 'small', 'kernel', 'medium', or 'large'\n");
790 return print_error_usage(arg0);
791 }
845792 } else if (strcmp(arg, "--override-lib-dir") == 0) {
846793 override_lib_dir = buf_create_from_str(argv[i]);
847794 } else if (strcmp(arg, "--main-pkg-path") == 0) {
......@@ -936,6 +883,10 @@ int main(int argc, char **argv) {
936883 , argv[i]);
937884 return EXIT_FAILURE;
938885 }
886 } else if (strcmp(arg, "-target-cpu") == 0) {
887 cpu = argv[i];
888 } else if (strcmp(arg, "-target-feature") == 0) {
889 features = argv[i];
939890 } else {
940891 fprintf(stderr, "Invalid argument: %s\n", arg);
941892 return print_error_usage(arg0);
......@@ -1051,15 +1002,22 @@ int main(int argc, char **argv) {
10511002 }
10521003 }
10531004
1005 Buf zig_triple_buf = BUF_INIT;
1006 target_triple_zig(&zig_triple_buf, &target);
1007
1008 const char *stage2_triple_arg = target.is_native ? nullptr : buf_ptr(&zig_triple_buf);
1009 if ((err = stage2_cpu_features_parse(&target.cpu_features, stage2_triple_arg, cpu, features))) {
1010 fprintf(stderr, "unable to initialize CPU features: %s\n", err_str(err));
1011 return main_exit(root_progress_node, EXIT_FAILURE);
1012 }
1013
10541014 if (output_dir != nullptr && enable_cache == CacheOptOn) {
10551015 fprintf(stderr, "`--output-dir` is incompatible with --cache on.\n");
10561016 return print_error_usage(arg0);
10571017 }
10581018
10591019 if (target_requires_pic(&target, have_libc) && want_pic == WantPICDisabled) {
1060 Buf triple_buf = BUF_INIT;
1061 target_triple_zig(&triple_buf, &target);
1062 fprintf(stderr, "`--disable-pic` is incompatible with target '%s'\n", buf_ptr(&triple_buf));
1020 fprintf(stderr, "`--disable-pic` is incompatible with target '%s'\n", buf_ptr(&zig_triple_buf));
10631021 return print_error_usage(arg0);
10641022 }
10651023
......@@ -1226,12 +1184,15 @@ int main(int argc, char **argv) {
12261184 g->verbose_llvm_ir = verbose_llvm_ir;
12271185 g->verbose_cimport = verbose_cimport;
12281186 g->verbose_cc = verbose_cc;
1187 g->verbose_llvm_cpu_features = verbose_llvm_cpu_features;
12291188 g->output_dir = output_dir;
12301189 g->disable_gen_h = disable_gen_h;
12311190 g->bundle_compiler_rt = bundle_compiler_rt;
12321191 codegen_set_errmsg_color(g, color);
12331192 g->system_linker_hack = system_linker_hack;
12341193 g->function_sections = function_sections;
1194 g->code_model = code_model;
1195
12351196
12361197 for (size_t i = 0; i < lib_dirs.length; i += 1) {
12371198 codegen_add_lib_dir(g, lib_dirs.at(i));
......@@ -1413,7 +1374,7 @@ int main(int argc, char **argv) {
14131374 return main_exit(root_progress_node, EXIT_SUCCESS);
14141375 }
14151376 case CmdTargets:
1416 return print_target_list(stdout);
1377 return stage2_cmd_targets(buf_ptr(&zig_triple_buf));
14171378 case CmdNone:
14181379 return print_full_usage(arg0, stderr, EXIT_FAILURE);
14191380 }
src/parser.cpp+1-1
......@@ -147,7 +147,7 @@ static void ast_invalid_token_error(ParseContext *pc, Token *token) {
147147}
148148
149149static AstNode *ast_create_node_no_line_info(ParseContext *pc, NodeType type) {
150 AstNode *node = allocate<AstNode>(1);
150 AstNode *node = allocate<AstNode>(1, "AstNode");
151151 node->type = type;
152152 node->owner = pc->owner;
153153 return node;
src/softfloat.hpp+17
......@@ -12,4 +12,21 @@ extern "C" {
1212#include "softfloat.h"
1313}
1414
15static inline float16_t zig_double_to_f16(double x) {
16 float64_t y;
17 static_assert(sizeof(x) == sizeof(y), "");
18 memcpy(&y, &x, sizeof(x));
19 return f64_to_f16(y);
20}
21
22
23// Return value is safe to coerce to float even when |x| is NaN or Infinity.
24static inline double zig_f16_to_double(float16_t x) {
25 float64_t y = f16_to_f64(x);
26 double z;
27 static_assert(sizeof(y) == sizeof(z), "");
28 memcpy(&z, &y, sizeof(y));
29 return z;
30}
31
1532#endif
src/target.cpp+6-9
......@@ -58,9 +58,6 @@ static const ZigLLVM_SubArchType subarch_list_arm64[] = {
5858 ZigLLVM_ARMSubArch_v8_2a,
5959 ZigLLVM_ARMSubArch_v8_1a,
6060 ZigLLVM_ARMSubArch_v8,
61 ZigLLVM_ARMSubArch_v8r,
62 ZigLLVM_ARMSubArch_v8m_baseline,
63 ZigLLVM_ARMSubArch_v8m_mainline,
6461};
6562
6663static const ZigLLVM_SubArchType subarch_list_kalimba[] = {
......@@ -693,7 +690,7 @@ const char *target_subarch_name(ZigLLVM_SubArchType subarch) {
693690 case ZigLLVM_ARMSubArch_v8_1a:
694691 return "v8_1a";
695692 case ZigLLVM_ARMSubArch_v8:
696 return "v8";
693 return "v8a";
697694 case ZigLLVM_ARMSubArch_v8r:
698695 return "v8r";
699696 case ZigLLVM_ARMSubArch_v8m_baseline:
......@@ -703,7 +700,7 @@ const char *target_subarch_name(ZigLLVM_SubArchType subarch) {
703700 case ZigLLVM_ARMSubArch_v8_1m_mainline:
704701 return "v8_1m_mainline";
705702 case ZigLLVM_ARMSubArch_v7:
706 return "v7";
703 return "v7a";
707704 case ZigLLVM_ARMSubArch_v7em:
708705 return "v7em";
709706 case ZigLLVM_ARMSubArch_v7m:
......@@ -846,10 +843,10 @@ void init_all_targets(void) {
846843void target_triple_zig(Buf *triple, const ZigTarget *target) {
847844 buf_resize(triple, 0);
848845 buf_appendf(triple, "%s%s-%s-%s",
849 ZigLLVMGetArchTypeName(target->arch),
850 ZigLLVMGetSubArchTypeName(target->sub_arch),
851 ZigLLVMGetOSTypeName(get_llvm_os_type(target->os)),
852 ZigLLVMGetEnvironmentTypeName(target->abi));
846 target_arch_name(target->arch),
847 target_subarch_name(target->sub_arch),
848 target_os_name(target->os),
849 target_abi_name(target->abi));
853850}
854851
855852void target_triple_llvm(Buf *triple, const ZigTarget *target) {
src/target.hpp+1
......@@ -92,6 +92,7 @@ struct ZigTarget {
9292 Os os;
9393 ZigLLVM_EnvironmentType abi;
9494 ZigGLibCVersion *glibc_version; // null means default
95 Stage2CpuFeatures *cpu_features;
9596 bool is_native;
9697};
9798
src/userland.cpp+57-1
......@@ -2,7 +2,8 @@
22// src-self-hosted/stage1.zig
33
44#include "userland.h"
5#include "ast_render.hpp"
5#include "util.hpp"
6#include "zig_llvm.h"
67#include <stdio.h>
78#include <stdlib.h>
89#include <string.h>
......@@ -88,3 +89,58 @@ void stage2_progress_end(Stage2ProgressNode *node) {}
8889void stage2_progress_complete_one(Stage2ProgressNode *node) {}
8990void stage2_progress_disable_tty(Stage2Progress *progress) {}
9091void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_count, size_t estimated_total_items){}
92
93struct Stage2CpuFeatures {
94 const char *llvm_cpu_name;
95 const char *llvm_cpu_features;
96 const char *builtin_str;
97 const char *cache_hash;
98};
99
100Error stage2_cpu_features_parse(struct Stage2CpuFeatures **out, const char *zig_triple,
101 const char *cpu_name, const char *cpu_features)
102{
103 if (zig_triple == nullptr) {
104 Stage2CpuFeatures *result = allocate<Stage2CpuFeatures>(1, "Stage2CpuFeatures");
105 result->llvm_cpu_name = ZigLLVMGetHostCPUName();
106 result->llvm_cpu_features = ZigLLVMGetNativeFeatures();
107 result->builtin_str = "arch.getBaselineCpuFeatures();\n";
108 result->cache_hash = "native\n\n";
109 *out = result;
110 return ErrorNone;
111 }
112 if (cpu_name == nullptr && cpu_features == nullptr) {
113 Stage2CpuFeatures *result = allocate<Stage2CpuFeatures>(1, "Stage2CpuFeatures");
114 result->builtin_str = "arch.getBaselineCpuFeatures();\n";
115 result->cache_hash = "\n\n";
116 *out = result;
117 return ErrorNone;
118 }
119
120 const char *msg = "stage0 called stage2_cpu_features_parse with non-null cpu name or features";
121 stage2_panic(msg, strlen(msg));
122}
123
124void stage2_cpu_features_get_cache_hash(const Stage2CpuFeatures *cpu_features,
125 const char **ptr, size_t *len)
126{
127 *ptr = cpu_features->cache_hash;
128 *len = strlen(cpu_features->cache_hash);
129}
130const char *stage2_cpu_features_get_llvm_cpu(const Stage2CpuFeatures *cpu_features) {
131 return cpu_features->llvm_cpu_name;
132}
133const char *stage2_cpu_features_get_llvm_features(const Stage2CpuFeatures *cpu_features) {
134 return cpu_features->llvm_cpu_features;
135}
136void stage2_cpu_features_get_builtin_str(const Stage2CpuFeatures *cpu_features,
137 const char **ptr, size_t *len)
138{
139 *ptr = cpu_features->builtin_str;
140 *len = strlen(cpu_features->builtin_str);
141}
142
143int stage2_cmd_targets(const char *zig_triple) {
144 const char *msg = "stage0 called stage2_cmd_targets";
145 stage2_panic(msg, strlen(msg));
146}
src/userland.h+31
......@@ -78,6 +78,12 @@ enum Error {
7878 ErrorNotLazy,
7979 ErrorIsAsync,
8080 ErrorImportOutsidePkgPath,
81 ErrorUnknownCpu,
82 ErrorUnknownSubArchitecture,
83 ErrorUnknownCpuFeature,
84 ErrorInvalidCpuFeatures,
85 ErrorInvalidLlvmCpuFeaturesFormat,
86 ErrorUnknownApplicationBinaryInterface,
8187};
8288
8389// ABI warning
......@@ -174,4 +180,29 @@ ZIG_EXTERN_C void stage2_progress_complete_one(Stage2ProgressNode *node);
174180ZIG_EXTERN_C void stage2_progress_update_node(Stage2ProgressNode *node,
175181 size_t completed_count, size_t estimated_total_items);
176182
183// ABI warning
184struct Stage2CpuFeatures;
185
186// ABI warning
187ZIG_EXTERN_C Error stage2_cpu_features_parse(struct Stage2CpuFeatures **result,
188 const char *zig_triple, const char *cpu_name, const char *cpu_features);
189
190// ABI warning
191ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_cpu(const struct Stage2CpuFeatures *cpu_features);
192
193// ABI warning
194ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_features(const struct Stage2CpuFeatures *cpu_features);
195
196// ABI warning
197ZIG_EXTERN_C void stage2_cpu_features_get_builtin_str(const struct Stage2CpuFeatures *cpu_features,
198 const char **ptr, size_t *len);
199
200// ABI warning
201ZIG_EXTERN_C void stage2_cpu_features_get_cache_hash(const struct Stage2CpuFeatures *cpu_features,
202 const char **ptr, size_t *len);
203
204// ABI warning
205ZIG_EXTERN_C int stage2_cmd_targets(const char *zig_triple);
206
207
177208#endif
src/util.hpp+2-19
......@@ -38,6 +38,8 @@
3838
3939#if defined(__MINGW32__) || defined(__MINGW64__)
4040#define BREAKPOINT __debugbreak()
41#elif defined(__i386__) || defined(__x86_64__)
42#define BREAKPOINT __asm__ volatile("int $0x03");
4143#elif defined(__clang__)
4244#define BREAKPOINT __builtin_debugtrap()
4345#elif defined(__GNUC__)
......@@ -49,8 +51,6 @@
4951
5052#endif
5153
52#include "softfloat.hpp"
53
5454ATTRIBUTE_COLD
5555ATTRIBUTE_NORETURN
5656ATTRIBUTE_PRINTF(1, 2)
......@@ -244,23 +244,6 @@ static inline uint8_t log2_u64(uint64_t x) {
244244 return (63 - clzll(x));
245245}
246246
247static inline float16_t zig_double_to_f16(double x) {
248 float64_t y;
249 static_assert(sizeof(x) == sizeof(y), "");
250 memcpy(&y, &x, sizeof(x));
251 return f64_to_f16(y);
252}
253
254
255// Return value is safe to coerce to float even when |x| is NaN or Infinity.
256static inline double zig_f16_to_double(float16_t x) {
257 float64_t y = f16_to_f64(x);
258 double z;
259 static_assert(sizeof(y) == sizeof(z), "");
260 memcpy(&z, &y, sizeof(y));
261 return z;
262}
263
264247void zig_pretty_print_bytes(FILE *f, double n);
265248
266249template<typename T>
src/zig_clang.cpp+9
......@@ -1668,6 +1668,10 @@ unsigned ZigClangFunctionDecl_getAlignedAttribute(const struct ZigClangFunctionD
16681668 return 0;
16691669}
16701670
1671ZigClangQualType ZigClangParmVarDecl_getOriginalType(const struct ZigClangParmVarDecl *self) {
1672 return bitcast(reinterpret_cast<const clang::ParmVarDecl *>(self)->getOriginalType());
1673}
1674
16711675const ZigClangRecordDecl *ZigClangRecordDecl_getDefinition(const ZigClangRecordDecl *zig_record_decl) {
16721676 const clang::RecordDecl *record_decl = reinterpret_cast<const clang::RecordDecl *>(zig_record_decl);
16731677 const clang::RecordDecl *definition = record_decl->getDefinition();
......@@ -1920,6 +1924,11 @@ bool ZigClangType_isRecordType(const ZigClangType *self) {
19201924 return casted->isRecordType();
19211925}
19221926
1927bool ZigClangType_isConstantArrayType(const ZigClangType *self) {
1928 auto casted = reinterpret_cast<const clang::Type *>(self);
1929 return casted->isConstantArrayType();
1930}
1931
19231932const char *ZigClangType_getTypeClassName(const ZigClangType *self) {
19241933 auto casted = reinterpret_cast<const clang::Type *>(self);
19251934 return casted->getTypeClassName();
src/zig_clang.h+3
......@@ -886,6 +886,8 @@ ZIG_EXTERN_C const char* ZigClangVarDecl_getSectionAttribute(const struct ZigCla
886886ZIG_EXTERN_C unsigned ZigClangVarDecl_getAlignedAttribute(const struct ZigClangVarDecl *self, const ZigClangASTContext* ctx);
887887ZIG_EXTERN_C unsigned ZigClangFunctionDecl_getAlignedAttribute(const struct ZigClangFunctionDecl *self, const ZigClangASTContext* ctx);
888888
889ZIG_EXTERN_C struct ZigClangQualType ZigClangParmVarDecl_getOriginalType(const struct ZigClangParmVarDecl *self);
890
889891ZIG_EXTERN_C bool ZigClangRecordDecl_getPackedAttribute(const struct ZigClangRecordDecl *);
890892ZIG_EXTERN_C const struct ZigClangRecordDecl *ZigClangRecordDecl_getDefinition(const struct ZigClangRecordDecl *);
891893ZIG_EXTERN_C const struct ZigClangEnumDecl *ZigClangEnumDecl_getDefinition(const struct ZigClangEnumDecl *);
......@@ -965,6 +967,7 @@ ZIG_EXTERN_C bool ZigClangType_isBooleanType(const struct ZigClangType *self);
965967ZIG_EXTERN_C bool ZigClangType_isVoidType(const struct ZigClangType *self);
966968ZIG_EXTERN_C bool ZigClangType_isArrayType(const struct ZigClangType *self);
967969ZIG_EXTERN_C bool ZigClangType_isRecordType(const struct ZigClangType *self);
970ZIG_EXTERN_C bool ZigClangType_isConstantArrayType(const ZigClangType *self);
968971ZIG_EXTERN_C const char *ZigClangType_getTypeClassName(const struct ZigClangType *self);
969972ZIG_EXTERN_C const struct ZigClangArrayType *ZigClangType_getAsArrayTypeUnsafe(const struct ZigClangType *self);
970973ZIG_EXTERN_C const ZigClangRecordType *ZigClangType_getAsRecordType(const ZigClangType *self);
src/zig_llvm.cpp+2-2
......@@ -824,7 +824,7 @@ const char *ZigLLVMGetSubArchTypeName(ZigLLVM_SubArchType sub_arch) {
824824 case ZigLLVM_ARMSubArch_v8_1a:
825825 return "v8.1a";
826826 case ZigLLVM_ARMSubArch_v8:
827 return "v8";
827 return "v8a";
828828 case ZigLLVM_ARMSubArch_v8r:
829829 return "v8r";
830830 case ZigLLVM_ARMSubArch_v8m_baseline:
......@@ -834,7 +834,7 @@ const char *ZigLLVMGetSubArchTypeName(ZigLLVM_SubArchType sub_arch) {
834834 case ZigLLVM_ARMSubArch_v8_1m_mainline:
835835 return "v8.1m.main";
836836 case ZigLLVM_ARMSubArch_v7:
837 return "v7";
837 return "v7a";
838838 case ZigLLVM_ARMSubArch_v7em:
839839 return "v7em";
840840 case ZigLLVM_ARMSubArch_v7m:
test/compile_errors.zig+19-11
......@@ -1,7 +1,14 @@
11const tests = @import("tests.zig");
22const builtin = @import("builtin");
3const Target = @import("std").Target;
34
45pub fn addCases(cases: *tests.CompileErrorContext) void {
6 cases.addTest("dependency loop in top-level decl with @TypeInfo",
7 \\export const foo = @typeInfo(@This());
8 , &[_][]const u8{
9 "tmp.zig:1:20: error: dependency loop detected",
10 });
11
512 cases.addTest("non-exhaustive enums",
613 \\const A = enum {
714 \\ a,
......@@ -272,9 +279,10 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
272279 , &[_][]const u8{
273280 "tmp.zig:3:5: error: target arch 'wasm32' does not support calling with a new stack",
274281 });
275 tc.target = tests.Target{
276 .Cross = tests.CrossTarget{
282 tc.target = Target{
283 .Cross = .{
277284 .arch = .wasm32,
285 .cpu_features = Target.Arch.wasm32.getBaselineCpuFeatures(),
278286 .os = .wasi,
279287 .abi = .none,
280288 },
......@@ -673,9 +681,10 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
673681 , &[_][]const u8{
674682 "tmp.zig:2:14: error: could not find 'foo' in the inputs or outputs",
675683 });
676 tc.target = tests.Target{
677 .Cross = tests.CrossTarget{
684 tc.target = Target{
685 .Cross = .{
678686 .arch = .x86_64,
687 .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
679688 .os = .linux,
680689 .abi = .gnu,
681690 },
......@@ -1649,7 +1658,7 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
16491658 cases.addTest("return invalid type from test",
16501659 \\test "example" { return 1; }
16511660 , &[_][]const u8{
1652 "tmp.zig:1:25: error: integer value 1 cannot be coerced to type 'void'",
1661 "tmp.zig:1:25: error: expected type 'void', found 'comptime_int'",
16531662 });
16541663
16551664 cases.add("threadlocal qualifier on const",
......@@ -2478,7 +2487,7 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
24782487 \\ var rule_set = try Foo.init();
24792488 \\}
24802489 , &[_][]const u8{
2481 "tmp.zig:2:10: error: expected type 'i32', found 'type'",
2490 "tmp.zig:2:19: error: expected type 'i32', found 'type'",
24822491 });
24832492
24842493 cases.add("slicing single-item pointer",
......@@ -3384,7 +3393,7 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
33843393 \\
33853394 \\fn b() void {}
33863395 , &[_][]const u8{
3387 "tmp.zig:3:6: error: unreachable code",
3396 "tmp.zig:3:5: error: unreachable code",
33883397 });
33893398
33903399 cases.add("bad import",
......@@ -4002,8 +4011,8 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
40024011 \\
40034012 \\export fn entry() usize { return @sizeOf(@TypeOf(Foo)); }
40044013 , &[_][]const u8{
4005 "tmp.zig:5:25: error: unable to evaluate constant expression",
4006 "tmp.zig:2:12: note: referenced here",
4014 "tmp.zig:5:25: error: cannot store runtime value in compile time variable",
4015 "tmp.zig:2:12: note: called from here",
40074016 });
40084017
40094018 cases.add("addition with non numbers",
......@@ -4643,7 +4652,6 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
46434652 \\fn something() anyerror!void { }
46444653 , &[_][]const u8{
46454654 "tmp.zig:2:5: error: expected type 'void', found 'anyerror'",
4646 "tmp.zig:1:15: note: return type declared here",
46474655 });
46484656
46494657 cases.add("invalid pointer for var type",
......@@ -5734,7 +5742,7 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
57345742 \\ @export(entry, .{.name = "entry", .linkage = @as(u32, 1234) });
57355743 \\}
57365744 , &[_][]const u8{
5737 "tmp.zig:3:50: error: expected type 'std.builtin.GlobalLinkage', found 'u32'",
5745 "tmp.zig:3:59: error: expected type 'std.builtin.GlobalLinkage', found 'comptime_int'",
57385746 });
57395747
57405748 cases.add("struct with invalid field",
test/stack_traces.zig+98
......@@ -51,11 +51,15 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
5151 // debug
5252 \\error: TheSkyIsFalling
5353 \\source.zig:4:5: [address] in main (test)
54 \\ return error.TheSkyIsFalling;
55 \\ ^
5456 \\
5557 ,
5658 // release-safe
5759 \\error: TheSkyIsFalling
5860 \\source.zig:4:5: [address] in std.start.main (test)
61 \\ return error.TheSkyIsFalling;
62 \\ ^
5963 \\
6064 ,
6165 // release-fast
......@@ -74,13 +78,21 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
7478 // debug
7579 \\error: TheSkyIsFalling
7680 \\source.zig:4:5: [address] in foo (test)
81 \\ return error.TheSkyIsFalling;
82 \\ ^
7783 \\source.zig:8:5: [address] in main (test)
84 \\ try foo();
85 \\ ^
7886 \\
7987 ,
8088 // release-safe
8189 \\error: TheSkyIsFalling
8290 \\source.zig:4:5: [address] in std.start.main (test)
91 \\ return error.TheSkyIsFalling;
92 \\ ^
8393 \\source.zig:8:5: [address] in std.start.main (test)
94 \\ try foo();
95 \\ ^
8496 \\
8597 ,
8698 // release-fast
......@@ -99,17 +111,33 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
99111 // debug
100112 \\error: TheSkyIsFalling
101113 \\source.zig:12:5: [address] in make_error (test)
114 \\ return error.TheSkyIsFalling;
115 \\ ^
102116 \\source.zig:8:5: [address] in bar (test)
117 \\ return make_error();
118 \\ ^
103119 \\source.zig:4:5: [address] in foo (test)
120 \\ try bar();
121 \\ ^
104122 \\source.zig:16:5: [address] in main (test)
123 \\ try foo();
124 \\ ^
105125 \\
106126 ,
107127 // release-safe
108128 \\error: TheSkyIsFalling
109129 \\source.zig:12:5: [address] in std.start.main (test)
130 \\ return error.TheSkyIsFalling;
131 \\ ^
110132 \\source.zig:8:5: [address] in std.start.main (test)
133 \\ return make_error();
134 \\ ^
111135 \\source.zig:4:5: [address] in std.start.main (test)
136 \\ try bar();
137 \\ ^
112138 \\source.zig:16:5: [address] in std.start.main (test)
139 \\ try foo();
140 \\ ^
113141 \\
114142 ,
115143 // release-fast
......@@ -130,11 +158,15 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
130158 // debug
131159 \\error: TheSkyIsFalling
132160 \\source.zig:4:5: [address] in main (test)
161 \\ return error.TheSkyIsFalling;
162 \\ ^
133163 \\
134164 ,
135165 // release-safe
136166 \\error: TheSkyIsFalling
137167 \\source.zig:4:5: [address] in std.start.posixCallMainAndExit (test)
168 \\ return error.TheSkyIsFalling;
169 \\ ^
138170 \\
139171 ,
140172 // release-fast
......@@ -153,13 +185,21 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
153185 // debug
154186 \\error: TheSkyIsFalling
155187 \\source.zig:4:5: [address] in foo (test)
188 \\ return error.TheSkyIsFalling;
189 \\ ^
156190 \\source.zig:8:5: [address] in main (test)
191 \\ try foo();
192 \\ ^
157193 \\
158194 ,
159195 // release-safe
160196 \\error: TheSkyIsFalling
161197 \\source.zig:4:5: [address] in std.start.posixCallMainAndExit (test)
198 \\ return error.TheSkyIsFalling;
199 \\ ^
162200 \\source.zig:8:5: [address] in std.start.posixCallMainAndExit (test)
201 \\ try foo();
202 \\ ^
163203 \\
164204 ,
165205 // release-fast
......@@ -178,17 +218,33 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
178218 // debug
179219 \\error: TheSkyIsFalling
180220 \\source.zig:12:5: [address] in make_error (test)
221 \\ return error.TheSkyIsFalling;
222 \\ ^
181223 \\source.zig:8:5: [address] in bar (test)
224 \\ return make_error();
225 \\ ^
182226 \\source.zig:4:5: [address] in foo (test)
227 \\ try bar();
228 \\ ^
183229 \\source.zig:16:5: [address] in main (test)
230 \\ try foo();
231 \\ ^
184232 \\
185233 ,
186234 // release-safe
187235 \\error: TheSkyIsFalling
188236 \\source.zig:12:5: [address] in std.start.posixCallMainAndExit (test)
237 \\ return error.TheSkyIsFalling;
238 \\ ^
189239 \\source.zig:8:5: [address] in std.start.posixCallMainAndExit (test)
240 \\ return make_error();
241 \\ ^
190242 \\source.zig:4:5: [address] in std.start.posixCallMainAndExit (test)
243 \\ try bar();
244 \\ ^
191245 \\source.zig:16:5: [address] in std.start.posixCallMainAndExit (test)
246 \\ try foo();
247 \\ ^
192248 \\
193249 ,
194250 // release-fast
......@@ -209,11 +265,15 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
209265 // debug
210266 \\error: TheSkyIsFalling
211267 \\source.zig:4:5: [address] in _main.0 (test.o)
268 \\ return error.TheSkyIsFalling;
269 \\ ^
212270 \\
213271 ,
214272 // release-safe
215273 \\error: TheSkyIsFalling
216274 \\source.zig:4:5: [address] in _main (test.o)
275 \\ return error.TheSkyIsFalling;
276 \\ ^
217277 \\
218278 ,
219279 // release-fast
......@@ -232,13 +292,21 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
232292 // debug
233293 \\error: TheSkyIsFalling
234294 \\source.zig:4:5: [address] in _foo (test.o)
295 \\ return error.TheSkyIsFalling;
296 \\ ^
235297 \\source.zig:8:5: [address] in _main.0 (test.o)
298 \\ try foo();
299 \\ ^
236300 \\
237301 ,
238302 // release-safe
239303 \\error: TheSkyIsFalling
240304 \\source.zig:4:5: [address] in _main (test.o)
305 \\ return error.TheSkyIsFalling;
306 \\ ^
241307 \\source.zig:8:5: [address] in _main (test.o)
308 \\ try foo();
309 \\ ^
242310 \\
243311 ,
244312 // release-fast
......@@ -257,17 +325,33 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
257325 // debug
258326 \\error: TheSkyIsFalling
259327 \\source.zig:12:5: [address] in _make_error (test.o)
328 \\ return error.TheSkyIsFalling;
329 \\ ^
260330 \\source.zig:8:5: [address] in _bar (test.o)
331 \\ return make_error();
332 \\ ^
261333 \\source.zig:4:5: [address] in _foo (test.o)
334 \\ try bar();
335 \\ ^
262336 \\source.zig:16:5: [address] in _main.0 (test.o)
337 \\ try foo();
338 \\ ^
263339 \\
264340 ,
265341 // release-safe
266342 \\error: TheSkyIsFalling
267343 \\source.zig:12:5: [address] in _main (test.o)
344 \\ return error.TheSkyIsFalling;
345 \\ ^
268346 \\source.zig:8:5: [address] in _main (test.o)
347 \\ return make_error();
348 \\ ^
269349 \\source.zig:4:5: [address] in _main (test.o)
350 \\ try bar();
351 \\ ^
270352 \\source.zig:16:5: [address] in _main (test.o)
353 \\ try foo();
354 \\ ^
271355 \\
272356 ,
273357 // release-fast
......@@ -288,6 +372,8 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
288372 // debug
289373 \\error: TheSkyIsFalling
290374 \\source.zig:4:5: [address] in main (test.obj)
375 \\ return error.TheSkyIsFalling;
376 \\ ^
291377 \\
292378 ,
293379 // release-safe
......@@ -309,7 +395,11 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
309395 // debug
310396 \\error: TheSkyIsFalling
311397 \\source.zig:4:5: [address] in foo (test.obj)
398 \\ return error.TheSkyIsFalling;
399 \\ ^
312400 \\source.zig:8:5: [address] in main (test.obj)
401 \\ try foo();
402 \\ ^
313403 \\
314404 ,
315405 // release-safe
......@@ -331,9 +421,17 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
331421 // debug
332422 \\error: TheSkyIsFalling
333423 \\source.zig:12:5: [address] in make_error (test.obj)
424 \\ return error.TheSkyIsFalling;
425 \\ ^
334426 \\source.zig:8:5: [address] in bar (test.obj)
427 \\ return make_error();
428 \\ ^
335429 \\source.zig:4:5: [address] in foo (test.obj)
430 \\ try bar();
431 \\ ^
336432 \\source.zig:16:5: [address] in main (test.obj)
433 \\ try foo();
434 \\ ^
337435 \\
338436 ,
339437 // release-safe
test/stage1/behavior/async_fn.zig+36
......@@ -1182,6 +1182,42 @@ test "suspend in for loop" {
11821182 S.doTheTest();
11831183}
11841184
1185test "suspend in while loop" {
1186 const S = struct {
1187 var global_frame: ?anyframe = null;
1188
1189 fn doTheTest() void {
1190 _ = async atest();
1191 while (global_frame) |f| resume f;
1192 }
1193
1194 fn atest() void {
1195 expect(optional(6) == 6);
1196 expect(errunion(6) == 6);
1197 }
1198 fn optional(stuff: ?u32) u32 {
1199 global_frame = @frame();
1200 defer global_frame = null;
1201 while (stuff) |val| {
1202 suspend;
1203 return val;
1204 }
1205 return 0;
1206 }
1207 fn errunion(stuff: anyerror!u32) u32 {
1208 global_frame = @frame();
1209 defer global_frame = null;
1210 while (stuff) |val| {
1211 suspend;
1212 return val;
1213 } else |err| {
1214 return 0;
1215 }
1216 }
1217 };
1218 S.doTheTest();
1219}
1220
11851221test "correctly spill when returning the error union result of another async fn" {
11861222 const S = struct {
11871223 var global_frame: anyframe = undefined;
test/stage1/behavior/bitcast.zig+20
......@@ -167,3 +167,23 @@ test "nested bitcast" {
167167 S.foo(42);
168168 comptime S.foo(42);
169169}
170
171test "bitcast passed as tuple element" {
172 const S = struct {
173 fn foo(args: var) void {
174 comptime expect(@TypeOf(args[0]) == f32);
175 expect(args[0] == 12.34);
176 }
177 };
178 S.foo(.{@bitCast(f32, @as(u32, 0x414570A4))});
179}
180
181test "triple level result location with bitcast sandwich passed as tuple element" {
182 const S = struct {
183 fn foo(args: var) void {
184 comptime expect(@TypeOf(args[0]) == f64);
185 expect(args[0] > 12.33 and args[0] < 12.35);
186 }
187 };
188 S.foo(.{@as(f64, @bitCast(f32, @as(u32, 0x414570A4)))});
189}
test/stage1/behavior/eval.zig+13
......@@ -804,3 +804,16 @@ test "comptime assign int to optional int" {
804804 expectEqual(20, x.?);
805805 }
806806}
807
808test "return 0 from function that has u0 return type" {
809 const S = struct {
810 fn foo_zero() u0 {
811 return 0;
812 }
813 };
814 comptime {
815 if (S.foo_zero() != 0) {
816 @compileError("test failed");
817 }
818 }
819}
test/stage1/behavior/floatop.zig+42-12
......@@ -36,7 +36,7 @@ fn testSqrt() void {
3636 // expect(@sqrt(a) == 7);
3737 //}
3838 {
39 var v: @Vector(4, f32) = [_]f32{1.1, 2.2, 3.3, 4.4};
39 var v: @Vector(4, f32) = [_]f32{ 1.1, 2.2, 3.3, 4.4 };
4040 var result = @sqrt(v);
4141 expect(math.approxEq(f32, @sqrt(@as(f32, 1.1)), result[0], epsilon));
4242 expect(math.approxEq(f32, @sqrt(@as(f32, 2.2)), result[1], epsilon));
......@@ -86,7 +86,7 @@ fn testSin() void {
8686 expect(@sin(a) == 0);
8787 }
8888 {
89 var v: @Vector(4, f32) = [_]f32{1.1, 2.2, 3.3, 4.4};
89 var v: @Vector(4, f32) = [_]f32{ 1.1, 2.2, 3.3, 4.4 };
9090 var result = @sin(v);
9191 expect(math.approxEq(f32, @sin(@as(f32, 1.1)), result[0], epsilon));
9292 expect(math.approxEq(f32, @sin(@as(f32, 2.2)), result[1], epsilon));
......@@ -116,7 +116,7 @@ fn testCos() void {
116116 expect(@cos(a) == 1);
117117 }
118118 {
119 var v: @Vector(4, f32) = [_]f32{1.1, 2.2, 3.3, 4.4};
119 var v: @Vector(4, f32) = [_]f32{ 1.1, 2.2, 3.3, 4.4 };
120120 var result = @cos(v);
121121 expect(math.approxEq(f32, @cos(@as(f32, 1.1)), result[0], epsilon));
122122 expect(math.approxEq(f32, @cos(@as(f32, 2.2)), result[1], epsilon));
......@@ -146,7 +146,7 @@ fn testExp() void {
146146 expect(@exp(a) == 1);
147147 }
148148 {
149 var v: @Vector(4, f32) = [_]f32{1.1, 2.2, 0.3, 0.4};
149 var v: @Vector(4, f32) = [_]f32{ 1.1, 2.2, 0.3, 0.4 };
150150 var result = @exp(v);
151151 expect(math.approxEq(f32, @exp(@as(f32, 1.1)), result[0], epsilon));
152152 expect(math.approxEq(f32, @exp(@as(f32, 2.2)), result[1], epsilon));
......@@ -176,7 +176,7 @@ fn testExp2() void {
176176 expect(@exp2(a) == 4);
177177 }
178178 {
179 var v: @Vector(4, f32) = [_]f32{1.1, 2.2, 0.3, 0.4};
179 var v: @Vector(4, f32) = [_]f32{ 1.1, 2.2, 0.3, 0.4 };
180180 var result = @exp2(v);
181181 expect(math.approxEq(f32, @exp2(@as(f32, 1.1)), result[0], epsilon));
182182 expect(math.approxEq(f32, @exp2(@as(f32, 2.2)), result[1], epsilon));
......@@ -208,7 +208,7 @@ fn testLog() void {
208208 expect(@log(a) == 1 or @log(a) == @bitCast(f64, @as(u64, 0x3ff0000000000000)));
209209 }
210210 {
211 var v: @Vector(4, f32) = [_]f32{1.1, 2.2, 0.3, 0.4};
211 var v: @Vector(4, f32) = [_]f32{ 1.1, 2.2, 0.3, 0.4 };
212212 var result = @log(v);
213213 expect(math.approxEq(f32, @log(@as(f32, 1.1)), result[0], epsilon));
214214 expect(math.approxEq(f32, @log(@as(f32, 2.2)), result[1], epsilon));
......@@ -238,7 +238,7 @@ fn testLog2() void {
238238 expect(@log2(a) == 2);
239239 }
240240 {
241 var v: @Vector(4, f32) = [_]f32{1.1, 2.2, 0.3, 0.4};
241 var v: @Vector(4, f32) = [_]f32{ 1.1, 2.2, 0.3, 0.4 };
242242 var result = @log2(v);
243243 expect(math.approxEq(f32, @log2(@as(f32, 1.1)), result[0], epsilon));
244244 expect(math.approxEq(f32, @log2(@as(f32, 2.2)), result[1], epsilon));
......@@ -268,7 +268,7 @@ fn testLog10() void {
268268 expect(@log10(a) == 3);
269269 }
270270 {
271 var v: @Vector(4, f32) = [_]f32{1.1, 2.2, 0.3, 0.4};
271 var v: @Vector(4, f32) = [_]f32{ 1.1, 2.2, 0.3, 0.4 };
272272 var result = @log10(v);
273273 expect(math.approxEq(f32, @log10(@as(f32, 1.1)), result[0], epsilon));
274274 expect(math.approxEq(f32, @log10(@as(f32, 2.2)), result[1], epsilon));
......@@ -304,7 +304,7 @@ fn testFabs() void {
304304 expect(@fabs(b) == 2.5);
305305 }
306306 {
307 var v: @Vector(4, f32) = [_]f32{1.1, -2.2, 0.3, -0.4};
307 var v: @Vector(4, f32) = [_]f32{ 1.1, -2.2, 0.3, -0.4 };
308308 var result = @fabs(v);
309309 expect(math.approxEq(f32, @fabs(@as(f32, 1.1)), result[0], epsilon));
310310 expect(math.approxEq(f32, @fabs(@as(f32, -2.2)), result[1], epsilon));
......@@ -334,7 +334,7 @@ fn testFloor() void {
334334 expect(@floor(a) == 3);
335335 }
336336 {
337 var v: @Vector(4, f32) = [_]f32{1.1, -2.2, 0.3, -0.4};
337 var v: @Vector(4, f32) = [_]f32{ 1.1, -2.2, 0.3, -0.4 };
338338 var result = @floor(v);
339339 expect(math.approxEq(f32, @floor(@as(f32, 1.1)), result[0], epsilon));
340340 expect(math.approxEq(f32, @floor(@as(f32, -2.2)), result[1], epsilon));
......@@ -364,7 +364,7 @@ fn testCeil() void {
364364 expect(@ceil(a) == 4);
365365 }
366366 {
367 var v: @Vector(4, f32) = [_]f32{1.1, -2.2, 0.3, -0.4};
367 var v: @Vector(4, f32) = [_]f32{ 1.1, -2.2, 0.3, -0.4 };
368368 var result = @ceil(v);
369369 expect(math.approxEq(f32, @ceil(@as(f32, 1.1)), result[0], epsilon));
370370 expect(math.approxEq(f32, @ceil(@as(f32, -2.2)), result[1], epsilon));
......@@ -394,7 +394,7 @@ fn testTrunc() void {
394394 expect(@trunc(a) == -3);
395395 }
396396 {
397 var v: @Vector(4, f32) = [_]f32{1.1, -2.2, 0.3, -0.4};
397 var v: @Vector(4, f32) = [_]f32{ 1.1, -2.2, 0.3, -0.4 };
398398 var result = @trunc(v);
399399 expect(math.approxEq(f32, @trunc(@as(f32, 1.1)), result[0], epsilon));
400400 expect(math.approxEq(f32, @trunc(@as(f32, -2.2)), result[1], epsilon));
......@@ -403,6 +403,36 @@ fn testTrunc() void {
403403 }
404404}
405405
406test "floating point comparisons" {
407 testFloatComparisons();
408 comptime testFloatComparisons();
409}
410
411fn testFloatComparisons() void {
412 inline for ([_]type{ f16, f32, f64, f128 }) |ty| {
413 // No decimal part
414 {
415 const x: ty = 1.0;
416 expect(x == 1);
417 expect(x != 0);
418 expect(x > 0);
419 expect(x < 2);
420 expect(x >= 1);
421 expect(x <= 1);
422 }
423 // Non-zero decimal part
424 {
425 const x: ty = 1.5;
426 expect(x != 1);
427 expect(x != 2);
428 expect(x > 1);
429 expect(x < 2);
430 expect(x >= 1);
431 expect(x <= 2);
432 }
433 }
434}
435
406436// TODO This is waiting on library support for the Windows build (not sure why the other's don't need it)
407437//test "@nearbyint" {
408438// comptime testNearbyInt();
test/stage1/behavior/if.zig+1-1
......@@ -72,7 +72,7 @@ test "const result loc, runtime if cond, else unreachable" {
7272
7373 var t = true;
7474 const x = if (t) Num.Two else unreachable;
75 if (x != .Two) @compileError("bad");
75 expect(x == .Two);
7676}
7777
7878test "if prongs cast to expected type instead of peer type resolution" {
test/stage1/behavior/math.zig+8
......@@ -529,6 +529,10 @@ test "comptime_int xor" {
529529}
530530
531531test "f128" {
532 if (std.Target.current.isWindows()) {
533 // TODO https://github.com/ziglang/zig/issues/508
534 return error.SkipZigTest;
535 }
532536 test_f128();
533537 comptime test_f128();
534538}
......@@ -627,6 +631,10 @@ test "NaN comparison" {
627631 // TODO: https://github.com/ziglang/zig/issues/3338
628632 return error.SkipZigTest;
629633 }
634 if (std.Target.current.isWindows()) {
635 // TODO https://github.com/ziglang/zig/issues/508
636 return error.SkipZigTest;
637 }
630638 testNanEqNan(f16);
631639 testNanEqNan(f32);
632640 testNanEqNan(f64);
test/stage1/behavior/misc.zig+13
......@@ -781,3 +781,16 @@ test "pointer to thread local array" {
781781 std.mem.copy(u8, buffer[0..], s);
782782 std.testing.expectEqualSlices(u8, buffer[0..], s);
783783}
784
785test "auto created variables have correct alignment" {
786 const S = struct {
787 fn foo(str: [*]const u8) u32 {
788 for (@ptrCast([*]align(1) const u32, str)[0..1]) |v| {
789 return v;
790 }
791 return 0;
792 }
793 };
794 expect(S.foo("\x7a\x7a\x7a\x7a") == 0x7a7a7a7a);
795 comptime expect(S.foo("\x7a\x7a\x7a\x7a") == 0x7a7a7a7a);
796}
test/stage1/behavior/optional.zig+22
......@@ -153,3 +153,25 @@ test "optional with void type" {
153153 var x = Foo{ .x = null };
154154 expect(x.x == null);
155155}
156
157test "0-bit child type coerced to optional return ptr result location" {
158 const S = struct {
159 fn doTheTest() void {
160 var y = Foo{};
161 var z = y.thing();
162 expect(z != null);
163 }
164
165 const Foo = struct {
166 pub const Bar = struct {
167 field: *Foo,
168 };
169
170 pub fn thing(self: *Foo) ?Bar {
171 return Bar{ .field = self };
172 }
173 };
174 };
175 S.doTheTest();
176 comptime S.doTheTest();
177}
test/stage1/behavior/switch.zig+14
......@@ -479,3 +479,17 @@ test "switch on pointer type" {
479479 comptime expect(2 == S.doTheTest(S.P2));
480480 comptime expect(3 == S.doTheTest(S.P3));
481481}
482
483test "switch on error set with single else" {
484 const S = struct {
485 fn doTheTest() void {
486 var some: error{Foo} = error.Foo;
487 expect(switch (some) {
488 else => |a| true,
489 });
490 }
491 };
492
493 S.doTheTest();
494 comptime S.doTheTest();
495}
test/stage1/behavior/undefined.zig+3-2
......@@ -1,5 +1,6 @@
1const expect = @import("std").testing.expect;
2const mem = @import("std").mem;
1const std = @import("std");
2const expect = std.testing.expect;
3const mem = std.mem;
34
45fn initStaticArray() [10]i32 {
56 var array: [10]i32 = undefined;
test/tests.zig+223-196
......@@ -38,236 +38,260 @@ const TestTarget = struct {
3838 disable_native: bool = false,
3939};
4040
41const test_targets = [_]TestTarget{
42 TestTarget{},
43 TestTarget{
44 .link_libc = true,
45 },
46 TestTarget{
47 .single_threaded = true,
48 },
49
50 TestTarget{
51 .target = Target{
52 .Cross = CrossTarget{
53 .os = .linux,
54 .arch = .x86_64,
55 .abi = .none,
41const test_targets = blk: {
42 // getBaselineCpuFeatures calls populateDependencies which has a O(N ^ 2) algorithm
43 // (where N is roughly 160, which technically makes it O(1), but it adds up to a
44 // lot of branches)
45 @setEvalBranchQuota(50000);
46 break :blk [_]TestTarget{
47 TestTarget{},
48 TestTarget{
49 .link_libc = true,
50 },
51 TestTarget{
52 .single_threaded = true,
53 },
54
55 TestTarget{
56 .target = Target{
57 .Cross = CrossTarget{
58 .os = .linux,
59 .arch = .x86_64,
60 .abi = .none,
61 .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
62 },
5663 },
5764 },
58 },
59 TestTarget{
60 .target = Target{
61 .Cross = CrossTarget{
62 .os = .linux,
63 .arch = .x86_64,
64 .abi = .gnu,
65 TestTarget{
66 .target = Target{
67 .Cross = CrossTarget{
68 .os = .linux,
69 .arch = .x86_64,
70 .abi = .gnu,
71 .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
72 },
6573 },
74 .link_libc = true,
6675 },
67 .link_libc = true,
68 },
69 TestTarget{
70 .target = Target{
71 .Cross = CrossTarget{
72 .os = .linux,
73 .arch = .x86_64,
74 .abi = .musl,
76 TestTarget{
77 .target = Target{
78 .Cross = CrossTarget{
79 .os = .linux,
80 .arch = .x86_64,
81 .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
82 .abi = .musl,
83 },
7584 },
85 .link_libc = true,
7686 },
77 .link_libc = true,
78 },
79
80 TestTarget{
81 .target = Target{
82 .Cross = CrossTarget{
83 .os = .linux,
84 .arch = .i386,
85 .abi = .none,
87
88 TestTarget{
89 .target = Target{
90 .Cross = CrossTarget{
91 .os = .linux,
92 .arch = .i386,
93 .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
94 .abi = .none,
95 },
8696 },
8797 },
88 },
89 TestTarget{
90 .target = Target{
91 .Cross = CrossTarget{
92 .os = .linux,
93 .arch = .i386,
94 .abi = .musl,
98 TestTarget{
99 .target = Target{
100 .Cross = CrossTarget{
101 .os = .linux,
102 .arch = .i386,
103 .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
104 .abi = .musl,
105 },
95106 },
107 .link_libc = true,
96108 },
97 .link_libc = true,
98 },
99
100 TestTarget{
101 .target = Target{
102 .Cross = CrossTarget{
103 .os = .linux,
104 .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a },
105 .abi = .none,
109
110 TestTarget{
111 .target = Target{
112 .Cross = CrossTarget{
113 .os = .linux,
114 .arch = Target.Arch{ .aarch64 = .v8a },
115 .cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(),
116 .abi = .none,
117 },
106118 },
107119 },
108 },
109 TestTarget{
110 .target = Target{
111 .Cross = CrossTarget{
112 .os = .linux,
113 .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a },
114 .abi = .musl,
120 TestTarget{
121 .target = Target{
122 .Cross = CrossTarget{
123 .os = .linux,
124 .arch = Target.Arch{ .aarch64 = .v8a },
125 .cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(),
126 .abi = .musl,
127 },
115128 },
129 .link_libc = true,
116130 },
117 .link_libc = true,
118 },
119 TestTarget{
120 .target = Target{
121 .Cross = CrossTarget{
122 .os = .linux,
123 .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a },
124 .abi = .gnu,
131 TestTarget{
132 .target = Target{
133 .Cross = CrossTarget{
134 .os = .linux,
135 .arch = Target.Arch{ .aarch64 = .v8a },
136 .cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(),
137 .abi = .gnu,
138 },
125139 },
140 .link_libc = true,
126141 },
127 .link_libc = true,
128 },
129
130 TestTarget{
131 .target = Target{
132 .Cross = CrossTarget{
133 .os = .linux,
134 .arch = builtin.Arch{ .arm = builtin.Arch.Arm32.v8_5a },
135 .abi = .none,
142
143 TestTarget{
144 .target = Target{
145 .Cross = CrossTarget{
146 .os = .linux,
147 .arch = Target.Arch{ .arm = .v8a },
148 .cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(),
149 .abi = .none,
150 },
136151 },
137152 },
138 },
139 TestTarget{
140 .target = Target{
141 .Cross = CrossTarget{
142 .os = .linux,
143 .arch = builtin.Arch{ .arm = builtin.Arch.Arm32.v8_5a },
144 .abi = .musleabihf,
153 TestTarget{
154 .target = Target{
155 .Cross = CrossTarget{
156 .os = .linux,
157 .arch = Target.Arch{ .arm = .v8a },
158 .cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(),
159 .abi = .musleabihf,
160 },
145161 },
162 .link_libc = true,
146163 },
147 .link_libc = true,
148 },
149 // TODO https://github.com/ziglang/zig/issues/3287
150 //TestTarget{
151 // .target = Target{
152 // .Cross = CrossTarget{
153 // .os = .linux,
154 // .arch = builtin.Arch{ .arm = builtin.Arch.Arm32.v8_5a },
155 // .abi = .gnueabihf,
156 // },
157 // },
158 // .link_libc = true,
159 //},
160
161 TestTarget{
162 .target = Target{
163 .Cross = CrossTarget{
164 .os = .linux,
165 .arch = .mipsel,
166 .abi = .none,
164 // TODO https://github.com/ziglang/zig/issues/3287
165 //TestTarget{
166 // .target = Target{
167 // .Cross = CrossTarget{
168 // .os = .linux,
169 // .arch = Target.Arch{ .arm = .v8a },
170 // .cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(),
171 // .abi = .gnueabihf,
172 // },
173 // },
174 // .link_libc = true,
175 //},
176
177 TestTarget{
178 .target = Target{
179 .Cross = CrossTarget{
180 .os = .linux,
181 .arch = .mipsel,
182 .cpu_features = Target.Arch.mipsel.getBaselineCpuFeatures(),
183 .abi = .none,
184 },
167185 },
168186 },
169 },
170 TestTarget{
171 .target = Target{
172 .Cross = CrossTarget{
173 .os = .linux,
174 .arch = .mipsel,
175 .abi = .musl,
187 TestTarget{
188 .target = Target{
189 .Cross = CrossTarget{
190 .os = .linux,
191 .arch = .mipsel,
192 .cpu_features = Target.Arch.mipsel.getBaselineCpuFeatures(),
193 .abi = .musl,
194 },
176195 },
196 .link_libc = true,
177197 },
178 .link_libc = true,
179 },
180
181 TestTarget{
182 .target = Target{
183 .Cross = CrossTarget{
184 .os = .macosx,
185 .arch = .x86_64,
186 .abi = .gnu,
198
199 TestTarget{
200 .target = Target{
201 .Cross = CrossTarget{
202 .os = .macosx,
203 .arch = .x86_64,
204 .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
205 .abi = .gnu,
206 },
187207 },
208 // TODO https://github.com/ziglang/zig/issues/3295
209 .disable_native = true,
188210 },
189 // TODO https://github.com/ziglang/zig/issues/3295
190 .disable_native = true,
191 },
192
193 TestTarget{
194 .target = Target{
195 .Cross = CrossTarget{
196 .os = .windows,
197 .arch = .i386,
198 .abi = .msvc,
211
212 TestTarget{
213 .target = Target{
214 .Cross = CrossTarget{
215 .os = .windows,
216 .arch = .i386,
217 .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
218 .abi = .msvc,
219 },
199220 },
200221 },
201 },
202
203 TestTarget{
204 .target = Target{
205 .Cross = CrossTarget{
206 .os = .windows,
207 .arch = .x86_64,
208 .abi = .msvc,
222
223 TestTarget{
224 .target = Target{
225 .Cross = CrossTarget{
226 .os = .windows,
227 .arch = .x86_64,
228 .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
229 .abi = .msvc,
230 },
209231 },
210232 },
211 },
212
213 TestTarget{
214 .target = Target{
215 .Cross = CrossTarget{
216 .os = .windows,
217 .arch = .i386,
218 .abi = .gnu,
233
234 TestTarget{
235 .target = Target{
236 .Cross = CrossTarget{
237 .os = .windows,
238 .arch = .i386,
239 .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
240 .abi = .gnu,
241 },
219242 },
243 .link_libc = true,
220244 },
221 .link_libc = true,
222 },
223
224 TestTarget{
225 .target = Target{
226 .Cross = CrossTarget{
227 .os = .windows,
228 .arch = .x86_64,
229 .abi = .gnu,
245
246 TestTarget{
247 .target = Target{
248 .Cross = CrossTarget{
249 .os = .windows,
250 .arch = .x86_64,
251 .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
252 .abi = .gnu,
253 },
230254 },
255 .link_libc = true,
231256 },
232 .link_libc = true,
233 },
234
235 // Do the release tests last because they take a long time
236 TestTarget{
237 .mode = .ReleaseFast,
238 },
239 TestTarget{
240 .link_libc = true,
241 .mode = .ReleaseFast,
242 },
243 TestTarget{
244 .mode = .ReleaseFast,
245 .single_threaded = true,
246 },
247
248 TestTarget{
249 .mode = .ReleaseSafe,
250 },
251 TestTarget{
252 .link_libc = true,
253 .mode = .ReleaseSafe,
254 },
255 TestTarget{
256 .mode = .ReleaseSafe,
257 .single_threaded = true,
258 },
259
260 TestTarget{
261 .mode = .ReleaseSmall,
262 },
263 TestTarget{
264 .link_libc = true,
265 .mode = .ReleaseSmall,
266 },
267 TestTarget{
268 .mode = .ReleaseSmall,
269 .single_threaded = true,
270 },
257
258 // Do the release tests last because they take a long time
259 TestTarget{
260 .mode = .ReleaseFast,
261 },
262 TestTarget{
263 .link_libc = true,
264 .mode = .ReleaseFast,
265 },
266 TestTarget{
267 .mode = .ReleaseFast,
268 .single_threaded = true,
269 },
270
271 TestTarget{
272 .mode = .ReleaseSafe,
273 },
274 TestTarget{
275 .link_libc = true,
276 .mode = .ReleaseSafe,
277 },
278 TestTarget{
279 .mode = .ReleaseSafe,
280 .single_threaded = true,
281 },
282
283 TestTarget{
284 .mode = .ReleaseSmall,
285 },
286 TestTarget{
287 .link_libc = true,
288 .mode = .ReleaseSmall,
289 },
290 TestTarget{
291 .mode = .ReleaseSmall,
292 .single_threaded = true,
293 },
294 };
271295};
272296
273297const max_stdout_size = 1 * 1024 * 1024; // 1 MB
......@@ -598,6 +622,9 @@ pub const StackTracesContext = struct {
598622 child.stderr_behavior = .Pipe;
599623 child.env_map = b.env_map;
600624
625 if (b.verbose) {
626 printInvocation(args.toSliceConst());
627 }
601628 child.spawn() catch |err| debug.panic("Unable to spawn {}: {}\n", .{ full_exe_path, @errorName(err) });
602629
603630 var stdout = Buffer.initNull(b.allocator);
test/translate_c.zig+65-3
......@@ -1,7 +1,43 @@
11const tests = @import("tests.zig");
22const builtin = @import("builtin");
3const Target = @import("std").Target;
34
45pub fn addCases(cases: *tests.TranslateCContext) void {
6 cases.add("function prototype with parenthesis",
7 \\void (f0) (void *L);
8 \\void ((f1)) (void *L);
9 \\void (((f2))) (void *L);
10 , &[_][]const u8{
11 \\pub extern fn f0(L: ?*c_void) void;
12 \\pub extern fn f1(L: ?*c_void) void;
13 \\pub extern fn f2(L: ?*c_void) void;
14 });
15
16 cases.add("array initializer w/ typedef",
17 \\typedef unsigned char uuid_t[16];
18 \\static const uuid_t UUID_NULL __attribute__ ((unused)) = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
19 , &[_][]const u8{
20 \\pub const uuid_t = [16]u8;
21 \\pub const UUID_NULL: uuid_t = .{
22 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
23 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
24 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
25 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
26 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
27 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
28 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
29 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
30 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
31 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
32 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
33 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
34 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
35 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
36 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
37 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
38 \\};
39 });
40
541 cases.add("empty declaration",
642 \\;
743 , &[_][]const u8{""});
......@@ -1005,7 +1041,12 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
10051041 });
10061042
10071043 cases.addWithTarget("Calling convention", tests.Target{
1008 .Cross = .{ .os = .linux, .arch = .i386, .abi = .none },
1044 .Cross = .{
1045 .os = .linux,
1046 .arch = .i386,
1047 .abi = .none,
1048 .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
1049 },
10091050 },
10101051 \\void __attribute__((fastcall)) foo1(float *a);
10111052 \\void __attribute__((stdcall)) foo2(float *a);
......@@ -1021,7 +1062,12 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
10211062 });
10221063
10231064 cases.addWithTarget("Calling convention", tests.Target{
1024 .Cross = .{ .os = .linux, .arch = .{ .arm = .v8_5a }, .abi = .none },
1065 .Cross = .{
1066 .os = .linux,
1067 .arch = .{ .arm = .v8_5a },
1068 .abi = .none,
1069 .cpu_features = (Target.Arch{ .arm = .v8_5a }).getBaselineCpuFeatures(),
1070 },
10251071 },
10261072 \\void __attribute__((pcs("aapcs"))) foo1(float *a);
10271073 \\void __attribute__((pcs("aapcs-vfp"))) foo2(float *a);
......@@ -1031,7 +1077,12 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
10311077 });
10321078
10331079 cases.addWithTarget("Calling convention", tests.Target{
1034 .Cross = .{ .os = .linux, .arch = .{ .aarch64 = .v8_5a }, .abi = .none },
1080 .Cross = .{
1081 .os = .linux,
1082 .arch = .{ .aarch64 = .v8_5a },
1083 .abi = .none,
1084 .cpu_features = (Target.Arch{ .aarch64 = .v8_5a }).getBaselineCpuFeatures(),
1085 },
10351086 },
10361087 \\void __attribute__((aarch64_vector_pcs)) foo1(float *a);
10371088 , &[_][]const u8{
......@@ -2590,4 +2641,15 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
25902641 \\ return foo((@intCast(c_int, @bitCast(i1, @intCast(u1, @boolToInt(c)))) != @intCast(c_int, @bitCast(i1, @intCast(u1, @boolToInt(b))))));
25912642 \\}
25922643 });
2644
2645 cases.add("Don't make const parameters mutable",
2646 \\int max(const int x, int y) {
2647 \\ return (x > y) ? x : y;
2648 \\}
2649 , &[_][]const u8{
2650 \\pub export fn max(x: c_int, arg_y: c_int) c_int {
2651 \\ var y = arg_y;
2652 \\ return if (x > y) x else y;
2653 \\}
2654 });
25932655}