authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2025-09-27 12:57:47+02:00
committergravatar for noreply@github.comGitHub <noreply@github.com> 2025-09-27 12:57:47+02:00
logb7ab62540963d80f68d0e9ee7ce18520fb173487
tree4c83f0a3b5a52b73f007150bb96014d2478b4312
parentb1a0a4e03bf00d56bcd09ef07b733639cdca9ff8
parente98630aacf816c5fedb7bb504001584bfa425f6c
signaturebadge-check Signed by PGP key B5690EEEBB952194

Merge pull request #25362 from alexrp/aro-valist

`aro`: `TypeStore`: synchronize `__va_list_tag` logic with Zig's `std.builtin.VaList`

2 files changed, 200 insertions(+), 32 deletions(-)

lib/compiler/aro/aro/TypeStore.zig+156-13
......@@ -2046,27 +2046,69 @@ fn generateNsConstantStringType(ts: *TypeStore, comp: *Compilation) !QualType {
20462046}
20472047
20482048fn generateVaListType(ts: *TypeStore, comp: *Compilation) !QualType {
2049 const Kind = enum { aarch64_va_list, x86_64_va_list };
2049 const Kind = enum {
2050 aarch64_va_list,
2051 arm_va_list,
2052 hexagon_va_list,
2053 powerpc_va_list,
2054 s390x_va_list,
2055 x86_64_va_list,
2056 xtensa_va_list,
2057 };
20502058 const kind: Kind = switch (comp.target.cpu.arch) {
2059 .amdgcn,
2060 .msp430,
2061 .nvptx,
2062 .nvptx64,
2063 .powerpc64,
2064 .powerpc64le,
2065 .x86,
2066 => return .char_pointer,
2067 .arc,
2068 .avr,
2069 .bpfel,
2070 .bpfeb,
2071 .csky,
2072 .lanai,
2073 .loongarch32,
2074 .loongarch64,
2075 .m68k,
2076 .mips,
2077 .mipsel,
2078 .mips64,
2079 .mips64el,
2080 .riscv32,
2081 .riscv32be,
2082 .riscv64,
2083 .riscv64be,
2084 .sparc,
2085 .sparc64,
2086 .spirv32,
2087 .spirv64,
2088 .ve,
2089 .wasm32,
2090 .wasm64,
2091 .xcore,
2092 => return .void_pointer,
20512093 .aarch64, .aarch64_be => switch (comp.target.os.tag) {
2052 .windows => return .char_pointer,
2053 .ios, .macos, .tvos, .watchos => return .char_pointer,
2094 .driverkit, .ios, .macos, .tvos, .visionos, .watchos, .windows => return .char_pointer,
20542095 else => .aarch64_va_list,
20552096 },
2056 .arm, .armeb, .thumb, .thumbeb => switch (comp.target.os.tag) {
2057 .ios, .macos, .tvos, .watchos, .visionos => return .char_pointer,
2058 else => return .void_pointer,
2059 },
2060 .sparc, .wasm32, .wasm64, .bpfel, .bpfeb, .riscv32, .riscv64, .avr, .spirv32, .spirv64 => return .void_pointer,
2061 .powerpc => switch (comp.target.os.tag) {
2062 .ios, .macos, .tvos, .watchos, .aix => return .char_pointer,
2063 else => return .void, // unknown
2097 .arm, .armeb, .thumb, .thumbeb => .arm_va_list,
2098 .hexagon => if (comp.target.abi.isMusl())
2099 .hexagon_va_list
2100 else
2101 return .char_pointer,
2102 .powerpc, .powerpcle => switch (comp.target.os.tag) {
2103 .aix => return .char_pointer,
2104 else => .powerpc_va_list,
20642105 },
2065 .x86, .msp430 => return .char_pointer,
2106 .s390x => .s390x_va_list,
20662107 .x86_64 => switch (comp.target.os.tag) {
2067 .windows => return .char_pointer,
2108 .uefi, .windows => return .char_pointer,
20682109 else => .x86_64_va_list,
20692110 },
2111 .xtensa => .xtensa_va_list,
20702112 else => return .void, // unknown
20712113 };
20722114
......@@ -2093,6 +2135,87 @@ fn generateVaListType(ts: *TypeStore, comp: *Compilation) !QualType {
20932135
20942136 break :blk qt;
20952137 },
2138 .arm_va_list => blk: {
2139 var record: Type.Record = .{
2140 .name = try comp.internString("__va_list_tag"),
2141 .decl_node = undefined, // TODO
2142 .layout = null,
2143 .fields = &.{},
2144 };
2145 const qt = try ts.put(comp.gpa, .{ .@"struct" = record });
2146
2147 var fields: [1]Type.Record.Field = .{
2148 .{ .name = try comp.internString("__ap"), .qt = .void_pointer },
2149 };
2150 record.fields = &fields;
2151 record.layout = record_layout.compute(&fields, qt, comp, null) catch unreachable;
2152 try ts.set(comp.gpa, .{ .@"struct" = record }, @intFromEnum(qt._index));
2153
2154 break :blk qt;
2155 },
2156 .hexagon_va_list => blk: {
2157 var record: Type.Record = .{
2158 .name = try comp.internString("__va_list_tag"),
2159 .decl_node = undefined, // TODO
2160 .layout = null,
2161 .fields = &.{},
2162 };
2163 const qt = try ts.put(comp.gpa, .{ .@"struct" = record });
2164
2165 var fields: [4]Type.Record.Field = .{
2166 .{ .name = try comp.internString("__gpr"), .qt = .long },
2167 .{ .name = try comp.internString("__fpr"), .qt = .long },
2168 .{ .name = try comp.internString("__overflow_arg_area"), .qt = .void_pointer },
2169 .{ .name = try comp.internString("__reg_save_area"), .qt = .void_pointer },
2170 };
2171 record.fields = &fields;
2172 record.layout = record_layout.compute(&fields, qt, comp, null) catch unreachable;
2173 try ts.set(comp.gpa, .{ .@"struct" = record }, @intFromEnum(qt._index));
2174
2175 break :blk qt;
2176 },
2177 .powerpc_va_list => blk: {
2178 var record: Type.Record = .{
2179 .name = try comp.internString("__va_list_tag"),
2180 .decl_node = undefined, // TODO
2181 .layout = null,
2182 .fields = &.{},
2183 };
2184 const qt = try ts.put(comp.gpa, .{ .@"struct" = record });
2185
2186 var fields: [5]Type.Record.Field = .{
2187 .{ .name = try comp.internString("gpr"), .qt = .uchar },
2188 .{ .name = try comp.internString("fpr"), .qt = .uchar },
2189 .{ .name = try comp.internString("reserved"), .qt = .ushort },
2190 .{ .name = try comp.internString("overflow_arg_area"), .qt = .void_pointer },
2191 .{ .name = try comp.internString("reg_save_area"), .qt = .void_pointer },
2192 };
2193 record.fields = &fields;
2194 record.layout = record_layout.compute(&fields, qt, comp, null) catch unreachable;
2195 try ts.set(comp.gpa, .{ .@"struct" = record }, @intFromEnum(qt._index));
2196
2197 break :blk qt;
2198 },
2199 .s390x_va_list => blk: {
2200 var record: Type.Record = .{
2201 .name = try comp.internString("__va_list_tag"),
2202 .decl_node = undefined, // TODO
2203 .layout = null,
2204 .fields = &.{},
2205 };
2206 const qt = try ts.put(comp.gpa, .{ .@"struct" = record });
2207
2208 var fields: [3]Type.Record.Field = .{
2209 .{ .name = try comp.internString("__current_saved_reg_area_pointer"), .qt = .void_pointer },
2210 .{ .name = try comp.internString("__saved_reg_area_end_pointer"), .qt = .void_pointer },
2211 .{ .name = try comp.internString("__overflow_area_pointer"), .qt = .void_pointer },
2212 };
2213 record.fields = &fields;
2214 record.layout = record_layout.compute(&fields, qt, comp, null) catch unreachable;
2215 try ts.set(comp.gpa, .{ .@"struct" = record }, @intFromEnum(qt._index));
2216
2217 break :blk qt;
2218 },
20962219 .x86_64_va_list => blk: {
20972220 var record: Type.Record = .{
20982221 .name = try comp.internString("__va_list_tag"),
......@@ -2112,6 +2235,26 @@ fn generateVaListType(ts: *TypeStore, comp: *Compilation) !QualType {
21122235 record.layout = record_layout.compute(&fields, qt, comp, null) catch unreachable;
21132236 try ts.set(comp.gpa, .{ .@"struct" = record }, @intFromEnum(qt._index));
21142237
2238 break :blk qt;
2239 },
2240 .xtensa_va_list => blk: {
2241 var record: Type.Record = .{
2242 .name = try comp.internString("__va_list_tag"),
2243 .decl_node = undefined, // TODO
2244 .layout = null,
2245 .fields = &.{},
2246 };
2247 const qt = try ts.put(comp.gpa, .{ .@"struct" = record });
2248
2249 var fields: [3]Type.Record.Field = .{
2250 .{ .name = try comp.internString("__va_stk"), .qt = .int_pointer },
2251 .{ .name = try comp.internString("__va_reg"), .qt = .int_pointer },
2252 .{ .name = try comp.internString("__va_ndx"), .qt = .int },
2253 };
2254 record.fields = &fields;
2255 record.layout = record_layout.compute(&fields, qt, comp, null) catch unreachable;
2256 try ts.set(comp.gpa, .{ .@"struct" = record }, @intFromEnum(qt._index));
2257
21152258 break :blk qt;
21162259 },
21172260 };
lib/std/builtin.zig+44-19
......@@ -844,6 +844,12 @@ pub const VaListAarch64 = extern struct {
844844 __vr_offs: c_int,
845845};
846846
847/// This data structure is used by the Zig language code generation and
848/// therefore must be kept in sync with the compiler implementation.
849pub const VaListArm = extern struct {
850 __ap: *anyopaque,
851};
852
847853/// This data structure is used by the Zig language code generation and
848854/// therefore must be kept in sync with the compiler implementation.
849855pub const VaListHexagon = extern struct {
......@@ -891,37 +897,56 @@ pub const VaListXtensa = extern struct {
891897/// This data structure is used by the Zig language code generation and
892898/// therefore must be kept in sync with the compiler implementation.
893899pub const VaList = switch (builtin.cpu.arch) {
900 .amdgcn,
901 .msp430,
902 .nvptx,
903 .nvptx64,
904 .powerpc64,
905 .powerpc64le,
906 .x86,
907 => *u8,
908 .arc,
909 .avr,
910 .bpfel,
911 .bpfeb,
912 .csky,
913 .lanai,
914 .loongarch32,
915 .loongarch64,
916 .m68k,
917 .mips,
918 .mipsel,
919 .mips64,
920 .mips64el,
921 .riscv32,
922 .riscv32be,
923 .riscv64,
924 .riscv64be,
925 .sparc,
926 .sparc64,
927 .spirv32,
928 .spirv64,
929 .ve,
930 .wasm32,
931 .wasm64,
932 .xcore,
933 => *anyopaque,
894934 .aarch64, .aarch64_be => switch (builtin.os.tag) {
895 .windows => *u8,
896 .ios, .macos, .tvos, .watchos, .visionos => *u8,
935 .driverkit, .ios, .macos, .tvos, .visionos, .watchos, .windows => *u8,
897936 else => switch (builtin.zig_backend) {
898937 else => VaListAarch64,
899938 .stage2_llvm => @compileError("disabled due to miscompilations"),
900939 },
901940 },
902 .arm, .armeb, .thumb, .thumbeb => switch (builtin.os.tag) {
903 .ios, .macos, .tvos, .watchos, .visionos => *u8,
904 else => *anyopaque,
905 },
906 .amdgcn => *u8,
907 .avr => *anyopaque,
908 .bpfel, .bpfeb => *anyopaque,
941 .arm, .armeb, .thumb, .thumbeb => VaListArm,
909942 .hexagon => if (builtin.target.abi.isMusl()) VaListHexagon else *u8,
910 .loongarch32, .loongarch64 => *anyopaque,
911 .mips, .mipsel, .mips64, .mips64el => *anyopaque,
912 .riscv32, .riscv32be, .riscv64, .riscv64be => *anyopaque,
913943 .powerpc, .powerpcle => switch (builtin.os.tag) {
914 .ios, .macos, .tvos, .watchos, .visionos, .aix => *u8,
944 .aix => *u8,
915945 else => VaListPowerPc,
916946 },
917 .powerpc64, .powerpc64le => *u8,
918 .sparc, .sparc64 => *anyopaque,
919 .spirv32, .spirv64 => *anyopaque,
920947 .s390x => VaListS390x,
921 .wasm32, .wasm64 => *anyopaque,
922 .x86 => *u8,
923948 .x86_64 => switch (builtin.os.tag) {
924 .windows => switch (builtin.zig_backend) {
949 .uefi, .windows => switch (builtin.zig_backend) {
925950 else => *u8,
926951 .stage2_llvm => @compileError("disabled due to miscompilations"),
927952 },