| author | |
| committer | |
| log | b83ce08a3b51c58096ab0b2383212a2124794c82 |
| tree | bfddaa199d28c32e6a0f5b0b0d950923d1cb868d |
| parent | c806de8ae723e363bb2f7e95e8a8aa754b464730 |
2 files changed, 22 insertions(+), 0 deletions(-)
src/ir.cpp+6| ... | ... | @@ -25824,6 +25824,12 @@ static IrInstruction *ir_analyze_instruction_atomic_rmw(IrAnalyze *ira, IrInstru |
| 25824 | 25824 | } |
| 25825 | 25825 | } |
| 25826 | 25826 | |
| 25827 | if (operand_type->id == ZigTypeIdEnum && op != AtomicRmwOp_xchg) { | |
| 25828 | ir_add_error(ira, instruction->op, | |
| 25829 | buf_sprintf("@atomicRmw on enum only works with .Xchg")); | |
| 25830 | return ira->codegen->invalid_instruction; | |
| 25831 | } | |
| 25832 | ||
| 25827 | 25833 | IrInstruction *operand = instruction->operand->child; |
| 25828 | 25834 | if (type_is_invalid(operand->value.type)) |
| 25829 | 25835 | return ira->codegen->invalid_instruction; |
test/compile_errors.zig+16| ... | ... | @@ -2,6 +2,22 @@ const tests = @import("tests.zig"); |
| 2 | 2 | const builtin = @import("builtin"); |
| 3 | 3 | |
| 4 | 4 | pub fn addCases(cases: *tests.CompileErrorContext) void { |
| 5 | cases.add( | |
| 6 | "atomicrmw with enum op not .Xchg", | |
| 7 | \\export fn entry() void { | |
| 8 | \\ const E = enum(u8) { | |
| 9 | \\ a, | |
| 10 | \\ b, | |
| 11 | \\ c, | |
| 12 | \\ d, | |
| 13 | \\ }; | |
| 14 | \\ var x: E = .a; | |
| 15 | \\ _ = @atomicRmw(E, &x, .Add, .b, .SeqCst); | |
| 16 | \\} | |
| 17 | , | |
| 18 | "tmp.zig:9:27: error: @atomicRmw on enum only works with .Xchg", | |
| 19 | ); | |
| 20 | ||
| 5 | 21 | cases.add( |
| 6 | 22 | "atomic orderings of atomicStore Acquire or AcqRel", |
| 7 | 23 | \\export fn entry() void { |