authorgravatar for jacobly@ziglang.orgJacob Young <jacobly@ziglang.org> 2023-10-24 05:34:13-04:00
committergravatar for noreply@github.comGitHub <noreply@github.com> 2023-10-24 05:34:13-04:00
logbb0419599aa93455f3ae0969f4bfd80204807596
treeedce35a16131dbe5ce31a62cbbf7ac8f2dfca0bc
parentb477279c37d1ca1c141a3e30589bd974687b85cc
parentf7482a5c95dd549eb3da103eab42bac881ba0498
signaturebadge-question-mark Signed by PGP key 4AEE18F83AFDEB23

Merge pull request #17666 from jacobly0/x86_64-unicode

x86_64: pass more std tests

87 files changed, 1310 insertions(+), 1135 deletions(-)

lib/compiler_rt/addf3_test.zig-3
......@@ -76,9 +76,6 @@ fn test__subtf3(a: f128, b: f128, expected_hi: u64, expected_lo: u64) !void {
7676}
7777
7878test "subtf3" {
79 if (builtin.zig_backend == .stage2_x86_64 and
80 !comptime std.Target.x86.featureSetHasAll(builtin.cpu.features, .{ .bmi, .lzcnt })) return error.SkipZigTest;
81
8279 // qNaN - any = qNaN
8380 try test__subtf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0);
8481
lib/compiler_rt/divtf3_test.zig-4
......@@ -1,5 +1,4 @@
11const std = @import("std");
2const builtin = @import("builtin");
32const math = std.math;
43const testing = std.testing;
54
......@@ -31,9 +30,6 @@ fn test__divtf3(a: f128, b: f128, expectedHi: u64, expectedLo: u64) !void {
3130}
3231
3332test "divtf3" {
34 if (builtin.zig_backend == .stage2_x86_64 and
35 !comptime std.Target.x86.featureSetHasAll(builtin.cpu.features, .{ .bmi, .lzcnt })) return error.SkipZigTest;
36
3733 // NaN / any = NaN
3834 try test__divtf3(math.nan(f128), 0x1.23456789abcdefp+5, 0x7fff800000000000, 0);
3935 // inf / any(except inf and nan) = inf
lib/compiler_rt/float_from_int_test.zig-22
......@@ -1,5 +1,4 @@
11const std = @import("std");
2const builtin = @import("builtin");
32const testing = std.testing;
43const math = std.math;
54
......@@ -126,9 +125,6 @@ fn test__floatuntisf(a: u128, expected: f32) !void {
126125}
127126
128127test "floattisf" {
129 if (builtin.zig_backend == .stage2_x86_64 and
130 !comptime std.Target.x86.featureSetHasAll(builtin.cpu.features, .{ .bmi, .lzcnt })) return error.SkipZigTest;
131
132128 try test__floattisf(0, 0.0);
133129
134130 try test__floattisf(1, 1.0);
......@@ -175,9 +171,6 @@ test "floattisf" {
175171}
176172
177173test "floatuntisf" {
178 if (builtin.zig_backend == .stage2_x86_64 and
179 !comptime std.Target.x86.featureSetHasAll(builtin.cpu.features, .{ .bmi, .lzcnt })) return error.SkipZigTest;
180
181174 try test__floatuntisf(0, 0.0);
182175
183176 try test__floatuntisf(1, 1.0);
......@@ -374,9 +367,6 @@ fn test__floatuntidf(a: u128, expected: f64) !void {
374367}
375368
376369test "floattidf" {
377 if (builtin.zig_backend == .stage2_x86_64 and
378 !comptime std.Target.x86.featureSetHasAll(builtin.cpu.features, .{ .bmi, .lzcnt })) return error.SkipZigTest;
379
380370 try test__floattidf(0, 0.0);
381371
382372 try test__floattidf(1, 1.0);
......@@ -447,9 +437,6 @@ test "floattidf" {
447437}
448438
449439test "floatuntidf" {
450 if (builtin.zig_backend == .stage2_x86_64 and
451 !comptime std.Target.x86.featureSetHasAll(builtin.cpu.features, .{ .bmi, .lzcnt })) return error.SkipZigTest;
452
453440 try test__floatuntidf(0, 0.0);
454441
455442 try test__floatuntidf(1, 1.0);
......@@ -595,9 +582,6 @@ test "floatditf" {
595582}
596583
597584test "floatunditf" {
598 if (builtin.zig_backend == .stage2_x86_64 and
599 !comptime std.Target.x86.featureSetHasAll(builtin.cpu.features, .{ .bmi, .lzcnt })) return error.SkipZigTest;
600
601585 try test__floatunditf(0xffffffffffffffff, 0x403effffffffffff, 0xfffe000000000000);
602586 try test__floatunditf(0xfffffffffffffffe, 0x403effffffffffff, 0xfffc000000000000);
603587 try test__floatunditf(0x8000000000000000, 0x403e000000000000, 0x0);
......@@ -619,9 +603,6 @@ fn test__floatuntitf(a: u128, expected: f128) !void {
619603}
620604
621605test "floattitf" {
622 if (builtin.zig_backend == .stage2_x86_64 and
623 !comptime std.Target.x86.featureSetHasAll(builtin.cpu.features, .{ .bmi, .lzcnt })) return error.SkipZigTest;
624
625606 try test__floattitf(0, 0.0);
626607
627608 try test__floattitf(1, 1.0);
......@@ -704,9 +685,6 @@ test "floattitf" {
704685}
705686
706687test "floatuntitf" {
707 if (builtin.zig_backend == .stage2_x86_64 and
708 !comptime std.Target.x86.featureSetHasAll(builtin.cpu.features, .{ .bmi, .lzcnt })) return error.SkipZigTest;
709
710688 try test__floatuntitf(0, 0.0);
711689
712690 try test__floatuntitf(1, 1.0);
lib/compiler_rt/fma.zig-5
......@@ -6,10 +6,8 @@
66//! https://git.musl-libc.org/cgit/musl/tree/src/math/fma.c
77
88const std = @import("std");
9const builtin = @import("builtin");
109const math = std.math;
1110const expect = std.testing.expect;
12const arch = builtin.cpu.arch;
1311const common = @import("common.zig");
1412
1513pub const panic = common.panic;
......@@ -343,9 +341,6 @@ test "64" {
343341}
344342
345343test "128" {
346 if (builtin.zig_backend == .stage2_x86_64 and
347 !comptime std.Target.x86.featureSetHasAll(builtin.cpu.features, .{ .bmi, .lzcnt })) return error.SkipZigTest;
348
349344 const epsilon = 0.000001;
350345
351346 try expect(math.approxEqAbs(f128, fmaq(0.0, 5.0, 9.124), 9.124, epsilon));
lib/compiler_rt/fmodx_test.zig+1-1
......@@ -24,7 +24,7 @@ fn test_fmodx_infs() !void {
2424
2525test "fmodx" {
2626 if (builtin.zig_backend == .stage2_x86_64 and
27 !comptime std.Target.x86.featureSetHasAll(builtin.cpu.features, .{ .bmi, .lzcnt })) return error.SkipZigTest;
27 !comptime std.Target.x86.featureSetHas(builtin.cpu.features, .lzcnt)) return error.SkipZigTest;
2828
2929 try test_fmodx(6.4, 4.0, 2.4);
3030 try test_fmodx(6.4, -4.0, 2.4);
lib/compiler_rt/mulf3_test.zig-4
......@@ -3,7 +3,6 @@
33// https://github.com/llvm/llvm-project/blob/2ffb1b0413efa9a24eb3c49e710e36f92e2cb50b/compiler-rt/test/builtins/Unit/multf3_test.c
44
55const std = @import("std");
6const builtin = @import("builtin");
76const math = std.math;
87const qnan128: f128 = @bitCast(@as(u128, 0x7fff800000000000) << 64);
98const inf128: f128 = @bitCast(@as(u128, 0x7fff000000000000) << 64);
......@@ -49,9 +48,6 @@ fn makeNaN128(rand: u64) f128 {
4948 return @bitCast(int_result);
5049}
5150test "multf3" {
52 if (builtin.zig_backend == .stage2_x86_64 and
53 !comptime std.Target.x86.featureSetHasAll(builtin.cpu.features, .{ .bmi, .lzcnt })) return error.SkipZigTest;
54
5551 // qNaN * any = qNaN
5652 try test__multf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0);
5753
lib/compiler_rt/udivmodei4.zig+2-4
......@@ -129,10 +129,8 @@ pub fn __umodei4(r_p: [*]u32, u_p: [*]const u32, v_p: [*]const u32, bits: usize)
129129}
130130
131131test "__udivei4/__umodei4" {
132 switch (builtin.zig_backend) {
133 .stage2_c, .stage2_x86_64 => return error.SkipZigTest,
134 else => {},
135 }
132 if (builtin.zig_backend == .stage2_c) return error.SkipZigTest;
133 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
136134
137135 const RndGen = std.rand.DefaultPrng;
138136 var rnd = RndGen.init(42);
lib/std/Build.zig+1
......@@ -2156,5 +2156,6 @@ pub fn hex64(x: u64) [16]u8 {
21562156}
21572157
21582158test {
2159 _ = Cache;
21592160 _ = Step;
21602161}
lib/std/Build/Cache.zig-8
......@@ -1007,8 +1007,6 @@ test "cache file and then recall it" {
10071007 return error.SkipZigTest;
10081008 }
10091009
1010 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1011
10121010 var tmp = testing.tmpDir(.{});
10131011 defer tmp.cleanup();
10141012
......@@ -1075,8 +1073,6 @@ test "check that changing a file makes cache fail" {
10751073 return error.SkipZigTest;
10761074 }
10771075
1078 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1079
10801076 var tmp = testing.tmpDir(.{});
10811077 defer tmp.cleanup();
10821078
......@@ -1151,8 +1147,6 @@ test "no file inputs" {
11511147 return error.SkipZigTest;
11521148 }
11531149
1154 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1155
11561150 var tmp = testing.tmpDir(.{});
11571151 defer tmp.cleanup();
11581152
......@@ -1201,8 +1195,6 @@ test "Manifest with files added after initial hash work" {
12011195 return error.SkipZigTest;
12021196 }
12031197
1204 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1205
12061198 var tmp = testing.tmpDir(.{});
12071199 defer tmp.cleanup();
12081200
lib/std/Thread/Condition.zig+2-2
......@@ -324,6 +324,8 @@ test "Condition - wait and signal" {
324324 return error.SkipZigTest;
325325 }
326326
327 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
328
327329 const num_threads = 4;
328330
329331 const MultiWait = struct {
......@@ -369,8 +371,6 @@ test "Condition - signal" {
369371 return error.SkipZigTest;
370372 }
371373
372 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
373
374374 const num_threads = 4;
375375
376376 const SignalTest = struct {
lib/std/Thread/Semaphore.zig+2
......@@ -39,6 +39,8 @@ test "Thread.Semaphore" {
3939 return error.SkipZigTest;
4040 }
4141
42 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
43
4244 const TestContext = struct {
4345 sem: *Semaphore,
4446 n: *i32,
lib/std/array_hash_map.zig+1-14
......@@ -1,5 +1,4 @@
11const std = @import("std.zig");
2const builtin = @import("builtin");
32const debug = std.debug;
43const assert = debug.assert;
54const testing = std.testing;
......@@ -2138,8 +2137,6 @@ test "ensure capacity leak" {
21382137}
21392138
21402139test "big map" {
2141 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
2142
21432140 var map = AutoArrayHashMap(i32, i32).init(std.testing.allocator);
21442141 defer map.deinit();
21452142
......@@ -2193,8 +2190,6 @@ test "big map" {
21932190}
21942191
21952192test "clone" {
2196 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
2197
21982193 var original = AutoArrayHashMap(i32, i32).init(std.testing.allocator);
21992194 defer original.deinit();
22002195
......@@ -2221,8 +2216,6 @@ test "clone" {
22212216}
22222217
22232218test "shrink" {
2224 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
2225
22262219 var map = AutoArrayHashMap(i32, i32).init(std.testing.allocator);
22272220 defer map.deinit();
22282221
......@@ -2263,8 +2256,6 @@ test "shrink" {
22632256}
22642257
22652258test "pop" {
2266 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
2267
22682259 var map = AutoArrayHashMap(i32, i32).init(std.testing.allocator);
22692260 defer map.deinit();
22702261
......@@ -2283,8 +2274,6 @@ test "pop" {
22832274}
22842275
22852276test "popOrNull" {
2286 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
2287
22882277 var map = AutoArrayHashMap(i32, i32).init(std.testing.allocator);
22892278 defer map.deinit();
22902279
......@@ -2305,7 +2294,7 @@ test "popOrNull" {
23052294}
23062295
23072296test "reIndex" {
2308 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
2297 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
23092298
23102299 var map = ArrayHashMap(i32, i32, AutoContext(i32), true).init(std.testing.allocator);
23112300 defer map.deinit();
......@@ -2351,8 +2340,6 @@ test "auto store_hash" {
23512340}
23522341
23532342test "sort" {
2354 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
2355
23562343 var map = AutoArrayHashMap(i32, i32).init(std.testing.allocator);
23572344 defer map.deinit();
23582345
lib/std/array_list.zig-11
......@@ -1,5 +1,4 @@
11const std = @import("std.zig");
2const builtin = @import("builtin");
32const debug = std.debug;
43const assert = debug.assert;
54const testing = std.testing;
......@@ -1184,8 +1183,6 @@ test "std.ArrayList/ArrayListUnmanaged.initCapacity" {
11841183}
11851184
11861185test "std.ArrayList/ArrayListUnmanaged.clone" {
1187 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1188
11891186 const a = testing.allocator;
11901187 {
11911188 var array = ArrayList(i32).init(a);
......@@ -1227,8 +1224,6 @@ test "std.ArrayList/ArrayListUnmanaged.clone" {
12271224}
12281225
12291226test "std.ArrayList/ArrayListUnmanaged.basic" {
1230 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1231
12321227 const a = testing.allocator;
12331228 {
12341229 var list = ArrayList(i32).init(a);
......@@ -1513,8 +1508,6 @@ test "std.ArrayList/ArrayListUnmanaged.insert" {
15131508}
15141509
15151510test "std.ArrayList/ArrayListUnmanaged.insertSlice" {
1516 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1517
15181511 const a = testing.allocator;
15191512 {
15201513 var list = ArrayList(i32).init(a);
......@@ -1561,8 +1554,6 @@ test "std.ArrayList/ArrayListUnmanaged.insertSlice" {
15611554}
15621555
15631556test "std.ArrayList/ArrayListUnmanaged.replaceRange" {
1564 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1565
15661557 var arena = std.heap.ArenaAllocator.init(testing.allocator);
15671558 defer arena.deinit();
15681559 const a = arena.allocator();
......@@ -1734,8 +1725,6 @@ test "shrink still sets length when resizing is disabled" {
17341725}
17351726
17361727test "shrinkAndFree with a copy" {
1737 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1738
17391728 var failing_allocator = testing.FailingAllocator.init(testing.allocator, .{ .resize_fail_index = 0 });
17401729 const a = failing_allocator.allocator();
17411730
lib/std/base64.zig-2
......@@ -363,8 +363,6 @@ test "base64" {
363363}
364364
365365test "base64 padding dest overflow" {
366 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
367
368366 const input = "foo";
369367
370368 var expect: [128]u8 = undefined;
lib/std/bit_set.zig+3-12
......@@ -1637,10 +1637,8 @@ fn testStaticBitSet(comptime Set: type) !void {
16371637}
16381638
16391639test "IntegerBitSet" {
1640 switch (builtin.zig_backend) {
1641 .stage2_c, .stage2_x86_64 => return error.SkipZigTest,
1642 else => {},
1643 }
1640 if (builtin.zig_backend == .stage2_c) return error.SkipZigTest;
1641 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
16441642
16451643 try testStaticBitSet(IntegerBitSet(0));
16461644 try testStaticBitSet(IntegerBitSet(1));
......@@ -1653,10 +1651,7 @@ test "IntegerBitSet" {
16531651}
16541652
16551653test "ArrayBitSet" {
1656 switch (builtin.zig_backend) {
1657 .stage2_x86_64 => return error.SkipZigTest,
1658 else => {},
1659 }
1654 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
16601655
16611656 inline for (.{ 0, 1, 2, 31, 32, 33, 63, 64, 65, 254, 500, 3000 }) |size| {
16621657 try testStaticBitSet(ArrayBitSet(u8, size));
......@@ -1668,8 +1663,6 @@ test "ArrayBitSet" {
16681663}
16691664
16701665test "DynamicBitSetUnmanaged" {
1671 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1672
16731666 const allocator = std.testing.allocator;
16741667 var a = try DynamicBitSetUnmanaged.initEmpty(allocator, 300);
16751668 try testing.expectEqual(@as(usize, 0), a.count());
......@@ -1723,8 +1716,6 @@ test "DynamicBitSetUnmanaged" {
17231716}
17241717
17251718test "DynamicBitSet" {
1726 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1727
17281719 const allocator = std.testing.allocator;
17291720 var a = try DynamicBitSet.initEmpty(allocator, 300);
17301721 try testing.expectEqual(@as(usize, 0), a.count());
lib/std/compress/deflate/huffman_code.zig-2
......@@ -360,8 +360,6 @@ fn byFreq(context: void, a: LiteralNode, b: LiteralNode) bool {
360360}
361361
362362test "generate a Huffman code from an array of frequencies" {
363 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
364
365363 var freqs: [19]u16 = [_]u16{
366364 8, // 0
367365 1, // 1
lib/std/compress/gzip.zig-2
......@@ -174,8 +174,6 @@ fn testReader(data: []const u8, comptime expected: []const u8) !void {
174174// https://tools.ietf.org/rfc/rfc1952.txt length=25037 bytes
175175// SHA256=164ef0897b4cbec63abf1b57f069f3599bd0fb7c72c2a4dee21bd7e03ec9af67
176176test "compressed data" {
177 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
178
179177 try testReader(
180178 @embedFile("testdata/rfc1952.txt.gz"),
181179 @embedFile("testdata/rfc1952.txt"),
lib/std/compress/zlib.zig-2
......@@ -199,8 +199,6 @@ fn testDecompress(data: []const u8, expected: []const u8) !void {
199199// https://tools.ietf.org/rfc/rfc1951.txt length=36944 bytes
200200// SHA256=5ebf4b5b7fe1c3a0c0ab9aa3ac8c0f3853a7dc484905e76e03b0b0f301350009
201201test "compressed data" {
202 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
203
204202 const rfc1951_txt = @embedFile("testdata/rfc1951.txt");
205203
206204 // Compressed with compression level = 0
lib/std/crypto.zig-2
......@@ -314,8 +314,6 @@ test "CSPRNG" {
314314}
315315
316316test "issue #4532: no index out of bounds" {
317 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
318
319317 const types = [_]type{
320318 hash.Md5,
321319 hash.Sha1,
lib/std/crypto/25519/x25519.zig-4
......@@ -137,8 +137,6 @@ test "x25519 rfc7748 one iteration" {
137137}
138138
139139test "x25519 rfc7748 1,000 iterations" {
140 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
141
142140 // These iteration tests are slow so we always skip them. Results have been verified.
143141 if (true) {
144142 return error.SkipZigTest;
......@@ -161,8 +159,6 @@ test "x25519 rfc7748 1,000 iterations" {
161159}
162160
163161test "x25519 rfc7748 1,000,000 iterations" {
164 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
165
166162 if (true) {
167163 return error.SkipZigTest;
168164 }
lib/std/crypto/aegis.zig-15
......@@ -17,7 +17,6 @@
1717//! https://datatracker.ietf.org/doc/draft-irtf-cfrg-aegis-aead/
1818
1919const std = @import("std");
20const builtin = @import("builtin");
2120const crypto = std.crypto;
2221const mem = std.mem;
2322const assert = std.debug.assert;
......@@ -514,8 +513,6 @@ const htest = @import("test.zig");
514513const testing = std.testing;
515514
516515test "Aegis128L test vector 1" {
517 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
518
519516 const key: [Aegis128L.key_length]u8 = [_]u8{ 0x10, 0x01 } ++ [_]u8{0x00} ** 14;
520517 const nonce: [Aegis128L.nonce_length]u8 = [_]u8{ 0x10, 0x00, 0x02 } ++ [_]u8{0x00} ** 13;
521518 const ad = [8]u8{ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07 };
......@@ -539,8 +536,6 @@ test "Aegis128L test vector 1" {
539536}
540537
541538test "Aegis128L test vector 2" {
542 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
543
544539 const key: [Aegis128L.key_length]u8 = [_]u8{0x00} ** 16;
545540 const nonce: [Aegis128L.nonce_length]u8 = [_]u8{0x00} ** 16;
546541 const ad = [_]u8{};
......@@ -558,8 +553,6 @@ test "Aegis128L test vector 2" {
558553}
559554
560555test "Aegis128L test vector 3" {
561 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
562
563556 const key: [Aegis128L.key_length]u8 = [_]u8{0x00} ** 16;
564557 const nonce: [Aegis128L.nonce_length]u8 = [_]u8{0x00} ** 16;
565558 const ad = [_]u8{};
......@@ -576,8 +569,6 @@ test "Aegis128L test vector 3" {
576569}
577570
578571test "Aegis256 test vector 1" {
579 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
580
581572 const key: [Aegis256.key_length]u8 = [_]u8{ 0x10, 0x01 } ++ [_]u8{0x00} ** 30;
582573 const nonce: [Aegis256.nonce_length]u8 = [_]u8{ 0x10, 0x00, 0x02 } ++ [_]u8{0x00} ** 29;
583574 const ad = [8]u8{ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07 };
......@@ -601,8 +592,6 @@ test "Aegis256 test vector 1" {
601592}
602593
603594test "Aegis256 test vector 2" {
604 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
605
606595 const key: [Aegis256.key_length]u8 = [_]u8{0x00} ** 32;
607596 const nonce: [Aegis256.nonce_length]u8 = [_]u8{0x00} ** 32;
608597 const ad = [_]u8{};
......@@ -620,8 +609,6 @@ test "Aegis256 test vector 2" {
620609}
621610
622611test "Aegis256 test vector 3" {
623 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
624
625612 const key: [Aegis256.key_length]u8 = [_]u8{0x00} ** 32;
626613 const nonce: [Aegis256.nonce_length]u8 = [_]u8{0x00} ** 32;
627614 const ad = [_]u8{};
......@@ -638,8 +625,6 @@ test "Aegis256 test vector 3" {
638625}
639626
640627test "Aegis MAC" {
641 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
642
643628 const key = [_]u8{0x00} ** Aegis128LMac.key_length;
644629 var msg: [64]u8 = undefined;
645630 for (&msg, 0..) |*m, i| {
lib/std/crypto/aes.zig+1-9
......@@ -6,7 +6,7 @@ const has_aesni = std.Target.x86.featureSetHas(builtin.cpu.features, .aes);
66const has_avx = std.Target.x86.featureSetHas(builtin.cpu.features, .avx);
77const has_armaes = std.Target.aarch64.featureSetHas(builtin.cpu.features, .aes);
88// C backend doesn't currently support passing vectors to inline asm.
9const impl = if (builtin.cpu.arch == .x86_64 and builtin.zig_backend != .stage2_c and has_aesni and has_avx) impl: {
9const impl = if (builtin.cpu.arch == .x86_64 and builtin.zig_backend != .stage2_c and builtin.zig_backend != .stage2_x86_64 and has_aesni and has_avx) impl: {
1010 break :impl @import("aes/aesni.zig");
1111} else if (builtin.cpu.arch == .aarch64 and builtin.zig_backend != .stage2_c and has_armaes)
1212impl: {
......@@ -55,8 +55,6 @@ test "ctr" {
5555}
5656
5757test "encrypt" {
58 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
59
6058 // Appendix B
6159 {
6260 const key = [_]u8{ 0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6, 0xab, 0xf7, 0x15, 0x88, 0x09, 0xcf, 0x4f, 0x3c };
......@@ -86,8 +84,6 @@ test "encrypt" {
8684}
8785
8886test "decrypt" {
89 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
90
9187 // Appendix B
9288 {
9389 const key = [_]u8{ 0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6, 0xab, 0xf7, 0x15, 0x88, 0x09, 0xcf, 0x4f, 0x3c };
......@@ -117,8 +113,6 @@ test "decrypt" {
117113}
118114
119115test "expand 128-bit key" {
120 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
121
122116 const key = [_]u8{ 0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6, 0xab, 0xf7, 0x15, 0x88, 0x09, 0xcf, 0x4f, 0x3c };
123117 const exp_enc = [_]*const [32:0]u8{
124118 "2b7e151628aed2a6abf7158809cf4f3c", "a0fafe1788542cb123a339392a6c7605", "f2c295f27a96b9435935807a7359f67f", "3d80477d4716fe3e1e237e446d7a883b", "ef44a541a8525b7fb671253bdb0bad00", "d4d1c6f87c839d87caf2b8bc11f915bc", "6d88a37a110b3efddbf98641ca0093fd", "4e54f70e5f5fc9f384a64fb24ea6dc4f", "ead27321b58dbad2312bf5607f8d292f", "ac7766f319fadc2128d12941575c006e", "d014f9a8c9ee2589e13f0cc8b6630ca6",
......@@ -141,8 +135,6 @@ test "expand 128-bit key" {
141135}
142136
143137test "expand 256-bit key" {
144 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
145
146138 const key = [_]u8{
147139 0x60, 0x3d, 0xeb, 0x10,
148140 0x15, 0xca, 0x71, 0xbe,
lib/std/crypto/aes_ocb.zig+8-16
......@@ -261,10 +261,8 @@ inline fn xorWith(x: *Block, y: Block) void {
261261const hexToBytes = std.fmt.hexToBytes;
262262
263263test "AesOcb test vector 1" {
264 switch (builtin.zig_backend) {
265 .stage2_c, .stage2_x86_64 => return error.SkipZigTest,
266 else => {},
267 }
264 if (builtin.zig_backend == .stage2_c) return error.SkipZigTest;
265 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
268266
269267 var k: [Aes128Ocb.key_length]u8 = undefined;
270268 var nonce: [Aes128Ocb.nonce_length]u8 = undefined;
......@@ -283,10 +281,8 @@ test "AesOcb test vector 1" {
283281}
284282
285283test "AesOcb test vector 2" {
286 switch (builtin.zig_backend) {
287 .stage2_c, .stage2_x86_64 => return error.SkipZigTest,
288 else => {},
289 }
284 if (builtin.zig_backend == .stage2_c) return error.SkipZigTest;
285 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
290286
291287 var k: [Aes128Ocb.key_length]u8 = undefined;
292288 var nonce: [Aes128Ocb.nonce_length]u8 = undefined;
......@@ -307,10 +303,8 @@ test "AesOcb test vector 2" {
307303}
308304
309305test "AesOcb test vector 3" {
310 switch (builtin.zig_backend) {
311 .stage2_c, .stage2_x86_64 => return error.SkipZigTest,
312 else => {},
313 }
306 if (builtin.zig_backend == .stage2_c) return error.SkipZigTest;
307 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
314308
315309 var k: [Aes128Ocb.key_length]u8 = undefined;
316310 var nonce: [Aes128Ocb.nonce_length]u8 = undefined;
......@@ -334,10 +328,8 @@ test "AesOcb test vector 3" {
334328}
335329
336330test "AesOcb test vector 4" {
337 switch (builtin.zig_backend) {
338 .stage2_c, .stage2_x86_64 => return error.SkipZigTest,
339 else => {},
340 }
331 if (builtin.zig_backend == .stage2_c) return error.SkipZigTest;
332 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
341333
342334 var k: [Aes128Ocb.key_length]u8 = undefined;
343335 var nonce: [Aes128Ocb.nonce_length]u8 = undefined;
lib/std/crypto/argon2.zig-10
......@@ -622,8 +622,6 @@ pub fn strVerify(
622622}
623623
624624test "argon2d" {
625 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
626
627625 const password = [_]u8{0x01} ** 32;
628626 const salt = [_]u8{0x02} ** 16;
629627 const secret = [_]u8{0x03} ** 8;
......@@ -649,8 +647,6 @@ test "argon2d" {
649647}
650648
651649test "argon2i" {
652 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
653
654650 const password = [_]u8{0x01} ** 32;
655651 const salt = [_]u8{0x02} ** 16;
656652 const secret = [_]u8{0x03} ** 8;
......@@ -676,8 +672,6 @@ test "argon2i" {
676672}
677673
678674test "argon2id" {
679 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
680
681675 const password = [_]u8{0x01} ** 32;
682676 const salt = [_]u8{0x02} ** 16;
683677 const secret = [_]u8{0x03} ** 8;
......@@ -703,8 +697,6 @@ test "argon2id" {
703697}
704698
705699test "kdf" {
706 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
707
708700 const password = "password";
709701 const salt = "somesalt";
710702
......@@ -936,8 +928,6 @@ test "password hash and password verify" {
936928}
937929
938930test "kdf derived key length" {
939 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
940
941931 const allocator = std.testing.allocator;
942932
943933 const password = "testpass";
lib/std/crypto/blake3.zig-2
......@@ -682,8 +682,6 @@ fn testBlake3(hasher: *Blake3, input_len: usize, expected_hex: [262]u8) !void {
682682}
683683
684684test "BLAKE3 reference test cases" {
685 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
686
687685 var hash_state = Blake3.init(.{});
688686 const hash = &hash_state;
689687 var keyed_hash_state = Blake3.init(.{ .key = reference_test.key.* });
lib/std/crypto/chacha20.zig-4
......@@ -759,8 +759,6 @@ fn XChaChaPoly1305(comptime rounds_nb: usize) type {
759759}
760760
761761test "chacha20 AEAD API" {
762 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
763
764762 const aeads = [_]type{ ChaCha20Poly1305, XChaCha20Poly1305 };
765763 const m = "Ladies and Gentlemen of the class of '99: If I could offer you only one tip for the future, sunscreen would be it.";
766764 const ad = "Additional data";
......@@ -782,8 +780,6 @@ test "chacha20 AEAD API" {
782780
783781// https://tools.ietf.org/html/rfc7539#section-2.4.2
784782test "crypto.chacha20 test vector sunscreen" {
785 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
786
787783 const expected_result = [_]u8{
788784 0x6e, 0x2e, 0x35, 0x9a, 0x25, 0x68, 0xf9, 0x80,
789785 0x41, 0xba, 0x07, 0x28, 0xdd, 0x0d, 0x69, 0x81,
lib/std/crypto/ghash_polyval.zig-2
......@@ -476,8 +476,6 @@ test "ghash2" {
476476}
477477
478478test "polyval" {
479 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
480
481479 const key = [_]u8{0x42} ** 16;
482480 const m = [_]u8{0x69} ** 256;
483481
lib/std/crypto/hash_composition.zig-2
......@@ -65,8 +65,6 @@ pub const Sha384oSha384 = Composition(sha2.Sha384, sha2.Sha384);
6565pub const Sha512oSha512 = Composition(sha2.Sha512, sha2.Sha512);
6666
6767test "Hash composition" {
68 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
69
7068 const Sha256 = sha2.Sha256;
7169 const msg = "test";
7270
lib/std/crypto/hkdf.zig-2
......@@ -72,8 +72,6 @@ pub fn Hkdf(comptime Hmac: type) type {
7272const htest = @import("test.zig");
7373
7474test "Hkdf" {
75 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
76
7775 const ikm = [_]u8{0x0b} ** 22;
7876 const salt = [_]u8{ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c };
7977 const context = [_]u8{ 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 0xf8, 0xf9 };
lib/std/crypto/kyber_d00.zig-28
......@@ -553,8 +553,6 @@ const inv_ntt_reductions = [_]i16{
553553};
554554
555555test "invNTTReductions bounds" {
556 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
557
558556 // Checks whether the reductions proposed by invNTTReductions
559557 // don't overflow during invNTT().
560558 var xs = [_]i32{1} ** 256; // start at |x| ≤ q
......@@ -658,8 +656,6 @@ fn montReduce(x: i32) i16 {
658656}
659657
660658test "Test montReduce" {
661 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
662
663659 var rnd = RndGen.init(0);
664660 for (0..1000) |_| {
665661 const bound = comptime @as(i32, Q) * (1 << 15);
......@@ -678,8 +674,6 @@ fn feToMont(x: i16) i16 {
678674}
679675
680676test "Test feToMont" {
681 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
682
683677 var x: i32 = -(1 << 15);
684678 while (x < 1 << 15) : (x += 1) {
685679 const y = feToMont(@as(i16, @intCast(x)));
......@@ -713,8 +707,6 @@ fn feBarrettReduce(x: i16) i16 {
713707}
714708
715709test "Test Barrett reduction" {
716 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
717
718710 var x: i32 = -(1 << 15);
719711 while (x < 1 << 15) : (x += 1) {
720712 var y1 = feBarrettReduce(@as(i16, @intCast(x)));
......@@ -735,8 +727,6 @@ fn csubq(x: i16) i16 {
735727}
736728
737729test "Test csubq" {
738 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
739
740730 var x: i32 = -29439;
741731 while (x < 1 << 15) : (x += 1) {
742732 const y1 = csubq(@as(i16, @intCast(x)));
......@@ -1476,8 +1466,6 @@ fn cmov(comptime len: usize, dst: *[len]u8, src: [len]u8, b: u1) void {
14761466}
14771467
14781468test "MulHat" {
1479 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1480
14811469 var rnd = RndGen.init(0);
14821470
14831471 for (0..100) |_| {
......@@ -1509,8 +1497,6 @@ test "MulHat" {
15091497}
15101498
15111499test "NTT" {
1512 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1513
15141500 var rnd = RndGen.init(0);
15151501
15161502 for (0..1000) |_| {
......@@ -1534,8 +1520,6 @@ test "NTT" {
15341520}
15351521
15361522test "Compression" {
1537 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1538
15391523 var rnd = RndGen.init(0);
15401524 inline for (.{ 1, 4, 5, 10, 11 }) |d| {
15411525 for (0..1000) |_| {
......@@ -1548,8 +1532,6 @@ test "Compression" {
15481532}
15491533
15501534test "noise" {
1551 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1552
15531535 var seed: [32]u8 = undefined;
15541536 for (&seed, 0..) |*s, i| {
15551537 s.* = @as(u8, @intCast(i));
......@@ -1596,8 +1578,6 @@ test "noise" {
15961578}
15971579
15981580test "uniform sampling" {
1599 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1600
16011581 var seed: [32]u8 = undefined;
16021582 for (&seed, 0..) |*s, i| {
16031583 s.* = @as(u8, @intCast(i));
......@@ -1631,8 +1611,6 @@ test "uniform sampling" {
16311611}
16321612
16331613test "Polynomial packing" {
1634 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1635
16361614 var rnd = RndGen.init(0);
16371615
16381616 for (0..1000) |_| {
......@@ -1642,8 +1620,6 @@ test "Polynomial packing" {
16421620}
16431621
16441622test "Test inner PKE" {
1645 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1646
16471623 var seed: [32]u8 = undefined;
16481624 var pt: [32]u8 = undefined;
16491625 for (&seed, &pt, 0..) |*s, *p, i| {
......@@ -1665,8 +1641,6 @@ test "Test inner PKE" {
16651641}
16661642
16671643test "Test happy flow" {
1668 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1669
16701644 var seed: [64]u8 = undefined;
16711645 for (&seed, 0..) |*s, i| {
16721646 s.* = @as(u8, @intCast(i));
......@@ -1693,8 +1667,6 @@ test "Test happy flow" {
16931667const sha2 = crypto.hash.sha2;
16941668
16951669test "NIST KAT test" {
1696 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1697
16981670 inline for (.{
16991671 .{ Kyber512, "e9c2bd37133fcb40772f81559f14b1f58dccd1c816701be9ba6214d43baf4547" },
17001672 .{ Kyber1024, "89248f2f33f7f4f7051729111f3049c409a933ec904aedadf035f30fa5646cd5" },
lib/std/crypto/pbkdf2.zig-15
......@@ -1,5 +1,4 @@
11const std = @import("std");
2const builtin = @import("builtin");
32const mem = std.mem;
43const maxInt = std.math.maxInt;
54const OutputTooLongError = std.crypto.errors.OutputTooLongError;
......@@ -152,8 +151,6 @@ const HmacSha1 = std.crypto.auth.hmac.HmacSha1;
152151// RFC 6070 PBKDF2 HMAC-SHA1 Test Vectors
153152
154153test "RFC 6070 one iteration" {
155 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
156
157154 const p = "password";
158155 const s = "salt";
159156 const c = 1;
......@@ -169,8 +166,6 @@ test "RFC 6070 one iteration" {
169166}
170167
171168test "RFC 6070 two iterations" {
172 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
173
174169 const p = "password";
175170 const s = "salt";
176171 const c = 2;
......@@ -186,8 +181,6 @@ test "RFC 6070 two iterations" {
186181}
187182
188183test "RFC 6070 4096 iterations" {
189 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
190
191184 const p = "password";
192185 const s = "salt";
193186 const c = 4096;
......@@ -203,8 +196,6 @@ test "RFC 6070 4096 iterations" {
203196}
204197
205198test "RFC 6070 16,777,216 iterations" {
206 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
207
208199 // These iteration tests are slow so we always skip them. Results have been verified.
209200 if (true) {
210201 return error.SkipZigTest;
......@@ -225,8 +216,6 @@ test "RFC 6070 16,777,216 iterations" {
225216}
226217
227218test "RFC 6070 multi-block salt and password" {
228 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
229
230219 const p = "passwordPASSWORDpassword";
231220 const s = "saltSALTsaltSALTsaltSALTsaltSALTsalt";
232221 const c = 4096;
......@@ -242,8 +231,6 @@ test "RFC 6070 multi-block salt and password" {
242231}
243232
244233test "RFC 6070 embedded NUL" {
245 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
246
247234 const p = "pass\x00word";
248235 const s = "sa\x00lt";
249236 const c = 4096;
......@@ -259,8 +246,6 @@ test "RFC 6070 embedded NUL" {
259246}
260247
261248test "Very large dk_len" {
262 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
263
264249 // This test allocates 8GB of memory and is expected to take several hours to run.
265250 if (true) {
266251 return error.SkipZigTest;
lib/std/crypto/phc_encoding.zig-4
......@@ -351,16 +351,12 @@ test "phc format - encoding/decoding" {
351351}
352352
353353test "phc format - empty input string" {
354 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
355
356354 const s = "";
357355 const v = deserialize(struct { alg_id: []const u8 }, s);
358356 try std.testing.expectError(Error.InvalidEncoding, v);
359357}
360358
361359test "phc format - hash without salt" {
362 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
363
364360 const s = "$scrypt";
365361 const v = deserialize(struct { alg_id: []const u8, hash: BinValue(16) }, s);
366362 try std.testing.expectError(Error.InvalidEncoding, v);
lib/std/crypto/salsa20.zig+1-7
......@@ -302,7 +302,7 @@ fn SalsaNonVecImpl(comptime rounds: comptime_int) type {
302302 };
303303}
304304
305const SalsaImpl = if (builtin.cpu.arch == .x86_64) SalsaVecImpl else SalsaNonVecImpl;
305const SalsaImpl = if (builtin.cpu.arch == .x86_64 and builtin.zig_backend != .stage2_x86_64) SalsaVecImpl else SalsaNonVecImpl;
306306
307307fn keyToWords(key: [32]u8) [8]u32 {
308308 var k: [8]u32 = undefined;
......@@ -555,8 +555,6 @@ pub const SealedBox = struct {
555555const htest = @import("test.zig");
556556
557557test "(x)salsa20" {
558 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
559
560558 const key = [_]u8{0x69} ** 32;
561559 const nonce = [_]u8{0x42} ** 8;
562560 const msg = [_]u8{0} ** 20;
......@@ -571,8 +569,6 @@ test "(x)salsa20" {
571569}
572570
573571test "xsalsa20poly1305" {
574 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
575
576572 var msg: [100]u8 = undefined;
577573 var msg2: [msg.len]u8 = undefined;
578574 var c: [msg.len]u8 = undefined;
......@@ -588,8 +584,6 @@ test "xsalsa20poly1305" {
588584}
589585
590586test "xsalsa20poly1305 secretbox" {
591 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
592
593587 var msg: [100]u8 = undefined;
594588 var msg2: [msg.len]u8 = undefined;
595589 var key: [XSalsa20Poly1305.key_length]u8 = undefined;
lib/std/crypto/scrypt.zig-5
......@@ -3,7 +3,6 @@
33// https://github.com/Tarsnap/scrypt
44
55const std = @import("std");
6const builtin = @import("builtin");
76const crypto = std.crypto;
87const fmt = std.fmt;
98const io = std.io;
......@@ -684,8 +683,6 @@ test "unix-scrypt" {
684683}
685684
686685test "crypt format" {
687 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
688
689686 const str = "$7$C6..../....SodiumChloride$kBGj9fHznVYFQMEn/qDCfrDevf9YDtcDdKvEqHJLV8D";
690687 const params = try crypt_format.deserialize(crypt_format.HashResult(32), str);
691688 var buf: [str.len]u8 = undefined;
......@@ -694,8 +691,6 @@ test "crypt format" {
694691}
695692
696693test "kdf fast" {
697 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
698
699694 const TestVector = struct {
700695 password: []const u8,
701696 salt: []const u8,
lib/std/crypto/sha2.zig-10
......@@ -406,16 +406,12 @@ fn Sha2x32(comptime params: Sha2Params32) type {
406406}
407407
408408test "sha224 single" {
409 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
410
411409 try htest.assertEqualHash(Sha224, "d14a028c2a3a2bc9476102bb288234c415a2b01f828ea62ac5b3e42f", "");
412410 try htest.assertEqualHash(Sha224, "23097d223405d8228642a477bda255b32aadbce4bda0b3f7e36c9da7", "abc");
413411 try htest.assertEqualHash(Sha224, "c97ca9a559850ce97a04a96def6d99a9e0e0e2ab14e6b8df265fc0b3", "abcdefghbcdefghicdefghijdefghijkefghijklfghijklmghijklmnhijklmnoijklmnopjklmnopqklmnopqrlmnopqrsmnopqrstnopqrstu");
414412}
415413
416414test "sha224 streaming" {
417 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
418
419415 var h = Sha224.init(.{});
420416 var out: [28]u8 = undefined;
421417
......@@ -436,16 +432,12 @@ test "sha224 streaming" {
436432}
437433
438434test "sha256 single" {
439 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
440
441435 try htest.assertEqualHash(Sha256, "e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", "");
442436 try htest.assertEqualHash(Sha256, "ba7816bf8f01cfea414140de5dae2223b00361a396177a9cb410ff61f20015ad", "abc");
443437 try htest.assertEqualHash(Sha256, "cf5b16a778af8380036ce59e7b0492370b249b11e8f07a51afac45037afee9d1", "abcdefghbcdefghicdefghijdefghijkefghijklfghijklmghijklmnhijklmnoijklmnopjklmnopqklmnopqrlmnopqrsmnopqrstnopqrstu");
444438}
445439
446440test "sha256 streaming" {
447 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
448
449441 var h = Sha256.init(.{});
450442 var out: [32]u8 = undefined;
451443
......@@ -466,8 +458,6 @@ test "sha256 streaming" {
466458}
467459
468460test "sha256 aligned final" {
469 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
470
471461 var block = [_]u8{0} ** Sha256.block_length;
472462 var out: [Sha256.digest_length]u8 = undefined;
473463
lib/std/fifo.zig-2
......@@ -505,8 +505,6 @@ test "LinearFifo(u8, .Dynamic)" {
505505}
506506
507507test "LinearFifo" {
508 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
509
510508 inline for ([_]type{ u1, u8, u16, u64 }) |T| {
511509 inline for ([_]LinearFifoBufferType{ LinearFifoBufferType{ .Static = 32 }, .Slice, .Dynamic }) |bt| {
512510 const FifoType = LinearFifo(T, bt);
lib/std/fmt.zig-2
......@@ -2751,8 +2751,6 @@ test "formatType max_depth" {
27512751}
27522752
27532753test "positional" {
2754 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
2755
27562754 try expectFmt("2 1 0", "{2} {1} {0}", .{ @as(usize, 0), @as(usize, 1), @as(usize, 2) });
27572755 try expectFmt("2 1 0", "{2} {1} {}", .{ @as(usize, 0), @as(usize, 1), @as(usize, 2) });
27582756 try expectFmt("0 0", "{0} {0}", .{@as(usize, 0)});
lib/std/fs.zig+6-6
......@@ -3244,15 +3244,15 @@ fn copy_file(fd_in: os.fd_t, fd_out: os.fd_t, maybe_size: ?u64) CopyFileRawError
32443244}
32453245
32463246test {
3247 if (builtin.zig_backend != .stage2_x86_64) {
3248 if (builtin.os.tag != .wasi) {
3249 _ = &makeDirAbsolute;
3250 _ = &makeDirAbsoluteZ;
3251 _ = &copyFileAbsolute;
3247 if (builtin.os.tag != .wasi) {
3248 _ = &makeDirAbsolute;
3249 _ = &makeDirAbsoluteZ;
3250 _ = &copyFileAbsolute;
3251 if (builtin.zig_backend != .stage2_x86_64) {
32523252 _ = &updateFileAbsolute;
32533253 }
3254 _ = &Dir.copyFile;
32553254 }
3255 _ = &Dir.copyFile;
32563256 _ = @import("fs/test.zig");
32573257 _ = @import("fs/path.zig");
32583258 _ = @import("fs/file.zig");
lib/std/fs/test.zig-98
......@@ -124,8 +124,6 @@ fn testWithAllSupportedPathTypes(test_func: anytype) !void {
124124}
125125
126126test "Dir.readLink" {
127 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
128
129127 try testWithAllSupportedPathTypes(struct {
130128 fn impl(ctx: *TestContext) !void {
131129 // Create some targets
......@@ -163,8 +161,6 @@ fn testReadLink(dir: Dir, target_path: []const u8, symlink_path: []const u8) !vo
163161}
164162
165163test "relative symlink to parent directory" {
166 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
167
168164 var tmp = tmpDir(.{});
169165 defer tmp.cleanup();
170166
......@@ -182,8 +178,6 @@ test "relative symlink to parent directory" {
182178}
183179
184180test "openDir" {
185 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
186
187181 try testWithAllSupportedPathTypes(struct {
188182 fn impl(ctx: *TestContext) !void {
189183 const allocator = ctx.arena.allocator();
......@@ -202,8 +196,6 @@ test "openDir" {
202196test "accessAbsolute" {
203197 if (builtin.os.tag == .wasi) return error.SkipZigTest;
204198
205 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
206
207199 var tmp = tmpDir(.{});
208200 defer tmp.cleanup();
209201
......@@ -222,8 +214,6 @@ test "accessAbsolute" {
222214test "openDirAbsolute" {
223215 if (builtin.os.tag == .wasi) return error.SkipZigTest;
224216
225 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
226
227217 var tmp = tmpDir(.{});
228218 defer tmp.cleanup();
229219
......@@ -262,8 +252,6 @@ test "openDir non-cwd parent .." {
262252 else => {},
263253 }
264254
265 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
266
267255 var tmp = tmpDir(.{});
268256 defer tmp.cleanup();
269257
......@@ -285,8 +273,6 @@ test "openDir non-cwd parent .." {
285273test "readLinkAbsolute" {
286274 if (builtin.os.tag == .wasi) return error.SkipZigTest;
287275
288 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
289
290276 var tmp = tmpDir(.{});
291277 defer tmp.cleanup();
292278
......@@ -337,8 +323,6 @@ fn testReadLinkAbsolute(target_path: []const u8, symlink_path: []const u8) !void
337323}
338324
339325test "Dir.Iterator" {
340 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
341
342326 var tmp_dir = tmpIterableDir(.{});
343327 defer tmp_dir.cleanup();
344328
......@@ -369,8 +353,6 @@ test "Dir.Iterator" {
369353}
370354
371355test "Dir.Iterator many entries" {
372 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
373
374356 var tmp_dir = tmpIterableDir(.{});
375357 defer tmp_dir.cleanup();
376358
......@@ -406,8 +388,6 @@ test "Dir.Iterator many entries" {
406388}
407389
408390test "Dir.Iterator twice" {
409 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
410
411391 var tmp_dir = tmpIterableDir(.{});
412392 defer tmp_dir.cleanup();
413393
......@@ -441,8 +421,6 @@ test "Dir.Iterator twice" {
441421}
442422
443423test "Dir.Iterator reset" {
444 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
445
446424 var tmp_dir = tmpIterableDir(.{});
447425 defer tmp_dir.cleanup();
448426
......@@ -479,8 +457,6 @@ test "Dir.Iterator reset" {
479457}
480458
481459test "Dir.Iterator but dir is deleted during iteration" {
482 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
483
484460 var tmp = std.testing.tmpDir(.{});
485461 defer tmp.cleanup();
486462
......@@ -523,8 +499,6 @@ fn contains(entries: *const std.ArrayList(IterableDir.Entry), el: IterableDir.En
523499test "Dir.realpath smoke test" {
524500 if (!comptime std.os.isGetFdPathSupportedOnTarget(builtin.os)) return error.SkipZigTest;
525501
526 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
527
528502 try testWithAllSupportedPathTypes(struct {
529503 fn impl(ctx: *TestContext) !void {
530504 const allocator = ctx.arena.allocator();
......@@ -575,8 +549,6 @@ test "Dir.realpath smoke test" {
575549}
576550
577551test "readAllAlloc" {
578 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
579
580552 var tmp_dir = tmpDir(.{});
581553 defer tmp_dir.cleanup();
582554
......@@ -613,8 +585,6 @@ test "Dir.statFile" {
613585 // TODO: Re-enable once https://github.com/ziglang/zig/issues/17034 is solved
614586 if (builtin.os.tag == .linux and builtin.link_libc and builtin.abi == .gnu) return error.SkipZigTest;
615587
616 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
617
618588 try testWithAllSupportedPathTypes(struct {
619589 fn impl(ctx: *TestContext) !void {
620590 const test_file_name = try ctx.transformPath("test_file");
......@@ -630,8 +600,6 @@ test "Dir.statFile" {
630600}
631601
632602test "directory operations on files" {
633 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
634
635603 try testWithAllSupportedPathTypes(struct {
636604 fn impl(ctx: *TestContext) !void {
637605 const test_file_name = try ctx.transformPath("test_file");
......@@ -661,8 +629,6 @@ test "file operations on directories" {
661629 // TODO: fix this test on FreeBSD. https://github.com/ziglang/zig/issues/1759
662630 if (builtin.os.tag == .freebsd) return error.SkipZigTest;
663631
664 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
665
666632 try testWithAllSupportedPathTypes(struct {
667633 fn impl(ctx: *TestContext) !void {
668634 const test_dir_name = try ctx.transformPath("test_dir");
......@@ -698,8 +664,6 @@ test "file operations on directories" {
698664}
699665
700666test "makeOpenPath parent dirs do not exist" {
701 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
702
703667 var tmp_dir = tmpDir(.{});
704668 defer tmp_dir.cleanup();
705669
......@@ -712,8 +676,6 @@ test "makeOpenPath parent dirs do not exist" {
712676}
713677
714678test "deleteDir" {
715 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
716
717679 try testWithAllSupportedPathTypes(struct {
718680 fn impl(ctx: *TestContext) !void {
719681 const test_dir_path = try ctx.transformPath("test_dir");
......@@ -735,8 +697,6 @@ test "deleteDir" {
735697}
736698
737699test "Dir.rename files" {
738 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
739
740700 try testWithAllSupportedPathTypes(struct {
741701 fn impl(ctx: *TestContext) !void {
742702 // Rename on Windows can hit intermittent AccessDenied errors
......@@ -779,8 +739,6 @@ test "Dir.rename files" {
779739}
780740
781741test "Dir.rename directories" {
782 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
783
784742 try testWithAllSupportedPathTypes(struct {
785743 fn impl(ctx: *TestContext) !void {
786744 // Rename on Windows can hit intermittent AccessDenied errors
......@@ -822,8 +780,6 @@ test "Dir.rename directory onto empty dir" {
822780 // TODO: Fix on Windows, see https://github.com/ziglang/zig/issues/6364
823781 if (builtin.os.tag == .windows) return error.SkipZigTest;
824782
825 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
826
827783 try testWithAllSupportedPathTypes(struct {
828784 fn impl(ctx: *TestContext) !void {
829785 const test_dir_path = try ctx.transformPath("test_dir");
......@@ -845,8 +801,6 @@ test "Dir.rename directory onto non-empty dir" {
845801 // TODO: Fix on Windows, see https://github.com/ziglang/zig/issues/6364
846802 if (builtin.os.tag == .windows) return error.SkipZigTest;
847803
848 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
849
850804 try testWithAllSupportedPathTypes(struct {
851805 fn impl(ctx: *TestContext) !void {
852806 const test_dir_path = try ctx.transformPath("test_dir");
......@@ -873,8 +827,6 @@ test "Dir.rename file <-> dir" {
873827 // TODO: Fix on Windows, see https://github.com/ziglang/zig/issues/6364
874828 if (builtin.os.tag == .windows) return error.SkipZigTest;
875829
876 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
877
878830 try testWithAllSupportedPathTypes(struct {
879831 fn impl(ctx: *TestContext) !void {
880832 const test_file_path = try ctx.transformPath("test_file");
......@@ -890,8 +842,6 @@ test "Dir.rename file <-> dir" {
890842}
891843
892844test "rename" {
893 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
894
895845 var tmp_dir1 = tmpDir(.{});
896846 defer tmp_dir1.cleanup();
897847
......@@ -914,8 +864,6 @@ test "rename" {
914864test "renameAbsolute" {
915865 if (builtin.os.tag == .wasi) return error.SkipZigTest;
916866
917 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
918
919867 var tmp_dir = tmpDir(.{});
920868 defer tmp_dir.cleanup();
921869
......@@ -974,8 +922,6 @@ test "openSelfExe" {
974922}
975923
976924test "makePath, put some files in it, deleteTree" {
977 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
978
979925 try testWithAllSupportedPathTypes(struct {
980926 fn impl(ctx: *TestContext) !void {
981927 const allocator = ctx.arena.allocator();
......@@ -992,8 +938,6 @@ test "makePath, put some files in it, deleteTree" {
992938}
993939
994940test "makePath, put some files in it, deleteTreeMinStackSize" {
995 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
996
997941 try testWithAllSupportedPathTypes(struct {
998942 fn impl(ctx: *TestContext) !void {
999943 const allocator = ctx.arena.allocator();
......@@ -1012,8 +956,6 @@ test "makePath, put some files in it, deleteTreeMinStackSize" {
1012956test "makePath in a directory that no longer exists" {
1013957 if (builtin.os.tag == .windows) return error.SkipZigTest; // Windows returns FileBusy if attempting to remove an open dir
1014958
1015 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1016
1017959 var tmp = tmpDir(.{});
1018960 defer tmp.cleanup();
1019961 try tmp.parent_dir.deleteTree(&tmp.sub_path);
......@@ -1045,8 +987,6 @@ fn testFilenameLimits(iterable_dir: IterableDir, maxed_filename: []const u8) !vo
1045987}
1046988
1047989test "max file name component lengths" {
1048 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1049
1050990 var tmp = tmpIterableDir(.{});
1051991 defer tmp.cleanup();
1052992
......@@ -1068,8 +1008,6 @@ test "max file name component lengths" {
10681008}
10691009
10701010test "writev, readv" {
1071 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1072
10731011 var tmp = tmpDir(.{});
10741012 defer tmp.cleanup();
10751013
......@@ -1112,8 +1050,6 @@ test "writev, readv" {
11121050}
11131051
11141052test "pwritev, preadv" {
1115 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1116
11171053 var tmp = tmpDir(.{});
11181054 defer tmp.cleanup();
11191055
......@@ -1155,8 +1091,6 @@ test "pwritev, preadv" {
11551091}
11561092
11571093test "access file" {
1158 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1159
11601094 try testWithAllSupportedPathTypes(struct {
11611095 fn impl(ctx: *TestContext) !void {
11621096 const dir_path = try ctx.transformPath("os_test_tmp");
......@@ -1173,8 +1107,6 @@ test "access file" {
11731107}
11741108
11751109test "sendfile" {
1176 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1177
11781110 var tmp = tmpDir(.{});
11791111 defer tmp.cleanup();
11801112
......@@ -1240,8 +1172,6 @@ test "sendfile" {
12401172}
12411173
12421174test "copyRangeAll" {
1243 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1244
12451175 var tmp = tmpDir(.{});
12461176 defer tmp.cleanup();
12471177
......@@ -1268,8 +1198,6 @@ test "copyRangeAll" {
12681198}
12691199
12701200test "copyFile" {
1271 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1272
12731201 try testWithAllSupportedPathTypes(struct {
12741202 fn impl(ctx: *TestContext) !void {
12751203 const data = "u6wj+JmdF3qHsFPE BUlH2g4gJCmEz0PP";
......@@ -1300,8 +1228,6 @@ fn expectFileContents(dir: Dir, file_path: []const u8, data: []const u8) !void {
13001228}
13011229
13021230test "AtomicFile" {
1303 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1304
13051231 try testWithAllSupportedPathTypes(struct {
13061232 fn impl(ctx: *TestContext) !void {
13071233 const allocator = ctx.arena.allocator();
......@@ -1328,8 +1254,6 @@ test "AtomicFile" {
13281254test "open file with exclusive nonblocking lock twice" {
13291255 if (builtin.os.tag == .wasi) return error.SkipZigTest;
13301256
1331 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1332
13331257 try testWithAllSupportedPathTypes(struct {
13341258 fn impl(ctx: *TestContext) !void {
13351259 const filename = try ctx.transformPath("file_nonblocking_lock_test.txt");
......@@ -1346,8 +1270,6 @@ test "open file with exclusive nonblocking lock twice" {
13461270test "open file with shared and exclusive nonblocking lock" {
13471271 if (builtin.os.tag == .wasi) return error.SkipZigTest;
13481272
1349 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1350
13511273 try testWithAllSupportedPathTypes(struct {
13521274 fn impl(ctx: *TestContext) !void {
13531275 const filename = try ctx.transformPath("file_nonblocking_lock_test.txt");
......@@ -1364,8 +1286,6 @@ test "open file with shared and exclusive nonblocking lock" {
13641286test "open file with exclusive and shared nonblocking lock" {
13651287 if (builtin.os.tag == .wasi) return error.SkipZigTest;
13661288
1367 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1368
13691289 try testWithAllSupportedPathTypes(struct {
13701290 fn impl(ctx: *TestContext) !void {
13711291 const filename = try ctx.transformPath("file_nonblocking_lock_test.txt");
......@@ -1380,8 +1300,6 @@ test "open file with exclusive and shared nonblocking lock" {
13801300}
13811301
13821302test "open file with exclusive lock twice, make sure second lock waits" {
1383 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1384
13851303 if (builtin.single_threaded) return error.SkipZigTest;
13861304
13871305 if (std.io.is_async) {
......@@ -1432,8 +1350,6 @@ test "open file with exclusive lock twice, make sure second lock waits" {
14321350test "open file with exclusive nonblocking lock twice (absolute paths)" {
14331351 if (builtin.os.tag == .wasi) return error.SkipZigTest;
14341352
1435 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1436
14371353 var random_bytes: [12]u8 = undefined;
14381354 std.crypto.random.bytes(&random_bytes);
14391355
......@@ -1468,8 +1384,6 @@ test "open file with exclusive nonblocking lock twice (absolute paths)" {
14681384test "walker" {
14691385 if (builtin.os.tag == .wasi and builtin.link_libc) return error.SkipZigTest;
14701386
1471 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1472
14731387 var tmp = tmpIterableDir(.{});
14741388 defer tmp.cleanup();
14751389
......@@ -1523,8 +1437,6 @@ test "walker" {
15231437test "walker without fully iterating" {
15241438 if (builtin.os.tag == .wasi and builtin.link_libc) return error.SkipZigTest;
15251439
1526 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1527
15281440 var tmp = tmpIterableDir(.{});
15291441 defer tmp.cleanup();
15301442
......@@ -1637,8 +1549,6 @@ test "chmod" {
16371549 if (builtin.os.tag == .windows or builtin.os.tag == .wasi)
16381550 return error.SkipZigTest;
16391551
1640 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1641
16421552 var tmp = tmpDir(.{});
16431553 defer tmp.cleanup();
16441554
......@@ -1661,8 +1571,6 @@ test "chown" {
16611571 if (builtin.os.tag == .windows or builtin.os.tag == .wasi)
16621572 return error.SkipZigTest;
16631573
1664 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1665
16661574 var tmp = tmpDir(.{});
16671575 defer tmp.cleanup();
16681576
......@@ -1678,8 +1586,6 @@ test "chown" {
16781586}
16791587
16801588test "File.Metadata" {
1681 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1682
16831589 var tmp = tmpDir(.{});
16841590 defer tmp.cleanup();
16851591
......@@ -1763,8 +1669,6 @@ test "delete a read-only file on windows" {
17631669 if (builtin.os.tag != .windows)
17641670 return error.SkipZigTest;
17651671
1766 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1767
17681672 var tmp = testing.tmpDir(.{});
17691673 defer tmp.cleanup();
17701674
......@@ -1795,8 +1699,6 @@ test "delete a read-only file on windows" {
17951699test "delete a setAsCwd directory on Windows" {
17961700 if (builtin.os.tag != .windows) return error.SkipZigTest;
17971701
1798 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1799
18001702 var tmp = tmpDir(.{});
18011703 // Set tmp dir as current working directory.
18021704 try tmp.dir.setAsCwd();
lib/std/hash/xxhash.zig-12
......@@ -862,8 +862,6 @@ test "xxhash3 iterative api" {
862862}
863863
864864test "xxhash64" {
865 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
866
867865 const H = XxHash64;
868866 try testExpect(H, 0, "", 0xef46db3751d8e999);
869867 try testExpect(H, 0, "a", 0xd24ec4f1a98c6e5b);
......@@ -875,8 +873,6 @@ test "xxhash64" {
875873}
876874
877875test "xxhash64 smhasher" {
878 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
879
880876 const Test = struct {
881877 fn do() !void {
882878 try expectEqual(verify.smhasher(XxHash64.hash), 0x024B7CF4);
......@@ -888,8 +884,6 @@ test "xxhash64 smhasher" {
888884}
889885
890886test "xxhash64 iterative api" {
891 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
892
893887 const Test = struct {
894888 fn do() !void {
895889 try verify.iterativeApi(XxHash64);
......@@ -901,8 +895,6 @@ test "xxhash64 iterative api" {
901895}
902896
903897test "xxhash32" {
904 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
905
906898 const H = XxHash32;
907899
908900 try testExpect(H, 0, "", 0x02cc5d05);
......@@ -915,8 +907,6 @@ test "xxhash32" {
915907}
916908
917909test "xxhash32 smhasher" {
918 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
919
920910 const Test = struct {
921911 fn do() !void {
922912 try expectEqual(verify.smhasher(XxHash32.hash), 0xBA88B743);
......@@ -928,8 +918,6 @@ test "xxhash32 smhasher" {
928918}
929919
930920test "xxhash32 iterative api" {
931 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
932
933921 const Test = struct {
934922 fn do() !void {
935923 try verify.iterativeApi(XxHash32);
lib/std/hash_map.zig-2
......@@ -1873,8 +1873,6 @@ test "std.hash_map multiple removes on same metadata" {
18731873}
18741874
18751875test "std.hash_map put and remove loop in random order" {
1876 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1877
18781876 var map = AutoHashMap(u32, u32).init(std.testing.allocator);
18791877 defer map.deinit();
18801878
lib/std/heap/general_purpose_allocator.zig-4
......@@ -1042,8 +1042,6 @@ const TraceKind = enum {
10421042const test_config = Config{};
10431043
10441044test "small allocations - free in same order" {
1045 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1046
10471045 var gpa = GeneralPurposeAllocator(test_config){};
10481046 defer std.testing.expect(gpa.deinit() == .ok) catch @panic("leak");
10491047 const allocator = gpa.allocator();
......@@ -1063,8 +1061,6 @@ test "small allocations - free in same order" {
10631061}
10641062
10651063test "small allocations - free in reverse order" {
1066 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
1067
10681064 var gpa = GeneralPurposeAllocator(test_config){};
10691065 defer std.testing.expect(gpa.deinit() == .ok) catch @panic("leak");
10701066 const allocator = gpa.allocator();
lib/std/http/Client.zig-2
......@@ -491,8 +491,6 @@ pub const Response = struct {
491491 }
492492
493493 test parseInt3 {
494 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
495
496494 const expectEqual = testing.expectEqual;
497495 try expectEqual(@as(u10, 0), parseInt3("000".*));
498496 try expectEqual(@as(u10, 418), parseInt3("418".*));
lib/std/io/multi_writer.zig-1
......@@ -36,7 +36,6 @@ pub fn multiWriter(streams: anytype) MultiWriter(@TypeOf(streams)) {
3636const testing = std.testing;
3737
3838test "MultiWriter" {
39 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
4039 var tmp = testing.tmpDir(.{});
4140 defer tmp.cleanup();
4241 var f = try tmp.dir.createFile("t.txt", .{});
lib/std/io/test.zig-6
......@@ -15,8 +15,6 @@ const native_endian = builtin.target.cpu.arch.endian();
1515const tmpDir = std.testing.tmpDir;
1616
1717test "write a file, read it, then delete it" {
18 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
19
2018 var tmp = tmpDir(.{});
2119 defer tmp.cleanup();
2220
......@@ -110,8 +108,6 @@ test "BitStreams with File Stream" {
110108}
111109
112110test "File seek ops" {
113 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
114
115111 var tmp = tmpDir(.{});
116112 defer tmp.cleanup();
117113
......@@ -139,8 +135,6 @@ test "File seek ops" {
139135}
140136
141137test "setEndPos" {
142 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
143
144138 var tmp = tmpDir(.{});
145139 defer tmp.cleanup();
146140
lib/std/json.zig-4
......@@ -38,8 +38,6 @@ test parseFromSlice {
3838}
3939
4040test Value {
41 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
42
4341 var parsed = try parseFromSlice(Value, testing.allocator, "{\"anything\": \"goes\"}", .{});
4442 defer parsed.deinit();
4543 try testing.expectEqualSlices(u8, "goes", parsed.value.object.get("anything").?.string);
......@@ -65,8 +63,6 @@ test writeStream {
6563}
6664
6765test stringify {
68 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
69
7066 var out = ArrayList(u8).init(testing.allocator);
7167 defer out.deinit();
7268
lib/std/json/JSONTestSuite_test.zig-66
......@@ -104,8 +104,6 @@ test "i_string_utf16LE_no_BOM.json" {
104104 try any("[\x00\"\x00\xe9\x00\"\x00]\x00");
105105}
106106test "i_structure_500_nested_arrays.json" {
107 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
108
109107 try any("[" ** 500 ++ "]" ** 500);
110108}
111109test "i_structure_UTF-8_BOM_empty_object.json" {
......@@ -361,21 +359,15 @@ test "n_object_bracket_key.json" {
361359 try err("{[: \"x\"}\n");
362360}
363361test "n_object_comma_instead_of_colon.json" {
364 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
365
366362 try err("{\"x\", null}");
367363}
368364test "n_object_double_colon.json" {
369 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
370
371365 try err("{\"x\"::\"b\"}");
372366}
373367test "n_object_emoji.json" {
374368 try err("{\xf0\x9f\x87\xa8\xf0\x9f\x87\xad}");
375369}
376370test "n_object_garbage_at_end.json" {
377 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
378
379371 try err("{\"a\":\"a\" 123}");
380372}
381373test "n_object_key_with_single_quotes.json" {
......@@ -385,26 +377,18 @@ test "n_object_lone_continuation_byte_in_key_and_trailing_comma.json" {
385377 try err("{\"\xb9\":\"0\",}");
386378}
387379test "n_object_missing_colon.json" {
388 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
389
390380 try err("{\"a\" b}");
391381}
392382test "n_object_missing_key.json" {
393383 try err("{:\"b\"}");
394384}
395385test "n_object_missing_semicolon.json" {
396 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
397
398386 try err("{\"a\" \"b\"}");
399387}
400388test "n_object_missing_value.json" {
401 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
402
403389 try err("{\"a\":");
404390}
405391test "n_object_no-colon.json" {
406 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
407
408392 try err("{\"a\"");
409393}
410394test "n_object_non_string_key.json" {
......@@ -417,59 +401,39 @@ test "n_object_repeated_null_null.json" {
417401 try err("{null:null,null:null}");
418402}
419403test "n_object_several_trailing_commas.json" {
420 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
421
422404 try err("{\"id\":0,,,,,}");
423405}
424406test "n_object_single_quote.json" {
425407 try err("{'a':0}");
426408}
427409test "n_object_trailing_comma.json" {
428 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
429
430410 try err("{\"id\":0,}");
431411}
432412test "n_object_trailing_comment.json" {
433 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
434
435413 try err("{\"a\":\"b\"}/**/");
436414}
437415test "n_object_trailing_comment_open.json" {
438 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
439
440416 try err("{\"a\":\"b\"}/**//");
441417}
442418test "n_object_trailing_comment_slash_open.json" {
443 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
444
445419 try err("{\"a\":\"b\"}//");
446420}
447421test "n_object_trailing_comment_slash_open_incomplete.json" {
448 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
449
450422 try err("{\"a\":\"b\"}/");
451423}
452424test "n_object_two_commas_in_a_row.json" {
453 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
454
455425 try err("{\"a\":\"b\",,\"c\":\"d\"}");
456426}
457427test "n_object_unquoted_key.json" {
458428 try err("{a: \"b\"}");
459429}
460430test "n_object_unterminated-value.json" {
461 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
462
463431 try err("{\"a\":\"a");
464432}
465433test "n_object_with_single_string.json" {
466 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
467
468434 try err("{ \"foo\" : \"bar\", \"a\" }");
469435}
470436test "n_object_with_trailing_garbage.json" {
471 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
472
473437 try err("{\"a\":\"b\"}#");
474438}
475439test "n_single_space.json" {
......@@ -596,8 +560,6 @@ test "n_structure_close_unopened_array.json" {
596560 try err("1]");
597561}
598562test "n_structure_comma_instead_of_closing_brace.json" {
599 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
600
601563 try err("{\"x\": true,");
602564}
603565test "n_structure_double_array.json" {
......@@ -628,18 +590,12 @@ test "n_structure_object_followed_by_closing_object.json" {
628590 try err("{}}");
629591}
630592test "n_structure_object_unclosed_no_value.json" {
631 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
632
633593 try err("{\"\":");
634594}
635595test "n_structure_object_with_comment.json" {
636 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
637
638596 try err("{\"a\":/*comment*/\"b\"}");
639597}
640598test "n_structure_object_with_trailing_garbage.json" {
641 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
642
643599 try err("{\"a\": true} \"x\"");
644600}
645601test "n_structure_open_array_apostrophe.json" {
......@@ -649,8 +605,6 @@ test "n_structure_open_array_comma.json" {
649605 try err("[,");
650606}
651607test "n_structure_open_array_object.json" {
652 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
653
654608 try err("[{\"\":" ** 50000 ++ "\n");
655609}
656610test "n_structure_open_array_open_object.json" {
......@@ -690,8 +644,6 @@ test "n_structure_single_star.json" {
690644 try err("*");
691645}
692646test "n_structure_trailing_#.json" {
693 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
694
695647 try err("{\"a\":\"b\"}#{}");
696648}
697649test "n_structure_uescaped_LF_before_string.json" {
......@@ -710,8 +662,6 @@ test "n_structure_unclosed_array_unfinished_true.json" {
710662 try err("[ false, tru");
711663}
712664test "n_structure_unclosed_object.json" {
713 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
714
715665 try err("{\"asd\":\"asd\"");
716666}
717667test "n_structure_unicode-identifier.json" {
......@@ -819,31 +769,21 @@ test "y_object.json" {
819769 try ok("{\"asd\":\"sdf\", \"dfg\":\"fgh\"}");
820770}
821771test "y_object_basic.json" {
822 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
823
824772 try ok("{\"asd\":\"sdf\"}");
825773}
826774test "y_object_duplicated_key.json" {
827 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
828
829775 try ok("{\"a\":\"b\",\"a\":\"c\"}");
830776}
831777test "y_object_duplicated_key_and_value.json" {
832 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
833
834778 try ok("{\"a\":\"b\",\"a\":\"b\"}");
835779}
836780test "y_object_empty.json" {
837781 try ok("{}");
838782}
839783test "y_object_empty_key.json" {
840 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
841
842784 try ok("{\"\":0}");
843785}
844786test "y_object_escaped_null_in_key.json" {
845 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
846
847787 try ok("{\"foo\\u0000bar\": 42}");
848788}
849789test "y_object_extreme_numbers.json" {
......@@ -857,18 +797,12 @@ test "y_object_long_strings.json" {
857797 try ok("{\"x\":[{\"id\": \"xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx\"}], \"id\": \"xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx\"}");
858798}
859799test "y_object_simple.json" {
860 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
861
862800 try ok("{\"a\":[]}");
863801}
864802test "y_object_string_unicode.json" {
865 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
866
867803 try ok("{\"title\":\"\\u041f\\u043e\\u043b\\u0442\\u043e\\u0440\\u0430 \\u0417\\u0435\\u043c\\u043b\\u0435\\u043a\\u043e\\u043f\\u0430\" }");
868804}
869805test "y_object_with_newlines.json" {
870 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
871
872806 try ok("{\n\"a\": \"b\"\n}");
873807}
874808test "y_string_1_2_3_bytes_UTF-8_sequences.json" {
lib/std/json/dynamic_test.zig-12
......@@ -125,16 +125,12 @@ fn testParse(allocator: std.mem.Allocator, json_str: []const u8) !Value {
125125}
126126
127127test "parsing empty string gives appropriate error" {
128 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
129
130128 var arena_allocator = std.heap.ArenaAllocator.init(std.testing.allocator);
131129 defer arena_allocator.deinit();
132130 try testing.expectError(error.UnexpectedEndOfInput, testParse(arena_allocator.allocator(), ""));
133131}
134132
135133test "Value.array allocator should still be usable after parsing" {
136 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
137
138134 var parsed = try parseFromSlice(Value, std.testing.allocator, "[]", .{});
139135 defer parsed.deinit();
140136
......@@ -195,8 +191,6 @@ test "escaped characters" {
195191}
196192
197193test "Value.jsonStringify" {
198 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
199
200194 var vals = [_]Value{
201195 .{ .integer = 1 },
202196 .{ .integer = 2 },
......@@ -263,8 +257,6 @@ test "parseFromValue(std.json.Value,...)" {
263257}
264258
265259test "polymorphic parsing" {
266 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
267
268260 if (true) return error.SkipZigTest; // See https://github.com/ziglang/zig/issues/16108
269261 const doc =
270262 \\{ "type": "div",
......@@ -310,8 +302,6 @@ test "polymorphic parsing" {
310302}
311303
312304test "long object value" {
313 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
314
315305 const value = "01234567890123456789";
316306 const doc = "{\"key\":\"" ++ value ++ "\"}";
317307 var fbs = std.io.fixedBufferStream(doc);
......@@ -324,8 +314,6 @@ test "long object value" {
324314}
325315
326316test "ParseOptions.max_value_len" {
327 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
328
329317 var arena = ArenaAllocator.init(testing.allocator);
330318 defer arena.deinit();
331319
lib/std/json/static_test.zig-6
......@@ -392,8 +392,6 @@ test "parse" {
392392}
393393
394394test "parse into enum" {
395 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
396
397395 const T = enum(u32) {
398396 Foo = 42,
399397 Bar,
......@@ -478,8 +476,6 @@ test "parse into tagged union errors" {
478476}
479477
480478test "parse into struct with no fields" {
481 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
482
483479 const T = struct {};
484480 const parsed = try parseFromSlice(T, testing.allocator, "{}", .{});
485481 defer parsed.deinit();
......@@ -949,8 +945,6 @@ test "json parse allocate when streaming" {
949945}
950946
951947test "parse at comptime" {
952 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
953
954948 const doc =
955949 \\{
956950 \\ "vals": {
lib/std/json/stringify_test.zig-36
......@@ -100,8 +100,6 @@ fn getJsonObject(allocator: std.mem.Allocator) !Value {
100100}
101101
102102test "stringify null optional fields" {
103 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
104
105103 const MyStruct = struct {
106104 optional: ?[]const u8 = null,
107105 required: []const u8 = "something",
......@@ -123,8 +121,6 @@ test "stringify null optional fields" {
123121}
124122
125123test "stringify basic types" {
126 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
127
128124 try testStringify("false", false, .{});
129125 try testStringify("true", true, .{});
130126 try testStringify("null", @as(?u8, null), .{});
......@@ -141,8 +137,6 @@ test "stringify basic types" {
141137}
142138
143139test "stringify string" {
144 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
145
146140 try testStringify("\"hello\"", "hello", .{});
147141 try testStringify("\"with\\nescapes\\r\"", "with\nescapes\r", .{});
148142 try testStringify("\"with\\nescapes\\r\"", "with\nescapes\r", .{ .escape_unicode = true });
......@@ -167,16 +161,12 @@ test "stringify string" {
167161}
168162
169163test "stringify many-item sentinel-terminated string" {
170 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
171
172164 try testStringify("\"hello\"", @as([*:0]const u8, "hello"), .{});
173165 try testStringify("\"with\\nescapes\\r\"", @as([*:0]const u8, "with\nescapes\r"), .{ .escape_unicode = true });
174166 try testStringify("\"with unicode\\u0001\"", @as([*:0]const u8, "with unicode\u{1}"), .{ .escape_unicode = true });
175167}
176168
177169test "stringify enums" {
178 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
179
180170 const E = enum {
181171 foo,
182172 bar,
......@@ -186,15 +176,11 @@ test "stringify enums" {
186176}
187177
188178test "stringify enum literals" {
189 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
190
191179 try testStringify("\"foo\"", .foo, .{});
192180 try testStringify("\"bar\"", .bar, .{});
193181}
194182
195183test "stringify tagged unions" {
196 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
197
198184 const T = union(enum) {
199185 nothing,
200186 foo: u32,
......@@ -206,8 +192,6 @@ test "stringify tagged unions" {
206192}
207193
208194test "stringify struct" {
209 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
210
211195 try testStringify("{\"foo\":42}", struct {
212196 foo: u32,
213197 }{ .foo = 42 }, .{});
......@@ -230,8 +214,6 @@ test "emit_strings_as_arrays" {
230214}
231215
232216test "stringify struct with indentation" {
233 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
234
235217 try testStringify(
236218 \\{
237219 \\ "foo": 42,
......@@ -277,8 +259,6 @@ test "stringify struct with indentation" {
277259}
278260
279261test "stringify struct with void field" {
280 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
281
282262 try testStringify("{\"foo\":42}", struct {
283263 foo: u32,
284264 bar: void = {},
......@@ -286,8 +266,6 @@ test "stringify struct with void field" {
286266}
287267
288268test "stringify array of structs" {
289 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
290
291269 const MyStruct = struct {
292270 foo: u32,
293271 };
......@@ -299,8 +277,6 @@ test "stringify array of structs" {
299277}
300278
301279test "stringify struct with custom stringifier" {
302 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
303
304280 try testStringify("[\"something special\",42]", struct {
305281 foo: u32,
306282 const Self = @This();
......@@ -315,16 +291,12 @@ test "stringify struct with custom stringifier" {
315291}
316292
317293test "stringify vector" {
318 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
319
320294 try testStringify("[1,1]", @as(@Vector(2, u32), @splat(1)), .{});
321295 try testStringify("\"AA\"", @as(@Vector(2, u8), @splat('A')), .{});
322296 try testStringify("[65,65]", @as(@Vector(2, u8), @splat('A')), .{ .emit_strings_as_arrays = true });
323297}
324298
325299test "stringify tuple" {
326 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
327
328300 try testStringify("[\"foo\",42]", std.meta.Tuple(&.{ []const u8, usize }){ "foo", 42 }, .{});
329301}
330302
......@@ -411,8 +383,6 @@ fn testStringifyArbitraryDepth(expected: []const u8, value: anytype, options: St
411383}
412384
413385test "stringify alloc" {
414 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
415
416386 const allocator = std.testing.allocator;
417387 const expected =
418388 \\{"foo":"bar","answer":42,"my_friend":"sammy"}
......@@ -424,8 +394,6 @@ test "stringify alloc" {
424394}
425395
426396test "comptime stringify" {
427 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
428
429397 comptime testStringifyMaxDepth("false", false, .{}, null) catch unreachable;
430398 comptime testStringifyMaxDepth("false", false, .{}, 0) catch unreachable;
431399 comptime testStringifyArbitraryDepth("false", false, .{}) catch unreachable;
......@@ -446,8 +414,6 @@ test "comptime stringify" {
446414}
447415
448416test "print" {
449 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
450
451417 var out_buf: [1024]u8 = undefined;
452418 var slice_stream = std.io.fixedBufferStream(&out_buf);
453419 const out = slice_stream.writer();
......@@ -479,8 +445,6 @@ test "print" {
479445}
480446
481447test "nonportable numbers" {
482 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
483
484448 try testStringify("9999999999999999", 9999999999999999, .{});
485449 try testStringify("\"9999999999999999\"", 9999999999999999, .{ .emit_nonportable_numbers_as_strings = true });
486450}
lib/std/json/test.zig+1-4
......@@ -1,5 +1,4 @@
11const std = @import("std");
2const builtin = @import("builtin");
32const testing = std.testing;
43const parseFromSlice = @import("./static.zig").parseFromSlice;
54const validate = @import("./scanner.zig").validate;
......@@ -35,15 +34,13 @@ fn testHighLevelDynamicParser(s: []const u8) !void {
3534
3635// Additional tests not part of test JSONTestSuite.
3736test "y_trailing_comma_after_empty" {
38 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
37 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
3938
4039 try roundTrip(
4140 \\{"1":[],"2":{},"3":"4"}
4241 );
4342}
4443test "n_object_closed_missing_value" {
45 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
46
4744 try err(
4845 \\{"a":}
4946 );
lib/std/math.zig+2-2
......@@ -903,12 +903,12 @@ pub fn mod(comptime T: type, numerator: T, denominator: T) !T {
903903}
904904
905905test "mod" {
906 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
907
906908 try testMod();
907909 try comptime testMod();
908910}
909911fn testMod() !void {
910 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
911
912912 try testing.expect((mod(i32, -5, 3) catch unreachable) == 1);
913913 try testing.expect((mod(i32, 5, 3) catch unreachable) == 2);
914914 try testing.expectError(error.NegativeDenominator, mod(i32, 10, -1));
lib/std/math/big/int_test.zig+5-51
......@@ -71,8 +71,6 @@ test "big.int set negative minimum" {
7171}
7272
7373test "big.int set double-width maximum then zero" {
74 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
75
7674 var a = try Managed.initSet(testing.allocator, maxInt(DoubleLimb));
7775 defer a.deinit();
7876 try a.set(@as(DoubleLimb, 0));
......@@ -246,8 +244,6 @@ test "big.int fits" {
246244}
247245
248246test "big.int string set" {
249 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
250
251247 var a = try Managed.init(testing.allocator);
252248 defer a.deinit();
253249
......@@ -264,8 +260,6 @@ test "big.int string negative" {
264260}
265261
266262test "big.int string set number with underscores" {
267 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
268
269263 var a = try Managed.init(testing.allocator);
270264 defer a.deinit();
271265
......@@ -274,8 +268,6 @@ test "big.int string set number with underscores" {
274268}
275269
276270test "big.int string set case insensitive number" {
277 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
278
279271 var a = try Managed.init(testing.allocator);
280272 defer a.deinit();
281273
......@@ -326,8 +318,6 @@ test "big.int twos complement limit set" {
326318}
327319
328320test "big.int string to" {
329 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
330
331321 var a = try Managed.initSet(testing.allocator, 120317241209124781241290847124);
332322 defer a.deinit();
333323
......@@ -368,8 +358,6 @@ test "big.int string to base 16" {
368358}
369359
370360test "big.int neg string to" {
371 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
372
373361 var a = try Managed.initSet(testing.allocator, -123907434);
374362 defer a.deinit();
375363
......@@ -392,8 +380,6 @@ test "big.int zero string to" {
392380}
393381
394382test "big.int clone" {
395 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
396
397383 var a = try Managed.initSet(testing.allocator, 1234);
398384 defer a.deinit();
399385 var b = try a.clone();
......@@ -634,8 +620,6 @@ test "big.int addWrap single-single, unsigned" {
634620}
635621
636622test "big.int subWrap single-single, unsigned" {
637 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
638
639623 var a = try Managed.initSet(testing.allocator, 0);
640624 defer a.deinit();
641625
......@@ -963,8 +947,6 @@ test "big.int mul multi-multi" {
963947}
964948
965949test "big.int mul alias r with a" {
966 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
967
968950 var a = try Managed.initSet(testing.allocator, maxInt(Limb));
969951 defer a.deinit();
970952 var b = try Managed.initSet(testing.allocator, 2);
......@@ -976,8 +958,6 @@ test "big.int mul alias r with a" {
976958}
977959
978960test "big.int mul alias r with b" {
979 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
980
981961 var a = try Managed.initSet(testing.allocator, maxInt(Limb));
982962 defer a.deinit();
983963 var b = try Managed.initSet(testing.allocator, 2);
......@@ -989,8 +969,6 @@ test "big.int mul alias r with b" {
989969}
990970
991971test "big.int mul alias r with a and b" {
992 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
993
994972 var a = try Managed.initSet(testing.allocator, maxInt(Limb));
995973 defer a.deinit();
996974
......@@ -1096,7 +1074,7 @@ test "big.int mulWrap multi-multi unsigned" {
10961074
10971075test "big.int mulWrap multi-multi signed" {
10981076 switch (builtin.zig_backend) {
1099 .stage2_c, .stage2_x86_64 => return error.SkipZigTest,
1077 .stage2_c => return error.SkipZigTest,
11001078 else => {},
11011079 }
11021080
......@@ -1171,8 +1149,6 @@ test "big.int div single-half with rem" {
11711149}
11721150
11731151test "big.int div single-single no rem" {
1174 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1175
11761152 // assumes usize is <= 64 bits.
11771153 var a = try Managed.initSet(testing.allocator, 1 << 52);
11781154 defer a.deinit();
......@@ -1190,8 +1166,6 @@ test "big.int div single-single no rem" {
11901166}
11911167
11921168test "big.int div single-single with rem" {
1193 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1194
11951169 var a = try Managed.initSet(testing.allocator, (1 << 52) | (1 << 33));
11961170 defer a.deinit();
11971171 var b = try Managed.initSet(testing.allocator, (1 << 35));
......@@ -1271,8 +1245,6 @@ test "big.int div multi>2-single" {
12711245}
12721246
12731247test "big.int div single-single q < r" {
1274 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1275
12761248 var a = try Managed.initSet(testing.allocator, 0x0078f432);
12771249 defer a.deinit();
12781250 var b = try Managed.initSet(testing.allocator, 0x01000000);
......@@ -1317,10 +1289,7 @@ test "big.int div q=0 alias" {
13171289}
13181290
13191291test "big.int div multi-multi q < r" {
1320 switch (builtin.zig_backend) {
1321 .stage2_c, .stage2_x86_64 => return error.SkipZigTest,
1322 else => {},
1323 }
1292 if (builtin.zig_backend == .stage2_c) return error.SkipZigTest;
13241293
13251294 const op1 = 0x1ffffffff0078f432;
13261295 const op2 = 0x1ffffffff01000000;
......@@ -1642,8 +1611,6 @@ test "big.int div floor single-single -/-" {
16421611}
16431612
16441613test "big.int div floor no remainder negative quotient" {
1645 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1646
16471614 const u: i32 = -0x80000000;
16481615 const v: i32 = 1;
16491616
......@@ -1743,10 +1710,7 @@ test "big.int div multi-multi no rem" {
17431710}
17441711
17451712test "big.int div multi-multi (2 branch)" {
1746 switch (builtin.zig_backend) {
1747 .stage2_c, .stage2_x86_64 => return error.SkipZigTest,
1748 else => {},
1749 }
1713 if (builtin.zig_backend == .stage2_c) return error.SkipZigTest;
17501714
17511715 var a = try Managed.initSet(testing.allocator, 0x866666665555555588888887777777761111111111111111);
17521716 defer a.deinit();
......@@ -1785,10 +1749,7 @@ test "big.int div multi-multi (3.1/3.3 branch)" {
17851749}
17861750
17871751test "big.int div multi-single zero-limb trailing" {
1788 switch (builtin.zig_backend) {
1789 .stage2_c, .stage2_x86_64 => return error.SkipZigTest,
1790 else => {},
1791 }
1752 if (builtin.zig_backend == .stage2_c) return error.SkipZigTest;
17921753
17931754 var a = try Managed.initSet(testing.allocator, 0x60000000000000000000000000000000000000000000000000000000000000000);
17941755 defer a.deinit();
......@@ -1808,10 +1769,7 @@ test "big.int div multi-single zero-limb trailing" {
18081769}
18091770
18101771test "big.int div multi-multi zero-limb trailing (with rem)" {
1811 switch (builtin.zig_backend) {
1812 .stage2_c, .stage2_x86_64 => return error.SkipZigTest,
1813 else => {},
1814 }
1772 if (builtin.zig_backend == .stage2_c) return error.SkipZigTest;
18151773
18161774 var a = try Managed.initSet(testing.allocator, 0x86666666555555558888888777777776111111111111111100000000000000000000000000000000);
18171775 defer a.deinit();
......@@ -1908,8 +1866,6 @@ test "big.int div multi-multi fuzz case #1" {
19081866}
19091867
19101868test "big.int div multi-multi fuzz case #2" {
1911 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1912
19131869 var a = try Managed.init(testing.allocator);
19141870 defer a.deinit();
19151871 var b = try Managed.init(testing.allocator);
......@@ -2672,8 +2628,6 @@ test "big.int mutable to managed" {
26722628}
26732629
26742630test "big.int const to managed" {
2675 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
2676
26772631 var a = try Managed.initSet(testing.allocator, 123423453456);
26782632 defer a.deinit();
26792633
lib/std/math/big/rational.zig-6
......@@ -494,8 +494,6 @@ fn extractLowBits(a: Int, comptime T: type) T {
494494}
495495
496496test "big.rational extractLowBits" {
497 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
498
499497 var a = try Int.initSet(testing.allocator, 0x11112222333344441234567887654321);
500498 defer a.deinit();
501499
......@@ -649,8 +647,6 @@ test "big.rational copy" {
649647}
650648
651649test "big.rational negate" {
652 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
653
654650 var a = try Rational.init(testing.allocator);
655651 defer a.deinit();
656652
......@@ -668,8 +664,6 @@ test "big.rational negate" {
668664}
669665
670666test "big.rational abs" {
671 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
672
673667 var a = try Rational.init(testing.allocator);
674668 defer a.deinit();
675669
lib/std/math/ilogb.zig-6
......@@ -125,8 +125,6 @@ test "80" {
125125}
126126
127127test "128" {
128 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
129
130128 try expect(ilogbX(f128, 0.0) == fp_ilogb0);
131129 try expect(ilogbX(f128, 0.5) == -1);
132130 try expect(ilogbX(f128, 0.8923) == -1);
......@@ -162,8 +160,6 @@ test "64 special" {
162160}
163161
164162test "80 special" {
165 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
166
167163 try expect(ilogbX(f80, math.inf(f80)) == maxInt(i32));
168164 try expect(ilogbX(f80, -math.inf(f80)) == maxInt(i32));
169165 try expect(ilogbX(f80, 0.0) == minInt(i32));
......@@ -171,8 +167,6 @@ test "80 special" {
171167}
172168
173169test "128 special" {
174 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
175
176170 try expect(ilogbX(f128, math.inf(f128)) == maxInt(i32));
177171 try expect(ilogbX(f128, -math.inf(f128)) == maxInt(i32));
178172 try expect(ilogbX(f128, 0.0) == minInt(i32));
lib/std/math/log10.zig-1
......@@ -147,7 +147,6 @@ test "oldlog10 doesn't work" {
147147test "log10_int vs old implementation" {
148148 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
149149 if (builtin.zig_backend == .stage2_c) return error.SkipZigTest; // TODO
150 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
151150 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
152151 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
153152 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
lib/std/math/log_int.zig-2
......@@ -56,8 +56,6 @@ pub fn log_int(comptime T: type, base: T, x: T) Log2Int(T) {
5656}
5757
5858test "math.log_int" {
59 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
60
6159 // Test all unsigned integers with 2, 3, ..., 64 bits.
6260 // We cannot test 0 or 1 bits since base must be > 1.
6361 inline for (2..64 + 1) |bits| {
lib/std/math/nextafter.zig+1-2
......@@ -1,4 +1,3 @@
1const builtin = @import("builtin");
21const std = @import("../std.zig");
32const math = std.math;
43const assert = std.debug.assert;
......@@ -103,7 +102,7 @@ fn nextAfterFloat(comptime T: type, x: T, y: T) T {
103102}
104103
105104test "math.nextAfter.int" {
106 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
105 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
107106
108107 try expect(nextAfter(i0, 0, 0) == 0);
109108 try expect(nextAfter(u0, 0, 0) == 0);
lib/std/math/scalbn.zig-2
......@@ -7,8 +7,6 @@ const expect = std.testing.expect;
77pub const scalbn = @import("ldexp.zig").ldexp;
88
99test "math.scalbn" {
10 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
11
1210 // Verify we are using base 2.
1311 try expect(scalbn(@as(f16, 1.5), 4) == 24.0);
1412 try expect(scalbn(@as(f32, 1.5), 4) == 24.0);
lib/std/mem.zig+2-8
......@@ -1741,8 +1741,6 @@ pub fn readIntSlice(comptime T: type, bytes: []const u8, endian: Endian) T {
17411741}
17421742
17431743test "comptime read/write int" {
1744 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
1745
17461744 comptime {
17471745 var bytes: [2]u8 = undefined;
17481746 writeIntLittle(u16, &bytes, 0x1234);
......@@ -2062,10 +2060,7 @@ pub fn writeVarPackedInt(bytes: []u8, bit_offset: usize, bit_count: usize, value
20622060}
20632061
20642062test "writeIntBig and writeIntLittle" {
2065 switch (builtin.zig_backend) {
2066 .stage2_c, .stage2_x86_64 => return error.SkipZigTest,
2067 else => {},
2068 }
2063 if (builtin.zig_backend == .stage2_c) return error.SkipZigTest;
20692064
20702065 var buf0: [0]u8 = undefined;
20712066 var buf1: [1]u8 = undefined;
......@@ -3309,8 +3304,6 @@ test "testStringEquality" {
33093304}
33103305
33113306test "testReadInt" {
3312 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
3313
33143307 try testReadIntImpl();
33153308 try comptime testReadIntImpl();
33163309}
......@@ -4668,6 +4661,7 @@ test "read/write(Var)PackedInt" {
46684661 .stage2_c, .stage2_x86_64 => return error.SkipZigTest,
46694662 else => {},
46704663 }
4664
46714665 switch (builtin.cpu.arch) {
46724666 // This test generates too much code to execute on WASI.
46734667 // LLVM backend fails with "too many locals: locals exceed maximum"
lib/std/multi_array_list.zig-16
......@@ -583,8 +583,6 @@ pub fn MultiArrayList(comptime T: type) type {
583583}
584584
585585test "basic usage" {
586 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
587
588586 const ally = testing.allocator;
589587
590588 const Foo = struct {
......@@ -679,8 +677,6 @@ test "basic usage" {
679677// This was observed to fail on aarch64 with LLVM 11, when the capacityInBytes
680678// function used the @reduce code path.
681679test "regression test for @reduce bug" {
682 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
683
684680 const ally = testing.allocator;
685681 var list = MultiArrayList(struct {
686682 tag: std.zig.Token.Tag,
......@@ -758,8 +754,6 @@ test "regression test for @reduce bug" {
758754}
759755
760756test "ensure capacity on empty list" {
761 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
762
763757 const ally = testing.allocator;
764758
765759 const Foo = struct {
......@@ -795,8 +789,6 @@ test "ensure capacity on empty list" {
795789}
796790
797791test "insert elements" {
798 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
799
800792 const ally = testing.allocator;
801793
802794 const Foo = struct {
......@@ -816,8 +808,6 @@ test "insert elements" {
816808}
817809
818810test "union" {
819 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
820
821811 const ally = testing.allocator;
822812
823813 const Foo = union(enum) {
......@@ -873,8 +863,6 @@ test "union" {
873863}
874864
875865test "sorting a span" {
876 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
877
878866 var list: MultiArrayList(struct { score: u32, chr: u8 }) = .{};
879867 defer list.deinit(testing.allocator);
880868
......@@ -915,8 +903,6 @@ test "sorting a span" {
915903}
916904
917905test "0 sized struct field" {
918 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
919
920906 const ally = testing.allocator;
921907
922908 const Foo = struct {
......@@ -944,8 +930,6 @@ test "0 sized struct field" {
944930}
945931
946932test "0 sized struct" {
947 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
948
949933 const ally = testing.allocator;
950934
951935 const Foo = struct {
lib/std/net/test.zig+1-4
......@@ -109,9 +109,8 @@ test "parse and render UNIX addresses" {
109109}
110110
111111test "resolve DNS" {
112 if (builtin.os.tag == .wasi) return error.SkipZigTest;
113
114112 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
113 if (builtin.os.tag == .wasi) return error.SkipZigTest;
115114
116115 if (builtin.os.tag == .windows) {
117116 _ = try std.os.windows.WSAStartup(2, 2);
......@@ -295,8 +294,6 @@ test "listen on a unix socket, send bytes, receive bytes" {
295294 if (builtin.single_threaded) return error.SkipZigTest;
296295 if (!net.has_unix_sockets) return error.SkipZigTest;
297296
298 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
299
300297 if (builtin.os.tag == .windows) {
301298 _ = try std.os.windows.WSAStartup(2, 2);
302299 }
lib/std/os/linux/io_uring.zig-26
......@@ -1741,8 +1741,6 @@ test "readv" {
17411741test "writev/fsync/readv" {
17421742 if (builtin.os.tag != .linux) return error.SkipZigTest;
17431743
1744 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1745
17461744 var ring = IO_Uring.init(4, 0) catch |err| switch (err) {
17471745 error.SystemOutdated => return error.SkipZigTest,
17481746 error.PermissionDenied => return error.SkipZigTest,
......@@ -1813,8 +1811,6 @@ test "writev/fsync/readv" {
18131811test "write/read" {
18141812 if (builtin.os.tag != .linux) return error.SkipZigTest;
18151813
1816 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1817
18181814 var ring = IO_Uring.init(2, 0) catch |err| switch (err) {
18191815 error.SystemOutdated => return error.SkipZigTest,
18201816 error.PermissionDenied => return error.SkipZigTest,
......@@ -1862,8 +1858,6 @@ test "write/read" {
18621858test "splice/read" {
18631859 if (builtin.os.tag != .linux) return error.SkipZigTest;
18641860
1865 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1866
18671861 var ring = IO_Uring.init(4, 0) catch |err| switch (err) {
18681862 error.SystemOutdated => return error.SkipZigTest,
18691863 error.PermissionDenied => return error.SkipZigTest,
......@@ -1935,8 +1929,6 @@ test "splice/read" {
19351929test "write_fixed/read_fixed" {
19361930 if (builtin.os.tag != .linux) return error.SkipZigTest;
19371931
1938 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1939
19401932 var ring = IO_Uring.init(2, 0) catch |err| switch (err) {
19411933 error.SystemOutdated => return error.SkipZigTest,
19421934 error.PermissionDenied => return error.SkipZigTest,
......@@ -2002,8 +1994,6 @@ test "write_fixed/read_fixed" {
20021994test "openat" {
20031995 if (builtin.os.tag != .linux) return error.SkipZigTest;
20041996
2005 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
2006
20071997 var ring = IO_Uring.init(1, 0) catch |err| switch (err) {
20081998 error.SystemOutdated => return error.SkipZigTest,
20091999 error.PermissionDenied => return error.SkipZigTest,
......@@ -2055,8 +2045,6 @@ test "openat" {
20552045test "close" {
20562046 if (builtin.os.tag != .linux) return error.SkipZigTest;
20572047
2058 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
2059
20602048 var ring = IO_Uring.init(1, 0) catch |err| switch (err) {
20612049 error.SystemOutdated => return error.SkipZigTest,
20622050 error.PermissionDenied => return error.SkipZigTest,
......@@ -2392,8 +2380,6 @@ test "accept/connect/recv/link_timeout" {
23922380test "fallocate" {
23932381 if (builtin.os.tag != .linux) return error.SkipZigTest;
23942382
2395 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
2396
23972383 var ring = IO_Uring.init(1, 0) catch |err| switch (err) {
23982384 error.SystemOutdated => return error.SkipZigTest,
23992385 error.PermissionDenied => return error.SkipZigTest,
......@@ -2440,8 +2426,6 @@ test "fallocate" {
24402426test "statx" {
24412427 if (builtin.os.tag != .linux) return error.SkipZigTest;
24422428
2443 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
2444
24452429 var ring = IO_Uring.init(1, 0) catch |err| switch (err) {
24462430 error.SystemOutdated => return error.SkipZigTest,
24472431 error.PermissionDenied => return error.SkipZigTest,
......@@ -2698,8 +2682,6 @@ test "shutdown" {
26982682test "renameat" {
26992683 if (builtin.os.tag != .linux) return error.SkipZigTest;
27002684
2701 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
2702
27032685 var ring = IO_Uring.init(1, 0) catch |err| switch (err) {
27042686 error.SystemOutdated => return error.SkipZigTest,
27052687 error.PermissionDenied => return error.SkipZigTest,
......@@ -2769,8 +2751,6 @@ test "renameat" {
27692751test "unlinkat" {
27702752 if (builtin.os.tag != .linux) return error.SkipZigTest;
27712753
2772 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
2773
27742754 var ring = IO_Uring.init(1, 0) catch |err| switch (err) {
27752755 error.SystemOutdated => return error.SkipZigTest,
27762756 error.PermissionDenied => return error.SkipZigTest,
......@@ -2823,8 +2803,6 @@ test "unlinkat" {
28232803test "mkdirat" {
28242804 if (builtin.os.tag != .linux) return error.SkipZigTest;
28252805
2826 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
2827
28282806 var ring = IO_Uring.init(1, 0) catch |err| switch (err) {
28292807 error.SystemOutdated => return error.SkipZigTest,
28302808 error.PermissionDenied => return error.SkipZigTest,
......@@ -2869,8 +2847,6 @@ test "mkdirat" {
28692847test "symlinkat" {
28702848 if (builtin.os.tag != .linux) return error.SkipZigTest;
28712849
2872 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
2873
28742850 var ring = IO_Uring.init(1, 0) catch |err| switch (err) {
28752851 error.SystemOutdated => return error.SkipZigTest,
28762852 error.PermissionDenied => return error.SkipZigTest,
......@@ -2919,8 +2895,6 @@ test "symlinkat" {
29192895test "linkat" {
29202896 if (builtin.os.tag != .linux) return error.SkipZigTest;
29212897
2922 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
2923
29242898 var ring = IO_Uring.init(1, 0) catch |err| switch (err) {
29252899 error.SystemOutdated => return error.SkipZigTest,
29262900 error.PermissionDenied => return error.SkipZigTest,
lib/std/os/linux/test.zig-6
......@@ -8,8 +8,6 @@ const expectEqual = std.testing.expectEqual;
88const fs = std.fs;
99
1010test "fallocate" {
11 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
12
1311 var tmp = std.testing.tmpDir(.{});
1412 defer tmp.cleanup();
1513
......@@ -71,8 +69,6 @@ test "timer" {
7169}
7270
7371test "statx" {
74 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
75
7672 var tmp = std.testing.tmpDir(.{});
7773 defer tmp.cleanup();
7874
......@@ -111,8 +107,6 @@ test "user and group ids" {
111107}
112108
113109test "fadvise" {
114 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
115
116110 var tmp = std.testing.tmpDir(.{});
117111 defer tmp.cleanup();
118112
lib/std/os/test.zig-42
......@@ -88,8 +88,6 @@ test "chdir smoke test" {
8888test "open smoke test" {
8989 if (native_os == .wasi) return error.SkipZigTest;
9090
91 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
92
9391 // TODO verify file attributes using `fstat`
9492
9593 var tmp = tmpDir(.{});
......@@ -144,8 +142,6 @@ test "open smoke test" {
144142test "openat smoke test" {
145143 if (native_os == .wasi and builtin.link_libc) return error.SkipZigTest;
146144
147 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
148
149145 // TODO verify file attributes using `fstatat`
150146
151147 var tmp = tmpDir(.{});
......@@ -280,8 +276,6 @@ test "link with relative paths" {
280276test "linkat with different directories" {
281277 if (native_os == .wasi and builtin.link_libc) return error.SkipZigTest;
282278
283 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
284
285279 switch (native_os) {
286280 .wasi, .linux, .solaris, .illumos => {},
287281 else => return error.SkipZigTest,
......@@ -327,8 +321,6 @@ test "fstatat" {
327321 // enable when `fstat` and `fstatat` are implemented on Windows
328322 if (native_os == .windows) return error.SkipZigTest;
329323
330 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
331
332324 var tmp = tmpDir(.{});
333325 defer tmp.cleanup();
334326
......@@ -348,8 +340,6 @@ test "fstatat" {
348340}
349341
350342test "readlinkat" {
351 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
352
353343 var tmp = tmpDir(.{});
354344 defer tmp.cleanup();
355345
......@@ -583,8 +573,6 @@ test "mmap" {
583573 if (native_os == .windows or native_os == .wasi)
584574 return error.SkipZigTest;
585575
586 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
587
588576 var tmp = tmpDir(.{});
589577 defer tmp.cleanup();
590578
......@@ -695,8 +683,6 @@ test "fcntl" {
695683 if (native_os == .windows or native_os == .wasi)
696684 return error.SkipZigTest;
697685
698 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
699
700686 var tmp = tmpDir(.{});
701687 defer tmp.cleanup();
702688
......@@ -737,8 +723,6 @@ test "sync" {
737723 if (native_os != .linux)
738724 return error.SkipZigTest;
739725
740 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
741
742726 var tmp = tmpDir(.{});
743727 defer tmp.cleanup();
744728
......@@ -759,8 +743,6 @@ test "fsync" {
759743 else => return error.SkipZigTest,
760744 }
761745
762 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
763
764746 var tmp = tmpDir(.{});
765747 defer tmp.cleanup();
766748
......@@ -780,8 +762,6 @@ test "getrlimit and setrlimit" {
780762 return error.SkipZigTest;
781763 }
782764
783 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
784
785765 inline for (std.meta.fields(os.rlimit_resource)) |field| {
786766 const resource = @as(os.rlimit_resource, @enumFromInt(field.value));
787767 const limit = try os.getrlimit(resource);
......@@ -903,8 +883,6 @@ test "dup & dup2" {
903883 else => return error.SkipZigTest,
904884 }
905885
906 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
907
908886 var tmp = tmpDir(.{});
909887 defer tmp.cleanup();
910888
......@@ -934,8 +912,6 @@ test "dup & dup2" {
934912test "writev longer than IOV_MAX" {
935913 if (native_os == .windows or native_os == .wasi) return error.SkipZigTest;
936914
937 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
938
939915 var tmp = tmpDir(.{});
940916 defer tmp.cleanup();
941917
......@@ -953,8 +929,6 @@ test "POSIX file locking with fcntl" {
953929 return error.SkipZigTest;
954930 }
955931
956 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
957
958932 if (true) {
959933 // https://github.com/ziglang/zig/issues/11074
960934 return error.SkipZigTest;
......@@ -1017,8 +991,6 @@ test "POSIX file locking with fcntl" {
1017991test "rename smoke test" {
1018992 if (native_os == .wasi) return error.SkipZigTest;
1019993
1020 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1021
1022994 var tmp = tmpDir(.{});
1023995 defer tmp.cleanup();
1024996
......@@ -1075,8 +1047,6 @@ test "rename smoke test" {
10751047test "access smoke test" {
10761048 if (native_os == .wasi) return error.SkipZigTest;
10771049
1078 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1079
10801050 var tmp = tmpDir(.{});
10811051 defer tmp.cleanup();
10821052
......@@ -1141,8 +1111,6 @@ test "timerfd" {
11411111}
11421112
11431113test "isatty" {
1144 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1145
11461114 var tmp = tmpDir(.{});
11471115 defer tmp.cleanup();
11481116
......@@ -1155,8 +1123,6 @@ test "isatty" {
11551123test "read with empty buffer" {
11561124 if (native_os == .wasi) return error.SkipZigTest;
11571125
1158 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1159
11601126 var tmp = tmpDir(.{});
11611127 defer tmp.cleanup();
11621128
......@@ -1182,8 +1148,6 @@ test "read with empty buffer" {
11821148test "pread with empty buffer" {
11831149 if (native_os == .wasi) return error.SkipZigTest;
11841150
1185 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1186
11871151 var tmp = tmpDir(.{});
11881152 defer tmp.cleanup();
11891153
......@@ -1209,8 +1173,6 @@ test "pread with empty buffer" {
12091173test "write with empty buffer" {
12101174 if (native_os == .wasi) return error.SkipZigTest;
12111175
1212 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1213
12141176 var tmp = tmpDir(.{});
12151177 defer tmp.cleanup();
12161178
......@@ -1236,8 +1198,6 @@ test "write with empty buffer" {
12361198test "pwrite with empty buffer" {
12371199 if (native_os == .wasi) return error.SkipZigTest;
12381200
1239 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1240
12411201 var tmp = tmpDir(.{});
12421202 defer tmp.cleanup();
12431203
......@@ -1263,8 +1223,6 @@ test "pwrite with empty buffer" {
12631223test "fchmodat smoke test" {
12641224 if (!std.fs.has_executable_bit) return error.SkipZigTest;
12651225
1266 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1267
12681226 var tmp = tmpDir(.{});
12691227 defer tmp.cleanup();
12701228
lib/std/os/windows.zig-2
......@@ -2491,8 +2491,6 @@ pub fn ntToWin32Namespace(path: []const u16) !PathSpace {
24912491}
24922492
24932493test "ntToWin32Namespace" {
2494 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
2495
24962494 const L = std.unicode.utf8ToUtf16LeStringLiteral;
24972495
24982496 try testNtToWin32Namespace(L("UNC"), L("\\??\\UNC"));
lib/std/priority_dequeue.zig-2
......@@ -705,8 +705,6 @@ test "std.PriorityDequeue: fromOwnedSlice trivial case 1" {
705705}
706706
707707test "std.PriorityDequeue: fromOwnedSlice" {
708 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
709
710708 const items = [_]u32{ 15, 7, 21, 14, 13, 22, 12, 6, 7, 25, 5, 24, 11, 16, 15, 24, 2, 1 };
711709 const queue_items = try testing.allocator.dupe(u32, items[0..]);
712710 var queue = PDQ.fromOwnedSlice(testing.allocator, queue_items[0..], {});
lib/std/priority_queue.zig-2
......@@ -385,8 +385,6 @@ test "std.PriorityQueue: fromOwnedSlice trivial case 1" {
385385}
386386
387387test "std.PriorityQueue: fromOwnedSlice" {
388 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
389
390388 const items = [_]u32{ 15, 7, 21, 14, 13, 22, 12, 6, 7, 25, 5, 24, 11, 16, 15, 24, 2, 1 };
391389 const heap_items = try testing.allocator.dupe(u32, items[0..]);
392390 var queue = PQlt.fromOwnedSlice(testing.allocator, heap_items[0..], {});
lib/std/rand/test.zig-2
......@@ -443,8 +443,6 @@ fn testRangeBias(r: Random, start: i8, end: i8, biased: bool) !void {
443443}
444444
445445test "CSPRNG" {
446 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
447
448446 var secret_seed: [DefaultCsprng.secret_seed_length]u8 = undefined;
449447 std.crypto.random.bytes(&secret_seed);
450448 var csprng = DefaultCsprng.init(secret_seed);
lib/std/segmented_list.zig-2
......@@ -409,8 +409,6 @@ pub fn SegmentedList(comptime T: type, comptime prealloc_item_count: usize) type
409409}
410410
411411test "SegmentedList basic usage" {
412 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
413
414412 try testSegmentedList(0);
415413 try testSegmentedList(1);
416414 try testSegmentedList(2);
lib/std/simd.zig+8-3
......@@ -13,7 +13,7 @@ pub fn suggestVectorSizeForCpu(comptime T: type, comptime cpu: std.Target.Cpu) ?
1313 const vector_bit_size: u16 = blk: {
1414 if (cpu.arch.isX86()) {
1515 if (T == bool and std.Target.x86.featureSetHas(cpu.features, .prefer_mask_registers)) return 64;
16 if (std.Target.x86.featureSetHas(cpu.features, .avx512f) and !std.Target.x86.featureSetHasAny(cpu.features, .{ .prefer_256_bit, .prefer_128_bit })) break :blk 512;
16 if (builtin.zig_backend != .stage2_x86_64 and std.Target.x86.featureSetHas(cpu.features, .avx512f) and !std.Target.x86.featureSetHasAny(cpu.features, .{ .prefer_256_bit, .prefer_128_bit })) break :blk 512;
1717 if (std.Target.x86.featureSetHasAny(cpu.features, .{ .prefer_256_bit, .avx2 }) and !std.Target.x86.featureSetHas(cpu.features, .prefer_128_bit)) break :blk 256;
1818 if (std.Target.x86.featureSetHas(cpu.features, .sse)) break :blk 128;
1919 if (std.Target.x86.featureSetHasAny(cpu.features, .{ .mmx, .@"3dnow" })) break :blk 64;
......@@ -62,10 +62,15 @@ pub fn suggestVectorSize(comptime T: type) ?comptime_int {
6262test "suggestVectorSizeForCpu works with signed and unsigned values" {
6363 comptime var cpu = std.Target.Cpu.baseline(std.Target.Cpu.Arch.x86_64);
6464 comptime cpu.features.addFeature(@intFromEnum(std.Target.x86.Feature.avx512f));
65 comptime cpu.features.populateDependencies(&std.Target.x86.all_features);
66 const expected_size: usize = switch (builtin.zig_backend) {
67 .stage2_x86_64 => 8,
68 else => 16,
69 };
6570 const signed_integer_size = suggestVectorSizeForCpu(i32, cpu).?;
6671 const unsigned_integer_size = suggestVectorSizeForCpu(u32, cpu).?;
67 try std.testing.expectEqual(@as(usize, 16), unsigned_integer_size);
68 try std.testing.expectEqual(@as(usize, 16), signed_integer_size);
72 try std.testing.expectEqual(expected_size, unsigned_integer_size);
73 try std.testing.expectEqual(expected_size, signed_integer_size);
6974}
7075
7176fn vectorLength(comptime VectorType: type) comptime_int {
lib/std/sort.zig-11
......@@ -1,6 +1,5 @@
11const std = @import("std.zig");
22const assert = std.debug.assert;
3const builtin = @import("builtin");
43const testing = std.testing;
54const mem = std.mem;
65const math = std.math;
......@@ -177,8 +176,6 @@ const IdAndValue = struct {
177176};
178177
179178test "stable sort" {
180 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
181
182179 const expected = [_]IdAndValue{
183180 IdAndValue{ .id = 0, .value = 0 },
184181 IdAndValue{ .id = 1, .value = 0 },
......@@ -226,8 +223,6 @@ test "stable sort" {
226223}
227224
228225test "sort" {
229 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
230
231226 const u8cases = [_][]const []const u8{
232227 &[_][]const u8{
233228 "",
......@@ -306,8 +301,6 @@ test "sort" {
306301}
307302
308303test "sort descending" {
309 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
310
311304 const rev_cases = [_][]const []const i32{
312305 &[_][]const i32{
313306 &[_]i32{},
......@@ -347,8 +340,6 @@ test "sort descending" {
347340}
348341
349342test "sort with context in the middle of a slice" {
350 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
351
352343 const Context = struct {
353344 items: []i32,
354345
......@@ -388,8 +379,6 @@ test "sort with context in the middle of a slice" {
388379}
389380
390381test "sort fuzz testing" {
391 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
392
393382 var prng = std.rand.DefaultPrng.init(0x12345678);
394383 const random = prng.random();
395384 const test_case_count = 10;
lib/std/time.zig-2
......@@ -321,8 +321,6 @@ pub const Timer = struct {
321321};
322322
323323test "Timer + Instant" {
324 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
325
326324 const margin = ns_per_ms * 150;
327325
328326 var timer = try Timer.start();
lib/std/unicode.zig-41
......@@ -1,6 +1,5 @@
11const std = @import("./std.zig");
22const assert = std.debug.assert;
3const builtin = @import("builtin");
43const testing = std.testing;
54const mem = std.mem;
65
......@@ -497,15 +496,11 @@ fn testUtf16CountCodepoints() !void {
497496}
498497
499498test "utf16 count codepoints" {
500 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
501
502499 try testUtf16CountCodepoints();
503500 try comptime testUtf16CountCodepoints();
504501}
505502
506503test "utf8 encode" {
507 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
508
509504 try comptime testUtf8Encode();
510505 try testUtf8Encode();
511506}
......@@ -532,8 +527,6 @@ fn testUtf8Encode() !void {
532527}
533528
534529test "utf8 encode error" {
535 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
536
537530 try comptime testUtf8EncodeError();
538531 try testUtf8EncodeError();
539532}
......@@ -550,8 +543,6 @@ fn testErrorEncode(codePoint: u21, array: []u8, expectedErr: anyerror) !void {
550543}
551544
552545test "utf8 iterator on ascii" {
553 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
554
555546 try comptime testUtf8IteratorOnAscii();
556547 try testUtf8IteratorOnAscii();
557548}
......@@ -572,8 +563,6 @@ fn testUtf8IteratorOnAscii() !void {
572563}
573564
574565test "utf8 view bad" {
575 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
576
577566 try comptime testUtf8ViewBad();
578567 try testUtf8ViewBad();
579568}
......@@ -584,8 +573,6 @@ fn testUtf8ViewBad() !void {
584573}
585574
586575test "utf8 view ok" {
587 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
588
589576 try comptime testUtf8ViewOk();
590577 try testUtf8ViewOk();
591578}
......@@ -606,8 +593,6 @@ fn testUtf8ViewOk() !void {
606593}
607594
608595test "validate slice" {
609 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
610
611596 try comptime testValidateSlice();
612597 try testValidateSlice();
613598
......@@ -648,8 +633,6 @@ fn testValidateSlice() !void {
648633}
649634
650635test "valid utf8" {
651 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
652
653636 try comptime testValidUtf8();
654637 try testValidUtf8();
655638}
......@@ -669,8 +652,6 @@ fn testValidUtf8() !void {
669652}
670653
671654test "invalid utf8 continuation bytes" {
672 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
673
674655 try comptime testInvalidUtf8ContinuationBytes();
675656 try testInvalidUtf8ContinuationBytes();
676657}
......@@ -703,8 +684,6 @@ fn testInvalidUtf8ContinuationBytes() !void {
703684}
704685
705686test "overlong utf8 codepoint" {
706 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
707
708687 try comptime testOverlongUtf8Codepoint();
709688 try testOverlongUtf8Codepoint();
710689}
......@@ -718,8 +697,6 @@ fn testOverlongUtf8Codepoint() !void {
718697}
719698
720699test "misc invalid utf8" {
721 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
722
723700 try comptime testMiscInvalidUtf8();
724701 try testMiscInvalidUtf8();
725702}
......@@ -735,8 +712,6 @@ fn testMiscInvalidUtf8() !void {
735712}
736713
737714test "utf8 iterator peeking" {
738 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
739
740715 try comptime testUtf8Peeking();
741716 try testUtf8Peeking();
742717}
......@@ -821,8 +796,6 @@ pub fn utf16leToUtf8(utf8: []u8, utf16le: []const u16) !usize {
821796}
822797
823798test "utf16leToUtf8" {
824 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
825
826799 var utf16le: [2]u16 = undefined;
827800 const utf16le_as_bytes = mem.sliceAsBytes(utf16le[0..]);
828801
......@@ -935,8 +908,6 @@ pub fn utf8ToUtf16Le(utf16le: []u16, utf8: []const u8) !usize {
935908}
936909
937910test "utf8ToUtf16Le" {
938 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
939
940911 var utf16le: [2]u16 = [_]u16{0} ** 2;
941912 {
942913 const length = try utf8ToUtf16Le(utf16le[0..], "𐐷");
......@@ -955,8 +926,6 @@ test "utf8ToUtf16Le" {
955926}
956927
957928test "utf8ToUtf16LeWithNull" {
958 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
959
960929 {
961930 const utf16 = try utf8ToUtf16LeWithNull(testing.allocator, "𐐷");
962931 defer testing.allocator.free(utf16);
......@@ -1015,8 +984,6 @@ fn testCalcUtf16LeLen() !void {
1015984}
1016985
1017986test "calculate utf16 string length of given utf8 string in u16" {
1018 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1019
1020987 try testCalcUtf16LeLen();
1021988 try comptime testCalcUtf16LeLen();
1022989}
......@@ -1050,8 +1017,6 @@ pub fn fmtUtf16le(utf16le: []const u16) std.fmt.Formatter(formatUtf16le) {
10501017}
10511018
10521019test "fmtUtf16le" {
1053 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1054
10551020 const expectFmt = std.testing.expectFmt;
10561021 try expectFmt("", "{}", .{fmtUtf16le(utf8ToUtf16LeStringLiteral(""))});
10571022 try expectFmt("foo", "{}", .{fmtUtf16le(utf8ToUtf16LeStringLiteral("foo"))});
......@@ -1065,8 +1030,6 @@ test "fmtUtf16le" {
10651030}
10661031
10671032test "utf8ToUtf16LeStringLiteral" {
1068 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1069
10701033 {
10711034 const bytes = [_:0]u16{
10721035 mem.nativeToLittle(u16, 0x41),
......@@ -1127,8 +1090,6 @@ fn testUtf8CountCodepoints() !void {
11271090}
11281091
11291092test "utf8 count codepoints" {
1130 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1131
11321093 try testUtf8CountCodepoints();
11331094 try comptime testUtf8CountCodepoints();
11341095}
......@@ -1145,8 +1106,6 @@ fn testUtf8ValidCodepoint() !void {
11451106}
11461107
11471108test "utf8 valid codepoint" {
1148 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1149
11501109 try testUtf8ValidCodepoint();
11511110 try comptime testUtf8ValidCodepoint();
11521111}
lib/std/zig/fmt.zig+1-2
......@@ -1,5 +1,4 @@
11const std = @import("std");
2const builtin = @import("builtin");
32const mem = std.mem;
43
54/// Print the string as a Zig identifier escaping it with @"" syntax if needed.
......@@ -96,7 +95,7 @@ pub fn fmtEscapes(bytes: []const u8) std.fmt.Formatter(stringEscape) {
9695}
9796
9897test "escape invalid identifiers" {
99 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
98 if (@import("builtin").zig_backend == .stage2_x86_64) return error.SkipZigTest;
10099
101100 const expectFmt = std.testing.expectFmt;
102101 try expectFmt("@\"while\"", "{}", .{fmtId("while")});
lib/std/zig/tokenizer.zig-2
......@@ -1481,8 +1481,6 @@ test "utf8" {
14811481}
14821482
14831483test "invalid utf8" {
1484 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1485
14861484 try testTokenize("//\x80", &.{
14871485 .invalid,
14881486 });
src/arch/x86_64/CodeGen.zig+880-305
......@@ -656,11 +656,14 @@ const InstTracking = struct {
656656 fn reuse(
657657 self: *InstTracking,
658658 function: *Self,
659 new_inst: Air.Inst.Index,
659 new_inst: ?Air.Inst.Index,
660660 old_inst: Air.Inst.Index,
661661 ) void {
662662 self.short = .{ .dead = function.scope_generation };
663 tracking_log.debug("%{d} => {} (reuse %{d})", .{ new_inst, self.*, old_inst });
663 if (new_inst) |inst|
664 tracking_log.debug("%{d} => {} (reuse %{d})", .{ inst, self.*, old_inst })
665 else
666 tracking_log.debug("tmp => {} (reuse %{d})", .{ self.*, old_inst });
664667 }
665668
666669 fn liveOut(self: *InstTracking, function: *Self, inst: Air.Inst.Index) void {
......@@ -1457,7 +1460,10 @@ fn asmRegisterRegisterRegisterImmediate(
14571460 .r1 = reg1,
14581461 .r2 = reg2,
14591462 .r3 = reg3,
1460 .i = @as(u8, @intCast(imm.unsigned)),
1463 .i = switch (imm) {
1464 .signed => |s| @bitCast(@as(i8, @intCast(s))),
1465 .unsigned => |u| @intCast(u),
1466 },
14611467 } },
14621468 });
14631469}
......@@ -1560,24 +1566,58 @@ fn asmRegisterMemoryImmediate(
15601566 m: Memory,
15611567 imm: Immediate,
15621568) !void {
1563 _ = try self.addInst(.{
1564 .tag = tag[1],
1565 .ops = switch (m) {
1566 .sib => .rmi_sib,
1567 .rip => .rmi_rip,
1569 if (switch (imm) {
1570 .signed => |s| if (math.cast(i16, s)) |x| @as(u16, @bitCast(x)) else null,
1571 .unsigned => |u| math.cast(u16, u),
1572 }) |small_imm| {
1573 _ = try self.addInst(.{
1574 .tag = tag[1],
1575 .ops = switch (m) {
1576 .sib => .rmi_sib,
1577 .rip => .rmi_rip,
1578 else => unreachable,
1579 },
1580 .data = .{ .rix = .{
1581 .fixes = tag[0],
1582 .r1 = reg,
1583 .i = small_imm,
1584 .payload = switch (m) {
1585 .sib => try self.addExtra(Mir.MemorySib.encode(m)),
1586 .rip => try self.addExtra(Mir.MemoryRip.encode(m)),
1587 else => unreachable,
1588 },
1589 } },
1590 });
1591 } else {
1592 const payload = try self.addExtra(Mir.Imm32{ .imm = switch (imm) {
1593 .signed => |s| @bitCast(s),
1594 .unsigned => unreachable,
1595 } });
1596 assert(payload + 1 == switch (m) {
1597 .sib => try self.addExtra(Mir.MemorySib.encode(m)),
1598 .rip => try self.addExtra(Mir.MemoryRip.encode(m)),
15681599 else => unreachable,
1569 },
1570 .data = .{ .rix = .{
1571 .fixes = tag[0],
1572 .r1 = reg,
1573 .i = @as(u8, @intCast(imm.unsigned)),
1574 .payload = switch (m) {
1575 .sib => try self.addExtra(Mir.MemorySib.encode(m)),
1576 .rip => try self.addExtra(Mir.MemoryRip.encode(m)),
1600 });
1601 _ = try self.addInst(.{
1602 .tag = tag[1],
1603 .ops = switch (m) {
1604 .sib => switch (imm) {
1605 .signed => .rmi_sib_s,
1606 .unsigned => .rmi_sib_u,
1607 },
1608 .rip => switch (imm) {
1609 .signed => .rmi_rip_s,
1610 .unsigned => .rmi_rip_u,
1611 },
15771612 else => unreachable,
15781613 },
1579 } },
1580 });
1614 .data = .{ .rx = .{
1615 .fixes = tag[0],
1616 .r1 = reg,
1617 .payload = payload,
1618 } },
1619 });
1620 }
15811621}
15821622
15831623fn asmRegisterRegisterMemoryImmediate(
......@@ -2047,7 +2087,7 @@ fn genBody(self: *Self, body: []const Air.Inst.Index) InnerError!void {
20472087 .get_union_tag => try self.airGetUnionTag(inst),
20482088 .clz => try self.airClz(inst),
20492089 .ctz => try self.airCtz(inst),
2050 .popcount => try self.airPopcount(inst),
2090 .popcount => try self.airPopCount(inst),
20512091 .byte_swap => try self.airByteSwap(inst),
20522092 .bit_reverse => try self.airBitReverse(inst),
20532093 .tag_name => try self.airTagName(inst),
......@@ -2708,11 +2748,11 @@ fn airFptrunc(self: *Self, inst: Air.Inst.Index) !void {
27082748 },
27092749 else => unreachable,
27102750 }) {
2711 var callee: ["__trunc?f?f2".len]u8 = undefined;
2751 var callee_buf: ["__trunc?f?f2".len]u8 = undefined;
27122752 break :result try self.genCall(.{ .lib = .{
27132753 .return_type = self.floatCompilerRtAbiType(dst_ty, src_ty).toIntern(),
27142754 .param_types = &.{self.floatCompilerRtAbiType(src_ty, dst_ty).toIntern()},
2715 .callee = std.fmt.bufPrint(&callee, "__trunc{c}f{c}f2", .{
2755 .callee = std.fmt.bufPrint(&callee_buf, "__trunc{c}f{c}f2", .{
27162756 floatCompilerRtAbiName(src_bits),
27172757 floatCompilerRtAbiName(dst_bits),
27182758 }) catch unreachable,
......@@ -2740,7 +2780,7 @@ fn airFptrunc(self: *Self, inst: Air.Inst.Index) !void {
27402780 .{ .v_, .cvtps2ph },
27412781 dst_reg,
27422782 mat_src_reg.to128(),
2743 Immediate.u(0b1_00),
2783 Immediate.u(@as(u5, @bitCast(RoundMode{ .mode = .mxcsr }))),
27442784 );
27452785 },
27462786 else => unreachable,
......@@ -2807,11 +2847,11 @@ fn airFpext(self: *Self, inst: Air.Inst.Index) !void {
28072847 },
28082848 else => unreachable,
28092849 }) {
2810 var callee: ["__extend?f?f2".len]u8 = undefined;
2850 var callee_buf: ["__extend?f?f2".len]u8 = undefined;
28112851 break :result try self.genCall(.{ .lib = .{
28122852 .return_type = self.floatCompilerRtAbiType(dst_ty, src_ty).toIntern(),
28132853 .param_types = &.{self.floatCompilerRtAbiType(src_ty, dst_ty).toIntern()},
2814 .callee = std.fmt.bufPrint(&callee, "__extend{c}f{c}f2", .{
2854 .callee = std.fmt.bufPrint(&callee_buf, "__extend{c}f{c}f2", .{
28152855 floatCompilerRtAbiName(src_bits),
28162856 floatCompilerRtAbiName(dst_bits),
28172857 }) catch unreachable,
......@@ -2982,11 +3022,8 @@ fn airTrunc(self: *Self, inst: Air.Inst.Index) !void {
29823022 else if (dst_abi_size <= 8)
29833023 try self.copyToRegisterWithInstTracking(inst, dst_ty, src_mcv)
29843024 else if (dst_abi_size <= 16) dst: {
2985 const dst_regs = try self.register_manager.allocRegs(
2986 2,
2987 .{ inst, inst },
2988 abi.RegisterClass.gp,
2989 );
3025 const dst_regs =
3026 try self.register_manager.allocRegs(2, .{ inst, inst }, abi.RegisterClass.gp);
29903027 const dst_mcv: MCValue = .{ .register_pair = dst_regs };
29913028 const dst_locks = self.register_manager.lockRegsAssumeUnused(2, dst_regs);
29923029 defer for (dst_locks) |lock| self.register_manager.unlockReg(lock);
......@@ -3713,14 +3750,22 @@ fn genIntMulDivOpMir(self: *Self, tag: Mir.Inst.FixedTag, ty: Type, lhs: MCValue
37133750 else => unreachable,
37143751 .mul => {},
37153752 .div => switch (tag[0]) {
3716 ._ => try self.asmRegisterRegister(.{ ._, .xor }, .edx, .edx),
3717 .i_ => switch (self.regBitSize(ty)) {
3718 8 => try self.asmOpOnly(.{ ._, .cbw }),
3719 16 => try self.asmOpOnly(.{ ._, .cwd }),
3720 32 => try self.asmOpOnly(.{ ._, .cdq }),
3721 64 => try self.asmOpOnly(.{ ._, .cqo }),
3722 else => unreachable,
3753 ._ => {
3754 const hi_reg: Register =
3755 switch (self.regBitSize(ty)) {
3756 8 => .ah,
3757 16, 32, 64 => .edx,
3758 else => unreachable,
3759 };
3760 try self.asmRegisterRegister(.{ ._, .xor }, hi_reg, hi_reg);
37233761 },
3762 .i_ => try self.asmOpOnly(.{ ._, switch (self.regBitSize(ty)) {
3763 8 => .cbw,
3764 16 => .cwd,
3765 32 => .cdq,
3766 64 => .cqo,
3767 else => unreachable,
3768 } }),
37243769 else => unreachable,
37253770 },
37263771 }
......@@ -4626,6 +4671,19 @@ fn airClz(self: *Self, inst: Air.Inst.Index) !void {
46264671 if (src_ty.zigTypeTag(mod) == .Vector) return self.fail("TODO implement airClz for {}", .{
46274672 src_ty.fmt(mod),
46284673 });
4674 const src_bits: u32 = @intCast(src_ty.bitSize(mod));
4675
4676 const has_lzcnt = self.hasFeature(.lzcnt);
4677 if (src_bits > 64 and !has_lzcnt) {
4678 var callee_buf: ["__clz?i2".len]u8 = undefined;
4679 break :result try self.genCall(.{ .lib = .{
4680 .return_type = .i32_type,
4681 .param_types = &.{src_ty.toIntern()},
4682 .callee = std.fmt.bufPrint(&callee_buf, "__clz{c}i2", .{
4683 intCompilerRtAbiName(src_bits),
4684 }) catch unreachable,
4685 } }, &.{src_ty}, &.{.{ .air_ref = ty_op.operand }});
4686 }
46294687
46304688 const src_mcv = try self.resolveInst(ty_op.operand);
46314689 const mat_src_mcv = switch (src_mcv) {
......@@ -4643,8 +4701,7 @@ fn airClz(self: *Self, inst: Air.Inst.Index) !void {
46434701 const dst_lock = self.register_manager.lockRegAssumeUnused(dst_reg);
46444702 defer self.register_manager.unlockReg(dst_lock);
46454703
4646 const src_bits = src_ty.bitSize(mod);
4647 if (self.hasFeature(.lzcnt)) {
4704 if (has_lzcnt) {
46484705 if (src_bits <= 8) {
46494706 const wide_reg = try self.copyToTmpRegister(src_ty, mat_src_mcv);
46504707 try self.truncateRegister(src_ty, wide_reg);
......@@ -4667,24 +4724,33 @@ fn airClz(self: *Self, inst: Air.Inst.Index) !void {
46674724 const tmp_lock = self.register_manager.lockRegAssumeUnused(tmp_reg);
46684725 defer self.register_manager.unlockReg(tmp_lock);
46694726
4670 try self.genBinOpMir(.{ ._, .lzcnt }, Type.u64, dst_mcv, mat_src_mcv);
4727 try self.genBinOpMir(
4728 .{ ._, .lzcnt },
4729 Type.u64,
4730 dst_mcv,
4731 if (mat_src_mcv.isMemory())
4732 mat_src_mcv
4733 else
4734 .{ .register = mat_src_mcv.register_pair[0] },
4735 );
46714736 try self.genBinOpMir(.{ ._, .add }, dst_ty, dst_mcv, .{ .immediate = 64 });
46724737 try self.genBinOpMir(
46734738 .{ ._, .lzcnt },
46744739 Type.u64,
46754740 tmp_mcv,
4676 mat_src_mcv.address().offset(8).deref(),
4741 if (mat_src_mcv.isMemory())
4742 mat_src_mcv.address().offset(8).deref()
4743 else
4744 .{ .register = mat_src_mcv.register_pair[1] },
46774745 );
46784746 try self.asmCmovccRegisterRegister(.nc, dst_reg.to32(), tmp_reg.to32());
46794747
4680 if (src_bits < 128) {
4681 try self.genBinOpMir(
4682 .{ ._, .sub },
4683 dst_ty,
4684 dst_mcv,
4685 .{ .immediate = 128 - src_bits },
4686 );
4687 }
4748 if (src_bits < 128) try self.genBinOpMir(
4749 .{ ._, .sub },
4750 dst_ty,
4751 dst_mcv,
4752 .{ .immediate = 128 - src_bits },
4753 );
46884754 } else return self.fail("TODO airClz of {}", .{src_ty.fmt(mod)});
46894755 break :result dst_mcv;
46904756 }
......@@ -4755,7 +4821,22 @@ fn airCtz(self: *Self, inst: Air.Inst.Index) !void {
47554821 const result = result: {
47564822 const dst_ty = self.typeOfIndex(inst);
47574823 const src_ty = self.typeOf(ty_op.operand);
4758 const src_bits = src_ty.bitSize(mod);
4824 if (src_ty.zigTypeTag(mod) == .Vector) return self.fail("TODO implement airClz for {}", .{
4825 src_ty.fmt(mod),
4826 });
4827 const src_bits: u32 = @intCast(src_ty.bitSize(mod));
4828
4829 const has_bmi = self.hasFeature(.bmi);
4830 if (src_bits > 64 and !has_bmi) {
4831 var callee_buf: ["__ctz?i2".len]u8 = undefined;
4832 break :result try self.genCall(.{ .lib = .{
4833 .return_type = .i32_type,
4834 .param_types = &.{src_ty.toIntern()},
4835 .callee = std.fmt.bufPrint(&callee_buf, "__ctz{c}i2", .{
4836 intCompilerRtAbiName(src_bits),
4837 }) catch unreachable,
4838 } }, &.{src_ty}, &.{.{ .air_ref = ty_op.operand }});
4839 }
47594840
47604841 const src_mcv = try self.resolveInst(ty_op.operand);
47614842 const mat_src_mcv = switch (src_mcv) {
......@@ -4800,8 +4881,16 @@ fn airCtz(self: *Self, inst: Air.Inst.Index) !void {
48004881 const tmp_lock = self.register_manager.lockRegAssumeUnused(tmp_reg);
48014882 defer self.register_manager.unlockReg(tmp_lock);
48024883
4884 const lo_mat_src_mcv: MCValue = if (mat_src_mcv.isMemory())
4885 mat_src_mcv
4886 else
4887 .{ .register = mat_src_mcv.register_pair[0] };
4888 const hi_mat_src_mcv: MCValue = if (mat_src_mcv.isMemory())
4889 mat_src_mcv.address().offset(8).deref()
4890 else
4891 .{ .register = mat_src_mcv.register_pair[1] };
48034892 const masked_mcv = if (src_bits < 128) masked: {
4804 try self.genCopy(Type.u64, dst_mcv, mat_src_mcv.address().offset(8).deref());
4893 try self.genCopy(Type.u64, dst_mcv, hi_mat_src_mcv);
48054894 try self.genBinOpMir(
48064895 .{ ._, .@"or" },
48074896 Type.u64,
......@@ -4809,10 +4898,10 @@ fn airCtz(self: *Self, inst: Air.Inst.Index) !void {
48094898 .{ .immediate = @as(u64, math.maxInt(u64)) << @intCast(src_bits - 64) },
48104899 );
48114900 break :masked dst_mcv;
4812 } else mat_src_mcv.address().offset(8).deref();
4901 } else hi_mat_src_mcv;
48134902 try self.genBinOpMir(.{ ._, .tzcnt }, Type.u64, dst_mcv, masked_mcv);
48144903 try self.genBinOpMir(.{ ._, .add }, dst_ty, dst_mcv, .{ .immediate = 64 });
4815 try self.genBinOpMir(.{ ._, .tzcnt }, Type.u64, tmp_mcv, mat_src_mcv);
4904 try self.genBinOpMir(.{ ._, .tzcnt }, Type.u64, tmp_mcv, lo_mat_src_mcv);
48164905 try self.asmCmovccRegisterRegister(.nc, dst_reg.to32(), tmp_reg.to32());
48174906 } else return self.fail("TODO airCtz of {}", .{src_ty.fmt(mod)});
48184907 break :result dst_mcv;
......@@ -4844,155 +4933,216 @@ fn airCtz(self: *Self, inst: Air.Inst.Index) !void {
48444933 return self.finishAir(inst, result, .{ ty_op.operand, .none, .none });
48454934}
48464935
4847fn airPopcount(self: *Self, inst: Air.Inst.Index) !void {
4936fn airPopCount(self: *Self, inst: Air.Inst.Index) !void {
48484937 const mod = self.bin_file.options.module.?;
48494938 const ty_op = self.air.instructions.items(.data)[inst].ty_op;
48504939 const result: MCValue = result: {
4940 try self.spillEflagsIfOccupied();
4941
48514942 const src_ty = self.typeOf(ty_op.operand);
48524943 const src_abi_size: u32 = @intCast(src_ty.abiSize(mod));
4853 if (src_ty.zigTypeTag(mod) == .Vector or src_abi_size > 8)
4854 return self.fail("TODO implement airPopcount for {}", .{src_ty.fmt(mod)});
4944 if (src_ty.zigTypeTag(mod) == .Vector or src_abi_size > 16)
4945 return self.fail("TODO implement airPopCount for {}", .{src_ty.fmt(mod)});
48554946 const src_mcv = try self.resolveInst(ty_op.operand);
48564947
4857 if (self.hasFeature(.popcnt)) {
4858 const mat_src_mcv = switch (src_mcv) {
4859 .immediate => MCValue{ .register = try self.copyToTmpRegister(src_ty, src_mcv) },
4860 else => src_mcv,
4861 };
4862 const mat_src_lock = switch (mat_src_mcv) {
4863 .register => |reg| self.register_manager.lockReg(reg),
4864 else => null,
4865 };
4866 defer if (mat_src_lock) |lock| self.register_manager.unlockReg(lock);
4948 const mat_src_mcv = switch (src_mcv) {
4949 .immediate => MCValue{ .register = try self.copyToTmpRegister(src_ty, src_mcv) },
4950 else => src_mcv,
4951 };
4952 const mat_src_lock = switch (mat_src_mcv) {
4953 .register => |reg| self.register_manager.lockReg(reg),
4954 else => null,
4955 };
4956 defer if (mat_src_lock) |lock| self.register_manager.unlockReg(lock);
48674957
4868 const dst_mcv: MCValue =
4869 if (src_mcv.isRegister() and self.reuseOperand(inst, ty_op.operand, 0, src_mcv))
4870 src_mcv
4958 if (src_abi_size <= 8) {
4959 const dst_contains_src =
4960 src_mcv.isRegister() and self.reuseOperand(inst, ty_op.operand, 0, src_mcv);
4961 const dst_reg = if (dst_contains_src)
4962 src_mcv.getReg().?
48714963 else
4872 .{ .register = try self.register_manager.allocReg(inst, abi.RegisterClass.gp) };
4964 try self.register_manager.allocReg(inst, abi.RegisterClass.gp);
4965 const dst_lock = self.register_manager.lockReg(dst_reg);
4966 defer if (dst_lock) |lock| self.register_manager.unlockReg(lock);
48734967
4874 const popcnt_ty = if (src_abi_size > 1) src_ty else Type.u16;
4875 try self.genBinOpMir(.{ ._, .popcnt }, popcnt_ty, dst_mcv, mat_src_mcv);
4876 break :result dst_mcv;
4968 try self.genPopCount(dst_reg, src_ty, mat_src_mcv, dst_contains_src);
4969 break :result .{ .register = dst_reg };
48774970 }
48784971
4879 const mask = @as(u64, math.maxInt(u64)) >> @intCast(64 - src_abi_size * 8);
4880 const imm_0_1 = Immediate.u(mask / 0b1_1);
4881 const imm_00_11 = Immediate.u(mask / 0b01_01);
4882 const imm_0000_1111 = Immediate.u(mask / 0b0001_0001);
4883 const imm_0000_0001 = Immediate.u(mask / 0b1111_1111);
4972 assert(src_abi_size > 8 and src_abi_size <= 16);
4973 const tmp_regs = try self.register_manager.allocRegs(2, .{ inst, null }, abi.RegisterClass.gp);
4974 const tmp_locks = self.register_manager.lockRegsAssumeUnused(2, tmp_regs);
4975 defer for (tmp_locks) |lock| self.register_manager.unlockReg(lock);
48844976
4885 const dst_mcv = if (src_mcv.isRegister() and self.reuseOperand(inst, ty_op.operand, 0, src_mcv))
4886 src_mcv
4977 try self.genPopCount(tmp_regs[0], Type.usize, if (mat_src_mcv.isMemory())
4978 mat_src_mcv
48874979 else
4888 try self.copyToRegisterWithInstTracking(inst, src_ty, src_mcv);
4889 const dst_reg = dst_mcv.register;
4890 const dst_lock = self.register_manager.lockRegAssumeUnused(dst_reg);
4891 defer self.register_manager.unlockReg(dst_lock);
4980 .{ .register = mat_src_mcv.register_pair[0] }, false);
4981 try self.genPopCount(tmp_regs[1], Type.usize, if (mat_src_mcv.isMemory())
4982 mat_src_mcv.address().offset(8).deref()
4983 else
4984 .{ .register = mat_src_mcv.register_pair[1] }, false);
4985 try self.asmRegisterRegister(.{ ._, .add }, tmp_regs[0].to8(), tmp_regs[1].to8());
4986 break :result .{ .register = tmp_regs[0] };
4987 };
4988 return self.finishAir(inst, result, .{ ty_op.operand, .none, .none });
4989}
48924990
4893 const tmp_reg = try self.register_manager.allocReg(null, abi.RegisterClass.gp);
4894 const tmp_lock = self.register_manager.lockRegAssumeUnused(tmp_reg);
4895 defer self.register_manager.unlockReg(tmp_lock);
4991fn genPopCount(
4992 self: *Self,
4993 dst_reg: Register,
4994 src_ty: Type,
4995 src_mcv: MCValue,
4996 dst_contains_src: bool,
4997) !void {
4998 const mod = self.bin_file.options.module.?;
48964999
4897 {
4898 const dst = registerAlias(dst_reg, src_abi_size);
4899 const tmp = registerAlias(tmp_reg, src_abi_size);
4900 const imm = if (src_abi_size > 4)
4901 try self.register_manager.allocReg(null, abi.RegisterClass.gp)
4902 else
4903 undefined;
4904
4905 // dst = operand
4906 try self.asmRegisterRegister(.{ ._, .mov }, tmp, dst);
4907 // tmp = operand
4908 try self.asmRegisterImmediate(.{ ._r, .sh }, tmp, Immediate.u(1));
4909 // tmp = operand >> 1
4910 if (src_abi_size > 4) {
4911 try self.asmRegisterImmediate(.{ ._, .mov }, imm, imm_0_1);
4912 try self.asmRegisterRegister(.{ ._, .@"and" }, tmp, imm);
4913 } else try self.asmRegisterImmediate(.{ ._, .@"and" }, tmp, imm_0_1);
4914 // tmp = (operand >> 1) & 0x55...55
4915 try self.asmRegisterRegister(.{ ._, .sub }, dst, tmp);
4916 // dst = temp1 = operand - ((operand >> 1) & 0x55...55)
4917 try self.asmRegisterRegister(.{ ._, .mov }, tmp, dst);
4918 // tmp = temp1
4919 try self.asmRegisterImmediate(.{ ._r, .sh }, dst, Immediate.u(2));
4920 // dst = temp1 >> 2
4921 if (src_abi_size > 4) {
4922 try self.asmRegisterImmediate(.{ ._, .mov }, imm, imm_00_11);
4923 try self.asmRegisterRegister(.{ ._, .@"and" }, tmp, imm);
4924 try self.asmRegisterRegister(.{ ._, .@"and" }, dst, imm);
4925 } else {
4926 try self.asmRegisterImmediate(.{ ._, .@"and" }, tmp, imm_00_11);
4927 try self.asmRegisterImmediate(.{ ._, .@"and" }, dst, imm_00_11);
4928 }
4929 // tmp = temp1 & 0x33...33
4930 // dst = (temp1 >> 2) & 0x33...33
4931 try self.asmRegisterRegister(.{ ._, .add }, tmp, dst);
4932 // tmp = temp2 = (temp1 & 0x33...33) + ((temp1 >> 2) & 0x33...33)
4933 try self.asmRegisterRegister(.{ ._, .mov }, dst, tmp);
4934 // dst = temp2
4935 try self.asmRegisterImmediate(.{ ._r, .sh }, tmp, Immediate.u(4));
4936 // tmp = temp2 >> 4
4937 try self.asmRegisterRegister(.{ ._, .add }, dst, tmp);
4938 // dst = temp2 + (temp2 >> 4)
4939 if (src_abi_size > 4) {
4940 try self.asmRegisterImmediate(.{ ._, .mov }, imm, imm_0000_1111);
4941 try self.asmRegisterImmediate(.{ ._, .mov }, tmp, imm_0000_0001);
4942 try self.asmRegisterRegister(.{ ._, .@"and" }, dst, imm);
4943 try self.asmRegisterRegister(.{ .i_, .mul }, dst, tmp);
4944 } else {
4945 try self.asmRegisterImmediate(.{ ._, .@"and" }, dst, imm_0000_1111);
4946 if (src_abi_size > 1) {
4947 try self.asmRegisterRegisterImmediate(.{ .i_, .mul }, dst, dst, imm_0000_0001);
4948 }
4949 }
4950 // dst = temp3 = (temp2 + (temp2 >> 4)) & 0x0f...0f
4951 // dst = temp3 * 0x01...01
4952 if (src_abi_size > 1) {
4953 try self.asmRegisterImmediate(.{ ._r, .sh }, dst, Immediate.u((src_abi_size - 1) * 8));
4954 }
4955 // dst = (temp3 * 0x01...01) >> (bits - 8)
5000 const src_abi_size: u32 = @intCast(src_ty.abiSize(mod));
5001 if (self.hasFeature(.popcnt)) return self.genBinOpMir(
5002 .{ ._, .popcnt },
5003 if (src_abi_size > 1) src_ty else Type.u16,
5004 .{ .register = dst_reg },
5005 src_mcv,
5006 );
5007
5008 const mask = @as(u64, math.maxInt(u64)) >> @intCast(64 - src_abi_size * 8);
5009 const imm_0_1 = Immediate.u(mask / 0b1_1);
5010 const imm_00_11 = Immediate.u(mask / 0b01_01);
5011 const imm_0000_1111 = Immediate.u(mask / 0b0001_0001);
5012 const imm_0000_0001 = Immediate.u(mask / 0b1111_1111);
5013
5014 const tmp_reg = try self.register_manager.allocReg(null, abi.RegisterClass.gp);
5015 const tmp_lock = self.register_manager.lockRegAssumeUnused(tmp_reg);
5016 defer self.register_manager.unlockReg(tmp_lock);
5017
5018 const dst = registerAlias(dst_reg, src_abi_size);
5019 const tmp = registerAlias(tmp_reg, src_abi_size);
5020 const imm = if (src_abi_size > 4)
5021 try self.register_manager.allocReg(null, abi.RegisterClass.gp)
5022 else
5023 undefined;
5024
5025 if (!dst_contains_src) try self.genSetReg(dst, src_ty, src_mcv);
5026 // dst = operand
5027 try self.asmRegisterRegister(.{ ._, .mov }, tmp, dst);
5028 // tmp = operand
5029 try self.asmRegisterImmediate(.{ ._r, .sh }, tmp, Immediate.u(1));
5030 // tmp = operand >> 1
5031 if (src_abi_size > 4) {
5032 try self.asmRegisterImmediate(.{ ._, .mov }, imm, imm_0_1);
5033 try self.asmRegisterRegister(.{ ._, .@"and" }, tmp, imm);
5034 } else try self.asmRegisterImmediate(.{ ._, .@"and" }, tmp, imm_0_1);
5035 // tmp = (operand >> 1) & 0x55...55
5036 try self.asmRegisterRegister(.{ ._, .sub }, dst, tmp);
5037 // dst = temp1 = operand - ((operand >> 1) & 0x55...55)
5038 try self.asmRegisterRegister(.{ ._, .mov }, tmp, dst);
5039 // tmp = temp1
5040 try self.asmRegisterImmediate(.{ ._r, .sh }, dst, Immediate.u(2));
5041 // dst = temp1 >> 2
5042 if (src_abi_size > 4) {
5043 try self.asmRegisterImmediate(.{ ._, .mov }, imm, imm_00_11);
5044 try self.asmRegisterRegister(.{ ._, .@"and" }, tmp, imm);
5045 try self.asmRegisterRegister(.{ ._, .@"and" }, dst, imm);
5046 } else {
5047 try self.asmRegisterImmediate(.{ ._, .@"and" }, tmp, imm_00_11);
5048 try self.asmRegisterImmediate(.{ ._, .@"and" }, dst, imm_00_11);
5049 }
5050 // tmp = temp1 & 0x33...33
5051 // dst = (temp1 >> 2) & 0x33...33
5052 try self.asmRegisterRegister(.{ ._, .add }, tmp, dst);
5053 // tmp = temp2 = (temp1 & 0x33...33) + ((temp1 >> 2) & 0x33...33)
5054 try self.asmRegisterRegister(.{ ._, .mov }, dst, tmp);
5055 // dst = temp2
5056 try self.asmRegisterImmediate(.{ ._r, .sh }, tmp, Immediate.u(4));
5057 // tmp = temp2 >> 4
5058 try self.asmRegisterRegister(.{ ._, .add }, dst, tmp);
5059 // dst = temp2 + (temp2 >> 4)
5060 if (src_abi_size > 4) {
5061 try self.asmRegisterImmediate(.{ ._, .mov }, imm, imm_0000_1111);
5062 try self.asmRegisterImmediate(.{ ._, .mov }, tmp, imm_0000_0001);
5063 try self.asmRegisterRegister(.{ ._, .@"and" }, dst, imm);
5064 try self.asmRegisterRegister(.{ .i_, .mul }, dst, tmp);
5065 } else {
5066 try self.asmRegisterImmediate(.{ ._, .@"and" }, dst, imm_0000_1111);
5067 if (src_abi_size > 1) {
5068 try self.asmRegisterRegisterImmediate(.{ .i_, .mul }, dst, dst, imm_0000_0001);
49565069 }
4957 break :result dst_mcv;
4958 };
4959 return self.finishAir(inst, result, .{ ty_op.operand, .none, .none });
5070 }
5071 // dst = temp3 = (temp2 + (temp2 >> 4)) & 0x0f...0f
5072 // dst = temp3 * 0x01...01
5073 if (src_abi_size > 1) {
5074 try self.asmRegisterImmediate(.{ ._r, .sh }, dst, Immediate.u((src_abi_size - 1) * 8));
5075 }
5076 // dst = (temp3 * 0x01...01) >> (bits - 8)
49605077}
49615078
4962fn byteSwap(self: *Self, inst: Air.Inst.Index, src_ty: Type, src_mcv: MCValue, mem_ok: bool) !MCValue {
5079fn genByteSwap(
5080 self: *Self,
5081 inst: Air.Inst.Index,
5082 src_ty: Type,
5083 src_mcv: MCValue,
5084 mem_ok: bool,
5085) !MCValue {
49635086 const mod = self.bin_file.options.module.?;
49645087 const ty_op = self.air.instructions.items(.data)[inst].ty_op;
49655088
49665089 if (src_ty.zigTypeTag(mod) == .Vector) return self.fail(
4967 "TODO implement byteSwap for {}",
5090 "TODO implement genByteSwap for {}",
49685091 .{src_ty.fmt(mod)},
49695092 );
4970 const src_bits = self.regBitSize(src_ty);
5093 const abi_size: u32 = @intCast(src_ty.abiSize(mod));
49715094 const src_lock = switch (src_mcv) {
49725095 .register => |reg| self.register_manager.lockRegAssumeUnused(reg),
49735096 else => null,
49745097 };
49755098 defer if (src_lock) |lock| self.register_manager.unlockReg(lock);
49765099
4977 switch (src_bits) {
4978 else => return self.fail("TODO implement byteSwap for {}", .{
5100 switch (abi_size) {
5101 else => return self.fail("TODO implement genByteSwap for {}", .{
49795102 src_ty.fmt(mod),
49805103 }),
4981 8 => return if ((mem_ok or src_mcv.isRegister()) and
5104 1 => return if ((mem_ok or src_mcv.isRegister()) and
49825105 self.reuseOperand(inst, ty_op.operand, 0, src_mcv))
49835106 src_mcv
49845107 else
49855108 try self.copyToRegisterWithInstTracking(inst, src_ty, src_mcv),
4986 16 => if ((mem_ok or src_mcv.isRegister()) and
5109 2 => if ((mem_ok or src_mcv.isRegister()) and
49875110 self.reuseOperand(inst, ty_op.operand, 0, src_mcv))
49885111 {
49895112 try self.genBinOpMir(.{ ._l, .ro }, src_ty, src_mcv, .{ .immediate = 8 });
49905113 return src_mcv;
49915114 },
4992 32, 64 => if (src_mcv.isRegister() and self.reuseOperand(inst, ty_op.operand, 0, src_mcv)) {
5115 3...8 => if (src_mcv.isRegister() and self.reuseOperand(inst, ty_op.operand, 0, src_mcv)) {
49935116 try self.genUnOpMir(.{ ._, .bswap }, src_ty, src_mcv);
49945117 return src_mcv;
49955118 },
5119 9...16 => {
5120 switch (src_mcv) {
5121 .register_pair => |src_regs| if (self.reuseOperand(inst, ty_op.operand, 0, src_mcv)) {
5122 for (src_regs) |src_reg| try self.asmRegister(.{ ._, .bswap }, src_reg.to64());
5123 return .{ .register_pair = .{ src_regs[1], src_regs[0] } };
5124 },
5125 else => {},
5126 }
5127
5128 const dst_regs =
5129 try self.register_manager.allocRegs(2, .{ inst, inst }, abi.RegisterClass.gp);
5130 const dst_locks = self.register_manager.lockRegsAssumeUnused(2, dst_regs);
5131 defer for (dst_locks) |lock| self.register_manager.unlockReg(lock);
5132
5133 if (src_mcv.isMemory()) {
5134 try self.asmRegisterMemory(
5135 .{ ._, .movbe },
5136 dst_regs[0],
5137 src_mcv.address().offset(8).deref().mem(.qword),
5138 );
5139 try self.asmRegisterMemory(.{ ._, .movbe }, dst_regs[1], src_mcv.mem(.qword));
5140 } else for (dst_regs, src_mcv.register_pair) |dst_reg, src_reg| {
5141 try self.asmRegisterRegister(.{ ._, .mov }, dst_reg.to64(), src_reg.to64());
5142 try self.asmRegister(.{ ._, .bswap }, dst_reg.to64());
5143 }
5144 return .{ .register_pair = dst_regs };
5145 },
49965146 }
49975147
49985148 if (src_mcv.isRegister()) {
......@@ -5005,10 +5155,10 @@ fn byteSwap(self: *Self, inst: Air.Inst.Index, src_ty: Type, src_mcv: MCValue, m
50055155 defer self.register_manager.unlockReg(dst_lock);
50065156
50075157 try self.genSetReg(dst_mcv.register, src_ty, src_mcv);
5008 switch (src_bits) {
5158 switch (abi_size) {
50095159 else => unreachable,
5010 16 => try self.genBinOpMir(.{ ._l, .ro }, src_ty, dst_mcv, .{ .immediate = 8 }),
5011 32, 64 => try self.genUnOpMir(.{ ._, .bswap }, src_ty, dst_mcv),
5160 2 => try self.genBinOpMir(.{ ._l, .ro }, src_ty, dst_mcv, .{ .immediate = 8 }),
5161 3...8 => try self.genUnOpMir(.{ ._, .bswap }, src_ty, dst_mcv),
50125162 }
50135163 } else try self.genBinOpMir(.{ ._, .movbe }, src_ty, dst_mcv, src_mcv);
50145164 return dst_mcv;
......@@ -5028,18 +5178,19 @@ fn airByteSwap(self: *Self, inst: Air.Inst.Index) !void {
50285178 const ty_op = self.air.instructions.items(.data)[inst].ty_op;
50295179
50305180 const src_ty = self.typeOf(ty_op.operand);
5181 const abi_size: u32 = @intCast(src_ty.abiSize(mod));
5182 const bit_size: u32 = @intCast(src_ty.bitSize(mod));
50315183 const src_mcv = try self.resolveInst(ty_op.operand);
50325184
5033 const dst_mcv = try self.byteSwap(inst, src_ty, src_mcv, true);
5034 switch (self.regExtraBits(src_ty)) {
5035 0 => {},
5036 else => |extra| try self.genBinOpMir(
5037 if (src_ty.isSignedInt(mod)) .{ ._r, .sa } else .{ ._r, .sh },
5038 src_ty,
5039 dst_mcv,
5040 .{ .immediate = extra },
5041 ),
5042 }
5185 const dst_mcv = try self.genByteSwap(inst, src_ty, src_mcv, true);
5186
5187 const extra_bits = abi_size * 8 - bit_size;
5188 const signedness: std.builtin.Signedness =
5189 if (src_ty.isAbiInt(mod)) src_ty.intInfo(mod).signedness else .unsigned;
5190 if (extra_bits > 0) try self.genShiftBinOpMir(switch (signedness) {
5191 .signed => .{ ._r, .sa },
5192 .unsigned => .{ ._r, .sh },
5193 }, src_ty, dst_mcv, .{ .immediate = extra_bits });
50435194
50445195 return self.finishAir(inst, dst_mcv, .{ ty_op.operand, .none, .none });
50455196}
......@@ -5049,37 +5200,43 @@ fn airBitReverse(self: *Self, inst: Air.Inst.Index) !void {
50495200 const ty_op = self.air.instructions.items(.data)[inst].ty_op;
50505201
50515202 const src_ty = self.typeOf(ty_op.operand);
5052 const src_abi_size: u32 = @intCast(src_ty.abiSize(mod));
5203 const abi_size: u32 = @intCast(src_ty.abiSize(mod));
5204 const bit_size: u32 = @intCast(src_ty.bitSize(mod));
50535205 const src_mcv = try self.resolveInst(ty_op.operand);
50545206
5055 const dst_mcv = try self.byteSwap(inst, src_ty, src_mcv, false);
5056 const dst_reg = dst_mcv.register;
5057 const dst_lock = self.register_manager.lockRegAssumeUnused(dst_reg);
5058 defer self.register_manager.unlockReg(dst_lock);
5207 const dst_mcv = try self.genByteSwap(inst, src_ty, src_mcv, false);
5208 const dst_locks: [2]?RegisterLock = switch (dst_mcv) {
5209 .register => |dst_reg| .{ self.register_manager.lockReg(dst_reg), null },
5210 .register_pair => |dst_regs| self.register_manager.lockRegs(2, dst_regs),
5211 else => unreachable,
5212 };
5213 defer for (dst_locks) |dst_lock| if (dst_lock) |lock| self.register_manager.unlockReg(lock);
50595214
50605215 const tmp_reg = try self.register_manager.allocReg(null, abi.RegisterClass.gp);
50615216 const tmp_lock = self.register_manager.lockReg(tmp_reg);
50625217 defer if (tmp_lock) |lock| self.register_manager.unlockReg(lock);
50635218
5064 {
5065 const dst = registerAlias(dst_reg, src_abi_size);
5066 const tmp = registerAlias(tmp_reg, src_abi_size);
5067 const imm = if (src_abi_size > 4)
5068 try self.register_manager.allocReg(null, abi.RegisterClass.gp)
5069 else
5070 undefined;
5219 const limb_abi_size: u32 = @min(abi_size, 8);
5220 const tmp = registerAlias(tmp_reg, limb_abi_size);
5221 const imm = if (limb_abi_size > 4)
5222 try self.register_manager.allocReg(null, abi.RegisterClass.gp)
5223 else
5224 undefined;
5225
5226 const mask = @as(u64, math.maxInt(u64)) >> @intCast(64 - limb_abi_size * 8);
5227 const imm_0000_1111 = Immediate.u(mask / 0b0001_0001);
5228 const imm_00_11 = Immediate.u(mask / 0b01_01);
5229 const imm_0_1 = Immediate.u(mask / 0b1_1);
50715230
5072 const mask = @as(u64, math.maxInt(u64)) >> @intCast(64 - src_abi_size * 8);
5073 const imm_0000_1111 = Immediate.u(mask / 0b0001_0001);
5074 const imm_00_11 = Immediate.u(mask / 0b01_01);
5075 const imm_0_1 = Immediate.u(mask / 0b1_1);
5231 for (dst_mcv.getRegs()) |dst_reg| {
5232 const dst = registerAlias(dst_reg, limb_abi_size);
50765233
50775234 // dst = temp1 = bswap(operand)
50785235 try self.asmRegisterRegister(.{ ._, .mov }, tmp, dst);
50795236 // tmp = temp1
50805237 try self.asmRegisterImmediate(.{ ._r, .sh }, dst, Immediate.u(4));
50815238 // dst = temp1 >> 4
5082 if (src_abi_size > 4) {
5239 if (limb_abi_size > 4) {
50835240 try self.asmRegisterImmediate(.{ ._, .mov }, imm, imm_0000_1111);
50845241 try self.asmRegisterRegister(.{ ._, .@"and" }, tmp, imm);
50855242 try self.asmRegisterRegister(.{ ._, .@"and" }, dst, imm);
......@@ -5097,7 +5254,7 @@ fn airBitReverse(self: *Self, inst: Air.Inst.Index) !void {
50975254 // tmp = temp2
50985255 try self.asmRegisterImmediate(.{ ._r, .sh }, dst, Immediate.u(2));
50995256 // dst = temp2 >> 2
5100 if (src_abi_size > 4) {
5257 if (limb_abi_size > 4) {
51015258 try self.asmRegisterImmediate(.{ ._, .mov }, imm, imm_00_11);
51025259 try self.asmRegisterRegister(.{ ._, .@"and" }, tmp, imm);
51035260 try self.asmRegisterRegister(.{ ._, .@"and" }, dst, imm);
......@@ -5109,7 +5266,7 @@ fn airBitReverse(self: *Self, inst: Air.Inst.Index) !void {
51095266 // dst = (temp2 >> 2) & 0x33...33
51105267 try self.asmRegisterMemory(
51115268 .{ ._, .lea },
5112 if (src_abi_size > 4) tmp.to64() else tmp.to32(),
5269 if (limb_abi_size > 4) tmp.to64() else tmp.to32(),
51135270 Memory.sib(.qword, .{
51145271 .base = .{ .reg = dst.to64() },
51155272 .scale_index = .{ .index = tmp.to64(), .scale = 1 << 2 },
......@@ -5120,7 +5277,7 @@ fn airBitReverse(self: *Self, inst: Air.Inst.Index) !void {
51205277 // dst = temp3
51215278 try self.asmRegisterImmediate(.{ ._r, .sh }, tmp, Immediate.u(1));
51225279 // tmp = temp3 >> 1
5123 if (src_abi_size > 4) {
5280 if (limb_abi_size > 4) {
51245281 try self.asmRegisterImmediate(.{ ._, .mov }, imm, imm_0_1);
51255282 try self.asmRegisterRegister(.{ ._, .@"and" }, dst, imm);
51265283 try self.asmRegisterRegister(.{ ._, .@"and" }, tmp, imm);
......@@ -5132,7 +5289,7 @@ fn airBitReverse(self: *Self, inst: Air.Inst.Index) !void {
51325289 // tmp = (temp3 >> 1) & 0x55...55
51335290 try self.asmRegisterMemory(
51345291 .{ ._, .lea },
5135 if (src_abi_size > 4) dst.to64() else dst.to32(),
5292 if (limb_abi_size > 4) dst.to64() else dst.to32(),
51365293 Memory.sib(.qword, .{
51375294 .base = .{ .reg = tmp.to64() },
51385295 .scale_index = .{ .index = dst.to64(), .scale = 1 << 1 },
......@@ -5141,15 +5298,13 @@ fn airBitReverse(self: *Self, inst: Air.Inst.Index) !void {
51415298 // dst = ((temp3 >> 1) & 0x55...55) + ((temp3 & 0x55...55) << 1)
51425299 }
51435300
5144 switch (self.regExtraBits(src_ty)) {
5145 0 => {},
5146 else => |extra| try self.genBinOpMir(
5147 if (src_ty.isSignedInt(mod)) .{ ._r, .sa } else .{ ._r, .sh },
5148 src_ty,
5149 dst_mcv,
5150 .{ .immediate = extra },
5151 ),
5152 }
5301 const extra_bits = abi_size * 8 - bit_size;
5302 const signedness: std.builtin.Signedness =
5303 if (src_ty.isAbiInt(mod)) src_ty.intInfo(mod).signedness else .unsigned;
5304 if (extra_bits > 0) try self.genShiftBinOpMir(switch (signedness) {
5305 .signed => .{ ._r, .sa },
5306 .unsigned => .{ ._r, .sh },
5307 }, src_ty, dst_mcv, .{ .immediate = extra_bits });
51535308
51545309 return self.finishAir(inst, dst_mcv, .{ ty_op.operand, .none, .none });
51555310}
......@@ -5210,13 +5365,11 @@ fn floatSign(self: *Self, inst: Air.Inst.Index, operand: Air.Inst.Ref, ty: Type)
52105365 .child = (try mod.intType(.signed, scalar_bits)).ip_index,
52115366 });
52125367
5213 const sign_val = switch (tag) {
5368 const sign_mcv = try self.genTypedValue(.{ .ty = vec_ty, .val = switch (tag) {
52145369 .neg => try vec_ty.minInt(mod, vec_ty),
52155370 .abs => try vec_ty.maxInt(mod, vec_ty),
52165371 else => unreachable,
5217 };
5218
5219 const sign_mcv = try self.genTypedValue(.{ .ty = vec_ty, .val = sign_val });
5372 } });
52205373 const sign_mem = if (sign_mcv.isMemory())
52215374 sign_mcv.mem(Memory.PtrSize.fromSize(abi_size))
52225375 else
......@@ -5285,7 +5438,6 @@ fn floatSign(self: *Self, inst: Air.Inst.Index, operand: Air.Inst.Ref, ty: Type)
52855438fn airFloatSign(self: *Self, inst: Air.Inst.Index) !void {
52865439 const un_op = self.air.instructions.items(.data)[inst].un_op;
52875440 const ty = self.typeOf(un_op);
5288
52895441 return self.floatSign(inst, un_op, ty);
52905442}
52915443
......@@ -5305,7 +5457,7 @@ const RoundMode = packed struct(u5) {
53055457 precision: enum(u1) {
53065458 normal = 0b0,
53075459 inexact = 0b1,
5308 },
5460 } = .normal,
53095461};
53105462
53115463fn airRound(self: *Self, inst: Air.Inst.Index, mode: RoundMode) !void {
......@@ -5371,11 +5523,11 @@ fn genRoundLibcall(self: *Self, ty: Type, src_mcv: MCValue, mode: RoundMode) !MC
53715523 if (ty.zigTypeTag(mod) != .Float)
53725524 return self.fail("TODO implement genRound for {}", .{ty.fmt(mod)});
53735525
5374 var callee: ["__trunc?".len]u8 = undefined;
5526 var callee_buf: ["__trunc?".len]u8 = undefined;
53755527 return try self.genCall(.{ .lib = .{
53765528 .return_type = ty.toIntern(),
53775529 .param_types = &.{ty.toIntern()},
5378 .callee = std.fmt.bufPrint(&callee, "{s}{s}{s}", .{
5530 .callee = std.fmt.bufPrint(&callee_buf, "{s}{s}{s}", .{
53795531 floatLibcAbiPrefix(ty),
53805532 switch (mode.mode) {
53815533 .down => "floor",
......@@ -5586,11 +5738,11 @@ fn airSqrt(self: *Self, inst: Air.Inst.Index) !void {
55865738 80, 128 => true,
55875739 else => unreachable,
55885740 }) {
5589 var callee: ["__sqrt?".len]u8 = undefined;
5741 var callee_buf: ["__sqrt?".len]u8 = undefined;
55905742 break :result try self.genCall(.{ .lib = .{
55915743 .return_type = ty.toIntern(),
55925744 .param_types = &.{ty.toIntern()},
5593 .callee = std.fmt.bufPrint(&callee, "{s}sqrt{s}", .{
5745 .callee = std.fmt.bufPrint(&callee_buf, "{s}sqrt{s}", .{
55945746 floatLibcAbiPrefix(ty),
55955747 floatLibcAbiSuffix(ty),
55965748 }) catch unreachable,
......@@ -5623,7 +5775,7 @@ fn airSqrt(self: *Self, inst: Air.Inst.Index) !void {
56235775 .{ .v_, .cvtps2ph },
56245776 dst_reg,
56255777 dst_reg,
5626 Immediate.u(0b1_00),
5778 Immediate.u(@as(u5, @bitCast(RoundMode{ .mode = .mxcsr }))),
56275779 );
56285780 break :result dst_mcv;
56295781 },
......@@ -5653,7 +5805,7 @@ fn airSqrt(self: *Self, inst: Air.Inst.Index) !void {
56535805 .{ .v_, .cvtps2ph },
56545806 dst_reg,
56555807 dst_reg,
5656 Immediate.u(0b1_00),
5808 Immediate.u(@as(u5, @bitCast(RoundMode{ .mode = .mxcsr }))),
56575809 );
56585810 break :result dst_mcv;
56595811 },
......@@ -5678,7 +5830,7 @@ fn airSqrt(self: *Self, inst: Air.Inst.Index) !void {
56785830 .{ .v_, .cvtps2ph },
56795831 dst_reg,
56805832 wide_reg,
5681 Immediate.u(0b1_00),
5833 Immediate.u(@as(u5, @bitCast(RoundMode{ .mode = .mxcsr }))),
56825834 );
56835835 break :result dst_mcv;
56845836 },
......@@ -5741,11 +5893,11 @@ fn airSqrt(self: *Self, inst: Air.Inst.Index) !void {
57415893fn airUnaryMath(self: *Self, inst: Air.Inst.Index, tag: Air.Inst.Tag) !void {
57425894 const un_op = self.air.instructions.items(.data)[inst].un_op;
57435895 const ty = self.typeOf(un_op);
5744 var callee: ["__round?".len]u8 = undefined;
5896 var callee_buf: ["__round?".len]u8 = undefined;
57455897 const result = try self.genCall(.{ .lib = .{
57465898 .return_type = ty.toIntern(),
57475899 .param_types = &.{ty.toIntern()},
5748 .callee = std.fmt.bufPrint(&callee, "{s}{s}{s}", .{
5900 .callee = std.fmt.bufPrint(&callee_buf, "{s}{s}{s}", .{
57495901 floatLibcAbiPrefix(ty),
57505902 switch (tag) {
57515903 .sin,
......@@ -5782,7 +5934,7 @@ fn reuseOperandAdvanced(
57825934 operand: Air.Inst.Ref,
57835935 op_index: Liveness.OperandInt,
57845936 mcv: MCValue,
5785 tracked_inst: Air.Inst.Index,
5937 maybe_tracked_inst: ?Air.Inst.Index,
57865938) bool {
57875939 if (!self.liveness.operandDies(inst, op_index))
57885940 return false;
......@@ -5791,11 +5943,13 @@ fn reuseOperandAdvanced(
57915943 .register, .register_pair => for (mcv.getRegs()) |reg| {
57925944 // If it's in the registers table, need to associate the register(s) with the
57935945 // new instruction.
5794 if (!self.register_manager.isRegFree(reg)) {
5795 if (RegisterManager.indexOfRegIntoTracked(reg)) |index| {
5796 self.register_manager.registers[index] = tracked_inst;
5946 if (maybe_tracked_inst) |tracked_inst| {
5947 if (!self.register_manager.isRegFree(reg)) {
5948 if (RegisterManager.indexOfRegIntoTracked(reg)) |index| {
5949 self.register_manager.registers[index] = tracked_inst;
5950 }
57975951 }
5798 }
5952 } else self.register_manager.freeReg(reg);
57995953 },
58005954 .load_frame => |frame_addr| if (frame_addr.index.isNamed()) return false,
58015955 else => return false,
......@@ -5804,7 +5958,7 @@ fn reuseOperandAdvanced(
58045958 // Prevent the operand deaths processing code from deallocating it.
58055959 self.liveness.clearOperandDeath(inst, op_index);
58065960 const op_inst = Air.refToIndex(operand).?;
5807 self.getResolvedInstValue(op_inst).reuse(self, tracked_inst, op_inst);
5961 self.getResolvedInstValue(op_inst).reuse(self, maybe_tracked_inst, op_inst);
58085962
58095963 return true;
58105964}
......@@ -6934,11 +7088,11 @@ fn genMulDivBinOp(
69347088 ),
69357089 else => {},
69367090 };
6937 var callee: ["__udiv?i3".len]u8 = undefined;
7091 var callee_buf: ["__udiv?i3".len]u8 = undefined;
69387092 return try self.genCall(.{ .lib = .{
69397093 .return_type = dst_ty.toIntern(),
69407094 .param_types = &.{ src_ty.toIntern(), src_ty.toIntern() },
6941 .callee = std.fmt.bufPrint(&callee, "__{s}{s}{c}i3", .{
7095 .callee = std.fmt.bufPrint(&callee_buf, "__{s}{s}{c}i3", .{
69427096 if (signed) "" else "u",
69437097 switch (tag) {
69447098 .div_trunc, .div_exact => "div",
......@@ -7161,43 +7315,163 @@ fn genBinOp(
71617315 const rhs_ty = self.typeOf(rhs_air);
71627316 const abi_size: u32 = @intCast(lhs_ty.abiSize(mod));
71637317
7164 if (lhs_ty.isRuntimeFloat() and (air_tag == .rem or switch (lhs_ty.floatBits(self.target.*)) {
7165 16 => !self.hasFeature(.f16c),
7166 32, 64 => false,
7167 80, 128 => true,
7168 else => unreachable,
7169 })) {
7170 var callee: ["__mod?f3".len]u8 = undefined;
7318 if (lhs_ty.isRuntimeFloat()) libcall: {
7319 const float_bits = lhs_ty.floatBits(self.target.*);
7320 const type_needs_libcall = switch (float_bits) {
7321 16 => !self.hasFeature(.f16c),
7322 32, 64 => false,
7323 80, 128 => true,
7324 else => unreachable,
7325 };
7326 switch (air_tag) {
7327 .rem, .mod => {},
7328 else => if (!type_needs_libcall) break :libcall,
7329 }
7330 var callee_buf: ["__mod?f3".len]u8 = undefined;
7331 const callee = switch (air_tag) {
7332 .add,
7333 .sub,
7334 .mul,
7335 .div_float,
7336 .div_trunc,
7337 .div_floor,
7338 => std.fmt.bufPrint(&callee_buf, "__{s}{c}f3", .{
7339 @tagName(air_tag)[0..3],
7340 floatCompilerRtAbiName(float_bits),
7341 }),
7342 .rem, .mod, .min, .max => std.fmt.bufPrint(&callee_buf, "{s}f{s}{s}", .{
7343 floatLibcAbiPrefix(lhs_ty),
7344 switch (air_tag) {
7345 .rem, .mod => "mod",
7346 .min => "min",
7347 .max => "max",
7348 else => unreachable,
7349 },
7350 floatLibcAbiSuffix(lhs_ty),
7351 }),
7352 else => return self.fail("TODO implement genBinOp for {s} {}", .{
7353 @tagName(air_tag), lhs_ty.fmt(mod),
7354 }),
7355 } catch unreachable;
71717356 const result = try self.genCall(.{ .lib = .{
71727357 .return_type = lhs_ty.toIntern(),
71737358 .param_types = &.{ lhs_ty.toIntern(), rhs_ty.toIntern() },
7174 .callee = switch (air_tag) {
7175 .add,
7176 .sub,
7177 .mul,
7178 .div_float,
7179 .div_trunc,
7180 .div_floor,
7181 => std.fmt.bufPrint(&callee, "__{s}{c}f3", .{
7182 @tagName(air_tag)[0..3],
7183 floatCompilerRtAbiName(lhs_ty.floatBits(self.target.*)),
7184 }),
7185 .rem, .min, .max => std.fmt.bufPrint(&callee, "{s}f{s}{s}", .{
7186 floatLibcAbiPrefix(lhs_ty),
7187 switch (air_tag) {
7188 .rem => "mod",
7189 .min => "min",
7190 .max => "max",
7191 else => unreachable,
7192 },
7193 floatLibcAbiSuffix(lhs_ty),
7194 }),
7195 else => return self.fail("TODO implement genBinOp for {s} {}", .{
7196 @tagName(air_tag), lhs_ty.fmt(mod),
7197 }),
7198 } catch unreachable,
7359 .callee = callee,
71997360 } }, &.{ lhs_ty, rhs_ty }, &.{ .{ .air_ref = lhs_air }, .{ .air_ref = rhs_air } });
72007361 return switch (air_tag) {
7362 .mod => result: {
7363 const adjusted: MCValue = if (type_needs_libcall) adjusted: {
7364 var add_callee_buf: ["__add?f3".len]u8 = undefined;
7365 break :adjusted try self.genCall(.{ .lib = .{
7366 .return_type = lhs_ty.toIntern(),
7367 .param_types = &.{
7368 lhs_ty.toIntern(),
7369 rhs_ty.toIntern(),
7370 },
7371 .callee = std.fmt.bufPrint(&add_callee_buf, "__add{c}f3", .{
7372 floatCompilerRtAbiName(float_bits),
7373 }) catch unreachable,
7374 } }, &.{ lhs_ty, rhs_ty }, &.{ result, .{ .air_ref = rhs_air } });
7375 } else switch (float_bits) {
7376 16, 32, 64 => adjusted: {
7377 const dst_reg = switch (result) {
7378 .register => |reg| reg,
7379 else => if (maybe_inst) |inst|
7380 (try self.copyToRegisterWithInstTracking(inst, lhs_ty, result)).register
7381 else
7382 try self.copyToTmpRegister(lhs_ty, result),
7383 };
7384 const dst_lock = self.register_manager.lockReg(dst_reg);
7385 defer if (dst_lock) |lock| self.register_manager.unlockReg(lock);
7386
7387 const rhs_mcv = try self.resolveInst(rhs_air);
7388 const src_mcv: MCValue = if (float_bits == 16) src: {
7389 assert(self.hasFeature(.f16c));
7390 const tmp_reg = (try self.register_manager.allocReg(
7391 null,
7392 abi.RegisterClass.sse,
7393 )).to128();
7394 const tmp_lock = self.register_manager.lockRegAssumeUnused(tmp_reg);
7395 defer self.register_manager.unlockReg(tmp_lock);
7396
7397 if (rhs_mcv.isMemory()) try self.asmRegisterRegisterMemoryImmediate(
7398 .{ .vp_w, .insr },
7399 dst_reg,
7400 dst_reg,
7401 rhs_mcv.mem(.word),
7402 Immediate.u(1),
7403 ) else try self.asmRegisterRegisterRegister(
7404 .{ .vp_, .unpcklwd },
7405 dst_reg,
7406 dst_reg,
7407 (if (rhs_mcv.isRegister())
7408 rhs_mcv.getReg().?
7409 else
7410 try self.copyToTmpRegister(rhs_ty, rhs_mcv)).to128(),
7411 );
7412 try self.asmRegisterRegister(.{ .v_ps, .cvtph2 }, dst_reg, dst_reg);
7413 break :src .{ .register = tmp_reg };
7414 } else rhs_mcv;
7415
7416 if (self.hasFeature(.avx)) {
7417 const mir_tag: Mir.Inst.FixedTag = switch (float_bits) {
7418 16, 32 => .{ .v_ss, .add },
7419 64 => .{ .v_sd, .add },
7420 else => unreachable,
7421 };
7422 if (src_mcv.isMemory()) try self.asmRegisterRegisterMemory(
7423 mir_tag,
7424 dst_reg,
7425 dst_reg,
7426 src_mcv.mem(Memory.PtrSize.fromBitSize(float_bits)),
7427 ) else try self.asmRegisterRegisterRegister(
7428 mir_tag,
7429 dst_reg,
7430 dst_reg,
7431 (if (src_mcv.isRegister())
7432 src_mcv.getReg().?
7433 else
7434 try self.copyToTmpRegister(rhs_ty, src_mcv)).to128(),
7435 );
7436 } else {
7437 const mir_tag: Mir.Inst.FixedTag = switch (float_bits) {
7438 32 => .{ ._ss, .add },
7439 64 => .{ ._sd, .add },
7440 else => unreachable,
7441 };
7442 if (src_mcv.isMemory()) try self.asmRegisterMemory(
7443 mir_tag,
7444 dst_reg,
7445 src_mcv.mem(Memory.PtrSize.fromBitSize(float_bits)),
7446 ) else try self.asmRegisterRegister(
7447 mir_tag,
7448 dst_reg,
7449 (if (src_mcv.isRegister())
7450 src_mcv.getReg().?
7451 else
7452 try self.copyToTmpRegister(rhs_ty, src_mcv)).to128(),
7453 );
7454 }
7455
7456 if (float_bits == 16) try self.asmRegisterRegisterImmediate(
7457 .{ .v_, .cvtps2ph },
7458 dst_reg,
7459 dst_reg,
7460 Immediate.u(@as(u5, @bitCast(RoundMode{ .mode = .mxcsr }))),
7461 );
7462 break :adjusted .{ .register = dst_reg };
7463 },
7464 80, 128 => return self.fail("TODO implement genBinOp for {s} of {}", .{
7465 @tagName(air_tag), lhs_ty.fmt(mod),
7466 }),
7467 else => unreachable,
7468 };
7469 break :result try self.genCall(.{ .lib = .{
7470 .return_type = lhs_ty.toIntern(),
7471 .param_types = &.{ lhs_ty.toIntern(), rhs_ty.toIntern() },
7472 .callee = callee,
7473 } }, &.{ lhs_ty, rhs_ty }, &.{ adjusted, .{ .air_ref = rhs_air } });
7474 },
72017475 .div_trunc, .div_floor => try self.genRoundLibcall(lhs_ty, result, .{
72027476 .mode = switch (air_tag) {
72037477 .div_trunc => .zero,
......@@ -7219,6 +7493,7 @@ fn genBinOp(
72197493
72207494 const maybe_mask_reg = switch (air_tag) {
72217495 else => null,
7496 .rem, .mod => unreachable,
72227497 .max, .min => if (lhs_ty.scalarType(mod).isRuntimeFloat()) registerAlias(
72237498 if (!self.hasFeature(.avx) and self.hasFeature(.sse4_1)) mask: {
72247499 try self.register_manager.getReg(.xmm0, null);
......@@ -7226,20 +7501,23 @@ fn genBinOp(
72267501 } else try self.register_manager.allocReg(null, abi.RegisterClass.sse),
72277502 abi_size,
72287503 ) else null,
7229 .rem, .mod => return self.fail("TODO implement genBinOp for {s} {}", .{
7230 @tagName(air_tag), lhs_ty.fmt(mod),
7231 }),
72327504 };
72337505 const mask_lock =
72347506 if (maybe_mask_reg) |mask_reg| self.register_manager.lockRegAssumeUnused(mask_reg) else null;
72357507 defer if (mask_lock) |lock| self.register_manager.unlockReg(lock);
72367508
7237 const lhs_mcv = try self.resolveInst(lhs_air);
7238 const rhs_mcv = try self.resolveInst(rhs_air);
7509 const ordered_air = if (lhs_ty.isVector(mod) and lhs_ty.childType(mod).isAbiInt(mod) and
7510 switch (air_tag) {
7511 .cmp_lt, .cmp_gte => true,
7512 else => false,
7513 }) .{ .lhs = rhs_air, .rhs = lhs_air } else .{ .lhs = lhs_air, .rhs = rhs_air };
7514
7515 const lhs_mcv = try self.resolveInst(ordered_air.lhs);
7516 const rhs_mcv = try self.resolveInst(ordered_air.rhs);
72397517 switch (lhs_mcv) {
72407518 .immediate => |imm| switch (imm) {
72417519 0 => switch (air_tag) {
7242 .sub, .sub_wrap => return self.genUnOp(maybe_inst, .neg, rhs_air),
7520 .sub, .sub_wrap => return self.genUnOp(maybe_inst, .neg, ordered_air.rhs),
72437521 else => {},
72447522 },
72457523 else => {},
......@@ -7288,11 +7566,15 @@ fn genBinOp(
72887566 var copied_to_dst = true;
72897567 const dst_mcv: MCValue = dst: {
72907568 if (maybe_inst) |inst| {
7291 if ((!vec_op or lhs_mcv.isRegister()) and self.reuseOperand(inst, lhs_air, 0, lhs_mcv)) {
7569 const tracked_inst = switch (air_tag) {
7570 else => inst,
7571 .cmp_lt, .cmp_lte, .cmp_eq, .cmp_gte, .cmp_gt, .cmp_neq => null,
7572 };
7573 if ((!vec_op or lhs_mcv.isRegister()) and
7574 self.reuseOperandAdvanced(inst, ordered_air.lhs, 0, lhs_mcv, tracked_inst))
72927575 break :dst lhs_mcv;
7293 }
72947576 if (is_commutative and (!vec_op or rhs_mcv.isRegister()) and
7295 self.reuseOperand(inst, rhs_air, 1, rhs_mcv))
7577 self.reuseOperandAdvanced(inst, ordered_air.rhs, 1, rhs_mcv, tracked_inst))
72967578 {
72977579 flipped = true;
72987580 break :dst rhs_mcv;
......@@ -7613,7 +7895,7 @@ fn genBinOp(
76137895 .{ .v_, .cvtps2ph },
76147896 dst_reg,
76157897 dst_reg,
7616 Immediate.u(0b1_00),
7898 Immediate.u(@as(u5, @bitCast(RoundMode{ .mode = .mxcsr }))),
76177899 );
76187900 return dst_mcv;
76197901 },
......@@ -7657,7 +7939,10 @@ fn genBinOp(
76577939 .sub,
76587940 .sub_wrap,
76597941 => if (self.hasFeature(.avx)) .{ .vp_b, .sub } else .{ .p_b, .sub },
7660 .bit_and => if (self.hasFeature(.avx)) .{ .vp_, .@"and" } else .{ .p_, .@"and" },
7942 .bit_and => if (self.hasFeature(.avx))
7943 .{ .vp_, .@"and" }
7944 else
7945 .{ .p_, .@"and" },
76617946 .bit_or => if (self.hasFeature(.avx)) .{ .vp_, .@"or" } else .{ .p_, .@"or" },
76627947 .xor => if (self.hasFeature(.avx)) .{ .vp_, .xor } else .{ .p_, .xor },
76637948 .min => switch (lhs_ty.childType(mod).intInfo(mod).signedness) {
......@@ -7688,6 +7973,20 @@ fn genBinOp(
76887973 else
76897974 null,
76907975 },
7976 .cmp_lt,
7977 .cmp_lte,
7978 .cmp_gte,
7979 .cmp_gt,
7980 => switch (lhs_ty.childType(mod).intInfo(mod).signedness) {
7981 .signed => if (self.hasFeature(.avx))
7982 .{ .vp_b, .cmpgt }
7983 else
7984 .{ .p_b, .cmpgt },
7985 .unsigned => null,
7986 },
7987 .cmp_eq,
7988 .cmp_neq,
7989 => if (self.hasFeature(.avx)) .{ .vp_b, .cmpeq } else .{ .p_b, .cmpeq },
76917990 else => null,
76927991 },
76937992 17...32 => switch (air_tag) {
......@@ -7708,6 +8007,17 @@ fn genBinOp(
77088007 .signed => if (self.hasFeature(.avx2)) .{ .vp_b, .maxs } else null,
77098008 .unsigned => if (self.hasFeature(.avx2)) .{ .vp_b, .maxu } else null,
77108009 },
8010 .cmp_lt,
8011 .cmp_lte,
8012 .cmp_gte,
8013 .cmp_gt,
8014 => switch (lhs_ty.childType(mod).intInfo(mod).signedness) {
8015 .signed => if (self.hasFeature(.avx)) .{ .vp_b, .cmpgt } else null,
8016 .unsigned => null,
8017 },
8018 .cmp_eq,
8019 .cmp_neq,
8020 => if (self.hasFeature(.avx)) .{ .vp_b, .cmpeq } else null,
77118021 else => null,
77128022 },
77138023 else => null,
......@@ -7723,7 +8033,10 @@ fn genBinOp(
77238033 .mul,
77248034 .mul_wrap,
77258035 => if (self.hasFeature(.avx)) .{ .vp_w, .mull } else .{ .p_d, .mull },
7726 .bit_and => if (self.hasFeature(.avx)) .{ .vp_, .@"and" } else .{ .p_, .@"and" },
8036 .bit_and => if (self.hasFeature(.avx))
8037 .{ .vp_, .@"and" }
8038 else
8039 .{ .p_, .@"and" },
77278040 .bit_or => if (self.hasFeature(.avx)) .{ .vp_, .@"or" } else .{ .p_, .@"or" },
77288041 .xor => if (self.hasFeature(.avx)) .{ .vp_, .xor } else .{ .p_, .xor },
77298042 .min => switch (lhs_ty.childType(mod).intInfo(mod).signedness) {
......@@ -7746,6 +8059,20 @@ fn genBinOp(
77468059 else
77478060 .{ .p_w, .maxu },
77488061 },
8062 .cmp_lt,
8063 .cmp_lte,
8064 .cmp_gte,
8065 .cmp_gt,
8066 => switch (lhs_ty.childType(mod).intInfo(mod).signedness) {
8067 .signed => if (self.hasFeature(.avx))
8068 .{ .vp_w, .cmpgt }
8069 else
8070 .{ .p_w, .cmpgt },
8071 .unsigned => null,
8072 },
8073 .cmp_eq,
8074 .cmp_neq,
8075 => if (self.hasFeature(.avx)) .{ .vp_w, .cmpeq } else .{ .p_w, .cmpeq },
77498076 else => null,
77508077 },
77518078 9...16 => switch (air_tag) {
......@@ -7769,6 +8096,17 @@ fn genBinOp(
77698096 .signed => if (self.hasFeature(.avx2)) .{ .vp_w, .maxs } else null,
77708097 .unsigned => if (self.hasFeature(.avx2)) .{ .vp_w, .maxu } else null,
77718098 },
8099 .cmp_lt,
8100 .cmp_lte,
8101 .cmp_gte,
8102 .cmp_gt,
8103 => switch (lhs_ty.childType(mod).intInfo(mod).signedness) {
8104 .signed => if (self.hasFeature(.avx)) .{ .vp_w, .cmpgt } else null,
8105 .unsigned => null,
8106 },
8107 .cmp_eq,
8108 .cmp_neq,
8109 => if (self.hasFeature(.avx)) .{ .vp_w, .cmpeq } else null,
77728110 else => null,
77738111 },
77748112 else => null,
......@@ -7789,7 +8127,10 @@ fn genBinOp(
77898127 .{ .p_d, .mull }
77908128 else
77918129 null,
7792 .bit_and => if (self.hasFeature(.avx)) .{ .vp_, .@"and" } else .{ .p_, .@"and" },
8130 .bit_and => if (self.hasFeature(.avx))
8131 .{ .vp_, .@"and" }
8132 else
8133 .{ .p_, .@"and" },
77938134 .bit_or => if (self.hasFeature(.avx)) .{ .vp_, .@"or" } else .{ .p_, .@"or" },
77948135 .xor => if (self.hasFeature(.avx)) .{ .vp_, .xor } else .{ .p_, .xor },
77958136 .min => switch (lhs_ty.childType(mod).intInfo(mod).signedness) {
......@@ -7820,6 +8161,20 @@ fn genBinOp(
78208161 else
78218162 null,
78228163 },
8164 .cmp_lt,
8165 .cmp_lte,
8166 .cmp_gte,
8167 .cmp_gt,
8168 => switch (lhs_ty.childType(mod).intInfo(mod).signedness) {
8169 .signed => if (self.hasFeature(.avx))
8170 .{ .vp_d, .cmpgt }
8171 else
8172 .{ .p_d, .cmpgt },
8173 .unsigned => null,
8174 },
8175 .cmp_eq,
8176 .cmp_neq,
8177 => if (self.hasFeature(.avx)) .{ .vp_d, .cmpeq } else .{ .p_d, .cmpeq },
78238178 else => null,
78248179 },
78258180 5...8 => switch (air_tag) {
......@@ -7843,6 +8198,17 @@ fn genBinOp(
78438198 .signed => if (self.hasFeature(.avx2)) .{ .vp_d, .maxs } else null,
78448199 .unsigned => if (self.hasFeature(.avx2)) .{ .vp_d, .maxu } else null,
78458200 },
8201 .cmp_lt,
8202 .cmp_lte,
8203 .cmp_gte,
8204 .cmp_gt,
8205 => switch (lhs_ty.childType(mod).intInfo(mod).signedness) {
8206 .signed => if (self.hasFeature(.avx)) .{ .vp_d, .cmpgt } else null,
8207 .unsigned => null,
8208 },
8209 .cmp_eq,
8210 .cmp_neq,
8211 => if (self.hasFeature(.avx)) .{ .vp_d, .cmpeq } else null,
78468212 else => null,
78478213 },
78488214 else => null,
......@@ -7855,9 +8221,33 @@ fn genBinOp(
78558221 .sub,
78568222 .sub_wrap,
78578223 => if (self.hasFeature(.avx)) .{ .vp_q, .sub } else .{ .p_q, .sub },
7858 .bit_and => if (self.hasFeature(.avx)) .{ .vp_, .@"and" } else .{ .p_, .@"and" },
8224 .bit_and => if (self.hasFeature(.avx))
8225 .{ .vp_, .@"and" }
8226 else
8227 .{ .p_, .@"and" },
78598228 .bit_or => if (self.hasFeature(.avx)) .{ .vp_, .@"or" } else .{ .p_, .@"or" },
78608229 .xor => if (self.hasFeature(.avx)) .{ .vp_, .xor } else .{ .p_, .xor },
8230 .cmp_lt,
8231 .cmp_lte,
8232 .cmp_gte,
8233 .cmp_gt,
8234 => switch (lhs_ty.childType(mod).intInfo(mod).signedness) {
8235 .signed => if (self.hasFeature(.avx))
8236 .{ .vp_q, .cmpgt }
8237 else if (self.hasFeature(.sse4_2))
8238 .{ .p_q, .cmpgt }
8239 else
8240 null,
8241 .unsigned => null,
8242 },
8243 .cmp_eq,
8244 .cmp_neq,
8245 => if (self.hasFeature(.avx))
8246 .{ .vp_q, .cmpeq }
8247 else if (self.hasFeature(.sse4_1))
8248 .{ .p_q, .cmpeq }
8249 else
8250 null,
78618251 else => null,
78628252 },
78638253 3...4 => switch (air_tag) {
......@@ -7870,6 +8260,17 @@ fn genBinOp(
78708260 .bit_and => if (self.hasFeature(.avx2)) .{ .vp_, .@"and" } else null,
78718261 .bit_or => if (self.hasFeature(.avx2)) .{ .vp_, .@"or" } else null,
78728262 .xor => if (self.hasFeature(.avx2)) .{ .vp_, .xor } else null,
8263 .cmp_eq,
8264 .cmp_neq,
8265 => if (self.hasFeature(.avx)) .{ .vp_d, .cmpeq } else null,
8266 .cmp_lt,
8267 .cmp_lte,
8268 .cmp_gt,
8269 .cmp_gte,
8270 => switch (lhs_ty.childType(mod).intInfo(mod).signedness) {
8271 .signed => if (self.hasFeature(.avx)) .{ .vp_d, .cmpgt } else null,
8272 .unsigned => null,
8273 },
78738274 else => null,
78748275 },
78758276 else => null,
......@@ -7923,7 +8324,7 @@ fn genBinOp(
79238324 .{ .v_, .cvtps2ph },
79248325 dst_reg,
79258326 dst_reg,
7926 Immediate.u(0b1_00),
8327 Immediate.u(@as(u5, @bitCast(RoundMode{ .mode = .mxcsr }))),
79278328 );
79288329 return dst_mcv;
79298330 },
......@@ -7974,7 +8375,7 @@ fn genBinOp(
79748375 .{ .v_, .cvtps2ph },
79758376 dst_reg,
79768377 dst_reg,
7977 Immediate.u(0b1_00),
8378 Immediate.u(@as(u5, @bitCast(RoundMode{ .mode = .mxcsr }))),
79788379 );
79798380 return dst_mcv;
79808381 },
......@@ -8017,7 +8418,7 @@ fn genBinOp(
80178418 .{ .v_, .cvtps2ph },
80188419 dst_reg,
80198420 dst_reg,
8020 Immediate.u(0b1_00),
8421 Immediate.u(@as(u5, @bitCast(RoundMode{ .mode = .mxcsr }))),
80218422 );
80228423 return dst_mcv;
80238424 },
......@@ -8060,7 +8461,7 @@ fn genBinOp(
80608461 .{ .v_, .cvtps2ph },
80618462 dst_reg,
80628463 dst_reg.to256(),
8063 Immediate.u(0b1_00),
8464 Immediate.u(@as(u5, @bitCast(RoundMode{ .mode = .mxcsr }))),
80648465 );
80658466 return dst_mcv;
80668467 },
......@@ -8435,6 +8836,62 @@ fn genBinOp(
84358836 );
84368837 }
84378838 },
8839 .cmp_lt,
8840 .cmp_lte,
8841 .cmp_eq,
8842 .cmp_gte,
8843 .cmp_gt,
8844 .cmp_neq,
8845 => {
8846 switch (air_tag) {
8847 .cmp_lt,
8848 .cmp_eq,
8849 .cmp_gt,
8850 => {},
8851 .cmp_lte,
8852 .cmp_gte,
8853 .cmp_neq,
8854 => {
8855 const unsigned_ty = try lhs_ty.toUnsigned(mod);
8856 const not_mcv = try self.genTypedValue(.{
8857 .ty = lhs_ty,
8858 .val = try unsigned_ty.maxInt(mod, unsigned_ty),
8859 });
8860 const not_mem = if (not_mcv.isMemory())
8861 not_mcv.mem(Memory.PtrSize.fromSize(abi_size))
8862 else
8863 Memory.sib(Memory.PtrSize.fromSize(abi_size), .{ .base = .{
8864 .reg = try self.copyToTmpRegister(Type.usize, not_mcv.address()),
8865 } });
8866 switch (mir_tag[0]) {
8867 .vp_b, .vp_d, .vp_q, .vp_w => try self.asmRegisterRegisterMemory(
8868 .{ .vp_, .xor },
8869 dst_reg,
8870 dst_reg,
8871 not_mem,
8872 ),
8873 .p_b, .p_d, .p_q, .p_w => try self.asmRegisterMemory(
8874 .{ .p_, .xor },
8875 dst_reg,
8876 not_mem,
8877 ),
8878 else => unreachable,
8879 }
8880 },
8881 else => unreachable,
8882 }
8883
8884 const gp_reg = try self.register_manager.allocReg(maybe_inst, abi.RegisterClass.gp);
8885 const gp_lock = self.register_manager.lockRegAssumeUnused(gp_reg);
8886 defer self.register_manager.unlockReg(gp_lock);
8887
8888 try self.asmRegisterRegister(switch (mir_tag[0]) {
8889 .vp_b, .vp_d, .vp_q, .vp_w => .{ .vp_b, .movmsk },
8890 .p_b, .p_d, .p_q, .p_w => .{ .p_b, .movmsk },
8891 else => unreachable,
8892 }, gp_reg.to32(), dst_reg);
8893 return .{ .register = gp_reg };
8894 },
84388895 else => unreachable,
84398896 }
84408897
......@@ -9378,11 +9835,11 @@ fn airCmp(self: *Self, inst: Air.Inst.Index, op: math.CompareOperator) !void {
93789835 80, 128 => true,
93799836 else => unreachable,
93809837 }) {
9381 var callee: ["__???f2".len]u8 = undefined;
9838 var callee_buf: ["__???f2".len]u8 = undefined;
93829839 const ret = try self.genCall(.{ .lib = .{
93839840 .return_type = .i32_type,
93849841 .param_types = &.{ ty.toIntern(), ty.toIntern() },
9385 .callee = std.fmt.bufPrint(&callee, "__{s}{c}f2", .{
9842 .callee = std.fmt.bufPrint(&callee_buf, "__{s}{c}f2", .{
93869843 switch (op) {
93879844 .eq => "eq",
93889845 .neq => "ne",
......@@ -9741,8 +10198,15 @@ fn airCmp(self: *Self, inst: Air.Inst.Index, op: math.CompareOperator) !void {
974110198}
974210199
974310200fn airCmpVector(self: *Self, inst: Air.Inst.Index) !void {
9744 _ = inst;
9745 return self.fail("TODO implement airCmpVector for {}", .{self.target.cpu.arch});
10201 const ty_pl = self.air.instructions.items(.data)[inst].ty_pl;
10202 const extra = self.air.extraData(Air.VectorCmp, ty_pl.payload).data;
10203 const dst_mcv = try self.genBinOp(
10204 inst,
10205 Air.Inst.Tag.fromCmpOp(extra.compareOperator(), false),
10206 extra.lhs,
10207 extra.rhs,
10208 );
10209 return self.finishAir(inst, dst_mcv, .{ extra.lhs, extra.rhs, .none });
974610210}
974710211
974810212fn airCmpLtErrorsLen(self: *Self, inst: Air.Inst.Index) !void {
......@@ -10507,29 +10971,41 @@ fn airAsm(self: *Self, inst: Air.Inst.Index) !void {
1050710971 },
1050810972 else => return self.fail("invalid constraint: '{s}'", .{constraint}),
1050910973 };
10974 const is_early_clobber = constraint[1] == '&';
10975 const rest = constraint[@as(usize, 1) + @intFromBool(is_early_clobber) ..];
1051010976 const arg_mcv: MCValue = arg_mcv: {
10511 const arg_maybe_reg: ?Register = if (mem.eql(u8, constraint[1..], "r"))
10512 self.register_manager.tryAllocReg(maybe_inst, self.regClassForType(ty)) orelse
10513 return self.fail("ran out of registers lowering inline asm", .{})
10514 else if (mem.eql(u8, constraint[1..], "m"))
10977 const arg_maybe_reg: ?Register = if (mem.eql(u8, rest, "r") or
10978 mem.eql(u8, rest, "f") or mem.eql(u8, rest, "x"))
10979 registerAlias(
10980 self.register_manager.tryAllocReg(maybe_inst, switch (rest[0]) {
10981 'r' => abi.RegisterClass.gp,
10982 'f' => abi.RegisterClass.x87,
10983 'x' => abi.RegisterClass.sse,
10984 else => unreachable,
10985 }) orelse return self.fail("ran out of registers lowering inline asm", .{}),
10986 @intCast(ty.abiSize(mod)),
10987 )
10988 else if (mem.eql(u8, rest, "m"))
1051510989 if (output != .none) null else return self.fail(
1051610990 "memory constraint unsupported for asm result: '{s}'",
1051710991 .{constraint},
1051810992 )
10519 else if (mem.eql(u8, constraint[1..], "g") or
10520 mem.eql(u8, constraint[1..], "rm") or mem.eql(u8, constraint[1..], "mr") or
10521 mem.eql(u8, constraint[1..], "r,m") or mem.eql(u8, constraint[1..], "m,r"))
10522 self.register_manager.tryAllocReg(maybe_inst, self.regClassForType(ty)) orelse
10993 else if (mem.eql(u8, rest, "g") or
10994 mem.eql(u8, rest, "rm") or mem.eql(u8, rest, "mr") or
10995 mem.eql(u8, rest, "r,m") or mem.eql(u8, rest, "m,r"))
10996 self.register_manager.tryAllocReg(maybe_inst, abi.RegisterClass.gp) orelse
1052310997 if (output != .none)
1052410998 null
1052510999 else
1052611000 return self.fail("ran out of registers lowering inline asm", .{})
10527 else if (mem.startsWith(u8, constraint[1..], "{") and mem.endsWith(u8, constraint[1..], "}"))
10528 parseRegName(constraint[1 + "{".len .. constraint.len - "}".len]) orelse
11001 else if (mem.startsWith(u8, rest, "{") and mem.endsWith(u8, rest, "}"))
11002 parseRegName(rest["{".len .. rest.len - "}".len]) orelse
1052911003 return self.fail("invalid register constraint: '{s}'", .{constraint})
10530 else if (constraint.len == 2 and std.ascii.isDigit(constraint[1])) {
10531 const index = std.fmt.charToDigit(constraint[0], 10) catch unreachable;
10532 if (index >= args.items.len) return self.fail("constraint out of bounds: '{s}'", .{constraint});
11004 else if (rest.len == 1 and std.ascii.isDigit(rest[0])) {
11005 const index = std.fmt.charToDigit(rest[0], 10) catch unreachable;
11006 if (index >= args.items.len) return self.fail("constraint out of bounds: '{s}'", .{
11007 constraint,
11008 });
1053311009 break :arg_mcv args.items[index];
1053411010 } else return self.fail("invalid constraint: '{s}'", .{constraint});
1053511011 break :arg_mcv if (arg_maybe_reg) |reg| .{ .register = reg } else arg: {
......@@ -10563,10 +11039,29 @@ fn airAsm(self: *Self, inst: Air.Inst.Index) !void {
1056311039
1056411040 const ty = self.typeOf(input);
1056511041 const input_mcv = try self.resolveInst(input);
10566 const arg_mcv: MCValue = if (mem.eql(u8, constraint, "r")) switch (input_mcv) {
10567 .register => input_mcv,
10568 else => .{ .register = try self.copyToTmpRegister(ty, input_mcv) },
10569 } else if (mem.eql(u8, constraint, "m")) arg: {
11042 const arg_mcv: MCValue = if (mem.eql(u8, constraint, "r") or
11043 mem.eql(u8, constraint, "f") or mem.eql(u8, constraint, "x"))
11044 arg: {
11045 const rc = switch (constraint[0]) {
11046 'r' => abi.RegisterClass.gp,
11047 'f' => abi.RegisterClass.x87,
11048 'x' => abi.RegisterClass.sse,
11049 else => unreachable,
11050 };
11051 if (input_mcv.isRegister() and
11052 rc.isSet(RegisterManager.indexOfRegIntoTracked(input_mcv.getReg().?).?))
11053 break :arg input_mcv;
11054 const reg = try self.register_manager.allocReg(null, rc);
11055 try self.genSetReg(reg, ty, input_mcv);
11056 break :arg .{ .register = registerAlias(reg, @intCast(ty.abiSize(mod))) };
11057 } else if (mem.eql(u8, constraint, "i") or mem.eql(u8, constraint, "n"))
11058 switch (input_mcv) {
11059 .immediate => |imm| .{ .immediate = imm },
11060 else => return self.fail("immediate operand requires comptime value: '{s}'", .{
11061 constraint,
11062 }),
11063 }
11064 else if (mem.eql(u8, constraint, "m")) arg: {
1057011065 switch (input_mcv) {
1057111066 .memory => |addr| if (math.cast(i32, @as(i64, @bitCast(addr)))) |_|
1057211067 break :arg input_mcv,
......@@ -10790,6 +11285,10 @@ fn airAsm(self: *Self, inst: Air.Inst.Index) !void {
1079011285 arg_map.get(op_str["%[".len .. colon orelse op_str.len - "]".len]) orelse
1079111286 return self.fail("no matching constraint: '{s}'", .{op_str})
1079211287 ]) {
11288 .immediate => |imm| if (mem.eql(u8, modifier, "") or mem.eql(u8, modifier, "c"))
11289 .{ .imm = Immediate.u(imm) }
11290 else
11291 return self.fail("invalid modifier: '{s}'", .{modifier}),
1079311292 .register => |reg| if (mem.eql(u8, modifier, ""))
1079411293 .{ .reg = reg }
1079511294 else
......@@ -10816,6 +11315,10 @@ fn airAsm(self: *Self, inst: Air.Inst.Index) !void {
1081611315 ) }
1081711316 else
1081811317 return self.fail("invalid modifier: '{s}'", .{modifier}),
11318 .lea_got => |sym_index| if (mem.eql(u8, modifier, "P"))
11319 .{ .reg = try self.copyToTmpRegister(Type.usize, .{ .lea_got = sym_index }) }
11320 else
11321 return self.fail("invalid modifier: '{s}'", .{modifier}),
1081911322 else => return self.fail("invalid constraint: '{s}'", .{op_str}),
1082011323 };
1082111324 } else if (mem.startsWith(u8, op_str, "$")) {
......@@ -10918,6 +11421,13 @@ fn airAsm(self: *Self, inst: Air.Inst.Index) !void {
1091811421 .none => self.asmRegisterImmediate(mnem_fixed_tag, reg1, imm0),
1091911422 .reg => |reg2| switch (ops[3]) {
1092011423 .none => self.asmRegisterRegisterImmediate(mnem_fixed_tag, reg2, reg1, imm0),
11424 .reg => |reg3| self.asmRegisterRegisterRegisterImmediate(
11425 mnem_fixed_tag,
11426 reg3,
11427 reg2,
11428 reg1,
11429 imm0,
11430 ),
1092111431 else => error.InvalidInstruction,
1092211432 },
1092311433 .mem => |mem2| switch (ops[3]) {
......@@ -11988,11 +12498,11 @@ fn airFloatFromInt(self: *Self, inst: Air.Inst.Index) !void {
1198812498 src_ty.fmt(mod), dst_ty.fmt(mod),
1198912499 });
1199012500
11991 var callee: ["__floatun?i?f".len]u8 = undefined;
12501 var callee_buf: ["__floatun?i?f".len]u8 = undefined;
1199212502 break :result try self.genCall(.{ .lib = .{
1199312503 .return_type = dst_ty.toIntern(),
1199412504 .param_types = &.{src_ty.toIntern()},
11995 .callee = std.fmt.bufPrint(&callee, "__float{s}{c}i{c}f", .{
12505 .callee = std.fmt.bufPrint(&callee_buf, "__float{s}{c}i{c}f", .{
1199612506 switch (src_signedness) {
1199712507 .signed => "",
1199812508 .unsigned => "un",
......@@ -12067,11 +12577,11 @@ fn airIntFromFloat(self: *Self, inst: Air.Inst.Index) !void {
1206712577 src_ty.fmt(mod), dst_ty.fmt(mod),
1206812578 });
1206912579
12070 var callee: ["__fixuns?f?i".len]u8 = undefined;
12580 var callee_buf: ["__fixuns?f?i".len]u8 = undefined;
1207112581 break :result try self.genCall(.{ .lib = .{
1207212582 .return_type = dst_ty.toIntern(),
1207312583 .param_types = &.{src_ty.toIntern()},
12074 .callee = std.fmt.bufPrint(&callee, "__fix{s}{c}f{c}i", .{
12584 .callee = std.fmt.bufPrint(&callee_buf, "__fix{s}{c}f{c}i", .{
1207512585 switch (dst_signedness) {
1207612586 .signed => "",
1207712587 .unsigned => "uns",
......@@ -12592,7 +13102,7 @@ fn airMemset(self: *Self, inst: Air.Inst.Index, safety: bool) !void {
1259213102 .{ .i_, .mul },
1259313103 len_reg,
1259413104 len_reg,
12595 Immediate.u(elem_abi_size),
13105 Immediate.s(elem_abi_size),
1259613106 );
1259713107 try self.genInlineMemcpy(second_elem_ptr_mcv, ptr, len_mcv);
1259813108
......@@ -12645,8 +13155,23 @@ fn airMemcpy(self: *Self, inst: Air.Inst.Index) !void {
1264513155 defer if (src_ptr_lock) |lock| self.register_manager.unlockReg(lock);
1264613156
1264713157 const len: MCValue = switch (dst_ptr_ty.ptrSize(mod)) {
12648 .Slice => dst_ptr.address().offset(8).deref(),
12649 .One => .{ .immediate = dst_ptr_ty.childType(mod).arrayLen(mod) },
13158 .Slice => len: {
13159 const len_reg = try self.register_manager.allocReg(null, abi.RegisterClass.gp);
13160 const len_lock = self.register_manager.lockRegAssumeUnused(len_reg);
13161 defer self.register_manager.unlockReg(len_lock);
13162
13163 try self.asmRegisterMemoryImmediate(
13164 .{ .i_, .mul },
13165 len_reg,
13166 dst_ptr.address().offset(8).deref().mem(.qword),
13167 Immediate.s(@intCast(dst_ptr_ty.childType(mod).abiSize(mod))),
13168 );
13169 break :len .{ .register = len_reg };
13170 },
13171 .One => len: {
13172 const array_ty = dst_ptr_ty.childType(mod);
13173 break :len .{ .immediate = array_ty.arrayLen(mod) * array_ty.childType(mod).abiSize(mod) };
13174 },
1265013175 .C, .Many => unreachable,
1265113176 };
1265213177 const len_lock: ?RegisterLock = switch (len) {
......@@ -12999,10 +13524,60 @@ fn airShuffle(self: *Self, inst: Air.Inst.Index) !void {
1299913524}
1300013525
1300113526fn airReduce(self: *Self, inst: Air.Inst.Index) !void {
13527 const mod = self.bin_file.options.module.?;
1300213528 const reduce = self.air.instructions.items(.data)[inst].reduce;
13003 _ = reduce;
13004 return self.fail("TODO implement airReduce for x86_64", .{});
13005 //return self.finishAir(inst, result, .{ reduce.operand, .none, .none });
13529
13530 const result: MCValue = result: {
13531 const operand_ty = self.typeOf(reduce.operand);
13532 if (operand_ty.isVector(mod) and operand_ty.childType(mod).toIntern() == .bool_type) {
13533 try self.spillEflagsIfOccupied();
13534
13535 const operand_mcv = try self.resolveInst(reduce.operand);
13536 const mask_len = (std.math.cast(u6, operand_ty.vectorLen(mod)) orelse
13537 return self.fail("TODO implement airReduce for {}", .{operand_ty.fmt(mod)}));
13538 const mask = (@as(u64, 1) << mask_len) - 1;
13539 const abi_size: u32 = @intCast(operand_ty.abiSize(mod));
13540 switch (reduce.operation) {
13541 .Or => {
13542 if (operand_mcv.isMemory()) try self.asmMemoryImmediate(
13543 .{ ._, .@"test" },
13544 operand_mcv.mem(Memory.PtrSize.fromSize(abi_size)),
13545 Immediate.u(mask),
13546 ) else {
13547 const operand_reg = registerAlias(if (operand_mcv.isRegister())
13548 operand_mcv.getReg().?
13549 else
13550 try self.copyToTmpRegister(operand_ty, operand_mcv), abi_size);
13551 if (mask_len < abi_size * 8) try self.asmRegisterImmediate(
13552 .{ ._, .@"test" },
13553 operand_reg,
13554 Immediate.u(mask),
13555 ) else try self.asmRegisterRegister(
13556 .{ ._, .@"test" },
13557 operand_reg,
13558 operand_reg,
13559 );
13560 }
13561 break :result .{ .eflags = .nz };
13562 },
13563 .And => {
13564 const tmp_reg = try self.copyToTmpRegister(operand_ty, operand_mcv);
13565 const tmp_lock = self.register_manager.lockRegAssumeUnused(tmp_reg);
13566 defer self.register_manager.unlockReg(tmp_lock);
13567
13568 try self.asmRegister(.{ ._, .not }, tmp_reg);
13569 if (mask_len < abi_size * 8)
13570 try self.asmRegisterImmediate(.{ ._, .@"test" }, tmp_reg, Immediate.u(mask))
13571 else
13572 try self.asmRegisterRegister(.{ ._, .@"test" }, tmp_reg, tmp_reg);
13573 break :result .{ .eflags = .z };
13574 },
13575 else => return self.fail("TODO implement airReduce for {}", .{operand_ty.fmt(mod)}),
13576 }
13577 }
13578 return self.fail("TODO implement airReduce for {}", .{operand_ty.fmt(mod)});
13579 };
13580 return self.finishAir(inst, result, .{ reduce.operand, .none, .none });
1300613581}
1300713582
1300813583fn airAggregateInit(self: *Self, inst: Air.Inst.Index) !void {
......@@ -13215,11 +13790,11 @@ fn airMulAdd(self: *Self, inst: Air.Inst.Index) !void {
1321513790 ty.fmt(mod),
1321613791 });
1321713792
13218 var callee: ["__fma?".len]u8 = undefined;
13793 var callee_buf: ["__fma?".len]u8 = undefined;
1321913794 break :result try self.genCall(.{ .lib = .{
1322013795 .return_type = ty.toIntern(),
1322113796 .param_types = &.{ ty.toIntern(), ty.toIntern(), ty.toIntern() },
13222 .callee = std.fmt.bufPrint(&callee, "{s}fma{s}", .{
13797 .callee = std.fmt.bufPrint(&callee_buf, "{s}fma{s}", .{
1322313798 floatLibcAbiPrefix(ty),
1322413799 floatLibcAbiSuffix(ty),
1322513800 }) catch unreachable,
src/arch/x86_64/Emit.zig+6-6
......@@ -19,18 +19,18 @@ pub const Error = Lower.Error || error{
1919
2020pub fn emitMir(emit: *Emit) Error!void {
2121 for (0..emit.lower.mir.instructions.len) |mir_i| {
22 const mir_index = @as(Mir.Inst.Index, @intCast(mir_i));
22 const mir_index: Mir.Inst.Index = @intCast(mir_i);
2323 try emit.code_offset_mapping.putNoClobber(
2424 emit.lower.allocator,
2525 mir_index,
26 @as(u32, @intCast(emit.code.items.len)),
26 @intCast(emit.code.items.len),
2727 );
2828 const lowered = try emit.lower.lowerMir(mir_index);
2929 var lowered_relocs = lowered.relocs;
3030 for (lowered.insts, 0..) |lowered_inst, lowered_index| {
31 const start_offset = @as(u32, @intCast(emit.code.items.len));
31 const start_offset: u32 = @intCast(emit.code.items.len);
3232 try lowered_inst.encode(emit.code.writer(), .{});
33 const end_offset = @as(u32, @intCast(emit.code.items.len));
33 const end_offset: u32 = @intCast(emit.code.items.len);
3434 while (lowered_relocs.len > 0 and
3535 lowered_relocs[0].lowered_inst_index == lowered_index) : ({
3636 lowered_relocs = lowered_relocs[1..];
......@@ -39,7 +39,7 @@ pub fn emitMir(emit: *Emit) Error!void {
3939 .source = start_offset,
4040 .target = target,
4141 .offset = end_offset - 4,
42 .length = @as(u5, @intCast(end_offset - start_offset)),
42 .length = @intCast(end_offset - start_offset),
4343 }),
4444 .linker_extern_fn => |symbol| if (emit.bin_file.cast(link.File.Elf)) |elf_file| {
4545 // Add relocation to the decl.
......@@ -220,7 +220,7 @@ const Reloc = struct {
220220 /// Target of the relocation.
221221 target: Mir.Inst.Index,
222222 /// Offset of the relocation within the instruction.
223 offset: usize,
223 offset: u32,
224224 /// Length of the instruction.
225225 length: u5,
226226};
src/arch/x86_64/Encoding.zig+39-8
......@@ -266,7 +266,12 @@ pub const Mnemonic = enum {
266266 packssdw, packsswb, packuswb,
267267 paddb, paddd, paddq, paddsb, paddsw, paddusb, paddusw, paddw,
268268 pand, pandn, por, pxor,
269 pcmpeqb, pcmpeqd, pcmpeqw,
270 pcmpgtb, pcmpgtd, pcmpgtw,
269271 pmulhw, pmullw,
272 pslld, psllq, psllw,
273 psrad, psraw,
274 psrld, psrlq, psrlw,
270275 psubb, psubd, psubq, psubsb, psubsw, psubusb, psubusw, psubw,
271276 // SSE
272277 addps, addss,
......@@ -278,11 +283,12 @@ pub const Mnemonic = enum {
278283 maxps, maxss,
279284 minps, minss,
280285 movaps, movhlps, movlhps,
286 movmskps,
281287 movss, movups,
282288 mulps, mulss,
283289 orps,
284290 pextrw, pinsrw,
285 pmaxsw, pmaxub, pminsw, pminub,
291 pmaxsw, pmaxub, pminsw, pminub, pmovmskb,
286292 shufps,
287293 sqrtps, sqrtss,
288294 subps, subss,
......@@ -301,12 +307,13 @@ pub const Mnemonic = enum {
301307 minpd, minsd,
302308 movapd,
303309 movdqa, movdqu,
310 movmskpd,
304311 //movsd,
305312 movupd,
306313 mulpd, mulsd,
307314 orpd,
308 pshufhw, pshuflw,
309 psrld, psrlq, psrlw,
315 pshufd, pshufhw, pshuflw,
316 pslldq, psrldq,
310317 punpckhbw, punpckhdq, punpckhqdq, punpckhwd,
311318 punpcklbw, punpckldq, punpcklqdq, punpcklwd,
312319 shufpd,
......@@ -317,19 +324,29 @@ pub const Mnemonic = enum {
317324 // SSE3
318325 movddup, movshdup, movsldup,
319326 // SSSE3
320 pabsb, pabsd, pabsw,
327 pabsb, pabsd, pabsw, palignr,
321328 // SSE4.1
322329 blendpd, blendps, blendvpd, blendvps,
323330 extractps,
324331 insertps,
325332 packusdw,
333 pcmpeqq,
326334 pextrb, pextrd, pextrq,
327335 pinsrb, pinsrd, pinsrq,
328336 pmaxsb, pmaxsd, pmaxud, pmaxuw, pminsb, pminsd, pminud, pminuw,
329337 pmulld,
330338 roundpd, roundps, roundsd, roundss,
339 // SSE4.2
340 pcmpgtq,
341 // PCLMUL
342 pclmulqdq,
343 // AES
344 aesdec, aesdeclast, aesenc, aesenclast, aesimc, aeskeygenassist,
345 // SHA
346 sha256msg1, sha256msg2, sha256rnds2,
331347 // AVX
332348 vaddpd, vaddps, vaddsd, vaddss,
349 vaesdec, vaesdeclast, vaesenc, vaesenclast, vaesimc, vaeskeygenassist,
333350 vandnpd, vandnps, vandpd, vandps,
334351 vblendpd, vblendps, vblendvpd, vblendvps,
335352 vbroadcastf128, vbroadcastsd, vbroadcastss,
......@@ -348,6 +365,7 @@ pub const Mnemonic = enum {
348365 vmovddup,
349366 vmovdqa, vmovdqu,
350367 vmovhlps, vmovlhps,
368 vmovmskpd, vmovmskps,
351369 vmovq,
352370 vmovsd,
353371 vmovshdup, vmovsldup,
......@@ -358,15 +376,20 @@ pub const Mnemonic = enum {
358376 vpabsb, vpabsd, vpabsw,
359377 vpackssdw, vpacksswb, vpackusdw, vpackuswb,
360378 vpaddb, vpaddd, vpaddq, vpaddsb, vpaddsw, vpaddusb, vpaddusw, vpaddw,
361 vpand, vpandn,
379 vpalignr, vpand, vpandn, vpclmulqdq,
380 vpcmpeqb, vpcmpeqd, vpcmpeqq, vpcmpeqw,
381 vpcmpgtb, vpcmpgtd, vpcmpgtq, vpcmpgtw,
362382 vpextrb, vpextrd, vpextrq, vpextrw,
363383 vpinsrb, vpinsrd, vpinsrq, vpinsrw,
364384 vpmaxsb, vpmaxsd, vpmaxsw, vpmaxub, vpmaxud, vpmaxuw,
365385 vpminsb, vpminsd, vpminsw, vpminub, vpminud, vpminuw,
386 vpmovmskb,
366387 vpmulhw, vpmulld, vpmullw,
367388 vpor,
368 vpshufhw, vpshuflw,
369 vpsrld, vpsrlq, vpsrlw,
389 vpshufd, vpshufhw, vpshuflw,
390 vpslld, vpslldq, vpsllq, vpsllw,
391 vpsrad, vpsraq, vpsraw,
392 vpsrld, vpsrldq, vpsrlq, vpsrlw,
370393 vpsubb, vpsubd, vpsubq, vpsubsb, vpsubsw, vpsubusb, vpsubusw, vpsubw,
371394 vpunpckhbw, vpunpckhdq, vpunpckhqdq, vpunpckhwd,
372395 vpunpcklbw, vpunpckldq, vpunpcklqdq, vpunpcklwd,
......@@ -742,6 +765,8 @@ pub const Mode = enum {
742765
743766pub const Feature = enum {
744767 none,
768 aes,
769 @"aes avx",
745770 avx,
746771 avx2,
747772 bmi,
......@@ -749,12 +774,18 @@ pub const Feature = enum {
749774 fma,
750775 lzcnt,
751776 movbe,
777 pclmul,
778 @"pclmul avx",
752779 popcnt,
753780 sse,
754781 sse2,
755782 sse3,
756783 sse4_1,
784 sse4_2,
757785 ssse3,
786 sha,
787 vaes,
788 vpclmulqdq,
758789 x87,
759790};
760791
......@@ -772,7 +803,7 @@ fn estimateInstructionLength(prefix: Prefix, encoding: Encoding, ops: []const Op
772803}
773804
774805const mnemonic_to_encodings_map = init: {
775 @setEvalBranchQuota(50_000);
806 @setEvalBranchQuota(60_000);
776807 const encodings = @import("encodings.zig");
777808 var entries = encodings.table;
778809 std.mem.sort(encodings.Entry, &entries, {}, struct {
src/arch/x86_64/Lower.zig+39-7
......@@ -190,7 +190,7 @@ pub fn lowerMir(lower: *Lower, index: Mir.Inst.Index) Error!struct {
190190 .pseudo_probe_align_ri_s => {
191191 try lower.emit(.none, .@"test", &.{
192192 .{ .reg = inst.data.ri.r1 },
193 .{ .imm = Immediate.s(@as(i32, @bitCast(inst.data.ri.i))) },
193 .{ .imm = Immediate.s(@bitCast(inst.data.ri.i)) },
194194 });
195195 try lower.emit(.none, .jz, &.{
196196 .{ .imm = lower.reloc(.{ .inst = index + 1 }) },
......@@ -226,14 +226,14 @@ pub fn lowerMir(lower: *Lower, index: Mir.Inst.Index) Error!struct {
226226 }
227227 try lower.emit(.none, .sub, &.{
228228 .{ .reg = inst.data.ri.r1 },
229 .{ .imm = Immediate.s(@as(i32, @bitCast(inst.data.ri.i))) },
229 .{ .imm = Immediate.s(@bitCast(inst.data.ri.i)) },
230230 });
231231 assert(lower.result_insts_len <= pseudo_probe_adjust_unrolled_max_insts);
232232 },
233233 .pseudo_probe_adjust_setup_rri_s => {
234234 try lower.emit(.none, .mov, &.{
235235 .{ .reg = inst.data.rri.r2.to32() },
236 .{ .imm = Immediate.s(@as(i32, @bitCast(inst.data.rri.i))) },
236 .{ .imm = Immediate.s(@bitCast(inst.data.rri.i)) },
237237 });
238238 try lower.emit(.none, .sub, &.{
239239 .{ .reg = inst.data.rri.r1 },
......@@ -291,7 +291,9 @@ fn imm(lower: Lower, ops: Mir.Inst.Ops, i: u32) Immediate {
291291 .i_s,
292292 .mi_sib_s,
293293 .mi_rip_s,
294 => Immediate.s(@as(i32, @bitCast(i))),
294 .rmi_sib_s,
295 .rmi_rip_s,
296 => Immediate.s(@bitCast(i)),
295297
296298 .rrri,
297299 .rri_u,
......@@ -301,6 +303,8 @@ fn imm(lower: Lower, ops: Mir.Inst.Ops, i: u32) Immediate {
301303 .mi_rip_u,
302304 .rmi_sib,
303305 .rmi_rip,
306 .rmi_sib_u,
307 .rmi_rip_u,
304308 .mri_sib,
305309 .mri_rip,
306310 .rrm_sib,
......@@ -319,6 +323,8 @@ fn mem(lower: Lower, ops: Mir.Inst.Ops, payload: u32) Memory {
319323 return lower.mir.resolveFrameLoc(switch (ops) {
320324 .rm_sib,
321325 .rmi_sib,
326 .rmi_sib_s,
327 .rmi_sib_u,
322328 .m_sib,
323329 .mi_sib_u,
324330 .mi_sib_s,
......@@ -335,6 +341,8 @@ fn mem(lower: Lower, ops: Mir.Inst.Ops, payload: u32) Memory {
335341
336342 .rm_rip,
337343 .rmi_rip,
344 .rmi_rip_s,
345 .rmi_rip_u,
338346 .m_rip,
339347 .mi_rip_u,
340348 .mi_rip_s,
......@@ -383,13 +391,29 @@ fn generic(lower: *Lower, inst: Mir.Inst) Error!void {
383391 .rrri => inst.data.rrri.fixes,
384392 .rri_s, .rri_u => inst.data.rri.fixes,
385393 .ri_s, .ri_u => inst.data.ri.fixes,
386 .ri64, .rm_sib, .rm_rip, .mr_sib, .mr_rip => inst.data.rx.fixes,
394 .ri64,
395 .rm_sib,
396 .rm_rip,
397 .rmi_sib_s,
398 .rmi_sib_u,
399 .rmi_rip_s,
400 .rmi_rip_u,
401 .mr_sib,
402 .mr_rip,
403 => inst.data.rx.fixes,
387404 .mrr_sib, .mrr_rip, .rrm_sib, .rrm_rip => inst.data.rrx.fixes,
388405 .rmi_sib, .rmi_rip, .mri_sib, .mri_rip => inst.data.rix.fixes,
389406 .rrmi_sib, .rrmi_rip => inst.data.rrix.fixes,
390407 .mi_sib_u, .mi_rip_u, .mi_sib_s, .mi_rip_s => inst.data.x.fixes,
391408 .m_sib, .m_rip, .rax_moffs, .moffs_rax => inst.data.x.fixes,
392 .extern_fn_reloc, .got_reloc, .extern_got_reloc, .direct_reloc, .direct_got_reloc, .import_reloc, .tlv_reloc => ._,
409 .extern_fn_reloc,
410 .got_reloc,
411 .extern_got_reloc,
412 .direct_reloc,
413 .direct_got_reloc,
414 .import_reloc,
415 .tlv_reloc,
416 => ._,
393417 else => return lower.fail("TODO lower .{s}", .{@tagName(inst.ops)}),
394418 };
395419 try lower.emit(switch (fixes) {
......@@ -461,7 +485,7 @@ fn generic(lower: *Lower, inst: Mir.Inst) Error!void {
461485 .m_sib, .m_rip => &.{
462486 .{ .mem = lower.mem(inst.ops, inst.data.x.payload) },
463487 },
464 .mi_sib_s, .mi_sib_u, .mi_rip_u, .mi_rip_s => &.{
488 .mi_sib_s, .mi_sib_u, .mi_rip_s, .mi_rip_u => &.{
465489 .{ .mem = lower.mem(inst.ops, inst.data.x.payload + 1) },
466490 .{ .imm = lower.imm(
467491 inst.ops,
......@@ -477,6 +501,14 @@ fn generic(lower: *Lower, inst: Mir.Inst) Error!void {
477501 .{ .mem = lower.mem(inst.ops, inst.data.rix.payload) },
478502 .{ .imm = lower.imm(inst.ops, inst.data.rix.i) },
479503 },
504 .rmi_sib_s, .rmi_sib_u, .rmi_rip_s, .rmi_rip_u => &.{
505 .{ .reg = inst.data.rx.r1 },
506 .{ .mem = lower.mem(inst.ops, inst.data.rx.payload + 1) },
507 .{ .imm = lower.imm(
508 inst.ops,
509 lower.mir.extraData(Mir.Imm32, inst.data.rx.payload).data.imm,
510 ) },
511 },
480512 .mr_sib, .mr_rip => &.{
481513 .{ .mem = lower.mem(inst.ops, inst.data.rx.payload) },
482514 .{ .reg = inst.data.rx.r1 },
src/arch/x86_64/Mir.zig+83-33
......@@ -474,6 +474,10 @@ pub const Inst = struct {
474474 /// Bitwise logical and not of packed single-precision floating-point values
475475 /// Bitwise logical and not of packed double-precision floating-point values
476476 andn,
477 /// Compare packed data for equal
478 cmpeq,
479 /// Compare packed data for greater than
480 cmpgt,
477481 /// Maximum of packed signed integers
478482 maxs,
479483 /// Maximum of packed unsigned integers
......@@ -482,10 +486,20 @@ pub const Inst = struct {
482486 mins,
483487 /// Minimum of packed unsigned integers
484488 minu,
489 /// Move byte mask
490 /// Extract packed single precision floating-point sign mask
491 /// Extract packed double precision floating-point sign mask
492 movmsk,
485493 /// Multiply packed signed integers and store low result
486494 mull,
487495 /// Multiply packed signed integers and store high result
488496 mulh,
497 /// Shift packed data left logical
498 sll,
499 /// Shift packed data right arithmetic
500 sra,
501 /// Shift packed data right logical
502 srl,
489503 /// Subtract packed signed integers with signed saturation
490504 subs,
491505 /// Subtract packed unsigned integers with unsigned saturation
......@@ -584,15 +598,13 @@ pub const Inst = struct {
584598 movdqu,
585599 /// Packed interleave shuffle of quadruplets of single-precision floating-point values
586600 /// Packed interleave shuffle of pairs of double-precision floating-point values
601 /// Shuffle packed doublewords
602 /// Shuffle packed words
587603 shuf,
588604 /// Shuffle packed high words
589605 shufh,
590606 /// Shuffle packed low words
591607 shufl,
592 /// Shift packed data right logical
593 /// Shift packed data right logical
594 /// Shift packed data right logical
595 srl,
596608 /// Unpack high data
597609 unpckhbw,
598610 /// Unpack high data
......@@ -617,6 +629,9 @@ pub const Inst = struct {
617629 /// Replicate single floating-point values
618630 movsldup,
619631
632 /// Packed align right
633 alignr,
634
620635 /// Pack with unsigned saturation
621636 ackusd,
622637 /// Blend packed single-precision floating-point values
......@@ -640,6 +655,29 @@ pub const Inst = struct {
640655 /// Round scalar double-precision floating-point value
641656 round,
642657
658 /// Carry-less multiplication quadword
659 clmulq,
660
661 /// Perform one round of an AES decryption flow
662 aesdec,
663 /// Perform last round of an AES decryption flow
664 aesdeclast,
665 /// Perform one round of an AES encryption flow
666 aesenc,
667 /// Perform last round of an AES encryption flow
668 aesenclast,
669 /// Perform the AES InvMixColumn transformation
670 aesimc,
671 /// AES round key generation assist
672 aeskeygenassist,
673
674 /// Perform an intermediate calculation for the next four SHA256 message dwords
675 sha256msg1,
676 /// Perform a final calculation for the next four SHA256 message dwords
677 sha256msg2,
678 /// Perform two rounds of SHA256 operation
679 sha256rnds2,
680
643681 /// Load with broadcast floating-point data
644682 broadcast,
645683
......@@ -720,9 +758,24 @@ pub const Inst = struct {
720758 /// Register, memory (RIP) operands.
721759 /// Uses `rx` payload.
722760 rm_rip,
723 /// Register, memory (SIB), immediate (byte) operands.
761 /// Register, memory (SIB), immediate (word) operands.
724762 /// Uses `rix` payload with extra data of type `MemorySib`.
725763 rmi_sib,
764 /// Register, memory (RIP), immediate (word) operands.
765 /// Uses `rix` payload with extra data of type `MemoryRip`.
766 rmi_rip,
767 /// Register, memory (SIB), immediate (signed) operands.
768 /// Uses `rx` payload with extra data of type `Imm32` followed by `MemorySib`.
769 rmi_sib_s,
770 /// Register, memory (SIB), immediate (unsigned) operands.
771 /// Uses `rx` payload with extra data of type `Imm32` followed by `MemorySib`.
772 rmi_sib_u,
773 /// Register, memory (RIP), immediate (signed) operands.
774 /// Uses `rx` payload with extra data of type `Imm32` followed by `MemoryRip`.
775 rmi_rip_s,
776 /// Register, memory (RIP), immediate (unsigned) operands.
777 /// Uses `rx` payload with extra data of type `Imm32` followed by `MemoryRip`.
778 rmi_rip_u,
726779 /// Register, register, memory (RIP).
727780 /// Uses `rrix` payload with extra data of type `MemoryRip`.
728781 rrm_rip,
......@@ -735,27 +788,24 @@ pub const Inst = struct {
735788 /// Register, register, memory (SIB), immediate (byte) operands.
736789 /// Uses `rrix` payload with extra data of type `MemorySib`.
737790 rrmi_sib,
738 /// Register, memory (RIP), immediate (byte) operands.
739 /// Uses `rix` payload with extra data of type `MemoryRip`.
740 rmi_rip,
741791 /// Single memory (SIB) operand.
742792 /// Uses `x` with extra data of type `MemorySib`.
743793 m_sib,
744794 /// Single memory (RIP) operand.
745795 /// Uses `x` with extra data of type `MemoryRip`.
746796 m_rip,
747 /// Memory (SIB), immediate (unsigned) operands.
748 /// Uses `x` payload with extra data of type `Imm32` followed by `MemorySib`.
749 mi_sib_u,
750 /// Memory (RIP), immediate (unsigned) operands.
751 /// Uses `x` payload with extra data of type `Imm32` followed by `MemoryRip`.
752 mi_rip_u,
753797 /// Memory (SIB), immediate (sign-extend) operands.
754798 /// Uses `x` payload with extra data of type `Imm32` followed by `MemorySib`.
755799 mi_sib_s,
800 /// Memory (SIB), immediate (unsigned) operands.
801 /// Uses `x` payload with extra data of type `Imm32` followed by `MemorySib`.
802 mi_sib_u,
756803 /// Memory (RIP), immediate (sign-extend) operands.
757804 /// Uses `x` payload with extra data of type `Imm32` followed by `MemoryRip`.
758805 mi_rip_s,
806 /// Memory (RIP), immediate (unsigned) operands.
807 /// Uses `x` payload with extra data of type `Imm32` followed by `MemoryRip`.
808 mi_rip_u,
759809 /// Memory (SIB), register operands.
760810 /// Uses `rx` payload with extra data of type `MemorySib`.
761811 mr_sib,
......@@ -768,10 +818,10 @@ pub const Inst = struct {
768818 /// Memory (RIP), register, register operands.
769819 /// Uses `rrx` payload with extra data of type `MemoryRip`.
770820 mrr_rip,
771 /// Memory (SIB), register, immediate (byte) operands.
821 /// Memory (SIB), register, immediate (word) operands.
772822 /// Uses `rix` payload with extra data of type `MemorySib`.
773823 mri_sib,
774 /// Memory (RIP), register, immediate (byte) operands.
824 /// Memory (RIP), register, immediate (word) operands.
775825 /// Uses `rix` payload with extra data of type `MemoryRip`.
776826 mri_rip,
777827 /// Rax, Memory moffs.
......@@ -955,7 +1005,7 @@ pub const Inst = struct {
9551005 rix: struct {
9561006 fixes: Fixes = ._,
9571007 r1: Register,
958 i: u8,
1008 i: u16,
9591009 payload: u32,
9601010 },
9611011 /// Register, register, byte immediate, followed by Custom payload found in extra.
......@@ -1010,7 +1060,7 @@ pub const RegisterList = struct {
10101060
10111061 fn getIndexForReg(registers: []const Register, reg: Register) BitSet.MaskInt {
10121062 for (registers, 0..) |cpreg, i| {
1013 if (reg.id() == cpreg.id()) return @as(u32, @intCast(i));
1063 if (reg.id() == cpreg.id()) return @intCast(i);
10141064 }
10151065 unreachable; // register not in input register list!
10161066 }
......@@ -1030,7 +1080,7 @@ pub const RegisterList = struct {
10301080 }
10311081
10321082 pub fn count(self: Self) u32 {
1033 return @as(u32, @intCast(self.bitset.count()));
1083 return @intCast(self.bitset.count());
10341084 }
10351085};
10361086
......@@ -1044,14 +1094,14 @@ pub const Imm64 = struct {
10441094
10451095 pub fn encode(v: u64) Imm64 {
10461096 return .{
1047 .msb = @as(u32, @truncate(v >> 32)),
1048 .lsb = @as(u32, @truncate(v)),
1097 .msb = @truncate(v >> 32),
1098 .lsb = @truncate(v),
10491099 };
10501100 }
10511101
10521102 pub fn decode(imm: Imm64) u64 {
10531103 var res: u64 = 0;
1054 res |= (@as(u64, @intCast(imm.msb)) << 32);
1104 res |= @as(u64, @intCast(imm.msb)) << 32;
10551105 res |= @as(u64, @intCast(imm.lsb));
10561106 return res;
10571107 }
......@@ -1075,7 +1125,7 @@ pub const MemorySib = struct {
10751125 assert(sib.scale_index.scale == 0 or std.math.isPowerOfTwo(sib.scale_index.scale));
10761126 return .{
10771127 .ptr_size = @intFromEnum(sib.ptr_size),
1078 .base_tag = @intFromEnum(@as(Memory.Base.Tag, sib.base)),
1128 .base_tag = @intFromEnum(sib.base),
10791129 .base = switch (sib.base) {
10801130 .none => undefined,
10811131 .reg => |r| @intFromEnum(r),
......@@ -1091,18 +1141,18 @@ pub const MemorySib = struct {
10911141 }
10921142
10931143 pub fn decode(msib: MemorySib) Memory {
1094 const scale = @as(u4, @truncate(msib.scale_index));
1144 const scale: u4 = @truncate(msib.scale_index);
10951145 assert(scale == 0 or std.math.isPowerOfTwo(scale));
10961146 return .{ .sib = .{
1097 .ptr_size = @as(Memory.PtrSize, @enumFromInt(msib.ptr_size)),
1147 .ptr_size = @enumFromInt(msib.ptr_size),
10981148 .base = switch (@as(Memory.Base.Tag, @enumFromInt(msib.base_tag))) {
10991149 .none => .none,
1100 .reg => .{ .reg = @as(Register, @enumFromInt(msib.base)) },
1101 .frame => .{ .frame = @as(bits.FrameIndex, @enumFromInt(msib.base)) },
1150 .reg => .{ .reg = @enumFromInt(msib.base) },
1151 .frame => .{ .frame = @enumFromInt(msib.base) },
11021152 },
11031153 .scale_index = .{
11041154 .scale = scale,
1105 .index = if (scale > 0) @as(Register, @enumFromInt(msib.scale_index >> 4)) else undefined,
1155 .index = if (scale > 0) @enumFromInt(msib.scale_index >> 4) else undefined,
11061156 },
11071157 .disp = msib.disp,
11081158 } };
......@@ -1124,7 +1174,7 @@ pub const MemoryRip = struct {
11241174
11251175 pub fn decode(mrip: MemoryRip) Memory {
11261176 return .{ .rip = .{
1127 .ptr_size = @as(Memory.PtrSize, @enumFromInt(mrip.ptr_size)),
1177 .ptr_size = @enumFromInt(mrip.ptr_size),
11281178 .disp = mrip.disp,
11291179 } };
11301180 }
......@@ -1141,14 +1191,14 @@ pub const MemoryMoffs = struct {
11411191 pub fn encode(seg: Register, offset: u64) MemoryMoffs {
11421192 return .{
11431193 .seg = @intFromEnum(seg),
1144 .msb = @as(u32, @truncate(offset >> 32)),
1145 .lsb = @as(u32, @truncate(offset >> 0)),
1194 .msb = @truncate(offset >> 32),
1195 .lsb = @truncate(offset >> 0),
11461196 };
11471197 }
11481198
11491199 pub fn decode(moffs: MemoryMoffs) Memory {
11501200 return .{ .moffs = .{
1151 .seg = @as(Register, @enumFromInt(moffs.seg)),
1201 .seg = @enumFromInt(moffs.seg),
11521202 .offset = @as(u64, moffs.msb) << 32 | @as(u64, moffs.lsb) << 0,
11531203 } };
11541204 }
......@@ -1168,7 +1218,7 @@ pub fn extraData(mir: Mir, comptime T: type, index: u32) struct { data: T, end:
11681218 inline for (fields) |field| {
11691219 @field(result, field.name) = switch (field.type) {
11701220 u32 => mir.extra[i],
1171 i32 => @as(i32, @bitCast(mir.extra[i])),
1221 i32 => @bitCast(mir.extra[i]),
11721222 else => @compileError("bad field type"),
11731223 };
11741224 i += 1;
src/arch/x86_64/bits.zig+10-10
......@@ -232,7 +232,7 @@ pub const Register = enum(u7) {
232232 else => unreachable,
233233 // zig fmt: on
234234 };
235 return @as(u6, @intCast(@intFromEnum(reg) - base));
235 return @intCast(@intFromEnum(reg) - base);
236236 }
237237
238238 pub fn bitSize(reg: Register) u64 {
......@@ -291,11 +291,11 @@ pub const Register = enum(u7) {
291291 else => unreachable,
292292 // zig fmt: on
293293 };
294 return @as(u4, @truncate(@intFromEnum(reg) - base));
294 return @truncate(@intFromEnum(reg) - base);
295295 }
296296
297297 pub fn lowEnc(reg: Register) u3 {
298 return @as(u3, @truncate(reg.enc()));
298 return @truncate(reg.enc());
299299 }
300300
301301 pub fn toBitSize(reg: Register, bit_size: u64) Register {
......@@ -325,19 +325,19 @@ pub const Register = enum(u7) {
325325 }
326326
327327 pub fn to64(reg: Register) Register {
328 return @as(Register, @enumFromInt(@intFromEnum(reg) - reg.gpBase() + @intFromEnum(Register.rax)));
328 return @enumFromInt(@intFromEnum(reg) - reg.gpBase() + @intFromEnum(Register.rax));
329329 }
330330
331331 pub fn to32(reg: Register) Register {
332 return @as(Register, @enumFromInt(@intFromEnum(reg) - reg.gpBase() + @intFromEnum(Register.eax)));
332 return @enumFromInt(@intFromEnum(reg) - reg.gpBase() + @intFromEnum(Register.eax));
333333 }
334334
335335 pub fn to16(reg: Register) Register {
336 return @as(Register, @enumFromInt(@intFromEnum(reg) - reg.gpBase() + @intFromEnum(Register.ax)));
336 return @enumFromInt(@intFromEnum(reg) - reg.gpBase() + @intFromEnum(Register.ax));
337337 }
338338
339339 pub fn to8(reg: Register) Register {
340 return @as(Register, @enumFromInt(@intFromEnum(reg) - reg.gpBase() + @intFromEnum(Register.al)));
340 return @enumFromInt(@intFromEnum(reg) - reg.gpBase() + @intFromEnum(Register.al));
341341 }
342342
343343 fn sseBase(reg: Register) u7 {
......@@ -350,11 +350,11 @@ pub const Register = enum(u7) {
350350 }
351351
352352 pub fn to256(reg: Register) Register {
353 return @as(Register, @enumFromInt(@intFromEnum(reg) - reg.sseBase() + @intFromEnum(Register.ymm0)));
353 return @enumFromInt(@intFromEnum(reg) - reg.sseBase() + @intFromEnum(Register.ymm0));
354354 }
355355
356356 pub fn to128(reg: Register) Register {
357 return @as(Register, @enumFromInt(@intFromEnum(reg) - reg.sseBase() + @intFromEnum(Register.xmm0)));
357 return @enumFromInt(@intFromEnum(reg) - reg.sseBase() + @intFromEnum(Register.xmm0));
358358 }
359359
360360 /// DWARF register encoding
......@@ -619,7 +619,7 @@ pub const Immediate = union(enum) {
619619 1, 8 => @as(i8, @bitCast(@as(u8, @intCast(x)))),
620620 16 => @as(i16, @bitCast(@as(u16, @intCast(x)))),
621621 32 => @as(i32, @bitCast(@as(u32, @intCast(x)))),
622 64 => @as(i64, @bitCast(x)),
622 64 => @bitCast(x),
623623 else => unreachable,
624624 },
625625 };
src/arch/x86_64/encodings.zig+200-18
......@@ -905,6 +905,9 @@ pub const table = [_]Entry{
905905
906906 .{ .movlhps, .rm, &.{ .xmm, .xmm }, &.{ 0x0f, 0x16 }, 0, .none, .sse },
907907
908 .{ .movmskps, .rm, &.{ .r32, .xmm }, &.{ 0x0f, 0x50 }, 0, .none, .sse },
909 .{ .movmskps, .rm, &.{ .r64, .xmm }, &.{ 0x0f, 0x50 }, 0, .none, .sse },
910
908911 .{ .movss, .rm, &.{ .xmm, .xmm_m32 }, &.{ 0xf3, 0x0f, 0x10 }, 0, .none, .sse },
909912 .{ .movss, .mr, &.{ .xmm_m32, .xmm }, &.{ 0xf3, 0x0f, 0x11 }, 0, .none, .sse },
910913
......@@ -917,6 +920,9 @@ pub const table = [_]Entry{
917920
918921 .{ .orps, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x0f, 0x56 }, 0, .none, .sse },
919922
923 .{ .pmovmskb, .rm, &.{ .r32, .xmm }, &.{ 0x66, 0x0f, 0xd7 }, 0, .none, .sse },
924 .{ .pmovmskb, .rm, &.{ .r64, .xmm }, &.{ 0x66, 0x0f, 0xd7 }, 0, .none, .sse },
925
920926 .{ .shufps, .rmi, &.{ .xmm, .xmm_m128, .imm8 }, &.{ 0x0f, 0xc6 }, 0, .none, .sse },
921927
922928 .{ .sqrtps, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x0f, 0x51 }, 0, .none, .sse },
......@@ -1005,6 +1011,12 @@ pub const table = [_]Entry{
10051011 .{ .movdqu, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0xf3, 0x0f, 0x6f }, 0, .none, .sse2 },
10061012 .{ .movdqu, .mr, &.{ .xmm_m128, .xmm }, &.{ 0xf3, 0x0f, 0x7f }, 0, .none, .sse2 },
10071013
1014 .{ .movmskpd, .rm, &.{ .r32, .xmm }, &.{ 0x66, 0x0f, 0x50 }, 0, .none, .sse2 },
1015 .{ .movmskpd, .rm, &.{ .r64, .xmm }, &.{ 0x66, 0x0f, 0x50 }, 0, .none, .sse2 },
1016
1017 .{ .movsd, .rm, &.{ .xmm, .xmm_m64 }, &.{ 0xf2, 0x0f, 0x10 }, 0, .none, .sse2 },
1018 .{ .movsd, .mr, &.{ .xmm_m64, .xmm }, &.{ 0xf2, 0x0f, 0x11 }, 0, .none, .sse2 },
1019
10081020 .{ .movq, .rm, &.{ .xmm, .xmm_m64 }, &.{ 0xf3, 0x0f, 0x7e }, 0, .none, .sse2 },
10091021 .{ .movq, .mr, &.{ .xmm_m64, .xmm }, &.{ 0x66, 0x0f, 0xd6 }, 0, .none, .sse2 },
10101022
......@@ -1037,6 +1049,14 @@ pub const table = [_]Entry{
10371049
10381050 .{ .pandn, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xdf }, 0, .none, .sse2 },
10391051
1052 .{ .pcmpeqb, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x74 }, 0, .none, .sse2 },
1053 .{ .pcmpeqw, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x75 }, 0, .none, .sse2 },
1054 .{ .pcmpeqd, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x76 }, 0, .none, .sse2 },
1055
1056 .{ .pcmpgtb, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x64 }, 0, .none, .sse2 },
1057 .{ .pcmpgtw, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x65 }, 0, .none, .sse2 },
1058 .{ .pcmpgtd, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x66 }, 0, .none, .sse2 },
1059
10401060 .{ .pextrw, .rmi, &.{ .r32, .xmm, .imm8 }, &.{ 0x66, 0x0f, 0xc5 }, 0, .none, .sse2 },
10411061
10421062 .{ .pinsrw, .rmi, &.{ .xmm, .r32_m16, .imm8 }, &.{ 0x66, 0x0f, 0xc4 }, 0, .none, .sse2 },
......@@ -1055,10 +1075,26 @@ pub const table = [_]Entry{
10551075
10561076 .{ .por, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xeb }, 0, .none, .sse2 },
10571077
1078 .{ .pshufd, .rmi, &.{ .xmm, .xmm_m128, .imm8 }, &.{ 0x66, 0x0f, 0x70 }, 0, .none, .sse2 },
1079
10581080 .{ .pshufhw, .rmi, &.{ .xmm, .xmm_m128, .imm8 }, &.{ 0xf3, 0x0f, 0x70 }, 0, .none, .sse2 },
10591081
10601082 .{ .pshuflw, .rmi, &.{ .xmm, .xmm_m128, .imm8 }, &.{ 0xf2, 0x0f, 0x70 }, 0, .none, .sse2 },
10611083
1084 .{ .psllw, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xf1 }, 0, .none, .sse2 },
1085 .{ .psllw, .mi, &.{ .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x71 }, 6, .none, .sse2 },
1086 .{ .pslld, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xf2 }, 0, .none, .sse2 },
1087 .{ .pslld, .mi, &.{ .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x72 }, 6, .none, .sse2 },
1088 .{ .psllq, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xf3 }, 0, .none, .sse2 },
1089 .{ .psllq, .mi, &.{ .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x73 }, 6, .none, .sse2 },
1090
1091 .{ .pslldq, .mi, &.{ .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x73 }, 7, .none, .sse2 },
1092
1093 .{ .psraw, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xe1 }, 0, .none, .sse2 },
1094 .{ .psraw, .mi, &.{ .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x71 }, 4, .none, .sse2 },
1095 .{ .psrad, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xe2 }, 0, .none, .sse2 },
1096 .{ .psrad, .mi, &.{ .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x72 }, 4, .none, .sse2 },
1097
10621098 .{ .psrlw, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xd1 }, 0, .none, .sse2 },
10631099 .{ .psrlw, .mi, &.{ .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x71 }, 2, .none, .sse2 },
10641100 .{ .psrld, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xd2 }, 0, .none, .sse2 },
......@@ -1066,6 +1102,8 @@ pub const table = [_]Entry{
10661102 .{ .psrlq, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xd3 }, 0, .none, .sse2 },
10671103 .{ .psrlq, .mi, &.{ .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x73 }, 2, .none, .sse2 },
10681104
1105 .{ .psrldq, .mi, &.{ .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x73 }, 3, .none, .sse2 },
1106
10691107 .{ .psubb, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xf8 }, 0, .none, .sse2 },
10701108 .{ .psubw, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xf9 }, 0, .none, .sse2 },
10711109 .{ .psubd, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xfa }, 0, .none, .sse2 },
......@@ -1100,9 +1138,6 @@ pub const table = [_]Entry{
11001138
11011139 .{ .subsd, .rm, &.{ .xmm, .xmm_m64 }, &.{ 0xf2, 0x0f, 0x5c }, 0, .none, .sse2 },
11021140
1103 .{ .movsd, .rm, &.{ .xmm, .xmm_m64 }, &.{ 0xf2, 0x0f, 0x10 }, 0, .none, .sse2 },
1104 .{ .movsd, .mr, &.{ .xmm_m64, .xmm }, &.{ 0xf2, 0x0f, 0x11 }, 0, .none, .sse2 },
1105
11061141 .{ .ucomisd, .rm, &.{ .xmm, .xmm_m64 }, &.{ 0x66, 0x0f, 0x2e }, 0, .none, .sse2 },
11071142
11081143 .{ .xorpd, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x57 }, 0, .none, .sse2 },
......@@ -1122,13 +1157,17 @@ pub const table = [_]Entry{
11221157 .{ .pabsw, .rm, &.{ .mm, .mm_m64 }, &.{ 0x0f, 0x38, 0x1d }, 0, .none, .ssse3 },
11231158 .{ .pabsw, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0x1d }, 0, .none, .ssse3 },
11241159
1160 .{ .palignr, .rmi, &.{ .xmm, .xmm_m128, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x0f }, 0, .none, .ssse3 },
1161
11251162 // SSE4.1
11261163 .{ .blendpd, .rmi, &.{ .xmm, .xmm_m128, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x0d }, 0, .none, .sse4_1 },
11271164
11281165 .{ .blendps, .rmi, &.{ .xmm, .xmm_m128, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x0c }, 0, .none, .sse4_1 },
11291166
1167 .{ .blendvpd, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0x15 }, 0, .none, .sse4_1 },
11301168 .{ .blendvpd, .rm0, &.{ .xmm, .xmm_m128, .xmm0 }, &.{ 0x66, 0x0f, 0x38, 0x15 }, 0, .none, .sse4_1 },
11311169
1170 .{ .blendvps, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0x14 }, 0, .none, .sse4_1 },
11321171 .{ .blendvps, .rm0, &.{ .xmm, .xmm_m128, .xmm0 }, &.{ 0x66, 0x0f, 0x38, 0x14 }, 0, .none, .sse4_1 },
11331172
11341173 .{ .extractps, .mri, &.{ .rm32, .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x17 }, 0, .none, .sse4_1 },
......@@ -1137,6 +1176,8 @@ pub const table = [_]Entry{
11371176
11381177 .{ .packusdw, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0x2b }, 0, .none, .sse4_1 },
11391178
1179 .{ .pcmpeqq, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0x29 }, 0, .none, .sse4_1 },
1180
11401181 .{ .pextrb, .mri, &.{ .r32_m8, .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x14 }, 0, .none, .sse4_1 },
11411182 .{ .pextrd, .mri, &.{ .rm32, .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x16 }, 0, .none, .sse4_1 },
11421183 .{ .pextrq, .mri, &.{ .rm64, .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x16 }, 0, .long, .sse4_1 },
......@@ -1171,6 +1212,33 @@ pub const table = [_]Entry{
11711212
11721213 .{ .roundss, .rmi, &.{ .xmm, .xmm_m32, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x0a }, 0, .none, .sse4_1 },
11731214
1215 // SSE4.2
1216 .{ .pcmpgtq, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0x37 }, 0, .none, .sse4_2 },
1217
1218 // PCLMUL
1219 .{ .pclmulqdq, .rmi, &.{ .xmm, .xmm_m128, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x44 }, 0, .none, .pclmul },
1220
1221 // AES
1222 .{ .aesdec, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0xde }, 0, .none, .aes },
1223
1224 .{ .aesdeclast, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0xdf }, 0, .none, .aes },
1225
1226 .{ .aesenc, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0xdc }, 0, .none, .aes },
1227
1228 .{ .aesenclast, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0xdd }, 0, .none, .aes },
1229
1230 .{ .aesimc, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0xdb }, 0, .none, .aes },
1231
1232 .{ .aeskeygenassist, .rmi, &.{ .xmm, .xmm_m128, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0xdf }, 0, .none, .aes },
1233
1234 // SHA
1235 .{ .sha256msg1, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x0f, 0x38, 0xcc }, 0, .none, .sha },
1236
1237 .{ .sha256msg2, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x0f, 0x38, 0xcd }, 0, .none, .sha },
1238
1239 .{ .sha256rnds2, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x0f, 0x38, 0xcb }, 0, .none, .sha },
1240 .{ .sha256rnds2, .rm0, &.{ .xmm, .xmm_m128, .xmm0 }, &.{ 0x0f, 0x38, 0xcb }, 0, .none, .sha },
1241
11741242 // AVX
11751243 .{ .vaddpd, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x58 }, 0, .vex_128_wig, .avx },
11761244 .{ .vaddpd, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x58 }, 0, .vex_256_wig, .avx },
......@@ -1182,6 +1250,18 @@ pub const table = [_]Entry{
11821250
11831251 .{ .vaddss, .rvm, &.{ .xmm, .xmm, .xmm_m32 }, &.{ 0xf3, 0x0f, 0x58 }, 0, .vex_lig_wig, .avx },
11841252
1253 .{ .vaesdec, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0xde }, 0, .vex_128_wig, .@"aes avx" },
1254
1255 .{ .vaesdeclast, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0xdf }, 0, .vex_128_wig, .@"aes avx" },
1256
1257 .{ .vaesenc, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0xdc }, 0, .vex_128_wig, .@"aes avx" },
1258
1259 .{ .vaesenclast, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0xdd }, 0, .vex_128_wig, .@"aes avx" },
1260
1261 .{ .vaesimc, .rm, &.{ .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0xdb }, 0, .vex_128_wig, .@"aes avx" },
1262
1263 .{ .vaeskeygenassist, .rmi, &.{ .xmm, .xmm_m128, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0xdf }, 0, .vex_128_wig, .@"aes avx" },
1264
11851265 .{ .vandnpd, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x55 }, 0, .vex_128_wig, .avx },
11861266 .{ .vandnpd, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x55 }, 0, .vex_256_wig, .avx },
11871267
......@@ -1295,6 +1375,16 @@ pub const table = [_]Entry{
12951375
12961376 .{ .vmaxss, .rvm, &.{ .xmm, .xmm, .xmm_m32 }, &.{ 0xf3, 0x0f, 0x5f }, 0, .vex_lig_wig, .avx },
12971377
1378 .{ .vmovmskps, .rm, &.{ .r32, .xmm }, &.{ 0x0f, 0x50 }, 0, .vex_128_wig, .avx },
1379 .{ .vmovmskps, .rm, &.{ .r64, .xmm }, &.{ 0x0f, 0x50 }, 0, .vex_128_wig, .avx },
1380 .{ .vmovmskps, .rm, &.{ .r32, .ymm }, &.{ 0x0f, 0x50 }, 0, .vex_256_wig, .avx },
1381 .{ .vmovmskps, .rm, &.{ .r64, .ymm }, &.{ 0x0f, 0x50 }, 0, .vex_256_wig, .avx },
1382
1383 .{ .vmovmskpd, .rm, &.{ .r32, .xmm }, &.{ 0x66, 0x0f, 0x50 }, 0, .vex_128_wig, .avx },
1384 .{ .vmovmskpd, .rm, &.{ .r64, .xmm }, &.{ 0x66, 0x0f, 0x50 }, 0, .vex_128_wig, .avx },
1385 .{ .vmovmskpd, .rm, &.{ .r32, .ymm }, &.{ 0x66, 0x0f, 0x50 }, 0, .vex_256_wig, .avx },
1386 .{ .vmovmskpd, .rm, &.{ .r64, .ymm }, &.{ 0x66, 0x0f, 0x50 }, 0, .vex_256_wig, .avx },
1387
12981388 .{ .vminpd, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x5d }, 0, .vex_128_wig, .avx },
12991389 .{ .vminpd, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x5d }, 0, .vex_256_wig, .avx },
13001390
......@@ -1404,10 +1494,26 @@ pub const table = [_]Entry{
14041494 .{ .vpaddusb, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xdc }, 0, .vex_128_wig, .avx },
14051495 .{ .vpaddusw, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xdd }, 0, .vex_128_wig, .avx },
14061496
1497 .{ .vpalignr, .rvmi, &.{ .xmm, .xmm, .xmm_m128, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x0f }, 0, .vex_128_wig, .avx },
1498
14071499 .{ .vpand, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xdb }, 0, .vex_128_wig, .avx },
14081500
14091501 .{ .vpandn, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xdf }, 0, .vex_128_wig, .avx },
14101502
1503 .{ .vpclmulqdq, .rvmi, &.{ .xmm, .xmm, .xmm_m128, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x44 }, 0, .vex_128_wig, .@"pclmul avx" },
1504
1505 .{ .vpcmpeqb, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x74 }, 0, .vex_128_wig, .avx },
1506 .{ .vpcmpeqw, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x75 }, 0, .vex_128_wig, .avx },
1507 .{ .vpcmpeqd, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x76 }, 0, .vex_128_wig, .avx },
1508
1509 .{ .vpcmpeqq, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0x29 }, 0, .vex_128_wig, .avx },
1510
1511 .{ .vpcmpgtb, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x64 }, 0, .vex_128_wig, .avx },
1512 .{ .vpcmpgtw, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x65 }, 0, .vex_128_wig, .avx },
1513 .{ .vpcmpgtd, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x66 }, 0, .vex_128_wig, .avx },
1514
1515 .{ .vpcmpgtq, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0x37 }, 0, .vex_128_wig, .avx },
1516
14111517 .{ .vpextrb, .mri, &.{ .r32_m8, .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x14 }, 0, .vex_128_w0, .avx },
14121518 .{ .vpextrd, .mri, &.{ .rm32, .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x16 }, 0, .vex_128_w0, .avx },
14131519 .{ .vpextrq, .mri, &.{ .rm64, .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x16 }, 0, .vex_128_w1, .avx },
......@@ -1439,6 +1545,9 @@ pub const table = [_]Entry{
14391545
14401546 .{ .vpminud, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0x3b }, 0, .vex_128_wig, .avx },
14411547
1548 .{ .vpmovmskb, .rm, &.{ .r32, .xmm }, &.{ 0x66, 0x0f, 0xd7 }, 0, .vex_128_wig, .avx },
1549 .{ .vpmovmskb, .rm, &.{ .r64, .xmm }, &.{ 0x66, 0x0f, 0xd7 }, 0, .vex_128_wig, .avx },
1550
14421551 .{ .vpmulhw, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xe5 }, 0, .vex_128_wig, .avx },
14431552
14441553 .{ .vpmulld, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0x38, 0x40 }, 0, .vex_128_wig, .avx },
......@@ -1447,6 +1556,26 @@ pub const table = [_]Entry{
14471556
14481557 .{ .vpor, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xeb }, 0, .vex_128_wig, .avx },
14491558
1559 .{ .vpshufd, .rmi, &.{ .xmm, .xmm_m128, .imm8 }, &.{ 0x66, 0x0f, 0x70 }, 0, .vex_128_wig, .avx },
1560
1561 .{ .vpshufhw, .rmi, &.{ .xmm, .xmm_m128, .imm8 }, &.{ 0xf3, 0x0f, 0x70 }, 0, .vex_128_wig, .avx },
1562
1563 .{ .vpshuflw, .rmi, &.{ .xmm, .xmm_m128, .imm8 }, &.{ 0xf2, 0x0f, 0x70 }, 0, .vex_128_wig, .avx },
1564
1565 .{ .vpsllw, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xf1 }, 0, .vex_128_wig, .avx },
1566 .{ .vpsllw, .vmi, &.{ .xmm, .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x71 }, 6, .vex_128_wig, .avx },
1567 .{ .vpslld, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xf2 }, 0, .vex_128_wig, .avx },
1568 .{ .vpslld, .vmi, &.{ .xmm, .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x72 }, 6, .vex_128_wig, .avx },
1569 .{ .vpsllq, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xf3 }, 0, .vex_128_wig, .avx },
1570 .{ .vpsllq, .vmi, &.{ .xmm, .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x73 }, 6, .vex_128_wig, .avx },
1571
1572 .{ .vpslldq, .vmi, &.{ .xmm, .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x73 }, 7, .vex_128_wig, .avx },
1573
1574 .{ .vpsraw, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xe1 }, 0, .vex_128_wig, .avx },
1575 .{ .vpsraw, .vmi, &.{ .xmm, .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x71 }, 4, .vex_128_wig, .avx },
1576 .{ .vpsrad, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xe2 }, 0, .vex_128_wig, .avx },
1577 .{ .vpsrad, .vmi, &.{ .xmm, .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x72 }, 4, .vex_128_wig, .avx },
1578
14501579 .{ .vpsrlw, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xd1 }, 0, .vex_128_wig, .avx },
14511580 .{ .vpsrlw, .vmi, &.{ .xmm, .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x71 }, 2, .vex_128_wig, .avx },
14521581 .{ .vpsrld, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xd2 }, 0, .vex_128_wig, .avx },
......@@ -1454,6 +1583,8 @@ pub const table = [_]Entry{
14541583 .{ .vpsrlq, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xd3 }, 0, .vex_128_wig, .avx },
14551584 .{ .vpsrlq, .vmi, &.{ .xmm, .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x73 }, 2, .vex_128_wig, .avx },
14561585
1586 .{ .vpsrldq, .vmi, &.{ .xmm, .xmm, .imm8 }, &.{ 0x66, 0x0f, 0x73 }, 3, .vex_128_wig, .avx },
1587
14571588 .{ .vpsubb, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xf8 }, 0, .vex_128_wig, .avx },
14581589 .{ .vpsubw, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xf9 }, 0, .vex_128_wig, .avx },
14591590 .{ .vpsubd, .rvm, &.{ .xmm, .xmm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xfa }, 0, .vex_128_wig, .avx },
......@@ -1550,6 +1681,18 @@ pub const table = [_]Entry{
15501681 .{ .vfmadd213ss, .rvm, &.{ .xmm, .xmm, .xmm_m32 }, &.{ 0x66, 0x0f, 0x38, 0xa9 }, 0, .vex_lig_w0, .fma },
15511682 .{ .vfmadd231ss, .rvm, &.{ .xmm, .xmm, .xmm_m32 }, &.{ 0x66, 0x0f, 0x38, 0xb9 }, 0, .vex_lig_w0, .fma },
15521683
1684 // VPCLMULQDQ
1685 .{ .vpclmulqdq, .rvmi, &.{ .ymm, .ymm, .ymm_m256, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x44 }, 0, .vex_256_wig, .vpclmulqdq },
1686
1687 // VAES
1688 .{ .vaesdec, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0xde }, 0, .vex_256_wig, .vaes },
1689
1690 .{ .vaesdeclast, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0xdf }, 0, .vex_256_wig, .vaes },
1691
1692 .{ .vaesenc, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0xdc }, 0, .vex_256_wig, .vaes },
1693
1694 .{ .vaesenclast, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0xdd }, 0, .vex_256_wig, .vaes },
1695
15531696 // AVX2
15541697 .{ .vbroadcastss, .rm, &.{ .xmm, .xmm }, &.{ 0x66, 0x0f, 0x38, 0x18 }, 0, .vex_128_w0, .avx2 },
15551698 .{ .vbroadcastss, .rm, &.{ .ymm, .xmm }, &.{ 0x66, 0x0f, 0x38, 0x18 }, 0, .vex_256_w0, .avx2 },
......@@ -1577,36 +1720,73 @@ pub const table = [_]Entry{
15771720 .{ .vpaddusb, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xdc }, 0, .vex_256_wig, .avx2 },
15781721 .{ .vpaddusw, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xdd }, 0, .vex_256_wig, .avx2 },
15791722
1723 .{ .vpalignr, .rvmi, &.{ .ymm, .ymm, .ymm_m256, .imm8 }, &.{ 0x66, 0x0f, 0x3a, 0x0f }, 0, .vex_256_wig, .avx2 },
1724
15801725 .{ .vpand, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xdb }, 0, .vex_256_wig, .avx2 },
15811726
15821727 .{ .vpandn, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xdf }, 0, .vex_256_wig, .avx2 },
15831728
1584 .{ .vpmaxsb, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x3c }, 0, .vex_256_wig, .avx },
1585 .{ .vpmaxsw, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xee }, 0, .vex_256_wig, .avx },
1586 .{ .vpmaxsd, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x3d }, 0, .vex_256_wig, .avx },
1729 .{ .vpcmpeqb, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x74 }, 0, .vex_256_wig, .avx2 },
1730 .{ .vpcmpeqw, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x75 }, 0, .vex_256_wig, .avx2 },
1731 .{ .vpcmpeqd, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x76 }, 0, .vex_256_wig, .avx2 },
1732
1733 .{ .vpcmpeqq, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x29 }, 0, .vex_256_wig, .avx2 },
1734
1735 .{ .vpcmpgtb, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x64 }, 0, .vex_256_wig, .avx2 },
1736 .{ .vpcmpgtw, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x65 }, 0, .vex_256_wig, .avx2 },
1737 .{ .vpcmpgtd, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x66 }, 0, .vex_256_wig, .avx2 },
1738
1739 .{ .vpcmpgtq, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x37 }, 0, .vex_256_wig, .avx2 },
1740
1741 .{ .vpmaxsb, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x3c }, 0, .vex_256_wig, .avx2 },
1742 .{ .vpmaxsw, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xee }, 0, .vex_256_wig, .avx2 },
1743 .{ .vpmaxsd, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x3d }, 0, .vex_256_wig, .avx2 },
15871744
1588 .{ .vpmaxub, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xde }, 0, .vex_256_wig, .avx },
1589 .{ .vpmaxuw, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x3e }, 0, .vex_256_wig, .avx },
1745 .{ .vpmaxub, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xde }, 0, .vex_256_wig, .avx2 },
1746 .{ .vpmaxuw, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x3e }, 0, .vex_256_wig, .avx2 },
15901747
1591 .{ .vpmaxud, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x3f }, 0, .vex_256_wig, .avx },
1748 .{ .vpmaxud, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x3f }, 0, .vex_256_wig, .avx2 },
15921749
1593 .{ .vpminsb, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x38 }, 0, .vex_256_wig, .avx },
1594 .{ .vpminsw, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xea }, 0, .vex_256_wig, .avx },
1595 .{ .vpminsd, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x39 }, 0, .vex_256_wig, .avx },
1750 .{ .vpminsb, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x38 }, 0, .vex_256_wig, .avx2 },
1751 .{ .vpminsw, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xea }, 0, .vex_256_wig, .avx2 },
1752 .{ .vpminsd, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x39 }, 0, .vex_256_wig, .avx2 },
15961753
1597 .{ .vpminub, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xda }, 0, .vex_256_wig, .avx },
1598 .{ .vpminuw, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x3a }, 0, .vex_256_wig, .avx },
1754 .{ .vpminub, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xda }, 0, .vex_256_wig, .avx2 },
1755 .{ .vpminuw, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x3a }, 0, .vex_256_wig, .avx2 },
15991756
1600 .{ .vpminud, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x3b }, 0, .vex_256_wig, .avx },
1757 .{ .vpminud, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x3b }, 0, .vex_256_wig, .avx2 },
16011758
1602 .{ .vpmulhw, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xe5 }, 0, .vex_256_wig, .avx },
1759 .{ .vpmovmskb, .rm, &.{ .r32, .ymm }, &.{ 0x66, 0x0f, 0xd7 }, 0, .vex_256_wig, .avx2 },
1760 .{ .vpmovmskb, .rm, &.{ .r64, .ymm }, &.{ 0x66, 0x0f, 0xd7 }, 0, .vex_256_wig, .avx2 },
16031761
1604 .{ .vpmulld, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x40 }, 0, .vex_256_wig, .avx },
1762 .{ .vpmulhw, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xe5 }, 0, .vex_256_wig, .avx2 },
16051763
1606 .{ .vpmullw, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xd5 }, 0, .vex_256_wig, .avx },
1764 .{ .vpmulld, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0x38, 0x40 }, 0, .vex_256_wig, .avx2 },
1765
1766 .{ .vpmullw, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xd5 }, 0, .vex_256_wig, .avx2 },
16071767
16081768 .{ .vpor, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xeb }, 0, .vex_256_wig, .avx2 },
16091769
1770 .{ .vpshufd, .rmi, &.{ .ymm, .ymm_m256, .imm8 }, &.{ 0x66, 0x0f, 0x70 }, 0, .vex_256_wig, .avx2 },
1771
1772 .{ .vpshufhw, .rmi, &.{ .ymm, .ymm_m256, .imm8 }, &.{ 0xf3, 0x0f, 0x70 }, 0, .vex_256_wig, .avx2 },
1773
1774 .{ .vpshuflw, .rmi, &.{ .ymm, .ymm_m256, .imm8 }, &.{ 0xf2, 0x0f, 0x70 }, 0, .vex_256_wig, .avx2 },
1775
1776 .{ .vpsllw, .rvm, &.{ .ymm, .ymm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xf1 }, 0, .vex_256_wig, .avx2 },
1777 .{ .vpsllw, .vmi, &.{ .ymm, .ymm, .imm8 }, &.{ 0x66, 0x0f, 0x71 }, 6, .vex_256_wig, .avx2 },
1778 .{ .vpslld, .rvm, &.{ .ymm, .ymm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xf2 }, 0, .vex_256_wig, .avx2 },
1779 .{ .vpslld, .vmi, &.{ .ymm, .ymm, .imm8 }, &.{ 0x66, 0x0f, 0x72 }, 6, .vex_256_wig, .avx2 },
1780 .{ .vpsllq, .rvm, &.{ .ymm, .ymm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xf3 }, 0, .vex_256_wig, .avx2 },
1781 .{ .vpsllq, .vmi, &.{ .ymm, .ymm, .imm8 }, &.{ 0x66, 0x0f, 0x73 }, 6, .vex_256_wig, .avx2 },
1782
1783 .{ .vpslldq, .vmi, &.{ .ymm, .ymm, .imm8 }, &.{ 0x66, 0x0f, 0x73 }, 7, .vex_256_wig, .avx2 },
1784
1785 .{ .vpsraw, .rvm, &.{ .ymm, .ymm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xe1 }, 0, .vex_256_wig, .avx2 },
1786 .{ .vpsraw, .vmi, &.{ .ymm, .ymm, .imm8 }, &.{ 0x66, 0x0f, 0x71 }, 4, .vex_256_wig, .avx2 },
1787 .{ .vpsrad, .rvm, &.{ .ymm, .ymm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xe2 }, 0, .vex_256_wig, .avx2 },
1788 .{ .vpsrad, .vmi, &.{ .ymm, .ymm, .imm8 }, &.{ 0x66, 0x0f, 0x72 }, 4, .vex_256_wig, .avx2 },
1789
16101790 .{ .vpsrlw, .rvm, &.{ .ymm, .ymm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xd1 }, 0, .vex_256_wig, .avx2 },
16111791 .{ .vpsrlw, .vmi, &.{ .ymm, .ymm, .imm8 }, &.{ 0x66, 0x0f, 0x71 }, 2, .vex_256_wig, .avx2 },
16121792 .{ .vpsrld, .rvm, &.{ .ymm, .ymm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xd2 }, 0, .vex_256_wig, .avx2 },
......@@ -1614,6 +1794,8 @@ pub const table = [_]Entry{
16141794 .{ .vpsrlq, .rvm, &.{ .ymm, .ymm, .xmm_m128 }, &.{ 0x66, 0x0f, 0xd3 }, 0, .vex_256_wig, .avx2 },
16151795 .{ .vpsrlq, .vmi, &.{ .ymm, .ymm, .imm8 }, &.{ 0x66, 0x0f, 0x73 }, 2, .vex_256_wig, .avx2 },
16161796
1797 .{ .vpsrldq, .vmi, &.{ .ymm, .ymm, .imm8 }, &.{ 0x66, 0x0f, 0x73 }, 3, .vex_128_wig, .avx2 },
1798
16171799 .{ .vpsubb, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xf8 }, 0, .vex_256_wig, .avx2 },
16181800 .{ .vpsubw, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xf9 }, 0, .vex_256_wig, .avx2 },
16191801 .{ .vpsubd, .rvm, &.{ .ymm, .ymm, .ymm_m256 }, &.{ 0x66, 0x0f, 0xfa }, 0, .vex_256_wig, .avx2 },
test/behavior/bitreverse.zig+1-1
......@@ -11,11 +11,11 @@ test "@bitReverse large exotic integer" {
1111
1212test "@bitReverse" {
1313 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
14 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1514 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
1615 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
1716 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1817 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
18 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf) return error.SkipZigTest;
1919
2020 try comptime testBitReverse();
2121 try testBitReverse();
test/behavior/byteswap.zig+1-1
......@@ -4,11 +4,11 @@ const expect = std.testing.expect;
44
55test "@byteSwap integers" {
66 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
7 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
87 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
98 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
109 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest;
1110 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
11 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf) return error.SkipZigTest;
1212
1313 const ByteSwapIntTest = struct {
1414 fn run() !void {
test/behavior/math.zig+2-2
......@@ -1321,7 +1321,7 @@ test "remainder division" {
13211321 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
13221322 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
13231323 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
1324 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
1324 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf) return error.SkipZigTest;
13251325 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
13261326
13271327 if (builtin.zig_backend == .stage2_llvm and builtin.os.tag == .windows) {
......@@ -1401,9 +1401,9 @@ test "float modulo division using @mod" {
14011401 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
14021402 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
14031403 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
1404 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
14051404 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
14061405 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
1406 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf) return error.SkipZigTest;
14071407
14081408 try comptime fmod(f16);
14091409 try comptime fmod(f32);
test/behavior/popcount.zig-1
......@@ -14,7 +14,6 @@ test "@popCount integers" {
1414}
1515
1616test "@popCount 128bit integer" {
17 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
1817 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
1918 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
2019 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO