Commit bb55276f063f2934795c1c2523dc7525cd4adce5 | zig

author	r00ster91 <r00ster91@protonmail.com> 2022-05-02 09:26:08+02:00
committer	Andrew Kelley <andrew@ziglang.org> 2022-05-02 15:29:04-04:00
log	bb55276f063f2934795c1c2523dc7525cd4adce5
tree	6b37f7695f6ac9e6c72d70590d93fc91f0e25167
parent	9af4cada73e43fb98e906a0ed79197963d1a05ac

Avoid some unnecessary underscores in constant names

3 files changed, 268 insertions(+), 268 deletions(-)

lib
- std
  - elf.zig
  - os
    linux.zig
  - target.zig

lib/std/elf.zig+205-205

...	...	@@ -943,577 +943,577 @@ pub const Half = switch (@sizeOf(usize)) {
943	943	else => @compileError("expected pointer size of 32 or 64"),
944	944	};
945	945
946		/// Machine architectures
	946	/// Machine architectures.
	947	///
947	948	/// See current registered ELF machine architectures at:
948		/// http://www.sco.com/developers/gabi/latest/ch4.eheader.html
949		/// The underscore prefix is because many of these start with numbers.
	949	/// http://www.sco.com/developers/gabi/latest/ch4.eheader.html
950	950	pub const EM = enum(u16) {
951	951	/// No machine
952		_NONE = 0,
	952	NONE = 0,
953	953
954	954	/// AT&T WE 32100
955		_M32 = 1,
	955	M32 = 1,
956	956
957	957	/// SPARC
958		_SPARC = 2,
	958	SPARC = 2,
959	959
960	960	/// Intel 386
961		_386 = 3,
	961	@"386" = 3,
962	962
963	963	/// Motorola 68000
964		_68K = 4,
	964	@"68K" = 4,
965	965
966	966	/// Motorola 88000
967		_88K = 5,
	967	@"88K" = 5,
968	968
969	969	/// Intel MCU
970		_IAMCU = 6,
	970	IAMCU = 6,
971	971
972	972	/// Intel 80860
973		_860 = 7,
	973	@"860" = 7,
974	974
975	975	/// MIPS R3000
976		_MIPS = 8,
	976	MIPS = 8,
977	977
978	978	/// IBM System/370
979		_S370 = 9,
	979	S370 = 9,
980	980
981	981	/// MIPS RS3000 Little-endian
982		_MIPS_RS3_LE = 10,
	982	MIPS_RS3_LE = 10,
983	983
984	984	/// SPU Mark II
985		_SPU_2 = 13,
	985	SPU_2 = 13,
986	986
987	987	/// Hewlett-Packard PA-RISC
988		_PARISC = 15,
	988	PARISC = 15,
989	989
990	990	/// Fujitsu VPP500
991		_VPP500 = 17,
	991	VPP500 = 17,
992	992
993	993	/// Enhanced instruction set SPARC
994		_SPARC32PLUS = 18,
	994	SPARC32PLUS = 18,
995	995
996	996	/// Intel 80960
997		_960 = 19,
	997	@"960" = 19,
998	998
999	999	/// PowerPC
1000		_PPC = 20,
	1000	PPC = 20,
1001	1001
1002	1002	/// PowerPC64
1003		_PPC64 = 21,
	1003	PPC64 = 21,
1004	1004
1005	1005	/// IBM System/390
1006		_S390 = 22,
	1006	S390 = 22,
1007	1007
1008	1008	/// IBM SPU/SPC
1009		_SPU = 23,
	1009	SPU = 23,
1010	1010
1011	1011	/// NEC V800
1012		_V800 = 36,
	1012	V800 = 36,
1013	1013
1014	1014	/// Fujitsu FR20
1015		_FR20 = 37,
	1015	FR20 = 37,
1016	1016
1017	1017	/// TRW RH-32
1018		_RH32 = 38,
	1018	RH32 = 38,
1019	1019
1020	1020	/// Motorola RCE
1021		_RCE = 39,
	1021	RCE = 39,
1022	1022
1023	1023	/// ARM
1024		_ARM = 40,
	1024	ARM = 40,
1025	1025
1026	1026	/// DEC Alpha
1027		_ALPHA = 41,
	1027	ALPHA = 41,
1028	1028
1029	1029	/// Hitachi SH
1030		_SH = 42,
	1030	SH = 42,
1031	1031
1032	1032	/// SPARC V9
1033		_SPARCV9 = 43,
	1033	SPARCV9 = 43,
1034	1034
1035	1035	/// Siemens TriCore
1036		_TRICORE = 44,
	1036	TRICORE = 44,
1037	1037
1038	1038	/// Argonaut RISC Core
1039		_ARC = 45,
	1039	ARC = 45,
1040	1040
1041	1041	/// Hitachi H8/300
1042		_H8_300 = 46,
	1042	H8_300 = 46,
1043	1043
1044	1044	/// Hitachi H8/300H
1045		_H8_300H = 47,
	1045	H8_300H = 47,
1046	1046
1047	1047	/// Hitachi H8S
1048		_H8S = 48,
	1048	H8S = 48,
1049	1049
1050	1050	/// Hitachi H8/500
1051		_H8_500 = 49,
	1051	H8_500 = 49,
1052	1052
1053	1053	/// Intel IA-64 processor architecture
1054		_IA_64 = 50,
	1054	IA_64 = 50,
1055	1055
1056	1056	/// Stanford MIPS-X
1057		_MIPS_X = 51,
	1057	MIPS_X = 51,
1058	1058
1059	1059	/// Motorola ColdFire
1060		_COLDFIRE = 52,
	1060	COLDFIRE = 52,
1061	1061
1062	1062	/// Motorola M68HC12
1063		_68HC12 = 53,
	1063	@"68HC12" = 53,
1064	1064
1065	1065	/// Fujitsu MMA Multimedia Accelerator
1066		_MMA = 54,
	1066	MMA = 54,
1067	1067
1068	1068	/// Siemens PCP
1069		_PCP = 55,
	1069	PCP = 55,
1070	1070
1071	1071	/// Sony nCPU embedded RISC processor
1072		_NCPU = 56,
	1072	NCPU = 56,
1073	1073
1074	1074	/// Denso NDR1 microprocessor
1075		_NDR1 = 57,
	1075	NDR1 = 57,
1076	1076
1077	1077	/// Motorola Star*Core processor
1078		_STARCORE = 58,
	1078	STARCORE = 58,
1079	1079
1080	1080	/// Toyota ME16 processor
1081		_ME16 = 59,
	1081	ME16 = 59,
1082	1082
1083	1083	/// STMicroelectronics ST100 processor
1084		_ST100 = 60,
	1084	ST100 = 60,
1085	1085
1086	1086	/// Advanced Logic Corp. TinyJ embedded processor family
1087		_TINYJ = 61,
	1087	TINYJ = 61,
1088	1088
1089	1089	/// AMD x86-64 architecture
1090		_X86_64 = 62,
	1090	X86_64 = 62,
1091	1091
1092	1092	/// Sony DSP Processor
1093		_PDSP = 63,
	1093	PDSP = 63,
1094	1094
1095	1095	/// Digital Equipment Corp. PDP-10
1096		_PDP10 = 64,
	1096	PDP10 = 64,
1097	1097
1098	1098	/// Digital Equipment Corp. PDP-11
1099		_PDP11 = 65,
	1099	PDP11 = 65,
1100	1100
1101	1101	/// Siemens FX66 microcontroller
1102		_FX66 = 66,
	1102	FX66 = 66,
1103	1103
1104	1104	/// STMicroelectronics ST9+ 8/16 bit microcontroller
1105		_ST9PLUS = 67,
	1105	ST9PLUS = 67,
1106	1106
1107	1107	/// STMicroelectronics ST7 8-bit microcontroller
1108		_ST7 = 68,
	1108	ST7 = 68,
1109	1109
1110	1110	/// Motorola MC68HC16 Microcontroller
1111		_68HC16 = 69,
	1111	@"68HC16" = 69,
1112	1112
1113	1113	/// Motorola MC68HC11 Microcontroller
1114		_68HC11 = 70,
	1114	@"68HC11" = 70,
1115	1115
1116	1116	/// Motorola MC68HC08 Microcontroller
1117		_68HC08 = 71,
	1117	@"68HC08" = 71,
1118	1118
1119	1119	/// Motorola MC68HC05 Microcontroller
1120		_68HC05 = 72,
	1120	@"68HC05" = 72,
1121	1121
1122	1122	/// Silicon Graphics SVx
1123		_SVX = 73,
	1123	SVX = 73,
1124	1124
1125	1125	/// STMicroelectronics ST19 8-bit microcontroller
1126		_ST19 = 74,
	1126	ST19 = 74,
1127	1127
1128	1128	/// Digital VAX
1129		_VAX = 75,
	1129	VAX = 75,
1130	1130
1131	1131	/// Axis Communications 32-bit embedded processor
1132		_CRIS = 76,
	1132	CRIS = 76,
1133	1133
1134	1134	/// Infineon Technologies 32-bit embedded processor
1135		_JAVELIN = 77,
	1135	JAVELIN = 77,
1136	1136
1137	1137	/// Element 14 64-bit DSP Processor
1138		_FIREPATH = 78,
	1138	FIREPATH = 78,
1139	1139
1140	1140	/// LSI Logic 16-bit DSP Processor
1141		_ZSP = 79,
	1141	ZSP = 79,
1142	1142
1143	1143	/// Donald Knuth's educational 64-bit processor
1144		_MMIX = 80,
	1144	MMIX = 80,
1145	1145
1146	1146	/// Harvard University machine-independent object files
1147		_HUANY = 81,
	1147	HUANY = 81,
1148	1148
1149	1149	/// SiTera Prism
1150		_PRISM = 82,
	1150	PRISM = 82,
1151	1151
1152	1152	/// Atmel AVR 8-bit microcontroller
1153		_AVR = 83,
	1153	AVR = 83,
1154	1154
1155	1155	/// Fujitsu FR30
1156		_FR30 = 84,
	1156	FR30 = 84,
1157	1157
1158	1158	/// Mitsubishi D10V
1159		_D10V = 85,
	1159	D10V = 85,
1160	1160
1161	1161	/// Mitsubishi D30V
1162		_D30V = 86,
	1162	D30V = 86,
1163	1163
1164	1164	/// NEC v850
1165		_V850 = 87,
	1165	V850 = 87,
1166	1166
1167	1167	/// Mitsubishi M32R
1168		_M32R = 88,
	1168	M32R = 88,
1169	1169
1170	1170	/// Matsushita MN10300
1171		_MN10300 = 89,
	1171	MN10300 = 89,
1172	1172
1173	1173	/// Matsushita MN10200
1174		_MN10200 = 90,
	1174	MN10200 = 90,
1175	1175
1176	1176	/// picoJava
1177		_PJ = 91,
	1177	PJ = 91,
1178	1178
1179	1179	/// OpenRISC 32-bit embedded processor
1180		_OPENRISC = 92,
	1180	OPENRISC = 92,
1181	1181
1182	1182	/// ARC International ARCompact processor (old spelling/synonym: EM_ARC_A5)
1183		_ARC_COMPACT = 93,
	1183	ARC_COMPACT = 93,
1184	1184
1185	1185	/// Tensilica Xtensa Architecture
1186		_XTENSA = 94,
	1186	XTENSA = 94,
1187	1187
1188	1188	/// Alphamosaic VideoCore processor
1189		_VIDEOCORE = 95,
	1189	VIDEOCORE = 95,
1190	1190
1191	1191	/// Thompson Multimedia General Purpose Processor
1192		_TMM_GPP = 96,
	1192	TMM_GPP = 96,
1193	1193
1194	1194	/// National Semiconductor 32000 series
1195		_NS32K = 97,
	1195	NS32K = 97,
1196	1196
1197	1197	/// Tenor Network TPC processor
1198		_TPC = 98,
	1198	TPC = 98,
1199	1199
1200	1200	/// Trebia SNP 1000 processor
1201		_SNP1K = 99,
	1201	SNP1K = 99,
1202	1202
1203	1203	/// STMicroelectronics (www.st.com) ST200
1204		_ST200 = 100,
	1204	ST200 = 100,
1205	1205
1206	1206	/// Ubicom IP2xxx microcontroller family
1207		_IP2K = 101,
	1207	IP2K = 101,
1208	1208
1209	1209	/// MAX Processor
1210		_MAX = 102,
	1210	MAX = 102,
1211	1211
1212	1212	/// National Semiconductor CompactRISC microprocessor
1213		_CR = 103,
	1213	CR = 103,
1214	1214
1215	1215	/// Fujitsu F2MC16
1216		_F2MC16 = 104,
	1216	F2MC16 = 104,
1217	1217
1218	1218	/// Texas Instruments embedded microcontroller msp430
1219		_MSP430 = 105,
	1219	MSP430 = 105,
1220	1220
1221	1221	/// Analog Devices Blackfin (DSP) processor
1222		_BLACKFIN = 106,
	1222	BLACKFIN = 106,
1223	1223
1224	1224	/// S1C33 Family of Seiko Epson processors
1225		_SE_C33 = 107,
	1225	SE_C33 = 107,
1226	1226
1227	1227	/// Sharp embedded microprocessor
1228		_SEP = 108,
	1228	SEP = 108,
1229	1229
1230	1230	/// Arca RISC Microprocessor
1231		_ARCA = 109,
	1231	ARCA = 109,
1232	1232
1233	1233	/// Microprocessor series from PKU-Unity Ltd. and MPRC of Peking University
1234		_UNICORE = 110,
	1234	UNICORE = 110,
1235	1235
1236	1236	/// eXcess: 16/32/64-bit configurable embedded CPU
1237		_EXCESS = 111,
	1237	EXCESS = 111,
1238	1238
1239	1239	/// Icera Semiconductor Inc. Deep Execution Processor
1240		_DXP = 112,
	1240	DXP = 112,
1241	1241
1242	1242	/// Altera Nios II soft-core processor
1243		_ALTERA_NIOS2 = 113,
	1243	ALTERA_NIOS2 = 113,
1244	1244
1245	1245	/// National Semiconductor CompactRISC CRX
1246		_CRX = 114,
	1246	CRX = 114,
1247	1247
1248	1248	/// Motorola XGATE embedded processor
1249		_XGATE = 115,
	1249	XGATE = 115,
1250	1250
1251	1251	/// Infineon C16x/XC16x processor
1252		_C166 = 116,
	1252	C166 = 116,
1253	1253
1254	1254	/// Renesas M16C series microprocessors
1255		_M16C = 117,
	1255	M16C = 117,
1256	1256
1257	1257	/// Microchip Technology dsPIC30F Digital Signal Controller
1258		_DSPIC30F = 118,
	1258	DSPIC30F = 118,
1259	1259
1260	1260	/// Freescale Communication Engine RISC core
1261		_CE = 119,
	1261	CE = 119,
1262	1262
1263	1263	/// Renesas M32C series microprocessors
1264		_M32C = 120,
	1264	M32C = 120,
1265	1265
1266	1266	/// Altium TSK3000 core
1267		_TSK3000 = 131,
	1267	TSK3000 = 131,
1268	1268
1269	1269	/// Freescale RS08 embedded processor
1270		_RS08 = 132,
	1270	RS08 = 132,
1271	1271
1272	1272	/// Analog Devices SHARC family of 32-bit DSP processors
1273		_SHARC = 133,
	1273	SHARC = 133,
1274	1274
1275	1275	/// Cyan Technology eCOG2 microprocessor
1276		_ECOG2 = 134,
	1276	ECOG2 = 134,
1277	1277
1278	1278	/// Sunplus S+core7 RISC processor
1279		_SCORE7 = 135,
	1279	SCORE7 = 135,
1280	1280
1281	1281	/// New Japan Radio (NJR) 24-bit DSP Processor
1282		_DSP24 = 136,
	1282	DSP24 = 136,
1283	1283
1284	1284	/// Broadcom VideoCore III processor
1285		_VIDEOCORE3 = 137,
	1285	VIDEOCORE3 = 137,
1286	1286
1287	1287	/// RISC processor for Lattice FPGA architecture
1288		_LATTICEMICO32 = 138,
	1288	LATTICEMICO32 = 138,
1289	1289
1290	1290	/// Seiko Epson C17 family
1291		_SE_C17 = 139,
	1291	SE_C17 = 139,
1292	1292
1293	1293	/// The Texas Instruments TMS320C6000 DSP family
1294		_TI_C6000 = 140,
	1294	TI_C6000 = 140,
1295	1295
1296	1296	/// The Texas Instruments TMS320C2000 DSP family
1297		_TI_C2000 = 141,
	1297	TI_C2000 = 141,
1298	1298
1299	1299	/// The Texas Instruments TMS320C55x DSP family
1300		_TI_C5500 = 142,
	1300	TI_C5500 = 142,
1301	1301
1302	1302	/// STMicroelectronics 64bit VLIW Data Signal Processor
1303		_MMDSP_PLUS = 160,
	1303	MMDSP_PLUS = 160,
1304	1304
1305	1305	/// Cypress M8C microprocessor
1306		_CYPRESS_M8C = 161,
	1306	CYPRESS_M8C = 161,
1307	1307
1308	1308	/// Renesas R32C series microprocessors
1309		_R32C = 162,
	1309	R32C = 162,
1310	1310
1311	1311	/// NXP Semiconductors TriMedia architecture family
1312		_TRIMEDIA = 163,
	1312	TRIMEDIA = 163,
1313	1313
1314	1314	/// Qualcomm Hexagon processor
1315		_HEXAGON = 164,
	1315	HEXAGON = 164,
1316	1316
1317	1317	/// Intel 8051 and variants
1318		_8051 = 165,
	1318	@"8051" = 165,
1319	1319
1320	1320	/// STMicroelectronics STxP7x family of configurable and extensible RISC processors
1321		_STXP7X = 166,
	1321	STXP7X = 166,
1322	1322
1323	1323	/// Andes Technology compact code size embedded RISC processor family
1324		_NDS32 = 167,
	1324	NDS32 = 167,
1325	1325
1326	1326	/// Cyan Technology eCOG1X family
1327		_ECOG1X = 168,
	1327	ECOG1X = 168,
1328	1328
1329	1329	/// Dallas Semiconductor MAXQ30 Core Micro-controllers
1330		_MAXQ30 = 169,
	1330	MAXQ30 = 169,
1331	1331
1332	1332	/// New Japan Radio (NJR) 16-bit DSP Processor
1333		_XIMO16 = 170,
	1333	XIMO16 = 170,
1334	1334
1335	1335	/// M2000 Reconfigurable RISC Microprocessor
1336		_MANIK = 171,
	1336	MANIK = 171,
1337	1337
1338	1338	/// Cray Inc. NV2 vector architecture
1339		_CRAYNV2 = 172,
	1339	CRAYNV2 = 172,
1340	1340
1341	1341	/// Renesas RX family
1342		_RX = 173,
	1342	RX = 173,
1343	1343
1344	1344	/// Imagination Technologies META processor architecture
1345		_METAG = 174,
	1345	METAG = 174,
1346	1346
1347	1347	/// MCST Elbrus general purpose hardware architecture
1348		_MCST_ELBRUS = 175,
	1348	MCST_ELBRUS = 175,
1349	1349
1350	1350	/// Cyan Technology eCOG16 family
1351		_ECOG16 = 176,
	1351	ECOG16 = 176,
1352	1352
1353	1353	/// National Semiconductor CompactRISC CR16 16-bit microprocessor
1354		_CR16 = 177,
	1354	CR16 = 177,
1355	1355
1356	1356	/// Freescale Extended Time Processing Unit
1357		_ETPU = 178,
	1357	ETPU = 178,
1358	1358
1359	1359	/// Infineon Technologies SLE9X core
1360		_SLE9X = 179,
	1360	SLE9X = 179,
1361	1361
1362	1362	/// Intel L10M
1363		_L10M = 180,
	1363	L10M = 180,
1364	1364
1365	1365	/// Intel K10M
1366		_K10M = 181,
	1366	K10M = 181,
1367	1367
1368	1368	/// ARM AArch64
1369		_AARCH64 = 183,
	1369	AARCH64 = 183,
1370	1370
1371	1371	/// Atmel Corporation 32-bit microprocessor family
1372		_AVR32 = 185,
	1372	AVR32 = 185,
1373	1373
1374	1374	/// STMicroeletronics STM8 8-bit microcontroller
1375		_STM8 = 186,
	1375	STM8 = 186,
1376	1376
1377	1377	/// Tilera TILE64 multicore architecture family
1378		_TILE64 = 187,
	1378	TILE64 = 187,
1379	1379
1380	1380	/// Tilera TILEPro multicore architecture family
1381		_TILEPRO = 188,
	1381	TILEPRO = 188,
1382	1382
1383	1383	/// NVIDIA CUDA architecture
1384		_CUDA = 190,
	1384	CUDA = 190,
1385	1385
1386	1386	/// Tilera TILE-Gx multicore architecture family
1387		_TILEGX = 191,
	1387	TILEGX = 191,
1388	1388
1389	1389	/// CloudShield architecture family
1390		_CLOUDSHIELD = 192,
	1390	CLOUDSHIELD = 192,
1391	1391
1392	1392	/// KIPO-KAIST Core-A 1st generation processor family
1393		_COREA_1ST = 193,
	1393	COREA_1ST = 193,
1394	1394
1395	1395	/// KIPO-KAIST Core-A 2nd generation processor family
1396		_COREA_2ND = 194,
	1396	COREA_2ND = 194,
1397	1397
1398	1398	/// Synopsys ARCompact V2
1399		_ARC_COMPACT2 = 195,
	1399	ARC_COMPACT2 = 195,
1400	1400
1401	1401	/// Open8 8-bit RISC soft processor core
1402		_OPEN8 = 196,
	1402	OPEN8 = 196,
1403	1403
1404	1404	/// Renesas RL78 family
1405		_RL78 = 197,
	1405	RL78 = 197,
1406	1406
1407	1407	/// Broadcom VideoCore V processor
1408		_VIDEOCORE5 = 198,
	1408	VIDEOCORE5 = 198,
1409	1409
1410	1410	/// Renesas 78KOR family
1411		_78KOR = 199,
	1411	@"78KOR" = 199,
1412	1412
1413	1413	/// Freescale 56800EX Digital Signal Controller (DSC)
1414		_56800EX = 200,
	1414	@"56800EX" = 200,
1415	1415
1416	1416	/// Beyond BA1 CPU architecture
1417		_BA1 = 201,
	1417	BA1 = 201,
1418	1418
1419	1419	/// Beyond BA2 CPU architecture
1420		_BA2 = 202,
	1420	BA2 = 202,
1421	1421
1422	1422	/// XMOS xCORE processor family
1423		_XCORE = 203,
	1423	XCORE = 203,
1424	1424
1425	1425	/// Microchip 8-bit PIC(r) family
1426		_MCHP_PIC = 204,
	1426	MCHP_PIC = 204,
1427	1427
1428	1428	/// Reserved by Intel
1429		_INTEL205 = 205,
	1429	INTEL205 = 205,
1430	1430
1431	1431	/// Reserved by Intel
1432		_INTEL206 = 206,
	1432	INTEL206 = 206,
1433	1433
1434	1434	/// Reserved by Intel
1435		_INTEL207 = 207,
	1435	INTEL207 = 207,
1436	1436
1437	1437	/// Reserved by Intel
1438		_INTEL208 = 208,
	1438	INTEL208 = 208,
1439	1439
1440	1440	/// Reserved by Intel
1441		_INTEL209 = 209,
	1441	INTEL209 = 209,
1442	1442
1443	1443	/// KM211 KM32 32-bit processor
1444		_KM32 = 210,
	1444	KM32 = 210,
1445	1445
1446	1446	/// KM211 KMX32 32-bit processor
1447		_KMX32 = 211,
	1447	KMX32 = 211,
1448	1448
1449	1449	/// KM211 KMX16 16-bit processor
1450		_KMX16 = 212,
	1450	KMX16 = 212,
1451	1451
1452	1452	/// KM211 KMX8 8-bit processor
1453		_KMX8 = 213,
	1453	KMX8 = 213,
1454	1454
1455	1455	/// KM211 KVARC processor
1456		_KVARC = 214,
	1456	KVARC = 214,
1457	1457
1458	1458	/// Paneve CDP architecture family
1459		_CDP = 215,
	1459	CDP = 215,
1460	1460
1461	1461	/// Cognitive Smart Memory Processor
1462		_COGE = 216,
	1462	COGE = 216,
1463	1463
1464	1464	/// iCelero CoolEngine
1465		_COOL = 217,
	1465	COOL = 217,
1466	1466
1467	1467	/// Nanoradio Optimized RISC
1468		_NORC = 218,
	1468	NORC = 218,
1469	1469
1470	1470	/// CSR Kalimba architecture family
1471		_CSR_KALIMBA = 219,
	1471	CSR_KALIMBA = 219,
1472	1472
1473	1473	/// AMD GPU architecture
1474		_AMDGPU = 224,
	1474	AMDGPU = 224,
1475	1475
1476	1476	/// RISC-V
1477		_RISCV = 243,
	1477	RISCV = 243,
1478	1478
1479	1479	/// Lanai 32-bit processor
1480		_LANAI = 244,
	1480	LANAI = 244,
1481	1481
1482	1482	/// Linux kernel bpf virtual machine
1483		_BPF = 247,
	1483	BPF = 247,
1484	1484
1485	1485	/// C-SKY
1486		_CSKY = 252,
	1486	CSKY = 252,
1487	1487
1488	1488	/// Fujitsu FR-V
1489		_FRV = 0x5441,
	1489	FRV = 0x5441,
1490	1490
1491	1491	_,
1492	1492
1493	1493	pub fn toTargetCpuArch(em: EM) ?std.Target.Cpu.Arch {
1494	1494	return switch (em) {
1495		._AVR => .avr,
1496		._MSP430 => .msp430,
1497		._ARC => .arc,
1498		._ARM => .arm,
1499		._HEXAGON => .hexagon,
1500		._68K => .m68k,
1501		._MIPS => .mips,
1502		._MIPS_RS3_LE => .mipsel,
1503		._PPC => .powerpc,
1504		._SPARC => .sparc,
1505		._386 => .i386,
1506		._XCORE => .xcore,
1507		._CSR_KALIMBA => .kalimba,
1508		._LANAI => .lanai,
1509		._AARCH64 => .aarch64,
1510		._PPC64 => .powerpc64,
1511		._RISCV => .riscv64,
1512		._X86_64 => .x86_64,
1513		._BPF => .bpfel,
1514		._SPARCV9 => .sparcv9,
1515		._S390 => .s390x,
1516		._SPU_2 => .spu_2,
	1495	.AVR => .avr,
	1496	.MSP430 => .msp430,
	1497	.ARC => .arc,
	1498	.ARM => .arm,
	1499	.HEXAGON => .hexagon,
	1500	.@"68K" => .m68k,
	1501	.MIPS => .mips,
	1502	.MIPS_RS3_LE => .mipsel,
	1503	.PPC => .powerpc,
	1504	.SPARC => .sparc,
	1505	.@"386" => .i386,
	1506	.XCORE => .xcore,
	1507	.CSR_KALIMBA => .kalimba,
	1508	.LANAI => .lanai,
	1509	.AARCH64 => .aarch64,
	1510	.PPC64 => .powerpc64,
	1511	.RISCV => .riscv64,
	1512	.X86_64 => .x86_64,
	1513	.BPF => .bpfel,
	1514	.SPARCV9 => .sparcv9,
	1515	.S390 => .s390x,
	1516	.SPU_2 => .spu_2,
1517	1517	// there's many cases we don't (yet) handle, or will never have a
1518	1518	// zig target cpu arch equivalent (such as null).
1519	1519	else => null,

lib/std/os/linux.zig+7-7

...	...	@@ -5418,8 +5418,8 @@ pub const PERF = struct {
5418	5418	// TODO: Add the rest of the AUDIT defines?
5419	5419	pub const AUDIT = struct {
5420	5420	pub const ARCH = enum(u32) {
5421		const _64BIT = 0x80000000;
5422		const _LE = 0x40000000;
	5421	const @"64BIT" = 0x80000000;
	5422	const LE = 0x40000000;
5423	5423
5424	5424	pub const current: AUDIT.ARCH = switch (native_arch) {
5425	5425	.i386 => .I386,
...	...	@@ -5440,13 +5440,13 @@ pub const AUDIT = struct {
5440	5440	ARM = toAudit(.arm),
5441	5441	ARMEB = toAudit(.armeb),
5442	5442	CSKY = toAudit(.csky),
5443		HEXAGON = @enumToInt(std.elf.EM._HEXAGON),
	5443	HEXAGON = @enumToInt(std.elf.EM.HEXAGON),
5444	5444	I386 = toAudit(.i386),
5445	5445	M68K = toAudit(.m68k),
5446	5446	MIPS = toAudit(.mips),
5447		MIPSEL = toAudit(.mips) \| _LE,
	5447	MIPSEL = toAudit(.mips) \| LE,
5448	5448	MIPS64 = toAudit(.mips64),
5449		MIPSEL64 = toAudit(.mips64) \| _LE,
	5449	MIPSEL64 = toAudit(.mips64) \| LE,
5450	5450	PPC = toAudit(.powerpc),
5451	5451	PPC64 = toAudit(.powerpc64),
5452	5452	PPC64LE = toAudit(.powerpc64le),
...	...	@@ -5459,8 +5459,8 @@ pub const AUDIT = struct {
5459	5459
5460	5460	fn toAudit(arch: std.Target.Cpu.Arch) u32 {
5461	5461	var res: u32 = @enumToInt(arch.toElfMachine());
5462		if (arch.endian() == .Little) res \|= _LE;
5463		if (arch.ptrBitWidth() == 64) res \|= _64BIT;
	5462	if (arch.endian() == .Little) res \|= LE;
	5463	if (arch.ptrBitWidth() == 64) res \|= @"64BIT";
5464	5464
5465	5465	return res;
5466	5466	}

lib/std/target.zig+56-56

...	...	@@ -914,62 +914,62 @@ pub const Target = struct {
914	914
915	915	pub fn toElfMachine(arch: Arch) std.elf.EM {
916	916	return switch (arch) {
917		.avr => ._AVR,
918		.msp430 => ._MSP430,
919		.arc => ._ARC,
920		.arm => ._ARM,
921		.armeb => ._ARM,
922		.hexagon => ._HEXAGON,
923		.m68k => ._68K,
924		.le32 => ._NONE,
925		.mips => ._MIPS,
926		.mipsel => ._MIPS_RS3_LE,
927		.powerpc, .powerpcle => ._PPC,
928		.r600 => ._NONE,
929		.riscv32 => ._RISCV,
930		.sparc => ._SPARC,
931		.sparcel => ._SPARC,
932		.tce => ._NONE,
933		.tcele => ._NONE,
934		.thumb => ._ARM,
935		.thumbeb => ._ARM,
936		.i386 => ._386,
937		.xcore => ._XCORE,
938		.nvptx => ._NONE,
939		.amdil => ._NONE,
940		.hsail => ._NONE,
941		.spir => ._NONE,
942		.kalimba => ._CSR_KALIMBA,
943		.shave => ._NONE,
944		.lanai => ._LANAI,
945		.wasm32 => ._NONE,
946		.renderscript32 => ._NONE,
947		.aarch64_32 => ._AARCH64,
948		.aarch64 => ._AARCH64,
949		.aarch64_be => ._AARCH64,
950		.mips64 => ._MIPS,
951		.mips64el => ._MIPS_RS3_LE,
952		.powerpc64 => ._PPC64,
953		.powerpc64le => ._PPC64,
954		.riscv64 => ._RISCV,
955		.x86_64 => ._X86_64,
956		.nvptx64 => ._NONE,
957		.le64 => ._NONE,
958		.amdil64 => ._NONE,
959		.hsail64 => ._NONE,
960		.spir64 => ._NONE,
961		.wasm64 => ._NONE,
962		.renderscript64 => ._NONE,
963		.amdgcn => ._NONE,
964		.bpfel => ._BPF,
965		.bpfeb => ._BPF,
966		.csky => ._CSKY,
967		.sparcv9 => ._SPARCV9,
968		.s390x => ._S390,
969		.ve => ._NONE,
970		.spu_2 => ._SPU_2,
971		.spirv32 => ._NONE,
972		.spirv64 => ._NONE,
	917	.avr => .AVR,
	918	.msp430 => .MSP430,
	919	.arc => .ARC,
	920	.arm => .ARM,
	921	.armeb => .ARM,
	922	.hexagon => .HEXAGON,
	923	.m68k => .@"68K",
	924	.le32 => .NONE,
	925	.mips => .MIPS,
	926	.mipsel => .MIPS_RS3_LE,
	927	.powerpc, .powerpcle => .PPC,
	928	.r600 => .NONE,
	929	.riscv32 => .RISCV,
	930	.sparc => .SPARC,
	931	.sparcel => .SPARC,
	932	.tce => .NONE,
	933	.tcele => .NONE,
	934	.thumb => .ARM,
	935	.thumbeb => .ARM,
	936	.i386 => .@"386",
	937	.xcore => .XCORE,
	938	.nvptx => .NONE,
	939	.amdil => .NONE,
	940	.hsail => .NONE,
	941	.spir => .NONE,
	942	.kalimba => .CSR_KALIMBA,
	943	.shave => .NONE,
	944	.lanai => .LANAI,
	945	.wasm32 => .NONE,
	946	.renderscript32 => .NONE,
	947	.aarch64_32 => .AARCH64,
	948	.aarch64 => .AARCH64,
	949	.aarch64_be => .AARCH64,
	950	.mips64 => .MIPS,
	951	.mips64el => .MIPS_RS3_LE,
	952	.powerpc64 => .PPC64,
	953	.powerpc64le => .PPC64,
	954	.riscv64 => .RISCV,
	955	.x86_64 => .X86_64,
	956	.nvptx64 => .NONE,
	957	.le64 => .NONE,
	958	.amdil64 => .NONE,
	959	.hsail64 => .NONE,
	960	.spir64 => .NONE,
	961	.wasm64 => .NONE,
	962	.renderscript64 => .NONE,
	963	.amdgcn => .NONE,
	964	.bpfel => .BPF,
	965	.bpfeb => .BPF,
	966	.csky => .CSKY,
	967	.sparcv9 => .SPARCV9,
	968	.s390x => .S390,
	969	.ve => .NONE,
	970	.spu_2 => .SPU_2,
	971	.spirv32 => .NONE,
	972	.spirv64 => .NONE,
973	973	};
974	974	}
975	975