| ... | @@ -4877,11 +4877,14 @@ fn airWrapOptional(self: *Self, inst: Air.Inst.Index) !void { | ... | @@ -4877,11 +4877,14 @@ fn airWrapOptional(self: *Self, inst: Air.Inst.Index) !void { |
| 4877 | switch (opt_mcv) { | 4877 | switch (opt_mcv) { |
| 4878 | else => unreachable, | 4878 | else => unreachable, |
| 4879 | | 4879 | |
| 4880 | .register => |opt_reg| try self.asmRegisterImmediate( | 4880 | .register => |opt_reg| { |
| 4881 | .{ ._s, .bt }, | 4881 | try self.truncateRegister(pl_ty, opt_reg); |
| 4882 | opt_reg, | 4882 | try self.asmRegisterImmediate( |
| 4883 | Immediate.u(@as(u6, @intCast(pl_abi_size * 8))), | 4883 | .{ ._s, .bt }, |
| 4884 | ), | 4884 | opt_reg, |
| | 4885 | Immediate.u(@as(u6, @intCast(pl_abi_size * 8))), |
| | 4886 | ); |
| | 4887 | }, |
| 4885 | | 4888 | |
| 4886 | .load_frame => |frame_addr| try self.asmMemoryImmediate( | 4889 | .load_frame => |frame_addr| try self.asmMemoryImmediate( |
| 4887 | .{ ._, .mov }, | 4890 | .{ ._, .mov }, |
| ... | @@ -7430,16 +7433,20 @@ fn genUnOp(self: *Self, maybe_inst: ?Air.Inst.Index, tag: Air.Inst.Tag, src_air: | ... | @@ -7430,16 +7433,20 @@ fn genUnOp(self: *Self, maybe_inst: ?Air.Inst.Index, tag: Air.Inst.Tag, src_air: |
| 7430 | }; | 7433 | }; |
| 7431 | defer if (dst_lock) |lock| self.register_manager.unlockReg(lock); | 7434 | defer if (dst_lock) |lock| self.register_manager.unlockReg(lock); |
| 7432 | | 7435 | |
| | 7436 | const abi_size: u16 = @intCast(src_ty.abiSize(mod)); |
| 7433 | switch (tag) { | 7437 | switch (tag) { |
| 7434 | .not => { | 7438 | .not => { |
| 7435 | const limb_abi_size: u16 = @intCast(@min(src_ty.abiSize(mod), 8)); | 7439 | const limb_abi_size: u16 = @min(abi_size, 8); |
| 7436 | const int_info = if (src_ty.ip_index == .bool_type) | 7440 | const int_info = if (src_ty.ip_index == .bool_type) |
| 7437 | std.builtin.Type.Int{ .signedness = .unsigned, .bits = 1 } | 7441 | std.builtin.Type.Int{ .signedness = .unsigned, .bits = 1 } |
| 7438 | else | 7442 | else |
| 7439 | src_ty.intInfo(mod); | 7443 | src_ty.intInfo(mod); |
| 7440 | var byte_off: i32 = 0; | 7444 | var byte_off: i32 = 0; |
| 7441 | while (byte_off * 8 < int_info.bits) : (byte_off += limb_abi_size) { | 7445 | while (byte_off * 8 < int_info.bits) : (byte_off += limb_abi_size) { |
| 7442 | const limb_bits: u16 = @intCast(@min(int_info.bits - byte_off * 8, limb_abi_size * 8)); | 7446 | const limb_bits: u16 = @intCast(@min(switch (int_info.signedness) { |
| | 7447 | .signed => abi_size * 8, |
| | 7448 | .unsigned => int_info.bits, |
| | 7449 | } - byte_off * 8, limb_abi_size * 8)); |
| 7443 | const limb_ty = try mod.intType(int_info.signedness, limb_bits); | 7450 | const limb_ty = try mod.intType(int_info.signedness, limb_bits); |
| 7444 | const limb_mcv = switch (byte_off) { | 7451 | const limb_mcv = switch (byte_off) { |
| 7445 | 0 => dst_mcv, | 7452 | 0 => dst_mcv, |
| ... | @@ -7454,7 +7461,6 @@ fn genUnOp(self: *Self, maybe_inst: ?Air.Inst.Index, tag: Air.Inst.Tag, src_air: | ... | @@ -7454,7 +7461,6 @@ fn genUnOp(self: *Self, maybe_inst: ?Air.Inst.Index, tag: Air.Inst.Tag, src_air: |
| 7454 | }, | 7461 | }, |
| 7455 | .neg => { | 7462 | .neg => { |
| 7456 | try self.genUnOpMir(.{ ._, .neg }, src_ty, dst_mcv); | 7463 | try self.genUnOpMir(.{ ._, .neg }, src_ty, dst_mcv); |
| 7457 | const abi_size: u16 = @intCast(src_ty.abiSize(mod)); | | |
| 7458 | const bit_size = src_ty.intInfo(mod).bits; | 7464 | const bit_size = src_ty.intInfo(mod).bits; |
| 7459 | if (abi_size * 8 > bit_size) { | 7465 | if (abi_size * 8 > bit_size) { |
| 7460 | if (dst_mcv.isRegister()) { | 7466 | if (dst_mcv.isRegister()) { |