| ... | ... | @@ -4903,7 +4903,26 @@ fn genBinOp( |
| 4903 | 4903 | const addr_reg_lock = self.register_manager.lockRegAssumeUnused(addr_reg); |
| 4904 | 4904 | defer self.register_manager.unlockReg(addr_reg_lock); |
| 4905 | 4905 | |
| 4906 | | try self.loadMemPtrIntoRegister(addr_reg, Type.usize, mat_src_mcv); |
| 4906 | switch (mat_src_mcv) { |
| 4907 | .memory => |addr| try self.genSetReg(Type.usize, addr_reg, .{ .immediate = addr }), |
| 4908 | .linker_load => |load_struct| { |
| 4909 | const atom_index = if (self.bin_file.cast(link.File.MachO)) |macho_file| blk: { |
| 4910 | const atom = try macho_file.getOrCreateAtomForDecl(self.mod_fn.owner_decl); |
| 4911 | break :blk macho_file.getAtom(atom).getSymbolIndex().?; |
| 4912 | } else if (self.bin_file.cast(link.File.Coff)) |coff_file| blk: { |
| 4913 | const atom = try coff_file.getOrCreateAtomForDecl(self.mod_fn.owner_decl); |
| 4914 | break :blk coff_file.getAtom(atom).getSymbolIndex().?; |
| 4915 | } else unreachable; |
| 4916 | |
| 4917 | switch (load_struct.type) { |
| 4918 | .import => unreachable, |
| 4919 | .got => try self.asmMovLinker(addr_reg, atom_index, load_struct), |
| 4920 | .direct => try self.asmLeaLinker(addr_reg, atom_index, load_struct), |
| 4921 | } |
| 4922 | }, |
| 4923 | else => unreachable, |
| 4924 | } |
| 4925 | |
| 4907 | 4926 | try self.asmCmovccRegisterMemory( |
| 4908 | 4927 | registerAlias(tmp_reg, cmov_abi_size), |
| 4909 | 4928 | Memory.sib(Memory.PtrSize.fromSize(cmov_abi_size), .{ .base = addr_reg }), |
| ... | ... | @@ -5026,11 +5045,30 @@ fn genBinOpMir(self: *Self, mir_tag: Mir.Inst.Tag, ty: Type, dst_mcv: MCValue, s |
| 5026 | 5045 | } = switch (dst_mcv) { |
| 5027 | 5046 | else => unreachable, |
| 5028 | 5047 | .memory, .linker_load => dst: { |
| 5029 | | const dst_addr_reg = try self.register_manager.allocReg(null, gp); |
| 5048 | const dst_addr_reg = (try self.register_manager.allocReg(null, gp)).to64(); |
| 5030 | 5049 | const dst_addr_lock = self.register_manager.lockRegAssumeUnused(dst_addr_reg); |
| 5031 | 5050 | errdefer self.register_manager.unlockReg(dst_addr_lock); |
| 5032 | 5051 | |
| 5033 | | try self.loadMemPtrIntoRegister(dst_addr_reg, Type.usize, dst_mcv); |
| 5052 | switch (dst_mcv) { |
| 5053 | .memory => |addr| try self.genSetReg(Type.usize, dst_addr_reg, .{ .immediate = addr }), |
| 5054 | .linker_load => |load_struct| { |
| 5055 | const atom_index = if (self.bin_file.cast(link.File.MachO)) |macho_file| blk: { |
| 5056 | const atom = try macho_file.getOrCreateAtomForDecl(self.mod_fn.owner_decl); |
| 5057 | break :blk macho_file.getAtom(atom).getSymbolIndex().?; |
| 5058 | } else if (self.bin_file.cast(link.File.Coff)) |coff_file| blk: { |
| 5059 | const atom = try coff_file.getOrCreateAtomForDecl(self.mod_fn.owner_decl); |
| 5060 | break :blk coff_file.getAtom(atom).getSymbolIndex().?; |
| 5061 | } else unreachable; |
| 5062 | |
| 5063 | switch (load_struct.type) { |
| 5064 | .import => unreachable, |
| 5065 | .got => try self.asmMovLinker(dst_addr_reg, atom_index, load_struct), |
| 5066 | .direct => try self.asmLeaLinker(dst_addr_reg, atom_index, load_struct), |
| 5067 | } |
| 5068 | }, |
| 5069 | else => unreachable, |
| 5070 | } |
| 5071 | |
| 5034 | 5072 | break :dst .{ |
| 5035 | 5073 | .addr_reg = dst_addr_reg, |
| 5036 | 5074 | .addr_lock = dst_addr_lock, |
| ... | ... | @@ -5052,11 +5090,30 @@ fn genBinOpMir(self: *Self, mir_tag: Mir.Inst.Tag, ty: Type, dst_mcv: MCValue, s |
| 5052 | 5090 | const src_limb_lock = self.register_manager.lockRegAssumeUnused(src_limb_reg); |
| 5053 | 5091 | errdefer self.register_manager.unlockReg(src_limb_lock); |
| 5054 | 5092 | |
| 5055 | | const src_addr_reg = try self.register_manager.allocReg(null, gp); |
| 5093 | const src_addr_reg = (try self.register_manager.allocReg(null, gp)).to64(); |
| 5056 | 5094 | const src_addr_lock = self.register_manager.lockRegAssumeUnused(src_addr_reg); |
| 5057 | 5095 | errdefer self.register_manager.unlockReg(src_addr_lock); |
| 5058 | 5096 | |
| 5059 | | try self.loadMemPtrIntoRegister(src_addr_reg, Type.usize, src_mcv); |
| 5097 | switch (src_mcv) { |
| 5098 | .memory => |addr| try self.genSetReg(Type.usize, src_addr_reg, .{ .immediate = addr }), |
| 5099 | .linker_load => |load_struct| { |
| 5100 | const atom_index = if (self.bin_file.cast(link.File.MachO)) |macho_file| blk: { |
| 5101 | const atom = try macho_file.getOrCreateAtomForDecl(self.mod_fn.owner_decl); |
| 5102 | break :blk macho_file.getAtom(atom).getSymbolIndex().?; |
| 5103 | } else if (self.bin_file.cast(link.File.Coff)) |coff_file| blk: { |
| 5104 | const atom = try coff_file.getOrCreateAtomForDecl(self.mod_fn.owner_decl); |
| 5105 | break :blk coff_file.getAtom(atom).getSymbolIndex().?; |
| 5106 | } else unreachable; |
| 5107 | |
| 5108 | switch (load_struct.type) { |
| 5109 | .import => unreachable, |
| 5110 | .got => try self.asmMovLinker(src_addr_reg, atom_index, load_struct), |
| 5111 | .direct => try self.asmLeaLinker(src_addr_reg, atom_index, load_struct), |
| 5112 | } |
| 5113 | }, |
| 5114 | else => unreachable, |
| 5115 | } |
| 5116 | |
| 5060 | 5117 | break :src .{ |
| 5061 | 5118 | .addr_reg = src_addr_reg, |
| 5062 | 5119 | .addr_lock = src_addr_lock, |