| ... | @@ -444,6 +444,10 @@ pub const X86 = enum(usize) { | ... | @@ -444,6 +444,10 @@ pub const X86 = enum(usize) { |
| 444 | set_mempolicy_home_node = 450, | 444 | set_mempolicy_home_node = 450, |
| 445 | cachestat = 451, | 445 | cachestat = 451, |
| 446 | fchmodat2 = 452, | 446 | fchmodat2 = 452, |
| | 447 | map_shadow_stack = 453, |
| | 448 | futex_wake = 454, |
| | 449 | futex_wait = 455, |
| | 450 | futex_requeue = 456, |
| 447 | }; | 451 | }; |
| 448 | | 452 | |
| 449 | pub const X64 = enum(usize) { | 453 | pub const X64 = enum(usize) { |
| ... | @@ -812,6 +816,9 @@ pub const X64 = enum(usize) { | ... | @@ -812,6 +816,9 @@ pub const X64 = enum(usize) { |
| 812 | cachestat = 451, | 816 | cachestat = 451, |
| 813 | fchmodat2 = 452, | 817 | fchmodat2 = 452, |
| 814 | map_shadow_stack = 453, | 818 | map_shadow_stack = 453, |
| | 819 | futex_wake = 454, |
| | 820 | futex_wait = 455, |
| | 821 | futex_requeue = 456, |
| 815 | }; | 822 | }; |
| 816 | | 823 | |
| 817 | pub const Arm = enum(usize) { | 824 | pub const Arm = enum(usize) { |
| ... | @@ -1222,6 +1229,10 @@ pub const Arm = enum(usize) { | ... | @@ -1222,6 +1229,10 @@ pub const Arm = enum(usize) { |
| 1222 | set_mempolicy_home_node = 450, | 1229 | set_mempolicy_home_node = 450, |
| 1223 | cachestat = 451, | 1230 | cachestat = 451, |
| 1224 | fchmodat2 = 452, | 1231 | fchmodat2 = 452, |
| | 1232 | map_shadow_stack = 453, |
| | 1233 | futex_wake = 454, |
| | 1234 | futex_wait = 455, |
| | 1235 | futex_requeue = 456, |
| 1225 | | 1236 | |
| 1226 | breakpoint = arm_base + 1, | 1237 | breakpoint = arm_base + 1, |
| 1227 | cacheflush = arm_base + 2, | 1238 | cacheflush = arm_base + 2, |
| ... | @@ -1616,6 +1627,10 @@ pub const Sparc64 = enum(usize) { | ... | @@ -1616,6 +1627,10 @@ pub const Sparc64 = enum(usize) { |
| 1616 | set_mempolicy_home_node = 450, | 1627 | set_mempolicy_home_node = 450, |
| 1617 | cachestat = 451, | 1628 | cachestat = 451, |
| 1618 | fchmodat2 = 452, | 1629 | fchmodat2 = 452, |
| | 1630 | map_shadow_stack = 453, |
| | 1631 | futex_wake = 454, |
| | 1632 | futex_wait = 455, |
| | 1633 | futex_requeue = 456, |
| 1619 | }; | 1634 | }; |
| 1620 | | 1635 | |
| 1621 | pub const Mips = enum(usize) { | 1636 | pub const Mips = enum(usize) { |
| ... | @@ -2041,6 +2056,10 @@ pub const Mips = enum(usize) { | ... | @@ -2041,6 +2056,10 @@ pub const Mips = enum(usize) { |
| 2041 | set_mempolicy_home_node = Linux + 450, | 2056 | set_mempolicy_home_node = Linux + 450, |
| 2042 | cachestat = Linux + 451, | 2057 | cachestat = Linux + 451, |
| 2043 | fchmodat2 = Linux + 452, | 2058 | fchmodat2 = Linux + 452, |
| | 2059 | map_shadow_stack = Linux + 453, |
| | 2060 | futex_wake = Linux + 454, |
| | 2061 | futex_wait = Linux + 455, |
| | 2062 | futex_requeue = Linux + 456, |
| 2044 | }; | 2063 | }; |
| 2045 | | 2064 | |
| 2046 | pub const Mips64 = enum(usize) { | 2065 | pub const Mips64 = enum(usize) { |
| ... | @@ -2402,6 +2421,10 @@ pub const Mips64 = enum(usize) { | ... | @@ -2402,6 +2421,10 @@ pub const Mips64 = enum(usize) { |
| 2402 | set_mempolicy_home_node = Linux + 450, | 2421 | set_mempolicy_home_node = Linux + 450, |
| 2403 | cachestat = Linux + 451, | 2422 | cachestat = Linux + 451, |
| 2404 | fchmodat2 = Linux + 452, | 2423 | fchmodat2 = Linux + 452, |
| | 2424 | map_shadow_stack = Linux + 453, |
| | 2425 | futex_wake = Linux + 454, |
| | 2426 | futex_wait = Linux + 455, |
| | 2427 | futex_requeue = Linux + 456, |
| 2405 | }; | 2428 | }; |
| 2406 | | 2429 | |
| 2407 | pub const PowerPC = enum(usize) { | 2430 | pub const PowerPC = enum(usize) { |
| ... | @@ -2838,6 +2861,10 @@ pub const PowerPC = enum(usize) { | ... | @@ -2838,6 +2861,10 @@ pub const PowerPC = enum(usize) { |
| 2838 | set_mempolicy_home_node = 450, | 2861 | set_mempolicy_home_node = 450, |
| 2839 | cachestat = 451, | 2862 | cachestat = 451, |
| 2840 | fchmodat2 = 452, | 2863 | fchmodat2 = 452, |
| | 2864 | map_shadow_stack = 453, |
| | 2865 | futex_wake = 454, |
| | 2866 | futex_wait = 455, |
| | 2867 | futex_requeue = 456, |
| 2841 | }; | 2868 | }; |
| 2842 | | 2869 | |
| 2843 | pub const PowerPC64 = enum(usize) { | 2870 | pub const PowerPC64 = enum(usize) { |
| ... | @@ -3246,6 +3273,10 @@ pub const PowerPC64 = enum(usize) { | ... | @@ -3246,6 +3273,10 @@ pub const PowerPC64 = enum(usize) { |
| 3246 | set_mempolicy_home_node = 450, | 3273 | set_mempolicy_home_node = 450, |
| 3247 | cachestat = 451, | 3274 | cachestat = 451, |
| 3248 | fchmodat2 = 452, | 3275 | fchmodat2 = 452, |
| | 3276 | map_shadow_stack = 453, |
| | 3277 | futex_wake = 454, |
| | 3278 | futex_wait = 455, |
| | 3279 | futex_requeue = 456, |
| 3249 | }; | 3280 | }; |
| 3250 | | 3281 | |
| 3251 | pub const Arm64 = enum(usize) { | 3282 | pub const Arm64 = enum(usize) { |
| ... | @@ -3557,6 +3588,10 @@ pub const Arm64 = enum(usize) { | ... | @@ -3557,6 +3588,10 @@ pub const Arm64 = enum(usize) { |
| 3557 | set_mempolicy_home_node = 450, | 3588 | set_mempolicy_home_node = 450, |
| 3558 | cachestat = 451, | 3589 | cachestat = 451, |
| 3559 | fchmodat2 = 452, | 3590 | fchmodat2 = 452, |
| | 3591 | map_shadow_stack = 453, |
| | 3592 | futex_wake = 454, |
| | 3593 | futex_wait = 455, |
| | 3594 | futex_requeue = 456, |
| 3560 | }; | 3595 | }; |
| 3561 | | 3596 | |
| 3562 | pub const RiscV64 = enum(usize) { | 3597 | pub const RiscV64 = enum(usize) { |
| ... | @@ -3869,6 +3904,10 @@ pub const RiscV64 = enum(usize) { | ... | @@ -3869,6 +3904,10 @@ pub const RiscV64 = enum(usize) { |
| 3869 | set_mempolicy_home_node = 450, | 3904 | set_mempolicy_home_node = 450, |
| 3870 | cachestat = 451, | 3905 | cachestat = 451, |
| 3871 | fchmodat2 = 452, | 3906 | fchmodat2 = 452, |
| | 3907 | map_shadow_stack = 453, |
| | 3908 | futex_wake = 454, |
| | 3909 | futex_wait = 455, |
| | 3910 | futex_requeue = 456, |
| 3872 | | 3911 | |
| 3873 | riscv_flush_icache = arch_specific_syscall + 15, | 3912 | riscv_flush_icache = arch_specific_syscall + 15, |
| 3874 | }; | 3913 | }; |