| ... | ... | @@ -964,7 +964,7 @@ pub const Instruction = union(enum) { |
| 964 | 964 | // See appendix A of the SPARCv9 ISA manual. |
| 965 | 965 | |
| 966 | 966 | pub fn add(comptime s2: type, rs1: Register, rs2: s2, rd: Register) Instruction { |
| 967 | | return switch(s2) { |
| 967 | return switch (s2) { |
| 968 | 968 | Register => format3a(0b10, 0b00_0000, rs1, rs2, rd), |
| 969 | 969 | i13 => format3b(0b10, 0b00_0000, rs1, rs2, rd), |
| 970 | 970 | else => unreachable, |
| ... | ... | @@ -972,7 +972,7 @@ pub const Instruction = union(enum) { |
| 972 | 972 | } |
| 973 | 973 | |
| 974 | 974 | pub fn @"or"(comptime s2: type, rs1: Register, rs2: s2, rd: Register) Instruction { |
| 975 | | return switch(s2) { |
| 975 | return switch (s2) { |
| 976 | 976 | Register => format3a(0b10, 0b00_0010, rs1, rs2, rd), |
| 977 | 977 | i13 => format3b(0b10, 0b00_0010, rs1, rs2, rd), |
| 978 | 978 | else => unreachable, |
| ... | ... | @@ -984,7 +984,7 @@ pub const Instruction = union(enum) { |
| 984 | 984 | } |
| 985 | 985 | |
| 986 | 986 | pub fn @"return"(comptime s2: type, rs1: Register, rs2: s2) Instruction { |
| 987 | | return switch(s2) { |
| 987 | return switch (s2) { |
| 988 | 988 | Register => format3c(0b10, 0b11_1001, rs1, rs2), |
| 989 | 989 | i13 => format3d(0b10, 0b11_1001, rs1, rs2), |
| 990 | 990 | else => unreachable, |
| ... | ... | @@ -992,7 +992,7 @@ pub const Instruction = union(enum) { |
| 992 | 992 | } |
| 993 | 993 | |
| 994 | 994 | pub fn save(comptime s2: type, rs1: Register, rs2: s2, rd: Register) Instruction { |
| 995 | | return switch(s2) { |
| 995 | return switch (s2) { |
| 996 | 996 | Register => format3a(0b10, 0b11_1100, rs1, rs2, rd), |
| 997 | 997 | i13 => format3b(0b10, 0b11_1100, rs1, rs2, rd), |
| 998 | 998 | else => unreachable, |
| ... | ... | @@ -1000,7 +1000,7 @@ pub const Instruction = union(enum) { |
| 1000 | 1000 | } |
| 1001 | 1001 | |
| 1002 | 1002 | pub fn restore(comptime s2: type, rs1: Register, rs2: s2, rd: Register) Instruction { |
| 1003 | | return switch(s2) { |
| 1003 | return switch (s2) { |
| 1004 | 1004 | Register => format3a(0b10, 0b11_1101, rs1, rs2, rd), |
| 1005 | 1005 | i13 => format3b(0b10, 0b11_1101, rs1, rs2, rd), |
| 1006 | 1006 | else => unreachable, |
| ... | ... | @@ -1012,7 +1012,7 @@ pub const Instruction = union(enum) { |
| 1012 | 1012 | } |
| 1013 | 1013 | |
| 1014 | 1014 | pub fn sub(comptime s2: type, rs1: Register, rs2: s2, rd: Register) Instruction { |
| 1015 | | return switch(s2) { |
| 1015 | return switch (s2) { |
| 1016 | 1016 | Register => format3a(0b10, 0b00_0100, rs1, rs2, rd), |
| 1017 | 1017 | i13 => format3b(0b10, 0b00_0100, rs1, rs2, rd), |
| 1018 | 1018 | else => unreachable, |
| ... | ... | @@ -1021,7 +1021,7 @@ pub const Instruction = union(enum) { |
| 1021 | 1021 | |
| 1022 | 1022 | pub fn trap(comptime s2: type, cond: Condition, ccr: CCR, rs1: Register, rs2: s2) Instruction { |
| 1023 | 1023 | // Tcc instructions abuse the rd field to store the conditionals. |
| 1024 | | return switch(s2) { |
| 1024 | return switch (s2) { |
| 1025 | 1025 | Register => format4a(0b11_1010, ccr, rs1, rs2, @intToEnum(Register, cond)), |
| 1026 | 1026 | u7 => format4e(0b00_0100, ccr, rs1, @intToEnum(Register, cond), rs2), |
| 1027 | 1027 | else => unreachable, |