| author |  Alex Rønne Petersen <alex@alexrp.com> 2024-07-27 03:52:19+02:00 |
| committer |  Andrew Kelley <andrew@ziglang.org> 2024-07-28 19:44:52-07:00 |
| log | d1d95294fd657f771657ea671a6984b860347fb0 |
| tree | d54c1098e7f0ec8c2b65ba7a6207bf4095c4b20e |
| parent | c15755092821c5c27727ebf416689084eab5b73e |
std.Target.Cpu.Arch: Remove the `aarch64_32` tag.
This is a misfeature that we inherited from LLVM:
* https://reviews.llvm.org/D61259
* https://reviews.llvm.org/D61939
(`aarch64_32` and `arm64_32` are equivalent.)
I truly have no idea why this triple passed review in LLVM. It is, to date, the
*only* tag in the architecture component that is not, in fact, an architecture.
In reality, it is just an ILP32 ABI for AArch64 (*not* AArch32).
The triples that use `aarch64_32` look like `aarch64_32-apple-watchos`. Yes,
that triple is exactly what you think; it has no ABI component. They really,
seriously did this.
Since only Apple could come up with silliness like this, it should come as no
surprise that no one else uses `aarch64_32`. Later on, a GNU ILP32 ABI for
AArch64 was developed, and support was added to LLVM:
* https://reviews.llvm.org/D94143
* https://reviews.llvm.org/D104931
Here, sanity seems to have prevailed, and a triple using this ABI looks like
`aarch64-linux-gnu_ilp32` as you would expect.
As can be seen from the diffs in this commit, there was plenty of confusion
throughout the Zig codebase about what exactly `aarch64_32` was. So let's just
remove it. In its place, we'll use `aarch64-watchos-ilp32`,
`aarch64-linux-gnuilp32`, and so on. We'll then translate these appropriately
when talking to LLVM. Hence, this commit adds the `ilp32` ABI tag (we already
have `gnuilp32`).23 files changed, 45 insertions(+), 71 deletions(-)
lib- compiler
- compiler_rt
- test
lib/compiler/aro/aro/Attribute.zig+1-1
| ... | @@ -892,7 +892,7 @@ pub fn applyFunctionAttributes(p: *Parser, ty: Type, attr_buf_start: usize) !Typ | ... | @@ -892,7 +892,7 @@ pub fn applyFunctionAttributes(p: *Parser, ty: Type, attr_buf_start: usize) !Typ |
| 892 | else => try p.errStr(.callconv_not_supported, tok, p.tok_ids[tok].lexeme().?), | 892 | else => try p.errStr(.callconv_not_supported, tok, p.tok_ids[tok].lexeme().?), |
| 893 | }, | 893 | }, |
| 894 | .vectorcall => switch (p.comp.target.cpu.arch) { | 894 | .vectorcall => switch (p.comp.target.cpu.arch) { |
| 895 | .x86, .aarch64, .aarch64_be, .aarch64_32 => try p.attr_application_buf.append(p.gpa, attr), | 895 | .x86, .aarch64, .aarch64_be => try p.attr_application_buf.append(p.gpa, attr), |
| 896 | else => try p.errStr(.callconv_not_supported, tok, p.tok_ids[tok].lexeme().?), | 896 | else => try p.errStr(.callconv_not_supported, tok, p.tok_ids[tok].lexeme().?), |
| 897 | }, | 897 | }, |
| 898 | }, | 898 | }, |
lib/compiler/aro/aro/Compilation.zig+1-1
| ... | @@ -663,7 +663,7 @@ fn generateBuiltinTypes(comp: *Compilation) !void { | ... | @@ -663,7 +663,7 @@ fn generateBuiltinTypes(comp: *Compilation) !void { |
| 663 | .arm, .armeb, .thumb, .thumbeb => .{ | 663 | .arm, .armeb, .thumb, .thumbeb => .{ |
| 664 | .specifier = if (os != .windows and os != .netbsd and os != .openbsd) .uint else .int, | 664 | .specifier = if (os != .windows and os != .netbsd and os != .openbsd) .uint else .int, |
| 665 | }, | 665 | }, |
| 666 | .aarch64, .aarch64_be, .aarch64_32 => .{ | 666 | .aarch64, .aarch64_be => .{ |
| 667 | .specifier = if (!os.isDarwin() and os != .netbsd) .uint else .int, | 667 | .specifier = if (!os.isDarwin() and os != .netbsd) .uint else .int, |
| 668 | }, | 668 | }, |
| 669 | .x86_64, .x86 => .{ .specifier = if (os == .windows) .ushort else .int }, | 669 | .x86_64, .x86 => .{ .specifier = if (os == .windows) .ushort else .int }, |
lib/compiler/aro/aro/target.zig+3-7
| ... | @@ -132,7 +132,7 @@ pub fn int64Type(target: std.Target) Type { | ... | @@ -132,7 +132,7 @@ pub fn int64Type(target: std.Target) Type { |
| 132 | pub fn defaultFunctionAlignment(target: std.Target) u8 { | 132 | pub fn defaultFunctionAlignment(target: std.Target) u8 { |
| 133 | return switch (target.cpu.arch) { | 133 | return switch (target.cpu.arch) { |
| 134 | .arm, .armeb => 4, | 134 | .arm, .armeb => 4, |
| 135 | .aarch64, .aarch64_32, .aarch64_be => 4, | 135 | .aarch64, .aarch64_be => 4, |
| 136 | .sparc, .sparcel, .sparc64 => 4, | 136 | .sparc, .sparcel, .sparc64 => 4, |
| 137 | .riscv64 => 2, | 137 | .riscv64 => 2, |
| 138 | else => 1, | 138 | else => 1, |
| ... | @@ -322,7 +322,6 @@ pub const FPSemantics = enum { | ... | @@ -322,7 +322,6 @@ pub const FPSemantics = enum { |
| 322 | pub fn halfPrecisionType(target: std.Target) ?FPSemantics { | 322 | pub fn halfPrecisionType(target: std.Target) ?FPSemantics { |
| 323 | switch (target.cpu.arch) { | 323 | switch (target.cpu.arch) { |
| 324 | .aarch64, | 324 | .aarch64, |
| 325 | .aarch64_32, | ||
| 326 | .aarch64_be, | 325 | .aarch64_be, |
| 327 | .arm, | 326 | .arm, |
| 328 | .armeb, | 327 | .armeb, |
| ... | @@ -478,7 +477,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target { | ... | @@ -478,7 +477,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target { |
| 478 | .kalimba, | 477 | .kalimba, |
| 479 | .lanai, | 478 | .lanai, |
| 480 | .wasm32, | 479 | .wasm32, |
| 481 | .aarch64_32, | ||
| 482 | .spirv32, | 480 | .spirv32, |
| 483 | .loongarch32, | 481 | .loongarch32, |
| 484 | .dxil, | 482 | .dxil, |
| ... | @@ -542,7 +540,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target { | ... | @@ -542,7 +540,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target { |
| 542 | .x86_64, | 540 | .x86_64, |
| 543 | => {}, // Already 64 bit | 541 | => {}, // Already 64 bit |
| 544 | 542 | ||
| 545 | .aarch64_32 => copy.cpu.arch = .aarch64, | ||
| 546 | .arm => copy.cpu.arch = .aarch64, | 543 | .arm => copy.cpu.arch = .aarch64, |
| 547 | .armeb => copy.cpu.arch = .aarch64_be, | 544 | .armeb => copy.cpu.arch = .aarch64_be, |
| 548 | .loongarch32 => copy.cpu.arch = .loongarch64, | 545 | .loongarch32 => copy.cpu.arch = .loongarch64, |
| ... | @@ -574,9 +571,8 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 { | ... | @@ -574,9 +571,8 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 { |
| 574 | const llvm_arch = switch (target.cpu.arch) { | 571 | const llvm_arch = switch (target.cpu.arch) { |
| 575 | .arm => "arm", | 572 | .arm => "arm", |
| 576 | .armeb => "armeb", | 573 | .armeb => "armeb", |
| 577 | .aarch64 => "aarch64", | 574 | .aarch64 => if (target.abi == .ilp32) "aarch64_32" else "aarch64", |
| 578 | .aarch64_be => "aarch64_be", | 575 | .aarch64_be => "aarch64_be", |
| 579 | .aarch64_32 => "aarch64_32", | ||
| 580 | .arc => "arc", | 576 | .arc => "arc", |
| 581 | .avr => "avr", | 577 | .avr => "avr", |
| 582 | .bpfel => "bpfel", | 578 | .bpfel => "bpfel", |
| ... | @@ -687,7 +683,7 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 { | ... | @@ -687,7 +683,7 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 { |
| 687 | writer.writeByte('-') catch unreachable; | 683 | writer.writeByte('-') catch unreachable; |
| 688 | 684 | ||
| 689 | const llvm_abi = switch (target.abi) { | 685 | const llvm_abi = switch (target.abi) { |
| 690 | .none => "unknown", | 686 | .none, .ilp32 => "unknown", |
| 691 | .gnu => "gnu", | 687 | .gnu => "gnu", |
| 692 | .gnuabin32 => "gnuabin32", | 688 | .gnuabin32 => "gnuabin32", |
| 693 | .gnuabi64 => "gnuabi64", | 689 | .gnuabi64 => "gnuabi64", |
lib/compiler_rt/clear_cache.zig+1-1
| ... | @@ -25,7 +25,7 @@ fn clear_cache(start: usize, end: usize) callconv(.C) void { | ... | @@ -25,7 +25,7 @@ fn clear_cache(start: usize, end: usize) callconv(.C) void { |
| 25 | else => false, | 25 | else => false, |
| 26 | }; | 26 | }; |
| 27 | const arm64 = switch (arch) { | 27 | const arm64 = switch (arch) { |
| 28 | .aarch64, .aarch64_be, .aarch64_32 => true, | 28 | .aarch64, .aarch64_be => true, |
| 29 | else => false, | 29 | else => false, |
| 30 | }; | 30 | }; |
| 31 | const mips = switch (arch) { | 31 | const mips = switch (arch) { |
lib/compiler_rt/common.zig+1-1
| ... | @@ -92,7 +92,7 @@ pub fn F16T(comptime OtherType: type) type { | ... | @@ -92,7 +92,7 @@ pub fn F16T(comptime OtherType: type) type { |
| 92 | } | 92 | } |
| 93 | else | 93 | else |
| 94 | u16, | 94 | u16, |
| 95 | .aarch64, .aarch64_be, .aarch64_32 => f16, | 95 | .aarch64, .aarch64_be => f16, |
| 96 | .riscv64 => if (builtin.zig_backend == .stage1) u16 else f16, | 96 | .riscv64 => if (builtin.zig_backend == .stage1) u16 else f16, |
| 97 | .x86, .x86_64 => if (builtin.target.isDarwin()) switch (OtherType) { | 97 | .x86, .x86_64 => if (builtin.target.isDarwin()) switch (OtherType) { |
| 98 | // Starting with LLVM 16, Darwin uses different abi for f16 | 98 | // Starting with LLVM 16, Darwin uses different abi for f16 |
lib/std/Target.zig+14-24
| ... | @@ -197,7 +197,7 @@ pub const Os = struct { | ... | @@ -197,7 +197,7 @@ pub const Os = struct { |
| 197 | return switch (tag) { | 197 | return switch (tag) { |
| 198 | .linux => switch (arch) { | 198 | .linux => switch (arch) { |
| 199 | .arm, .armeb, .thumb, .thumbeb => "arm", | 199 | .arm, .armeb, .thumb, .thumbeb => "arm", |
| 200 | .aarch64, .aarch64_be, .aarch64_32 => "aarch64", | 200 | .aarch64, .aarch64_be => "aarch64", |
| 201 | .mips, .mipsel, .mips64, .mips64el => "mips", | 201 | .mips, .mipsel, .mips64, .mips64el => "mips", |
| 202 | .powerpc, .powerpcle, .powerpc64, .powerpc64le => "powerpc", | 202 | .powerpc, .powerpcle, .powerpc64, .powerpc64le => "powerpc", |
| 203 | .riscv32, .riscv64 => "riscv", | 203 | .riscv32, .riscv64 => "riscv", |
| ... | @@ -631,6 +631,7 @@ pub const Abi = enum { | ... | @@ -631,6 +631,7 @@ pub const Abi = enum { |
| 631 | code16, | 631 | code16, |
| 632 | eabi, | 632 | eabi, |
| 633 | eabihf, | 633 | eabihf, |
| 634 | ilp32, | ||
| 634 | android, | 635 | android, |
| 635 | musl, | 636 | musl, |
| 636 | musleabi, | 637 | musleabi, |
| ... | @@ -983,7 +984,6 @@ pub const Cpu = struct { | ... | @@ -983,7 +984,6 @@ pub const Cpu = struct { |
| 983 | armeb, | 984 | armeb, |
| 984 | aarch64, | 985 | aarch64, |
| 985 | aarch64_be, | 986 | aarch64_be, |
| 986 | aarch64_32, | ||
| 987 | arc, | 987 | arc, |
| 988 | avr, | 988 | avr, |
| 989 | bpfel, | 989 | bpfel, |
| ... | @@ -1031,6 +1031,7 @@ pub const Cpu = struct { | ... | @@ -1031,6 +1031,7 @@ pub const Cpu = struct { |
| 1031 | spu_2, | 1031 | spu_2, |
| 1032 | 1032 | ||
| 1033 | // LLVM tags deliberately omitted: | 1033 | // LLVM tags deliberately omitted: |
| 1034 | // - aarch64_32 | ||
| 1034 | // - r600 | 1035 | // - r600 |
| 1035 | // - le32 | 1036 | // - le32 |
| 1036 | // - le64 | 1037 | // - le64 |
| ... | @@ -1058,7 +1059,7 @@ pub const Cpu = struct { | ... | @@ -1058,7 +1059,7 @@ pub const Cpu = struct { |
| 1058 | 1059 | ||
| 1059 | pub inline fn isAARCH64(arch: Arch) bool { | 1060 | pub inline fn isAARCH64(arch: Arch) bool { |
| 1060 | return switch (arch) { | 1061 | return switch (arch) { |
| 1061 | .aarch64, .aarch64_be, .aarch64_32 => true, | 1062 | .aarch64, .aarch64_be => true, |
| 1062 | else => false, | 1063 | else => false, |
| 1063 | }; | 1064 | }; |
| 1064 | } | 1065 | } |
| ... | @@ -1172,7 +1173,6 @@ pub const Cpu = struct { | ... | @@ -1172,7 +1173,6 @@ pub const Cpu = struct { |
| 1172 | .kalimba => .CSR_KALIMBA, | 1173 | .kalimba => .CSR_KALIMBA, |
| 1173 | .lanai => .LANAI, | 1174 | .lanai => .LANAI, |
| 1174 | .wasm32 => .NONE, | 1175 | .wasm32 => .NONE, |
| 1175 | .aarch64_32 => .AARCH64, | ||
| 1176 | .aarch64 => .AARCH64, | 1176 | .aarch64 => .AARCH64, |
| 1177 | .aarch64_be => .AARCH64, | 1177 | .aarch64_be => .AARCH64, |
| 1178 | .mips64 => .MIPS, | 1178 | .mips64 => .MIPS, |
| ... | @@ -1226,7 +1226,6 @@ pub const Cpu = struct { | ... | @@ -1226,7 +1226,6 @@ pub const Cpu = struct { |
| 1226 | .kalimba => .Unknown, | 1226 | .kalimba => .Unknown, |
| 1227 | .lanai => .Unknown, | 1227 | .lanai => .Unknown, |
| 1228 | .wasm32 => .Unknown, | 1228 | .wasm32 => .Unknown, |
| 1229 | .aarch64_32 => .ARM64, | ||
| 1230 | .aarch64 => .ARM64, | 1229 | .aarch64 => .ARM64, |
| 1231 | .aarch64_be => .ARM64, | 1230 | .aarch64_be => .ARM64, |
| 1232 | .mips64 => .Unknown, | 1231 | .mips64 => .Unknown, |
| ... | @@ -1258,7 +1257,6 @@ pub const Cpu = struct { | ... | @@ -1258,7 +1257,6 @@ pub const Cpu = struct { |
| 1258 | return switch (arch) { | 1257 | return switch (arch) { |
| 1259 | .avr, | 1258 | .avr, |
| 1260 | .arm, | 1259 | .arm, |
| 1261 | .aarch64_32, | ||
| 1262 | .aarch64, | 1260 | .aarch64, |
| 1263 | .amdgcn, | 1261 | .amdgcn, |
| 1264 | .bpfel, | 1262 | .bpfel, |
| ... | @@ -1333,7 +1331,7 @@ pub const Cpu = struct { | ... | @@ -1333,7 +1331,7 @@ pub const Cpu = struct { |
| 1333 | pub fn genericName(arch: Arch) [:0]const u8 { | 1331 | pub fn genericName(arch: Arch) [:0]const u8 { |
| 1334 | return switch (arch) { | 1332 | return switch (arch) { |
| 1335 | .arm, .armeb, .thumb, .thumbeb => "arm", | 1333 | .arm, .armeb, .thumb, .thumbeb => "arm", |
| 1336 | .aarch64, .aarch64_be, .aarch64_32 => "aarch64", | 1334 | .aarch64, .aarch64_be => "aarch64", |
| 1337 | .bpfel, .bpfeb => "bpf", | 1335 | .bpfel, .bpfeb => "bpf", |
| 1338 | .loongarch32, .loongarch64 => "loongarch", | 1336 | .loongarch32, .loongarch64 => "loongarch", |
| 1339 | .mips, .mipsel, .mips64, .mips64el => "mips", | 1337 | .mips, .mipsel, .mips64, .mips64el => "mips", |
| ... | @@ -1354,7 +1352,7 @@ pub const Cpu = struct { | ... | @@ -1354,7 +1352,7 @@ pub const Cpu = struct { |
| 1354 | pub fn allFeaturesList(arch: Arch) []const Cpu.Feature { | 1352 | pub fn allFeaturesList(arch: Arch) []const Cpu.Feature { |
| 1355 | return switch (arch) { | 1353 | return switch (arch) { |
| 1356 | .arm, .armeb, .thumb, .thumbeb => &arm.all_features, | 1354 | .arm, .armeb, .thumb, .thumbeb => &arm.all_features, |
| 1357 | .aarch64, .aarch64_be, .aarch64_32 => &aarch64.all_features, | 1355 | .aarch64, .aarch64_be => &aarch64.all_features, |
| 1358 | .arc => &arc.all_features, | 1356 | .arc => &arc.all_features, |
| 1359 | .avr => &avr.all_features, | 1357 | .avr => &avr.all_features, |
| 1360 | .bpfel, .bpfeb => &bpf.all_features, | 1358 | .bpfel, .bpfeb => &bpf.all_features, |
| ... | @@ -1385,7 +1383,7 @@ pub const Cpu = struct { | ... | @@ -1385,7 +1383,7 @@ pub const Cpu = struct { |
| 1385 | return switch (arch) { | 1383 | return switch (arch) { |
| 1386 | .arc => comptime allCpusFromDecls(arc.cpu), | 1384 | .arc => comptime allCpusFromDecls(arc.cpu), |
| 1387 | .arm, .armeb, .thumb, .thumbeb => comptime allCpusFromDecls(arm.cpu), | 1385 | .arm, .armeb, .thumb, .thumbeb => comptime allCpusFromDecls(arm.cpu), |
| 1388 | .aarch64, .aarch64_be, .aarch64_32 => comptime allCpusFromDecls(aarch64.cpu), | 1386 | .aarch64, .aarch64_be => comptime allCpusFromDecls(aarch64.cpu), |
| 1389 | .avr => comptime allCpusFromDecls(avr.cpu), | 1387 | .avr => comptime allCpusFromDecls(avr.cpu), |
| 1390 | .bpfel, .bpfeb => comptime allCpusFromDecls(bpf.cpu), | 1388 | .bpfel, .bpfeb => comptime allCpusFromDecls(bpf.cpu), |
| 1391 | .csky => comptime allCpusFromDecls(csky.cpu), | 1389 | .csky => comptime allCpusFromDecls(csky.cpu), |
| ... | @@ -1471,7 +1469,7 @@ pub const Cpu = struct { | ... | @@ -1471,7 +1469,7 @@ pub const Cpu = struct { |
| 1471 | }; | 1469 | }; |
| 1472 | return switch (arch) { | 1470 | return switch (arch) { |
| 1473 | .arm, .armeb, .thumb, .thumbeb => &arm.cpu.generic, | 1471 | .arm, .armeb, .thumb, .thumbeb => &arm.cpu.generic, |
| 1474 | .aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.generic, | 1472 | .aarch64, .aarch64_be => &aarch64.cpu.generic, |
| 1475 | .avr => &avr.cpu.avr2, | 1473 | .avr => &avr.cpu.avr2, |
| 1476 | .bpfel, .bpfeb => &bpf.cpu.generic, | 1474 | .bpfel, .bpfeb => &bpf.cpu.generic, |
| 1477 | .hexagon => &hexagon.cpu.generic, | 1475 | .hexagon => &hexagon.cpu.generic, |
| ... | @@ -1700,7 +1698,6 @@ pub const DynamicLinker = struct { | ... | @@ -1700,7 +1698,6 @@ pub const DynamicLinker = struct { |
| 1700 | 1698 | ||
| 1701 | .aarch64 => init("/lib/ld-linux-aarch64.so.1"), | 1699 | .aarch64 => init("/lib/ld-linux-aarch64.so.1"), |
| 1702 | .aarch64_be => init("/lib/ld-linux-aarch64_be.so.1"), | 1700 | .aarch64_be => init("/lib/ld-linux-aarch64_be.so.1"), |
| 1703 | .aarch64_32 => init("/lib/ld-linux-aarch64_32.so.1"), | ||
| 1704 | 1701 | ||
| 1705 | .arm, | 1702 | .arm, |
| 1706 | .armeb, | 1703 | .armeb, |
| ... | @@ -1835,7 +1832,7 @@ pub fn standardDynamicLinkerPath(target: Target) DynamicLinker { | ... | @@ -1835,7 +1832,7 @@ pub fn standardDynamicLinkerPath(target: Target) DynamicLinker { |
| 1835 | 1832 | ||
| 1836 | pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 { | 1833 | pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 { |
| 1837 | switch (abi) { | 1834 | switch (abi) { |
| 1838 | .gnux32, .muslx32, .gnuabin32, .gnuilp32 => return 32, | 1835 | .gnux32, .muslx32, .gnuabin32, .gnuilp32, .ilp32 => return 32, |
| 1839 | .gnuabi64 => return 64, | 1836 | .gnuabi64 => return 64, |
| 1840 | else => {}, | 1837 | else => {}, |
| 1841 | } | 1838 | } |
| ... | @@ -1866,7 +1863,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 { | ... | @@ -1866,7 +1863,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 { |
| 1866 | .kalimba, | 1863 | .kalimba, |
| 1867 | .lanai, | 1864 | .lanai, |
| 1868 | .wasm32, | 1865 | .wasm32, |
| 1869 | .aarch64_32, | ||
| 1870 | .spirv32, | 1866 | .spirv32, |
| 1871 | .loongarch32, | 1867 | .loongarch32, |
| 1872 | .dxil, | 1868 | .dxil, |
| ... | @@ -1923,7 +1919,6 @@ pub fn stackAlignment(target: Target) u16 { | ... | @@ -1923,7 +1919,6 @@ pub fn stackAlignment(target: Target) u16 { |
| 1923 | => 8, | 1919 | => 8, |
| 1924 | .aarch64, | 1920 | .aarch64, |
| 1925 | .aarch64_be, | 1921 | .aarch64_be, |
| 1926 | .aarch64_32, | ||
| 1927 | .bpfeb, | 1922 | .bpfeb, |
| 1928 | .bpfel, | 1923 | .bpfel, |
| 1929 | .mips64, | 1924 | .mips64, |
| ... | @@ -1954,7 +1949,6 @@ pub fn stackAlignment(target: Target) u16 { | ... | @@ -1954,7 +1949,6 @@ pub fn stackAlignment(target: Target) u16 { |
| 1954 | pub fn charSignedness(target: Target) std.builtin.Signedness { | 1949 | pub fn charSignedness(target: Target) std.builtin.Signedness { |
| 1955 | switch (target.cpu.arch) { | 1950 | switch (target.cpu.arch) { |
| 1956 | .aarch64, | 1951 | .aarch64, |
| 1957 | .aarch64_32, | ||
| 1958 | .aarch64_be, | 1952 | .aarch64_be, |
| 1959 | .arm, | 1953 | .arm, |
| 1960 | .armeb, | 1954 | .armeb, |
| ... | @@ -2079,7 +2073,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 { | ... | @@ -2079,7 +2073,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 { |
| 2079 | .riscv64, | 2073 | .riscv64, |
| 2080 | .aarch64, | 2074 | .aarch64, |
| 2081 | .aarch64_be, | 2075 | .aarch64_be, |
| 2082 | .aarch64_32, | ||
| 2083 | .s390x, | 2076 | .s390x, |
| 2084 | .sparc, | 2077 | .sparc, |
| 2085 | .sparc64, | 2078 | .sparc64, |
| ... | @@ -2183,7 +2176,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 { | ... | @@ -2183,7 +2176,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 { |
| 2183 | .riscv64, | 2176 | .riscv64, |
| 2184 | .aarch64, | 2177 | .aarch64, |
| 2185 | .aarch64_be, | 2178 | .aarch64_be, |
| 2186 | .aarch64_32, | ||
| 2187 | .s390x, | 2179 | .s390x, |
| 2188 | .mips64, | 2180 | .mips64, |
| 2189 | .mips64el, | 2181 | .mips64el, |
| ... | @@ -2207,7 +2199,7 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 { | ... | @@ -2207,7 +2199,7 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 { |
| 2207 | .long, .ulong => return 32, | 2199 | .long, .ulong => return 32, |
| 2208 | .longlong, .ulonglong, .double => return 64, | 2200 | .longlong, .ulonglong, .double => return 64, |
| 2209 | .longdouble => switch (target.abi) { | 2201 | .longdouble => switch (target.abi) { |
| 2210 | .gnu, .gnuilp32, .cygnus => return 80, | 2202 | .gnu, .gnuilp32, .ilp32, .cygnus => return 80, |
| 2211 | else => return 64, | 2203 | else => return 64, |
| 2212 | }, | 2204 | }, |
| 2213 | }, | 2205 | }, |
| ... | @@ -2221,7 +2213,7 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 { | ... | @@ -2221,7 +2213,7 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 { |
| 2221 | }, | 2213 | }, |
| 2222 | .longlong, .ulonglong, .double => return 64, | 2214 | .longlong, .ulonglong, .double => return 64, |
| 2223 | .longdouble => switch (target.abi) { | 2215 | .longdouble => switch (target.abi) { |
| 2224 | .gnu, .gnuilp32, .cygnus => return 80, | 2216 | .gnu, .gnuilp32, .ilp32, .cygnus => return 80, |
| 2225 | else => return 64, | 2217 | else => return 64, |
| 2226 | }, | 2218 | }, |
| 2227 | }, | 2219 | }, |
| ... | @@ -2240,7 +2232,7 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 { | ... | @@ -2240,7 +2232,7 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 { |
| 2240 | .short, .ushort => return 16, | 2232 | .short, .ushort => return 16, |
| 2241 | .int, .uint, .float => return 32, | 2233 | .int, .uint, .float => return 32, |
| 2242 | .long, .ulong => switch (target.cpu.arch) { | 2234 | .long, .ulong => switch (target.cpu.arch) { |
| 2243 | .x86, .arm, .aarch64_32 => return 32, | 2235 | .x86, .arm => return 32, |
| 2244 | .x86_64 => switch (target.abi) { | 2236 | .x86_64 => switch (target.abi) { |
| 2245 | .gnux32, .muslx32 => return 32, | 2237 | .gnux32, .muslx32 => return 32, |
| 2246 | else => return 64, | 2238 | else => return 64, |
| ... | @@ -2326,7 +2318,7 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 { | ... | @@ -2326,7 +2318,7 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 { |
| 2326 | .windows, .uefi => switch (c_type) { | 2318 | .windows, .uefi => switch (c_type) { |
| 2327 | .longlong, .ulonglong, .double => return 8, | 2319 | .longlong, .ulonglong, .double => return 8, |
| 2328 | .longdouble => switch (target.abi) { | 2320 | .longdouble => switch (target.abi) { |
| 2329 | .gnu, .gnuilp32, .cygnus => return 4, | 2321 | .gnu, .gnuilp32, .ilp32, .cygnus => return 4, |
| 2330 | else => return 8, | 2322 | else => return 8, |
| 2331 | }, | 2323 | }, |
| 2332 | else => {}, | 2324 | else => {}, |
| ... | @@ -2375,7 +2367,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 { | ... | @@ -2375,7 +2367,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 { |
| 2375 | .xtensa, | 2367 | .xtensa, |
| 2376 | => 4, | 2368 | => 4, |
| 2377 | 2369 | ||
| 2378 | .aarch64_32, | ||
| 2379 | .amdgcn, | 2370 | .amdgcn, |
| 2380 | .bpfel, | 2371 | .bpfel, |
| 2381 | .bpfeb, | 2372 | .bpfeb, |
| ... | @@ -2453,7 +2444,7 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 { | ... | @@ -2453,7 +2444,7 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 { |
| 2453 | .x86 => switch (target.os.tag) { | 2444 | .x86 => switch (target.os.tag) { |
| 2454 | .windows, .uefi => switch (c_type) { | 2445 | .windows, .uefi => switch (c_type) { |
| 2455 | .longdouble => switch (target.abi) { | 2446 | .longdouble => switch (target.abi) { |
| 2456 | .gnu, .gnuilp32, .cygnus => return 4, | 2447 | .gnu, .gnuilp32, .ilp32, .cygnus => return 4, |
| 2457 | else => return 8, | 2448 | else => return 8, |
| 2458 | }, | 2449 | }, |
| 2459 | else => {}, | 2450 | else => {}, |
| ... | @@ -2490,7 +2481,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 { | ... | @@ -2490,7 +2481,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 { |
| 2490 | .avr, | 2481 | .avr, |
| 2491 | .thumb, | 2482 | .thumb, |
| 2492 | .thumbeb, | 2483 | .thumbeb, |
| 2493 | .aarch64_32, | ||
| 2494 | .amdgcn, | 2484 | .amdgcn, |
| 2495 | .bpfel, | 2485 | .bpfel, |
| 2496 | .bpfeb, | 2486 | .bpfeb, |
lib/std/Thread.zig+1-1
| ... | @@ -1117,7 +1117,7 @@ const LinuxThreadImpl = struct { | ... | @@ -1117,7 +1117,7 @@ const LinuxThreadImpl = struct { |
| 1117 | [len] "r" (self.mapped.len), | 1117 | [len] "r" (self.mapped.len), |
| 1118 | : "memory" | 1118 | : "memory" |
| 1119 | ), | 1119 | ), |
| 1120 | .aarch64, .aarch64_be, .aarch64_32 => asm volatile ( | 1120 | .aarch64, .aarch64_be => asm volatile ( |
| 1121 | \\ mov x8, #215 | 1121 | \\ mov x8, #215 |
| 1122 | \\ mov x0, %[ptr] | 1122 | \\ mov x0, %[ptr] |
| 1123 | \\ mov x1, %[len] | 1123 | \\ mov x1, %[len] |
lib/std/atomic.zig+1-1
| ... | @@ -388,7 +388,7 @@ pub inline fn spinLoopHint() void { | ... | @@ -388,7 +388,7 @@ pub inline fn spinLoopHint() void { |
| 388 | // on common aarch64 CPUs. | 388 | // on common aarch64 CPUs. |
| 389 | // https://bugs.java.com/bugdatabase/view_bug.do?bug_id=8258604 | 389 | // https://bugs.java.com/bugdatabase/view_bug.do?bug_id=8258604 |
| 390 | // https://bugs.mysql.com/bug.php?id=100664 | 390 | // https://bugs.mysql.com/bug.php?id=100664 |
| 391 | .aarch64, .aarch64_be, .aarch64_32 => asm volatile ("isb" ::: "memory"), | 391 | .aarch64, .aarch64_be => asm volatile ("isb" ::: "memory"), |
| 392 | 392 | ||
| 393 | // `yield` was introduced in v6k but is also available on v6m. | 393 | // `yield` was introduced in v6k but is also available on v6m. |
| 394 | // https://www.keil.com/support/man/docs/armasm/armasm_dom1361289926796.htm | 394 | // https://www.keil.com/support/man/docs/armasm/armasm_dom1361289926796.htm |
lib/std/c.zig+1-1
| ... | @@ -6829,7 +6829,7 @@ pub const padded_pthread_spin_t = switch (native_os) { | ... | @@ -6829,7 +6829,7 @@ pub const padded_pthread_spin_t = switch (native_os) { |
| 6829 | 6829 | ||
| 6830 | pub const pthread_spin_t = switch (native_os) { | 6830 | pub const pthread_spin_t = switch (native_os) { |
| 6831 | .netbsd => switch (builtin.cpu.arch) { | 6831 | .netbsd => switch (builtin.cpu.arch) { |
| 6832 | .aarch64, .aarch64_be, .aarch64_32 => u8, | 6832 | .aarch64, .aarch64_be => u8, |
| 6833 | .mips, .mipsel, .mips64, .mips64el => u32, | 6833 | .mips, .mipsel, .mips64, .mips64el => u32, |
| 6834 | .powerpc, .powerpc64, .powerpc64le => i32, | 6834 | .powerpc, .powerpc64, .powerpc64le => i32, |
| 6835 | .x86, .x86_64 => u8, | 6835 | .x86, .x86_64 => u8, |
lib/std/zig/LibCDirs.zig+1
| ... | @@ -246,6 +246,7 @@ fn libCGenericName(target: std.Target) [:0]const u8 { | ... | @@ -246,6 +246,7 @@ fn libCGenericName(target: std.Target) [:0]const u8 { |
| 246 | .code16, | 246 | .code16, |
| 247 | .eabi, | 247 | .eabi, |
| 248 | .eabihf, | 248 | .eabihf, |
| 249 | .ilp32, | ||
| 249 | .android, | 250 | .android, |
| 250 | .msvc, | 251 | .msvc, |
| 251 | .itanium, | 252 | .itanium, |
lib/std/zig/system/darwin/macos.zig+1-1
| ... | @@ -406,7 +406,7 @@ pub fn detectNativeCpuAndFeatures() ?Target.Cpu { | ... | @@ -406,7 +406,7 @@ pub fn detectNativeCpuAndFeatures() ?Target.Cpu { |
| 406 | 406 | ||
| 407 | const current_arch = builtin.cpu.arch; | 407 | const current_arch = builtin.cpu.arch; |
| 408 | switch (current_arch) { | 408 | switch (current_arch) { |
| 409 | .aarch64, .aarch64_be, .aarch64_32 => { | 409 | .aarch64, .aarch64_be => { |
| 410 | const model = switch (cpu_family) { | 410 | const model = switch (cpu_family) { |
| 411 | .ARM_EVEREST_SAWTOOTH => &Target.aarch64.cpu.apple_a16, | 411 | .ARM_EVEREST_SAWTOOTH => &Target.aarch64.cpu.apple_a16, |
| 412 | .ARM_BLIZZARD_AVALANCHE => &Target.aarch64.cpu.apple_a15, | 412 | .ARM_BLIZZARD_AVALANCHE => &Target.aarch64.cpu.apple_a15, |
lib/std/zig/system/linux.zig+2-2
| ... | @@ -264,7 +264,7 @@ const ArmCpuinfoImpl = struct { | ... | @@ -264,7 +264,7 @@ const ArmCpuinfoImpl = struct { |
| 264 | if (self.core_no == 0) return null; | 264 | if (self.core_no == 0) return null; |
| 265 | 265 | ||
| 266 | const is_64bit = switch (arch) { | 266 | const is_64bit = switch (arch) { |
| 267 | .aarch64, .aarch64_be, .aarch64_32 => true, | 267 | .aarch64, .aarch64_be => true, |
| 268 | else => false, | 268 | else => false, |
| 269 | }; | 269 | }; |
| 270 | 270 | ||
| ... | @@ -391,7 +391,7 @@ pub fn detectNativeCpuAndFeatures() ?Target.Cpu { | ... | @@ -391,7 +391,7 @@ pub fn detectNativeCpuAndFeatures() ?Target.Cpu { |
| 391 | .arm, .armeb, .thumb, .thumbeb => { | 391 | .arm, .armeb, .thumb, .thumbeb => { |
| 392 | return ArmCpuinfoParser.parse(current_arch, f.reader()) catch null; | 392 | return ArmCpuinfoParser.parse(current_arch, f.reader()) catch null; |
| 393 | }, | 393 | }, |
| 394 | .aarch64, .aarch64_be, .aarch64_32 => { | 394 | .aarch64, .aarch64_be => { |
| 395 | const registers = [12]u64{ | 395 | const registers = [12]u64{ |
| 396 | getAArch64CpuFeature("MIDR_EL1"), | 396 | getAArch64CpuFeature("MIDR_EL1"), |
| 397 | getAArch64CpuFeature("ID_AA64PFR0_EL1"), | 397 | getAArch64CpuFeature("ID_AA64PFR0_EL1"), |
lib/std/zig/system/windows.zig+2-2
| ... | @@ -209,7 +209,7 @@ fn genericCpuAndNativeFeatures(arch: Target.Cpu.Arch) Target.Cpu { | ... | @@ -209,7 +209,7 @@ fn genericCpuAndNativeFeatures(arch: Target.Cpu.Arch) Target.Cpu { |
| 209 | }; | 209 | }; |
| 210 | 210 | ||
| 211 | switch (arch) { | 211 | switch (arch) { |
| 212 | .aarch64, .aarch64_be, .aarch64_32 => { | 212 | .aarch64, .aarch64_be => { |
| 213 | const Feature = Target.aarch64.Feature; | 213 | const Feature = Target.aarch64.Feature; |
| 214 | 214 | ||
| 215 | // Override any features that are either present or absent | 215 | // Override any features that are either present or absent |
| ... | @@ -229,7 +229,7 @@ fn genericCpuAndNativeFeatures(arch: Target.Cpu.Arch) Target.Cpu { | ... | @@ -229,7 +229,7 @@ fn genericCpuAndNativeFeatures(arch: Target.Cpu.Arch) Target.Cpu { |
| 229 | pub fn detectNativeCpuAndFeatures() ?Target.Cpu { | 229 | pub fn detectNativeCpuAndFeatures() ?Target.Cpu { |
| 230 | const current_arch = builtin.cpu.arch; | 230 | const current_arch = builtin.cpu.arch; |
| 231 | const cpu: ?Target.Cpu = switch (current_arch) { | 231 | const cpu: ?Target.Cpu = switch (current_arch) { |
| 232 | .aarch64, .aarch64_be, .aarch64_32 => blk: { | 232 | .aarch64, .aarch64_be => blk: { |
| 233 | var cores: [128]Target.Cpu = undefined; | 233 | var cores: [128]Target.Cpu = undefined; |
| 234 | const core_count = getCpuCount(); | 234 | const core_count = getCpuCount(); |
| 235 | 235 |
src/Sema.zig+2-2
| ... | @@ -10036,11 +10036,11 @@ fn finishFunc( | ... | @@ -10036,11 +10036,11 @@ fn finishFunc( |
| 10036 | else => "x86", | 10036 | else => "x86", |
| 10037 | }, | 10037 | }, |
| 10038 | .Vectorcall => switch (arch) { | 10038 | .Vectorcall => switch (arch) { |
| 10039 | .x86, .aarch64, .aarch64_be, .aarch64_32 => null, | 10039 | .x86, .aarch64, .aarch64_be => null, |
| 10040 | else => "x86 and AArch64", | 10040 | else => "x86 and AArch64", |
| 10041 | }, | 10041 | }, |
| 10042 | .APCS, .AAPCS, .AAPCSVFP => switch (arch) { | 10042 | .APCS, .AAPCS, .AAPCSVFP => switch (arch) { |
| 10043 | .arm, .armeb, .aarch64, .aarch64_be, .aarch64_32, .thumb, .thumbeb => null, | 10043 | .arm, .armeb, .aarch64, .aarch64_be, .thumb, .thumbeb => null, |
| 10044 | else => "ARM", | 10044 | else => "ARM", |
| 10045 | }, | 10045 | }, |
| 10046 | .SysV, .Win64 => switch (arch) { | 10046 | .SysV, .Win64 => switch (arch) { |
src/Type.zig-1
| ... | @@ -1634,7 +1634,6 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 { | ... | @@ -1634,7 +1634,6 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 { |
| 1634 | .x86, | 1634 | .x86, |
| 1635 | .aarch64, | 1635 | .aarch64, |
| 1636 | .aarch64_be, | 1636 | .aarch64_be, |
| 1637 | .aarch64_32, | ||
| 1638 | .riscv64, | 1637 | .riscv64, |
| 1639 | .bpfel, | 1638 | .bpfel, |
| 1640 | .bpfeb, | 1639 | .bpfeb, |
src/Zcu.zig-1
| ... | @@ -3284,7 +3284,6 @@ pub fn atomicPtrAlignment( | ... | @@ -3284,7 +3284,6 @@ pub fn atomicPtrAlignment( |
| 3284 | 3284 | ||
| 3285 | .aarch64, | 3285 | .aarch64, |
| 3286 | .aarch64_be, | 3286 | .aarch64_be, |
| 3287 | .aarch64_32, | ||
| 3288 | => 128, | 3287 | => 128, |
| 3289 | 3288 | ||
| 3290 | .x86_64 => if (std.Target.x86.featureSetHas(target.cpu.features, .cx16)) 128 else 64, | 3289 | .x86_64 => if (std.Target.x86.featureSetHas(target.cpu.features, .cx16)) 128 else 64, |
src/codegen/llvm.zig+6-11
| ... | @@ -43,9 +43,8 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 { | ... | @@ -43,9 +43,8 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 { |
| 43 | const llvm_arch = switch (target.cpu.arch) { | 43 | const llvm_arch = switch (target.cpu.arch) { |
| 44 | .arm => "arm", | 44 | .arm => "arm", |
| 45 | .armeb => "armeb", | 45 | .armeb => "armeb", |
| 46 | .aarch64 => "aarch64", | 46 | .aarch64 => if (target.abi == .ilp32) "aarch64_32" else "aarch64", |
| 47 | .aarch64_be => "aarch64_be", | 47 | .aarch64_be => "aarch64_be", |
| 48 | .aarch64_32 => "aarch64_32", | ||
| 49 | .arc => "arc", | 48 | .arc => "arc", |
| 50 | .avr => "avr", | 49 | .avr => "avr", |
| 51 | .bpfel => "bpfel", | 50 | .bpfel => "bpfel", |
| ... | @@ -157,7 +156,7 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 { | ... | @@ -157,7 +156,7 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 { |
| 157 | try llvm_triple.append('-'); | 156 | try llvm_triple.append('-'); |
| 158 | 157 | ||
| 159 | const llvm_abi = switch (target.abi) { | 158 | const llvm_abi = switch (target.abi) { |
| 160 | .none => "unknown", | 159 | .none, .ilp32 => "unknown", |
| 161 | .gnu => "gnu", | 160 | .gnu => "gnu", |
| 162 | .gnuabin32 => "gnuabin32", | 161 | .gnuabin32 => "gnuabin32", |
| 163 | .gnuabi64 => "gnuabi64", | 162 | .gnuabi64 => "gnuabi64", |
| ... | @@ -259,7 +258,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType { | ... | @@ -259,7 +258,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType { |
| 259 | .armeb => .armeb, | 258 | .armeb => .armeb, |
| 260 | .aarch64 => .aarch64, | 259 | .aarch64 => .aarch64, |
| 261 | .aarch64_be => .aarch64_be, | 260 | .aarch64_be => .aarch64_be, |
| 262 | .aarch64_32 => .aarch64_32, | ||
| 263 | .arc => .arc, | 261 | .arc => .arc, |
| 264 | .avr => .avr, | 262 | .avr => .avr, |
| 265 | .bpfel => .bpfel, | 263 | .bpfel => .bpfel, |
| ... | @@ -393,7 +391,6 @@ const DataLayoutBuilder = struct { | ... | @@ -393,7 +391,6 @@ const DataLayoutBuilder = struct { |
| 393 | .pref = pref, | 391 | .pref = pref, |
| 394 | .idx = idx, | 392 | .idx = idx, |
| 395 | }; | 393 | }; |
| 396 | if (self.target.cpu.arch == .aarch64_32) continue; | ||
| 397 | if (!info.force_in_data_layout and matches_default and | 394 | if (!info.force_in_data_layout and matches_default and |
| 398 | self.target.cpu.arch != .riscv64 and | 395 | self.target.cpu.arch != .riscv64 and |
| 399 | self.target.cpu.arch != .loongarch64 and | 396 | self.target.cpu.arch != .loongarch64 and |
| ... | @@ -483,7 +480,6 @@ const DataLayoutBuilder = struct { | ... | @@ -483,7 +480,6 @@ const DataLayoutBuilder = struct { |
| 483 | => &.{32}, | 480 | => &.{32}, |
| 484 | .aarch64, | 481 | .aarch64, |
| 485 | .aarch64_be, | 482 | .aarch64_be, |
| 486 | .aarch64_32, | ||
| 487 | .amdgcn, | 483 | .amdgcn, |
| 488 | .bpfeb, | 484 | .bpfeb, |
| 489 | .bpfel, | 485 | .bpfel, |
| ... | @@ -587,7 +583,6 @@ const DataLayoutBuilder = struct { | ... | @@ -587,7 +583,6 @@ const DataLayoutBuilder = struct { |
| 587 | switch (self.target.cpu.arch) { | 583 | switch (self.target.cpu.arch) { |
| 588 | .aarch64, | 584 | .aarch64, |
| 589 | .aarch64_be, | 585 | .aarch64_be, |
| 590 | .aarch64_32, | ||
| 591 | => if (size == 128) { | 586 | => if (size == 128) { |
| 592 | abi = size; | 587 | abi = size; |
| 593 | pref = size; | 588 | pref = size; |
| ... | @@ -705,7 +700,7 @@ const DataLayoutBuilder = struct { | ... | @@ -705,7 +700,7 @@ const DataLayoutBuilder = struct { |
| 705 | force_pref = true; | 700 | force_pref = true; |
| 706 | }, | 701 | }, |
| 707 | .float => switch (self.target.cpu.arch) { | 702 | .float => switch (self.target.cpu.arch) { |
| 708 | .aarch64_32, .amdgcn => if (size == 128) { | 703 | .amdgcn => if (size == 128) { |
| 709 | abi = size; | 704 | abi = size; |
| 710 | pref = size; | 705 | pref = size; |
| 711 | }, | 706 | }, |
| ... | @@ -10860,7 +10855,7 @@ pub const FuncGen = struct { | ... | @@ -10860,7 +10855,7 @@ pub const FuncGen = struct { |
| 10860 | , | 10855 | , |
| 10861 | .constraints = "={rdx},{rax},0,~{cc},~{memory}", | 10856 | .constraints = "={rdx},{rax},0,~{cc},~{memory}", |
| 10862 | }, | 10857 | }, |
| 10863 | .aarch64, .aarch64_32, .aarch64_be => .{ | 10858 | .aarch64, .aarch64_be => .{ |
| 10864 | .template = | 10859 | .template = |
| 10865 | \\ror x12, x12, #3 ; ror x12, x12, #13 | 10860 | \\ror x12, x12, #3 ; ror x12, x12, #13 |
| 10866 | \\ror x12, x12, #51 ; ror x12, x12, #61 | 10861 | \\ror x12, x12, #51 ; ror x12, x12, #61 |
| ... | @@ -10932,7 +10927,7 @@ fn toLlvmCallConv(cc: std.builtin.CallingConvention, target: std.Target) Builder | ... | @@ -10932,7 +10927,7 @@ fn toLlvmCallConv(cc: std.builtin.CallingConvention, target: std.Target) Builder |
| 10932 | .Fastcall => .x86_fastcallcc, | 10927 | .Fastcall => .x86_fastcallcc, |
| 10933 | .Vectorcall => return switch (target.cpu.arch) { | 10928 | .Vectorcall => return switch (target.cpu.arch) { |
| 10934 | .x86, .x86_64 => .x86_vectorcallcc, | 10929 | .x86, .x86_64 => .x86_vectorcallcc, |
| 10935 | .aarch64, .aarch64_be, .aarch64_32 => .aarch64_vector_pcs, | 10930 | .aarch64, .aarch64_be => .aarch64_vector_pcs, |
| 10936 | else => unreachable, | 10931 | else => unreachable, |
| 10937 | }, | 10932 | }, |
| 10938 | .Thiscall => .x86_thiscallcc, | 10933 | .Thiscall => .x86_thiscallcc, |
| ... | @@ -11929,7 +11924,7 @@ fn constraintAllowsRegister(constraint: []const u8) bool { | ... | @@ -11929,7 +11924,7 @@ fn constraintAllowsRegister(constraint: []const u8) bool { |
| 11929 | 11924 | ||
| 11930 | pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void { | 11925 | pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void { |
| 11931 | switch (arch) { | 11926 | switch (arch) { |
| 11932 | .aarch64, .aarch64_be, .aarch64_32 => { | 11927 | .aarch64, .aarch64_be => { |
| 11933 | llvm.LLVMInitializeAArch64Target(); | 11928 | llvm.LLVMInitializeAArch64Target(); |
| 11934 | llvm.LLVMInitializeAArch64TargetInfo(); | 11929 | llvm.LLVMInitializeAArch64TargetInfo(); |
| 11935 | llvm.LLVMInitializeAArch64TargetMC(); | 11930 | llvm.LLVMInitializeAArch64TargetMC(); |
src/mingw.zig+2-2
| ... | @@ -224,7 +224,7 @@ pub fn buildImportLib(comp: *Compilation, lib_name: []const u8) !void { | ... | @@ -224,7 +224,7 @@ pub fn buildImportLib(comp: *Compilation, lib_name: []const u8) !void { |
| 224 | const target_defines = switch (target.cpu.arch) { | 224 | const target_defines = switch (target.cpu.arch) { |
| 225 | .x86 => "#define DEF_I386\n", | 225 | .x86 => "#define DEF_I386\n", |
| 226 | .x86_64 => "#define DEF_X64\n", | 226 | .x86_64 => "#define DEF_X64\n", |
| 227 | .arm, .armeb, .thumb, .thumbeb, .aarch64_32 => "#define DEF_ARM32\n", | 227 | .arm, .armeb, .thumb, .thumbeb => "#define DEF_ARM32\n", |
| 228 | .aarch64, .aarch64_be => "#define DEF_ARM64\n", | 228 | .aarch64, .aarch64_be => "#define DEF_ARM64\n", |
| 229 | else => unreachable, | 229 | else => unreachable, |
| 230 | }; | 230 | }; |
| ... | @@ -323,7 +323,7 @@ fn findDef( | ... | @@ -323,7 +323,7 @@ fn findDef( |
| 323 | const lib_path = switch (target.cpu.arch) { | 323 | const lib_path = switch (target.cpu.arch) { |
| 324 | .x86 => "lib32", | 324 | .x86 => "lib32", |
| 325 | .x86_64 => "lib64", | 325 | .x86_64 => "lib64", |
| 326 | .arm, .armeb, .thumb, .thumbeb, .aarch64_32 => "libarm32", | 326 | .arm, .armeb, .thumb, .thumbeb => "libarm32", |
| 327 | .aarch64, .aarch64_be => "libarm64", | 327 | .aarch64, .aarch64_be => "libarm64", |
| 328 | else => unreachable, | 328 | else => unreachable, |
| 329 | }; | 329 | }; |
src/target.zig+2-6
| ... | @@ -78,7 +78,6 @@ pub fn hasValgrindSupport(target: std.Target) bool { | ... | @@ -78,7 +78,6 @@ pub fn hasValgrindSupport(target: std.Target) bool { |
| 78 | .x86, | 78 | .x86, |
| 79 | .x86_64, | 79 | .x86_64, |
| 80 | .aarch64, | 80 | .aarch64, |
| 81 | .aarch64_32, | ||
| 82 | .aarch64_be, | 81 | .aarch64_be, |
| 83 | => { | 82 | => { |
| 84 | return target.os.tag == .linux or target.os.tag == .solaris or target.os.tag == .illumos or | 83 | return target.os.tag == .linux or target.os.tag == .solaris or target.os.tag == .illumos or |
| ... | @@ -115,7 +114,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool { | ... | @@ -115,7 +114,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool { |
| 115 | .armeb, | 114 | .armeb, |
| 116 | .aarch64, | 115 | .aarch64, |
| 117 | .aarch64_be, | 116 | .aarch64_be, |
| 118 | .aarch64_32, | ||
| 119 | .arc, | 117 | .arc, |
| 120 | .avr, | 118 | .avr, |
| 121 | .bpfel, | 119 | .bpfel, |
| ... | @@ -268,7 +266,6 @@ pub fn hasRedZone(target: std.Target) bool { | ... | @@ -268,7 +266,6 @@ pub fn hasRedZone(target: std.Target) bool { |
| 268 | .x86, | 266 | .x86, |
| 269 | .aarch64, | 267 | .aarch64, |
| 270 | .aarch64_be, | 268 | .aarch64_be, |
| 271 | .aarch64_32, | ||
| 272 | => true, | 269 | => true, |
| 273 | 270 | ||
| 274 | else => false, | 271 | else => false, |
| ... | @@ -412,7 +409,7 @@ pub fn llvmMachineAbi(target: std.Target) ?[:0]const u8 { | ... | @@ -412,7 +409,7 @@ pub fn llvmMachineAbi(target: std.Target) ?[:0]const u8 { |
| 412 | pub fn defaultFunctionAlignment(target: std.Target) Alignment { | 409 | pub fn defaultFunctionAlignment(target: std.Target) Alignment { |
| 413 | return switch (target.cpu.arch) { | 410 | return switch (target.cpu.arch) { |
| 414 | .arm, .armeb => .@"4", | 411 | .arm, .armeb => .@"4", |
| 415 | .aarch64, .aarch64_32, .aarch64_be => .@"4", | 412 | .aarch64, .aarch64_be => .@"4", |
| 416 | .sparc, .sparcel, .sparc64 => .@"4", | 413 | .sparc, .sparcel, .sparc64 => .@"4", |
| 417 | .riscv64 => .@"2", | 414 | .riscv64 => .@"2", |
| 418 | else => .@"1", | 415 | else => .@"1", |
| ... | @@ -424,7 +421,6 @@ pub fn minFunctionAlignment(target: std.Target) Alignment { | ... | @@ -424,7 +421,6 @@ pub fn minFunctionAlignment(target: std.Target) Alignment { |
| 424 | .arm, | 421 | .arm, |
| 425 | .armeb, | 422 | .armeb, |
| 426 | .aarch64, | 423 | .aarch64, |
| 427 | .aarch64_32, | ||
| 428 | .aarch64_be, | 424 | .aarch64_be, |
| 429 | .riscv32, | 425 | .riscv32, |
| 430 | .riscv64, | 426 | .riscv64, |
| ... | @@ -517,7 +513,7 @@ pub fn zigBackend(target: std.Target, use_llvm: bool) std.builtin.CompilerBacken | ... | @@ -517,7 +513,7 @@ pub fn zigBackend(target: std.Target, use_llvm: bool) std.builtin.CompilerBacken |
| 517 | .arm, .armeb, .thumb, .thumbeb => .stage2_arm, | 513 | .arm, .armeb, .thumb, .thumbeb => .stage2_arm, |
| 518 | .x86_64 => .stage2_x86_64, | 514 | .x86_64 => .stage2_x86_64, |
| 519 | .x86 => .stage2_x86, | 515 | .x86 => .stage2_x86, |
| 520 | .aarch64, .aarch64_be, .aarch64_32 => .stage2_aarch64, | 516 | .aarch64, .aarch64_be => .stage2_aarch64, |
| 521 | .riscv64 => .stage2_riscv64, | 517 | .riscv64 => .stage2_riscv64, |
| 522 | .sparc64 => .stage2_sparc64, | 518 | .sparc64 => .stage2_sparc64, |
| 523 | .spirv64 => .stage2_spirv64, | 519 | .spirv64 => .stage2_spirv64, |
test/behavior/align.zig-1
| ... | @@ -175,7 +175,6 @@ test "alignment and size of structs with 128-bit fields" { | ... | @@ -175,7 +175,6 @@ test "alignment and size of structs with 128-bit fields" { |
| 175 | .x86, | 175 | .x86, |
| 176 | .aarch64, | 176 | .aarch64, |
| 177 | .aarch64_be, | 177 | .aarch64_be, |
| 178 | .aarch64_32, | ||
| 179 | .riscv64, | 178 | .riscv64, |
| 180 | .bpfel, | 179 | .bpfel, |
| 181 | .bpfeb, | 180 | .bpfeb, |
test/behavior/atomics.zig+1-1
| ... | @@ -5,7 +5,7 @@ const expectEqual = std.testing.expectEqual; | ... | @@ -5,7 +5,7 @@ const expectEqual = std.testing.expectEqual; |
| 5 | 5 | ||
| 6 | const supports_128_bit_atomics = switch (builtin.cpu.arch) { | 6 | const supports_128_bit_atomics = switch (builtin.cpu.arch) { |
| 7 | // TODO: Ideally this could be sync'd with the logic in Sema. | 7 | // TODO: Ideally this could be sync'd with the logic in Sema. |
| 8 | .aarch64, .aarch64_be, .aarch64_32 => true, | 8 | .aarch64, .aarch64_be => true, |
| 9 | .x86_64 => std.Target.x86.featureSetHas(builtin.cpu.features, .cx16), | 9 | .x86_64 => std.Target.x86.featureSetHas(builtin.cpu.features, .cx16), |
| 10 | else => false, | 10 | else => false, |
| 11 | }; | 11 | }; |
test/behavior/vector.zig-1
| ... | @@ -742,7 +742,6 @@ test "vector shift operators" { | ... | @@ -742,7 +742,6 @@ test "vector shift operators" { |
| 742 | 742 | ||
| 743 | switch (builtin.target.cpu.arch) { | 743 | switch (builtin.target.cpu.arch) { |
| 744 | .aarch64_be, | 744 | .aarch64_be, |
| 745 | .aarch64_32, | ||
| 746 | .armeb, | 745 | .armeb, |
| 747 | .thumb, | 746 | .thumb, |
| 748 | .thumbeb, | 747 | .thumbeb, |
test/llvm_targets.zig+2-2
| ... | @@ -3,9 +3,11 @@ const Cases = @import("src/Cases.zig"); | ... | @@ -3,9 +3,11 @@ const Cases = @import("src/Cases.zig"); |
| 3 | 3 | ||
| 4 | const targets = [_]std.Target.Query{ | 4 | const targets = [_]std.Target.Query{ |
| 5 | .{ .cpu_arch = .aarch64, .os_tag = .freestanding, .abi = .none }, | 5 | .{ .cpu_arch = .aarch64, .os_tag = .freestanding, .abi = .none }, |
| 6 | .{ .cpu_arch = .aarch64, .os_tag = .freestanding, .abi = .ilp32 }, | ||
| 6 | .{ .cpu_arch = .aarch64, .os_tag = .ios, .abi = .none }, | 7 | .{ .cpu_arch = .aarch64, .os_tag = .ios, .abi = .none }, |
| 7 | .{ .cpu_arch = .aarch64, .os_tag = .ios, .abi = .simulator }, | 8 | .{ .cpu_arch = .aarch64, .os_tag = .ios, .abi = .simulator }, |
| 8 | .{ .cpu_arch = .aarch64, .os_tag = .linux, .abi = .none }, | 9 | .{ .cpu_arch = .aarch64, .os_tag = .linux, .abi = .none }, |
| 10 | .{ .cpu_arch = .aarch64, .os_tag = .linux, .abi = .gnuilp32 }, | ||
| 9 | .{ .cpu_arch = .aarch64, .os_tag = .macos, .abi = .none }, | 11 | .{ .cpu_arch = .aarch64, .os_tag = .macos, .abi = .none }, |
| 10 | .{ .cpu_arch = .aarch64, .os_tag = .watchos, .abi = .none }, | 12 | .{ .cpu_arch = .aarch64, .os_tag = .watchos, .abi = .none }, |
| 11 | .{ .cpu_arch = .aarch64, .os_tag = .watchos, .abi = .simulator }, | 13 | .{ .cpu_arch = .aarch64, .os_tag = .watchos, .abi = .simulator }, |
| ... | @@ -18,8 +20,6 @@ const targets = [_]std.Target.Query{ | ... | @@ -18,8 +20,6 @@ const targets = [_]std.Target.Query{ |
| 18 | .{ .cpu_arch = .aarch64, .os_tag = .windows, .abi = .msvc }, | 20 | .{ .cpu_arch = .aarch64, .os_tag = .windows, .abi = .msvc }, |
| 19 | .{ .cpu_arch = .aarch64_be, .os_tag = .freestanding, .abi = .none }, | 21 | .{ .cpu_arch = .aarch64_be, .os_tag = .freestanding, .abi = .none }, |
| 20 | .{ .cpu_arch = .aarch64_be, .os_tag = .linux, .abi = .none }, | 22 | .{ .cpu_arch = .aarch64_be, .os_tag = .linux, .abi = .none }, |
| 21 | .{ .cpu_arch = .aarch64_32, .os_tag = .freestanding, .abi = .none }, | ||
| 22 | .{ .cpu_arch = .aarch64_32, .os_tag = .linux, .abi = .none }, | ||
| 23 | .{ .cpu_arch = .amdgcn, .os_tag = .amdhsa, .abi = .none }, | 23 | .{ .cpu_arch = .amdgcn, .os_tag = .amdhsa, .abi = .none }, |
| 24 | .{ .cpu_arch = .amdgcn, .os_tag = .amdpal, .abi = .none }, | 24 | .{ .cpu_arch = .amdgcn, .os_tag = .amdpal, .abi = .none }, |
| 25 | .{ .cpu_arch = .amdgcn, .os_tag = .linux, .abi = .none }, | 25 | .{ .cpu_arch = .amdgcn, .os_tag = .linux, .abi = .none }, |