authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-10-15 20:35:56+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-10-20 09:21:17+02:00
logd2f04e919c833288d5cf1efa97c25bbaae101168
tree5baba1c48ae636d1611d23b4b5ed310df7ae7951
parent40104f2145c3b7e2725604c0c777646a5fb621aa
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

compiler: Update defaultFunctionAlignment()/minFunctionAlignment() for more targets.

defaultFunctionAlignment() can be made more sophisticated over time based on the CPU model and/or features. For now, I've picked some reasonable values for the CPUs that are most commonly used in practice. (Values are sourced from LLVM.)

1 files changed, 53 insertions(+), 8 deletions(-)

src/target.zig+53-8
......@@ -461,26 +461,71 @@ pub fn llvmMachineAbi(target: std.Target) ?[:0]const u8 {
461461
462462/// This function returns 1 if function alignment is not observable or settable.
463463pub fn defaultFunctionAlignment(target: std.Target) Alignment {
464 // Overrides of the minimum for performance.
464465 return switch (target.cpu.arch) {
465 .arm, .armeb => .@"4",
466 .aarch64, .aarch64_be => .@"4",
467 .sparc, .sparc64 => .@"4",
468 .riscv64 => .@"2",
469 else => .@"1",
466 .csky,
467 .thumb,
468 .thumbeb,
469 .xcore,
470 => .@"4",
471 .aarch64,
472 .aarch64_be,
473 .hexagon,
474 .powerpc,
475 .powerpcle,
476 .powerpc64,
477 .powerpc64le,
478 .s390x,
479 .x86,
480 .x86_64,
481 => .@"16",
482 .loongarch32,
483 .loongarch64,
484 => .@"32",
485 else => minFunctionAlignment(target),
470486 };
471487}
472488
489/// This function returns 1 if function alignment is not observable or settable.
473490pub fn minFunctionAlignment(target: std.Target) Alignment {
474491 return switch (target.cpu.arch) {
492 .riscv32,
493 .riscv64,
494 => if (std.Target.riscv.featureSetHasAny(target.cpu.features, .{ .c, .zca })) .@"2" else .@"4",
495 .thumb,
496 .thumbeb,
497 .csky,
498 .m68k,
499 .msp430,
500 .s390x,
501 .xcore,
502 => .@"2",
503 .arc,
475504 .arm,
476505 .armeb,
477506 .aarch64,
478507 .aarch64_be,
479 .riscv32,
480 .riscv64,
508 .hexagon,
509 .lanai,
510 .loongarch32,
511 .loongarch64,
512 .mips,
513 .mipsel,
514 .powerpc,
515 .powerpcle,
516 .powerpc64,
517 .powerpc64le,
481518 .sparc,
482519 .sparc64,
483 => .@"2",
520 .xtensa,
521 => .@"4",
522 .bpfel,
523 .bpfeb,
524 .mips64,
525 .mips64el,
526 => .@"8",
527 .ve,
528 => .@"16",
484529 else => .@"1",
485530 };
486531}