authorgravatar for git@vexu.euVeikka Tuominen <git@vexu.eu> 2020-02-24 23:50:02+02:00
committergravatar for git@vexu.euVeikka Tuominen <git@vexu.eu> 2020-02-25 01:27:34+02:00
logd56115ef4189a7716d9371ef87df9124a61f5ab1
tree2fef1af7bb3e97aeb15bcb3ce7dc134fd86d3a43
parent538d9a5dd8e0eca02d363bbd5f749405e003f1c6
signaturelock-open Commit is signed but in an unrecognized format.

remove `@IntType` and `@ArgType` (mostly) from the compiler

6 files changed, 2 insertions(+), 94 deletions(-)

doc/langref.html.in+2-2
......@@ -2810,10 +2810,10 @@ test "@TagType" {
28102810 assert(@TagType(Small) == u2);
28112811}
28122812
2813// @typeInfo tells us the field count and the fields name:
2813// @typeInfo tells us the field count and the fields names:
28142814test "@typeInfo" {
28152815 assert(@typeInfo(Small).Enum.fields.len == 4);
2816 assert(mem.eql(u8, @typeInfo(Small).Enum.fields[0].name, "Two"));
2816 assert(mem.eql(u8, @typeInfo(Small).Enum.fields[1].name, "Two"));
28172817}
28182818
28192819// @tagName gives a []const u8 representation of an enum value:
src/all_types.hpp-10
......@@ -1754,7 +1754,6 @@ enum BuiltinFnId {
17541754 BuiltinFnIdIntToErr,
17551755 BuiltinFnIdEnumToInt,
17561756 BuiltinFnIdIntToEnum,
1757 BuiltinFnIdIntType,
17581757 BuiltinFnIdVectorType,
17591758 BuiltinFnIdShuffle,
17601759 BuiltinFnIdSplat,
......@@ -1781,7 +1780,6 @@ enum BuiltinFnId {
17811780 BuiltinFnIdOpaqueType,
17821781 BuiltinFnIdThis,
17831782 BuiltinFnIdSetAlignStack,
1784 BuiltinFnIdArgType,
17851783 BuiltinFnIdExport,
17861784 BuiltinFnIdErrorReturnTrace,
17871785 BuiltinFnIdAtomicRmw,
......@@ -2626,7 +2624,6 @@ enum IrInstSrcId {
26262624 IrInstSrcIdIntToFloat,
26272625 IrInstSrcIdFloatToInt,
26282626 IrInstSrcIdBoolToInt,
2629 IrInstSrcIdIntType,
26302627 IrInstSrcIdVectorType,
26312628 IrInstSrcIdShuffleVector,
26322629 IrInstSrcIdSplat,
......@@ -3628,13 +3625,6 @@ struct IrInstSrcBoolToInt {
36283625 IrInstSrc *target;
36293626};
36303627
3631struct IrInstSrcIntType {
3632 IrInstSrc base;
3633
3634 IrInstSrc *is_signed;
3635 IrInstSrc *bit_count;
3636};
3637
36383628struct IrInstSrcVectorType {
36393629 IrInstSrc base;
36403630
src/codegen.cpp-2
......@@ -8189,7 +8189,6 @@ static void define_builtin_fns(CodeGen *g) {
81898189 create_builtin_fn(g, BuiltinFnIdIntToEnum, "intToEnum", 2);
81908190 create_builtin_fn(g, BuiltinFnIdCompileErr, "compileError", 1);
81918191 create_builtin_fn(g, BuiltinFnIdCompileLog, "compileLog", SIZE_MAX);
8192 create_builtin_fn(g, BuiltinFnIdIntType, "IntType", 2); // TODO rename to Int
81938192 create_builtin_fn(g, BuiltinFnIdVectorType, "Vector", 2);
81948193 create_builtin_fn(g, BuiltinFnIdShuffle, "shuffle", 4);
81958194 create_builtin_fn(g, BuiltinFnIdSplat, "splat", 2);
......@@ -8234,7 +8233,6 @@ static void define_builtin_fns(CodeGen *g) {
82348233 create_builtin_fn(g, BuiltinFnIdAlignCast, "alignCast", 2);
82358234 create_builtin_fn(g, BuiltinFnIdOpaqueType, "OpaqueType", 0);
82368235 create_builtin_fn(g, BuiltinFnIdSetAlignStack, "setAlignStack", 1);
8237 create_builtin_fn(g, BuiltinFnIdArgType, "ArgType", 2);
82388236 create_builtin_fn(g, BuiltinFnIdExport, "export", 2);
82398237 create_builtin_fn(g, BuiltinFnIdErrorReturnTrace, "errorReturnTrace", 0);
82408238 create_builtin_fn(g, BuiltinFnIdAtomicRmw, "atomicRmw", 5);
src/ir.cpp-66
......@@ -389,8 +389,6 @@ static void destroy_instruction_src(IrInstSrc *inst) {
389389 return heap::c_allocator.destroy(reinterpret_cast<IrInstSrcFloatToInt *>(inst));
390390 case IrInstSrcIdBoolToInt:
391391 return heap::c_allocator.destroy(reinterpret_cast<IrInstSrcBoolToInt *>(inst));
392 case IrInstSrcIdIntType:
393 return heap::c_allocator.destroy(reinterpret_cast<IrInstSrcIntType *>(inst));
394392 case IrInstSrcIdVectorType:
395393 return heap::c_allocator.destroy(reinterpret_cast<IrInstSrcVectorType *>(inst));
396394 case IrInstSrcIdShuffleVector:
......@@ -1285,10 +1283,6 @@ static constexpr IrInstSrcId ir_inst_id(IrInstSrcBoolToInt *) {
12851283 return IrInstSrcIdBoolToInt;
12861284}
12871285
1288static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntType *) {
1289 return IrInstSrcIdIntType;
1290}
1291
12921286static constexpr IrInstSrcId ir_inst_id(IrInstSrcVectorType *) {
12931287 return IrInstSrcIdVectorType;
12941288}
......@@ -3518,19 +3512,6 @@ static IrInstSrc *ir_build_bool_to_int(IrBuilderSrc *irb, Scope *scope, AstNode
35183512 return &instruction->base;
35193513}
35203514
3521static IrInstSrc *ir_build_int_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *is_signed,
3522 IrInstSrc *bit_count)
3523{
3524 IrInstSrcIntType *instruction = ir_build_instruction<IrInstSrcIntType>(irb, scope, source_node);
3525 instruction->is_signed = is_signed;
3526 instruction->bit_count = bit_count;
3527
3528 ir_ref_instruction(is_signed, irb->current_basic_block);
3529 ir_ref_instruction(bit_count, irb->current_basic_block);
3530
3531 return &instruction->base;
3532}
3533
35343515static IrInstSrc *ir_build_vector_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *len,
35353516 IrInstSrc *elem_type)
35363517{
......@@ -6530,21 +6511,6 @@ static IrInstSrc *ir_gen_builtin_fn_call(IrBuilderSrc *irb, Scope *scope, AstNod
65306511 IrInstSrc *result = ir_build_bool_to_int(irb, scope, node, arg0_value);
65316512 return ir_lval_wrap(irb, scope, result, lval, result_loc);
65326513 }
6533 case BuiltinFnIdIntType:
6534 {
6535 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6536 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6537 if (arg0_value == irb->codegen->invalid_inst_src)
6538 return arg0_value;
6539
6540 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6541 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6542 if (arg1_value == irb->codegen->invalid_inst_src)
6543 return arg1_value;
6544
6545 IrInstSrc *int_type = ir_build_int_type(irb, scope, node, arg0_value, arg1_value);
6546 return ir_lval_wrap(irb, scope, int_type, lval, result_loc);
6547 }
65486514 case BuiltinFnIdVectorType:
65496515 {
65506516 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
......@@ -7074,21 +7040,6 @@ static IrInstSrc *ir_gen_builtin_fn_call(IrBuilderSrc *irb, Scope *scope, AstNod
70747040 IrInstSrc *set_align_stack = ir_build_set_align_stack(irb, scope, node, arg0_value);
70757041 return ir_lval_wrap(irb, scope, set_align_stack, lval, result_loc);
70767042 }
7077 case BuiltinFnIdArgType:
7078 {
7079 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
7080 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7081 if (arg0_value == irb->codegen->invalid_inst_src)
7082 return arg0_value;
7083
7084 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
7085 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7086 if (arg1_value == irb->codegen->invalid_inst_src)
7087 return arg1_value;
7088
7089 IrInstSrc *arg_type = ir_build_arg_type(irb, scope, node, arg0_value, arg1_value, false);
7090 return ir_lval_wrap(irb, scope, arg_type, lval, result_loc);
7091 }
70927043 case BuiltinFnIdExport:
70937044 {
70947045 // Cast the options parameter to the options type
......@@ -25385,20 +25336,6 @@ static IrInstGen *ir_analyze_instruction_bool_to_int(IrAnalyze *ira, IrInstSrcBo
2538525336 return ir_resolve_cast(ira, &instruction->base.base, target, u1_type, CastOpBoolToInt);
2538625337}
2538725338
25388static IrInstGen *ir_analyze_instruction_int_type(IrAnalyze *ira, IrInstSrcIntType *instruction) {
25389 IrInstGen *is_signed_value = instruction->is_signed->child;
25390 bool is_signed;
25391 if (!ir_resolve_bool(ira, is_signed_value, &is_signed))
25392 return ira->codegen->invalid_inst_gen;
25393
25394 IrInstGen *bit_count_value = instruction->bit_count->child;
25395 uint64_t bit_count;
25396 if (!ir_resolve_unsigned(ira, bit_count_value, ira->codegen->builtin_types.entry_u16, &bit_count))
25397 return ira->codegen->invalid_inst_gen;
25398
25399 return ir_const_type(ira, &instruction->base.base, get_int_type(ira->codegen, is_signed, (uint32_t)bit_count));
25400}
25401
2540225339static IrInstGen *ir_analyze_instruction_vector_type(IrAnalyze *ira, IrInstSrcVectorType *instruction) {
2540325340 uint64_t len;
2540425341 if (!ir_resolve_unsigned(ira, instruction->len->child, ira->codegen->builtin_types.entry_u32, &len))
......@@ -29270,8 +29207,6 @@ static IrInstGen *ir_analyze_instruction_base(IrAnalyze *ira, IrInstSrc *instruc
2927029207 return ir_analyze_instruction_float_to_int(ira, (IrInstSrcFloatToInt *)instruction);
2927129208 case IrInstSrcIdBoolToInt:
2927229209 return ir_analyze_instruction_bool_to_int(ira, (IrInstSrcBoolToInt *)instruction);
29273 case IrInstSrcIdIntType:
29274 return ir_analyze_instruction_int_type(ira, (IrInstSrcIntType *)instruction);
2927529210 case IrInstSrcIdVectorType:
2927629211 return ir_analyze_instruction_vector_type(ira, (IrInstSrcVectorType *)instruction);
2927729212 case IrInstSrcIdShuffleVector:
......@@ -29754,7 +29689,6 @@ bool ir_inst_src_has_side_effects(IrInstSrc *instruction) {
2975429689 case IrInstSrcIdRef:
2975529690 case IrInstSrcIdEmbedFile:
2975629691 case IrInstSrcIdTruncate:
29757 case IrInstSrcIdIntType:
2975829692 case IrInstSrcIdVectorType:
2975929693 case IrInstSrcIdShuffleVector:
2976029694 case IrInstSrcIdSplat:
src/ir_print.cpp-13
......@@ -179,8 +179,6 @@ const char* ir_inst_src_type_str(IrInstSrcId id) {
179179 return "SrcFloatToInt";
180180 case IrInstSrcIdBoolToInt:
181181 return "SrcBoolToInt";
182 case IrInstSrcIdIntType:
183 return "SrcIntType";
184182 case IrInstSrcIdVectorType:
185183 return "SrcVectorType";
186184 case IrInstSrcIdBoolNot:
......@@ -1652,14 +1650,6 @@ static void ir_print_bool_to_int(IrPrintSrc *irp, IrInstSrcBoolToInt *instructio
16521650 fprintf(irp->f, ")");
16531651}
16541652
1655static void ir_print_int_type(IrPrintSrc *irp, IrInstSrcIntType *instruction) {
1656 fprintf(irp->f, "@IntType(");
1657 ir_print_other_inst_src(irp, instruction->is_signed);
1658 fprintf(irp->f, ", ");
1659 ir_print_other_inst_src(irp, instruction->bit_count);
1660 fprintf(irp->f, ")");
1661}
1662
16631653static void ir_print_vector_type(IrPrintSrc *irp, IrInstSrcVectorType *instruction) {
16641654 fprintf(irp->f, "@Vector(");
16651655 ir_print_other_inst_src(irp, instruction->len);
......@@ -2739,9 +2729,6 @@ static void ir_print_inst_src(IrPrintSrc *irp, IrInstSrc *instruction, bool trai
27392729 case IrInstSrcIdBoolToInt:
27402730 ir_print_bool_to_int(irp, (IrInstSrcBoolToInt *)instruction);
27412731 break;
2742 case IrInstSrcIdIntType:
2743 ir_print_int_type(irp, (IrInstSrcIntType *)instruction);
2744 break;
27452732 case IrInstSrcIdVectorType:
27462733 ir_print_vector_type(irp, (IrInstSrcVectorType *)instruction);
27472734 break;
test/compile_errors.zig-1
......@@ -1902,7 +1902,6 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
19021902 \\ var x: i65536 = 1;
19031903 \\}
19041904 , &[_][]const u8{
1905 "tmp.zig:2:31: error: integer value 65536 cannot be coerced to type 'u16'",
19061905 "tmp.zig:5:12: error: primitive integer type 'i65536' exceeds maximum bit width of 65535",
19071906 });
19081907